653-0035-rtl8xxxu-Implement-rtl8xxxu_fill_txdesc_v3-for-8188e.patch 5.0 KB

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  1. From 3c50918b180d091a49e412742a4f7aa1a89802b1 Mon Sep 17 00:00:00 2001
  2. From: Jes Sorensen <Jes.Sorensen@redhat.com>
  3. Date: Tue, 26 Jul 2016 14:01:14 -0400
  4. Subject: [PATCH] rtl8xxxu: Implement rtl8xxxu_fill_txdesc_v3() for 8188eu
  5. Getting closer but still no cigar.
  6. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
  7. ---
  8. drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h | 11 +++
  9. .../net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 1 +
  10. .../net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 78 ++++++++++++++++++++++
  11. 3 files changed, 90 insertions(+)
  12. --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
  13. +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
  14. @@ -510,6 +510,8 @@ struct rtl8xxxu_txdesc40 {
  15. #define TXDESC_AMPDU_DENSITY_SHIFT 20
  16. #define TXDESC40_BT_INT BIT(23)
  17. #define TXDESC40_GID_SHIFT 24
  18. +#define TXDESC_ANTENNA_SELECT_A BIT(24)
  19. +#define TXDESC_ANTENNA_SELECT_B BIT(25)
  20. /* Word 3 */
  21. #define TXDESC40_USE_DRIVER_RATE BIT(8)
  22. @@ -554,6 +556,10 @@ struct rtl8xxxu_txdesc40 {
  23. /* Word 6 */
  24. #define TXDESC_MAX_AGG_SHIFT 11
  25. +#define TXDESC_USB_TX_AGG_SHIT 24
  26. +
  27. +/* Word 7 */
  28. +#define TXDESC_ANTENNA_SELECT_C BIT(29)
  29. /* Word 8 */
  30. #define TXDESC40_HW_SEQ_ENABLE BIT(15)
  31. @@ -1487,6 +1493,11 @@ void rtl8xxxu_fill_txdesc_v2(struct ieee
  32. struct ieee80211_tx_info *tx_info,
  33. struct rtl8xxxu_txdesc32 *tx_desc32, bool sgi,
  34. bool short_preamble, bool ampdu_enable,
  35. + u32 rts_rate);
  36. +void rtl8xxxu_fill_txdesc_v3(struct ieee80211_hw *hw, struct ieee80211_hdr *hdr,
  37. + struct ieee80211_tx_info *tx_info,
  38. + struct rtl8xxxu_txdesc32 *tx_desc32, bool sgi,
  39. + bool short_preamble, bool ampdu_enable,
  40. u32 rts_rate);
  41. extern struct rtl8xxxu_fileops rtl8188eu_fops;
  42. --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
  43. +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
  44. @@ -1217,6 +1217,7 @@ struct rtl8xxxu_fileops rtl8188eu_fops =
  45. .set_tx_power = rtl8188e_set_tx_power,
  46. .update_rate_mask = rtl8xxxu_gen2_update_rate_mask,
  47. .report_connect = rtl8xxxu_gen2_report_connect,
  48. + .fill_txdesc = rtl8xxxu_fill_txdesc_v3,
  49. .writeN_block_size = 128,
  50. .rx_desc_size = sizeof(struct rtl8xxxu_rxdesc16),
  51. .tx_desc_size = sizeof(struct rtl8xxxu_txdesc32),
  52. --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
  53. +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
  54. @@ -4931,6 +4931,84 @@ rtl8xxxu_fill_txdesc_v2(struct ieee80211
  55. }
  56. }
  57. +/*
  58. + * Fill in v3 (gen1) specific TX descriptor bits.
  59. + * This format is a hybrid between the v1 and v2 formats, only seen
  60. + * on 8188eu devices so far.
  61. + */
  62. +void
  63. +rtl8xxxu_fill_txdesc_v3(struct ieee80211_hw *hw, struct ieee80211_hdr *hdr,
  64. + struct ieee80211_tx_info *tx_info,
  65. + struct rtl8xxxu_txdesc32 *tx_desc, bool sgi,
  66. + bool short_preamble, bool ampdu_enable, u32 rts_rate)
  67. +{
  68. + struct ieee80211_rate *tx_rate = ieee80211_get_tx_rate(hw, tx_info);
  69. + struct rtl8xxxu_priv *priv = hw->priv;
  70. + struct device *dev = &priv->udev->dev;
  71. + u32 rate;
  72. + u16 rate_flags = tx_info->control.rates[0].flags;
  73. + u16 seq_number;
  74. +
  75. + if (rate_flags & IEEE80211_TX_RC_MCS &&
  76. + !ieee80211_is_mgmt(hdr->frame_control))
  77. + rate = tx_info->control.rates[0].idx + DESC_RATE_MCS0;
  78. + else
  79. + rate = tx_rate->hw_value;
  80. +
  81. + if (rtl8xxxu_debug & RTL8XXXU_DEBUG_TX)
  82. + dev_info(dev, "%s: TX rate: %d, pkt size %d\n",
  83. + __func__, rate, cpu_to_le16(tx_desc->pkt_size));
  84. +
  85. + seq_number = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
  86. +
  87. + tx_desc->txdw5 = cpu_to_le32(rate);
  88. +
  89. + /*
  90. + * Data/RTS rate FB limit
  91. + */
  92. + if (ieee80211_is_data(hdr->frame_control))
  93. + tx_desc->txdw5 |= cpu_to_le32(0x0001ff00);
  94. +
  95. + tx_desc->txdw3 = cpu_to_le32((u32)seq_number << TXDESC32_SEQ_SHIFT);
  96. +
  97. + if (ampdu_enable)
  98. + tx_desc->txdw2 |= cpu_to_le32(TXDESC40_AGG_ENABLE);
  99. + else
  100. + tx_desc->txdw2 |= cpu_to_le32(TXDESC40_AGG_BREAK);
  101. +
  102. + if (ieee80211_is_mgmt(hdr->frame_control)) {
  103. + tx_desc->txdw5 = cpu_to_le32(rate);
  104. + tx_desc->txdw4 |= cpu_to_le32(TXDESC32_USE_DRIVER_RATE);
  105. + tx_desc->txdw5 |= cpu_to_le32(6 << TXDESC32_RETRY_LIMIT_SHIFT);
  106. + tx_desc->txdw5 |= cpu_to_le32(TXDESC32_RETRY_LIMIT_ENABLE);
  107. + }
  108. +
  109. + if (ieee80211_is_data_qos(hdr->frame_control))
  110. + tx_desc->txdw4 |= cpu_to_le32(TXDESC32_QOS);
  111. +
  112. + if (short_preamble)
  113. + tx_desc->txdw4 |= cpu_to_le32(TXDESC32_SHORT_PREAMBLE);
  114. +
  115. + if (sgi)
  116. + tx_desc->txdw5 |= cpu_to_le32(TXDESC32_SHORT_GI);
  117. +
  118. + /*
  119. + * rts_rate is zero if RTS/CTS or CTS to SELF are not enabled
  120. + */
  121. + tx_desc->txdw4 |= cpu_to_le32(rts_rate << TXDESC32_RTS_RATE_SHIFT);
  122. + if (rate_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  123. + tx_desc->txdw4 |= cpu_to_le32(TXDESC32_RTS_CTS_ENABLE);
  124. + tx_desc->txdw4 |= cpu_to_le32(TXDESC32_HW_RTS_ENABLE);
  125. + } else if (rate_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  126. + tx_desc->txdw4 |= cpu_to_le32(TXDESC32_CTS_SELF_ENABLE);
  127. + tx_desc->txdw4 |= cpu_to_le32(TXDESC32_HW_RTS_ENABLE);
  128. + }
  129. +
  130. + tx_desc->txdw2 |= cpu_to_le32(TXDESC_ANTENNA_SELECT_A |
  131. + TXDESC_ANTENNA_SELECT_B);
  132. + tx_desc->txdw7 |= cpu_to_le32(TXDESC_ANTENNA_SELECT_C);
  133. +}
  134. +
  135. static void rtl8xxxu_tx(struct ieee80211_hw *hw,
  136. struct ieee80211_tx_control *control,
  137. struct sk_buff *skb)