MZK-EX750NP.dts 2.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148
  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "ralink,mt7620a-soc";
  6. model = "Planex MZK-EX750NP";
  7. gpio-leds {
  8. compatible = "gpio-leds";
  9. power {
  10. label = "mzk-ex750np:red:power";
  11. gpios = <&gpio0 14 1>;
  12. };
  13. wifi {
  14. label = "mzk-ex750np:red:wifi";
  15. gpios = <&gpio3 0 1>;
  16. };
  17. wps {
  18. label = "mzk-ex750np:green:wps";
  19. gpios = <&gpio0 10 1>;
  20. };
  21. rep {
  22. label = "mzk-ex750np:blue:rep";
  23. gpios = <&gpio2 16 1>;
  24. };
  25. wifi1 {
  26. label = "mzk-ex750np:blue:wifi1";
  27. gpios = <&gpio2 19 1>;
  28. };
  29. wifi2 {
  30. label = "mzk-ex750np:blue:wifi2";
  31. gpios = <&gpio2 18 1>;
  32. };
  33. wifi3 {
  34. label = "mzk-ex750np:blue:wifi3";
  35. gpios = <&gpio2 17 1>;
  36. };
  37. };
  38. gpio-keys-polled {
  39. compatible = "gpio-keys-polled";
  40. #address-cells = <1>;
  41. #size-cells = <0>;
  42. poll-interval = <20>;
  43. reset {
  44. label = "reset";
  45. gpios = <&gpio0 9 1>;
  46. linux,code = <KEY_RESTART>;
  47. };
  48. wps {
  49. label = "wps";
  50. gpios = <&gpio0 13 0>;
  51. linux,code = <KEY_RFKILL>;
  52. };
  53. };
  54. };
  55. &gpio2 {
  56. status = "okay";
  57. };
  58. &gpio3 {
  59. status = "okay";
  60. };
  61. &spi0 {
  62. status = "okay";
  63. m25p80@0 {
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. compatible = "jedec,spi-nor";
  67. reg = <0>;
  68. spi-max-frequency = <10000000>;
  69. partition@0 {
  70. label = "u-boot";
  71. reg = <0x0 0x30000>;
  72. read-only;
  73. };
  74. partition@30000 {
  75. label = "u-boot-env";
  76. reg = <0x30000 0x10000>;
  77. read-only;
  78. };
  79. factory: partition@40000 {
  80. label = "factory";
  81. reg = <0x40000 0x10000>;
  82. read-only;
  83. };
  84. partition@50000 {
  85. label = "firmware";
  86. reg = <0x50000 0x730000>;
  87. };
  88. partition@780000 {
  89. label = "Udata";
  90. reg = <0x780000 0x80000>;
  91. };
  92. };
  93. };
  94. &pinctrl {
  95. state_default: pinctrl0 {
  96. gpio {
  97. ralink,group = "uartf", "nd_sd", "rgmii2", "wled";
  98. ralink,function = "gpio";
  99. };
  100. };
  101. };
  102. &ethernet {
  103. pinctrl-names = "default";
  104. pinctrl-0 = <&ephy_pins>;
  105. mtd-mac-address = <&factory 0x4>;
  106. mediatek,portmap = "llllw";
  107. };
  108. &wmac {
  109. ralink,mtd-eeprom = <&factory 0>;
  110. };
  111. &pcie {
  112. status = "okay";
  113. pcie-bridge {
  114. mt76@0,0 {
  115. reg = <0x0000 0 0 0 0>;
  116. device_type = "pci";
  117. mediatek,mtd-eeprom = <&factory 0x8000>;
  118. };
  119. };
  120. };