051-ARM-dts-armada-38x-add-buffer-manager-nodes.patch 1.5 KB

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  1. From: Marcin Wojtas <mw@semihalf.com>
  2. Date: Mon, 14 Mar 2016 09:38:57 +0100
  3. Subject: [PATCH] ARM: dts: armada-38x: add buffer manager nodes
  4. Armada 38x network controller supports hardware buffer management (BM).
  5. Since it is now enabled in mvneta driver, appropriate nodes can be added
  6. to armada-38x.dtsi - for the actual common BM unit (bm@c8000) and its
  7. internal SRAM (bm-bppi), which is used for indirect access to buffer
  8. pointer ring residing in DRAM.
  9. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
  10. parameters are supposed to be set in board files.
  11. Signed-off-by: Marcin Wojtas <mw@semihalf.com>
  12. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
  13. Signed-off-by: David S. Miller <davem@davemloft.net>
  14. ---
  15. --- a/arch/arm/boot/dts/armada-38x.dtsi
  16. +++ b/arch/arm/boot/dts/armada-38x.dtsi
  17. @@ -540,6 +540,14 @@
  18. status = "disabled";
  19. };
  20. + bm: bm@c8000 {
  21. + compatible = "marvell,armada-380-neta-bm";
  22. + reg = <0xc8000 0xac>;
  23. + clocks = <&gateclk 13>;
  24. + internal-mem = <&bm_bppi>;
  25. + status = "disabled";
  26. + };
  27. +
  28. sata@e0000 {
  29. compatible = "marvell,armada-380-ahci";
  30. reg = <0xe0000 0x2000>;
  31. @@ -618,6 +626,17 @@
  32. #size-cells = <1>;
  33. ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>;
  34. };
  35. +
  36. + bm_bppi: bm-bppi {
  37. + compatible = "mmio-sram";
  38. + reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
  39. + ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
  40. + #address-cells = <1>;
  41. + #size-cells = <1>;
  42. + clocks = <&gateclk 13>;
  43. + no-memory-wc;
  44. + status = "disabled";
  45. + };
  46. };
  47. clocks {