0033-soc-mediatek-PMIC-wrap-add-wrapper-callbacks-for-ini.patch 3.3 KB

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  1. From 756b919b7874cc241a276b4fc5bbec5b3fb4bca8 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Wed, 20 Jan 2016 05:27:17 +0100
  4. Subject: [PATCH 033/102] soc: mediatek: PMIC wrap: add wrapper callbacks for
  5. init_reg_clock
  6. Split init_reg_clock up into SoC specific callbacks. The patch also
  7. reorders the code to avoid the need for callback function prototypes.
  8. Signed-off-by: John Crispin <blogic@openwrt.org>
  9. ---
  10. drivers/soc/mediatek/mtk-pmic-wrap.c | 70 ++++++++++++++++++----------------
  11. 1 file changed, 38 insertions(+), 32 deletions(-)
  12. --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
  13. +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
  14. @@ -354,24 +354,6 @@ enum pwrap_type {
  15. PWRAP_MT8173,
  16. };
  17. -struct pmic_wrapper_type {
  18. - int *regs;
  19. - enum pwrap_type type;
  20. - u32 arb_en_all;
  21. -};
  22. -
  23. -static struct pmic_wrapper_type pwrap_mt8135 = {
  24. - .regs = mt8135_regs,
  25. - .type = PWRAP_MT8135,
  26. - .arb_en_all = 0x1ff,
  27. -};
  28. -
  29. -static struct pmic_wrapper_type pwrap_mt8173 = {
  30. - .regs = mt8173_regs,
  31. - .type = PWRAP_MT8173,
  32. - .arb_en_all = 0x3f,
  33. -};
  34. -
  35. struct pmic_wrapper {
  36. struct device *dev;
  37. void __iomem *base;
  38. @@ -385,6 +367,13 @@ struct pmic_wrapper {
  39. void __iomem *bridge_base;
  40. };
  41. +struct pmic_wrapper_type {
  42. + int *regs;
  43. + enum pwrap_type type;
  44. + u32 arb_en_all;
  45. + int (*init_reg_clock)(struct pmic_wrapper *wrp);
  46. +};
  47. +
  48. static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
  49. {
  50. return wrp->master->type == PWRAP_MT8135;
  51. @@ -578,20 +567,23 @@ static int pwrap_init_sidly(struct pmic_
  52. return 0;
  53. }
  54. -static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
  55. +static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp)
  56. {
  57. - if (pwrap_is_mt8135(wrp)) {
  58. - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
  59. - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
  60. - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
  61. - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
  62. - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
  63. - } else {
  64. - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
  65. - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
  66. - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
  67. - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
  68. - }
  69. + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
  70. + pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
  71. + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
  72. + pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
  73. + pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
  74. +
  75. + return 0;
  76. +}
  77. +
  78. +static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
  79. +{
  80. + pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
  81. + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
  82. + pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
  83. + pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
  84. return 0;
  85. }
  86. @@ -699,7 +691,7 @@ static int pwrap_init(struct pmic_wrappe
  87. pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
  88. - ret = pwrap_init_reg_clock(wrp);
  89. + ret = wrp->master->init_reg_clock(wrp);
  90. if (ret)
  91. return ret;
  92. @@ -814,6 +806,20 @@ static const struct regmap_config pwrap_
  93. .max_register = 0xffff,
  94. };
  95. +static struct pmic_wrapper_type pwrap_mt8135 = {
  96. + .regs = mt8135_regs,
  97. + .type = PWRAP_MT8135,
  98. + .arb_en_all = 0x1ff,
  99. + .init_reg_clock = pwrap_mt8135_init_reg_clock,
  100. +};
  101. +
  102. +static struct pmic_wrapper_type pwrap_mt8173 = {
  103. + .regs = mt8173_regs,
  104. + .type = PWRAP_MT8173,
  105. + .arb_en_all = 0x3f,
  106. + .init_reg_clock = pwrap_mt8173_init_reg_clock,
  107. +};
  108. +
  109. static struct of_device_id of_pwrap_match_tbl[] = {
  110. {
  111. .compatible = "mediatek,mt8135-pwrap",