8129-clk-qoriq-add-ls1046a-support.patch 2.2 KB

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  1. From 4fe33d4f4dc608fc5013390db58df06723282d01 Mon Sep 17 00:00:00 2001
  2. From: Mingkai Hu <mingkai.hu@nxp.com>
  3. Date: Thu, 2 Jun 2016 11:15:58 +0800
  4. Subject: [PATCH 129/141] clk: qoriq: add ls1046a support
  5. Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
  6. Integated-by: Yutang Jiang <yutang.jiang@nxp.com>
  7. ---
  8. drivers/clk/clk-qoriq.c | 41 +++++++++++++++++++++++++++++++++++++++++
  9. 1 file changed, 41 insertions(+)
  10. --- a/drivers/clk/clk-qoriq.c
  11. +++ b/drivers/clk/clk-qoriq.c
  12. @@ -275,6 +275,31 @@ static const struct clockgen_muxinfo ls1
  13. },
  14. };
  15. +static const struct clockgen_muxinfo ls1046a_hwa1 = {
  16. + {
  17. + {},
  18. + {},
  19. + { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
  20. + { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 },
  21. + { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
  22. + { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
  23. + { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
  24. + { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
  25. + },
  26. +};
  27. +
  28. +static const struct clockgen_muxinfo ls1046a_hwa2 = {
  29. + {
  30. + {},
  31. + { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
  32. + { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 },
  33. + { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 },
  34. + {},
  35. + {},
  36. + { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
  37. + },
  38. +};
  39. +
  40. static const struct clockgen_muxinfo t1023_hwa1 = {
  41. {
  42. {},
  43. @@ -508,6 +533,21 @@ static const struct clockgen_chipinfo ch
  44. .flags = CG_PLL_8BIT,
  45. },
  46. {
  47. + .compat = "fsl,ls1046a-clockgen",
  48. + .init_periph = t2080_init_periph,
  49. + .cmux_groups = {
  50. + &t1040_cmux
  51. + },
  52. + .hwaccel = {
  53. + &ls1046a_hwa1, &ls1046a_hwa2
  54. + },
  55. + .cmux_to_group = {
  56. + 0, -1
  57. + },
  58. + .pll_mask = 0x07,
  59. + .flags = CG_PLL_8BIT,
  60. + },
  61. + {
  62. .compat = "fsl,ls2080a-clockgen",
  63. .cmux_groups = {
  64. &clockgen2_cmux_cga12, &clockgen2_cmux_cgb
  65. @@ -1292,6 +1332,7 @@ CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qo
  66. CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
  67. CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
  68. CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
  69. +CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
  70. CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
  71. CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);