7015-fmd-add-fman-driver.patch 4.7 MB

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  1. From 9a69168a7ab58035571d9d19d531a40aa7f909dd Mon Sep 17 00:00:00 2001
  2. From: Zhao Qiang <qiang.zhao@nxp.com>
  3. Date: Wed, 16 Dec 2015 21:46:52 +0200
  4. Subject: [PATCH 15/70] fmd: add fman driver
  5. Add fman driver code of dpaa, put it to drivers/net/ethernet/freescale/sdk_fman.
  6. fman is frame manager, combining ethernet MACs with packet parsing and
  7. classification logic, providing intelligent distribution and queuing
  8. decisions for incomming traffic.
  9. Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
  10. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
  11. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  12. ---
  13. drivers/net/ethernet/freescale/Kconfig | 1 +
  14. drivers/net/ethernet/freescale/Makefile | 1 +
  15. drivers/net/ethernet/freescale/sdk_fman/Kconfig | 151 +
  16. drivers/net/ethernet/freescale/sdk_fman/Makefile | 11 +
  17. .../freescale/sdk_fman/Peripherals/FM/HC/Makefile | 15 +
  18. .../freescale/sdk_fman/Peripherals/FM/HC/hc.c | 1232 ++++
  19. .../freescale/sdk_fman/Peripherals/FM/MAC/Makefile | 28 +
  20. .../freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c | 1463 ++++
  21. .../freescale/sdk_fman/Peripherals/FM/MAC/dtsec.h | 228 +
  22. .../sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.c | 97 +
  23. .../sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.h | 42 +
  24. .../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c | 646 ++
  25. .../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h | 224 +
  26. .../sdk_fman/Peripherals/FM/MAC/fman_crc32.c | 119 +
  27. .../sdk_fman/Peripherals/FM/MAC/fman_crc32.h | 43 +
  28. .../sdk_fman/Peripherals/FM/MAC/fman_dtsec.c | 845 +++
  29. .../Peripherals/FM/MAC/fman_dtsec_mii_acc.c | 163 +
  30. .../sdk_fman/Peripherals/FM/MAC/fman_memac.c | 511 ++
  31. .../Peripherals/FM/MAC/fman_memac_mii_acc.c | 213 +
  32. .../sdk_fman/Peripherals/FM/MAC/fman_tgec.c | 367 +
  33. .../freescale/sdk_fman/Peripherals/FM/MAC/memac.c | 1088 +++
  34. .../freescale/sdk_fman/Peripherals/FM/MAC/memac.h | 110 +
  35. .../sdk_fman/Peripherals/FM/MAC/memac_mii_acc.c | 78 +
  36. .../sdk_fman/Peripherals/FM/MAC/memac_mii_acc.h | 73 +
  37. .../freescale/sdk_fman/Peripherals/FM/MAC/tgec.c | 974 +++
  38. .../freescale/sdk_fman/Peripherals/FM/MAC/tgec.h | 151 +
  39. .../sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.c | 139 +
  40. .../sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.h | 80 +
  41. .../sdk_fman/Peripherals/FM/MACSEC/Makefile | 15 +
  42. .../sdk_fman/Peripherals/FM/MACSEC/fm_macsec.c | 237 +
  43. .../sdk_fman/Peripherals/FM/MACSEC/fm_macsec.h | 203 +
  44. .../Peripherals/FM/MACSEC/fm_macsec_guest.c | 59 +
  45. .../Peripherals/FM/MACSEC/fm_macsec_master.c | 1031 +++
  46. .../Peripherals/FM/MACSEC/fm_macsec_master.h | 479 ++
  47. .../Peripherals/FM/MACSEC/fm_macsec_secy.c | 883 +++
  48. .../Peripherals/FM/MACSEC/fm_macsec_secy.h | 144 +
  49. .../freescale/sdk_fman/Peripherals/FM/Makefile | 23 +
  50. .../freescale/sdk_fman/Peripherals/FM/Pcd/Makefile | 26 +
  51. .../freescale/sdk_fman/Peripherals/FM/Pcd/crc64.h | 360 +
  52. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c | 7538 ++++++++++++++++++++
  53. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.h | 399 ++
  54. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c | 3242 +++++++++
  55. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.h | 206 +
  56. .../sdk_fman/Peripherals/FM/Pcd/fm_manip.c | 5571 +++++++++++++++
  57. .../sdk_fman/Peripherals/FM/Pcd/fm_manip.h | 555 ++
  58. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.c | 2094 ++++++
  59. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.h | 543 ++
  60. .../sdk_fman/Peripherals/FM/Pcd/fm_pcd_ipc.h | 280 +
  61. .../sdk_fman/Peripherals/FM/Pcd/fm_plcr.c | 1846 +++++
  62. .../sdk_fman/Peripherals/FM/Pcd/fm_plcr.h | 165 +
  63. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.c | 422 ++
  64. .../freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.h | 316 +
  65. .../sdk_fman/Peripherals/FM/Pcd/fm_replic.c | 984 +++
  66. .../sdk_fman/Peripherals/FM/Pcd/fm_replic.h | 101 +
  67. .../sdk_fman/Peripherals/FM/Pcd/fman_kg.c | 888 +++
  68. .../sdk_fman/Peripherals/FM/Pcd/fman_prs.c | 129 +
  69. .../sdk_fman/Peripherals/FM/Port/Makefile | 15 +
  70. .../sdk_fman/Peripherals/FM/Port/fm_port.c | 6436 +++++++++++++++++
  71. .../sdk_fman/Peripherals/FM/Port/fm_port.h | 999 +++
  72. .../sdk_fman/Peripherals/FM/Port/fm_port_dsar.h | 494 ++
  73. .../sdk_fman/Peripherals/FM/Port/fm_port_im.c | 753 ++
  74. .../sdk_fman/Peripherals/FM/Port/fman_port.c | 1568 ++++
  75. .../freescale/sdk_fman/Peripherals/FM/Rtc/Makefile | 15 +
  76. .../freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.c | 692 ++
  77. .../freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.h | 96 +
  78. .../sdk_fman/Peripherals/FM/Rtc/fman_rtc.c | 334 +
  79. .../freescale/sdk_fman/Peripherals/FM/SP/Makefile | 15 +
  80. .../freescale/sdk_fman/Peripherals/FM/SP/fm_sp.c | 757 ++
  81. .../freescale/sdk_fman/Peripherals/FM/SP/fm_sp.h | 85 +
  82. .../freescale/sdk_fman/Peripherals/FM/SP/fman_sp.c | 197 +
  83. .../freescale/sdk_fman/Peripherals/FM/fm.c | 5195 ++++++++++++++
  84. .../freescale/sdk_fman/Peripherals/FM/fm.h | 646 ++
  85. .../freescale/sdk_fman/Peripherals/FM/fm_ipc.h | 465 ++
  86. .../freescale/sdk_fman/Peripherals/FM/fm_muram.c | 174 +
  87. .../freescale/sdk_fman/Peripherals/FM/fman.c | 1399 ++++
  88. .../sdk_fman/Peripherals/FM/inc/fm_common.h | 1203 ++++
  89. .../freescale/sdk_fman/Peripherals/FM/inc/fm_hc.h | 93 +
  90. .../sdk_fman/Peripherals/FM/inc/fm_sp_common.h | 117 +
  91. .../net/ethernet/freescale/sdk_fman/etc/Makefile | 12 +
  92. .../net/ethernet/freescale/sdk_fman/etc/error.c | 95 +
  93. drivers/net/ethernet/freescale/sdk_fman/etc/list.c | 71 +
  94. .../net/ethernet/freescale/sdk_fman/etc/memcpy.c | 620 ++
  95. drivers/net/ethernet/freescale/sdk_fman/etc/mm.c | 1155 +++
  96. drivers/net/ethernet/freescale/sdk_fman/etc/mm.h | 105 +
  97. .../net/ethernet/freescale/sdk_fman/etc/sprint.c | 81 +
  98. .../ethernet/freescale/sdk_fman/fmanv3h_dflags.h | 57 +
  99. .../ethernet/freescale/sdk_fman/fmanv3l_dflags.h | 56 +
  100. .../sdk_fman/inc/Peripherals/crc_mac_addr_ext.h | 364 +
  101. .../freescale/sdk_fman/inc/Peripherals/dpaa_ext.h | 207 +
  102. .../freescale/sdk_fman/inc/Peripherals/fm_ext.h | 1705 +++++
  103. .../sdk_fman/inc/Peripherals/fm_mac_ext.h | 846 +++
  104. .../sdk_fman/inc/Peripherals/fm_macsec_ext.h | 1271 ++++
  105. .../sdk_fman/inc/Peripherals/fm_muram_ext.h | 170 +
  106. .../sdk_fman/inc/Peripherals/fm_pcd_ext.h | 3974 +++++++++++
  107. .../sdk_fman/inc/Peripherals/fm_port_ext.h | 2608 +++++++
  108. .../sdk_fman/inc/Peripherals/fm_rtc_ext.h | 619 ++
  109. .../sdk_fman/inc/Peripherals/fm_vsp_ext.h | 411 ++
  110. .../sdk_fman/inc/Peripherals/mii_acc_ext.h | 76 +
  111. .../net/ethernet/freescale/sdk_fman/inc/core_ext.h | 90 +
  112. .../freescale/sdk_fman/inc/cores/arm_ext.h | 55 +
  113. .../freescale/sdk_fman/inc/cores/e500v2_ext.h | 476 ++
  114. .../freescale/sdk_fman/inc/cores/ppc_ext.h | 141 +
  115. .../ethernet/freescale/sdk_fman/inc/ddr_std_ext.h | 77 +
  116. .../ethernet/freescale/sdk_fman/inc/debug_ext.h | 233 +
  117. .../ethernet/freescale/sdk_fman/inc/endian_ext.h | 447 ++
  118. .../net/ethernet/freescale/sdk_fman/inc/enet_ext.h | 205 +
  119. .../ethernet/freescale/sdk_fman/inc/error_ext.h | 529 ++
  120. .../ethernet/freescale/sdk_fman/inc/etc/list_ext.h | 358 +
  121. .../ethernet/freescale/sdk_fman/inc/etc/mem_ext.h | 318 +
  122. .../freescale/sdk_fman/inc/etc/memcpy_ext.h | 208 +
  123. .../ethernet/freescale/sdk_fman/inc/etc/mm_ext.h | 310 +
  124. .../freescale/sdk_fman/inc/etc/sprint_ext.h | 118 +
  125. .../sdk_fman/inc/flib/common/arch/ppc_access.h | 37 +
  126. .../freescale/sdk_fman/inc/flib/common/general.h | 52 +
  127. .../freescale/sdk_fman/inc/flib/fman_common.h | 78 +
  128. .../freescale/sdk_fman/inc/flib/fsl_enet.h | 273 +
  129. .../freescale/sdk_fman/inc/flib/fsl_fman.h | 825 +++
  130. .../freescale/sdk_fman/inc/flib/fsl_fman_dtsec.h | 1096 +++
  131. .../sdk_fman/inc/flib/fsl_fman_dtsec_mii_acc.h | 107 +
  132. .../freescale/sdk_fman/inc/flib/fsl_fman_kg.h | 514 ++
  133. .../freescale/sdk_fman/inc/flib/fsl_fman_memac.h | 427 ++
  134. .../sdk_fman/inc/flib/fsl_fman_memac_mii_acc.h | 78 +
  135. .../freescale/sdk_fman/inc/flib/fsl_fman_port.h | 593 ++
  136. .../freescale/sdk_fman/inc/flib/fsl_fman_prs.h | 102 +
  137. .../freescale/sdk_fman/inc/flib/fsl_fman_rtc.h | 449 ++
  138. .../freescale/sdk_fman/inc/flib/fsl_fman_sp.h | 138 +
  139. .../freescale/sdk_fman/inc/flib/fsl_fman_tgec.h | 479 ++
  140. .../integrations/FMANV3H/dpaa_integration_ext.h | 290 +
  141. .../sdk_fman/inc/integrations/FMANV3H/part_ext.h | 71 +
  142. .../integrations/FMANV3H/part_integration_ext.h | 304 +
  143. .../integrations/FMANV3L/dpaa_integration_ext.h | 292 +
  144. .../sdk_fman/inc/integrations/FMANV3L/part_ext.h | 59 +
  145. .../integrations/FMANV3L/part_integration_ext.h | 304 +
  146. .../inc/integrations/LS1043/dpaa_integration_ext.h | 291 +
  147. .../sdk_fman/inc/integrations/LS1043/part_ext.h | 64 +
  148. .../inc/integrations/LS1043/part_integration_ext.h | 185 +
  149. .../inc/integrations/P1023/dpaa_integration_ext.h | 213 +
  150. .../sdk_fman/inc/integrations/P1023/part_ext.h | 82 +
  151. .../inc/integrations/P1023/part_integration_ext.h | 635 ++
  152. .../P3040_P4080_P5020/dpaa_integration_ext.h | 276 +
  153. .../inc/integrations/P3040_P4080_P5020/part_ext.h | 83 +
  154. .../P3040_P4080_P5020/part_integration_ext.h | 336 +
  155. .../net/ethernet/freescale/sdk_fman/inc/math_ext.h | 99 +
  156. .../net/ethernet/freescale/sdk_fman/inc/ncsw_ext.h | 435 ++
  157. .../net/ethernet/freescale/sdk_fman/inc/net_ext.h | 430 ++
  158. .../net/ethernet/freescale/sdk_fman/inc/std_ext.h | 48 +
  159. .../ethernet/freescale/sdk_fman/inc/stdarg_ext.h | 49 +
  160. .../ethernet/freescale/sdk_fman/inc/stdlib_ext.h | 162 +
  161. .../ethernet/freescale/sdk_fman/inc/string_ext.h | 56 +
  162. .../ethernet/freescale/sdk_fman/inc/types_ext.h | 62 +
  163. .../ethernet/freescale/sdk_fman/inc/xx_common.h | 56 +
  164. .../net/ethernet/freescale/sdk_fman/inc/xx_ext.h | 791 ++
  165. .../ethernet/freescale/sdk_fman/ls1043_dflags.h | 56 +
  166. .../net/ethernet/freescale/sdk_fman/ncsw_config.mk | 53 +
  167. .../net/ethernet/freescale/sdk_fman/p1023_dflags.h | 65 +
  168. .../freescale/sdk_fman/p3040_4080_5020_dflags.h | 62 +
  169. .../net/ethernet/freescale/sdk_fman/src/Makefile | 11 +
  170. .../freescale/sdk_fman/src/inc/system/sys_ext.h | 118 +
  171. .../freescale/sdk_fman/src/inc/system/sys_io_ext.h | 46 +
  172. .../freescale/sdk_fman/src/inc/types_linux.h | 208 +
  173. .../sdk_fman/src/inc/wrapper/fsl_fman_test.h | 84 +
  174. .../sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h | 127 +
  175. .../sdk_fman/src/inc/wrapper/lnxwrp_fm_ext.h | 163 +
  176. .../sdk_fman/src/inc/wrapper/lnxwrp_fsl_fman.h | 919 +++
  177. .../ethernet/freescale/sdk_fman/src/inc/xx/xx.h | 50 +
  178. .../freescale/sdk_fman/src/system/Makefile | 10 +
  179. .../freescale/sdk_fman/src/system/sys_io.c | 171 +
  180. .../freescale/sdk_fman/src/wrapper/Makefile | 19 +
  181. .../freescale/sdk_fman/src/wrapper/fman_test.c | 1665 +++++
  182. .../freescale/sdk_fman/src/wrapper/lnxwrp_fm.c | 2795 ++++++++
  183. .../freescale/sdk_fman/src/wrapper/lnxwrp_fm.h | 294 +
  184. .../sdk_fman/src/wrapper/lnxwrp_fm_port.c | 1507 ++++
  185. .../sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c | 4813 +++++++++++++
  186. .../sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c | 1300 ++++
  187. .../sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.h | 755 ++
  188. .../sdk_fman/src/wrapper/lnxwrp_resources.h | 121 +
  189. .../sdk_fman/src/wrapper/lnxwrp_resources_ut.c | 191 +
  190. .../sdk_fman/src/wrapper/lnxwrp_resources_ut.h | 144 +
  191. .../sdk_fman/src/wrapper/lnxwrp_resources_ut.make | 28 +
  192. .../freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.c | 60 +
  193. .../freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.h | 60 +
  194. .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c | 1855 +++++
  195. .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm.h | 136 +
  196. .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.c | 1255 ++++
  197. .../sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.h | 56 +
  198. .../ethernet/freescale/sdk_fman/src/xx/Makefile | 18 +
  199. .../freescale/sdk_fman/src/xx/module_strings.c | 45 +
  200. .../ethernet/freescale/sdk_fman/src/xx/udivdi3.c | 132 +
  201. .../freescale/sdk_fman/src/xx/xx_arm_linux.c | 905 +++
  202. .../ethernet/freescale/sdk_fman/src/xx/xx_linux.c | 918 +++
  203. include/uapi/linux/fmd/Kbuild | 5 +
  204. include/uapi/linux/fmd/Peripherals/Kbuild | 4 +
  205. include/uapi/linux/fmd/Peripherals/fm_ioctls.h | 628 ++
  206. include/uapi/linux/fmd/Peripherals/fm_pcd_ioctls.h | 3084 ++++++++
  207. .../uapi/linux/fmd/Peripherals/fm_port_ioctls.h | 948 +++
  208. .../uapi/linux/fmd/Peripherals/fm_test_ioctls.h | 208 +
  209. include/uapi/linux/fmd/integrations/Kbuild | 1 +
  210. .../linux/fmd/integrations/integration_ioctls.h | 56 +
  211. include/uapi/linux/fmd/ioctls.h | 96 +
  212. include/uapi/linux/fmd/net_ioctls.h | 430 ++
  213. 200 files changed, 115244 insertions(+)
  214. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Kconfig
  215. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Makefile
  216. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/Makefile
  217. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/hc.c
  218. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/Makefile
  219. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c
  220. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.h
  221. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.c
  222. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.h
  223. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c
  224. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h
  225. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.c
  226. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.h
  227. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec.c
  228. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec_mii_acc.c
  229. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac.c
  230. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac_mii_acc.c
  231. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_tgec.c
  232. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c
  233. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.h
  234. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.c
  235. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.h
  236. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.c
  237. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.h
  238. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.c
  239. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.h
  240. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/Makefile
  241. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.c
  242. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.h
  243. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_guest.c
  244. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.c
  245. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.h
  246. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.c
  247. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.h
  248. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Makefile
  249. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/Makefile
  250. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/crc64.h
  251. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c
  252. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.h
  253. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c
  254. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.h
  255. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.c
  256. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.h
  257. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.c
  258. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.h
  259. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd_ipc.h
  260. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.c
  261. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.h
  262. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.c
  263. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.h
  264. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.c
  265. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.h
  266. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_kg.c
  267. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_prs.c
  268. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/Makefile
  269. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c
  270. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.h
  271. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_dsar.h
  272. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_im.c
  273. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fman_port.c
  274. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/Makefile
  275. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.c
  276. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.h
  277. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fman_rtc.c
  278. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/Makefile
  279. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.c
  280. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.h
  281. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fman_sp.c
  282. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.c
  283. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.h
  284. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_ipc.h
  285. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_muram.c
  286. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fman.c
  287. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_common.h
  288. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_hc.h
  289. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_sp_common.h
  290. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/Makefile
  291. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/error.c
  292. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/list.c
  293. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/memcpy.c
  294. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/mm.c
  295. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/mm.h
  296. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/etc/sprint.c
  297. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/fmanv3h_dflags.h
  298. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/fmanv3l_dflags.h
  299. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/crc_mac_addr_ext.h
  300. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/dpaa_ext.h
  301. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_ext.h
  302. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_mac_ext.h
  303. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_macsec_ext.h
  304. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_muram_ext.h
  305. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_pcd_ext.h
  306. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_port_ext.h
  307. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_rtc_ext.h
  308. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_vsp_ext.h
  309. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/mii_acc_ext.h
  310. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/core_ext.h
  311. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/cores/arm_ext.h
  312. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/cores/e500v2_ext.h
  313. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/cores/ppc_ext.h
  314. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/ddr_std_ext.h
  315. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/debug_ext.h
  316. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/endian_ext.h
  317. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/enet_ext.h
  318. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/error_ext.h
  319. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/list_ext.h
  320. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/mem_ext.h
  321. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/memcpy_ext.h
  322. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/mm_ext.h
  323. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/etc/sprint_ext.h
  324. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/arch/ppc_access.h
  325. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/general.h
  326. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fman_common.h
  327. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_enet.h
  328. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman.h
  329. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec.h
  330. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec_mii_acc.h
  331. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_kg.h
  332. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac.h
  333. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac_mii_acc.h
  334. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_port.h
  335. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_prs.h
  336. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_rtc.h
  337. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_sp.h
  338. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_tgec.h
  339. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/dpaa_integration_ext.h
  340. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_ext.h
  341. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_integration_ext.h
  342. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/dpaa_integration_ext.h
  343. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_ext.h
  344. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_integration_ext.h
  345. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/dpaa_integration_ext.h
  346. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_ext.h
  347. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_integration_ext.h
  348. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/dpaa_integration_ext.h
  349. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_ext.h
  350. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_integration_ext.h
  351. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/dpaa_integration_ext.h
  352. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_ext.h
  353. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_integration_ext.h
  354. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/math_ext.h
  355. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/ncsw_ext.h
  356. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/net_ext.h
  357. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/std_ext.h
  358. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/stdarg_ext.h
  359. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/stdlib_ext.h
  360. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/string_ext.h
  361. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/types_ext.h
  362. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/xx_common.h
  363. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/inc/xx_ext.h
  364. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/ls1043_dflags.h
  365. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  366. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/p1023_dflags.h
  367. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/p3040_4080_5020_dflags.h
  368. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/Makefile
  369. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_ext.h
  370. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_io_ext.h
  371. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/types_linux.h
  372. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/fsl_fman_test.h
  373. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h
  374. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fm_ext.h
  375. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fsl_fman.h
  376. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/inc/xx/xx.h
  377. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/system/Makefile
  378. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/system/sys_io.c
  379. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/Makefile
  380. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/fman_test.c
  381. create mode 100755 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.c
  382. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.h
  383. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm_port.c
  384. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c
  385. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c
  386. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.h
  387. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources.h
  388. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.c
  389. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.h
  390. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.make
  391. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.c
  392. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.h
  393. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c
  394. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.h
  395. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.c
  396. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.h
  397. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/Makefile
  398. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/module_strings.c
  399. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/udivdi3.c
  400. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_arm_linux.c
  401. create mode 100644 drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_linux.c
  402. create mode 100644 include/uapi/linux/fmd/Kbuild
  403. create mode 100644 include/uapi/linux/fmd/Peripherals/Kbuild
  404. create mode 100644 include/uapi/linux/fmd/Peripherals/fm_ioctls.h
  405. create mode 100644 include/uapi/linux/fmd/Peripherals/fm_pcd_ioctls.h
  406. create mode 100644 include/uapi/linux/fmd/Peripherals/fm_port_ioctls.h
  407. create mode 100644 include/uapi/linux/fmd/Peripherals/fm_test_ioctls.h
  408. create mode 100644 include/uapi/linux/fmd/integrations/Kbuild
  409. create mode 100644 include/uapi/linux/fmd/integrations/integration_ioctls.h
  410. create mode 100644 include/uapi/linux/fmd/ioctls.h
  411. create mode 100644 include/uapi/linux/fmd/net_ioctls.h
  412. --- a/drivers/net/ethernet/freescale/Kconfig
  413. +++ b/drivers/net/ethernet/freescale/Kconfig
  414. @@ -92,4 +92,5 @@ config GIANFAR
  415. and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
  416. on the 8540.
  417. +source "drivers/net/ethernet/freescale/sdk_fman/Kconfig"
  418. endif # NET_VENDOR_FREESCALE
  419. --- a/drivers/net/ethernet/freescale/Makefile
  420. +++ b/drivers/net/ethernet/freescale/Makefile
  421. @@ -17,3 +17,4 @@ gianfar_driver-objs := gianfar.o \
  422. gianfar_ethtool.o
  423. obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
  424. ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o
  425. +obj-$(if $(CONFIG_FSL_SDK_FMAN),y) += sdk_fman/
  426. --- /dev/null
  427. +++ b/drivers/net/ethernet/freescale/sdk_fman/Kconfig
  428. @@ -0,0 +1,151 @@
  429. +menu "Frame Manager support"
  430. +
  431. +menuconfig FSL_SDK_FMAN
  432. + bool "Freescale Frame Manager (datapath) support - SDK driver"
  433. + depends on (FSL_SOC || ARM64 || ARM) && FSL_BMAN && FSL_QMAN
  434. + default y
  435. + ---help---
  436. + If unsure, say Y.
  437. +
  438. +if FSL_SDK_FMAN
  439. +
  440. +config FSL_SDK_FMAN_TEST
  441. + bool "FMan test module"
  442. + default n
  443. + select FSL_DPAA_HOOKS
  444. + ---help---
  445. + This option compiles test code for FMan.
  446. +
  447. +menu "FMAN Processor support"
  448. +choice
  449. + depends on FSL_SDK_FMAN
  450. + prompt "Processor Type"
  451. +
  452. +config FMAN_ARM
  453. + bool "LS1043"
  454. + depends on ARM64 || ARM
  455. + ---help---
  456. + Choose "LS1043" for the ARM platforms:
  457. + LS1043
  458. +
  459. +config FMAN_P3040_P4080_P5020
  460. + bool "P3040 P4080 5020"
  461. +
  462. +config FMAN_P1023
  463. + bool "P1023"
  464. +
  465. +config FMAN_V3H
  466. + bool "FmanV3H"
  467. + ---help---
  468. + Choose "FmanV3H" for Fman rev3H:
  469. + B4860, T4240, T4160, etc
  470. +
  471. +config FMAN_V3L
  472. + bool "FmanV3L"
  473. + ---help---
  474. + Choose "FmanV3L" for Fman rev3L:
  475. + T1040, T1042, T1020, T1022, T1023, T1024, etc
  476. +
  477. +endchoice
  478. +endmenu
  479. +
  480. +config FMAN_MIB_CNT_OVF_IRQ_EN
  481. + bool "Enable the dTSEC MIB counters overflow interrupt"
  482. + default n
  483. + ---help---
  484. + Enable the dTSEC MIB counters overflow interrupt to get
  485. + accurate MIB counters values. Enabled it compensates
  486. + for the counters overflow but reduces performance and
  487. + triggers error messages in HV setups.
  488. +
  489. +config FSL_FM_MAX_FRAME_SIZE
  490. + int "Maximum L2 frame size"
  491. + depends on FSL_SDK_FMAN
  492. + range 64 9600
  493. + default "1522"
  494. + help
  495. + Configure this in relation to the maximum possible MTU of your
  496. + network configuration. In particular, one would need to
  497. + increase this value in order to use jumbo frames.
  498. + FSL_FM_MAX_FRAME_SIZE must accommodate the Ethernet FCS (4 bytes)
  499. + and one ETH+VLAN header (18 bytes), to a total of 22 bytes in
  500. + excess of the desired L3 MTU.
  501. +
  502. + Note that having too large a FSL_FM_MAX_FRAME_SIZE (much larger
  503. + than the actual MTU) may lead to buffer exhaustion, especially
  504. + in the case of badly fragmented datagrams on the Rx path.
  505. + Conversely, having a FSL_FM_MAX_FRAME_SIZE smaller than the actual
  506. + MTU will lead to frames being dropped.
  507. +
  508. + This can be overridden by specifying "fsl_fm_max_frm" in
  509. + the kernel bootargs:
  510. + * in Hypervisor-based scenarios, by adding a "chosen" node
  511. + with the "bootargs" property specifying
  512. + "fsl_fm_max_frm=<YourValue>";
  513. + * in non-Hypervisor-based scenarios, via u-boot's env, by
  514. + modifying the "bootargs" env variable.
  515. +
  516. +config FSL_FM_RX_EXTRA_HEADROOM
  517. + int "Add extra headroom at beginning of data buffers"
  518. + depends on FSL_SDK_FMAN
  519. + range 16 384
  520. + default "64"
  521. + help
  522. + Configure this to tell the Frame Manager to reserve some extra
  523. + space at the beginning of a data buffer on the receive path,
  524. + before Internal Context fields are copied. This is in addition
  525. + to the private data area already reserved for driver internal
  526. + use. The provided value must be a multiple of 16.
  527. +
  528. + This setting can be overridden by specifying
  529. + "fsl_fm_rx_extra_headroom" in the kernel bootargs:
  530. + * in Hypervisor-based scenarios, by adding a "chosen" node
  531. + with the "bootargs" property specifying
  532. + "fsl_fm_rx_extra_headroom=<YourValue>";
  533. + * in non-Hypervisor-based scenarios, via u-boot's env, by
  534. + modifying the "bootargs" env variable.
  535. +
  536. +config FMAN_PFC
  537. + bool "FMan PFC support (EXPERIMENTAL)"
  538. + depends on ( FMAN_V3H || FMAN_V3L || FMAN_ARM) && FSL_SDK_FMAN
  539. + default n
  540. + ---help---
  541. + This option enables PFC support on FMan v3 ports.
  542. + Data Center Bridging defines Classes of Service that are
  543. + flow-controlled using PFC pause frames.
  544. +
  545. +if FMAN_PFC
  546. +config FMAN_PFC_COS_COUNT
  547. + int "Number of PFC Classes of Service"
  548. + depends on FMAN_PFC && FSL_SDK_FMAN
  549. + range 1 4
  550. + default "3"
  551. +
  552. +config FMAN_PFC_QUANTA_0
  553. + int "The pause quanta for PFC CoS 0"
  554. + depends on FMAN_PFC && FSL_SDK_FMAN
  555. + range 0 65535
  556. + default "65535"
  557. +
  558. +config FMAN_PFC_QUANTA_1
  559. + int "The pause quanta for PFC CoS 1"
  560. + depends on FMAN_PFC && FSL_SDK_FMAN
  561. + range 0 65535
  562. + default "65535"
  563. +
  564. +config FMAN_PFC_QUANTA_2
  565. + int "The pause quanta for PFC CoS 2"
  566. + depends on FMAN_PFC && FSL_SDK_FMAN
  567. + range 0 65535
  568. + default "65535"
  569. +
  570. +config FMAN_PFC_QUANTA_3
  571. + int "The pause quanta for PFC CoS 3"
  572. + depends on FMAN_PFC && FSL_SDK_FMAN
  573. + range 0 65535
  574. + default "65535"
  575. +endif
  576. +
  577. +endif # FSL_SDK_FMAN
  578. +
  579. +endmenu
  580. --- /dev/null
  581. +++ b/drivers/net/ethernet/freescale/sdk_fman/Makefile
  582. @@ -0,0 +1,11 @@
  583. +#
  584. +# Makefile for the Freescale Ethernet controllers
  585. +#
  586. +ccflags-y += -DVERSION=\"\"
  587. +#
  588. +#Include netcomm SW specific definitions
  589. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  590. +#
  591. +obj-y += etc/
  592. +obj-y += Peripherals/FM/
  593. +obj-y += src/
  594. --- /dev/null
  595. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/Makefile
  596. @@ -0,0 +1,15 @@
  597. +#
  598. +# Makefile for the Freescale Ethernet controllers
  599. +#
  600. +ccflags-y += -DVERSION=\"\"
  601. +#
  602. +#Include netcomm SW specific definitions
  603. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  604. +
  605. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  606. +
  607. +ccflags-y += -I$(NCSW_FM_INC)
  608. +
  609. +obj-y += fsl-ncsw-Hc.o
  610. +
  611. +fsl-ncsw-Hc-objs := hc.o
  612. --- /dev/null
  613. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/HC/hc.c
  614. @@ -0,0 +1,1232 @@
  615. +/*
  616. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  617. + *
  618. + * Redistribution and use in source and binary forms, with or without
  619. + * modification, are permitted provided that the following conditions are met:
  620. + * * Redistributions of source code must retain the above copyright
  621. + * notice, this list of conditions and the following disclaimer.
  622. + * * Redistributions in binary form must reproduce the above copyright
  623. + * notice, this list of conditions and the following disclaimer in the
  624. + * documentation and/or other materials provided with the distribution.
  625. + * * Neither the name of Freescale Semiconductor nor the
  626. + * names of its contributors may be used to endorse or promote products
  627. + * derived from this software without specific prior written permission.
  628. + *
  629. + *
  630. + * ALTERNATIVELY, this software may be distributed under the terms of the
  631. + * GNU General Public License ("GPL") as published by the Free Software
  632. + * Foundation, either version 2 of that License or (at your option) any
  633. + * later version.
  634. + *
  635. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  636. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  637. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  638. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  639. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  640. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  641. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  642. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  643. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  644. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  645. + */
  646. +
  647. +
  648. +#include "std_ext.h"
  649. +#include "error_ext.h"
  650. +#include "sprint_ext.h"
  651. +#include "string_ext.h"
  652. +
  653. +#include "fm_common.h"
  654. +#include "fm_hc.h"
  655. +
  656. +
  657. +/**************************************************************************//**
  658. + @Description defaults
  659. +*//***************************************************************************/
  660. +#define DEFAULT_dataMemId 0
  661. +
  662. +#define HC_HCOR_OPCODE_PLCR_PRFL 0x0
  663. +#define HC_HCOR_OPCODE_KG_SCM 0x1
  664. +#define HC_HCOR_OPCODE_SYNC 0x2
  665. +#define HC_HCOR_OPCODE_CC 0x3
  666. +#define HC_HCOR_OPCODE_CC_AGE_MASK 0x4
  667. +#define HC_HCOR_OPCODE_CC_CAPWAP_REASSM_TIMEOUT 0x5
  668. +#define HC_HCOR_OPCODE_CC_REASSM_TIMEOUT 0x10
  669. +#define HC_HCOR_OPCODE_CC_IP_FRAG_INITIALIZATION 0x11
  670. +#define HC_HCOR_OPCODE_CC_UPDATE_WITH_AGING 0x13
  671. +#define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_ACTIVE_SHIFT 24
  672. +#define HC_HCOR_EXTRA_REG_REASSM_TIMEOUT_TSBS_SHIFT 24
  673. +#define HC_HCOR_EXTRA_REG_CC_AGING_ADD 0x80000000
  674. +#define HC_HCOR_EXTRA_REG_CC_AGING_REMOVE 0x40000000
  675. +#define HC_HCOR_EXTRA_REG_CC_AGING_CHANGE_MASK 0xC0000000
  676. +#define HC_HCOR_EXTRA_REG_CC_REMOVE_INDX_SHIFT 24
  677. +#define HC_HCOR_EXTRA_REG_CC_REMOVE_INDX_MASK 0x1F000000
  678. +#define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_SHIFT 16
  679. +#define HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_MASK 0xF
  680. +#define HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_CMD_SHIFT 24
  681. +#define HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_BPID 16
  682. +
  683. +#define HC_HCOR_GBL 0x20000000
  684. +
  685. +#define HC_HCOR_KG_SCHEME_COUNTER 0x00000400
  686. +
  687. +#if (DPAA_VERSION == 10)
  688. +#define HC_HCOR_KG_SCHEME_REGS_MASK 0xFFFFF800
  689. +#else
  690. +#define HC_HCOR_KG_SCHEME_REGS_MASK 0xFFFFFE00
  691. +#endif /* (DPAA_VERSION == 10) */
  692. +
  693. +#define SIZE_OF_HC_FRAME_PORT_REGS (sizeof(t_HcFrame)-sizeof(struct fman_kg_scheme_regs)+sizeof(t_FmPcdKgPortRegs))
  694. +#define SIZE_OF_HC_FRAME_SCHEME_REGS sizeof(t_HcFrame)
  695. +#define SIZE_OF_HC_FRAME_PROFILES_REGS (sizeof(t_HcFrame)-sizeof(struct fman_kg_scheme_regs)+sizeof(t_FmPcdPlcrProfileRegs))
  696. +#define SIZE_OF_HC_FRAME_PROFILE_CNT (sizeof(t_HcFrame)-sizeof(t_FmPcdPlcrProfileRegs)+sizeof(uint32_t))
  697. +#define SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC 16
  698. +
  699. +#define HC_CMD_POOL_SIZE (INTG_MAX_NUM_OF_CORES)
  700. +
  701. +#define BUILD_FD(len) \
  702. +do { \
  703. + memset(&fmFd, 0, sizeof(t_DpaaFD)); \
  704. + DPAA_FD_SET_ADDR(&fmFd, p_HcFrame); \
  705. + DPAA_FD_SET_OFFSET(&fmFd, 0); \
  706. + DPAA_FD_SET_LENGTH(&fmFd, len); \
  707. +} while (0)
  708. +
  709. +
  710. +#if defined(__MWERKS__) && !defined(__GNUC__)
  711. +#pragma pack(push,1)
  712. +#endif /* defined(__MWERKS__) && ... */
  713. +
  714. +typedef struct t_FmPcdKgPortRegs {
  715. + volatile uint32_t spReg;
  716. + volatile uint32_t cppReg;
  717. +} t_FmPcdKgPortRegs;
  718. +
  719. +typedef struct t_HcFrame {
  720. + volatile uint32_t opcode;
  721. + volatile uint32_t actionReg;
  722. + volatile uint32_t extraReg;
  723. + volatile uint32_t commandSequence;
  724. + union {
  725. + struct fman_kg_scheme_regs schemeRegs;
  726. + struct fman_kg_scheme_regs schemeRegsWithoutCounter;
  727. + t_FmPcdPlcrProfileRegs profileRegs;
  728. + volatile uint32_t singleRegForWrite; /* for writing SP, CPP, profile counter */
  729. + t_FmPcdKgPortRegs portRegsForRead;
  730. + volatile uint32_t clsPlanEntries[CLS_PLAN_NUM_PER_GRP];
  731. + t_FmPcdCcCapwapReassmTimeoutParams ccCapwapReassmTimeout;
  732. + t_FmPcdCcReassmTimeoutParams ccReassmTimeout;
  733. + } hcSpecificData;
  734. +} t_HcFrame;
  735. +
  736. +#if defined(__MWERKS__) && !defined(__GNUC__)
  737. +#pragma pack(pop)
  738. +#endif /* defined(__MWERKS__) && ... */
  739. +
  740. +
  741. +typedef struct t_FmHc {
  742. + t_Handle h_FmPcd;
  743. + t_Handle h_HcPortDev;
  744. + t_FmPcdQmEnqueueCallback *f_QmEnqueue; /**< A callback for enqueuing frames to the QM */
  745. + t_Handle h_QmArg; /**< A handle to the QM module */
  746. + uint8_t dataMemId; /**< Memory partition ID for data buffers */
  747. +
  748. + uint32_t seqNum[HC_CMD_POOL_SIZE]; /* FIFO of seqNum to use when
  749. + taking buffer */
  750. + uint32_t nextSeqNumLocation; /* seqNum location in seqNum[] for next buffer */
  751. + volatile bool enqueued[HC_CMD_POOL_SIZE]; /* HC is active - frame is enqueued
  752. + and not confirmed yet */
  753. + t_HcFrame *p_Frm[HC_CMD_POOL_SIZE];
  754. +} t_FmHc;
  755. +
  756. +
  757. +static t_Error FillBufPool(t_FmHc *p_FmHc)
  758. +{
  759. + uint32_t i;
  760. +
  761. + ASSERT_COND(p_FmHc);
  762. +
  763. + for (i = 0; i < HC_CMD_POOL_SIZE; i++)
  764. + {
  765. +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
  766. + p_FmHc->p_Frm[i] = (t_HcFrame *)XX_MallocSmart((sizeof(t_HcFrame) + (16 - (sizeof(t_FmHc) % 16))),
  767. + p_FmHc->dataMemId,
  768. + 16);
  769. +#else
  770. + p_FmHc->p_Frm[i] = (t_HcFrame *)XX_MallocSmart(sizeof(t_HcFrame),
  771. + p_FmHc->dataMemId,
  772. + 16);
  773. +#endif /* FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004 */
  774. + if (!p_FmHc->p_Frm[i])
  775. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM HC frames!"));
  776. + }
  777. +
  778. + /* Initialize FIFO of seqNum to use during GetBuf */
  779. + for (i = 0; i < HC_CMD_POOL_SIZE; i++)
  780. + {
  781. + p_FmHc->seqNum[i] = i;
  782. + }
  783. + p_FmHc->nextSeqNumLocation = 0;
  784. +
  785. + return E_OK;
  786. +}
  787. +
  788. +static __inline__ t_HcFrame * GetBuf(t_FmHc *p_FmHc, uint32_t *p_SeqNum)
  789. +{
  790. + uint32_t intFlags;
  791. +
  792. + ASSERT_COND(p_FmHc);
  793. +
  794. + intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  795. +
  796. + if (p_FmHc->nextSeqNumLocation == HC_CMD_POOL_SIZE)
  797. + {
  798. + /* No more buffers */
  799. + FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  800. + return NULL;
  801. + }
  802. +
  803. + *p_SeqNum = p_FmHc->seqNum[p_FmHc->nextSeqNumLocation];
  804. + p_FmHc->nextSeqNumLocation++;
  805. +
  806. + FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  807. + return p_FmHc->p_Frm[*p_SeqNum];
  808. +}
  809. +
  810. +static __inline__ void PutBuf(t_FmHc *p_FmHc, t_HcFrame *p_Buf, uint32_t seqNum)
  811. +{
  812. + uint32_t intFlags;
  813. +
  814. + UNUSED(p_Buf);
  815. +
  816. + intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  817. + ASSERT_COND(p_FmHc->nextSeqNumLocation);
  818. + p_FmHc->nextSeqNumLocation--;
  819. + p_FmHc->seqNum[p_FmHc->nextSeqNumLocation] = seqNum;
  820. + FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  821. +}
  822. +
  823. +static __inline__ t_Error EnQFrm(t_FmHc *p_FmHc, t_DpaaFD *p_FmFd, uint32_t seqNum)
  824. +{
  825. + t_Error err = E_OK;
  826. + uint32_t intFlags;
  827. + uint32_t timeout=100;
  828. +
  829. + intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  830. + ASSERT_COND(!p_FmHc->enqueued[seqNum]);
  831. + p_FmHc->enqueued[seqNum] = TRUE;
  832. + FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  833. + DBG(TRACE, ("Send Hc, SeqNum %d, buff@0x%x, fd offset 0x%x",
  834. + seqNum,
  835. + DPAA_FD_GET_ADDR(p_FmFd),
  836. + DPAA_FD_GET_OFFSET(p_FmFd)));
  837. + err = p_FmHc->f_QmEnqueue(p_FmHc->h_QmArg, (void *)p_FmFd);
  838. + if (err)
  839. + RETURN_ERROR(MINOR, err, ("HC enqueue failed"));
  840. +
  841. + while (p_FmHc->enqueued[seqNum] && --timeout)
  842. + XX_UDelay(100);
  843. +
  844. + if (!timeout)
  845. + RETURN_ERROR(MINOR, E_TIMEOUT, ("HC Callback, timeout exceeded"));
  846. +
  847. + return err;
  848. +}
  849. +
  850. +
  851. +t_Handle FmHcConfigAndInit(t_FmHcParams *p_FmHcParams)
  852. +{
  853. + t_FmHc *p_FmHc;
  854. + t_FmPortParams fmPortParam;
  855. + t_Error err;
  856. +
  857. + p_FmHc = (t_FmHc *)XX_Malloc(sizeof(t_FmHc));
  858. + if (!p_FmHc)
  859. + {
  860. + REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC obj"));
  861. + return NULL;
  862. + }
  863. + memset(p_FmHc,0,sizeof(t_FmHc));
  864. +
  865. + p_FmHc->h_FmPcd = p_FmHcParams->h_FmPcd;
  866. + p_FmHc->f_QmEnqueue = p_FmHcParams->params.f_QmEnqueue;
  867. + p_FmHc->h_QmArg = p_FmHcParams->params.h_QmArg;
  868. + p_FmHc->dataMemId = DEFAULT_dataMemId;
  869. +
  870. + err = FillBufPool(p_FmHc);
  871. + if (err != E_OK)
  872. + {
  873. + REPORT_ERROR(MAJOR, err, NO_MSG);
  874. + FmHcFree(p_FmHc);
  875. + return NULL;
  876. + }
  877. +
  878. + if (!FmIsMaster(p_FmHcParams->h_Fm))
  879. + return (t_Handle)p_FmHc;
  880. +
  881. + memset(&fmPortParam, 0, sizeof(fmPortParam));
  882. + fmPortParam.baseAddr = p_FmHcParams->params.portBaseAddr;
  883. + fmPortParam.portType = e_FM_PORT_TYPE_OH_HOST_COMMAND;
  884. + fmPortParam.portId = p_FmHcParams->params.portId;
  885. + fmPortParam.liodnBase = p_FmHcParams->params.liodnBase;
  886. + fmPortParam.h_Fm = p_FmHcParams->h_Fm;
  887. +
  888. + fmPortParam.specificParams.nonRxParams.errFqid = p_FmHcParams->params.errFqid;
  889. + fmPortParam.specificParams.nonRxParams.dfltFqid = p_FmHcParams->params.confFqid;
  890. + fmPortParam.specificParams.nonRxParams.qmChannel = p_FmHcParams->params.qmChannel;
  891. +
  892. + p_FmHc->h_HcPortDev = FM_PORT_Config(&fmPortParam);
  893. + if (!p_FmHc->h_HcPortDev)
  894. + {
  895. + REPORT_ERROR(MAJOR, E_INVALID_HANDLE, ("FM HC port!"));
  896. + XX_Free(p_FmHc);
  897. + return NULL;
  898. + }
  899. +
  900. + err = FM_PORT_ConfigMaxFrameLength(p_FmHc->h_HcPortDev,
  901. + (uint16_t)sizeof(t_HcFrame));
  902. +
  903. + if (err != E_OK)
  904. + {
  905. + REPORT_ERROR(MAJOR, err, ("FM HC port init!"));
  906. + FmHcFree(p_FmHc);
  907. + return NULL;
  908. + }
  909. +
  910. + /* final init */
  911. + err = FM_PORT_Init(p_FmHc->h_HcPortDev);
  912. + if (err != E_OK)
  913. + {
  914. + REPORT_ERROR(MAJOR, err, ("FM HC port init!"));
  915. + FmHcFree(p_FmHc);
  916. + return NULL;
  917. + }
  918. +
  919. + err = FM_PORT_Enable(p_FmHc->h_HcPortDev);
  920. + if (err != E_OK)
  921. + {
  922. + REPORT_ERROR(MAJOR, err, ("FM HC port enable!"));
  923. + FmHcFree(p_FmHc);
  924. + return NULL;
  925. + }
  926. +
  927. + return (t_Handle)p_FmHc;
  928. +}
  929. +
  930. +void FmHcFree(t_Handle h_FmHc)
  931. +{
  932. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  933. + int i;
  934. +
  935. + if (!p_FmHc)
  936. + return;
  937. +
  938. + for (i=0; i<HC_CMD_POOL_SIZE; i++)
  939. + if (p_FmHc->p_Frm[i])
  940. + XX_FreeSmart(p_FmHc->p_Frm[i]);
  941. + else
  942. + break;
  943. +
  944. + if (p_FmHc->h_HcPortDev)
  945. + FM_PORT_Free(p_FmHc->h_HcPortDev);
  946. +
  947. + XX_Free(p_FmHc);
  948. +}
  949. +
  950. +/*****************************************************************************/
  951. +t_Error FmHcSetFramesDataMemory(t_Handle h_FmHc,
  952. + uint8_t memId)
  953. +{
  954. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  955. + int i;
  956. +
  957. + SANITY_CHECK_RETURN_ERROR(p_FmHc, E_INVALID_HANDLE);
  958. +
  959. + p_FmHc->dataMemId = memId;
  960. +
  961. + for (i=0; i<HC_CMD_POOL_SIZE; i++)
  962. + if (p_FmHc->p_Frm[i])
  963. + XX_FreeSmart(p_FmHc->p_Frm[i]);
  964. +
  965. + return FillBufPool(p_FmHc);
  966. +}
  967. +
  968. +void FmHcTxConf(t_Handle h_FmHc, t_DpaaFD *p_Fd)
  969. +{
  970. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  971. + t_HcFrame *p_HcFrame;
  972. + uint32_t intFlags;
  973. +
  974. + ASSERT_COND(p_FmHc);
  975. +
  976. + intFlags = FmPcdLock(p_FmHc->h_FmPcd);
  977. + p_HcFrame = (t_HcFrame *)PTR_MOVE(DPAA_FD_GET_ADDR(p_Fd), DPAA_FD_GET_OFFSET(p_Fd));
  978. +
  979. + DBG(TRACE, ("Hc Conf, SeqNum %d, FD@0x%x, fd offset 0x%x",
  980. + p_HcFrame->commandSequence, DPAA_FD_GET_ADDR(p_Fd), DPAA_FD_GET_OFFSET(p_Fd)));
  981. +
  982. + if (!(p_FmHc->enqueued[p_HcFrame->commandSequence]))
  983. + REPORT_ERROR(MINOR, E_INVALID_FRAME, ("Not an Host-Command frame received!"));
  984. + else
  985. + p_FmHc->enqueued[p_HcFrame->commandSequence] = FALSE;
  986. + FmPcdUnlock(p_FmHc->h_FmPcd, intFlags);
  987. +}
  988. +
  989. +t_Error FmHcPcdKgSetScheme(t_Handle h_FmHc,
  990. + t_Handle h_Scheme,
  991. + struct fman_kg_scheme_regs *p_SchemeRegs,
  992. + bool updateCounter)
  993. +{
  994. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  995. + t_Error err = E_OK;
  996. + t_HcFrame *p_HcFrame;
  997. + t_DpaaFD fmFd;
  998. + uint8_t physicalSchemeId;
  999. + uint32_t seqNum;
  1000. +
  1001. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1002. + if (!p_HcFrame)
  1003. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1004. +
  1005. + physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  1006. +
  1007. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1008. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1009. + p_HcFrame->actionReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, updateCounter);
  1010. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1011. + memcpy(&p_HcFrame->hcSpecificData.schemeRegs, p_SchemeRegs, sizeof(struct fman_kg_scheme_regs));
  1012. + if (!updateCounter)
  1013. + {
  1014. + p_HcFrame->hcSpecificData.schemeRegs.kgse_dv0 = p_SchemeRegs->kgse_dv0;
  1015. + p_HcFrame->hcSpecificData.schemeRegs.kgse_dv1 = p_SchemeRegs->kgse_dv1;
  1016. + p_HcFrame->hcSpecificData.schemeRegs.kgse_ccbs = p_SchemeRegs->kgse_ccbs;
  1017. + p_HcFrame->hcSpecificData.schemeRegs.kgse_mv = p_SchemeRegs->kgse_mv;
  1018. + }
  1019. + p_HcFrame->commandSequence = seqNum;
  1020. +
  1021. + BUILD_FD(sizeof(t_HcFrame));
  1022. +
  1023. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1024. +
  1025. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1026. +
  1027. + if (err != E_OK)
  1028. + RETURN_ERROR(MINOR, err, NO_MSG);
  1029. +
  1030. + return E_OK;
  1031. +}
  1032. +
  1033. +t_Error FmHcPcdKgDeleteScheme(t_Handle h_FmHc, t_Handle h_Scheme)
  1034. +{
  1035. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1036. + t_Error err = E_OK;
  1037. + t_HcFrame *p_HcFrame;
  1038. + t_DpaaFD fmFd;
  1039. + uint8_t physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  1040. + uint32_t seqNum;
  1041. +
  1042. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1043. + if (!p_HcFrame)
  1044. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1045. +
  1046. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1047. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1048. + p_HcFrame->actionReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
  1049. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1050. + memset(&p_HcFrame->hcSpecificData.schemeRegs, 0, sizeof(struct fman_kg_scheme_regs));
  1051. + p_HcFrame->commandSequence = seqNum;
  1052. +
  1053. + BUILD_FD(sizeof(t_HcFrame));
  1054. +
  1055. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1056. +
  1057. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1058. +
  1059. + if (err != E_OK)
  1060. + RETURN_ERROR(MINOR, err, NO_MSG);
  1061. +
  1062. + return E_OK;
  1063. +}
  1064. +
  1065. +t_Error FmHcPcdKgCcGetSetParams(t_Handle h_FmHc, t_Handle h_Scheme, uint32_t requiredAction, uint32_t value)
  1066. +{
  1067. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1068. + t_Error err = E_OK;
  1069. + t_HcFrame *p_HcFrame;
  1070. + t_DpaaFD fmFd;
  1071. + uint8_t relativeSchemeId;
  1072. + uint8_t physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  1073. + uint32_t tmpReg32 = 0;
  1074. + uint32_t seqNum;
  1075. +
  1076. + /* Scheme is locked by calling routine */
  1077. + /* WARNING - this lock will not be efficient if other HC routine will attempt to change
  1078. + * "kgse_mode" or "kgse_om" without locking scheme !
  1079. + */
  1080. +
  1081. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
  1082. + if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  1083. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  1084. +
  1085. + if (!FmPcdKgGetRequiredActionFlag(p_FmHc->h_FmPcd, relativeSchemeId) ||
  1086. + !(FmPcdKgGetRequiredAction(p_FmHc->h_FmPcd, relativeSchemeId) & requiredAction))
  1087. + {
  1088. + if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA) &&
  1089. + (FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_PLCR))
  1090. + {
  1091. + if ((FmPcdKgIsDirectPlcr(p_FmHc->h_FmPcd, relativeSchemeId) == FALSE) ||
  1092. + (FmPcdKgIsDistrOnPlcrProfile(p_FmHc->h_FmPcd, relativeSchemeId) == TRUE))
  1093. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("In this situation PP can not be with distribution and has to be shared"));
  1094. + err = FmPcdPlcrCcGetSetParams(p_FmHc->h_FmPcd, FmPcdKgGetRelativeProfileId(p_FmHc->h_FmPcd, relativeSchemeId), requiredAction);
  1095. + if (err)
  1096. + RETURN_ERROR(MAJOR, err, NO_MSG);
  1097. + }
  1098. + else /* From here we deal with KG-Schemes only */
  1099. + {
  1100. + /* Pre change general code */
  1101. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1102. + if (!p_HcFrame)
  1103. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1104. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1105. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1106. + p_HcFrame->actionReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  1107. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1108. + p_HcFrame->commandSequence = seqNum;
  1109. + BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  1110. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1111. + {
  1112. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1113. + RETURN_ERROR(MINOR, err, NO_MSG);
  1114. + }
  1115. +
  1116. + /* specific change */
  1117. + if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA) &&
  1118. + ((FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_DONE) &&
  1119. + (FmPcdKgGetDoneAction(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_ENQ_FRAME)))
  1120. + {
  1121. + tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
  1122. + ASSERT_COND(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME));
  1123. + p_HcFrame->hcSpecificData.schemeRegs.kgse_mode = tmpReg32 | NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  1124. + }
  1125. +
  1126. + if ((requiredAction & UPDATE_KG_NIA_CC_WA) &&
  1127. + (FmPcdKgGetNextEngine(p_FmHc->h_FmPcd, relativeSchemeId) == e_FM_PCD_CC))
  1128. + {
  1129. + tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
  1130. + ASSERT_COND(tmpReg32 & (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC));
  1131. + tmpReg32 &= ~NIA_FM_CTL_AC_CC;
  1132. + p_HcFrame->hcSpecificData.schemeRegs.kgse_mode = tmpReg32 | NIA_FM_CTL_AC_PRE_CC;
  1133. + }
  1134. +
  1135. + if (requiredAction & UPDATE_KG_OPT_MODE)
  1136. + p_HcFrame->hcSpecificData.schemeRegs.kgse_om = value;
  1137. +
  1138. + if (requiredAction & UPDATE_KG_NIA)
  1139. + {
  1140. + tmpReg32 = p_HcFrame->hcSpecificData.schemeRegs.kgse_mode;
  1141. + tmpReg32 &= ~(NIA_ENG_MASK | NIA_AC_MASK);
  1142. + tmpReg32 |= value;
  1143. + p_HcFrame->hcSpecificData.schemeRegs.kgse_mode = tmpReg32;
  1144. + }
  1145. +
  1146. + /* Post change general code */
  1147. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1148. + p_HcFrame->actionReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
  1149. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1150. +
  1151. + BUILD_FD(sizeof(t_HcFrame));
  1152. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1153. +
  1154. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1155. +
  1156. + if (err != E_OK)
  1157. + RETURN_ERROR(MINOR, err, NO_MSG);
  1158. + }
  1159. + }
  1160. +
  1161. + return E_OK;
  1162. +}
  1163. +
  1164. +uint32_t FmHcPcdKgGetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme)
  1165. +{
  1166. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1167. + t_Error err;
  1168. + t_HcFrame *p_HcFrame;
  1169. + t_DpaaFD fmFd;
  1170. + uint32_t retVal;
  1171. + uint8_t relativeSchemeId;
  1172. + uint8_t physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  1173. + uint32_t seqNum;
  1174. +
  1175. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
  1176. + if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  1177. + {
  1178. + REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  1179. + return 0;
  1180. + }
  1181. +
  1182. + /* first read scheme and check that it is valid */
  1183. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1184. + if (!p_HcFrame)
  1185. + {
  1186. + REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1187. + return 0;
  1188. + }
  1189. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1190. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1191. + p_HcFrame->actionReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  1192. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1193. + p_HcFrame->commandSequence = seqNum;
  1194. +
  1195. + BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  1196. +
  1197. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1198. + if (err != E_OK)
  1199. + {
  1200. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1201. + REPORT_ERROR(MINOR, err, NO_MSG);
  1202. + return 0;
  1203. + }
  1204. +
  1205. + if (!FmPcdKgHwSchemeIsValid(p_HcFrame->hcSpecificData.schemeRegs.kgse_mode))
  1206. + {
  1207. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1208. + REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is invalid"));
  1209. + return 0;
  1210. + }
  1211. +
  1212. + retVal = p_HcFrame->hcSpecificData.schemeRegs.kgse_spc;
  1213. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1214. +
  1215. + return retVal;
  1216. +}
  1217. +
  1218. +t_Error FmHcPcdKgSetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme, uint32_t value)
  1219. +{
  1220. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1221. + t_Error err = E_OK;
  1222. + t_HcFrame *p_HcFrame;
  1223. + t_DpaaFD fmFd;
  1224. + uint8_t relativeSchemeId, physicalSchemeId;
  1225. + uint32_t seqNum;
  1226. +
  1227. + physicalSchemeId = FmPcdKgGetSchemeId(h_Scheme);
  1228. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmHc->h_FmPcd, physicalSchemeId);
  1229. + if ( relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  1230. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  1231. +
  1232. + /* first read scheme and check that it is valid */
  1233. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1234. + if (!p_HcFrame)
  1235. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1236. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1237. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1238. + p_HcFrame->actionReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
  1239. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_COUNTER;
  1240. + /* write counter */
  1241. + p_HcFrame->hcSpecificData.singleRegForWrite = value;
  1242. + p_HcFrame->commandSequence = seqNum;
  1243. +
  1244. + BUILD_FD(sizeof(t_HcFrame));
  1245. +
  1246. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1247. +
  1248. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1249. + return err;
  1250. +}
  1251. +
  1252. +t_Error FmHcPcdKgSetClsPlan(t_Handle h_FmHc, t_FmPcdKgInterModuleClsPlanSet *p_Set)
  1253. +{
  1254. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1255. + t_HcFrame *p_HcFrame;
  1256. + t_DpaaFD fmFd;
  1257. + uint8_t i, idx;
  1258. + uint32_t seqNum;
  1259. + t_Error err = E_OK;
  1260. +
  1261. + ASSERT_COND(p_FmHc);
  1262. +
  1263. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1264. + if (!p_HcFrame)
  1265. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1266. +
  1267. + for (i = p_Set->baseEntry; i < (p_Set->baseEntry+p_Set->numOfClsPlanEntries); i+=8)
  1268. + {
  1269. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1270. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1271. + p_HcFrame->actionReg = FmPcdKgBuildWriteClsPlanBlockActionReg((uint8_t)(i / CLS_PLAN_NUM_PER_GRP));
  1272. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1273. +
  1274. + idx = (uint8_t)(i - p_Set->baseEntry);
  1275. + ASSERT_COND(idx < FM_PCD_MAX_NUM_OF_CLS_PLANS);
  1276. + memcpy(&p_HcFrame->hcSpecificData.clsPlanEntries, &p_Set->vectors[idx], CLS_PLAN_NUM_PER_GRP*sizeof(uint32_t));
  1277. + p_HcFrame->commandSequence = seqNum;
  1278. +
  1279. + BUILD_FD(sizeof(t_HcFrame));
  1280. +
  1281. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1282. + {
  1283. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1284. + RETURN_ERROR(MINOR, err, NO_MSG);
  1285. + }
  1286. + }
  1287. +
  1288. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1289. + return err;
  1290. +}
  1291. +
  1292. +t_Error FmHcPcdKgDeleteClsPlan(t_Handle h_FmHc, uint8_t grpId)
  1293. +{
  1294. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1295. + t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet;
  1296. +
  1297. + p_ClsPlanSet = (t_FmPcdKgInterModuleClsPlanSet *)XX_Malloc(sizeof(t_FmPcdKgInterModuleClsPlanSet));
  1298. + if (!p_ClsPlanSet)
  1299. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Classification plan set"));
  1300. +
  1301. + memset(p_ClsPlanSet, 0, sizeof(t_FmPcdKgInterModuleClsPlanSet));
  1302. +
  1303. + p_ClsPlanSet->baseEntry = FmPcdKgGetClsPlanGrpBase(p_FmHc->h_FmPcd, grpId);
  1304. + p_ClsPlanSet->numOfClsPlanEntries = FmPcdKgGetClsPlanGrpSize(p_FmHc->h_FmPcd, grpId);
  1305. + ASSERT_COND(p_ClsPlanSet->numOfClsPlanEntries <= FM_PCD_MAX_NUM_OF_CLS_PLANS);
  1306. +
  1307. + if (FmHcPcdKgSetClsPlan(p_FmHc, p_ClsPlanSet) != E_OK)
  1308. + {
  1309. + XX_Free(p_ClsPlanSet);
  1310. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  1311. + }
  1312. +
  1313. + XX_Free(p_ClsPlanSet);
  1314. + FmPcdKgDestroyClsPlanGrp(p_FmHc->h_FmPcd, grpId);
  1315. +
  1316. + return E_OK;
  1317. +}
  1318. +
  1319. +t_Error FmHcPcdCcCapwapTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcCapwapReassmTimeoutParams *p_CcCapwapReassmTimeoutParams )
  1320. +{
  1321. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1322. + t_HcFrame *p_HcFrame;
  1323. + t_DpaaFD fmFd;
  1324. + t_Error err;
  1325. + uint32_t seqNum;
  1326. +
  1327. + SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  1328. +
  1329. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1330. + if (!p_HcFrame)
  1331. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1332. +
  1333. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1334. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_CAPWAP_REASSM_TIMEOUT);
  1335. + memcpy(&p_HcFrame->hcSpecificData.ccCapwapReassmTimeout, p_CcCapwapReassmTimeoutParams, sizeof(t_FmPcdCcCapwapReassmTimeoutParams));
  1336. + p_HcFrame->commandSequence = seqNum;
  1337. + BUILD_FD(sizeof(t_HcFrame));
  1338. +
  1339. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1340. +
  1341. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1342. + return err;
  1343. +}
  1344. +
  1345. +t_Error FmHcPcdCcIpFragScratchPollCmd(t_Handle h_FmHc, bool fill, t_FmPcdCcFragScratchPoolCmdParams *p_FmPcdCcFragScratchPoolCmdParams)
  1346. +{
  1347. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1348. + t_HcFrame *p_HcFrame;
  1349. + t_DpaaFD fmFd;
  1350. + t_Error err;
  1351. + uint32_t seqNum;
  1352. +
  1353. + SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  1354. +
  1355. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1356. + if (!p_HcFrame)
  1357. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1358. +
  1359. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1360. +
  1361. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_IP_FRAG_INITIALIZATION);
  1362. + p_HcFrame->actionReg = (uint32_t)(((fill == TRUE) ? 0 : 1) << HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_CMD_SHIFT);
  1363. + p_HcFrame->actionReg |= p_FmPcdCcFragScratchPoolCmdParams->bufferPoolId << HC_HCOR_ACTION_REG_IP_FRAG_SCRATCH_POOL_BPID;
  1364. + if (fill == TRUE)
  1365. + {
  1366. + p_HcFrame->extraReg = p_FmPcdCcFragScratchPoolCmdParams->numOfBuffers;
  1367. + }
  1368. + p_HcFrame->commandSequence = seqNum;
  1369. +
  1370. + BUILD_FD(sizeof(t_HcFrame));
  1371. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1372. + {
  1373. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1374. + RETURN_ERROR(MINOR, err, NO_MSG);
  1375. + }
  1376. +
  1377. + p_FmPcdCcFragScratchPoolCmdParams->numOfBuffers = p_HcFrame->extraReg;
  1378. +
  1379. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1380. + return E_OK;
  1381. +}
  1382. +
  1383. +t_Error FmHcPcdCcTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcReassmTimeoutParams *p_CcReassmTimeoutParams, uint8_t *p_Result)
  1384. +{
  1385. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1386. + t_HcFrame *p_HcFrame;
  1387. + t_DpaaFD fmFd;
  1388. + t_Error err;
  1389. + uint32_t seqNum;
  1390. +
  1391. + SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  1392. +
  1393. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1394. + if (!p_HcFrame)
  1395. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1396. +
  1397. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1398. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC_REASSM_TIMEOUT);
  1399. + p_HcFrame->actionReg = (uint32_t)((p_CcReassmTimeoutParams->activate ? 0 : 1) << HC_HCOR_ACTION_REG_REASSM_TIMEOUT_ACTIVE_SHIFT);
  1400. + p_HcFrame->extraReg = (p_CcReassmTimeoutParams->tsbs << HC_HCOR_EXTRA_REG_REASSM_TIMEOUT_TSBS_SHIFT) | p_CcReassmTimeoutParams->iprcpt;
  1401. + p_HcFrame->commandSequence = seqNum;
  1402. +
  1403. + BUILD_FD(sizeof(t_HcFrame));
  1404. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1405. + {
  1406. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1407. + RETURN_ERROR(MINOR, err, NO_MSG);
  1408. + }
  1409. +
  1410. + *p_Result = (uint8_t)
  1411. + ((p_HcFrame->actionReg >> HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_SHIFT) & HC_HCOR_ACTION_REG_REASSM_TIMEOUT_RES_MASK);
  1412. +
  1413. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1414. + return E_OK;
  1415. +}
  1416. +
  1417. +t_Error FmHcPcdPlcrCcGetSetParams(t_Handle h_FmHc,uint16_t absoluteProfileId, uint32_t requiredAction)
  1418. +{
  1419. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1420. + t_HcFrame *p_HcFrame;
  1421. + t_DpaaFD fmFd;
  1422. + t_Error err;
  1423. + uint32_t tmpReg32 = 0;
  1424. + uint32_t requiredActionTmp, requiredActionFlag;
  1425. + uint32_t seqNum;
  1426. +
  1427. + SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  1428. +
  1429. + /* Profile is locked by calling routine */
  1430. + /* WARNING - this lock will not be efficient if other HC routine will attempt to change
  1431. + * "fmpl_pegnia" "fmpl_peynia" or "fmpl_pernia" without locking Profile !
  1432. + */
  1433. +
  1434. + requiredActionTmp = FmPcdPlcrGetRequiredAction(p_FmHc->h_FmPcd, absoluteProfileId);
  1435. + requiredActionFlag = FmPcdPlcrGetRequiredActionFlag(p_FmHc->h_FmPcd, absoluteProfileId);
  1436. +
  1437. + if (!requiredActionFlag || !(requiredActionTmp & requiredAction))
  1438. + {
  1439. + if (requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
  1440. + {
  1441. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1442. + if (!p_HcFrame)
  1443. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1444. + /* first read scheme and check that it is valid */
  1445. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1446. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1447. + p_HcFrame->actionReg = FmPcdPlcrBuildReadPlcrActionReg(absoluteProfileId);
  1448. + p_HcFrame->extraReg = 0x00008000;
  1449. + p_HcFrame->commandSequence = seqNum;
  1450. +
  1451. + BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  1452. +
  1453. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1454. + {
  1455. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1456. + RETURN_ERROR(MINOR, err, NO_MSG);
  1457. + }
  1458. +
  1459. + tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_pegnia;
  1460. + if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  1461. + {
  1462. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1463. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  1464. + ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  1465. + }
  1466. +
  1467. + tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  1468. +
  1469. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1470. + p_HcFrame->actionReg = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  1471. + p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(TRUE, FALSE, FALSE);
  1472. + p_HcFrame->extraReg = 0x00008000;
  1473. + p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
  1474. +
  1475. + BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
  1476. +
  1477. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1478. + {
  1479. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1480. + RETURN_ERROR(MINOR, err, NO_MSG);
  1481. + }
  1482. +
  1483. + tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_peynia;
  1484. + if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  1485. + {
  1486. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1487. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  1488. + }
  1489. +
  1490. + tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  1491. +
  1492. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1493. + p_HcFrame->actionReg = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  1494. + p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(FALSE, TRUE, FALSE);
  1495. + p_HcFrame->extraReg = 0x00008000;
  1496. + p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
  1497. +
  1498. + BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
  1499. +
  1500. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1501. + {
  1502. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1503. + RETURN_ERROR(MINOR, err, NO_MSG);
  1504. + }
  1505. +
  1506. + tmpReg32 = p_HcFrame->hcSpecificData.profileRegs.fmpl_pernia;
  1507. + if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  1508. + {
  1509. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1510. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  1511. + }
  1512. +
  1513. + tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  1514. +
  1515. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1516. + p_HcFrame->actionReg = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  1517. + p_HcFrame->actionReg |= FmPcdPlcrBuildNiaProfileReg(FALSE, FALSE, TRUE);
  1518. + p_HcFrame->extraReg = 0x00008000;
  1519. + p_HcFrame->hcSpecificData.singleRegForWrite = tmpReg32;
  1520. +
  1521. + BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
  1522. +
  1523. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1524. + {
  1525. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1526. + RETURN_ERROR(MINOR, err, NO_MSG);
  1527. + }
  1528. +
  1529. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1530. + }
  1531. + }
  1532. +
  1533. + return E_OK;
  1534. +}
  1535. +
  1536. +t_Error FmHcPcdPlcrSetProfile(t_Handle h_FmHc, t_Handle h_Profile, t_FmPcdPlcrProfileRegs *p_PlcrRegs)
  1537. +{
  1538. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1539. + t_Error err = E_OK;
  1540. + uint16_t profileIndx;
  1541. + t_HcFrame *p_HcFrame;
  1542. + t_DpaaFD fmFd;
  1543. + uint32_t seqNum;
  1544. +
  1545. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1546. + if (!p_HcFrame)
  1547. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1548. +
  1549. + profileIndx = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  1550. +
  1551. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1552. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1553. + p_HcFrame->actionReg = FmPcdPlcrBuildWritePlcrActionRegs(profileIndx);
  1554. + p_HcFrame->extraReg = 0x00008000;
  1555. + memcpy(&p_HcFrame->hcSpecificData.profileRegs, p_PlcrRegs, sizeof(t_FmPcdPlcrProfileRegs));
  1556. + p_HcFrame->commandSequence = seqNum;
  1557. +
  1558. + BUILD_FD(sizeof(t_HcFrame));
  1559. +
  1560. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1561. +
  1562. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1563. +
  1564. + if (err != E_OK)
  1565. + RETURN_ERROR(MINOR, err, NO_MSG);
  1566. +
  1567. + return E_OK;
  1568. +}
  1569. +
  1570. +t_Error FmHcPcdPlcrDeleteProfile(t_Handle h_FmHc, t_Handle h_Profile)
  1571. +{
  1572. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1573. + uint16_t absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  1574. + t_Error err = E_OK;
  1575. + t_HcFrame *p_HcFrame;
  1576. + t_DpaaFD fmFd;
  1577. + uint32_t seqNum;
  1578. +
  1579. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1580. + if (!p_HcFrame)
  1581. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1582. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1583. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1584. + p_HcFrame->actionReg = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  1585. + p_HcFrame->actionReg |= 0x00008000;
  1586. + p_HcFrame->extraReg = 0x00008000;
  1587. + memset(&p_HcFrame->hcSpecificData.profileRegs, 0, sizeof(t_FmPcdPlcrProfileRegs));
  1588. + p_HcFrame->commandSequence = seqNum;
  1589. +
  1590. + BUILD_FD(sizeof(t_HcFrame));
  1591. +
  1592. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1593. +
  1594. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1595. +
  1596. + if (err != E_OK)
  1597. + RETURN_ERROR(MINOR, err, NO_MSG);
  1598. +
  1599. + return E_OK;
  1600. +}
  1601. +
  1602. +t_Error FmHcPcdPlcrSetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter, uint32_t value)
  1603. +{
  1604. +
  1605. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1606. + uint16_t absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  1607. + t_Error err = E_OK;
  1608. + t_HcFrame *p_HcFrame;
  1609. + t_DpaaFD fmFd;
  1610. + uint32_t seqNum;
  1611. +
  1612. + /* first read scheme and check that it is valid */
  1613. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1614. + if (!p_HcFrame)
  1615. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1616. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1617. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1618. + p_HcFrame->actionReg = FmPcdPlcrBuildWritePlcrActionReg(absoluteProfileId);
  1619. + p_HcFrame->actionReg |= FmPcdPlcrBuildCounterProfileReg(counter);
  1620. + p_HcFrame->extraReg = 0x00008000;
  1621. + p_HcFrame->hcSpecificData.singleRegForWrite = value;
  1622. + p_HcFrame->commandSequence = seqNum;
  1623. +
  1624. + BUILD_FD(SIZE_OF_HC_FRAME_PROFILE_CNT);
  1625. +
  1626. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1627. +
  1628. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1629. +
  1630. + if (err != E_OK)
  1631. + RETURN_ERROR(MINOR, err, NO_MSG);
  1632. +
  1633. + return E_OK;
  1634. +}
  1635. +
  1636. +uint32_t FmHcPcdPlcrGetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter)
  1637. +{
  1638. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1639. + uint16_t absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  1640. + t_Error err;
  1641. + t_HcFrame *p_HcFrame;
  1642. + t_DpaaFD fmFd;
  1643. + uint32_t retVal = 0;
  1644. + uint32_t seqNum;
  1645. +
  1646. + SANITY_CHECK_RETURN_VALUE(h_FmHc, E_INVALID_HANDLE,0);
  1647. +
  1648. + /* first read scheme and check that it is valid */
  1649. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1650. + if (!p_HcFrame)
  1651. + {
  1652. + REPORT_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1653. + return 0;
  1654. + }
  1655. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1656. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_PLCR_PRFL);
  1657. + p_HcFrame->actionReg = FmPcdPlcrBuildReadPlcrActionReg(absoluteProfileId);
  1658. + p_HcFrame->extraReg = 0x00008000;
  1659. + p_HcFrame->commandSequence = seqNum;
  1660. +
  1661. + BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  1662. +
  1663. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1664. + if (err != E_OK)
  1665. + {
  1666. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1667. + REPORT_ERROR(MINOR, err, NO_MSG);
  1668. + return 0;
  1669. + }
  1670. +
  1671. + switch (counter)
  1672. + {
  1673. + case e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER:
  1674. + retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_pegpc;
  1675. + break;
  1676. + case e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER:
  1677. + retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_peypc;
  1678. + break;
  1679. + case e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER:
  1680. + retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perpc;
  1681. + break;
  1682. + case e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER:
  1683. + retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perypc;
  1684. + break;
  1685. + case e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER:
  1686. + retVal = p_HcFrame->hcSpecificData.profileRegs.fmpl_perrpc;
  1687. + break;
  1688. + default:
  1689. + REPORT_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  1690. + }
  1691. +
  1692. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1693. + return retVal;
  1694. +}
  1695. +
  1696. +t_Error FmHcKgWriteSp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t spReg, bool add)
  1697. +{
  1698. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1699. + t_HcFrame *p_HcFrame;
  1700. + t_DpaaFD fmFd;
  1701. + t_Error err = E_OK;
  1702. + uint32_t seqNum;
  1703. +
  1704. + ASSERT_COND(p_FmHc);
  1705. +
  1706. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1707. + if (!p_HcFrame)
  1708. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1709. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1710. + /* first read SP register */
  1711. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1712. + p_HcFrame->actionReg = FmPcdKgBuildReadPortSchemeBindActionReg(hardwarePortId);
  1713. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1714. + p_HcFrame->commandSequence = seqNum;
  1715. +
  1716. + BUILD_FD(SIZE_OF_HC_FRAME_PORT_REGS);
  1717. +
  1718. + if ((err = EnQFrm(p_FmHc, &fmFd, seqNum)) != E_OK)
  1719. + {
  1720. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1721. + RETURN_ERROR(MINOR, err, NO_MSG);
  1722. + }
  1723. +
  1724. + /* spReg is the first reg, so we can use it both for read and for write */
  1725. + if (add)
  1726. + p_HcFrame->hcSpecificData.portRegsForRead.spReg |= spReg;
  1727. + else
  1728. + p_HcFrame->hcSpecificData.portRegsForRead.spReg &= ~spReg;
  1729. +
  1730. + p_HcFrame->actionReg = FmPcdKgBuildWritePortSchemeBindActionReg(hardwarePortId);
  1731. +
  1732. + BUILD_FD(sizeof(t_HcFrame));
  1733. +
  1734. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1735. +
  1736. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1737. +
  1738. + if (err != E_OK)
  1739. + RETURN_ERROR(MINOR, err, NO_MSG);
  1740. +
  1741. + return E_OK;
  1742. +}
  1743. +
  1744. +t_Error FmHcKgWriteCpp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t cppReg)
  1745. +{
  1746. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1747. + t_HcFrame *p_HcFrame;
  1748. + t_DpaaFD fmFd;
  1749. + t_Error err = E_OK;
  1750. + uint32_t seqNum;
  1751. +
  1752. + ASSERT_COND(p_FmHc);
  1753. +
  1754. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1755. + if (!p_HcFrame)
  1756. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1757. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1758. + /* first read SP register */
  1759. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_KG_SCM);
  1760. + p_HcFrame->actionReg = FmPcdKgBuildWritePortClsPlanBindActionReg(hardwarePortId);
  1761. + p_HcFrame->extraReg = HC_HCOR_KG_SCHEME_REGS_MASK;
  1762. + p_HcFrame->hcSpecificData.singleRegForWrite = cppReg;
  1763. + p_HcFrame->commandSequence = seqNum;
  1764. +
  1765. + BUILD_FD(sizeof(t_HcFrame));
  1766. +
  1767. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1768. +
  1769. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1770. +
  1771. + if (err != E_OK)
  1772. + RETURN_ERROR(MINOR, err, NO_MSG);
  1773. +
  1774. + return E_OK;
  1775. +}
  1776. +
  1777. +t_Error FmHcPcdCcDoDynamicChange(t_Handle h_FmHc, uint32_t oldAdAddrOffset, uint32_t newAdAddrOffset)
  1778. +{
  1779. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1780. + t_HcFrame *p_HcFrame;
  1781. + t_DpaaFD fmFd;
  1782. + t_Error err = E_OK;
  1783. + uint32_t seqNum;
  1784. +
  1785. + SANITY_CHECK_RETURN_ERROR(p_FmHc, E_INVALID_HANDLE);
  1786. +
  1787. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1788. + if (!p_HcFrame)
  1789. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1790. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1791. +
  1792. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_CC);
  1793. + p_HcFrame->actionReg = newAdAddrOffset;
  1794. + p_HcFrame->actionReg |= 0xc0000000;
  1795. + p_HcFrame->extraReg = oldAdAddrOffset;
  1796. + p_HcFrame->commandSequence = seqNum;
  1797. +
  1798. + BUILD_FD(SIZE_OF_HC_FRAME_READ_OR_CC_DYNAMIC);
  1799. +
  1800. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1801. +
  1802. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1803. +
  1804. + if (err != E_OK)
  1805. + RETURN_ERROR(MAJOR, err, NO_MSG);
  1806. +
  1807. + return E_OK;
  1808. +}
  1809. +
  1810. +t_Error FmHcPcdSync(t_Handle h_FmHc)
  1811. +{
  1812. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1813. + t_HcFrame *p_HcFrame;
  1814. + t_DpaaFD fmFd;
  1815. + t_Error err = E_OK;
  1816. + uint32_t seqNum;
  1817. +
  1818. + ASSERT_COND(p_FmHc);
  1819. +
  1820. + p_HcFrame = GetBuf(p_FmHc, &seqNum);
  1821. + if (!p_HcFrame)
  1822. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("HC Frame object"));
  1823. + memset(p_HcFrame, 0, sizeof(t_HcFrame));
  1824. + /* first read SP register */
  1825. + p_HcFrame->opcode = (uint32_t)(HC_HCOR_GBL | HC_HCOR_OPCODE_SYNC);
  1826. + p_HcFrame->actionReg = 0;
  1827. + p_HcFrame->extraReg = 0;
  1828. + p_HcFrame->commandSequence = seqNum;
  1829. +
  1830. + BUILD_FD(sizeof(t_HcFrame));
  1831. +
  1832. + err = EnQFrm(p_FmHc, &fmFd, seqNum);
  1833. +
  1834. + PutBuf(p_FmHc, p_HcFrame, seqNum);
  1835. +
  1836. + if (err != E_OK)
  1837. + RETURN_ERROR(MINOR, err, NO_MSG);
  1838. +
  1839. + return E_OK;
  1840. +}
  1841. +
  1842. +t_Handle FmHcGetPort(t_Handle h_FmHc)
  1843. +{
  1844. + t_FmHc *p_FmHc = (t_FmHc*)h_FmHc;
  1845. + return p_FmHc->h_HcPortDev;
  1846. +}
  1847. --- /dev/null
  1848. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/Makefile
  1849. @@ -0,0 +1,28 @@
  1850. +#
  1851. +# Makefile for the Freescale Ethernet controllers
  1852. +#
  1853. +ccflags-y += -DVERSION=\"\"
  1854. +#
  1855. +#Include netcomm SW specific definitions
  1856. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  1857. +
  1858. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  1859. +
  1860. +ccflags-y += -I$(NCSW_FM_INC)
  1861. +
  1862. +obj-y += fsl-ncsw-MAC.o
  1863. +
  1864. +fsl-ncsw-MAC-objs := dtsec.o dtsec_mii_acc.o fm_mac.o tgec.o tgec_mii_acc.o \
  1865. + fman_dtsec.o fman_dtsec_mii_acc.o fman_memac.o \
  1866. + fman_tgec.o fman_crc32.o
  1867. +
  1868. +ifeq ($(CONFIG_FMAN_V3H),y)
  1869. +fsl-ncsw-MAC-objs += memac.o memac_mii_acc.o fman_memac_mii_acc.o
  1870. +endif
  1871. +ifeq ($(CONFIG_FMAN_V3L),y)
  1872. +fsl-ncsw-MAC-objs += memac.o memac_mii_acc.o fman_memac_mii_acc.o
  1873. +endif
  1874. +ifeq ($(CONFIG_FMAN_ARM),y)
  1875. +fsl-ncsw-MAC-objs += memac.o memac_mii_acc.o fman_memac_mii_acc.o
  1876. +endif
  1877. +
  1878. --- /dev/null
  1879. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c
  1880. @@ -0,0 +1,1463 @@
  1881. +/*
  1882. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  1883. + *
  1884. + * Redistribution and use in source and binary forms, with or without
  1885. + * modification, are permitted provided that the following conditions are met:
  1886. + * * Redistributions of source code must retain the above copyright
  1887. + * notice, this list of conditions and the following disclaimer.
  1888. + * * Redistributions in binary form must reproduce the above copyright
  1889. + * notice, this list of conditions and the following disclaimer in the
  1890. + * documentation and/or other materials provided with the distribution.
  1891. + * * Neither the name of Freescale Semiconductor nor the
  1892. + * names of its contributors may be used to endorse or promote products
  1893. + * derived from this software without specific prior written permission.
  1894. + *
  1895. + *
  1896. + * ALTERNATIVELY, this software may be distributed under the terms of the
  1897. + * GNU General Public License ("GPL") as published by the Free Software
  1898. + * Foundation, either version 2 of that License or (at your option) any
  1899. + * later version.
  1900. + *
  1901. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  1902. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  1903. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  1904. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  1905. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  1906. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  1907. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  1908. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  1909. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  1910. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  1911. + */
  1912. +
  1913. +/******************************************************************************
  1914. + @File dtsec.c
  1915. +
  1916. + @Description FMan dTSEC driver
  1917. +*//***************************************************************************/
  1918. +
  1919. +#include "std_ext.h"
  1920. +#include "error_ext.h"
  1921. +#include "string_ext.h"
  1922. +#include "xx_ext.h"
  1923. +#include "endian_ext.h"
  1924. +#include "debug_ext.h"
  1925. +#include "crc_mac_addr_ext.h"
  1926. +
  1927. +#include "fm_common.h"
  1928. +#include "dtsec.h"
  1929. +#include "fsl_fman_dtsec.h"
  1930. +#include "fsl_fman_dtsec_mii_acc.h"
  1931. +
  1932. +/*****************************************************************************/
  1933. +/* Internal routines */
  1934. +/*****************************************************************************/
  1935. +
  1936. +static t_Error CheckInitParameters(t_Dtsec *p_Dtsec)
  1937. +{
  1938. + if (ENET_SPEED_FROM_MODE(p_Dtsec->enetMode) >= e_ENET_SPEED_10000)
  1939. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet 1G MAC driver only supports 1G or lower speeds"));
  1940. + if (p_Dtsec->macId >= FM_MAX_NUM_OF_1G_MACS)
  1941. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("macId can not be greater than the number of 1G MACs"));
  1942. + if (p_Dtsec->addr == 0)
  1943. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC Must have a valid MAC Address"));
  1944. + if ((ENET_SPEED_FROM_MODE(p_Dtsec->enetMode) >= e_ENET_SPEED_1000) &&
  1945. + p_Dtsec->p_DtsecDriverParam->halfdup_on)
  1946. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC 1G can't work in half duplex"));
  1947. + if (p_Dtsec->p_DtsecDriverParam->halfdup_on && (p_Dtsec->p_DtsecDriverParam)->loopback)
  1948. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("LoopBack is not supported in halfDuplex mode"));
  1949. +#ifdef FM_RX_PREAM_4_ERRATA_DTSEC_A001
  1950. + if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev <= 6) /* fixed for rev3 */
  1951. + if (p_Dtsec->p_DtsecDriverParam->rx_preamble)
  1952. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("preambleRxEn"));
  1953. +#endif /* FM_RX_PREAM_4_ERRATA_DTSEC_A001 */
  1954. + if (((p_Dtsec->p_DtsecDriverParam)->tx_preamble || (p_Dtsec->p_DtsecDriverParam)->rx_preamble) &&( (p_Dtsec->p_DtsecDriverParam)->preamble_len != 0x7))
  1955. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Preamble length should be 0x7 bytes"));
  1956. + if ((p_Dtsec->p_DtsecDriverParam)->halfdup_on &&
  1957. + (p_Dtsec->p_DtsecDriverParam->tx_time_stamp_en || p_Dtsec->p_DtsecDriverParam->rx_time_stamp_en))
  1958. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dTSEC in half duplex mode has to be with 1588 timeStamping diable"));
  1959. + if ((p_Dtsec->p_DtsecDriverParam)->rx_flow && (p_Dtsec->p_DtsecDriverParam)->rx_ctrl_acc )
  1960. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Receive control frame are not passed to the system memory so it can not be accept "));
  1961. + if ((p_Dtsec->p_DtsecDriverParam)->rx_prepend > MAX_PACKET_ALIGNMENT)
  1962. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("packetAlignmentPadding can't be greater than %d ",MAX_PACKET_ALIGNMENT ));
  1963. + if (((p_Dtsec->p_DtsecDriverParam)->non_back_to_back_ipg1 > MAX_INTER_PACKET_GAP) ||
  1964. + ((p_Dtsec->p_DtsecDriverParam)->non_back_to_back_ipg2 > MAX_INTER_PACKET_GAP) ||
  1965. + ((p_Dtsec->p_DtsecDriverParam)->back_to_back_ipg > MAX_INTER_PACKET_GAP))
  1966. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inter packet gap can't be greater than %d ",MAX_INTER_PACKET_GAP ));
  1967. + if ((p_Dtsec->p_DtsecDriverParam)->halfdup_alt_backoff_val > MAX_INTER_PALTERNATE_BEB)
  1968. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("alternateBackoffVal can't be greater than %d ",MAX_INTER_PALTERNATE_BEB ));
  1969. + if ((p_Dtsec->p_DtsecDriverParam)->halfdup_retransmit > MAX_RETRANSMISSION)
  1970. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("maxRetransmission can't be greater than %d ",MAX_RETRANSMISSION ));
  1971. + if ((p_Dtsec->p_DtsecDriverParam)->halfdup_coll_window > MAX_COLLISION_WINDOW)
  1972. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("collisionWindow can't be greater than %d ",MAX_COLLISION_WINDOW ));
  1973. +
  1974. + /* If Auto negotiation process is disabled, need to */
  1975. + /* Set up the PHY using the MII Management Interface */
  1976. + if (p_Dtsec->p_DtsecDriverParam->tbipa > MAX_PHYS)
  1977. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, ("PHY address (should be 0-%d)", MAX_PHYS));
  1978. + if (!p_Dtsec->f_Exception)
  1979. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("uninitialized f_Exception"));
  1980. + if (!p_Dtsec->f_Event)
  1981. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("uninitialized f_Event"));
  1982. +
  1983. +#ifdef FM_LEN_CHECK_ERRATA_FMAN_SW002
  1984. + if (p_Dtsec->p_DtsecDriverParam->rx_len_check)
  1985. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("LengthCheck!"));
  1986. +#endif /* FM_LEN_CHECK_ERRATA_FMAN_SW002 */
  1987. +
  1988. + return E_OK;
  1989. +}
  1990. +
  1991. +/* ......................................................................... */
  1992. +
  1993. +static uint32_t GetMacAddrHashCode(uint64_t ethAddr)
  1994. +{
  1995. + uint32_t crc;
  1996. +
  1997. + /* CRC calculation */
  1998. + GET_MAC_ADDR_CRC(ethAddr, crc);
  1999. +
  2000. + crc = GetMirror32(crc);
  2001. +
  2002. + return crc;
  2003. +}
  2004. +
  2005. +/* ......................................................................... */
  2006. +
  2007. +static void UpdateStatistics(t_Dtsec *p_Dtsec)
  2008. +{
  2009. + uint32_t car1, car2;
  2010. +
  2011. + fman_dtsec_get_clear_carry_regs(p_Dtsec->p_MemMap, &car1, &car2);
  2012. +
  2013. + if (car1)
  2014. + {
  2015. + if (car1 & CAR1_TR64)
  2016. + p_Dtsec->internalStatistics.tr64 += VAL22BIT;
  2017. + if (car1 & CAR1_TR127)
  2018. + p_Dtsec->internalStatistics.tr127 += VAL22BIT;
  2019. + if (car1 & CAR1_TR255)
  2020. + p_Dtsec->internalStatistics.tr255 += VAL22BIT;
  2021. + if (car1 & CAR1_TR511)
  2022. + p_Dtsec->internalStatistics.tr511 += VAL22BIT;
  2023. + if (car1 & CAR1_TRK1)
  2024. + p_Dtsec->internalStatistics.tr1k += VAL22BIT;
  2025. + if (car1 & CAR1_TRMAX)
  2026. + p_Dtsec->internalStatistics.trmax += VAL22BIT;
  2027. + if (car1 & CAR1_TRMGV)
  2028. + p_Dtsec->internalStatistics.trmgv += VAL22BIT;
  2029. + if (car1 & CAR1_RBYT)
  2030. + p_Dtsec->internalStatistics.rbyt += (uint64_t)VAL32BIT;
  2031. + if (car1 & CAR1_RPKT)
  2032. + p_Dtsec->internalStatistics.rpkt += VAL22BIT;
  2033. + if (car1 & CAR1_RMCA)
  2034. + p_Dtsec->internalStatistics.rmca += VAL22BIT;
  2035. + if (car1 & CAR1_RBCA)
  2036. + p_Dtsec->internalStatistics.rbca += VAL22BIT;
  2037. + if (car1 & CAR1_RXPF)
  2038. + p_Dtsec->internalStatistics.rxpf += VAL16BIT;
  2039. + if (car1 & CAR1_RALN)
  2040. + p_Dtsec->internalStatistics.raln += VAL16BIT;
  2041. + if (car1 & CAR1_RFLR)
  2042. + p_Dtsec->internalStatistics.rflr += VAL16BIT;
  2043. + if (car1 & CAR1_RCDE)
  2044. + p_Dtsec->internalStatistics.rcde += VAL16BIT;
  2045. + if (car1 & CAR1_RCSE)
  2046. + p_Dtsec->internalStatistics.rcse += VAL16BIT;
  2047. + if (car1 & CAR1_RUND)
  2048. + p_Dtsec->internalStatistics.rund += VAL16BIT;
  2049. + if (car1 & CAR1_ROVR)
  2050. + p_Dtsec->internalStatistics.rovr += VAL16BIT;
  2051. + if (car1 & CAR1_RFRG)
  2052. + p_Dtsec->internalStatistics.rfrg += VAL16BIT;
  2053. + if (car1 & CAR1_RJBR)
  2054. + p_Dtsec->internalStatistics.rjbr += VAL16BIT;
  2055. + if (car1 & CAR1_RDRP)
  2056. + p_Dtsec->internalStatistics.rdrp += VAL16BIT;
  2057. + }
  2058. + if (car2)
  2059. + {
  2060. + if (car2 & CAR2_TFCS)
  2061. + p_Dtsec->internalStatistics.tfcs += VAL12BIT;
  2062. + if (car2 & CAR2_TBYT)
  2063. + p_Dtsec->internalStatistics.tbyt += (uint64_t)VAL32BIT;
  2064. + if (car2 & CAR2_TPKT)
  2065. + p_Dtsec->internalStatistics.tpkt += VAL22BIT;
  2066. + if (car2 & CAR2_TMCA)
  2067. + p_Dtsec->internalStatistics.tmca += VAL22BIT;
  2068. + if (car2 & CAR2_TBCA)
  2069. + p_Dtsec->internalStatistics.tbca += VAL22BIT;
  2070. + if (car2 & CAR2_TXPF)
  2071. + p_Dtsec->internalStatistics.txpf += VAL16BIT;
  2072. + if (car2 & CAR2_TDRP)
  2073. + p_Dtsec->internalStatistics.tdrp += VAL16BIT;
  2074. + }
  2075. +}
  2076. +
  2077. +/* .............................................................................. */
  2078. +
  2079. +static uint16_t DtsecGetMaxFrameLength(t_Handle h_Dtsec)
  2080. +{
  2081. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2082. +
  2083. + SANITY_CHECK_RETURN_VALUE(p_Dtsec, E_INVALID_HANDLE, 0);
  2084. + SANITY_CHECK_RETURN_VALUE(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE, 0);
  2085. +
  2086. + return fman_dtsec_get_max_frame_len(p_Dtsec->p_MemMap);
  2087. +}
  2088. +
  2089. +/* .............................................................................. */
  2090. +
  2091. +static void DtsecIsr(t_Handle h_Dtsec)
  2092. +{
  2093. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2094. + uint32_t event;
  2095. + struct dtsec_regs *p_DtsecMemMap = p_Dtsec->p_MemMap;
  2096. +
  2097. + /* do not handle MDIO events */
  2098. + event = fman_dtsec_get_event(p_DtsecMemMap, (uint32_t)(~(DTSEC_IMASK_MMRDEN | DTSEC_IMASK_MMWREN)));
  2099. +
  2100. + event &= fman_dtsec_get_interrupt_mask(p_DtsecMemMap);
  2101. +
  2102. + fman_dtsec_ack_event(p_DtsecMemMap, event);
  2103. +
  2104. + if (event & DTSEC_IMASK_BREN)
  2105. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_BAB_RX);
  2106. + if (event & DTSEC_IMASK_RXCEN)
  2107. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_RX_CTL);
  2108. + if (event & DTSEC_IMASK_MSROEN)
  2109. + UpdateStatistics(p_Dtsec);
  2110. + if (event & DTSEC_IMASK_GTSCEN)
  2111. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET);
  2112. + if (event & DTSEC_IMASK_BTEN)
  2113. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_BAB_TX);
  2114. + if (event & DTSEC_IMASK_TXCEN)
  2115. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_CTL);
  2116. + if (event & DTSEC_IMASK_TXEEN)
  2117. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_ERR);
  2118. + if (event & DTSEC_IMASK_LCEN)
  2119. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_LATE_COL);
  2120. + if (event & DTSEC_IMASK_CRLEN)
  2121. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_COL_RET_LMT);
  2122. + if (event & DTSEC_IMASK_XFUNEN)
  2123. + {
  2124. +#ifdef FM_TX_LOCKUP_ERRATA_DTSEC6
  2125. + if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
  2126. + {
  2127. + uint32_t tpkt1, tmpReg1, tpkt2, tmpReg2, i;
  2128. + /* a. Write 0x00E0_0C00 to DTSEC_ID */
  2129. + /* This is a read only regidter */
  2130. +
  2131. + /* b. Read and save the value of TPKT */
  2132. + tpkt1 = GET_UINT32(p_DtsecMemMap->tpkt);
  2133. +
  2134. + /* c. Read the register at dTSEC address offset 0x32C */
  2135. + tmpReg1 = GET_UINT32(*(uint32_t*)((uint8_t*)p_DtsecMemMap + 0x32c));
  2136. +
  2137. + /* d. Compare bits [9:15] to bits [25:31] of the register at address offset 0x32C. */
  2138. + if ((tmpReg1 & 0x007F0000) != (tmpReg1 & 0x0000007F))
  2139. + {
  2140. + /* If they are not equal, save the value of this register and wait for at least
  2141. + * MAXFRM*16 ns */
  2142. + XX_UDelay((uint32_t)(MIN(DtsecGetMaxFrameLength(p_Dtsec)*16/1000, 1)));
  2143. + }
  2144. +
  2145. + /* e. Read and save TPKT again and read the register at dTSEC address offset
  2146. + 0x32C again*/
  2147. + tpkt2 = GET_UINT32(p_DtsecMemMap->tpkt);
  2148. + tmpReg2 = GET_UINT32(*(uint32_t*)((uint8_t*)p_DtsecMemMap + 0x32c));
  2149. +
  2150. + /* f. Compare the value of TPKT saved in step b to value read in step e. Also
  2151. + compare bits [9:15] of the register at offset 0x32C saved in step d to the value
  2152. + of bits [9:15] saved in step e. If the two registers values are unchanged, then
  2153. + the transmit portion of the dTSEC controller is locked up and the user should
  2154. + proceed to the recover sequence. */
  2155. + if ((tpkt1 == tpkt2) && ((tmpReg1 & 0x007F0000) == (tmpReg2 & 0x007F0000)))
  2156. + {
  2157. + /* recover sequence */
  2158. +
  2159. + /* a.Write a 1 to RCTRL[GRS]*/
  2160. +
  2161. + WRITE_UINT32(p_DtsecMemMap->rctrl, GET_UINT32(p_DtsecMemMap->rctrl) | RCTRL_GRS);
  2162. +
  2163. + /* b.Wait until IEVENT[GRSC]=1, or at least 100 us has elapsed. */
  2164. + for (i = 0 ; i < 100 ; i++ )
  2165. + {
  2166. + if (GET_UINT32(p_DtsecMemMap->ievent) & DTSEC_IMASK_GRSCEN)
  2167. + break;
  2168. + XX_UDelay(1);
  2169. + }
  2170. + if (GET_UINT32(p_DtsecMemMap->ievent) & DTSEC_IMASK_GRSCEN)
  2171. + WRITE_UINT32(p_DtsecMemMap->ievent, DTSEC_IMASK_GRSCEN);
  2172. + else
  2173. + DBG(INFO,("Rx lockup due to dTSEC Tx lockup"));
  2174. +
  2175. + /* c.Write a 1 to bit n of FM_RSTC (offset 0x0CC of FPM)*/
  2176. + FmResetMac(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MAC_1G, p_Dtsec->fmMacControllerDriver.macId);
  2177. +
  2178. + /* d.Wait 4 Tx clocks (32 ns) */
  2179. + XX_UDelay(1);
  2180. +
  2181. + /* e.Write a 0 to bit n of FM_RSTC. */
  2182. + /* cleared by FMAN */
  2183. + }
  2184. + }
  2185. +#endif /* FM_TX_LOCKUP_ERRATA_DTSEC6 */
  2186. +
  2187. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_FIFO_UNDRN);
  2188. + }
  2189. + if (event & DTSEC_IMASK_MAGEN)
  2190. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_MAG_PCKT);
  2191. + if (event & DTSEC_IMASK_GRSCEN)
  2192. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET);
  2193. + if (event & DTSEC_IMASK_TDPEEN)
  2194. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_DATA_ERR);
  2195. + if (event & DTSEC_IMASK_RDPEEN)
  2196. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_RX_DATA_ERR);
  2197. +
  2198. + /* - masked interrupts */
  2199. + ASSERT_COND(!(event & DTSEC_IMASK_ABRTEN));
  2200. + ASSERT_COND(!(event & DTSEC_IMASK_IFERREN));
  2201. +}
  2202. +
  2203. +static void DtsecMdioIsr(t_Handle h_Dtsec)
  2204. +{
  2205. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2206. + uint32_t event;
  2207. + struct dtsec_regs *p_DtsecMemMap = p_Dtsec->p_MemMap;
  2208. +
  2209. + event = GET_UINT32(p_DtsecMemMap->ievent);
  2210. + /* handle only MDIO events */
  2211. + event &= (DTSEC_IMASK_MMRDEN | DTSEC_IMASK_MMWREN);
  2212. + if (event)
  2213. + {
  2214. + event &= GET_UINT32(p_DtsecMemMap->imask);
  2215. +
  2216. + WRITE_UINT32(p_DtsecMemMap->ievent, event);
  2217. +
  2218. + if (event & DTSEC_IMASK_MMRDEN)
  2219. + p_Dtsec->f_Event(p_Dtsec->h_App, e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET);
  2220. + if (event & DTSEC_IMASK_MMWREN)
  2221. + p_Dtsec->f_Event(p_Dtsec->h_App, e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET);
  2222. + }
  2223. +}
  2224. +
  2225. +static void Dtsec1588Isr(t_Handle h_Dtsec)
  2226. +{
  2227. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2228. + uint32_t event;
  2229. + struct dtsec_regs *p_DtsecMemMap = p_Dtsec->p_MemMap;
  2230. +
  2231. + if (p_Dtsec->ptpTsuEnabled)
  2232. + {
  2233. + event = fman_dtsec_check_and_clear_tmr_event(p_DtsecMemMap);
  2234. +
  2235. + if (event)
  2236. + {
  2237. + ASSERT_COND(event & TMR_PEVENT_TSRE);
  2238. + p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_1588_TS_RX_ERR);
  2239. + }
  2240. + }
  2241. +}
  2242. +
  2243. +/* ........................................................................... */
  2244. +
  2245. +static void FreeInitResources(t_Dtsec *p_Dtsec)
  2246. +{
  2247. + if (p_Dtsec->mdioIrq != NO_IRQ)
  2248. + {
  2249. + XX_DisableIntr(p_Dtsec->mdioIrq);
  2250. + XX_FreeIntr(p_Dtsec->mdioIrq);
  2251. + }
  2252. + FmUnregisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Dtsec->macId, e_FM_INTR_TYPE_ERR);
  2253. + FmUnregisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Dtsec->macId, e_FM_INTR_TYPE_NORMAL);
  2254. +
  2255. + /* release the driver's group hash table */
  2256. + FreeHashTable(p_Dtsec->p_MulticastAddrHash);
  2257. + p_Dtsec->p_MulticastAddrHash = NULL;
  2258. +
  2259. + /* release the driver's individual hash table */
  2260. + FreeHashTable(p_Dtsec->p_UnicastAddrHash);
  2261. + p_Dtsec->p_UnicastAddrHash = NULL;
  2262. +}
  2263. +
  2264. +/* ........................................................................... */
  2265. +
  2266. +static t_Error GracefulStop(t_Dtsec *p_Dtsec, e_CommMode mode)
  2267. +{
  2268. + struct dtsec_regs *p_MemMap;
  2269. +
  2270. + ASSERT_COND(p_Dtsec);
  2271. +
  2272. + p_MemMap = p_Dtsec->p_MemMap;
  2273. + ASSERT_COND(p_MemMap);
  2274. +
  2275. + /* Assert the graceful transmit stop bit */
  2276. + if (mode & e_COMM_MODE_RX)
  2277. + {
  2278. + fman_dtsec_stop_rx(p_MemMap);
  2279. +
  2280. +#ifdef FM_GRS_ERRATA_DTSEC_A002
  2281. + if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
  2282. + XX_UDelay(100);
  2283. +#else /* FM_GRS_ERRATA_DTSEC_A002 */
  2284. +#ifdef FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839
  2285. + XX_UDelay(10);
  2286. +#endif /* FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839 */
  2287. +#endif /* FM_GRS_ERRATA_DTSEC_A002 */
  2288. + }
  2289. +
  2290. + if (mode & e_COMM_MODE_TX)
  2291. +#if defined(FM_GTS_ERRATA_DTSEC_A004) || defined(FM_GTS_AFTER_MAC_ABORTED_FRAME_ERRATA_DTSEC_A0012)
  2292. + if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
  2293. + DBG(INFO, ("GTS not supported due to DTSEC_A004 errata."));
  2294. +#else /* not defined(FM_GTS_ERRATA_DTSEC_A004) ||... */
  2295. +#ifdef FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014
  2296. + DBG(INFO, ("GTS not supported due to DTSEC_A0014 errata."));
  2297. +#else /* FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014 */
  2298. + fman_dtsec_stop_tx(p_MemMap);
  2299. +#endif /* FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014 */
  2300. +#endif /* defined(FM_GTS_ERRATA_DTSEC_A004) ||... */
  2301. +
  2302. + return E_OK;
  2303. +}
  2304. +
  2305. +/* .............................................................................. */
  2306. +
  2307. +static t_Error GracefulRestart(t_Dtsec *p_Dtsec, e_CommMode mode)
  2308. +{
  2309. + struct dtsec_regs *p_MemMap;
  2310. +
  2311. + ASSERT_COND(p_Dtsec);
  2312. + p_MemMap = p_Dtsec->p_MemMap;
  2313. + ASSERT_COND(p_MemMap);
  2314. +
  2315. + /* clear the graceful receive stop bit */
  2316. + if (mode & e_COMM_MODE_TX)
  2317. + fman_dtsec_start_tx(p_MemMap);
  2318. +
  2319. + if (mode & e_COMM_MODE_RX)
  2320. + fman_dtsec_start_rx(p_MemMap);
  2321. +
  2322. + return E_OK;
  2323. +}
  2324. +
  2325. +
  2326. +/*****************************************************************************/
  2327. +/* dTSEC Configs modification functions */
  2328. +/*****************************************************************************/
  2329. +
  2330. +/* .............................................................................. */
  2331. +
  2332. +static t_Error DtsecConfigLoopback(t_Handle h_Dtsec, bool newVal)
  2333. +{
  2334. +
  2335. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2336. +
  2337. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2338. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2339. +
  2340. + p_Dtsec->p_DtsecDriverParam->loopback = newVal;
  2341. +
  2342. + return E_OK;
  2343. +}
  2344. +
  2345. +/* .............................................................................. */
  2346. +
  2347. +static t_Error DtsecConfigMaxFrameLength(t_Handle h_Dtsec, uint16_t newVal)
  2348. +{
  2349. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2350. +
  2351. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2352. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2353. +
  2354. + p_Dtsec->p_DtsecDriverParam->maximum_frame = newVal;
  2355. +
  2356. + return E_OK;
  2357. +}
  2358. +
  2359. +/* .............................................................................. */
  2360. +
  2361. +static t_Error DtsecConfigPadAndCrc(t_Handle h_Dtsec, bool newVal)
  2362. +{
  2363. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2364. +
  2365. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2366. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2367. +
  2368. + p_Dtsec->p_DtsecDriverParam->tx_pad_crc = newVal;
  2369. +
  2370. + return E_OK;
  2371. +}
  2372. +
  2373. +/* .............................................................................. */
  2374. +
  2375. +static t_Error DtsecConfigHalfDuplex(t_Handle h_Dtsec, bool newVal)
  2376. +{
  2377. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2378. +
  2379. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2380. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2381. +
  2382. + p_Dtsec->p_DtsecDriverParam->halfdup_on = newVal;
  2383. +
  2384. + return E_OK;
  2385. +}
  2386. +
  2387. +/* .............................................................................. */
  2388. +
  2389. +static t_Error DtsecConfigTbiPhyAddr(t_Handle h_Dtsec, uint8_t newVal)
  2390. +{
  2391. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2392. +
  2393. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2394. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2395. +
  2396. + p_Dtsec->p_DtsecDriverParam->tbi_phy_addr = newVal;
  2397. +
  2398. + return E_OK;
  2399. +}
  2400. +
  2401. +/* .............................................................................. */
  2402. +
  2403. +static t_Error DtsecConfigLengthCheck(t_Handle h_Dtsec, bool newVal)
  2404. +{
  2405. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2406. +
  2407. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2408. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2409. +
  2410. + p_Dtsec->p_DtsecDriverParam->rx_len_check = newVal;
  2411. +
  2412. + return E_OK;
  2413. +}
  2414. +
  2415. +/* .............................................................................. */
  2416. +
  2417. +static t_Error DtsecConfigException(t_Handle h_Dtsec, e_FmMacExceptions exception, bool enable)
  2418. +{
  2419. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2420. + uint32_t bitMask = 0;
  2421. +
  2422. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2423. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2424. +
  2425. + if (exception != e_FM_MAC_EX_1G_1588_TS_RX_ERR)
  2426. + {
  2427. + GET_EXCEPTION_FLAG(bitMask, exception);
  2428. + if (bitMask)
  2429. + {
  2430. + if (enable)
  2431. + p_Dtsec->exceptions |= bitMask;
  2432. + else
  2433. + p_Dtsec->exceptions &= ~bitMask;
  2434. + }
  2435. + else
  2436. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  2437. + }
  2438. + else
  2439. + {
  2440. + if (!p_Dtsec->ptpTsuEnabled)
  2441. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exception valid for 1588 only"));
  2442. +
  2443. + if (enable)
  2444. + p_Dtsec->enTsuErrExeption = TRUE;
  2445. + else
  2446. + p_Dtsec->enTsuErrExeption = FALSE;
  2447. + }
  2448. +
  2449. + return E_OK;
  2450. +}
  2451. +
  2452. +
  2453. +/*****************************************************************************/
  2454. +/* dTSEC Run Time API functions */
  2455. +/*****************************************************************************/
  2456. +
  2457. +/* .............................................................................. */
  2458. +
  2459. +static t_Error DtsecEnable(t_Handle h_Dtsec, e_CommMode mode)
  2460. +{
  2461. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2462. +
  2463. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2464. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2465. +
  2466. + fman_dtsec_enable(p_Dtsec->p_MemMap,
  2467. + (bool)!!(mode & e_COMM_MODE_RX),
  2468. + (bool)!!(mode & e_COMM_MODE_TX));
  2469. +
  2470. + GracefulRestart(p_Dtsec, mode);
  2471. +
  2472. + return E_OK;
  2473. +}
  2474. +
  2475. +/* .............................................................................. */
  2476. +
  2477. +static t_Error DtsecDisable (t_Handle h_Dtsec, e_CommMode mode)
  2478. +{
  2479. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2480. +
  2481. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2482. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2483. +
  2484. + GracefulStop(p_Dtsec, mode);
  2485. +
  2486. + fman_dtsec_disable(p_Dtsec->p_MemMap,
  2487. + (bool)!!(mode & e_COMM_MODE_RX),
  2488. + (bool)!!(mode & e_COMM_MODE_TX));
  2489. +
  2490. + return E_OK;
  2491. +}
  2492. +
  2493. +/* .............................................................................. */
  2494. +
  2495. +static t_Error DtsecSetTxPauseFrames(t_Handle h_Dtsec,
  2496. + uint8_t priority,
  2497. + uint16_t pauseTime,
  2498. + uint16_t threshTime)
  2499. +{
  2500. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2501. +
  2502. + UNUSED(priority);UNUSED(threshTime);
  2503. +
  2504. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
  2505. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2506. +
  2507. +#ifdef FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003
  2508. + if (p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
  2509. + if (0 < pauseTime && pauseTime <= 320)
  2510. + RETURN_ERROR(MINOR, E_INVALID_VALUE,
  2511. + ("This pause-time value of %d is illegal due to errata dTSEC-A003!"
  2512. + " value should be greater than 320."));
  2513. +#endif /* FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003 */
  2514. +
  2515. + fman_dtsec_set_tx_pause_frames(p_Dtsec->p_MemMap, pauseTime);
  2516. + return E_OK;
  2517. +}
  2518. +
  2519. +/* .............................................................................. */
  2520. +/* backward compatibility. will be removed in the future. */
  2521. +static t_Error DtsecTxMacPause(t_Handle h_Dtsec, uint16_t pauseTime)
  2522. +{
  2523. + return DtsecSetTxPauseFrames(h_Dtsec, 0, pauseTime, 0);
  2524. +}
  2525. +
  2526. +/* .............................................................................. */
  2527. +
  2528. +static t_Error DtsecRxIgnoreMacPause(t_Handle h_Dtsec, bool en)
  2529. +{
  2530. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2531. + bool accept_pause = !en;
  2532. +
  2533. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
  2534. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2535. +
  2536. + fman_dtsec_handle_rx_pause(p_Dtsec->p_MemMap, accept_pause);
  2537. +
  2538. + return E_OK;
  2539. +}
  2540. +
  2541. +/* .............................................................................. */
  2542. +
  2543. +static t_Error DtsecEnable1588TimeStamp(t_Handle h_Dtsec)
  2544. +{
  2545. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2546. +
  2547. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2548. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2549. +
  2550. + p_Dtsec->ptpTsuEnabled = TRUE;
  2551. + fman_dtsec_set_ts(p_Dtsec->p_MemMap, TRUE);
  2552. +
  2553. + return E_OK;
  2554. +}
  2555. +
  2556. +/* .............................................................................. */
  2557. +
  2558. +static t_Error DtsecDisable1588TimeStamp(t_Handle h_Dtsec)
  2559. +{
  2560. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2561. +
  2562. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2563. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2564. +
  2565. + p_Dtsec->ptpTsuEnabled = FALSE;
  2566. + fman_dtsec_set_ts(p_Dtsec->p_MemMap, FALSE);
  2567. +
  2568. + return E_OK;
  2569. +}
  2570. +
  2571. +/* .............................................................................. */
  2572. +
  2573. +static t_Error DtsecGetStatistics(t_Handle h_Dtsec, t_FmMacStatistics *p_Statistics)
  2574. +{
  2575. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2576. + struct dtsec_regs *p_DtsecMemMap;
  2577. +
  2578. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2579. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2580. + SANITY_CHECK_RETURN_ERROR(p_Statistics, E_NULL_POINTER);
  2581. +
  2582. + p_DtsecMemMap = p_Dtsec->p_MemMap;
  2583. +
  2584. + if (p_Dtsec->statisticsLevel == e_FM_MAC_NONE_STATISTICS)
  2585. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Statistics disabled"));
  2586. +
  2587. + memset(p_Statistics, 0xff, sizeof(t_FmMacStatistics));
  2588. +
  2589. + if (p_Dtsec->statisticsLevel == e_FM_MAC_FULL_STATISTICS)
  2590. + {
  2591. + p_Statistics->eStatPkts64 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR64)
  2592. + + p_Dtsec->internalStatistics.tr64;
  2593. + p_Statistics->eStatPkts65to127 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR127)
  2594. + + p_Dtsec->internalStatistics.tr127;
  2595. + p_Statistics->eStatPkts128to255 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR255)
  2596. + + p_Dtsec->internalStatistics.tr255;
  2597. + p_Statistics->eStatPkts256to511 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR511)
  2598. + + p_Dtsec->internalStatistics.tr511;
  2599. + p_Statistics->eStatPkts512to1023 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TR1K)
  2600. + + p_Dtsec->internalStatistics.tr1k;
  2601. + p_Statistics->eStatPkts1024to1518 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TRMAX)
  2602. + + p_Dtsec->internalStatistics.trmax;
  2603. + p_Statistics->eStatPkts1519to1522 = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TRMGV)
  2604. + + p_Dtsec->internalStatistics.trmgv;
  2605. +
  2606. + /* MIB II */
  2607. + p_Statistics->ifInOctets = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RBYT)
  2608. + + p_Dtsec->internalStatistics.rbyt;
  2609. + p_Statistics->ifInPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RPKT)
  2610. + + p_Dtsec->internalStatistics.rpkt;
  2611. + p_Statistics->ifInUcastPkts = 0;
  2612. + p_Statistics->ifInMcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RMCA)
  2613. + + p_Dtsec->internalStatistics.rmca;
  2614. + p_Statistics->ifInBcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RBCA)
  2615. + + p_Dtsec->internalStatistics.rbca;
  2616. + p_Statistics->ifOutOctets = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TBYT)
  2617. + + p_Dtsec->internalStatistics.tbyt;
  2618. + p_Statistics->ifOutPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TPKT)
  2619. + + p_Dtsec->internalStatistics.tpkt;
  2620. + p_Statistics->ifOutUcastPkts = 0;
  2621. + p_Statistics->ifOutMcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TMCA)
  2622. + + p_Dtsec->internalStatistics.tmca;
  2623. + p_Statistics->ifOutBcastPkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TBCA)
  2624. + + p_Dtsec->internalStatistics.tbca;
  2625. + }
  2626. +
  2627. + p_Statistics->eStatFragments = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RFRG)
  2628. + + p_Dtsec->internalStatistics.rfrg;
  2629. + p_Statistics->eStatJabbers = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RJBR)
  2630. + + p_Dtsec->internalStatistics.rjbr;
  2631. + p_Statistics->eStatsDropEvents = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RDRP)
  2632. + + p_Dtsec->internalStatistics.rdrp;
  2633. + p_Statistics->eStatCRCAlignErrors = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RALN)
  2634. + + p_Dtsec->internalStatistics.raln;
  2635. + p_Statistics->eStatUndersizePkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RUND)
  2636. + + p_Dtsec->internalStatistics.rund;
  2637. + p_Statistics->eStatOversizePkts = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_ROVR)
  2638. + + p_Dtsec->internalStatistics.rovr;
  2639. + p_Statistics->reStatPause = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_RXPF)
  2640. + + p_Dtsec->internalStatistics.rxpf;
  2641. + p_Statistics->teStatPause = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TXPF)
  2642. + + p_Dtsec->internalStatistics.txpf;
  2643. + p_Statistics->ifInDiscards = p_Statistics->eStatsDropEvents;
  2644. + p_Statistics->ifInErrors = p_Statistics->eStatsDropEvents + p_Statistics->eStatCRCAlignErrors
  2645. + + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_RFLR) + p_Dtsec->internalStatistics.rflr
  2646. + + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_RCDE) + p_Dtsec->internalStatistics.rcde
  2647. + + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_RCSE) + p_Dtsec->internalStatistics.rcse;
  2648. +
  2649. + p_Statistics->ifOutDiscards = fman_dtsec_get_stat_counter(p_DtsecMemMap, E_DTSEC_STAT_TDRP)
  2650. + + p_Dtsec->internalStatistics.tdrp;
  2651. + p_Statistics->ifOutErrors = p_Statistics->ifOutDiscards /**< Number of frames transmitted with error: */
  2652. + + fman_dtsec_get_stat_counter(p_DtsecMemMap,E_DTSEC_STAT_TFCS)
  2653. + + p_Dtsec->internalStatistics.tfcs;
  2654. +
  2655. + return E_OK;
  2656. +}
  2657. +
  2658. +/* .............................................................................. */
  2659. +
  2660. +static t_Error DtsecModifyMacAddress (t_Handle h_Dtsec, t_EnetAddr *p_EnetAddr)
  2661. +{
  2662. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2663. +
  2664. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2665. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2666. +
  2667. + /* Initialize MAC Station Address registers (1 & 2) */
  2668. + /* Station address have to be swapped (big endian to little endian */
  2669. + p_Dtsec->addr = ENET_ADDR_TO_UINT64(*p_EnetAddr);
  2670. + fman_dtsec_set_mac_address(p_Dtsec->p_MemMap, (uint8_t *)(*p_EnetAddr));
  2671. +
  2672. + return E_OK;
  2673. +}
  2674. +
  2675. +/* .............................................................................. */
  2676. +
  2677. +static t_Error DtsecResetCounters (t_Handle h_Dtsec)
  2678. +{
  2679. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2680. +
  2681. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2682. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2683. +
  2684. + /* clear HW counters */
  2685. + fman_dtsec_reset_stat(p_Dtsec->p_MemMap);
  2686. +
  2687. + /* clear SW counters holding carries */
  2688. + memset(&p_Dtsec->internalStatistics, 0, sizeof(t_InternalStatistics));
  2689. +
  2690. + return E_OK;
  2691. +}
  2692. +
  2693. +/* .............................................................................. */
  2694. +
  2695. +static t_Error DtsecAddExactMatchMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
  2696. +{
  2697. + t_Dtsec *p_Dtsec = (t_Dtsec *) h_Dtsec;
  2698. + uint64_t ethAddr;
  2699. + uint8_t paddrNum;
  2700. +
  2701. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2702. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2703. +
  2704. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  2705. +
  2706. + if (ethAddr & GROUP_ADDRESS)
  2707. + /* Multicast address has no effect in PADDR */
  2708. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Multicast address"));
  2709. +
  2710. + /* Make sure no PADDR contains this address */
  2711. + for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
  2712. + if (p_Dtsec->indAddrRegUsed[paddrNum])
  2713. + if (p_Dtsec->paddr[paddrNum] == ethAddr)
  2714. + RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
  2715. +
  2716. + /* Find first unused PADDR */
  2717. + for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
  2718. + if (!(p_Dtsec->indAddrRegUsed[paddrNum]))
  2719. + {
  2720. + /* mark this PADDR as used */
  2721. + p_Dtsec->indAddrRegUsed[paddrNum] = TRUE;
  2722. + /* store address */
  2723. + p_Dtsec->paddr[paddrNum] = ethAddr;
  2724. +
  2725. + /* put in hardware */
  2726. + fman_dtsec_add_addr_in_paddr(p_Dtsec->p_MemMap, (uint64_t)PTR_TO_UINT(&ethAddr), paddrNum);
  2727. + p_Dtsec->numOfIndAddrInRegs++;
  2728. +
  2729. + return E_OK;
  2730. + }
  2731. +
  2732. + /* No free PADDR */
  2733. + RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
  2734. +}
  2735. +
  2736. +/* .............................................................................. */
  2737. +
  2738. +static t_Error DtsecDelExactMatchMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
  2739. +{
  2740. + t_Dtsec *p_Dtsec = (t_Dtsec *) h_Dtsec;
  2741. + uint64_t ethAddr;
  2742. + uint8_t paddrNum;
  2743. +
  2744. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2745. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2746. +
  2747. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  2748. +
  2749. + /* Find used PADDR containing this address */
  2750. + for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
  2751. + {
  2752. + if ((p_Dtsec->indAddrRegUsed[paddrNum]) &&
  2753. + (p_Dtsec->paddr[paddrNum] == ethAddr))
  2754. + {
  2755. + /* mark this PADDR as not used */
  2756. + p_Dtsec->indAddrRegUsed[paddrNum] = FALSE;
  2757. + /* clear in hardware */
  2758. + fman_dtsec_clear_addr_in_paddr(p_Dtsec->p_MemMap, paddrNum);
  2759. + p_Dtsec->numOfIndAddrInRegs--;
  2760. +
  2761. + return E_OK;
  2762. + }
  2763. + }
  2764. +
  2765. + RETURN_ERROR(MAJOR, E_NOT_FOUND, NO_MSG);
  2766. +}
  2767. +
  2768. +/* .............................................................................. */
  2769. +
  2770. +static t_Error DtsecAddHashMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
  2771. +{
  2772. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2773. + t_EthHashEntry *p_HashEntry;
  2774. + uint64_t ethAddr;
  2775. + int32_t bucket;
  2776. + uint32_t crc;
  2777. + bool mcast, ghtx;
  2778. +
  2779. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2780. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2781. +
  2782. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  2783. +
  2784. + ghtx = (bool)((fman_dtsec_get_rctrl(p_Dtsec->p_MemMap) & RCTRL_GHTX) ? TRUE : FALSE);
  2785. + mcast = (bool)((ethAddr & MAC_GROUP_ADDRESS) ? TRUE : FALSE);
  2786. +
  2787. + if (ghtx && !mcast) /* Cannot handle unicast mac addr when GHTX is on */
  2788. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Could not compute hash bucket"));
  2789. +
  2790. + crc = GetMacAddrHashCode(ethAddr);
  2791. +
  2792. + /* considering the 9 highest order bits in crc H[8:0]:
  2793. + * if ghtx = 0 H[8:6] (highest order 3 bits) identify the hash register
  2794. + * and H[5:1] (next 5 bits) identify the hash bit
  2795. + * if ghts = 1 H[8:5] (highest order 4 bits) identify the hash register
  2796. + * and H[4:0] (next 5 bits) identify the hash bit.
  2797. + *
  2798. + * In bucket index output the low 5 bits identify the hash register bit,
  2799. + * while the higher 4 bits identify the hash register
  2800. + */
  2801. +
  2802. + if (ghtx)
  2803. + bucket = (int32_t)((crc >> 23) & 0x1ff);
  2804. + else {
  2805. + bucket = (int32_t)((crc >> 24) & 0xff);
  2806. + /* if !ghtx and mcast the bit must be set in gaddr instead of igaddr. */
  2807. + if (mcast)
  2808. + bucket += 0x100;
  2809. + }
  2810. +
  2811. + fman_dtsec_set_bucket(p_Dtsec->p_MemMap, bucket, TRUE);
  2812. +
  2813. + /* Create element to be added to the driver hash table */
  2814. + p_HashEntry = (t_EthHashEntry *)XX_Malloc(sizeof(t_EthHashEntry));
  2815. + p_HashEntry->addr = ethAddr;
  2816. + INIT_LIST(&p_HashEntry->node);
  2817. +
  2818. + if (ethAddr & MAC_GROUP_ADDRESS)
  2819. + /* Group Address */
  2820. + LIST_AddToTail(&(p_HashEntry->node), &(p_Dtsec->p_MulticastAddrHash->p_Lsts[bucket]));
  2821. + else
  2822. + LIST_AddToTail(&(p_HashEntry->node), &(p_Dtsec->p_UnicastAddrHash->p_Lsts[bucket]));
  2823. +
  2824. + return E_OK;
  2825. +}
  2826. +
  2827. +/* .............................................................................. */
  2828. +
  2829. +static t_Error DtsecDelHashMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
  2830. +{
  2831. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2832. + t_List *p_Pos;
  2833. + t_EthHashEntry *p_HashEntry = NULL;
  2834. + uint64_t ethAddr;
  2835. + int32_t bucket;
  2836. + uint32_t crc;
  2837. + bool mcast, ghtx;
  2838. +
  2839. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2840. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2841. +
  2842. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  2843. +
  2844. + ghtx = (bool)((fman_dtsec_get_rctrl(p_Dtsec->p_MemMap) & RCTRL_GHTX) ? TRUE : FALSE);
  2845. + mcast = (bool)((ethAddr & MAC_GROUP_ADDRESS) ? TRUE : FALSE);
  2846. +
  2847. + if (ghtx && !mcast) /* Cannot handle unicast mac addr when GHTX is on */
  2848. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Could not compute hash bucket"));
  2849. +
  2850. + crc = GetMacAddrHashCode(ethAddr);
  2851. +
  2852. + if (ghtx)
  2853. + bucket = (int32_t)((crc >> 23) & 0x1ff);
  2854. + else {
  2855. + bucket = (int32_t)((crc >> 24) & 0xff);
  2856. + /* if !ghtx and mcast the bit must be set in gaddr instead of igaddr. */
  2857. + if (mcast)
  2858. + bucket += 0x100;
  2859. + }
  2860. +
  2861. + if (ethAddr & MAC_GROUP_ADDRESS)
  2862. + {
  2863. + /* Group Address */
  2864. + LIST_FOR_EACH(p_Pos, &(p_Dtsec->p_MulticastAddrHash->p_Lsts[bucket]))
  2865. + {
  2866. + p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
  2867. + if (p_HashEntry->addr == ethAddr)
  2868. + {
  2869. + LIST_DelAndInit(&p_HashEntry->node);
  2870. + XX_Free(p_HashEntry);
  2871. + break;
  2872. + }
  2873. + }
  2874. + if (LIST_IsEmpty(&p_Dtsec->p_MulticastAddrHash->p_Lsts[bucket]))
  2875. + fman_dtsec_set_bucket(p_Dtsec->p_MemMap, bucket, FALSE);
  2876. + }
  2877. + else
  2878. + {
  2879. + /* Individual Address */
  2880. + LIST_FOR_EACH(p_Pos, &(p_Dtsec->p_UnicastAddrHash->p_Lsts[bucket]))
  2881. + {
  2882. + p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
  2883. + if (p_HashEntry->addr == ethAddr)
  2884. + {
  2885. + LIST_DelAndInit(&p_HashEntry->node);
  2886. + XX_Free(p_HashEntry);
  2887. + break;
  2888. + }
  2889. + }
  2890. + if (LIST_IsEmpty(&p_Dtsec->p_UnicastAddrHash->p_Lsts[bucket]))
  2891. + fman_dtsec_set_bucket(p_Dtsec->p_MemMap, bucket, FALSE);
  2892. + }
  2893. +
  2894. + /* address does not exist */
  2895. + ASSERT_COND(p_HashEntry != NULL);
  2896. +
  2897. + return E_OK;
  2898. +}
  2899. +
  2900. +/* .............................................................................. */
  2901. +
  2902. +static t_Error DtsecSetPromiscuous(t_Handle h_Dtsec, bool newVal)
  2903. +{
  2904. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2905. +
  2906. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2907. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2908. +
  2909. + fman_dtsec_set_uc_promisc(p_Dtsec->p_MemMap, newVal);
  2910. + fman_dtsec_set_mc_promisc(p_Dtsec->p_MemMap, newVal);
  2911. +
  2912. + return E_OK;
  2913. +}
  2914. +
  2915. +/* .............................................................................. */
  2916. +
  2917. +static t_Error DtsecSetStatistics(t_Handle h_Dtsec, e_FmMacStatisticsLevel statisticsLevel)
  2918. +{
  2919. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2920. + t_Error err;
  2921. +
  2922. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2923. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2924. +
  2925. + p_Dtsec->statisticsLevel = statisticsLevel;
  2926. +
  2927. + err = (t_Error)fman_dtsec_set_stat_level(p_Dtsec->p_MemMap,
  2928. + (enum dtsec_stat_level)statisticsLevel);
  2929. + if (err != E_OK)
  2930. + return err;
  2931. +
  2932. + switch (statisticsLevel)
  2933. + {
  2934. + case (e_FM_MAC_NONE_STATISTICS):
  2935. + p_Dtsec->exceptions &= ~DTSEC_IMASK_MSROEN;
  2936. + break;
  2937. + case (e_FM_MAC_PARTIAL_STATISTICS):
  2938. + p_Dtsec->exceptions |= DTSEC_IMASK_MSROEN;
  2939. + break;
  2940. + case (e_FM_MAC_FULL_STATISTICS):
  2941. + p_Dtsec->exceptions |= DTSEC_IMASK_MSROEN;
  2942. + break;
  2943. + default:
  2944. + RETURN_ERROR(MINOR, E_INVALID_SELECTION, NO_MSG);
  2945. + }
  2946. +
  2947. + return E_OK;
  2948. +}
  2949. +
  2950. +/* .............................................................................. */
  2951. +
  2952. +static t_Error DtsecSetWakeOnLan(t_Handle h_Dtsec, bool en)
  2953. +{
  2954. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2955. +
  2956. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
  2957. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2958. +
  2959. + fman_dtsec_set_wol(p_Dtsec->p_MemMap, en);
  2960. +
  2961. + return E_OK;
  2962. +}
  2963. +
  2964. +/* .............................................................................. */
  2965. +
  2966. +static t_Error DtsecAdjustLink(t_Handle h_Dtsec, e_EnetSpeed speed, bool fullDuplex)
  2967. +{
  2968. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2969. + int err;
  2970. + enum enet_interface enet_interface;
  2971. + enum enet_speed enet_speed;
  2972. +
  2973. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2974. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2975. +
  2976. + p_Dtsec->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode), speed);
  2977. + enet_interface = (enum enet_interface) ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode);
  2978. + enet_speed = (enum enet_speed) ENET_SPEED_FROM_MODE(p_Dtsec->enetMode);
  2979. + p_Dtsec->halfDuplex = !fullDuplex;
  2980. +
  2981. + err = fman_dtsec_adjust_link(p_Dtsec->p_MemMap, enet_interface, enet_speed, fullDuplex);
  2982. +
  2983. + if (err == -EINVAL)
  2984. + RETURN_ERROR(MAJOR, E_CONFLICT, ("Ethernet interface does not support Half Duplex mode"));
  2985. +
  2986. + return (t_Error)err;
  2987. +}
  2988. +
  2989. +/* .............................................................................. */
  2990. +
  2991. +static t_Error DtsecRestartAutoneg(t_Handle h_Dtsec)
  2992. +{
  2993. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  2994. + uint16_t tmpReg16;
  2995. +
  2996. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  2997. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  2998. +
  2999. + DTSEC_MII_ReadPhyReg(p_Dtsec, p_Dtsec->tbi_phy_addr, 0, &tmpReg16);
  3000. +
  3001. + tmpReg16 &= ~( PHY_CR_SPEED0 | PHY_CR_SPEED1 );
  3002. + tmpReg16 |= (PHY_CR_ANE | PHY_CR_RESET_AN | PHY_CR_FULLDUPLEX | PHY_CR_SPEED1);
  3003. +
  3004. + DTSEC_MII_WritePhyReg(p_Dtsec, p_Dtsec->tbi_phy_addr, 0, tmpReg16);
  3005. +
  3006. + return E_OK;
  3007. +}
  3008. +
  3009. +/* .............................................................................. */
  3010. +
  3011. +static t_Error DtsecGetId(t_Handle h_Dtsec, uint32_t *macId)
  3012. +{
  3013. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  3014. +
  3015. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  3016. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  3017. +
  3018. + *macId = p_Dtsec->macId;
  3019. +
  3020. + return E_OK;
  3021. +}
  3022. +
  3023. +/* .............................................................................. */
  3024. +
  3025. +static t_Error DtsecGetVersion(t_Handle h_Dtsec, uint32_t *macVersion)
  3026. +{
  3027. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  3028. +
  3029. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  3030. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  3031. +
  3032. + *macVersion = fman_dtsec_get_revision(p_Dtsec->p_MemMap);
  3033. +
  3034. + return E_OK;
  3035. +}
  3036. +
  3037. +/* .............................................................................. */
  3038. +
  3039. +static t_Error DtsecSetException(t_Handle h_Dtsec, e_FmMacExceptions exception, bool enable)
  3040. +{
  3041. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  3042. + uint32_t bitMask = 0;
  3043. +
  3044. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  3045. + SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  3046. +
  3047. + if (exception != e_FM_MAC_EX_1G_1588_TS_RX_ERR)
  3048. + {
  3049. + GET_EXCEPTION_FLAG(bitMask, exception);
  3050. + if (bitMask)
  3051. + {
  3052. + if (enable)
  3053. + p_Dtsec->exceptions |= bitMask;
  3054. + else
  3055. + p_Dtsec->exceptions &= ~bitMask;
  3056. + }
  3057. + else
  3058. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  3059. +
  3060. + if (enable)
  3061. + fman_dtsec_enable_interrupt(p_Dtsec->p_MemMap, bitMask);
  3062. + else
  3063. + fman_dtsec_disable_interrupt(p_Dtsec->p_MemMap, bitMask);
  3064. + }
  3065. + else
  3066. + {
  3067. + if (!p_Dtsec->ptpTsuEnabled)
  3068. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exception valid for 1588 only"));
  3069. +
  3070. + if (enable)
  3071. + {
  3072. + p_Dtsec->enTsuErrExeption = TRUE;
  3073. + fman_dtsec_enable_tmr_interrupt(p_Dtsec->p_MemMap);
  3074. + }
  3075. + else
  3076. + {
  3077. + p_Dtsec->enTsuErrExeption = FALSE;
  3078. + fman_dtsec_disable_tmr_interrupt(p_Dtsec->p_MemMap);
  3079. + }
  3080. + }
  3081. +
  3082. + return E_OK;
  3083. +}
  3084. +
  3085. +
  3086. +/*****************************************************************************/
  3087. +/* dTSEC Init & Free API */
  3088. +/*****************************************************************************/
  3089. +
  3090. +/* .............................................................................. */
  3091. +
  3092. +static t_Error DtsecInit(t_Handle h_Dtsec)
  3093. +{
  3094. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  3095. + struct dtsec_cfg *p_DtsecDriverParam;
  3096. + t_Error err;
  3097. + uint16_t maxFrmLn;
  3098. + enum enet_interface enet_interface;
  3099. + enum enet_speed enet_speed;
  3100. + t_EnetAddr ethAddr;
  3101. +
  3102. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  3103. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
  3104. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->fmMacControllerDriver.h_Fm, E_INVALID_HANDLE);
  3105. +
  3106. + FM_GetRevision(p_Dtsec->fmMacControllerDriver.h_Fm, &p_Dtsec->fmMacControllerDriver.fmRevInfo);
  3107. + CHECK_INIT_PARAMETERS(p_Dtsec, CheckInitParameters);
  3108. +
  3109. + p_DtsecDriverParam = p_Dtsec->p_DtsecDriverParam;
  3110. + p_Dtsec->halfDuplex = p_DtsecDriverParam->halfdup_on;
  3111. +
  3112. + enet_interface = (enum enet_interface)ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode);
  3113. + enet_speed = (enum enet_speed)ENET_SPEED_FROM_MODE(p_Dtsec->enetMode);
  3114. + MAKE_ENET_ADDR_FROM_UINT64(p_Dtsec->addr, ethAddr);
  3115. +
  3116. + err = (t_Error)fman_dtsec_init(p_Dtsec->p_MemMap,
  3117. + p_DtsecDriverParam,
  3118. + enet_interface,
  3119. + enet_speed,
  3120. + (uint8_t*)ethAddr,
  3121. + p_Dtsec->fmMacControllerDriver.fmRevInfo.majorRev,
  3122. + p_Dtsec->fmMacControllerDriver.fmRevInfo.minorRev,
  3123. + p_Dtsec->exceptions);
  3124. + if (err)
  3125. + {
  3126. + FreeInitResources(p_Dtsec);
  3127. + RETURN_ERROR(MAJOR, err, ("This DTSEC version does not support the required i/f mode"));
  3128. + }
  3129. +
  3130. + if (ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode) == e_ENET_IF_SGMII)
  3131. + {
  3132. + uint16_t tmpReg16;
  3133. +
  3134. + /* Configure the TBI PHY Control Register */
  3135. + tmpReg16 = PHY_TBICON_CLK_SEL | PHY_TBICON_SRESET;
  3136. + DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 17, tmpReg16);
  3137. +
  3138. + tmpReg16 = PHY_TBICON_CLK_SEL;
  3139. + DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 17, tmpReg16);
  3140. +
  3141. + tmpReg16 = (PHY_CR_PHY_RESET | PHY_CR_ANE | PHY_CR_FULLDUPLEX | PHY_CR_SPEED1);
  3142. + DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 0, tmpReg16);
  3143. +
  3144. + if (p_Dtsec->enetMode & ENET_IF_SGMII_BASEX)
  3145. + tmpReg16 = PHY_TBIANA_1000X;
  3146. + else
  3147. + tmpReg16 = PHY_TBIANA_SGMII;
  3148. + DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 4, tmpReg16);
  3149. +
  3150. + tmpReg16 = (PHY_CR_ANE | PHY_CR_RESET_AN | PHY_CR_FULLDUPLEX | PHY_CR_SPEED1);
  3151. +
  3152. + DTSEC_MII_WritePhyReg(p_Dtsec, (uint8_t)p_DtsecDriverParam->tbipa, 0, tmpReg16);
  3153. + }
  3154. +
  3155. + /* Max Frame Length */
  3156. + maxFrmLn = fman_dtsec_get_max_frame_len(p_Dtsec->p_MemMap);
  3157. + err = FmSetMacMaxFrame(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MAC_1G,
  3158. + p_Dtsec->fmMacControllerDriver.macId, maxFrmLn);
  3159. + if (err)
  3160. + RETURN_ERROR(MINOR,err, NO_MSG);
  3161. +
  3162. + p_Dtsec->p_MulticastAddrHash = AllocHashTable(EXTENDED_HASH_TABLE_SIZE);
  3163. + if (!p_Dtsec->p_MulticastAddrHash) {
  3164. + FreeInitResources(p_Dtsec);
  3165. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MC hash table is FAILED"));
  3166. + }
  3167. +
  3168. + p_Dtsec->p_UnicastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
  3169. + if (!p_Dtsec->p_UnicastAddrHash)
  3170. + {
  3171. + FreeInitResources(p_Dtsec);
  3172. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("UC hash table is FAILED"));
  3173. + }
  3174. +
  3175. + /* register err intr handler for dtsec to FPM (err)*/
  3176. + FmRegisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm,
  3177. + e_FM_MOD_1G_MAC,
  3178. + p_Dtsec->macId,
  3179. + e_FM_INTR_TYPE_ERR,
  3180. + DtsecIsr,
  3181. + p_Dtsec);
  3182. + /* register 1588 intr handler for TMR to FPM (normal)*/
  3183. + FmRegisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm,
  3184. + e_FM_MOD_1G_MAC,
  3185. + p_Dtsec->macId,
  3186. + e_FM_INTR_TYPE_NORMAL,
  3187. + Dtsec1588Isr,
  3188. + p_Dtsec);
  3189. + /* register normal intr handler for dtsec to main interrupt controller. */
  3190. + if (p_Dtsec->mdioIrq != NO_IRQ)
  3191. + {
  3192. + XX_SetIntr(p_Dtsec->mdioIrq, DtsecMdioIsr, p_Dtsec);
  3193. + XX_EnableIntr(p_Dtsec->mdioIrq);
  3194. + }
  3195. +
  3196. + XX_Free(p_DtsecDriverParam);
  3197. + p_Dtsec->p_DtsecDriverParam = NULL;
  3198. +
  3199. + err = DtsecSetStatistics(h_Dtsec, e_FM_MAC_FULL_STATISTICS);
  3200. + if (err)
  3201. + {
  3202. + FreeInitResources(p_Dtsec);
  3203. + RETURN_ERROR(MAJOR, err, ("Undefined statistics level"));
  3204. + }
  3205. +
  3206. + return E_OK;
  3207. +}
  3208. +
  3209. +/* ........................................................................... */
  3210. +
  3211. +static t_Error DtsecFree(t_Handle h_Dtsec)
  3212. +{
  3213. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  3214. +
  3215. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  3216. +
  3217. + if (p_Dtsec->p_DtsecDriverParam)
  3218. + {
  3219. + /* Called after config */
  3220. + XX_Free(p_Dtsec->p_DtsecDriverParam);
  3221. + p_Dtsec->p_DtsecDriverParam = NULL;
  3222. + }
  3223. + else
  3224. + /* Called after init */
  3225. + FreeInitResources(p_Dtsec);
  3226. +
  3227. + XX_Free(p_Dtsec);
  3228. +
  3229. + return E_OK;
  3230. +}
  3231. +
  3232. +/* .............................................................................. */
  3233. +
  3234. +static void InitFmMacControllerDriver(t_FmMacControllerDriver *p_FmMacControllerDriver)
  3235. +{
  3236. + p_FmMacControllerDriver->f_FM_MAC_Init = DtsecInit;
  3237. + p_FmMacControllerDriver->f_FM_MAC_Free = DtsecFree;
  3238. +
  3239. + p_FmMacControllerDriver->f_FM_MAC_SetStatistics = DtsecSetStatistics;
  3240. + p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback = DtsecConfigLoopback;
  3241. + p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength = DtsecConfigMaxFrameLength;
  3242. +
  3243. + p_FmMacControllerDriver->f_FM_MAC_ConfigWan = NULL; /* Not supported on dTSEC */
  3244. +
  3245. + p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc = DtsecConfigPadAndCrc;
  3246. + p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex = DtsecConfigHalfDuplex;
  3247. + p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck = DtsecConfigLengthCheck;
  3248. + p_FmMacControllerDriver->f_FM_MAC_ConfigTbiPhyAddr = DtsecConfigTbiPhyAddr;
  3249. + p_FmMacControllerDriver->f_FM_MAC_ConfigException = DtsecConfigException;
  3250. + p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit = NULL;
  3251. +
  3252. + p_FmMacControllerDriver->f_FM_MAC_Enable = DtsecEnable;
  3253. + p_FmMacControllerDriver->f_FM_MAC_Disable = DtsecDisable;
  3254. +
  3255. + p_FmMacControllerDriver->f_FM_MAC_SetException = DtsecSetException;
  3256. +
  3257. + p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous = DtsecSetPromiscuous;
  3258. + p_FmMacControllerDriver->f_FM_MAC_AdjustLink = DtsecAdjustLink;
  3259. + p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan = DtsecSetWakeOnLan;
  3260. + p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg = DtsecRestartAutoneg;
  3261. +
  3262. + p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp = DtsecEnable1588TimeStamp;
  3263. + p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp = DtsecDisable1588TimeStamp;
  3264. +
  3265. + p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames = DtsecTxMacPause;
  3266. + p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames = DtsecSetTxPauseFrames;
  3267. + p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames = DtsecRxIgnoreMacPause;
  3268. +
  3269. + p_FmMacControllerDriver->f_FM_MAC_ResetCounters = DtsecResetCounters;
  3270. + p_FmMacControllerDriver->f_FM_MAC_GetStatistics = DtsecGetStatistics;
  3271. +
  3272. + p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr = DtsecModifyMacAddress;
  3273. + p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr = DtsecAddHashMacAddress;
  3274. + p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr = DtsecDelHashMacAddress;
  3275. + p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr = DtsecAddExactMatchMacAddress;
  3276. + p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr = DtsecDelExactMatchMacAddress;
  3277. + p_FmMacControllerDriver->f_FM_MAC_GetId = DtsecGetId;
  3278. + p_FmMacControllerDriver->f_FM_MAC_GetVersion = DtsecGetVersion;
  3279. + p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength = DtsecGetMaxFrameLength;
  3280. +
  3281. + p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg = DTSEC_MII_WritePhyReg;
  3282. + p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg = DTSEC_MII_ReadPhyReg;
  3283. +
  3284. +}
  3285. +
  3286. +
  3287. +/*****************************************************************************/
  3288. +/* dTSEC Config Main Entry */
  3289. +/*****************************************************************************/
  3290. +
  3291. +/* .............................................................................. */
  3292. +
  3293. +t_Handle DTSEC_Config(t_FmMacParams *p_FmMacParam)
  3294. +{
  3295. + t_Dtsec *p_Dtsec;
  3296. + struct dtsec_cfg *p_DtsecDriverParam;
  3297. + uintptr_t baseAddr;
  3298. +
  3299. + SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_NULL_POINTER, NULL);
  3300. +
  3301. + baseAddr = p_FmMacParam->baseAddr;
  3302. +
  3303. + /* allocate memory for the UCC GETH data structure. */
  3304. + p_Dtsec = (t_Dtsec *)XX_Malloc(sizeof(t_Dtsec));
  3305. + if (!p_Dtsec)
  3306. + {
  3307. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("dTSEC driver structure"));
  3308. + return NULL;
  3309. + }
  3310. + memset(p_Dtsec, 0, sizeof(t_Dtsec));
  3311. + InitFmMacControllerDriver(&p_Dtsec->fmMacControllerDriver);
  3312. +
  3313. + /* allocate memory for the dTSEC driver parameters data structure. */
  3314. + p_DtsecDriverParam = (struct dtsec_cfg *) XX_Malloc(sizeof(struct dtsec_cfg));
  3315. + if (!p_DtsecDriverParam)
  3316. + {
  3317. + XX_Free(p_Dtsec);
  3318. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("dTSEC driver parameters"));
  3319. + return NULL;
  3320. + }
  3321. + memset(p_DtsecDriverParam, 0, sizeof(struct dtsec_cfg));
  3322. +
  3323. + /* Plant parameter structure pointer */
  3324. + p_Dtsec->p_DtsecDriverParam = p_DtsecDriverParam;
  3325. +
  3326. + fman_dtsec_defconfig(p_DtsecDriverParam);
  3327. +
  3328. + p_Dtsec->p_MemMap = (struct dtsec_regs *)UINT_TO_PTR(baseAddr);
  3329. + p_Dtsec->p_MiiMemMap = (struct dtsec_mii_reg *)UINT_TO_PTR(baseAddr + DTSEC_TO_MII_OFFSET);
  3330. + p_Dtsec->addr = ENET_ADDR_TO_UINT64(p_FmMacParam->addr);
  3331. + p_Dtsec->enetMode = p_FmMacParam->enetMode;
  3332. + p_Dtsec->macId = p_FmMacParam->macId;
  3333. + p_Dtsec->exceptions = DEFAULT_exceptions;
  3334. + p_Dtsec->mdioIrq = p_FmMacParam->mdioIrq;
  3335. + p_Dtsec->f_Exception = p_FmMacParam->f_Exception;
  3336. + p_Dtsec->f_Event = p_FmMacParam->f_Event;
  3337. + p_Dtsec->h_App = p_FmMacParam->h_App;
  3338. + p_Dtsec->ptpTsuEnabled = p_Dtsec->p_DtsecDriverParam->ptp_tsu_en;
  3339. + p_Dtsec->enTsuErrExeption = p_Dtsec->p_DtsecDriverParam->ptp_exception_en;
  3340. + p_Dtsec->tbi_phy_addr = p_Dtsec->p_DtsecDriverParam->tbi_phy_addr;
  3341. +
  3342. + return p_Dtsec;
  3343. +}
  3344. --- /dev/null
  3345. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.h
  3346. @@ -0,0 +1,228 @@
  3347. +/*
  3348. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  3349. + *
  3350. + * Redistribution and use in source and binary forms, with or without
  3351. + * modification, are permitted provided that the following conditions are met:
  3352. + * * Redistributions of source code must retain the above copyright
  3353. + * notice, this list of conditions and the following disclaimer.
  3354. + * * Redistributions in binary form must reproduce the above copyright
  3355. + * notice, this list of conditions and the following disclaimer in the
  3356. + * documentation and/or other materials provided with the distribution.
  3357. + * * Neither the name of Freescale Semiconductor nor the
  3358. + * names of its contributors may be used to endorse or promote products
  3359. + * derived from this software without specific prior written permission.
  3360. + *
  3361. + *
  3362. + * ALTERNATIVELY, this software may be distributed under the terms of the
  3363. + * GNU General Public License ("GPL") as published by the Free Software
  3364. + * Foundation, either version 2 of that License or (at your option) any
  3365. + * later version.
  3366. + *
  3367. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  3368. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  3369. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  3370. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  3371. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  3372. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  3373. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  3374. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  3375. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  3376. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  3377. + */
  3378. +
  3379. +/******************************************************************************
  3380. + @File dtsec.h
  3381. +
  3382. + @Description FM dTSEC ...
  3383. +*//***************************************************************************/
  3384. +#ifndef __DTSEC_H
  3385. +#define __DTSEC_H
  3386. +
  3387. +#include "std_ext.h"
  3388. +#include "error_ext.h"
  3389. +#include "list_ext.h"
  3390. +#include "enet_ext.h"
  3391. +
  3392. +#include "dtsec_mii_acc.h"
  3393. +#include "fm_mac.h"
  3394. +
  3395. +
  3396. +#define DEFAULT_exceptions \
  3397. + ((uint32_t)(DTSEC_IMASK_BREN | \
  3398. + DTSEC_IMASK_RXCEN | \
  3399. + DTSEC_IMASK_BTEN | \
  3400. + DTSEC_IMASK_TXCEN | \
  3401. + DTSEC_IMASK_TXEEN | \
  3402. + DTSEC_IMASK_ABRTEN | \
  3403. + DTSEC_IMASK_LCEN | \
  3404. + DTSEC_IMASK_CRLEN | \
  3405. + DTSEC_IMASK_XFUNEN | \
  3406. + DTSEC_IMASK_IFERREN | \
  3407. + DTSEC_IMASK_MAGEN | \
  3408. + DTSEC_IMASK_TDPEEN | \
  3409. + DTSEC_IMASK_RDPEEN))
  3410. +
  3411. +#define GET_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \
  3412. + case e_FM_MAC_EX_1G_BAB_RX: \
  3413. + bitMask = DTSEC_IMASK_BREN; break; \
  3414. + case e_FM_MAC_EX_1G_RX_CTL: \
  3415. + bitMask = DTSEC_IMASK_RXCEN; break; \
  3416. + case e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET: \
  3417. + bitMask = DTSEC_IMASK_GTSCEN ; break; \
  3418. + case e_FM_MAC_EX_1G_BAB_TX: \
  3419. + bitMask = DTSEC_IMASK_BTEN ; break; \
  3420. + case e_FM_MAC_EX_1G_TX_CTL: \
  3421. + bitMask = DTSEC_IMASK_TXCEN ; break; \
  3422. + case e_FM_MAC_EX_1G_TX_ERR: \
  3423. + bitMask = DTSEC_IMASK_TXEEN ; break; \
  3424. + case e_FM_MAC_EX_1G_LATE_COL: \
  3425. + bitMask = DTSEC_IMASK_LCEN ; break; \
  3426. + case e_FM_MAC_EX_1G_COL_RET_LMT: \
  3427. + bitMask = DTSEC_IMASK_CRLEN ; break; \
  3428. + case e_FM_MAC_EX_1G_TX_FIFO_UNDRN: \
  3429. + bitMask = DTSEC_IMASK_XFUNEN ; break; \
  3430. + case e_FM_MAC_EX_1G_MAG_PCKT: \
  3431. + bitMask = DTSEC_IMASK_MAGEN ; break; \
  3432. + case e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET: \
  3433. + bitMask = DTSEC_IMASK_MMRDEN; break; \
  3434. + case e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET: \
  3435. + bitMask = DTSEC_IMASK_MMWREN ; break; \
  3436. + case e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET: \
  3437. + bitMask = DTSEC_IMASK_GRSCEN; break; \
  3438. + case e_FM_MAC_EX_1G_TX_DATA_ERR: \
  3439. + bitMask = DTSEC_IMASK_TDPEEN; break; \
  3440. + case e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL: \
  3441. + bitMask = DTSEC_IMASK_MSROEN ; break; \
  3442. + default: bitMask = 0;break;}
  3443. +
  3444. +
  3445. +#define MAX_PACKET_ALIGNMENT 31
  3446. +#define MAX_INTER_PACKET_GAP 0x7f
  3447. +#define MAX_INTER_PALTERNATE_BEB 0x0f
  3448. +#define MAX_RETRANSMISSION 0x0f
  3449. +#define MAX_COLLISION_WINDOW 0x03ff
  3450. +
  3451. +
  3452. +/********************* From mac ext ******************************************/
  3453. +typedef uint32_t t_ErrorDisable;
  3454. +
  3455. +#define ERROR_DISABLE_TRANSMIT 0x00400000
  3456. +#define ERROR_DISABLE_LATE_COLLISION 0x00040000
  3457. +#define ERROR_DISABLE_COLLISION_RETRY_LIMIT 0x00020000
  3458. +#define ERROR_DISABLE_TxFIFO_UNDERRUN 0x00010000
  3459. +#define ERROR_DISABLE_TxABORT 0x00008000
  3460. +#define ERROR_DISABLE_INTERFACE 0x00004000
  3461. +#define ERROR_DISABLE_TxDATA_PARITY 0x00000002
  3462. +#define ERROR_DISABLE_RxDATA_PARITY 0x00000001
  3463. +
  3464. +/*****************************************************************************/
  3465. +#define DTSEC_NUM_OF_PADDRS 15 /* number of pattern match registers (entries) */
  3466. +
  3467. +#define GROUP_ADDRESS 0x0000010000000000LL /* Group address bit indication */
  3468. +
  3469. +#define HASH_TABLE_SIZE 256 /* Hash table size (= 32 bits * 8 regs) */
  3470. +
  3471. +#define HASH_TABLE_SIZE 256 /* Hash table size (32 bits * 8 regs) */
  3472. +#define EXTENDED_HASH_TABLE_SIZE 512 /* Extended Hash table size (32 bits * 16 regs) */
  3473. +
  3474. +#define DTSEC_TO_MII_OFFSET 0x1000 /* number of pattern match registers (entries) */
  3475. +
  3476. +#define MAX_PHYS 32 /* maximum number of phys */
  3477. +
  3478. +#define VAL32BIT 0x100000000LL
  3479. +#define VAL22BIT 0x00400000
  3480. +#define VAL16BIT 0x00010000
  3481. +#define VAL12BIT 0x00001000
  3482. +
  3483. +/* CAR1/2 bits */
  3484. +#define CAR1_TR64 0x80000000
  3485. +#define CAR1_TR127 0x40000000
  3486. +#define CAR1_TR255 0x20000000
  3487. +#define CAR1_TR511 0x10000000
  3488. +#define CAR1_TRK1 0x08000000
  3489. +#define CAR1_TRMAX 0x04000000
  3490. +#define CAR1_TRMGV 0x02000000
  3491. +
  3492. +#define CAR1_RBYT 0x00010000
  3493. +#define CAR1_RPKT 0x00008000
  3494. +#define CAR1_RMCA 0x00002000
  3495. +#define CAR1_RBCA 0x00001000
  3496. +#define CAR1_RXPF 0x00000400
  3497. +#define CAR1_RALN 0x00000100
  3498. +#define CAR1_RFLR 0x00000080
  3499. +#define CAR1_RCDE 0x00000040
  3500. +#define CAR1_RCSE 0x00000020
  3501. +#define CAR1_RUND 0x00000010
  3502. +#define CAR1_ROVR 0x00000008
  3503. +#define CAR1_RFRG 0x00000004
  3504. +#define CAR1_RJBR 0x00000002
  3505. +#define CAR1_RDRP 0x00000001
  3506. +
  3507. +#define CAR2_TFCS 0x00040000
  3508. +#define CAR2_TBYT 0x00002000
  3509. +#define CAR2_TPKT 0x00001000
  3510. +#define CAR2_TMCA 0x00000800
  3511. +#define CAR2_TBCA 0x00000400
  3512. +#define CAR2_TXPF 0x00000200
  3513. +#define CAR2_TDRP 0x00000001
  3514. +
  3515. +typedef struct t_InternalStatistics
  3516. +{
  3517. + uint64_t tr64;
  3518. + uint64_t tr127;
  3519. + uint64_t tr255;
  3520. + uint64_t tr511;
  3521. + uint64_t tr1k;
  3522. + uint64_t trmax;
  3523. + uint64_t trmgv;
  3524. + uint64_t rfrg;
  3525. + uint64_t rjbr;
  3526. + uint64_t rdrp;
  3527. + uint64_t raln;
  3528. + uint64_t rund;
  3529. + uint64_t rovr;
  3530. + uint64_t rxpf;
  3531. + uint64_t txpf;
  3532. + uint64_t rbyt;
  3533. + uint64_t rpkt;
  3534. + uint64_t rmca;
  3535. + uint64_t rbca;
  3536. + uint64_t rflr;
  3537. + uint64_t rcde;
  3538. + uint64_t rcse;
  3539. + uint64_t tbyt;
  3540. + uint64_t tpkt;
  3541. + uint64_t tmca;
  3542. + uint64_t tbca;
  3543. + uint64_t tdrp;
  3544. + uint64_t tfcs;
  3545. +} t_InternalStatistics;
  3546. +
  3547. +typedef struct {
  3548. + t_FmMacControllerDriver fmMacControllerDriver;
  3549. + t_Handle h_App; /**< Handle to the upper layer application */
  3550. + struct dtsec_regs *p_MemMap; /**< pointer to dTSEC memory mapped registers. */
  3551. + struct dtsec_mii_reg *p_MiiMemMap; /**< pointer to dTSEC MII memory mapped registers. */
  3552. + uint64_t addr; /**< MAC address of device; */
  3553. + e_EnetMode enetMode; /**< Ethernet physical interface */
  3554. + t_FmMacExceptionCallback *f_Exception;
  3555. + int mdioIrq;
  3556. + t_FmMacExceptionCallback *f_Event;
  3557. + bool indAddrRegUsed[DTSEC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
  3558. + uint64_t paddr[DTSEC_NUM_OF_PADDRS]; /**< MAC address for particular individual address recognition register */
  3559. + uint8_t numOfIndAddrInRegs; /**< Number of individual addresses in registers for this station. */
  3560. + bool halfDuplex;
  3561. + t_InternalStatistics internalStatistics;
  3562. + t_EthHash *p_MulticastAddrHash; /* pointer to driver's global address hash table */
  3563. + t_EthHash *p_UnicastAddrHash; /* pointer to driver's individual address hash table */
  3564. + uint8_t macId;
  3565. + uint8_t tbi_phy_addr;
  3566. + uint32_t exceptions;
  3567. + bool ptpTsuEnabled;
  3568. + bool enTsuErrExeption;
  3569. + e_FmMacStatisticsLevel statisticsLevel;
  3570. + struct dtsec_cfg *p_DtsecDriverParam;
  3571. +} t_Dtsec;
  3572. +
  3573. +
  3574. +#endif /* __DTSEC_H */
  3575. --- /dev/null
  3576. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.c
  3577. @@ -0,0 +1,97 @@
  3578. +/*
  3579. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  3580. + *
  3581. + * Redistribution and use in source and binary forms, with or without
  3582. + * modification, are permitted provided that the following conditions are met:
  3583. + * * Redistributions of source code must retain the above copyright
  3584. + * notice, this list of conditions and the following disclaimer.
  3585. + * * Redistributions in binary form must reproduce the above copyright
  3586. + * notice, this list of conditions and the following disclaimer in the
  3587. + * documentation and/or other materials provided with the distribution.
  3588. + * * Neither the name of Freescale Semiconductor nor the
  3589. + * names of its contributors may be used to endorse or promote products
  3590. + * derived from this software without specific prior written permission.
  3591. + *
  3592. + *
  3593. + * ALTERNATIVELY, this software may be distributed under the terms of the
  3594. + * GNU General Public License ("GPL") as published by the Free Software
  3595. + * Foundation, either version 2 of that License or (at your option) any
  3596. + * later version.
  3597. + *
  3598. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  3599. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  3600. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  3601. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  3602. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  3603. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  3604. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  3605. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  3606. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  3607. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  3608. + */
  3609. +
  3610. +
  3611. +/******************************************************************************
  3612. + @File dtsec_mii_acc.c
  3613. +
  3614. + @Description FM dtsec MII register access MAC ...
  3615. +*//***************************************************************************/
  3616. +
  3617. +#include "error_ext.h"
  3618. +#include "std_ext.h"
  3619. +#include "fm_mac.h"
  3620. +#include "dtsec.h"
  3621. +#include "fsl_fman_dtsec_mii_acc.h"
  3622. +
  3623. +
  3624. +/*****************************************************************************/
  3625. +t_Error DTSEC_MII_WritePhyReg(t_Handle h_Dtsec,
  3626. + uint8_t phyAddr,
  3627. + uint8_t reg,
  3628. + uint16_t data)
  3629. +{
  3630. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  3631. + struct dtsec_mii_reg *miiregs;
  3632. + uint16_t dtsec_freq;
  3633. + t_Error err;
  3634. +
  3635. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  3636. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
  3637. +
  3638. + dtsec_freq = (uint16_t)(p_Dtsec->fmMacControllerDriver.clkFreq >> 1);
  3639. + miiregs = p_Dtsec->p_MiiMemMap;
  3640. +
  3641. + err = (t_Error)fman_dtsec_mii_write_reg(miiregs, phyAddr, reg, data, dtsec_freq);
  3642. +
  3643. + return err;
  3644. +}
  3645. +
  3646. +/*****************************************************************************/
  3647. +t_Error DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec,
  3648. + uint8_t phyAddr,
  3649. + uint8_t reg,
  3650. + uint16_t *p_Data)
  3651. +{
  3652. + t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
  3653. + struct dtsec_mii_reg *miiregs;
  3654. + uint16_t dtsec_freq;
  3655. + t_Error err;
  3656. +
  3657. + SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
  3658. + SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
  3659. +
  3660. + dtsec_freq = (uint16_t)(p_Dtsec->fmMacControllerDriver.clkFreq >> 1);
  3661. + miiregs = p_Dtsec->p_MiiMemMap;
  3662. +
  3663. + err = fman_dtsec_mii_read_reg(miiregs, phyAddr, reg, p_Data, dtsec_freq);
  3664. +
  3665. + if (*p_Data == 0xffff)
  3666. + RETURN_ERROR(MINOR, E_NO_DEVICE,
  3667. + ("Read wrong data (0xffff): phyAddr 0x%x, reg 0x%x",
  3668. + phyAddr, reg));
  3669. + if (err)
  3670. + RETURN_ERROR(MINOR, (t_Error)err, NO_MSG);
  3671. +
  3672. + return E_OK;
  3673. +}
  3674. +
  3675. --- /dev/null
  3676. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.h
  3677. @@ -0,0 +1,42 @@
  3678. +/*
  3679. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  3680. + *
  3681. + * Redistribution and use in source and binary forms, with or without
  3682. + * modification, are permitted provided that the following conditions are met:
  3683. + * * Redistributions of source code must retain the above copyright
  3684. + * notice, this list of conditions and the following disclaimer.
  3685. + * * Redistributions in binary form must reproduce the above copyright
  3686. + * notice, this list of conditions and the following disclaimer in the
  3687. + * documentation and/or other materials provided with the distribution.
  3688. + * * Neither the name of Freescale Semiconductor nor the
  3689. + * names of its contributors may be used to endorse or promote products
  3690. + * derived from this software without specific prior written permission.
  3691. + *
  3692. + *
  3693. + * ALTERNATIVELY, this software may be distributed under the terms of the
  3694. + * GNU General Public License ("GPL") as published by the Free Software
  3695. + * Foundation, either version 2 of that License or (at your option) any
  3696. + * later version.
  3697. + *
  3698. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  3699. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  3700. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  3701. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  3702. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  3703. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  3704. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  3705. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  3706. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  3707. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  3708. + */
  3709. +
  3710. +#ifndef __DTSEC_MII_ACC_H
  3711. +#define __DTSEC_MII_ACC_H
  3712. +
  3713. +#include "std_ext.h"
  3714. +
  3715. +
  3716. +t_Error DTSEC_MII_WritePhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t data);
  3717. +t_Error DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
  3718. +
  3719. +#endif /* __DTSEC_MII_ACC_H */
  3720. --- /dev/null
  3721. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c
  3722. @@ -0,0 +1,646 @@
  3723. +/*
  3724. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  3725. + *
  3726. + * Redistribution and use in source and binary forms, with or without
  3727. + * modification, are permitted provided that the following conditions are met:
  3728. + * * Redistributions of source code must retain the above copyright
  3729. + * notice, this list of conditions and the following disclaimer.
  3730. + * * Redistributions in binary form must reproduce the above copyright
  3731. + * notice, this list of conditions and the following disclaimer in the
  3732. + * documentation and/or other materials provided with the distribution.
  3733. + * * Neither the name of Freescale Semiconductor nor the
  3734. + * names of its contributors may be used to endorse or promote products
  3735. + * derived from this software without specific prior written permission.
  3736. + *
  3737. + *
  3738. + * ALTERNATIVELY, this software may be distributed under the terms of the
  3739. + * GNU General Public License ("GPL") as published by the Free Software
  3740. + * Foundation, either version 2 of that License or (at your option) any
  3741. + * later version.
  3742. + *
  3743. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  3744. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  3745. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  3746. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  3747. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  3748. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  3749. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  3750. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  3751. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  3752. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  3753. + */
  3754. +
  3755. +
  3756. +/******************************************************************************
  3757. + @File fm_mac.c
  3758. +
  3759. + @Description FM MAC ...
  3760. +*//***************************************************************************/
  3761. +#include "std_ext.h"
  3762. +#include "string_ext.h"
  3763. +#include "sprint_ext.h"
  3764. +#include "error_ext.h"
  3765. +#include "fm_ext.h"
  3766. +
  3767. +#include "fm_common.h"
  3768. +#include "fm_mac.h"
  3769. +
  3770. +
  3771. +/* ......................................................................... */
  3772. +
  3773. +t_Handle FM_MAC_Config (t_FmMacParams *p_FmMacParam)
  3774. +{
  3775. + t_FmMacControllerDriver *p_FmMacControllerDriver;
  3776. + uint16_t fmClkFreq;
  3777. +
  3778. + SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_INVALID_HANDLE, NULL);
  3779. +
  3780. + fmClkFreq = FmGetClockFreq(p_FmMacParam->h_Fm);
  3781. + if (fmClkFreq == 0)
  3782. + {
  3783. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Can't get clock for MAC!"));
  3784. + return NULL;
  3785. + }
  3786. +
  3787. +#if (DPAA_VERSION == 10)
  3788. + if (ENET_SPEED_FROM_MODE(p_FmMacParam->enetMode) < e_ENET_SPEED_10000)
  3789. + p_FmMacControllerDriver = (t_FmMacControllerDriver *)DTSEC_Config(p_FmMacParam);
  3790. + else
  3791. +#if FM_MAX_NUM_OF_10G_MACS > 0
  3792. + p_FmMacControllerDriver = (t_FmMacControllerDriver *)TGEC_Config(p_FmMacParam);
  3793. +#else
  3794. + p_FmMacControllerDriver = NULL;
  3795. +#endif /* FM_MAX_NUM_OF_10G_MACS > 0 */
  3796. +#else
  3797. + p_FmMacControllerDriver = (t_FmMacControllerDriver *)MEMAC_Config(p_FmMacParam);
  3798. +#endif /* (DPAA_VERSION == 10) */
  3799. +
  3800. + if (!p_FmMacControllerDriver)
  3801. + return NULL;
  3802. +
  3803. + p_FmMacControllerDriver->h_Fm = p_FmMacParam->h_Fm;
  3804. + p_FmMacControllerDriver->enetMode = p_FmMacParam->enetMode;
  3805. + p_FmMacControllerDriver->macId = p_FmMacParam->macId;
  3806. + p_FmMacControllerDriver->resetOnInit = DEFAULT_resetOnInit;
  3807. +
  3808. + p_FmMacControllerDriver->clkFreq = fmClkFreq;
  3809. +
  3810. + return (t_Handle)p_FmMacControllerDriver;
  3811. +}
  3812. +
  3813. +/* ......................................................................... */
  3814. +
  3815. +t_Error FM_MAC_Init (t_Handle h_FmMac)
  3816. +{
  3817. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3818. +
  3819. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3820. +
  3821. + if (p_FmMacControllerDriver->resetOnInit &&
  3822. + !p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit &&
  3823. + (FmResetMac(p_FmMacControllerDriver->h_Fm,
  3824. + ((ENET_INTERFACE_FROM_MODE(p_FmMacControllerDriver->enetMode) == e_ENET_IF_XGMII) ?
  3825. + e_FM_MAC_10G : e_FM_MAC_1G),
  3826. + p_FmMacControllerDriver->macId) != E_OK))
  3827. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Can't reset MAC!"));
  3828. +
  3829. + if (p_FmMacControllerDriver->f_FM_MAC_Init)
  3830. + return p_FmMacControllerDriver->f_FM_MAC_Init(h_FmMac);
  3831. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3832. +}
  3833. +
  3834. +/* ......................................................................... */
  3835. +
  3836. +t_Error FM_MAC_Free (t_Handle h_FmMac)
  3837. +{
  3838. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3839. +
  3840. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3841. +
  3842. + if (p_FmMacControllerDriver->f_FM_MAC_Free)
  3843. + return p_FmMacControllerDriver->f_FM_MAC_Free(h_FmMac);
  3844. +
  3845. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3846. +}
  3847. +
  3848. +/* ......................................................................... */
  3849. +
  3850. +t_Error FM_MAC_ConfigResetOnInit (t_Handle h_FmMac, bool enable)
  3851. +{
  3852. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3853. +
  3854. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3855. +
  3856. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit)
  3857. + return p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit(h_FmMac, enable);
  3858. +
  3859. + p_FmMacControllerDriver->resetOnInit = enable;
  3860. +
  3861. + return E_OK;
  3862. +}
  3863. +
  3864. +/* ......................................................................... */
  3865. +
  3866. +t_Error FM_MAC_ConfigLoopback (t_Handle h_FmMac, bool newVal)
  3867. +{
  3868. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3869. +
  3870. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3871. +
  3872. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback)
  3873. + return p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback(h_FmMac, newVal);
  3874. +
  3875. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3876. +}
  3877. +
  3878. +/* ......................................................................... */
  3879. +
  3880. +t_Error FM_MAC_ConfigMaxFrameLength (t_Handle h_FmMac, uint16_t newVal)
  3881. +{
  3882. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3883. +
  3884. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3885. +
  3886. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength)
  3887. + return p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength(h_FmMac, newVal);
  3888. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3889. +}
  3890. +
  3891. +/* ......................................................................... */
  3892. +
  3893. +t_Error FM_MAC_ConfigWan (t_Handle h_FmMac, bool flag)
  3894. +{
  3895. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3896. +
  3897. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3898. +
  3899. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigWan)
  3900. + return p_FmMacControllerDriver->f_FM_MAC_ConfigWan(h_FmMac, flag);
  3901. +
  3902. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3903. +}
  3904. +
  3905. +/* ......................................................................... */
  3906. +
  3907. +t_Error FM_MAC_ConfigPadAndCrc (t_Handle h_FmMac, bool newVal)
  3908. +{
  3909. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3910. +
  3911. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3912. +
  3913. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc)
  3914. + return p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc(h_FmMac, newVal);
  3915. +
  3916. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3917. +}
  3918. +
  3919. +/* ......................................................................... */
  3920. +
  3921. +t_Error FM_MAC_ConfigHalfDuplex (t_Handle h_FmMac, bool newVal)
  3922. +{
  3923. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3924. +
  3925. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3926. +
  3927. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex)
  3928. + return p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex(h_FmMac,newVal);
  3929. +
  3930. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3931. +}
  3932. +
  3933. +/* ......................................................................... */
  3934. +
  3935. +t_Error FM_MAC_ConfigTbiPhyAddr (t_Handle h_FmMac, uint8_t newVal)
  3936. +{
  3937. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3938. +
  3939. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3940. +
  3941. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigTbiPhyAddr)
  3942. + return p_FmMacControllerDriver->f_FM_MAC_ConfigTbiPhyAddr(h_FmMac,newVal);
  3943. +
  3944. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3945. +}
  3946. +
  3947. +/* ......................................................................... */
  3948. +
  3949. +t_Error FM_MAC_ConfigLengthCheck (t_Handle h_FmMac, bool newVal)
  3950. +{
  3951. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3952. +
  3953. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3954. +
  3955. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck)
  3956. + return p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck(h_FmMac,newVal);
  3957. +
  3958. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3959. +}
  3960. +
  3961. +/* ......................................................................... */
  3962. +
  3963. +t_Error FM_MAC_ConfigException (t_Handle h_FmMac, e_FmMacExceptions ex, bool enable)
  3964. +{
  3965. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3966. +
  3967. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3968. +
  3969. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigException)
  3970. + return p_FmMacControllerDriver->f_FM_MAC_ConfigException(h_FmMac, ex, enable);
  3971. +
  3972. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3973. +}
  3974. +
  3975. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  3976. +/* ......................................................................... */
  3977. +
  3978. +t_Error FM_MAC_ConfigSkipFman11Workaround (t_Handle h_FmMac)
  3979. +{
  3980. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  3981. +
  3982. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  3983. +
  3984. + if (p_FmMacControllerDriver->f_FM_MAC_ConfigSkipFman11Workaround)
  3985. + return p_FmMacControllerDriver->f_FM_MAC_ConfigSkipFman11Workaround(h_FmMac);
  3986. +
  3987. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  3988. +}
  3989. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  3990. +
  3991. +
  3992. +/*****************************************************************************/
  3993. +/* Run Time Control */
  3994. +/*****************************************************************************/
  3995. +
  3996. +/* ......................................................................... */
  3997. +
  3998. +t_Error FM_MAC_Enable (t_Handle h_FmMac, e_CommMode mode)
  3999. +{
  4000. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4001. +
  4002. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4003. +
  4004. + if (p_FmMacControllerDriver->f_FM_MAC_Enable)
  4005. + return p_FmMacControllerDriver->f_FM_MAC_Enable(h_FmMac, mode);
  4006. +
  4007. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4008. +}
  4009. +
  4010. +/* ......................................................................... */
  4011. +
  4012. +t_Error FM_MAC_Disable (t_Handle h_FmMac, e_CommMode mode)
  4013. +{
  4014. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4015. +
  4016. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4017. +
  4018. + if (p_FmMacControllerDriver->f_FM_MAC_Disable)
  4019. + return p_FmMacControllerDriver->f_FM_MAC_Disable(h_FmMac, mode);
  4020. +
  4021. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4022. +}
  4023. +
  4024. +/* ......................................................................... */
  4025. +
  4026. +t_Error FM_MAC_Enable1588TimeStamp (t_Handle h_FmMac)
  4027. +{
  4028. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4029. +
  4030. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4031. +
  4032. + if (p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp)
  4033. + return p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp(h_FmMac);
  4034. +
  4035. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4036. +}
  4037. +
  4038. +/* ......................................................................... */
  4039. +
  4040. +t_Error FM_MAC_Disable1588TimeStamp (t_Handle h_FmMac)
  4041. +{
  4042. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4043. +
  4044. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4045. +
  4046. + if (p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp)
  4047. + return p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp(h_FmMac);
  4048. +
  4049. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4050. +}
  4051. +
  4052. +/* ......................................................................... */
  4053. +
  4054. +t_Error FM_MAC_SetTxAutoPauseFrames(t_Handle h_FmMac,
  4055. + uint16_t pauseTime)
  4056. +{
  4057. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4058. +
  4059. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4060. +
  4061. + if (p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames)
  4062. + return p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames(h_FmMac,
  4063. + pauseTime);
  4064. +
  4065. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4066. +}
  4067. +
  4068. +/* ......................................................................... */
  4069. +
  4070. +t_Error FM_MAC_SetTxPauseFrames(t_Handle h_FmMac,
  4071. + uint8_t priority,
  4072. + uint16_t pauseTime,
  4073. + uint16_t threshTime)
  4074. +{
  4075. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4076. +
  4077. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4078. +
  4079. + if (p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames)
  4080. + return p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames(h_FmMac,
  4081. + priority,
  4082. + pauseTime,
  4083. + threshTime);
  4084. +
  4085. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
  4086. +}
  4087. +
  4088. +/* ......................................................................... */
  4089. +
  4090. +t_Error FM_MAC_SetRxIgnorePauseFrames (t_Handle h_FmMac, bool en)
  4091. +{
  4092. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4093. +
  4094. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4095. +
  4096. + if (p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames)
  4097. + return p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames(h_FmMac, en);
  4098. +
  4099. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4100. +}
  4101. +
  4102. +/* ......................................................................... */
  4103. +
  4104. +t_Error FM_MAC_SetWakeOnLan (t_Handle h_FmMac, bool en)
  4105. +{
  4106. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4107. +
  4108. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4109. +
  4110. + if (p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan)
  4111. + return p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan(h_FmMac, en);
  4112. +
  4113. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4114. +}
  4115. +
  4116. +/* ......................................................................... */
  4117. +
  4118. +t_Error FM_MAC_ResetCounters (t_Handle h_FmMac)
  4119. +{
  4120. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4121. +
  4122. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4123. +
  4124. + if (p_FmMacControllerDriver->f_FM_MAC_ResetCounters)
  4125. + return p_FmMacControllerDriver->f_FM_MAC_ResetCounters(h_FmMac);
  4126. +
  4127. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4128. +}
  4129. +
  4130. +/* ......................................................................... */
  4131. +
  4132. +t_Error FM_MAC_SetException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable)
  4133. +{
  4134. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4135. +
  4136. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4137. +
  4138. + if (p_FmMacControllerDriver->f_FM_MAC_SetException)
  4139. + return p_FmMacControllerDriver->f_FM_MAC_SetException(h_FmMac, ex, enable);
  4140. +
  4141. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4142. +}
  4143. +
  4144. +/* ......................................................................... */
  4145. +
  4146. +t_Error FM_MAC_SetStatistics (t_Handle h_FmMac, e_FmMacStatisticsLevel statisticsLevel)
  4147. +{
  4148. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4149. +
  4150. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4151. +
  4152. + if (p_FmMacControllerDriver->f_FM_MAC_SetStatistics)
  4153. + return p_FmMacControllerDriver->f_FM_MAC_SetStatistics(h_FmMac, statisticsLevel);
  4154. +
  4155. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4156. +}
  4157. +
  4158. +/* ......................................................................... */
  4159. +
  4160. +t_Error FM_MAC_GetStatistics (t_Handle h_FmMac, t_FmMacStatistics *p_Statistics)
  4161. +{
  4162. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4163. +
  4164. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4165. +
  4166. + if (p_FmMacControllerDriver->f_FM_MAC_GetStatistics)
  4167. + return p_FmMacControllerDriver->f_FM_MAC_GetStatistics(h_FmMac, p_Statistics);
  4168. +
  4169. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4170. +}
  4171. +
  4172. +/* ......................................................................... */
  4173. +
  4174. +t_Error FM_MAC_ModifyMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
  4175. +{
  4176. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4177. +
  4178. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4179. +
  4180. + if (p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr)
  4181. + return p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr(h_FmMac, p_EnetAddr);
  4182. +
  4183. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4184. +}
  4185. +
  4186. +/* ......................................................................... */
  4187. +
  4188. +t_Error FM_MAC_AddHashMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
  4189. +{
  4190. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4191. +
  4192. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4193. +
  4194. + if (p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr)
  4195. + return p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr(h_FmMac, p_EnetAddr);
  4196. +
  4197. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4198. +}
  4199. +
  4200. +/* ......................................................................... */
  4201. +
  4202. +t_Error FM_MAC_RemoveHashMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
  4203. +{
  4204. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4205. +
  4206. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4207. +
  4208. + if (p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr)
  4209. + return p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr(h_FmMac, p_EnetAddr);
  4210. +
  4211. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4212. +}
  4213. +
  4214. +/* ......................................................................... */
  4215. +
  4216. +t_Error FM_MAC_AddExactMatchMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
  4217. +{
  4218. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4219. +
  4220. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4221. +
  4222. + if (p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr)
  4223. + return p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr(h_FmMac, p_EnetAddr);
  4224. +
  4225. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4226. +}
  4227. +
  4228. +/* ......................................................................... */
  4229. +
  4230. +t_Error FM_MAC_RemovelExactMatchMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
  4231. +{
  4232. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4233. +
  4234. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4235. +
  4236. + if (p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr)
  4237. + return p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr(h_FmMac, p_EnetAddr);
  4238. +
  4239. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4240. +}
  4241. +
  4242. +/* ......................................................................... */
  4243. +
  4244. +t_Error FM_MAC_GetVesrion (t_Handle h_FmMac, uint32_t *macVresion)
  4245. +{
  4246. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4247. +
  4248. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4249. +
  4250. + if (p_FmMacControllerDriver->f_FM_MAC_GetVersion)
  4251. + return p_FmMacControllerDriver->f_FM_MAC_GetVersion(h_FmMac, macVresion);
  4252. +
  4253. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4254. +
  4255. +}
  4256. +
  4257. +/* ......................................................................... */
  4258. +
  4259. +t_Error FM_MAC_GetId (t_Handle h_FmMac, uint32_t *macId)
  4260. +{
  4261. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4262. +
  4263. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4264. +
  4265. + if (p_FmMacControllerDriver->f_FM_MAC_GetId)
  4266. + return p_FmMacControllerDriver->f_FM_MAC_GetId(h_FmMac, macId);
  4267. +
  4268. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4269. +}
  4270. +
  4271. +/* ......................................................................... */
  4272. +
  4273. +t_Error FM_MAC_SetPromiscuous (t_Handle h_FmMac, bool newVal)
  4274. +{
  4275. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4276. +
  4277. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4278. +
  4279. + if (p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous)
  4280. + return p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous(h_FmMac, newVal);
  4281. +
  4282. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4283. +}
  4284. +
  4285. +/* ......................................................................... */
  4286. +
  4287. +t_Error FM_MAC_AdjustLink(t_Handle h_FmMac, e_EnetSpeed speed, bool fullDuplex)
  4288. +{
  4289. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4290. +
  4291. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4292. +
  4293. + if (p_FmMacControllerDriver->f_FM_MAC_AdjustLink)
  4294. + return p_FmMacControllerDriver->f_FM_MAC_AdjustLink(h_FmMac, speed, fullDuplex);
  4295. +
  4296. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4297. +}
  4298. +
  4299. +/* ......................................................................... */
  4300. +
  4301. +t_Error FM_MAC_RestartAutoneg(t_Handle h_FmMac)
  4302. +{
  4303. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4304. +
  4305. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4306. +
  4307. + if (p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg)
  4308. + return p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg(h_FmMac);
  4309. +
  4310. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4311. +}
  4312. +
  4313. +/* ......................................................................... */
  4314. +
  4315. +t_Error FM_MAC_MII_WritePhyReg (t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data)
  4316. +{
  4317. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4318. +
  4319. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4320. +
  4321. + if (p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg)
  4322. + return p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg(h_FmMac, phyAddr, reg, data);
  4323. +
  4324. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4325. +}
  4326. +
  4327. +/* ......................................................................... */
  4328. +
  4329. +t_Error FM_MAC_MII_ReadPhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data)
  4330. +{
  4331. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4332. +
  4333. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4334. +
  4335. + if (p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg)
  4336. + return p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg(h_FmMac, phyAddr, reg, p_Data);
  4337. +
  4338. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4339. +}
  4340. +
  4341. +/* ......................................................................... */
  4342. +
  4343. +uint16_t FM_MAC_GetMaxFrameLength(t_Handle h_FmMac)
  4344. +{
  4345. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4346. +
  4347. + SANITY_CHECK_RETURN_VALUE(p_FmMacControllerDriver, E_INVALID_HANDLE, 0);
  4348. +
  4349. + if (p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength)
  4350. + return p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength(h_FmMac);
  4351. +
  4352. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4353. + return 0;
  4354. +}
  4355. +
  4356. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  4357. +/*****************************************************************************/
  4358. +t_Error FM_MAC_DumpRegs(t_Handle h_FmMac)
  4359. +{
  4360. + t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
  4361. +
  4362. + SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
  4363. +
  4364. + if (p_FmMacControllerDriver->f_FM_MAC_DumpRegs)
  4365. + return p_FmMacControllerDriver->f_FM_MAC_DumpRegs(h_FmMac);
  4366. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  4367. +}
  4368. +#endif /* (defined(DEBUG_ERRORS) && ... */
  4369. --- /dev/null
  4370. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h
  4371. @@ -0,0 +1,224 @@
  4372. +/*
  4373. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  4374. + *
  4375. + * Redistribution and use in source and binary forms, with or without
  4376. + * modification, are permitted provided that the following conditions are met:
  4377. + * * Redistributions of source code must retain the above copyright
  4378. + * notice, this list of conditions and the following disclaimer.
  4379. + * * Redistributions in binary form must reproduce the above copyright
  4380. + * notice, this list of conditions and the following disclaimer in the
  4381. + * documentation and/or other materials provided with the distribution.
  4382. + * * Neither the name of Freescale Semiconductor nor the
  4383. + * names of its contributors may be used to endorse or promote products
  4384. + * derived from this software without specific prior written permission.
  4385. + *
  4386. + *
  4387. + * ALTERNATIVELY, this software may be distributed under the terms of the
  4388. + * GNU General Public License ("GPL") as published by the Free Software
  4389. + * Foundation, either version 2 of that License or (at your option) any
  4390. + * later version.
  4391. + *
  4392. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  4393. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  4394. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  4395. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  4396. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  4397. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  4398. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  4399. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  4400. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  4401. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  4402. + */
  4403. +
  4404. +
  4405. +/******************************************************************************
  4406. + @File fm_mac.h
  4407. +
  4408. + @Description FM MAC ...
  4409. +*//***************************************************************************/
  4410. +#ifndef __FM_MAC_H
  4411. +#define __FM_MAC_H
  4412. +
  4413. +#include "std_ext.h"
  4414. +#include "error_ext.h"
  4415. +#include "list_ext.h"
  4416. +#include "fm_mac_ext.h"
  4417. +#include "fm_common.h"
  4418. +
  4419. +
  4420. +#define __ERR_MODULE__ MODULE_FM_MAC
  4421. +
  4422. +/**************************************************************************//**
  4423. + @Description defaults
  4424. +*//***************************************************************************/
  4425. +
  4426. +
  4427. +#define DEFAULT_halfDuplex FALSE
  4428. +#define DEFAULT_padAndCrcEnable TRUE
  4429. +#define DEFAULT_resetOnInit FALSE
  4430. +
  4431. +
  4432. +typedef struct {
  4433. + uint64_t addr; /* Ethernet Address */
  4434. + t_List node;
  4435. +} t_EthHashEntry;
  4436. +#define ETH_HASH_ENTRY_OBJ(ptr) LIST_OBJECT(ptr, t_EthHashEntry, node)
  4437. +
  4438. +typedef struct {
  4439. + uint16_t size;
  4440. + t_List *p_Lsts;
  4441. +} t_EthHash;
  4442. +
  4443. +typedef struct {
  4444. + t_Error (*f_FM_MAC_Init) (t_Handle h_FmMac);
  4445. + t_Error (*f_FM_MAC_Free) (t_Handle h_FmMac);
  4446. +
  4447. + t_Error (*f_FM_MAC_SetStatistics) (t_Handle h_FmMac, e_FmMacStatisticsLevel statisticsLevel);
  4448. + t_Error (*f_FM_MAC_ConfigLoopback) (t_Handle h_FmMac, bool newVal);
  4449. + t_Error (*f_FM_MAC_ConfigMaxFrameLength) (t_Handle h_FmMac, uint16_t newVal);
  4450. + t_Error (*f_FM_MAC_ConfigWan) (t_Handle h_FmMac, bool flag);
  4451. + t_Error (*f_FM_MAC_ConfigPadAndCrc) (t_Handle h_FmMac, bool newVal);
  4452. + t_Error (*f_FM_MAC_ConfigHalfDuplex) (t_Handle h_FmMac, bool newVal);
  4453. + t_Error (*f_FM_MAC_ConfigLengthCheck) (t_Handle h_FmMac, bool newVal);
  4454. + t_Error (*f_FM_MAC_ConfigTbiPhyAddr) (t_Handle h_FmMac, uint8_t newVal);
  4455. + t_Error (*f_FM_MAC_ConfigException) (t_Handle h_FmMac, e_FmMacExceptions, bool enable);
  4456. + t_Error (*f_FM_MAC_ConfigResetOnInit) (t_Handle h_FmMac, bool enable);
  4457. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  4458. + t_Error (*f_FM_MAC_ConfigSkipFman11Workaround) (t_Handle h_FmMac);
  4459. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  4460. +
  4461. + t_Error (*f_FM_MAC_SetException) (t_Handle h_FmMac, e_FmMacExceptions ex, bool enable);
  4462. +
  4463. + t_Error (*f_FM_MAC_Enable) (t_Handle h_FmMac, e_CommMode mode);
  4464. + t_Error (*f_FM_MAC_Disable) (t_Handle h_FmMac, e_CommMode mode);
  4465. + t_Error (*f_FM_MAC_Enable1588TimeStamp) (t_Handle h_FmMac);
  4466. + t_Error (*f_FM_MAC_Disable1588TimeStamp) (t_Handle h_FmMac);
  4467. + t_Error (*f_FM_MAC_Reset) (t_Handle h_FmMac, bool wait);
  4468. +
  4469. + t_Error (*f_FM_MAC_SetTxAutoPauseFrames) (t_Handle h_FmMac,
  4470. + uint16_t pauseTime);
  4471. + t_Error (*f_FM_MAC_SetTxPauseFrames) (t_Handle h_FmMac,
  4472. + uint8_t priority,
  4473. + uint16_t pauseTime,
  4474. + uint16_t threshTime);
  4475. + t_Error (*f_FM_MAC_SetRxIgnorePauseFrames) (t_Handle h_FmMac, bool en);
  4476. +
  4477. + t_Error (*f_FM_MAC_ResetCounters) (t_Handle h_FmMac);
  4478. + t_Error (*f_FM_MAC_GetStatistics) (t_Handle h_FmMac, t_FmMacStatistics *p_Statistics);
  4479. +
  4480. + t_Error (*f_FM_MAC_ModifyMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  4481. + t_Error (*f_FM_MAC_AddHashMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  4482. + t_Error (*f_FM_MAC_RemoveHashMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  4483. + t_Error (*f_FM_MAC_AddExactMatchMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  4484. + t_Error (*f_FM_MAC_RemovelExactMatchMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  4485. +
  4486. + t_Error (*f_FM_MAC_SetPromiscuous) (t_Handle h_FmMac, bool newVal);
  4487. + t_Error (*f_FM_MAC_AdjustLink) (t_Handle h_FmMac, e_EnetSpeed speed, bool fullDuplex);
  4488. + t_Error (*f_FM_MAC_RestartAutoneg) (t_Handle h_FmMac);
  4489. +
  4490. + t_Error (*f_FM_MAC_SetWakeOnLan) (t_Handle h_FmMac, bool en);
  4491. +
  4492. + t_Error (*f_FM_MAC_GetId) (t_Handle h_FmMac, uint32_t *macId);
  4493. +
  4494. + t_Error (*f_FM_MAC_GetVersion) (t_Handle h_FmMac, uint32_t *macVersion);
  4495. +
  4496. + uint16_t (*f_FM_MAC_GetMaxFrameLength) (t_Handle h_FmMac);
  4497. +
  4498. + t_Error (*f_FM_MAC_MII_WritePhyReg)(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data);
  4499. + t_Error (*f_FM_MAC_MII_ReadPhyReg)(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
  4500. +
  4501. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  4502. + t_Error (*f_FM_MAC_DumpRegs) (t_Handle h_FmMac);
  4503. +#endif /* (defined(DEBUG_ERRORS) && ... */
  4504. +
  4505. + t_Handle h_Fm;
  4506. + t_FmRevisionInfo fmRevInfo;
  4507. + e_EnetMode enetMode;
  4508. + uint8_t macId;
  4509. + bool resetOnInit;
  4510. + uint16_t clkFreq;
  4511. +} t_FmMacControllerDriver;
  4512. +
  4513. +
  4514. +#if (DPAA_VERSION == 10)
  4515. +t_Handle DTSEC_Config(t_FmMacParams *p_FmMacParam);
  4516. +t_Handle TGEC_Config(t_FmMacParams *p_FmMacParams);
  4517. +#else
  4518. +t_Handle MEMAC_Config(t_FmMacParams *p_FmMacParam);
  4519. +#endif /* (DPAA_VERSION == 10) */
  4520. +uint16_t FM_MAC_GetMaxFrameLength(t_Handle FmMac);
  4521. +
  4522. +
  4523. +/* ........................................................................... */
  4524. +
  4525. +static __inline__ t_EthHashEntry *DequeueAddrFromHashEntry(t_List *p_AddrLst)
  4526. +{
  4527. + t_EthHashEntry *p_HashEntry = NULL;
  4528. + if (!LIST_IsEmpty(p_AddrLst))
  4529. + {
  4530. + p_HashEntry = ETH_HASH_ENTRY_OBJ(p_AddrLst->p_Next);
  4531. + LIST_DelAndInit(&p_HashEntry->node);
  4532. + }
  4533. + return p_HashEntry;
  4534. +}
  4535. +
  4536. +/* ........................................................................... */
  4537. +
  4538. +static __inline__ void FreeHashTable(t_EthHash *p_Hash)
  4539. +{
  4540. + t_EthHashEntry *p_HashEntry;
  4541. + int i = 0;
  4542. +
  4543. + if (p_Hash)
  4544. + {
  4545. + if (p_Hash->p_Lsts)
  4546. + {
  4547. + for (i=0; i<p_Hash->size; i++)
  4548. + {
  4549. + p_HashEntry = DequeueAddrFromHashEntry(&p_Hash->p_Lsts[i]);
  4550. + while (p_HashEntry)
  4551. + {
  4552. + XX_Free(p_HashEntry);
  4553. + p_HashEntry = DequeueAddrFromHashEntry(&p_Hash->p_Lsts[i]);
  4554. + }
  4555. + }
  4556. +
  4557. + XX_Free(p_Hash->p_Lsts);
  4558. + }
  4559. +
  4560. + XX_Free(p_Hash);
  4561. + }
  4562. +}
  4563. +
  4564. +/* ........................................................................... */
  4565. +
  4566. +static __inline__ t_EthHash * AllocHashTable(uint16_t size)
  4567. +{
  4568. + uint32_t i;
  4569. + t_EthHash *p_Hash;
  4570. +
  4571. + /* Allocate address hash table */
  4572. + p_Hash = (t_EthHash *)XX_Malloc(sizeof(t_EthHash));
  4573. + if (!p_Hash)
  4574. + {
  4575. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Address hash table"));
  4576. + return NULL;
  4577. + }
  4578. + p_Hash->size = size;
  4579. +
  4580. + p_Hash->p_Lsts = (t_List *)XX_Malloc(p_Hash->size*sizeof(t_List));
  4581. + if (!p_Hash->p_Lsts)
  4582. + {
  4583. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Address hash table"));
  4584. + XX_Free(p_Hash);
  4585. + return NULL;
  4586. + }
  4587. +
  4588. + for (i=0 ; i<p_Hash->size; i++)
  4589. + INIT_LIST(&p_Hash->p_Lsts[i]);
  4590. +
  4591. + return p_Hash;
  4592. +}
  4593. +
  4594. +
  4595. +#endif /* __FM_MAC_H */
  4596. --- /dev/null
  4597. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.c
  4598. @@ -0,0 +1,119 @@
  4599. +/*
  4600. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  4601. + *
  4602. + * Redistribution and use in source and binary forms, with or without
  4603. + * modification, are permitted provided that the following conditions are met:
  4604. + * * Redistributions of source code must retain the above copyright
  4605. + * notice, this list of conditions and the following disclaimer.
  4606. + * * Redistributions in binary form must reproduce the above copyright
  4607. + * notice, this list of conditions and the following disclaimer in the
  4608. + * documentation and/or other materials provided with the distribution.
  4609. + * * Neither the name of Freescale Semiconductor nor the
  4610. + * names of its contributors may be used to endorse or promote products
  4611. + * derived from this software without specific prior written permission.
  4612. + *
  4613. + *
  4614. + * ALTERNATIVELY, this software may be distributed under the terms of the
  4615. + * GNU General Public License ("GPL") as published by the Free Software
  4616. + * Foundation, either version 2 of that License or (at your option) any
  4617. + * later version.
  4618. + *
  4619. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  4620. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  4621. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  4622. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  4623. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  4624. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  4625. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  4626. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  4627. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  4628. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  4629. + */
  4630. +
  4631. +
  4632. +#include "fman_crc32.h"
  4633. +#include "common/general.h"
  4634. +
  4635. +
  4636. +/* precomputed CRC values for address hashing */
  4637. +static const uint32_t crc_tbl[256] = {
  4638. + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
  4639. + 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
  4640. + 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
  4641. + 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
  4642. + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
  4643. + 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
  4644. + 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
  4645. + 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
  4646. + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
  4647. + 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
  4648. + 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
  4649. + 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
  4650. + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
  4651. + 0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
  4652. + 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
  4653. + 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
  4654. + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
  4655. + 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
  4656. + 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
  4657. + 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
  4658. + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
  4659. + 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
  4660. + 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
  4661. + 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
  4662. + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
  4663. + 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
  4664. + 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
  4665. + 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
  4666. + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
  4667. + 0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
  4668. + 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
  4669. + 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
  4670. + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
  4671. + 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
  4672. + 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
  4673. + 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
  4674. + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
  4675. + 0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
  4676. + 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
  4677. + 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
  4678. + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
  4679. + 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
  4680. + 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
  4681. +};
  4682. +
  4683. +/* Get the mirrored value of a byte size number. (0x11010011 --> 0x11001011) */
  4684. +static inline uint8_t get_mirror8(uint8_t n)
  4685. +{
  4686. + uint8_t mirror[16] = {
  4687. + 0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e,
  4688. + 0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f
  4689. + };
  4690. + return (uint8_t)(((mirror[n & 0x0f] << 4) | (mirror[n >> 4])));
  4691. +}
  4692. +
  4693. +static inline uint32_t get_mirror32(uint32_t n)
  4694. +{
  4695. + return ((uint32_t)get_mirror8((uint8_t)(n))<<24) |
  4696. + ((uint32_t)get_mirror8((uint8_t)(n>>8))<<16) |
  4697. + ((uint32_t)get_mirror8((uint8_t)(n>>16))<<8) |
  4698. + ((uint32_t)get_mirror8((uint8_t)(n>>24)));
  4699. +}
  4700. +
  4701. +uint32_t get_mac_addr_crc(uint64_t _addr)
  4702. +{
  4703. + uint32_t i;
  4704. + uint8_t data;
  4705. + uint32_t crc;
  4706. +
  4707. + /* CRC calculation */
  4708. + crc = 0xffffffff;
  4709. + for (i = 0; i < 6; i++) {
  4710. + data = (uint8_t)(_addr >> ((5-i)*8));
  4711. + crc = crc ^ data;
  4712. + crc = crc_tbl[crc&0xff] ^ (crc>>8);
  4713. + }
  4714. +
  4715. + crc = get_mirror32(crc);
  4716. + return crc;
  4717. +}
  4718. --- /dev/null
  4719. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_crc32.h
  4720. @@ -0,0 +1,43 @@
  4721. +/*
  4722. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  4723. + *
  4724. + * Redistribution and use in source and binary forms, with or without
  4725. + * modification, are permitted provided that the following conditions are met:
  4726. + * * Redistributions of source code must retain the above copyright
  4727. + * notice, this list of conditions and the following disclaimer.
  4728. + * * Redistributions in binary form must reproduce the above copyright
  4729. + * notice, this list of conditions and the following disclaimer in the
  4730. + * documentation and/or other materials provided with the distribution.
  4731. + * * Neither the name of Freescale Semiconductor nor the
  4732. + * names of its contributors may be used to endorse or promote products
  4733. + * derived from this software without specific prior written permission.
  4734. + *
  4735. + *
  4736. + * ALTERNATIVELY, this software may be distributed under the terms of the
  4737. + * GNU General Public License ("GPL") as published by the Free Software
  4738. + * Foundation, either version 2 of that License or (at your option) any
  4739. + * later version.
  4740. + *
  4741. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  4742. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  4743. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  4744. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  4745. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  4746. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  4747. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  4748. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  4749. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  4750. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  4751. + */
  4752. +
  4753. +
  4754. +#ifndef __FMAN_CRC32_H
  4755. +#define __FMAN_CRC32_H
  4756. +
  4757. +#include "common/general.h"
  4758. +
  4759. +
  4760. +uint32_t get_mac_addr_crc(uint64_t _addr);
  4761. +
  4762. +
  4763. +#endif /* __FMAN_CRC32_H */
  4764. --- /dev/null
  4765. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec.c
  4766. @@ -0,0 +1,845 @@
  4767. +/*
  4768. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  4769. + *
  4770. + * Redistribution and use in source and binary forms, with or without
  4771. + * modification, are permitted provided that the following conditions are met:
  4772. + * * Redistributions of source code must retain the above copyright
  4773. + * notice, this list of conditions and the following disclaimer.
  4774. + * * Redistributions in binary form must reproduce the above copyright
  4775. + * notice, this list of conditions and the following disclaimer in the
  4776. + * documentation and/or other materials provided with the distribution.
  4777. + * * Neither the name of Freescale Semiconductor nor the
  4778. + * names of its contributors may be used to endorse or promote products
  4779. + * derived from this software without specific prior written permission.
  4780. + *
  4781. + *
  4782. + * ALTERNATIVELY, this software may be distributed under the terms of the
  4783. + * GNU General Public License ("GPL") as published by the Free Software
  4784. + * Foundation, either version 2 of that License or (at your option) any
  4785. + * later version.
  4786. + *
  4787. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  4788. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  4789. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  4790. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  4791. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  4792. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  4793. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  4794. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  4795. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  4796. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  4797. + */
  4798. +
  4799. +
  4800. +#include "fsl_fman_dtsec.h"
  4801. +
  4802. +
  4803. +void fman_dtsec_stop_rx(struct dtsec_regs *regs)
  4804. +{
  4805. + /* Assert the graceful stop bit */
  4806. + iowrite32be(ioread32be(&regs->rctrl) | RCTRL_GRS, &regs->rctrl);
  4807. +}
  4808. +
  4809. +void fman_dtsec_stop_tx(struct dtsec_regs *regs)
  4810. +{
  4811. + /* Assert the graceful stop bit */
  4812. + iowrite32be(ioread32be(&regs->tctrl) | DTSEC_TCTRL_GTS, &regs->tctrl);
  4813. +}
  4814. +
  4815. +void fman_dtsec_start_tx(struct dtsec_regs *regs)
  4816. +{
  4817. + /* clear the graceful stop bit */
  4818. + iowrite32be(ioread32be(&regs->tctrl) & ~DTSEC_TCTRL_GTS, &regs->tctrl);
  4819. +}
  4820. +
  4821. +void fman_dtsec_start_rx(struct dtsec_regs *regs)
  4822. +{
  4823. + /* clear the graceful stop bit */
  4824. + iowrite32be(ioread32be(&regs->rctrl) & ~RCTRL_GRS, &regs->rctrl);
  4825. +}
  4826. +
  4827. +void fman_dtsec_defconfig(struct dtsec_cfg *cfg)
  4828. +{
  4829. + cfg->halfdup_on = DEFAULT_HALFDUP_ON;
  4830. + cfg->halfdup_retransmit = DEFAULT_HALFDUP_RETRANSMIT;
  4831. + cfg->halfdup_coll_window = DEFAULT_HALFDUP_COLL_WINDOW;
  4832. + cfg->halfdup_excess_defer = DEFAULT_HALFDUP_EXCESS_DEFER;
  4833. + cfg->halfdup_no_backoff = DEFAULT_HALFDUP_NO_BACKOFF;
  4834. + cfg->halfdup_bp_no_backoff = DEFAULT_HALFDUP_BP_NO_BACKOFF;
  4835. + cfg->halfdup_alt_backoff_val = DEFAULT_HALFDUP_ALT_BACKOFF_VAL;
  4836. + cfg->halfdup_alt_backoff_en = DEFAULT_HALFDUP_ALT_BACKOFF_EN;
  4837. + cfg->rx_drop_bcast = DEFAULT_RX_DROP_BCAST;
  4838. + cfg->rx_short_frm = DEFAULT_RX_SHORT_FRM;
  4839. + cfg->rx_len_check = DEFAULT_RX_LEN_CHECK;
  4840. + cfg->tx_pad_crc = DEFAULT_TX_PAD_CRC;
  4841. + cfg->tx_crc = DEFAULT_TX_CRC;
  4842. + cfg->rx_ctrl_acc = DEFAULT_RX_CTRL_ACC;
  4843. + cfg->tx_pause_time = DEFAULT_TX_PAUSE_TIME;
  4844. + cfg->tbipa = DEFAULT_TBIPA; /* PHY address 0 is reserved (DPAA RM)*/
  4845. + cfg->rx_prepend = DEFAULT_RX_PREPEND;
  4846. + cfg->ptp_tsu_en = DEFAULT_PTP_TSU_EN;
  4847. + cfg->ptp_exception_en = DEFAULT_PTP_EXCEPTION_EN;
  4848. + cfg->preamble_len = DEFAULT_PREAMBLE_LEN;
  4849. + cfg->rx_preamble = DEFAULT_RX_PREAMBLE;
  4850. + cfg->tx_preamble = DEFAULT_TX_PREAMBLE;
  4851. + cfg->loopback = DEFAULT_LOOPBACK;
  4852. + cfg->rx_time_stamp_en = DEFAULT_RX_TIME_STAMP_EN;
  4853. + cfg->tx_time_stamp_en = DEFAULT_TX_TIME_STAMP_EN;
  4854. + cfg->rx_flow = DEFAULT_RX_FLOW;
  4855. + cfg->tx_flow = DEFAULT_TX_FLOW;
  4856. + cfg->rx_group_hash_exd = DEFAULT_RX_GROUP_HASH_EXD;
  4857. + cfg->tx_pause_time_extd = DEFAULT_TX_PAUSE_TIME_EXTD;
  4858. + cfg->rx_promisc = DEFAULT_RX_PROMISC;
  4859. + cfg->non_back_to_back_ipg1 = DEFAULT_NON_BACK_TO_BACK_IPG1;
  4860. + cfg->non_back_to_back_ipg2 = DEFAULT_NON_BACK_TO_BACK_IPG2;
  4861. + cfg->min_ifg_enforcement = DEFAULT_MIN_IFG_ENFORCEMENT;
  4862. + cfg->back_to_back_ipg = DEFAULT_BACK_TO_BACK_IPG;
  4863. + cfg->maximum_frame = DEFAULT_MAXIMUM_FRAME;
  4864. + cfg->tbi_phy_addr = DEFAULT_TBI_PHY_ADDR;
  4865. + cfg->wake_on_lan = DEFAULT_WAKE_ON_LAN;
  4866. +}
  4867. +
  4868. +int fman_dtsec_init(struct dtsec_regs *regs, struct dtsec_cfg *cfg,
  4869. + enum enet_interface iface_mode,
  4870. + enum enet_speed iface_speed,
  4871. + uint8_t *macaddr,
  4872. + uint8_t fm_rev_maj,
  4873. + uint8_t fm_rev_min,
  4874. + uint32_t exception_mask)
  4875. +{
  4876. + bool is_rgmii = FALSE;
  4877. + bool is_sgmii = FALSE;
  4878. + bool is_qsgmii = FALSE;
  4879. + int i;
  4880. + uint32_t tmp;
  4881. +
  4882. +UNUSED(fm_rev_maj);UNUSED(fm_rev_min);
  4883. +
  4884. + /* let's start with a soft reset */
  4885. + iowrite32be(MACCFG1_SOFT_RESET, &regs->maccfg1);
  4886. + iowrite32be(0, &regs->maccfg1);
  4887. +
  4888. + /*************dtsec_id2******************/
  4889. + tmp = ioread32be(&regs->tsec_id2);
  4890. +
  4891. + /* check RGMII support */
  4892. + if (iface_mode == E_ENET_IF_RGMII ||
  4893. + iface_mode == E_ENET_IF_RMII)
  4894. + if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
  4895. + return -EINVAL;
  4896. +
  4897. + if (iface_mode == E_ENET_IF_SGMII ||
  4898. + iface_mode == E_ENET_IF_MII)
  4899. + if (tmp & DTSEC_ID2_INT_REDUCED_OFF)
  4900. + return -EINVAL;
  4901. +
  4902. + /***************ECNTRL************************/
  4903. +
  4904. + is_rgmii = (bool)((iface_mode == E_ENET_IF_RGMII) ? TRUE : FALSE);
  4905. + is_sgmii = (bool)((iface_mode == E_ENET_IF_SGMII) ? TRUE : FALSE);
  4906. + is_qsgmii = (bool)((iface_mode == E_ENET_IF_QSGMII) ? TRUE : FALSE);
  4907. +
  4908. + tmp = 0;
  4909. + if (is_rgmii || iface_mode == E_ENET_IF_GMII)
  4910. + tmp |= DTSEC_ECNTRL_GMIIM;
  4911. + if (is_sgmii)
  4912. + tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM);
  4913. + if (is_qsgmii)
  4914. + tmp |= (DTSEC_ECNTRL_SGMIIM | DTSEC_ECNTRL_TBIM |
  4915. + DTSEC_ECNTRL_QSGMIIM);
  4916. + if (is_rgmii)
  4917. + tmp |= DTSEC_ECNTRL_RPM;
  4918. + if (iface_speed == E_ENET_SPEED_100)
  4919. + tmp |= DTSEC_ECNTRL_R100M;
  4920. +
  4921. + iowrite32be(tmp, &regs->ecntrl);
  4922. + /***************ECNTRL************************/
  4923. +
  4924. + /***************TCTRL************************/
  4925. + tmp = 0;
  4926. + if (cfg->halfdup_on)
  4927. + tmp |= DTSEC_TCTRL_THDF;
  4928. + if (cfg->tx_time_stamp_en)
  4929. + tmp |= DTSEC_TCTRL_TTSE;
  4930. +
  4931. + iowrite32be(tmp, &regs->tctrl);
  4932. +
  4933. + /***************TCTRL************************/
  4934. +
  4935. + /***************PTV************************/
  4936. + tmp = 0;
  4937. +
  4938. +#ifdef FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1
  4939. + if ((fm_rev_maj == 1) && (fm_rev_min == 0))
  4940. + cfg->tx_pause_time += 2;
  4941. +#endif /* FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1 */
  4942. +
  4943. + if (cfg->tx_pause_time)
  4944. + tmp |= cfg->tx_pause_time;
  4945. + if (cfg->tx_pause_time_extd)
  4946. + tmp |= cfg->tx_pause_time_extd << PTV_PTE_OFST;
  4947. + iowrite32be(tmp, &regs->ptv);
  4948. +
  4949. + /***************RCTRL************************/
  4950. + tmp = 0;
  4951. + tmp |= ((uint32_t)(cfg->rx_prepend & 0x0000001f)) << 16;
  4952. + if (cfg->rx_ctrl_acc)
  4953. + tmp |= RCTRL_CFA;
  4954. + if (cfg->rx_group_hash_exd)
  4955. + tmp |= RCTRL_GHTX;
  4956. + if (cfg->rx_time_stamp_en)
  4957. + tmp |= RCTRL_RTSE;
  4958. + if (cfg->rx_drop_bcast)
  4959. + tmp |= RCTRL_BC_REJ;
  4960. + if (cfg->rx_short_frm)
  4961. + tmp |= RCTRL_RSF;
  4962. + if (cfg->rx_promisc)
  4963. + tmp |= RCTRL_PROM;
  4964. +
  4965. + iowrite32be(tmp, &regs->rctrl);
  4966. + /***************RCTRL************************/
  4967. +
  4968. + /*
  4969. + * Assign a Phy Address to the TBI (TBIPA).
  4970. + * Done also in cases where TBI is not selected to avoid conflict with
  4971. + * the external PHY's Physical address
  4972. + */
  4973. + iowrite32be(cfg->tbipa, &regs->tbipa);
  4974. +
  4975. + /***************TMR_CTL************************/
  4976. + iowrite32be(0, &regs->tmr_ctrl);
  4977. +
  4978. + if (cfg->ptp_tsu_en) {
  4979. + tmp = 0;
  4980. + tmp |= TMR_PEVENT_TSRE;
  4981. + iowrite32be(tmp, &regs->tmr_pevent);
  4982. +
  4983. + if (cfg->ptp_exception_en) {
  4984. + tmp = 0;
  4985. + tmp |= TMR_PEMASK_TSREEN;
  4986. + iowrite32be(tmp, &regs->tmr_pemask);
  4987. + }
  4988. + }
  4989. +
  4990. + /***************MACCFG1***********************/
  4991. + tmp = 0;
  4992. + if (cfg->loopback)
  4993. + tmp |= MACCFG1_LOOPBACK;
  4994. + if (cfg->rx_flow)
  4995. + tmp |= MACCFG1_RX_FLOW;
  4996. + if (cfg->tx_flow)
  4997. + tmp |= MACCFG1_TX_FLOW;
  4998. + iowrite32be(tmp, &regs->maccfg1);
  4999. +
  5000. + /***************MACCFG1***********************/
  5001. +
  5002. + /***************MACCFG2***********************/
  5003. + tmp = 0;
  5004. +
  5005. + if (iface_speed < E_ENET_SPEED_1000)
  5006. + tmp |= MACCFG2_NIBBLE_MODE;
  5007. + else if (iface_speed == E_ENET_SPEED_1000)
  5008. + tmp |= MACCFG2_BYTE_MODE;
  5009. +
  5010. + tmp |= ((uint32_t) cfg->preamble_len & 0x0000000f)
  5011. + << PREAMBLE_LENGTH_SHIFT;
  5012. +
  5013. + if (cfg->rx_preamble)
  5014. + tmp |= MACCFG2_PRE_AM_Rx_EN;
  5015. + if (cfg->tx_preamble)
  5016. + tmp |= MACCFG2_PRE_AM_Tx_EN;
  5017. + if (cfg->rx_len_check)
  5018. + tmp |= MACCFG2_LENGTH_CHECK;
  5019. + if (cfg->tx_pad_crc)
  5020. + tmp |= MACCFG2_PAD_CRC_EN;
  5021. + if (cfg->tx_crc)
  5022. + tmp |= MACCFG2_CRC_EN;
  5023. + if (!cfg->halfdup_on)
  5024. + tmp |= MACCFG2_FULL_DUPLEX;
  5025. + iowrite32be(tmp, &regs->maccfg2);
  5026. +
  5027. + /***************MACCFG2***********************/
  5028. +
  5029. + /***************IPGIFG************************/
  5030. + tmp = (((cfg->non_back_to_back_ipg1 <<
  5031. + IPGIFG_NON_BACK_TO_BACK_IPG_1_SHIFT)
  5032. + & IPGIFG_NON_BACK_TO_BACK_IPG_1)
  5033. + | ((cfg->non_back_to_back_ipg2 <<
  5034. + IPGIFG_NON_BACK_TO_BACK_IPG_2_SHIFT)
  5035. + & IPGIFG_NON_BACK_TO_BACK_IPG_2)
  5036. + | ((cfg->min_ifg_enforcement <<
  5037. + IPGIFG_MIN_IFG_ENFORCEMENT_SHIFT)
  5038. + & IPGIFG_MIN_IFG_ENFORCEMENT)
  5039. + | (cfg->back_to_back_ipg & IPGIFG_BACK_TO_BACK_IPG));
  5040. + iowrite32be(tmp, &regs->ipgifg);
  5041. +
  5042. + /***************IPGIFG************************/
  5043. +
  5044. + /***************HAFDUP************************/
  5045. + tmp = 0;
  5046. +
  5047. + if (cfg->halfdup_alt_backoff_en)
  5048. + tmp = (uint32_t)(HAFDUP_ALT_BEB |
  5049. + ((cfg->halfdup_alt_backoff_val & 0x0000000f)
  5050. + << HAFDUP_ALTERNATE_BEB_TRUNCATION_SHIFT));
  5051. + if (cfg->halfdup_bp_no_backoff)
  5052. + tmp |= HAFDUP_BP_NO_BACKOFF;
  5053. + if (cfg->halfdup_no_backoff)
  5054. + tmp |= HAFDUP_NO_BACKOFF;
  5055. + if (cfg->halfdup_excess_defer)
  5056. + tmp |= HAFDUP_EXCESS_DEFER;
  5057. + tmp |= ((cfg->halfdup_retransmit << HAFDUP_RETRANSMISSION_MAX_SHIFT)
  5058. + & HAFDUP_RETRANSMISSION_MAX);
  5059. + tmp |= (cfg->halfdup_coll_window & HAFDUP_COLLISION_WINDOW);
  5060. +
  5061. + iowrite32be(tmp, &regs->hafdup);
  5062. + /***************HAFDUP************************/
  5063. +
  5064. + /***************MAXFRM************************/
  5065. + /* Initialize MAXFRM */
  5066. + iowrite32be(cfg->maximum_frame, &regs->maxfrm);
  5067. +
  5068. + /***************MAXFRM************************/
  5069. +
  5070. + /***************CAM1************************/
  5071. + iowrite32be(0xffffffff, &regs->cam1);
  5072. + iowrite32be(0xffffffff, &regs->cam2);
  5073. +
  5074. + /***************IMASK************************/
  5075. + iowrite32be(exception_mask, &regs->imask);
  5076. + /***************IMASK************************/
  5077. +
  5078. + /***************IEVENT************************/
  5079. + iowrite32be(0xffffffff, &regs->ievent);
  5080. +
  5081. + /***************MACSTNADDR1/2*****************/
  5082. +
  5083. + tmp = (uint32_t)((macaddr[5] << 24) |
  5084. + (macaddr[4] << 16) |
  5085. + (macaddr[3] << 8) |
  5086. + macaddr[2]);
  5087. + iowrite32be(tmp, &regs->macstnaddr1);
  5088. +
  5089. + tmp = (uint32_t)((macaddr[1] << 24) |
  5090. + (macaddr[0] << 16));
  5091. + iowrite32be(tmp, &regs->macstnaddr2);
  5092. +
  5093. + /***************MACSTNADDR1/2*****************/
  5094. +
  5095. + /*****************HASH************************/
  5096. + for (i = 0; i < NUM_OF_HASH_REGS ; i++) {
  5097. + /* Initialize IADDRx */
  5098. + iowrite32be(0, &regs->igaddr[i]);
  5099. + /* Initialize GADDRx */
  5100. + iowrite32be(0, &regs->gaddr[i]);
  5101. + }
  5102. +
  5103. + fman_dtsec_reset_stat(regs);
  5104. +
  5105. + return 0;
  5106. +}
  5107. +
  5108. +uint16_t fman_dtsec_get_max_frame_len(struct dtsec_regs *regs)
  5109. +{
  5110. + return (uint16_t)ioread32be(&regs->maxfrm);
  5111. +}
  5112. +
  5113. +void fman_dtsec_set_max_frame_len(struct dtsec_regs *regs, uint16_t length)
  5114. +{
  5115. + iowrite32be(length, &regs->maxfrm);
  5116. +}
  5117. +
  5118. +void fman_dtsec_set_mac_address(struct dtsec_regs *regs, uint8_t *adr)
  5119. +{
  5120. + uint32_t tmp;
  5121. +
  5122. + tmp = (uint32_t)((adr[5] << 24) |
  5123. + (adr[4] << 16) |
  5124. + (adr[3] << 8) |
  5125. + adr[2]);
  5126. + iowrite32be(tmp, &regs->macstnaddr1);
  5127. +
  5128. + tmp = (uint32_t)((adr[1] << 24) |
  5129. + (adr[0] << 16));
  5130. + iowrite32be(tmp, &regs->macstnaddr2);
  5131. +}
  5132. +
  5133. +void fman_dtsec_get_mac_address(struct dtsec_regs *regs, uint8_t *macaddr)
  5134. +{
  5135. + uint32_t tmp1, tmp2;
  5136. +
  5137. + tmp1 = ioread32be(&regs->macstnaddr1);
  5138. + tmp2 = ioread32be(&regs->macstnaddr2);
  5139. +
  5140. + macaddr[0] = (uint8_t)((tmp2 & 0x00ff0000) >> 16);
  5141. + macaddr[1] = (uint8_t)((tmp2 & 0xff000000) >> 24);
  5142. + macaddr[2] = (uint8_t)(tmp1 & 0x000000ff);
  5143. + macaddr[3] = (uint8_t)((tmp1 & 0x0000ff00) >> 8);
  5144. + macaddr[4] = (uint8_t)((tmp1 & 0x00ff0000) >> 16);
  5145. + macaddr[5] = (uint8_t)((tmp1 & 0xff000000) >> 24);
  5146. +}
  5147. +
  5148. +void fman_dtsec_set_hash_table(struct dtsec_regs *regs, uint32_t crc, bool mcast, bool ghtx)
  5149. +{
  5150. + int32_t bucket;
  5151. + if (ghtx)
  5152. + bucket = (int32_t)((crc >> 23) & 0x1ff);
  5153. + else {
  5154. + bucket = (int32_t)((crc >> 24) & 0xff);
  5155. + /* if !ghtx and mcast the bit must be set in gaddr instead of igaddr. */
  5156. + if (mcast)
  5157. + bucket += 0x100;
  5158. + }
  5159. + fman_dtsec_set_bucket(regs, bucket, TRUE);
  5160. +}
  5161. +
  5162. +void fman_dtsec_set_bucket(struct dtsec_regs *regs, int bucket, bool enable)
  5163. +{
  5164. + int reg_idx = (bucket >> 5) & 0xf;
  5165. + int bit_idx = bucket & 0x1f;
  5166. + uint32_t bit_mask = 0x80000000 >> bit_idx;
  5167. + uint32_t *reg;
  5168. +
  5169. + if (reg_idx > 7)
  5170. + reg = &regs->gaddr[reg_idx-8];
  5171. + else
  5172. + reg = &regs->igaddr[reg_idx];
  5173. +
  5174. + if (enable)
  5175. + iowrite32be(ioread32be(reg) | bit_mask, reg);
  5176. + else
  5177. + iowrite32be(ioread32be(reg) & (~bit_mask), reg);
  5178. +}
  5179. +
  5180. +void fman_dtsec_reset_filter_table(struct dtsec_regs *regs, bool mcast, bool ucast)
  5181. +{
  5182. + int i;
  5183. + bool ghtx;
  5184. +
  5185. + ghtx = (bool)((ioread32be(&regs->rctrl) & RCTRL_GHTX) ? TRUE : FALSE);
  5186. +
  5187. + if (ucast || (ghtx && mcast)) {
  5188. + for (i = 0; i < NUM_OF_HASH_REGS; i++)
  5189. + iowrite32be(0, &regs->igaddr[i]);
  5190. + }
  5191. + if (mcast) {
  5192. + for (i = 0; i < NUM_OF_HASH_REGS; i++)
  5193. + iowrite32be(0, &regs->gaddr[i]);
  5194. + }
  5195. +}
  5196. +
  5197. +int fman_dtsec_set_tbi_phy_addr(struct dtsec_regs *regs,
  5198. + uint8_t addr)
  5199. +{
  5200. + if (addr > 0 && addr < 32)
  5201. + iowrite32be(addr, &regs->tbipa);
  5202. + else
  5203. + return -EINVAL;
  5204. +
  5205. + return 0;
  5206. +}
  5207. +
  5208. +void fman_dtsec_set_wol(struct dtsec_regs *regs, bool en)
  5209. +{
  5210. + uint32_t tmp;
  5211. +
  5212. + tmp = ioread32be(&regs->maccfg2);
  5213. + if (en)
  5214. + tmp |= MACCFG2_MAGIC_PACKET_EN;
  5215. + else
  5216. + tmp &= ~MACCFG2_MAGIC_PACKET_EN;
  5217. + iowrite32be(tmp, &regs->maccfg2);
  5218. +}
  5219. +
  5220. +int fman_dtsec_adjust_link(struct dtsec_regs *regs,
  5221. + enum enet_interface iface_mode,
  5222. + enum enet_speed speed, bool full_dx)
  5223. +{
  5224. + uint32_t tmp;
  5225. +
  5226. + UNUSED(iface_mode);
  5227. +
  5228. + if ((speed == E_ENET_SPEED_1000) && !full_dx)
  5229. + return -EINVAL;
  5230. +
  5231. + tmp = ioread32be(&regs->maccfg2);
  5232. + if (!full_dx)
  5233. + tmp &= ~MACCFG2_FULL_DUPLEX;
  5234. + else
  5235. + tmp |= MACCFG2_FULL_DUPLEX;
  5236. +
  5237. + tmp &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE);
  5238. + if (speed < E_ENET_SPEED_1000)
  5239. + tmp |= MACCFG2_NIBBLE_MODE;
  5240. + else if (speed == E_ENET_SPEED_1000)
  5241. + tmp |= MACCFG2_BYTE_MODE;
  5242. + iowrite32be(tmp, &regs->maccfg2);
  5243. +
  5244. + tmp = ioread32be(&regs->ecntrl);
  5245. + if (speed == E_ENET_SPEED_100)
  5246. + tmp |= DTSEC_ECNTRL_R100M;
  5247. + else
  5248. + tmp &= ~DTSEC_ECNTRL_R100M;
  5249. + iowrite32be(tmp, &regs->ecntrl);
  5250. +
  5251. + return 0;
  5252. +}
  5253. +
  5254. +void fman_dtsec_set_uc_promisc(struct dtsec_regs *regs, bool enable)
  5255. +{
  5256. + uint32_t tmp;
  5257. +
  5258. + tmp = ioread32be(&regs->rctrl);
  5259. +
  5260. + if (enable)
  5261. + tmp |= RCTRL_UPROM;
  5262. + else
  5263. + tmp &= ~RCTRL_UPROM;
  5264. +
  5265. + iowrite32be(tmp, &regs->rctrl);
  5266. +}
  5267. +
  5268. +void fman_dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable)
  5269. +{
  5270. + uint32_t tmp;
  5271. +
  5272. + tmp = ioread32be(&regs->rctrl);
  5273. +
  5274. + if (enable)
  5275. + tmp |= RCTRL_MPROM;
  5276. + else
  5277. + tmp &= ~RCTRL_MPROM;
  5278. +
  5279. + iowrite32be(tmp, &regs->rctrl);
  5280. +}
  5281. +
  5282. +bool fman_dtsec_get_clear_carry_regs(struct dtsec_regs *regs,
  5283. + uint32_t *car1, uint32_t *car2)
  5284. +{
  5285. + /* read carry registers */
  5286. + *car1 = ioread32be(&regs->car1);
  5287. + *car2 = ioread32be(&regs->car2);
  5288. + /* clear carry registers */
  5289. + if (*car1)
  5290. + iowrite32be(*car1, &regs->car1);
  5291. + if (*car2)
  5292. + iowrite32be(*car2, &regs->car2);
  5293. +
  5294. + return (bool)((*car1 | *car2) ? TRUE : FALSE);
  5295. +}
  5296. +
  5297. +void fman_dtsec_reset_stat(struct dtsec_regs *regs)
  5298. +{
  5299. + /* clear HW counters */
  5300. + iowrite32be(ioread32be(&regs->ecntrl) |
  5301. + DTSEC_ECNTRL_CLRCNT, &regs->ecntrl);
  5302. +}
  5303. +
  5304. +int fman_dtsec_set_stat_level(struct dtsec_regs *regs, enum dtsec_stat_level level)
  5305. +{
  5306. + switch (level) {
  5307. + case E_MAC_STAT_NONE:
  5308. + iowrite32be(0xffffffff, &regs->cam1);
  5309. + iowrite32be(0xffffffff, &regs->cam2);
  5310. + iowrite32be(ioread32be(&regs->ecntrl) & ~DTSEC_ECNTRL_STEN,
  5311. + &regs->ecntrl);
  5312. + iowrite32be(ioread32be(&regs->imask) & ~DTSEC_IMASK_MSROEN,
  5313. + &regs->imask);
  5314. + break;
  5315. + case E_MAC_STAT_PARTIAL:
  5316. + iowrite32be(CAM1_ERRORS_ONLY, &regs->cam1);
  5317. + iowrite32be(CAM2_ERRORS_ONLY, &regs->cam2);
  5318. + iowrite32be(ioread32be(&regs->ecntrl) | DTSEC_ECNTRL_STEN,
  5319. + &regs->ecntrl);
  5320. + iowrite32be(ioread32be(&regs->imask) | DTSEC_IMASK_MSROEN,
  5321. + &regs->imask);
  5322. + break;
  5323. + case E_MAC_STAT_MIB_GRP1:
  5324. + iowrite32be((uint32_t)~CAM1_MIB_GRP_1, &regs->cam1);
  5325. + iowrite32be((uint32_t)~CAM2_MIB_GRP_1, &regs->cam2);
  5326. + iowrite32be(ioread32be(&regs->ecntrl) | DTSEC_ECNTRL_STEN,
  5327. + &regs->ecntrl);
  5328. + iowrite32be(ioread32be(&regs->imask) | DTSEC_IMASK_MSROEN,
  5329. + &regs->imask);
  5330. + break;
  5331. + case E_MAC_STAT_FULL:
  5332. + iowrite32be(0, &regs->cam1);
  5333. + iowrite32be(0, &regs->cam2);
  5334. + iowrite32be(ioread32be(&regs->ecntrl) | DTSEC_ECNTRL_STEN,
  5335. + &regs->ecntrl);
  5336. + iowrite32be(ioread32be(&regs->imask) | DTSEC_IMASK_MSROEN,
  5337. + &regs->imask);
  5338. + break;
  5339. + default:
  5340. + return -EINVAL;
  5341. + }
  5342. +
  5343. + return 0;
  5344. +}
  5345. +
  5346. +void fman_dtsec_set_ts(struct dtsec_regs *regs, bool en)
  5347. +{
  5348. + if (en) {
  5349. + iowrite32be(ioread32be(&regs->rctrl) | RCTRL_RTSE,
  5350. + &regs->rctrl);
  5351. + iowrite32be(ioread32be(&regs->tctrl) | DTSEC_TCTRL_TTSE,
  5352. + &regs->tctrl);
  5353. + } else {
  5354. + iowrite32be(ioread32be(&regs->rctrl) & ~RCTRL_RTSE,
  5355. + &regs->rctrl);
  5356. + iowrite32be(ioread32be(&regs->tctrl) & ~DTSEC_TCTRL_TTSE,
  5357. + &regs->tctrl);
  5358. + }
  5359. +}
  5360. +
  5361. +void fman_dtsec_enable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx)
  5362. +{
  5363. + uint32_t tmp;
  5364. +
  5365. + tmp = ioread32be(&regs->maccfg1);
  5366. +
  5367. + if (apply_rx)
  5368. + tmp |= MACCFG1_RX_EN ;
  5369. +
  5370. + if (apply_tx)
  5371. + tmp |= MACCFG1_TX_EN ;
  5372. +
  5373. + iowrite32be(tmp, &regs->maccfg1);
  5374. +}
  5375. +
  5376. +void fman_dtsec_clear_addr_in_paddr(struct dtsec_regs *regs, uint8_t paddr_num)
  5377. +{
  5378. + iowrite32be(0, &regs->macaddr[paddr_num].exact_match1);
  5379. + iowrite32be(0, &regs->macaddr[paddr_num].exact_match2);
  5380. +}
  5381. +
  5382. +void fman_dtsec_add_addr_in_paddr(struct dtsec_regs *regs,
  5383. + uint64_t addr,
  5384. + uint8_t paddr_num)
  5385. +{
  5386. + uint32_t tmp;
  5387. +
  5388. + tmp = (uint32_t)(addr);
  5389. + /* swap */
  5390. + tmp = (((tmp & 0x000000FF) << 24) |
  5391. + ((tmp & 0x0000FF00) << 8) |
  5392. + ((tmp & 0x00FF0000) >> 8) |
  5393. + ((tmp & 0xFF000000) >> 24));
  5394. + iowrite32be(tmp, &regs->macaddr[paddr_num].exact_match1);
  5395. +
  5396. + tmp = (uint32_t)(addr>>32);
  5397. + /* swap */
  5398. + tmp = (((tmp & 0x000000FF) << 24) |
  5399. + ((tmp & 0x0000FF00) << 8) |
  5400. + ((tmp & 0x00FF0000) >> 8) |
  5401. + ((tmp & 0xFF000000) >> 24));
  5402. + iowrite32be(tmp, &regs->macaddr[paddr_num].exact_match2);
  5403. +}
  5404. +
  5405. +void fman_dtsec_disable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx)
  5406. +{
  5407. + uint32_t tmp;
  5408. +
  5409. + tmp = ioread32be(&regs->maccfg1);
  5410. +
  5411. + if (apply_rx)
  5412. + tmp &= ~MACCFG1_RX_EN;
  5413. +
  5414. + if (apply_tx)
  5415. + tmp &= ~MACCFG1_TX_EN;
  5416. +
  5417. + iowrite32be(tmp, &regs->maccfg1);
  5418. +}
  5419. +
  5420. +void fman_dtsec_set_tx_pause_frames(struct dtsec_regs *regs, uint16_t time)
  5421. +{
  5422. + uint32_t ptv = 0;
  5423. +
  5424. + /* fixme: don't enable tx pause for half-duplex */
  5425. +
  5426. + if (time) {
  5427. + ptv = ioread32be(&regs->ptv);
  5428. + ptv &= 0xffff0000;
  5429. + ptv |= time & 0x0000ffff;
  5430. + iowrite32be(ptv, &regs->ptv);
  5431. +
  5432. + /* trigger the transmission of a flow-control pause frame */
  5433. + iowrite32be(ioread32be(&regs->maccfg1) | MACCFG1_TX_FLOW,
  5434. + &regs->maccfg1);
  5435. + } else
  5436. + iowrite32be(ioread32be(&regs->maccfg1) & ~MACCFG1_TX_FLOW,
  5437. + &regs->maccfg1);
  5438. +}
  5439. +
  5440. +void fman_dtsec_handle_rx_pause(struct dtsec_regs *regs, bool en)
  5441. +{
  5442. + uint32_t tmp;
  5443. +
  5444. + /* todo: check if mac is set to full-duplex */
  5445. +
  5446. + tmp = ioread32be(&regs->maccfg1);
  5447. + if (en)
  5448. + tmp |= MACCFG1_RX_FLOW;
  5449. + else
  5450. + tmp &= ~MACCFG1_RX_FLOW;
  5451. + iowrite32be(tmp, &regs->maccfg1);
  5452. +}
  5453. +
  5454. +uint32_t fman_dtsec_get_rctrl(struct dtsec_regs *regs)
  5455. +{
  5456. + return ioread32be(&regs->rctrl);
  5457. +}
  5458. +
  5459. +uint32_t fman_dtsec_get_revision(struct dtsec_regs *regs)
  5460. +{
  5461. + return ioread32be(&regs->tsec_id);
  5462. +}
  5463. +
  5464. +uint32_t fman_dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask)
  5465. +{
  5466. + return ioread32be(&regs->ievent) & ev_mask;
  5467. +}
  5468. +
  5469. +void fman_dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask)
  5470. +{
  5471. + iowrite32be(ev_mask, &regs->ievent);
  5472. +}
  5473. +
  5474. +uint32_t fman_dtsec_get_interrupt_mask(struct dtsec_regs *regs)
  5475. +{
  5476. + return ioread32be(&regs->imask);
  5477. +}
  5478. +
  5479. +uint32_t fman_dtsec_check_and_clear_tmr_event(struct dtsec_regs *regs)
  5480. +{
  5481. + uint32_t event;
  5482. +
  5483. + event = ioread32be(&regs->tmr_pevent);
  5484. + event &= ioread32be(&regs->tmr_pemask);
  5485. +
  5486. + if (event)
  5487. + iowrite32be(event, &regs->tmr_pevent);
  5488. + return event;
  5489. +}
  5490. +
  5491. +void fman_dtsec_enable_tmr_interrupt(struct dtsec_regs *regs)
  5492. +{
  5493. + iowrite32be(ioread32be(&regs->tmr_pemask) | TMR_PEMASK_TSREEN,
  5494. + &regs->tmr_pemask);
  5495. +}
  5496. +
  5497. +void fman_dtsec_disable_tmr_interrupt(struct dtsec_regs *regs)
  5498. +{
  5499. + iowrite32be(ioread32be(&regs->tmr_pemask) & ~TMR_PEMASK_TSREEN,
  5500. + &regs->tmr_pemask);
  5501. +}
  5502. +
  5503. +void fman_dtsec_enable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask)
  5504. +{
  5505. + iowrite32be(ioread32be(&regs->imask) | ev_mask, &regs->imask);
  5506. +}
  5507. +
  5508. +void fman_dtsec_disable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask)
  5509. +{
  5510. + iowrite32be(ioread32be(&regs->imask) & ~ev_mask, &regs->imask);
  5511. +}
  5512. +
  5513. +uint32_t fman_dtsec_get_stat_counter(struct dtsec_regs *regs,
  5514. + enum dtsec_stat_counters reg_name)
  5515. +{
  5516. + uint32_t ret_val;
  5517. +
  5518. + switch (reg_name) {
  5519. + case E_DTSEC_STAT_TR64:
  5520. + ret_val = ioread32be(&regs->tr64);
  5521. + break;
  5522. + case E_DTSEC_STAT_TR127:
  5523. + ret_val = ioread32be(&regs->tr127);
  5524. + break;
  5525. + case E_DTSEC_STAT_TR255:
  5526. + ret_val = ioread32be(&regs->tr255);
  5527. + break;
  5528. + case E_DTSEC_STAT_TR511:
  5529. + ret_val = ioread32be(&regs->tr511);
  5530. + break;
  5531. + case E_DTSEC_STAT_TR1K:
  5532. + ret_val = ioread32be(&regs->tr1k);
  5533. + break;
  5534. + case E_DTSEC_STAT_TRMAX:
  5535. + ret_val = ioread32be(&regs->trmax);
  5536. + break;
  5537. + case E_DTSEC_STAT_TRMGV:
  5538. + ret_val = ioread32be(&regs->trmgv);
  5539. + break;
  5540. + case E_DTSEC_STAT_RBYT:
  5541. + ret_val = ioread32be(&regs->rbyt);
  5542. + break;
  5543. + case E_DTSEC_STAT_RPKT:
  5544. + ret_val = ioread32be(&regs->rpkt);
  5545. + break;
  5546. + case E_DTSEC_STAT_RMCA:
  5547. + ret_val = ioread32be(&regs->rmca);
  5548. + break;
  5549. + case E_DTSEC_STAT_RBCA:
  5550. + ret_val = ioread32be(&regs->rbca);
  5551. + break;
  5552. + case E_DTSEC_STAT_RXPF:
  5553. + ret_val = ioread32be(&regs->rxpf);
  5554. + break;
  5555. + case E_DTSEC_STAT_RALN:
  5556. + ret_val = ioread32be(&regs->raln);
  5557. + break;
  5558. + case E_DTSEC_STAT_RFLR:
  5559. + ret_val = ioread32be(&regs->rflr);
  5560. + break;
  5561. + case E_DTSEC_STAT_RCDE:
  5562. + ret_val = ioread32be(&regs->rcde);
  5563. + break;
  5564. + case E_DTSEC_STAT_RCSE:
  5565. + ret_val = ioread32be(&regs->rcse);
  5566. + break;
  5567. + case E_DTSEC_STAT_RUND:
  5568. + ret_val = ioread32be(&regs->rund);
  5569. + break;
  5570. + case E_DTSEC_STAT_ROVR:
  5571. + ret_val = ioread32be(&regs->rovr);
  5572. + break;
  5573. + case E_DTSEC_STAT_RFRG:
  5574. + ret_val = ioread32be(&regs->rfrg);
  5575. + break;
  5576. + case E_DTSEC_STAT_RJBR:
  5577. + ret_val = ioread32be(&regs->rjbr);
  5578. + break;
  5579. + case E_DTSEC_STAT_RDRP:
  5580. + ret_val = ioread32be(&regs->rdrp);
  5581. + break;
  5582. + case E_DTSEC_STAT_TFCS:
  5583. + ret_val = ioread32be(&regs->tfcs);
  5584. + break;
  5585. + case E_DTSEC_STAT_TBYT:
  5586. + ret_val = ioread32be(&regs->tbyt);
  5587. + break;
  5588. + case E_DTSEC_STAT_TPKT:
  5589. + ret_val = ioread32be(&regs->tpkt);
  5590. + break;
  5591. + case E_DTSEC_STAT_TMCA:
  5592. + ret_val = ioread32be(&regs->tmca);
  5593. + break;
  5594. + case E_DTSEC_STAT_TBCA:
  5595. + ret_val = ioread32be(&regs->tbca);
  5596. + break;
  5597. + case E_DTSEC_STAT_TXPF:
  5598. + ret_val = ioread32be(&regs->txpf);
  5599. + break;
  5600. + case E_DTSEC_STAT_TNCL:
  5601. + ret_val = ioread32be(&regs->tncl);
  5602. + break;
  5603. + case E_DTSEC_STAT_TDRP:
  5604. + ret_val = ioread32be(&regs->tdrp);
  5605. + break;
  5606. + default:
  5607. + ret_val = 0;
  5608. + }
  5609. +
  5610. + return ret_val;
  5611. +}
  5612. --- /dev/null
  5613. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_dtsec_mii_acc.c
  5614. @@ -0,0 +1,163 @@
  5615. +/*
  5616. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  5617. + *
  5618. + * Redistribution and use in source and binary forms, with or without
  5619. + * modification, are permitted provided that the following conditions are met:
  5620. + * * Redistributions of source code must retain the above copyright
  5621. + * notice, this list of conditions and the following disclaimer.
  5622. + * * Redistributions in binary form must reproduce the above copyright
  5623. + * notice, this list of conditions and the following disclaimer in the
  5624. + * documentation and/or other materials provided with the distribution.
  5625. + * * Neither the name of Freescale Semiconductor nor the
  5626. + * names of its contributors may be used to endorse or promote products
  5627. + * derived from this software without specific prior written permission.
  5628. + *
  5629. + *
  5630. + * ALTERNATIVELY, this software may be distributed under the terms of the
  5631. + * GNU General Public License ("GPL") as published by the Free Software
  5632. + * Foundation, either version 2 of that License or (at your option) any
  5633. + * later version.
  5634. + *
  5635. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  5636. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  5637. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  5638. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  5639. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  5640. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  5641. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  5642. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  5643. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  5644. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  5645. + */
  5646. +
  5647. +
  5648. +#include "common/general.h"
  5649. +#include "fsl_fman_dtsec_mii_acc.h"
  5650. +
  5651. +
  5652. +/**
  5653. + * dtsec_mii_get_div() - calculates the value of the dtsec mii divider
  5654. + * @dtsec_freq: dtsec clock frequency (in Mhz)
  5655. + *
  5656. + * This function calculates the dtsec mii clock divider that determines
  5657. + * the MII MDC clock. MII MDC clock will be set to work in the range
  5658. + * of 1.5 to 2.5Mhz
  5659. + * The output of this function is the value of MIIMCFG[MgmtClk] which
  5660. + * implicitly determines the divider value.
  5661. + * Note: the dTSEC system clock is equal to 1/2 of the FMan clock.
  5662. + *
  5663. + * The table below which reflects dtsec_mii_get_div() functionality
  5664. + * shows the relations among dtsec_freq, MgmtClk, actual divider
  5665. + * and the MII frequency:
  5666. + *
  5667. + * dtsec freq MgmtClk div MII freq Mhz
  5668. + * [0.....80] 1 (1/4)(1/8) [0 to 2.5]
  5669. + * [81...120] 2 (1/6)(1/8) [1.6 to 2.5]
  5670. + * [121..160] 3 (1/8)(1/8) [1.8 to 2.5]
  5671. + * [161..200] 4 (1/10)(1/8) [2.0 to 2.5]
  5672. + * [201..280] 5 (1/14)(1/8) [1.8 to 2.5]
  5673. + * [281..400] 6 (1/20)(1/8) [1.1 to 2.5]
  5674. + * [401..560] 7 (1/28)(1/8) [1.8 to 2.5]
  5675. + * [560..frq] 7 (1/28)(1/8) [frq/224]
  5676. + *
  5677. + * Returns: the MIIMCFG[MgmtClk] appropriate value
  5678. + */
  5679. +
  5680. +static uint8_t dtsec_mii_get_div(uint16_t dtsec_freq)
  5681. +{
  5682. + uint16_t mgmt_clk;
  5683. +
  5684. + if (dtsec_freq < 80) mgmt_clk = 1;
  5685. + else if (dtsec_freq < 120) mgmt_clk = 2;
  5686. + else if (dtsec_freq < 160) mgmt_clk = 3;
  5687. + else if (dtsec_freq < 200) mgmt_clk = 4;
  5688. + else if (dtsec_freq < 280) mgmt_clk = 5;
  5689. + else if (dtsec_freq < 400) mgmt_clk = 6;
  5690. + else mgmt_clk = 7;
  5691. +
  5692. + return (uint8_t)mgmt_clk;
  5693. +}
  5694. +
  5695. +void fman_dtsec_mii_reset(struct dtsec_mii_reg *regs)
  5696. +{
  5697. + /* Reset the management interface */
  5698. + iowrite32be(ioread32be(&regs->miimcfg) | MIIMCFG_RESET_MGMT,
  5699. + &regs->miimcfg);
  5700. + iowrite32be(ioread32be(&regs->miimcfg) & ~MIIMCFG_RESET_MGMT,
  5701. + &regs->miimcfg);
  5702. +}
  5703. +
  5704. +
  5705. +int fman_dtsec_mii_write_reg(struct dtsec_mii_reg *regs, uint8_t addr,
  5706. + uint8_t reg, uint16_t data, uint16_t dtsec_freq)
  5707. +{
  5708. + uint32_t tmp;
  5709. +
  5710. + /* Setup the MII Mgmt clock speed */
  5711. + iowrite32be((uint32_t)dtsec_mii_get_div(dtsec_freq), &regs->miimcfg);
  5712. + wmb();
  5713. +
  5714. + /* Stop the MII management read cycle */
  5715. + iowrite32be(0, &regs->miimcom);
  5716. + /* Dummy read to make sure MIIMCOM is written */
  5717. + tmp = ioread32be(&regs->miimcom);
  5718. + wmb();
  5719. +
  5720. + /* Setting up MII Management Address Register */
  5721. + tmp = (uint32_t)((addr << MIIMADD_PHY_ADDR_SHIFT) | reg);
  5722. + iowrite32be(tmp, &regs->miimadd);
  5723. + wmb();
  5724. +
  5725. + /* Setting up MII Management Control Register with data */
  5726. + iowrite32be((uint32_t)data, &regs->miimcon);
  5727. + /* Dummy read to make sure MIIMCON is written */
  5728. + tmp = ioread32be(&regs->miimcon);
  5729. + wmb();
  5730. +
  5731. + /* Wait until MII management write is complete */
  5732. + /* todo: a timeout could be useful here */
  5733. + while ((ioread32be(&regs->miimind)) & MIIMIND_BUSY)
  5734. + /* busy wait */;
  5735. +
  5736. + return 0;
  5737. +}
  5738. +
  5739. +int fman_dtsec_mii_read_reg(struct dtsec_mii_reg *regs, uint8_t addr,
  5740. + uint8_t reg, uint16_t *data, uint16_t dtsec_freq)
  5741. +{
  5742. + uint32_t tmp;
  5743. +
  5744. + /* Setup the MII Mgmt clock speed */
  5745. + iowrite32be((uint32_t)dtsec_mii_get_div(dtsec_freq), &regs->miimcfg);
  5746. + wmb();
  5747. +
  5748. + /* Setting up the MII Management Address Register */
  5749. + tmp = (uint32_t)((addr << MIIMADD_PHY_ADDR_SHIFT) | reg);
  5750. + iowrite32be(tmp, &regs->miimadd);
  5751. + wmb();
  5752. +
  5753. + /* Perform an MII management read cycle */
  5754. + iowrite32be(MIIMCOM_READ_CYCLE, &regs->miimcom);
  5755. + /* Dummy read to make sure MIIMCOM is written */
  5756. + tmp = ioread32be(&regs->miimcom);
  5757. + wmb();
  5758. +
  5759. + /* Wait until MII management read is complete */
  5760. + /* todo: a timeout could be useful here */
  5761. + while ((ioread32be(&regs->miimind)) & MIIMIND_BUSY)
  5762. + /* busy wait */;
  5763. +
  5764. + /* Read MII management status */
  5765. + *data = (uint16_t)ioread32be(&regs->miimstat);
  5766. + wmb();
  5767. +
  5768. + iowrite32be(0, &regs->miimcom);
  5769. + /* Dummy read to make sure MIIMCOM is written */
  5770. + tmp = ioread32be(&regs->miimcom);
  5771. +
  5772. + if (*data == 0xffff)
  5773. + return -ENXIO;
  5774. +
  5775. + return 0;
  5776. +}
  5777. +
  5778. --- /dev/null
  5779. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac.c
  5780. @@ -0,0 +1,511 @@
  5781. +/*
  5782. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  5783. + *
  5784. + * Redistribution and use in source and binary forms, with or without
  5785. + * modification, are permitted provided that the following conditions are met:
  5786. + * * Redistributions of source code must retain the above copyright
  5787. + * notice, this list of conditions and the following disclaimer.
  5788. + * * Redistributions in binary form must reproduce the above copyright
  5789. + * notice, this list of conditions and the following disclaimer in the
  5790. + * documentation and/or other materials provided with the distribution.
  5791. + * * Neither the name of Freescale Semiconductor nor the
  5792. + * names of its contributors may be used to endorse or promote products
  5793. + * derived from this software without specific prior written permission.
  5794. + *
  5795. + *
  5796. + * ALTERNATIVELY, this software may be distributed under the terms of the
  5797. + * GNU General Public License ("GPL") as published by the Free Software
  5798. + * Foundation, either version 2 of that License or (at your option) any
  5799. + * later version.
  5800. + *
  5801. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  5802. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  5803. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  5804. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  5805. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  5806. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  5807. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  5808. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  5809. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  5810. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  5811. + */
  5812. +
  5813. +
  5814. +#include "fsl_fman_memac.h"
  5815. +
  5816. +
  5817. +uint32_t fman_memac_get_event(struct memac_regs *regs, uint32_t ev_mask)
  5818. +{
  5819. + return ioread32be(&regs->ievent) & ev_mask;
  5820. +}
  5821. +
  5822. +uint32_t fman_memac_get_interrupt_mask(struct memac_regs *regs)
  5823. +{
  5824. + return ioread32be(&regs->imask);
  5825. +}
  5826. +
  5827. +void fman_memac_ack_event(struct memac_regs *regs, uint32_t ev_mask)
  5828. +{
  5829. + iowrite32be(ev_mask, &regs->ievent);
  5830. +}
  5831. +
  5832. +void fman_memac_set_promiscuous(struct memac_regs *regs, bool val)
  5833. +{
  5834. + uint32_t tmp;
  5835. +
  5836. + tmp = ioread32be(&regs->command_config);
  5837. +
  5838. + if (val)
  5839. + tmp |= CMD_CFG_PROMIS_EN;
  5840. + else
  5841. + tmp &= ~CMD_CFG_PROMIS_EN;
  5842. +
  5843. + iowrite32be(tmp, &regs->command_config);
  5844. +}
  5845. +
  5846. +void fman_memac_clear_addr_in_paddr(struct memac_regs *regs,
  5847. + uint8_t paddr_num)
  5848. +{
  5849. + if (paddr_num == 0) {
  5850. + iowrite32be(0, &regs->mac_addr0.mac_addr_l);
  5851. + iowrite32be(0, &regs->mac_addr0.mac_addr_u);
  5852. + } else {
  5853. + iowrite32be(0x0, &regs->mac_addr[paddr_num - 1].mac_addr_l);
  5854. + iowrite32be(0x0, &regs->mac_addr[paddr_num - 1].mac_addr_u);
  5855. + }
  5856. +}
  5857. +
  5858. +void fman_memac_add_addr_in_paddr(struct memac_regs *regs,
  5859. + uint8_t *adr,
  5860. + uint8_t paddr_num)
  5861. +{
  5862. + uint32_t tmp0, tmp1;
  5863. +
  5864. + tmp0 = (uint32_t)(adr[0] |
  5865. + adr[1] << 8 |
  5866. + adr[2] << 16 |
  5867. + adr[3] << 24);
  5868. + tmp1 = (uint32_t)(adr[4] | adr[5] << 8);
  5869. +
  5870. + if (paddr_num == 0) {
  5871. + iowrite32be(tmp0, &regs->mac_addr0.mac_addr_l);
  5872. + iowrite32be(tmp1, &regs->mac_addr0.mac_addr_u);
  5873. + } else {
  5874. + iowrite32be(tmp0, &regs->mac_addr[paddr_num-1].mac_addr_l);
  5875. + iowrite32be(tmp1, &regs->mac_addr[paddr_num-1].mac_addr_u);
  5876. + }
  5877. +}
  5878. +
  5879. +void fman_memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx)
  5880. +{
  5881. + uint32_t tmp;
  5882. +
  5883. + tmp = ioread32be(&regs->command_config);
  5884. +
  5885. + if (apply_rx)
  5886. + tmp |= CMD_CFG_RX_EN;
  5887. +
  5888. + if (apply_tx)
  5889. + tmp |= CMD_CFG_TX_EN;
  5890. +
  5891. + iowrite32be(tmp, &regs->command_config);
  5892. +}
  5893. +
  5894. +void fman_memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx)
  5895. +{
  5896. + uint32_t tmp;
  5897. +
  5898. + tmp = ioread32be(&regs->command_config);
  5899. +
  5900. + if (apply_rx)
  5901. + tmp &= ~CMD_CFG_RX_EN;
  5902. +
  5903. + if (apply_tx)
  5904. + tmp &= ~CMD_CFG_TX_EN;
  5905. +
  5906. + iowrite32be(tmp, &regs->command_config);
  5907. +}
  5908. +
  5909. +void fman_memac_reset_stat(struct memac_regs *regs)
  5910. +{
  5911. + uint32_t tmp;
  5912. +
  5913. + tmp = ioread32be(&regs->statn_config);
  5914. +
  5915. + tmp |= STATS_CFG_CLR;
  5916. +
  5917. + iowrite32be(tmp, &regs->statn_config);
  5918. +
  5919. + while (ioread32be(&regs->statn_config) & STATS_CFG_CLR);
  5920. +}
  5921. +
  5922. +void fman_memac_reset(struct memac_regs *regs)
  5923. +{
  5924. + uint32_t tmp;
  5925. +
  5926. + tmp = ioread32be(&regs->command_config);
  5927. +
  5928. + tmp |= CMD_CFG_SW_RESET;
  5929. +
  5930. + iowrite32be(tmp, &regs->command_config);
  5931. +
  5932. + while (ioread32be(&regs->command_config) & CMD_CFG_SW_RESET);
  5933. +}
  5934. +
  5935. +int fman_memac_init(struct memac_regs *regs,
  5936. + struct memac_cfg *cfg,
  5937. + enum enet_interface enet_interface,
  5938. + enum enet_speed enet_speed,
  5939. + bool slow_10g_if,
  5940. + uint32_t exceptions)
  5941. +{
  5942. + uint32_t tmp;
  5943. +
  5944. + /* Config */
  5945. + tmp = 0;
  5946. + if (cfg->wan_mode_enable)
  5947. + tmp |= CMD_CFG_WAN_MODE;
  5948. + if (cfg->promiscuous_mode_enable)
  5949. + tmp |= CMD_CFG_PROMIS_EN;
  5950. + if (cfg->pause_forward_enable)
  5951. + tmp |= CMD_CFG_PAUSE_FWD;
  5952. + if (cfg->pause_ignore)
  5953. + tmp |= CMD_CFG_PAUSE_IGNORE;
  5954. + if (cfg->tx_addr_ins_enable)
  5955. + tmp |= CMD_CFG_TX_ADDR_INS;
  5956. + if (cfg->loopback_enable)
  5957. + tmp |= CMD_CFG_LOOPBACK_EN;
  5958. + if (cfg->cmd_frame_enable)
  5959. + tmp |= CMD_CFG_CNT_FRM_EN;
  5960. + if (cfg->send_idle_enable)
  5961. + tmp |= CMD_CFG_SEND_IDLE;
  5962. + if (cfg->no_length_check_enable)
  5963. + tmp |= CMD_CFG_NO_LEN_CHK;
  5964. + if (cfg->rx_sfd_any)
  5965. + tmp |= CMD_CFG_SFD_ANY;
  5966. + if (cfg->pad_enable)
  5967. + tmp |= CMD_CFG_TX_PAD_EN;
  5968. + if (cfg->wake_on_lan)
  5969. + tmp |= CMD_CFG_MG;
  5970. +
  5971. + tmp |= CMD_CFG_CRC_FWD;
  5972. +
  5973. + iowrite32be(tmp, &regs->command_config);
  5974. +
  5975. + /* Max Frame Length */
  5976. + iowrite32be((uint32_t)cfg->max_frame_length, &regs->maxfrm);
  5977. +
  5978. + /* Pause Time */
  5979. + iowrite32be((uint32_t)cfg->pause_quanta, &regs->pause_quanta[0]);
  5980. + iowrite32be((uint32_t)0, &regs->pause_thresh[0]);
  5981. +
  5982. + /* IF_MODE */
  5983. + tmp = 0;
  5984. + switch (enet_interface) {
  5985. + case E_ENET_IF_XGMII:
  5986. + case E_ENET_IF_XFI:
  5987. + tmp |= IF_MODE_XGMII;
  5988. + break;
  5989. + default:
  5990. + tmp |= IF_MODE_GMII;
  5991. + if (enet_interface == E_ENET_IF_RGMII && !cfg->loopback_enable)
  5992. + tmp |= IF_MODE_RGMII | IF_MODE_RGMII_AUTO;
  5993. + }
  5994. + iowrite32be(tmp, &regs->if_mode);
  5995. +
  5996. + /* TX_FIFO_SECTIONS */
  5997. + tmp = 0;
  5998. + if (enet_interface == E_ENET_IF_XGMII ||
  5999. + enet_interface == E_ENET_IF_XFI) {
  6000. + if(slow_10g_if) {
  6001. + tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G |
  6002. + TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
  6003. + } else {
  6004. + tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_10G |
  6005. + TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G);
  6006. + }
  6007. + } else {
  6008. + tmp |= (TX_FIFO_SECTIONS_TX_AVAIL_1G |
  6009. + TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G);
  6010. + }
  6011. + iowrite32be(tmp, &regs->tx_fifo_sections);
  6012. +
  6013. + /* clear all pending events and set-up interrupts */
  6014. + fman_memac_ack_event(regs, 0xffffffff);
  6015. + fman_memac_set_exception(regs, exceptions, TRUE);
  6016. +
  6017. + return 0;
  6018. +}
  6019. +
  6020. +void fman_memac_set_exception(struct memac_regs *regs, uint32_t val, bool enable)
  6021. +{
  6022. + uint32_t tmp;
  6023. +
  6024. + tmp = ioread32be(&regs->imask);
  6025. + if (enable)
  6026. + tmp |= val;
  6027. + else
  6028. + tmp &= ~val;
  6029. +
  6030. + iowrite32be(tmp, &regs->imask);
  6031. +}
  6032. +
  6033. +void fman_memac_reset_filter_table(struct memac_regs *regs)
  6034. +{
  6035. + uint32_t i;
  6036. + for (i = 0; i < 64; i++)
  6037. + iowrite32be(i & ~HASH_CTRL_MCAST_EN, &regs->hashtable_ctrl);
  6038. +}
  6039. +
  6040. +void fman_memac_set_hash_table_entry(struct memac_regs *regs, uint32_t crc)
  6041. +{
  6042. + iowrite32be(crc | HASH_CTRL_MCAST_EN, &regs->hashtable_ctrl);
  6043. +}
  6044. +
  6045. +void fman_memac_set_hash_table(struct memac_regs *regs, uint32_t val)
  6046. +{
  6047. + iowrite32be(val, &regs->hashtable_ctrl);
  6048. +}
  6049. +
  6050. +uint16_t fman_memac_get_max_frame_len(struct memac_regs *regs)
  6051. +{
  6052. + uint32_t tmp;
  6053. +
  6054. + tmp = ioread32be(&regs->maxfrm);
  6055. +
  6056. + return(uint16_t)tmp;
  6057. +}
  6058. +
  6059. +
  6060. +void fman_memac_set_tx_pause_frames(struct memac_regs *regs,
  6061. + uint8_t priority,
  6062. + uint16_t pause_time,
  6063. + uint16_t thresh_time)
  6064. +{
  6065. + uint32_t tmp;
  6066. +
  6067. + tmp = ioread32be(&regs->tx_fifo_sections);
  6068. +
  6069. + if (priority == 0xff) {
  6070. + GET_TX_EMPTY_DEFAULT_VALUE(tmp);
  6071. + iowrite32be(tmp, &regs->tx_fifo_sections);
  6072. +
  6073. + tmp = ioread32be(&regs->command_config);
  6074. + tmp &= ~CMD_CFG_PFC_MODE;
  6075. + priority = 0;
  6076. + } else {
  6077. + GET_TX_EMPTY_PFC_VALUE(tmp);
  6078. + iowrite32be(tmp, &regs->tx_fifo_sections);
  6079. +
  6080. + tmp = ioread32be(&regs->command_config);
  6081. + tmp |= CMD_CFG_PFC_MODE;
  6082. + }
  6083. +
  6084. + iowrite32be(tmp, &regs->command_config);
  6085. +
  6086. + tmp = ioread32be(&regs->pause_quanta[priority / 2]);
  6087. + if (priority % 2)
  6088. + tmp &= 0x0000FFFF;
  6089. + else
  6090. + tmp &= 0xFFFF0000;
  6091. + tmp |= ((uint32_t)pause_time << (16 * (priority % 2)));
  6092. + iowrite32be(tmp, &regs->pause_quanta[priority / 2]);
  6093. +
  6094. + tmp = ioread32be(&regs->pause_thresh[priority / 2]);
  6095. + if (priority % 2)
  6096. + tmp &= 0x0000FFFF;
  6097. + else
  6098. + tmp &= 0xFFFF0000;
  6099. + tmp |= ((uint32_t)thresh_time<<(16 * (priority % 2)));
  6100. + iowrite32be(tmp, &regs->pause_thresh[priority / 2]);
  6101. +}
  6102. +
  6103. +void fman_memac_set_rx_ignore_pause_frames(struct memac_regs *regs,bool enable)
  6104. +{
  6105. + uint32_t tmp;
  6106. +
  6107. + tmp = ioread32be(&regs->command_config);
  6108. + if (enable)
  6109. + tmp |= CMD_CFG_PAUSE_IGNORE;
  6110. + else
  6111. + tmp &= ~CMD_CFG_PAUSE_IGNORE;
  6112. +
  6113. + iowrite32be(tmp, &regs->command_config);
  6114. +}
  6115. +
  6116. +void fman_memac_set_wol(struct memac_regs *regs, bool enable)
  6117. +{
  6118. + uint32_t tmp;
  6119. +
  6120. + tmp = ioread32be(&regs->command_config);
  6121. +
  6122. + if (enable)
  6123. + tmp |= CMD_CFG_MG;
  6124. + else
  6125. + tmp &= ~CMD_CFG_MG;
  6126. +
  6127. + iowrite32be(tmp, &regs->command_config);
  6128. +}
  6129. +
  6130. +#define GET_MEMAC_CNTR_64(bn) \
  6131. + (ioread32be(&regs->bn ## _l) | \
  6132. + ((uint64_t)ioread32be(&regs->bn ## _u) << 32))
  6133. +
  6134. +uint64_t fman_memac_get_counter(struct memac_regs *regs,
  6135. + enum memac_counters reg_name)
  6136. +{
  6137. + uint64_t ret_val;
  6138. +
  6139. + switch (reg_name) {
  6140. + case E_MEMAC_COUNTER_R64:
  6141. + ret_val = GET_MEMAC_CNTR_64(r64);
  6142. + break;
  6143. + case E_MEMAC_COUNTER_R127:
  6144. + ret_val = GET_MEMAC_CNTR_64(r127);
  6145. + break;
  6146. + case E_MEMAC_COUNTER_R255:
  6147. + ret_val = GET_MEMAC_CNTR_64(r255);
  6148. + break;
  6149. + case E_MEMAC_COUNTER_R511:
  6150. + ret_val = GET_MEMAC_CNTR_64(r511);
  6151. + break;
  6152. + case E_MEMAC_COUNTER_R1023:
  6153. + ret_val = GET_MEMAC_CNTR_64(r1023);
  6154. + break;
  6155. + case E_MEMAC_COUNTER_R1518:
  6156. + ret_val = GET_MEMAC_CNTR_64(r1518);
  6157. + break;
  6158. + case E_MEMAC_COUNTER_R1519X:
  6159. + ret_val = GET_MEMAC_CNTR_64(r1519x);
  6160. + break;
  6161. + case E_MEMAC_COUNTER_RFRG:
  6162. + ret_val = GET_MEMAC_CNTR_64(rfrg);
  6163. + break;
  6164. + case E_MEMAC_COUNTER_RJBR:
  6165. + ret_val = GET_MEMAC_CNTR_64(rjbr);
  6166. + break;
  6167. + case E_MEMAC_COUNTER_RDRP:
  6168. + ret_val = GET_MEMAC_CNTR_64(rdrp);
  6169. + break;
  6170. + case E_MEMAC_COUNTER_RALN:
  6171. + ret_val = GET_MEMAC_CNTR_64(raln);
  6172. + break;
  6173. + case E_MEMAC_COUNTER_TUND:
  6174. + ret_val = GET_MEMAC_CNTR_64(tund);
  6175. + break;
  6176. + case E_MEMAC_COUNTER_ROVR:
  6177. + ret_val = GET_MEMAC_CNTR_64(rovr);
  6178. + break;
  6179. + case E_MEMAC_COUNTER_RXPF:
  6180. + ret_val = GET_MEMAC_CNTR_64(rxpf);
  6181. + break;
  6182. + case E_MEMAC_COUNTER_TXPF:
  6183. + ret_val = GET_MEMAC_CNTR_64(txpf);
  6184. + break;
  6185. + case E_MEMAC_COUNTER_ROCT:
  6186. + ret_val = GET_MEMAC_CNTR_64(roct);
  6187. + break;
  6188. + case E_MEMAC_COUNTER_RMCA:
  6189. + ret_val = GET_MEMAC_CNTR_64(rmca);
  6190. + break;
  6191. + case E_MEMAC_COUNTER_RBCA:
  6192. + ret_val = GET_MEMAC_CNTR_64(rbca);
  6193. + break;
  6194. + case E_MEMAC_COUNTER_RPKT:
  6195. + ret_val = GET_MEMAC_CNTR_64(rpkt);
  6196. + break;
  6197. + case E_MEMAC_COUNTER_RUCA:
  6198. + ret_val = GET_MEMAC_CNTR_64(ruca);
  6199. + break;
  6200. + case E_MEMAC_COUNTER_RERR:
  6201. + ret_val = GET_MEMAC_CNTR_64(rerr);
  6202. + break;
  6203. + case E_MEMAC_COUNTER_TOCT:
  6204. + ret_val = GET_MEMAC_CNTR_64(toct);
  6205. + break;
  6206. + case E_MEMAC_COUNTER_TMCA:
  6207. + ret_val = GET_MEMAC_CNTR_64(tmca);
  6208. + break;
  6209. + case E_MEMAC_COUNTER_TBCA:
  6210. + ret_val = GET_MEMAC_CNTR_64(tbca);
  6211. + break;
  6212. + case E_MEMAC_COUNTER_TUCA:
  6213. + ret_val = GET_MEMAC_CNTR_64(tuca);
  6214. + break;
  6215. + case E_MEMAC_COUNTER_TERR:
  6216. + ret_val = GET_MEMAC_CNTR_64(terr);
  6217. + break;
  6218. + default:
  6219. + ret_val = 0;
  6220. + }
  6221. +
  6222. + return ret_val;
  6223. +}
  6224. +
  6225. +void fman_memac_adjust_link(struct memac_regs *regs,
  6226. + enum enet_interface iface_mode,
  6227. + enum enet_speed speed, bool full_dx)
  6228. +{
  6229. + uint32_t tmp;
  6230. +
  6231. + tmp = ioread32be(&regs->if_mode);
  6232. +
  6233. + if (full_dx)
  6234. + tmp &= ~IF_MODE_HD;
  6235. + else
  6236. + tmp |= IF_MODE_HD;
  6237. +
  6238. + if (iface_mode == E_ENET_IF_RGMII) {
  6239. + /* Configure RGMII in manual mode */
  6240. + tmp &= ~IF_MODE_RGMII_AUTO;
  6241. + tmp &= ~IF_MODE_RGMII_SP_MASK;
  6242. +
  6243. + if (full_dx)
  6244. + tmp |= IF_MODE_RGMII_FD;
  6245. + else
  6246. + tmp &= ~IF_MODE_RGMII_FD;
  6247. +
  6248. + switch (speed) {
  6249. + case E_ENET_SPEED_1000:
  6250. + tmp |= IF_MODE_RGMII_1000;
  6251. + break;
  6252. + case E_ENET_SPEED_100:
  6253. + tmp |= IF_MODE_RGMII_100;
  6254. + break;
  6255. + case E_ENET_SPEED_10:
  6256. + tmp |= IF_MODE_RGMII_10;
  6257. + break;
  6258. + default:
  6259. + break;
  6260. + }
  6261. + }
  6262. +
  6263. + iowrite32be(tmp, &regs->if_mode);
  6264. +}
  6265. +
  6266. +void fman_memac_defconfig(struct memac_cfg *cfg)
  6267. +{
  6268. + cfg->reset_on_init = FALSE;
  6269. + cfg->wan_mode_enable = FALSE;
  6270. + cfg->promiscuous_mode_enable = FALSE;
  6271. + cfg->pause_forward_enable = FALSE;
  6272. + cfg->pause_ignore = FALSE;
  6273. + cfg->tx_addr_ins_enable = FALSE;
  6274. + cfg->loopback_enable = FALSE;
  6275. + cfg->cmd_frame_enable = FALSE;
  6276. + cfg->rx_error_discard = FALSE;
  6277. + cfg->send_idle_enable = FALSE;
  6278. + cfg->no_length_check_enable = TRUE;
  6279. + cfg->lgth_check_nostdr = FALSE;
  6280. + cfg->time_stamp_enable = FALSE;
  6281. + cfg->tx_ipg_length = DEFAULT_TX_IPG_LENGTH;
  6282. + cfg->max_frame_length = DEFAULT_FRAME_LENGTH;
  6283. + cfg->pause_quanta = DEFAULT_PAUSE_QUANTA;
  6284. + cfg->pad_enable = TRUE;
  6285. + cfg->phy_tx_ena_on = FALSE;
  6286. + cfg->rx_sfd_any = FALSE;
  6287. + cfg->rx_pbl_fwd = FALSE;
  6288. + cfg->tx_pbl_fwd = FALSE;
  6289. + cfg->debug_mode = FALSE;
  6290. + cfg->wake_on_lan = FALSE;
  6291. +}
  6292. --- /dev/null
  6293. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac_mii_acc.c
  6294. @@ -0,0 +1,213 @@
  6295. +/*
  6296. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  6297. + *
  6298. + * Redistribution and use in source and binary forms, with or without
  6299. + * modification, are permitted provided that the following conditions are met:
  6300. + * * Redistributions of source code must retain the above copyright
  6301. + * notice, this list of conditions and the following disclaimer.
  6302. + * * Redistributions in binary form must reproduce the above copyright
  6303. + * notice, this list of conditions and the following disclaimer in the
  6304. + * documentation and/or other materials provided with the distribution.
  6305. + * * Neither the name of Freescale Semiconductor nor the
  6306. + * names of its contributors may be used to endorse or promote products
  6307. + * derived from this software without specific prior written permission.
  6308. + *
  6309. + *
  6310. + * ALTERNATIVELY, this software may be distributed under the terms of the
  6311. + * GNU General Public License ("GPL") as published by the Free Software
  6312. + * Foundation, either version 2 of that License or (at your option) any
  6313. + * later version.
  6314. + *
  6315. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  6316. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  6317. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  6318. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  6319. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  6320. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  6321. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  6322. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  6323. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  6324. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  6325. + */
  6326. +
  6327. +
  6328. +#include "fsl_fman_memac_mii_acc.h"
  6329. +
  6330. +static void write_phy_reg_10g(struct memac_mii_access_mem_map *mii_regs,
  6331. + uint8_t phy_addr, uint8_t reg, uint16_t data)
  6332. +{
  6333. + uint32_t tmp_reg;
  6334. +
  6335. + tmp_reg = ioread32be(&mii_regs->mdio_cfg);
  6336. + /* Leave only MDIO_CLK_DIV bits set on */
  6337. + tmp_reg &= MDIO_CFG_CLK_DIV_MASK;
  6338. + /* Set maximum MDIO_HOLD value to allow phy to see
  6339. + change of data signal */
  6340. + tmp_reg |= MDIO_CFG_HOLD_MASK;
  6341. + /* Add 10G interface mode */
  6342. + tmp_reg |= MDIO_CFG_ENC45;
  6343. + iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
  6344. +
  6345. + /* Wait for command completion */
  6346. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6347. + udelay(1);
  6348. +
  6349. + /* Specify phy and register to be accessed */
  6350. + iowrite32be(phy_addr, &mii_regs->mdio_ctrl);
  6351. + iowrite32be(reg, &mii_regs->mdio_addr);
  6352. + wmb();
  6353. +
  6354. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6355. + udelay(1);
  6356. +
  6357. + /* Write data */
  6358. + iowrite32be(data, &mii_regs->mdio_data);
  6359. + wmb();
  6360. +
  6361. + /* Wait for write transaction end */
  6362. + while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
  6363. + udelay(1);
  6364. +}
  6365. +
  6366. +static uint32_t read_phy_reg_10g(struct memac_mii_access_mem_map *mii_regs,
  6367. + uint8_t phy_addr, uint8_t reg, uint16_t *data)
  6368. +{
  6369. + uint32_t tmp_reg;
  6370. +
  6371. + tmp_reg = ioread32be(&mii_regs->mdio_cfg);
  6372. + /* Leave only MDIO_CLK_DIV bits set on */
  6373. + tmp_reg &= MDIO_CFG_CLK_DIV_MASK;
  6374. + /* Set maximum MDIO_HOLD value to allow phy to see
  6375. + change of data signal */
  6376. + tmp_reg |= MDIO_CFG_HOLD_MASK;
  6377. + /* Add 10G interface mode */
  6378. + tmp_reg |= MDIO_CFG_ENC45;
  6379. + iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
  6380. +
  6381. + /* Wait for command completion */
  6382. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6383. + udelay(1);
  6384. +
  6385. + /* Specify phy and register to be accessed */
  6386. + iowrite32be(phy_addr, &mii_regs->mdio_ctrl);
  6387. + iowrite32be(reg, &mii_regs->mdio_addr);
  6388. + wmb();
  6389. +
  6390. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6391. + udelay(1);
  6392. +
  6393. + /* Read cycle */
  6394. + tmp_reg = phy_addr;
  6395. + tmp_reg |= MDIO_CTL_READ;
  6396. + iowrite32be(tmp_reg, &mii_regs->mdio_ctrl);
  6397. + wmb();
  6398. +
  6399. + /* Wait for data to be available */
  6400. + while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
  6401. + udelay(1);
  6402. +
  6403. + *data = (uint16_t)ioread32be(&mii_regs->mdio_data);
  6404. +
  6405. + /* Check if there was an error */
  6406. + return ioread32be(&mii_regs->mdio_cfg);
  6407. +}
  6408. +
  6409. +static void write_phy_reg_1g(struct memac_mii_access_mem_map *mii_regs,
  6410. + uint8_t phy_addr, uint8_t reg, uint16_t data)
  6411. +{
  6412. + uint32_t tmp_reg;
  6413. +
  6414. + /* Leave only MDIO_CLK_DIV and MDIO_HOLD bits set on */
  6415. + tmp_reg = ioread32be(&mii_regs->mdio_cfg);
  6416. + tmp_reg &= (MDIO_CFG_CLK_DIV_MASK | MDIO_CFG_HOLD_MASK);
  6417. + iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
  6418. +
  6419. + /* Wait for command completion */
  6420. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6421. + udelay(1);
  6422. +
  6423. + /* Write transaction */
  6424. + tmp_reg = (phy_addr << MDIO_CTL_PHY_ADDR_SHIFT);
  6425. + tmp_reg |= reg;
  6426. + iowrite32be(tmp_reg, &mii_regs->mdio_ctrl);
  6427. +
  6428. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6429. + udelay(1);
  6430. +
  6431. + iowrite32be(data, &mii_regs->mdio_data);
  6432. +
  6433. + wmb();
  6434. +
  6435. + /* Wait for write transaction to end */
  6436. + while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
  6437. + udelay(1);
  6438. +}
  6439. +
  6440. +static uint32_t read_phy_reg_1g(struct memac_mii_access_mem_map *mii_regs,
  6441. + uint8_t phy_addr, uint8_t reg, uint16_t *data)
  6442. +{
  6443. + uint32_t tmp_reg;
  6444. +
  6445. + /* Leave only MDIO_CLK_DIV and MDIO_HOLD bits set on */
  6446. + tmp_reg = ioread32be(&mii_regs->mdio_cfg);
  6447. + tmp_reg &= (MDIO_CFG_CLK_DIV_MASK | MDIO_CFG_HOLD_MASK);
  6448. + iowrite32be(tmp_reg, &mii_regs->mdio_cfg);
  6449. +
  6450. + /* Wait for command completion */
  6451. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6452. + udelay(1);
  6453. +
  6454. + /* Read transaction */
  6455. + tmp_reg = (phy_addr << MDIO_CTL_PHY_ADDR_SHIFT);
  6456. + tmp_reg |= reg;
  6457. + tmp_reg |= MDIO_CTL_READ;
  6458. + iowrite32be(tmp_reg, &mii_regs->mdio_ctrl);
  6459. +
  6460. + while ((ioread32be(&mii_regs->mdio_cfg)) & MDIO_CFG_BSY)
  6461. + udelay(1);
  6462. +
  6463. + /* Wait for data to be available */
  6464. + while ((ioread32be(&mii_regs->mdio_data)) & MDIO_DATA_BSY)
  6465. + udelay(1);
  6466. +
  6467. + *data = (uint16_t)ioread32be(&mii_regs->mdio_data);
  6468. +
  6469. + /* Check error */
  6470. + return ioread32be(&mii_regs->mdio_cfg);
  6471. +}
  6472. +
  6473. +/*****************************************************************************/
  6474. +int fman_memac_mii_write_phy_reg(struct memac_mii_access_mem_map *mii_regs,
  6475. + uint8_t phy_addr, uint8_t reg, uint16_t data,
  6476. + enum enet_speed enet_speed)
  6477. +{
  6478. + /* Figure out interface type - 10G vs 1G.
  6479. + In 10G interface both phy_addr and devAddr present. */
  6480. + if (enet_speed == E_ENET_SPEED_10000)
  6481. + write_phy_reg_10g(mii_regs, phy_addr, reg, data);
  6482. + else
  6483. + write_phy_reg_1g(mii_regs, phy_addr, reg, data);
  6484. +
  6485. + return 0;
  6486. +}
  6487. +
  6488. +/*****************************************************************************/
  6489. +int fman_memac_mii_read_phy_reg(struct memac_mii_access_mem_map *mii_regs,
  6490. + uint8_t phy_addr, uint8_t reg, uint16_t *data,
  6491. + enum enet_speed enet_speed)
  6492. +{
  6493. + uint32_t ans;
  6494. + /* Figure out interface type - 10G vs 1G.
  6495. + In 10G interface both phy_addr and devAddr present. */
  6496. + if (enet_speed == E_ENET_SPEED_10000)
  6497. + ans = read_phy_reg_10g(mii_regs, phy_addr, reg, data);
  6498. + else
  6499. + ans = read_phy_reg_1g(mii_regs, phy_addr, reg, data);
  6500. +
  6501. + if (ans & MDIO_CFG_READ_ERR)
  6502. + return -EINVAL;
  6503. + return 0;
  6504. +}
  6505. +
  6506. +/* ......................................................................... */
  6507. +
  6508. --- /dev/null
  6509. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_tgec.c
  6510. @@ -0,0 +1,367 @@
  6511. +/*
  6512. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  6513. + *
  6514. + * Redistribution and use in source and binary forms, with or without
  6515. + * modification, are permitted provided that the following conditions are met:
  6516. + * * Redistributions of source code must retain the above copyright
  6517. + * notice, this list of conditions and the following disclaimer.
  6518. + * * Redistributions in binary form must reproduce the above copyright
  6519. + * notice, this list of conditions and the following disclaimer in the
  6520. + * documentation and/or other materials provided with the distribution.
  6521. + * * Neither the name of Freescale Semiconductor nor the
  6522. + * names of its contributors may be used to endorse or promote products
  6523. + * derived from this software without specific prior written permission.
  6524. + *
  6525. + *
  6526. + * ALTERNATIVELY, this software may be distributed under the terms of the
  6527. + * GNU General Public License ("GPL") as published by the Free Software
  6528. + * Foundation, either version 2 of that License or (at your option) any
  6529. + * later version.
  6530. + *
  6531. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  6532. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  6533. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  6534. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  6535. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  6536. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  6537. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  6538. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  6539. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  6540. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  6541. + */
  6542. +
  6543. +
  6544. +#include "fsl_fman_tgec.h"
  6545. +
  6546. +
  6547. +void fman_tgec_set_mac_address(struct tgec_regs *regs, uint8_t *adr)
  6548. +{
  6549. + uint32_t tmp0, tmp1;
  6550. +
  6551. + tmp0 = (uint32_t)(adr[0] |
  6552. + adr[1] << 8 |
  6553. + adr[2] << 16 |
  6554. + adr[3] << 24);
  6555. + tmp1 = (uint32_t)(adr[4] | adr[5] << 8);
  6556. + iowrite32be(tmp0, &regs->mac_addr_0);
  6557. + iowrite32be(tmp1, &regs->mac_addr_1);
  6558. +}
  6559. +
  6560. +void fman_tgec_reset_stat(struct tgec_regs *regs)
  6561. +{
  6562. + uint32_t tmp;
  6563. +
  6564. + tmp = ioread32be(&regs->command_config);
  6565. +
  6566. + tmp |= CMD_CFG_STAT_CLR;
  6567. +
  6568. + iowrite32be(tmp, &regs->command_config);
  6569. +
  6570. + while (ioread32be(&regs->command_config) & CMD_CFG_STAT_CLR) ;
  6571. +}
  6572. +
  6573. +#define GET_TGEC_CNTR_64(bn) \
  6574. + (((uint64_t)ioread32be(&regs->bn ## _u) << 32) | \
  6575. + ioread32be(&regs->bn ## _l))
  6576. +
  6577. +uint64_t fman_tgec_get_counter(struct tgec_regs *regs, enum tgec_counters reg_name)
  6578. +{
  6579. + uint64_t ret_val;
  6580. +
  6581. + switch (reg_name) {
  6582. + case E_TGEC_COUNTER_R64:
  6583. + ret_val = GET_TGEC_CNTR_64(r64);
  6584. + break;
  6585. + case E_TGEC_COUNTER_R127:
  6586. + ret_val = GET_TGEC_CNTR_64(r127);
  6587. + break;
  6588. + case E_TGEC_COUNTER_R255:
  6589. + ret_val = GET_TGEC_CNTR_64(r255);
  6590. + break;
  6591. + case E_TGEC_COUNTER_R511:
  6592. + ret_val = GET_TGEC_CNTR_64(r511);
  6593. + break;
  6594. + case E_TGEC_COUNTER_R1023:
  6595. + ret_val = GET_TGEC_CNTR_64(r1023);
  6596. + break;
  6597. + case E_TGEC_COUNTER_R1518:
  6598. + ret_val = GET_TGEC_CNTR_64(r1518);
  6599. + break;
  6600. + case E_TGEC_COUNTER_R1519X:
  6601. + ret_val = GET_TGEC_CNTR_64(r1519x);
  6602. + break;
  6603. + case E_TGEC_COUNTER_TRFRG:
  6604. + ret_val = GET_TGEC_CNTR_64(trfrg);
  6605. + break;
  6606. + case E_TGEC_COUNTER_TRJBR:
  6607. + ret_val = GET_TGEC_CNTR_64(trjbr);
  6608. + break;
  6609. + case E_TGEC_COUNTER_RDRP:
  6610. + ret_val = GET_TGEC_CNTR_64(rdrp);
  6611. + break;
  6612. + case E_TGEC_COUNTER_RALN:
  6613. + ret_val = GET_TGEC_CNTR_64(raln);
  6614. + break;
  6615. + case E_TGEC_COUNTER_TRUND:
  6616. + ret_val = GET_TGEC_CNTR_64(trund);
  6617. + break;
  6618. + case E_TGEC_COUNTER_TROVR:
  6619. + ret_val = GET_TGEC_CNTR_64(trovr);
  6620. + break;
  6621. + case E_TGEC_COUNTER_RXPF:
  6622. + ret_val = GET_TGEC_CNTR_64(rxpf);
  6623. + break;
  6624. + case E_TGEC_COUNTER_TXPF:
  6625. + ret_val = GET_TGEC_CNTR_64(txpf);
  6626. + break;
  6627. + case E_TGEC_COUNTER_ROCT:
  6628. + ret_val = GET_TGEC_CNTR_64(roct);
  6629. + break;
  6630. + case E_TGEC_COUNTER_RMCA:
  6631. + ret_val = GET_TGEC_CNTR_64(rmca);
  6632. + break;
  6633. + case E_TGEC_COUNTER_RBCA:
  6634. + ret_val = GET_TGEC_CNTR_64(rbca);
  6635. + break;
  6636. + case E_TGEC_COUNTER_RPKT:
  6637. + ret_val = GET_TGEC_CNTR_64(rpkt);
  6638. + break;
  6639. + case E_TGEC_COUNTER_RUCA:
  6640. + ret_val = GET_TGEC_CNTR_64(ruca);
  6641. + break;
  6642. + case E_TGEC_COUNTER_RERR:
  6643. + ret_val = GET_TGEC_CNTR_64(rerr);
  6644. + break;
  6645. + case E_TGEC_COUNTER_TOCT:
  6646. + ret_val = GET_TGEC_CNTR_64(toct);
  6647. + break;
  6648. + case E_TGEC_COUNTER_TMCA:
  6649. + ret_val = GET_TGEC_CNTR_64(tmca);
  6650. + break;
  6651. + case E_TGEC_COUNTER_TBCA:
  6652. + ret_val = GET_TGEC_CNTR_64(tbca);
  6653. + break;
  6654. + case E_TGEC_COUNTER_TUCA:
  6655. + ret_val = GET_TGEC_CNTR_64(tuca);
  6656. + break;
  6657. + case E_TGEC_COUNTER_TERR:
  6658. + ret_val = GET_TGEC_CNTR_64(terr);
  6659. + break;
  6660. + default:
  6661. + ret_val = 0;
  6662. + }
  6663. +
  6664. + return ret_val;
  6665. +}
  6666. +
  6667. +void fman_tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx)
  6668. +{
  6669. + uint32_t tmp;
  6670. +
  6671. + tmp = ioread32be(&regs->command_config);
  6672. + if (apply_rx)
  6673. + tmp |= CMD_CFG_RX_EN;
  6674. + if (apply_tx)
  6675. + tmp |= CMD_CFG_TX_EN;
  6676. + iowrite32be(tmp, &regs->command_config);
  6677. +}
  6678. +
  6679. +void fman_tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx)
  6680. +{
  6681. + uint32_t tmp_reg_32;
  6682. +
  6683. + tmp_reg_32 = ioread32be(&regs->command_config);
  6684. + if (apply_rx)
  6685. + tmp_reg_32 &= ~CMD_CFG_RX_EN;
  6686. + if (apply_tx)
  6687. + tmp_reg_32 &= ~CMD_CFG_TX_EN;
  6688. + iowrite32be(tmp_reg_32, &regs->command_config);
  6689. +}
  6690. +
  6691. +void fman_tgec_set_promiscuous(struct tgec_regs *regs, bool val)
  6692. +{
  6693. + uint32_t tmp;
  6694. +
  6695. + tmp = ioread32be(&regs->command_config);
  6696. + if (val)
  6697. + tmp |= CMD_CFG_PROMIS_EN;
  6698. + else
  6699. + tmp &= ~CMD_CFG_PROMIS_EN;
  6700. + iowrite32be(tmp, &regs->command_config);
  6701. +}
  6702. +
  6703. +void fman_tgec_reset_filter_table(struct tgec_regs *regs)
  6704. +{
  6705. + uint32_t i;
  6706. + for (i = 0; i < 512; i++)
  6707. + iowrite32be(i & ~TGEC_HASH_MCAST_EN, &regs->hashtable_ctrl);
  6708. +}
  6709. +
  6710. +void fman_tgec_set_hash_table_entry(struct tgec_regs *regs, uint32_t crc)
  6711. +{
  6712. + uint32_t hash = (crc >> TGEC_HASH_MCAST_SHIFT) & TGEC_HASH_ADR_MSK; /* Take 9 MSB bits */
  6713. + iowrite32be(hash | TGEC_HASH_MCAST_EN, &regs->hashtable_ctrl);
  6714. +}
  6715. +
  6716. +void fman_tgec_set_hash_table(struct tgec_regs *regs, uint32_t value)
  6717. +{
  6718. + iowrite32be(value, &regs->hashtable_ctrl);
  6719. +}
  6720. +
  6721. +void fman_tgec_set_tx_pause_frames(struct tgec_regs *regs, uint16_t pause_time)
  6722. +{
  6723. + iowrite32be((uint32_t)pause_time, &regs->pause_quant);
  6724. +}
  6725. +
  6726. +void fman_tgec_set_rx_ignore_pause_frames(struct tgec_regs *regs, bool en)
  6727. +{
  6728. + uint32_t tmp;
  6729. +
  6730. + tmp = ioread32be(&regs->command_config);
  6731. + if (en)
  6732. + tmp |= CMD_CFG_PAUSE_IGNORE;
  6733. + else
  6734. + tmp &= ~CMD_CFG_PAUSE_IGNORE;
  6735. + iowrite32be(tmp, &regs->command_config);
  6736. +}
  6737. +
  6738. +void fman_tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en)
  6739. +{
  6740. + uint32_t tmp;
  6741. +
  6742. + tmp = ioread32be(&regs->command_config);
  6743. + if (en)
  6744. + tmp |= CMD_CFG_EN_TIMESTAMP;
  6745. + else
  6746. + tmp &= ~CMD_CFG_EN_TIMESTAMP;
  6747. + iowrite32be(tmp, &regs->command_config);
  6748. +}
  6749. +
  6750. +uint32_t fman_tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask)
  6751. +{
  6752. + return ioread32be(&regs->ievent) & ev_mask;
  6753. +}
  6754. +
  6755. +void fman_tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask)
  6756. +{
  6757. + iowrite32be(ev_mask, &regs->ievent);
  6758. +}
  6759. +
  6760. +uint32_t fman_tgec_get_interrupt_mask(struct tgec_regs *regs)
  6761. +{
  6762. + return ioread32be(&regs->imask);
  6763. +}
  6764. +
  6765. +void fman_tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *adr)
  6766. +{
  6767. + uint32_t tmp0, tmp1;
  6768. +
  6769. + tmp0 = (uint32_t)(adr[0] |
  6770. + adr[1] << 8 |
  6771. + adr[2] << 16 |
  6772. + adr[3] << 24);
  6773. + tmp1 = (uint32_t)(adr[4] | adr[5] << 8);
  6774. + iowrite32be(tmp0, &regs->mac_addr_2);
  6775. + iowrite32be(tmp1, &regs->mac_addr_3);
  6776. +}
  6777. +
  6778. +void fman_tgec_clear_addr_in_paddr(struct tgec_regs *regs)
  6779. +{
  6780. + iowrite32be(0, &regs->mac_addr_2);
  6781. + iowrite32be(0, &regs->mac_addr_3);
  6782. +}
  6783. +
  6784. +uint32_t fman_tgec_get_revision(struct tgec_regs *regs)
  6785. +{
  6786. + return ioread32be(&regs->tgec_id);
  6787. +}
  6788. +
  6789. +void fman_tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask)
  6790. +{
  6791. + iowrite32be(ioread32be(&regs->imask) | ev_mask, &regs->imask);
  6792. +}
  6793. +
  6794. +void fman_tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask)
  6795. +{
  6796. + iowrite32be(ioread32be(&regs->imask) & ~ev_mask, &regs->imask);
  6797. +}
  6798. +
  6799. +uint16_t fman_tgec_get_max_frame_len(struct tgec_regs *regs)
  6800. +{
  6801. + return (uint16_t) ioread32be(&regs->maxfrm);
  6802. +}
  6803. +
  6804. +void fman_tgec_defconfig(struct tgec_cfg *cfg)
  6805. +{
  6806. + cfg->wan_mode_enable = DEFAULT_WAN_MODE_ENABLE;
  6807. + cfg->promiscuous_mode_enable = DEFAULT_PROMISCUOUS_MODE_ENABLE;
  6808. + cfg->pause_forward_enable = DEFAULT_PAUSE_FORWARD_ENABLE;
  6809. + cfg->pause_ignore = DEFAULT_PAUSE_IGNORE;
  6810. + cfg->tx_addr_ins_enable = DEFAULT_TX_ADDR_INS_ENABLE;
  6811. + cfg->loopback_enable = DEFAULT_LOOPBACK_ENABLE;
  6812. + cfg->cmd_frame_enable = DEFAULT_CMD_FRAME_ENABLE;
  6813. + cfg->rx_error_discard = DEFAULT_RX_ERROR_DISCARD;
  6814. + cfg->send_idle_enable = DEFAULT_SEND_IDLE_ENABLE;
  6815. + cfg->no_length_check_enable = DEFAULT_NO_LENGTH_CHECK_ENABLE;
  6816. + cfg->lgth_check_nostdr = DEFAULT_LGTH_CHECK_NOSTDR;
  6817. + cfg->time_stamp_enable = DEFAULT_TIME_STAMP_ENABLE;
  6818. + cfg->tx_ipg_length = DEFAULT_TX_IPG_LENGTH;
  6819. + cfg->max_frame_length = DEFAULT_MAX_FRAME_LENGTH;
  6820. + cfg->pause_quant = DEFAULT_PAUSE_QUANT;
  6821. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  6822. + cfg->skip_fman11_workaround = FALSE;
  6823. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  6824. +}
  6825. +
  6826. +int fman_tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg,
  6827. + uint32_t exception_mask)
  6828. +{
  6829. + uint32_t tmp;
  6830. +
  6831. + /* Config */
  6832. + tmp = 0x40; /* CRC forward */
  6833. + if (cfg->wan_mode_enable)
  6834. + tmp |= CMD_CFG_WAN_MODE;
  6835. + if (cfg->promiscuous_mode_enable)
  6836. + tmp |= CMD_CFG_PROMIS_EN;
  6837. + if (cfg->pause_forward_enable)
  6838. + tmp |= CMD_CFG_PAUSE_FWD;
  6839. + if (cfg->pause_ignore)
  6840. + tmp |= CMD_CFG_PAUSE_IGNORE;
  6841. + if (cfg->tx_addr_ins_enable)
  6842. + tmp |= CMD_CFG_TX_ADDR_INS;
  6843. + if (cfg->loopback_enable)
  6844. + tmp |= CMD_CFG_LOOPBACK_EN;
  6845. + if (cfg->cmd_frame_enable)
  6846. + tmp |= CMD_CFG_CMD_FRM_EN;
  6847. + if (cfg->rx_error_discard)
  6848. + tmp |= CMD_CFG_RX_ER_DISC;
  6849. + if (cfg->send_idle_enable)
  6850. + tmp |= CMD_CFG_SEND_IDLE;
  6851. + if (cfg->no_length_check_enable)
  6852. + tmp |= CMD_CFG_NO_LEN_CHK;
  6853. + if (cfg->time_stamp_enable)
  6854. + tmp |= CMD_CFG_EN_TIMESTAMP;
  6855. + iowrite32be(tmp, &regs->command_config);
  6856. +
  6857. + /* Max Frame Length */
  6858. + iowrite32be((uint32_t)cfg->max_frame_length, &regs->maxfrm);
  6859. + /* Pause Time */
  6860. + iowrite32be(cfg->pause_quant, &regs->pause_quant);
  6861. +
  6862. + /* clear all pending events and set-up interrupts */
  6863. + fman_tgec_ack_event(regs, 0xffffffff);
  6864. + fman_tgec_enable_interrupt(regs, exception_mask);
  6865. +
  6866. + return 0;
  6867. +}
  6868. +
  6869. +void fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(struct tgec_regs *regs)
  6870. +{
  6871. + uint32_t tmp;
  6872. +
  6873. + /* restore the default tx ipg Length */
  6874. + tmp = (ioread32be(&regs->tx_ipg_len) & ~TGEC_TX_IPG_LENGTH_MASK) | 12;
  6875. +
  6876. + iowrite32be(tmp, &regs->tx_ipg_len);
  6877. +}
  6878. --- /dev/null
  6879. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c
  6880. @@ -0,0 +1,1088 @@
  6881. +/*
  6882. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  6883. + *
  6884. + * Redistribution and use in source and binary forms, with or without
  6885. + * modification, are permitted provided that the following conditions are met:
  6886. + * * Redistributions of source code must retain the above copyright
  6887. + * notice, this list of conditions and the following disclaimer.
  6888. + * * Redistributions in binary form must reproduce the above copyright
  6889. + * notice, this list of conditions and the following disclaimer in the
  6890. + * documentation and/or other materials provided with the distribution.
  6891. + * * Neither the name of Freescale Semiconductor nor the
  6892. + * names of its contributors may be used to endorse or promote products
  6893. + * derived from this software without specific prior written permission.
  6894. + *
  6895. + *
  6896. + * ALTERNATIVELY, this software may be distributed under the terms of the
  6897. + * GNU General Public License ("GPL") as published by the Free Software
  6898. + * Foundation, either version 2 of that License or (at your option) any
  6899. + * later version.
  6900. + *
  6901. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  6902. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  6903. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  6904. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  6905. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  6906. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  6907. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  6908. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  6909. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  6910. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  6911. + */
  6912. +
  6913. +
  6914. +/******************************************************************************
  6915. + @File memac.c
  6916. +
  6917. + @Description FM mEMAC driver
  6918. +*//***************************************************************************/
  6919. +
  6920. +#include "std_ext.h"
  6921. +#include "string_ext.h"
  6922. +#include "error_ext.h"
  6923. +#include "xx_ext.h"
  6924. +#include "endian_ext.h"
  6925. +#include "debug_ext.h"
  6926. +
  6927. +#include "fm_common.h"
  6928. +#include "memac.h"
  6929. +
  6930. +
  6931. +/*****************************************************************************/
  6932. +/* Internal routines */
  6933. +/*****************************************************************************/
  6934. +
  6935. +/* ......................................................................... */
  6936. +
  6937. +static uint32_t GetMacAddrHashCode(uint64_t ethAddr)
  6938. +{
  6939. + uint64_t mask1, mask2;
  6940. + uint32_t xorVal = 0;
  6941. + uint8_t i, j;
  6942. +
  6943. + for (i=0; i<6; i++)
  6944. + {
  6945. + mask1 = ethAddr & (uint64_t)0x01;
  6946. + ethAddr >>= 1;
  6947. +
  6948. + for (j=0; j<7; j++)
  6949. + {
  6950. + mask2 = ethAddr & (uint64_t)0x01;
  6951. + mask1 ^= mask2;
  6952. + ethAddr >>= 1;
  6953. + }
  6954. +
  6955. + xorVal |= (mask1 << (5-i));
  6956. + }
  6957. +
  6958. + return xorVal;
  6959. +}
  6960. +
  6961. +/* ......................................................................... */
  6962. +
  6963. +static void SetupSgmiiInternalPhy(t_Memac *p_Memac, uint8_t phyAddr)
  6964. +{
  6965. + uint16_t tmpReg16;
  6966. + e_EnetMode enetMode;
  6967. +
  6968. + /* In case the higher MACs are used (i.e. the MACs that should support 10G),
  6969. + speed=10000 is provided for SGMII ports. Temporary modify enet mode
  6970. + to 1G one, so MII functions can work correctly. */
  6971. + enetMode = p_Memac->enetMode;
  6972. +
  6973. + /* SGMII mode + AN enable */
  6974. + tmpReg16 = PHY_SGMII_IF_MODE_AN | PHY_SGMII_IF_MODE_SGMII;
  6975. + if ((p_Memac->enetMode) == e_ENET_MODE_SGMII_2500)
  6976. + tmpReg16 = PHY_SGMII_CR_PHY_RESET | PHY_SGMII_IF_SPEED_GIGABIT | PHY_SGMII_IF_MODE_SGMII;
  6977. +
  6978. + p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000);
  6979. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16);
  6980. +
  6981. + /* Device ability according to SGMII specification */
  6982. + tmpReg16 = PHY_SGMII_DEV_ABILITY_SGMII;
  6983. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x4, tmpReg16);
  6984. +
  6985. + /* Adjust link timer for SGMII -
  6986. + According to Cisco SGMII specification the timer should be 1.6 ms.
  6987. + The link_timer register is configured in units of the clock.
  6988. + - When running as 1G SGMII, Serdes clock is 125 MHz, so
  6989. + unit = 1 / (125*10^6 Hz) = 8 ns.
  6990. + 1.6 ms in units of 8 ns = 1.6ms / 8ns = 2 * 10^5 = 0x30d40
  6991. + - When running as 2.5G SGMII, Serdes clock is 312.5 MHz, so
  6992. + unit = 1 / (312.5*10^6 Hz) = 3.2 ns.
  6993. + 1.6 ms in units of 3.2 ns = 1.6ms / 3.2ns = 5 * 10^5 = 0x7a120.
  6994. + Since link_timer value of 1G SGMII will be too short for 2.5 SGMII,
  6995. + we always set up here a value of 2.5 SGMII. */
  6996. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x13, 0x0007);
  6997. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x12, 0xa120);
  6998. +
  6999. + /* Restart AN */
  7000. + tmpReg16 = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
  7001. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x0, tmpReg16);
  7002. +
  7003. + /* Restore original enet mode */
  7004. + p_Memac->enetMode = enetMode;
  7005. +}
  7006. +
  7007. +/* ......................................................................... */
  7008. +
  7009. +static void SetupSgmiiInternalPhyBaseX(t_Memac *p_Memac, uint8_t phyAddr)
  7010. +{
  7011. + uint16_t tmpReg16;
  7012. + e_EnetMode enetMode;
  7013. +
  7014. + /* In case the higher MACs are used (i.e. the MACs that should support 10G),
  7015. + speed=10000 is provided for SGMII ports. Temporary modify enet mode
  7016. + to 1G one, so MII functions can work correctly. */
  7017. + enetMode = p_Memac->enetMode;
  7018. + p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000);
  7019. +
  7020. + /* 1000BaseX mode */
  7021. + tmpReg16 = PHY_SGMII_IF_MODE_1000X;
  7022. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16);
  7023. +
  7024. + /* AN Device capability */
  7025. + tmpReg16 = PHY_SGMII_DEV_ABILITY_1000X;
  7026. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x4, tmpReg16);
  7027. +
  7028. + /* Adjust link timer for SGMII -
  7029. + For Serdes 1000BaseX auto-negotiation the timer should be 10 ms.
  7030. + The link_timer register is configured in units of the clock.
  7031. + - When running as 1G SGMII, Serdes clock is 125 MHz, so
  7032. + unit = 1 / (125*10^6 Hz) = 8 ns.
  7033. + 10 ms in units of 8 ns = 10ms / 8ns = 1250000 = 0x1312d0
  7034. + - When running as 2.5G SGMII, Serdes clock is 312.5 MHz, so
  7035. + unit = 1 / (312.5*10^6 Hz) = 3.2 ns.
  7036. + 10 ms in units of 3.2 ns = 10ms / 3.2ns = 3125000 = 0x2faf08.
  7037. + Since link_timer value of 1G SGMII will be too short for 2.5 SGMII,
  7038. + we always set up here a value of 2.5 SGMII. */
  7039. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x13, 0x002f);
  7040. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x12, 0xaf08);
  7041. +
  7042. + /* Restart AN */
  7043. + tmpReg16 = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
  7044. + MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x0, tmpReg16);
  7045. +
  7046. + /* Restore original enet mode */
  7047. + p_Memac->enetMode = enetMode;
  7048. +}
  7049. +
  7050. +/* ......................................................................... */
  7051. +
  7052. +static t_Error CheckInitParameters(t_Memac *p_Memac)
  7053. +{
  7054. + e_FmMacType portType;
  7055. +
  7056. + portType = ((ENET_SPEED_FROM_MODE(p_Memac->enetMode) < e_ENET_SPEED_10000) ? e_FM_MAC_1G : e_FM_MAC_10G);
  7057. +
  7058. +#if (FM_MAX_NUM_OF_10G_MACS > 0)
  7059. + if ((portType == e_FM_MAC_10G) && (p_Memac->macId >= FM_MAX_NUM_OF_10G_MACS))
  7060. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("10G MAC ID must be less than %d", FM_MAX_NUM_OF_10G_MACS));
  7061. +#endif /* (FM_MAX_NUM_OF_10G_MACS > 0) */
  7062. +
  7063. + if ((portType == e_FM_MAC_1G) && (p_Memac->macId >= FM_MAX_NUM_OF_1G_MACS))
  7064. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("1G MAC ID must be less than %d", FM_MAX_NUM_OF_1G_MACS));
  7065. + if (p_Memac->addr == 0)
  7066. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC must have a valid MAC address"));
  7067. + if (!p_Memac->f_Exception)
  7068. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Uninitialized f_Exception"));
  7069. + if (!p_Memac->f_Event)
  7070. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Uninitialized f_Event"));
  7071. +#ifdef FM_LEN_CHECK_ERRATA_FMAN_SW002
  7072. + if (!p_Memac->p_MemacDriverParam->no_length_check_enable)
  7073. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("LengthCheck!"));
  7074. +#endif /* FM_LEN_CHECK_ERRATA_FMAN_SW002 */
  7075. +
  7076. + return E_OK;
  7077. +}
  7078. +
  7079. +/* ........................................................................... */
  7080. +
  7081. +static void MemacErrException(t_Handle h_Memac)
  7082. +{
  7083. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7084. + uint32_t event, imask;
  7085. +
  7086. + event = fman_memac_get_event(p_Memac->p_MemMap, 0xffffffff);
  7087. + imask = fman_memac_get_interrupt_mask(p_Memac->p_MemMap);
  7088. +
  7089. + /* Imask include both error and notification/event bits.
  7090. + Leaving only error bits enabled by imask.
  7091. + The imask error bits are shifted by 16 bits offset from
  7092. + their corresponding location in the ievent - hence the >> 16 */
  7093. + event &= ((imask & MEMAC_ALL_ERRS_IMASK) >> 16);
  7094. +
  7095. + fman_memac_ack_event(p_Memac->p_MemMap, event);
  7096. +
  7097. + if (event & MEMAC_IEVNT_TS_ECC_ER)
  7098. + p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_TS_FIFO_ECC_ERR);
  7099. + if (event & MEMAC_IEVNT_TX_ECC_ER)
  7100. + p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_10G_1TX_ECC_ER);
  7101. + if (event & MEMAC_IEVNT_RX_ECC_ER)
  7102. + p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_10G_RX_ECC_ER);
  7103. +}
  7104. +
  7105. +static void MemacException(t_Handle h_Memac)
  7106. +{
  7107. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7108. + uint32_t event, imask;
  7109. +
  7110. + event = fman_memac_get_event(p_Memac->p_MemMap, 0xffffffff);
  7111. + imask = fman_memac_get_interrupt_mask(p_Memac->p_MemMap);
  7112. +
  7113. + /* Imask include both error and notification/event bits.
  7114. + Leaving only error bits enabled by imask.
  7115. + The imask error bits are shifted by 16 bits offset from
  7116. + their corresponding location in the ievent - hence the >> 16 */
  7117. + event &= ((imask & MEMAC_ALL_ERRS_IMASK) >> 16);
  7118. +
  7119. + fman_memac_ack_event(p_Memac->p_MemMap, event);
  7120. +
  7121. + if (event & MEMAC_IEVNT_MGI)
  7122. + p_Memac->f_Exception(p_Memac->h_App, e_FM_MAC_EX_MAGIC_PACKET_INDICATION);
  7123. +}
  7124. +
  7125. +/* ......................................................................... */
  7126. +
  7127. +static void FreeInitResources(t_Memac *p_Memac)
  7128. +{
  7129. + e_FmMacType portType;
  7130. +
  7131. + portType =
  7132. + ((ENET_SPEED_FROM_MODE(p_Memac->enetMode) < e_ENET_SPEED_10000) ? e_FM_MAC_1G : e_FM_MAC_10G);
  7133. +
  7134. + if (portType == e_FM_MAC_10G)
  7135. + FmUnregisterIntr(p_Memac->fmMacControllerDriver.h_Fm, e_FM_MOD_10G_MAC, p_Memac->macId, e_FM_INTR_TYPE_ERR);
  7136. + else
  7137. + FmUnregisterIntr(p_Memac->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Memac->macId, e_FM_INTR_TYPE_ERR);
  7138. +
  7139. + /* release the driver's group hash table */
  7140. + FreeHashTable(p_Memac->p_MulticastAddrHash);
  7141. + p_Memac->p_MulticastAddrHash = NULL;
  7142. +
  7143. + /* release the driver's individual hash table */
  7144. + FreeHashTable(p_Memac->p_UnicastAddrHash);
  7145. + p_Memac->p_UnicastAddrHash = NULL;
  7146. +}
  7147. +
  7148. +
  7149. +/*****************************************************************************/
  7150. +/* mEMAC API routines */
  7151. +/*****************************************************************************/
  7152. +
  7153. +/* ......................................................................... */
  7154. +
  7155. +static t_Error MemacEnable(t_Handle h_Memac, e_CommMode mode)
  7156. +{
  7157. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7158. +
  7159. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7160. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7161. +
  7162. + fman_memac_enable(p_Memac->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
  7163. +
  7164. + return E_OK;
  7165. +}
  7166. +
  7167. +/* ......................................................................... */
  7168. +
  7169. +static t_Error MemacDisable (t_Handle h_Memac, e_CommMode mode)
  7170. +{
  7171. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7172. +
  7173. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7174. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7175. +
  7176. + fman_memac_disable(p_Memac->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
  7177. +
  7178. + return E_OK;
  7179. +}
  7180. +
  7181. +/* ......................................................................... */
  7182. +
  7183. +static t_Error MemacSetPromiscuous(t_Handle h_Memac, bool newVal)
  7184. +{
  7185. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7186. +
  7187. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7188. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7189. +
  7190. + fman_memac_set_promiscuous(p_Memac->p_MemMap, newVal);
  7191. +
  7192. + return E_OK;
  7193. +}
  7194. +
  7195. +/* .............................................................................. */
  7196. +
  7197. +static t_Error MemacAdjustLink(t_Handle h_Memac, e_EnetSpeed speed, bool fullDuplex)
  7198. +{
  7199. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7200. +
  7201. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7202. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7203. +
  7204. + if ((speed >= e_ENET_SPEED_1000) && (!fullDuplex))
  7205. + RETURN_ERROR(MAJOR, E_CONFLICT,
  7206. + ("Ethernet MAC 1G or 10G does not support half-duplex"));
  7207. +
  7208. + fman_memac_adjust_link(p_Memac->p_MemMap,
  7209. + (enum enet_interface)ENET_INTERFACE_FROM_MODE(p_Memac->enetMode),
  7210. + (enum enet_speed)speed,
  7211. + fullDuplex);
  7212. + return E_OK;
  7213. +}
  7214. +
  7215. +
  7216. +/*****************************************************************************/
  7217. +/* Memac Configs modification functions */
  7218. +/*****************************************************************************/
  7219. +
  7220. +/* ......................................................................... */
  7221. +
  7222. +static t_Error MemacConfigLoopback(t_Handle h_Memac, bool newVal)
  7223. +{
  7224. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7225. +
  7226. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7227. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7228. +
  7229. + p_Memac->p_MemacDriverParam->loopback_enable = newVal;
  7230. +
  7231. + return E_OK;
  7232. +}
  7233. +
  7234. +/* ......................................................................... */
  7235. +
  7236. +static t_Error MemacConfigWan(t_Handle h_Memac, bool newVal)
  7237. +{
  7238. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7239. +
  7240. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7241. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7242. +
  7243. + p_Memac->p_MemacDriverParam->wan_mode_enable = newVal;
  7244. +
  7245. + return E_OK;
  7246. +}
  7247. +
  7248. +/* ......................................................................... */
  7249. +
  7250. +static t_Error MemacConfigMaxFrameLength(t_Handle h_Memac, uint16_t newVal)
  7251. +{
  7252. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7253. +
  7254. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7255. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7256. +
  7257. + p_Memac->p_MemacDriverParam->max_frame_length = newVal;
  7258. +
  7259. + return E_OK;
  7260. +}
  7261. +
  7262. +/* ......................................................................... */
  7263. +
  7264. +static t_Error MemacConfigPad(t_Handle h_Memac, bool newVal)
  7265. +{
  7266. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7267. +
  7268. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7269. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7270. +
  7271. + p_Memac->p_MemacDriverParam->pad_enable = newVal;
  7272. +
  7273. + return E_OK;
  7274. +}
  7275. +
  7276. +/* ......................................................................... */
  7277. +
  7278. +static t_Error MemacConfigLengthCheck(t_Handle h_Memac, bool newVal)
  7279. +{
  7280. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7281. +
  7282. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7283. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7284. +
  7285. + p_Memac->p_MemacDriverParam->no_length_check_enable = !newVal;
  7286. +
  7287. + return E_OK;
  7288. +}
  7289. +
  7290. +/* ......................................................................... */
  7291. +
  7292. +static t_Error MemacConfigException(t_Handle h_Memac, e_FmMacExceptions exception, bool enable)
  7293. +{
  7294. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7295. + uint32_t bitMask = 0;
  7296. +
  7297. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7298. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7299. +
  7300. + GET_EXCEPTION_FLAG(bitMask, exception);
  7301. + if (bitMask)
  7302. + {
  7303. + if (enable)
  7304. + p_Memac->exceptions |= bitMask;
  7305. + else
  7306. + p_Memac->exceptions &= ~bitMask;
  7307. + }
  7308. + else
  7309. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  7310. +
  7311. + return E_OK;
  7312. +}
  7313. +
  7314. +/* ......................................................................... */
  7315. +
  7316. +static t_Error MemacConfigResetOnInit(t_Handle h_Memac, bool enable)
  7317. +{
  7318. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7319. +
  7320. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7321. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7322. +
  7323. + p_Memac->p_MemacDriverParam->reset_on_init = enable;
  7324. +
  7325. + return E_OK;
  7326. +}
  7327. +
  7328. +
  7329. +/*****************************************************************************/
  7330. +/* Memac Run Time API functions */
  7331. +/*****************************************************************************/
  7332. +
  7333. +/* ......................................................................... */
  7334. +
  7335. +static t_Error MemacSetTxPauseFrames(t_Handle h_Memac,
  7336. + uint8_t priority,
  7337. + uint16_t pauseTime,
  7338. + uint16_t threshTime)
  7339. +{
  7340. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7341. +
  7342. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_STATE);
  7343. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7344. +
  7345. + if (priority != 0xFF)
  7346. + {
  7347. + bool PortConfigured, PreFetchEnabled;
  7348. +
  7349. + if (FmGetTnumAgingPeriod(p_Memac->fmMacControllerDriver.h_Fm) == 0)
  7350. + RETURN_ERROR(MAJOR, E_CONFLICT, ("For PFC operation, TNUM aging must be enabled"));
  7351. +
  7352. + FmGetPortPreFetchConfiguration(p_Memac->fmMacControllerDriver.h_Fm,
  7353. + p_Memac->fmMacControllerDriver.macId,
  7354. + &PortConfigured,
  7355. + &PreFetchEnabled);
  7356. +
  7357. + if ((ENET_SPEED_FROM_MODE(p_Memac->fmMacControllerDriver.enetMode) == e_ENET_SPEED_1000) && !PortConfigured)
  7358. + DBG(INFO, ("For PFC correct operation, prefetch must be configured on the FM Tx PORT"));
  7359. +
  7360. + if ((ENET_SPEED_FROM_MODE(p_Memac->fmMacControllerDriver.enetMode) == e_ENET_SPEED_1000) && PortConfigured && !PreFetchEnabled)
  7361. + DBG(WARNING, ("For PFC correct operation, prefetch must be configured on the FM Tx PORT"));
  7362. + }
  7363. +
  7364. + fman_memac_set_tx_pause_frames(p_Memac->p_MemMap, priority, pauseTime, threshTime);
  7365. +
  7366. + return E_OK;
  7367. +}
  7368. +
  7369. +/* ......................................................................... */
  7370. +
  7371. +static t_Error MemacSetTxAutoPauseFrames(t_Handle h_Memac,
  7372. + uint16_t pauseTime)
  7373. +{
  7374. + return MemacSetTxPauseFrames(h_Memac, FM_MAC_NO_PFC, pauseTime, 0);
  7375. +}
  7376. +
  7377. +/* ......................................................................... */
  7378. +
  7379. +static t_Error MemacSetRxIgnorePauseFrames(t_Handle h_Memac, bool en)
  7380. +{
  7381. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7382. +
  7383. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_STATE);
  7384. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7385. +
  7386. + fman_memac_set_rx_ignore_pause_frames(p_Memac->p_MemMap, en);
  7387. +
  7388. + return E_OK;
  7389. +}
  7390. +
  7391. +/* ......................................................................... */
  7392. +
  7393. +static t_Error MemacSetWakeOnLan(t_Handle h_Memac, bool en)
  7394. +{
  7395. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7396. +
  7397. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_STATE);
  7398. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7399. +
  7400. + fman_memac_set_wol(p_Memac->p_MemMap, en);
  7401. +
  7402. + return E_OK;
  7403. +}
  7404. +
  7405. +/* .............................................................................. */
  7406. +
  7407. +static t_Error MemacEnable1588TimeStamp(t_Handle h_Memac)
  7408. +{
  7409. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7410. +
  7411. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7412. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7413. +UNUSED(p_Memac);
  7414. +DBG(WARNING, ("mEMAC has 1588 always enabled!"));
  7415. +
  7416. + return E_OK;
  7417. +}
  7418. +
  7419. +/* Counters handling */
  7420. +/* ......................................................................... */
  7421. +
  7422. +static t_Error MemacGetStatistics(t_Handle h_Memac, t_FmMacStatistics *p_Statistics)
  7423. +{
  7424. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7425. +
  7426. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
  7427. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7428. + SANITY_CHECK_RETURN_ERROR(p_Statistics, E_NULL_POINTER);
  7429. +
  7430. + p_Statistics->eStatPkts64 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R64);
  7431. + p_Statistics->eStatPkts65to127 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R127);
  7432. + p_Statistics->eStatPkts128to255 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R255);
  7433. + p_Statistics->eStatPkts256to511 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R511);
  7434. + p_Statistics->eStatPkts512to1023 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1023);
  7435. + p_Statistics->eStatPkts1024to1518 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1518);
  7436. + p_Statistics->eStatPkts1519to1522 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1519X);
  7437. +/* */
  7438. + p_Statistics->eStatFragments = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RFRG);
  7439. + p_Statistics->eStatJabbers = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RJBR);
  7440. +
  7441. + p_Statistics->eStatsDropEvents = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RDRP);
  7442. + p_Statistics->eStatCRCAlignErrors = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RALN);
  7443. +
  7444. + p_Statistics->eStatUndersizePkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TUND);
  7445. + p_Statistics->eStatOversizePkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_ROVR);
  7446. +/* Pause */
  7447. + p_Statistics->reStatPause = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RXPF);
  7448. + p_Statistics->teStatPause = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TXPF);
  7449. +
  7450. +/* MIB II */
  7451. + p_Statistics->ifInOctets = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_ROCT);
  7452. + p_Statistics->ifInUcastPkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RUCA);
  7453. + p_Statistics->ifInMcastPkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RMCA);
  7454. + p_Statistics->ifInBcastPkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RBCA);
  7455. + p_Statistics->ifInPkts = p_Statistics->ifInUcastPkts
  7456. + + p_Statistics->ifInMcastPkts
  7457. + + p_Statistics->ifInBcastPkts;
  7458. + p_Statistics->ifInDiscards = 0;
  7459. + p_Statistics->ifInErrors = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_RERR);
  7460. +
  7461. + p_Statistics->ifOutOctets = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TOCT);
  7462. + p_Statistics->ifOutUcastPkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TUCA);
  7463. + p_Statistics->ifOutMcastPkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TMCA);
  7464. + p_Statistics->ifOutBcastPkts = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TBCA);
  7465. + p_Statistics->ifOutPkts = p_Statistics->ifOutUcastPkts
  7466. + + p_Statistics->ifOutMcastPkts
  7467. + + p_Statistics->ifOutBcastPkts;
  7468. + p_Statistics->ifOutDiscards = 0;
  7469. + p_Statistics->ifOutErrors = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_TERR);
  7470. +
  7471. + return E_OK;
  7472. +}
  7473. +
  7474. +/* ......................................................................... */
  7475. +
  7476. +static t_Error MemacModifyMacAddress (t_Handle h_Memac, t_EnetAddr *p_EnetAddr)
  7477. +{
  7478. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7479. +
  7480. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
  7481. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7482. +
  7483. + fman_memac_add_addr_in_paddr(p_Memac->p_MemMap, (uint8_t *)(*p_EnetAddr), 0);
  7484. +
  7485. + return E_OK;
  7486. +}
  7487. +
  7488. +/* ......................................................................... */
  7489. +
  7490. +static t_Error MemacResetCounters (t_Handle h_Memac)
  7491. +{
  7492. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7493. +
  7494. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7495. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7496. +
  7497. + fman_memac_reset_stat(p_Memac->p_MemMap);
  7498. +
  7499. + return E_OK;
  7500. +}
  7501. +
  7502. +/* ......................................................................... */
  7503. +
  7504. +static t_Error MemacAddExactMatchMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
  7505. +{
  7506. + t_Memac *p_Memac = (t_Memac *) h_Memac;
  7507. + uint64_t ethAddr;
  7508. + uint8_t paddrNum;
  7509. +
  7510. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7511. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7512. +
  7513. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  7514. +
  7515. + if (ethAddr & GROUP_ADDRESS)
  7516. + /* Multicast address has no effect in PADDR */
  7517. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Multicast address"));
  7518. +
  7519. + /* Make sure no PADDR contains this address */
  7520. + for (paddrNum = 0; paddrNum < MEMAC_NUM_OF_PADDRS; paddrNum++)
  7521. + if (p_Memac->indAddrRegUsed[paddrNum])
  7522. + if (p_Memac->paddr[paddrNum] == ethAddr)
  7523. + RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
  7524. +
  7525. + /* Find first unused PADDR */
  7526. + for (paddrNum = 0; paddrNum < MEMAC_NUM_OF_PADDRS; paddrNum++)
  7527. + if (!(p_Memac->indAddrRegUsed[paddrNum]))
  7528. + {
  7529. + /* mark this PADDR as used */
  7530. + p_Memac->indAddrRegUsed[paddrNum] = TRUE;
  7531. + /* store address */
  7532. + p_Memac->paddr[paddrNum] = ethAddr;
  7533. +
  7534. + /* put in hardware */
  7535. + fman_memac_add_addr_in_paddr(p_Memac->p_MemMap, (uint8_t*)(*p_EthAddr), paddrNum);
  7536. + p_Memac->numOfIndAddrInRegs++;
  7537. +
  7538. + return E_OK;
  7539. + }
  7540. +
  7541. + /* No free PADDR */
  7542. + RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
  7543. +}
  7544. +
  7545. +/* ......................................................................... */
  7546. +
  7547. +static t_Error MemacDelExactMatchMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
  7548. +{
  7549. + t_Memac *p_Memac = (t_Memac *) h_Memac;
  7550. + uint64_t ethAddr;
  7551. + uint8_t paddrNum;
  7552. +
  7553. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7554. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7555. +
  7556. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  7557. +
  7558. + /* Find used PADDR containing this address */
  7559. + for (paddrNum = 0; paddrNum < MEMAC_NUM_OF_PADDRS; paddrNum++)
  7560. + {
  7561. + if ((p_Memac->indAddrRegUsed[paddrNum]) &&
  7562. + (p_Memac->paddr[paddrNum] == ethAddr))
  7563. + {
  7564. + /* mark this PADDR as not used */
  7565. + p_Memac->indAddrRegUsed[paddrNum] = FALSE;
  7566. + /* clear in hardware */
  7567. + fman_memac_clear_addr_in_paddr(p_Memac->p_MemMap, paddrNum);
  7568. + p_Memac->numOfIndAddrInRegs--;
  7569. +
  7570. + return E_OK;
  7571. + }
  7572. + }
  7573. +
  7574. + RETURN_ERROR(MAJOR, E_NOT_FOUND, NO_MSG);
  7575. +}
  7576. +
  7577. +/* ......................................................................... */
  7578. +
  7579. +static t_Error MemacGetId(t_Handle h_Memac, uint32_t *macId)
  7580. +{
  7581. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7582. +
  7583. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7584. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7585. +
  7586. + *macId = p_Memac->macId;
  7587. +
  7588. + return E_OK;
  7589. +}
  7590. +
  7591. +/* ......................................................................... */
  7592. +
  7593. +
  7594. +static t_Error MemacAddHashMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
  7595. +{
  7596. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7597. + t_EthHashEntry *p_HashEntry;
  7598. + uint32_t hash;
  7599. + uint64_t ethAddr;
  7600. +
  7601. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
  7602. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7603. +
  7604. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  7605. +
  7606. + if (!(ethAddr & GROUP_ADDRESS))
  7607. + /* Unicast addresses not supported in hash */
  7608. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unicast Address"));
  7609. +
  7610. + hash = GetMacAddrHashCode(ethAddr) & HASH_CTRL_ADDR_MASK;
  7611. +
  7612. + /* Create element to be added to the driver hash table */
  7613. + p_HashEntry = (t_EthHashEntry *)XX_Malloc(sizeof(t_EthHashEntry));
  7614. + p_HashEntry->addr = ethAddr;
  7615. + INIT_LIST(&p_HashEntry->node);
  7616. +
  7617. + LIST_AddToTail(&(p_HashEntry->node), &(p_Memac->p_MulticastAddrHash->p_Lsts[hash]));
  7618. + fman_memac_set_hash_table(p_Memac->p_MemMap, (hash | HASH_CTRL_MCAST_EN));
  7619. +
  7620. + return E_OK;
  7621. +}
  7622. +
  7623. +/* ......................................................................... */
  7624. +
  7625. +static t_Error MemacDelHashMacAddress(t_Handle h_Memac, t_EnetAddr *p_EthAddr)
  7626. +{
  7627. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7628. + t_EthHashEntry *p_HashEntry = NULL;
  7629. + t_List *p_Pos;
  7630. + uint32_t hash;
  7631. + uint64_t ethAddr;
  7632. +
  7633. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
  7634. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7635. +
  7636. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  7637. +
  7638. + hash = GetMacAddrHashCode(ethAddr) & HASH_CTRL_ADDR_MASK;
  7639. +
  7640. + LIST_FOR_EACH(p_Pos, &(p_Memac->p_MulticastAddrHash->p_Lsts[hash]))
  7641. + {
  7642. + p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
  7643. + if (p_HashEntry->addr == ethAddr)
  7644. + {
  7645. + LIST_DelAndInit(&p_HashEntry->node);
  7646. + XX_Free(p_HashEntry);
  7647. + break;
  7648. + }
  7649. + }
  7650. + if (LIST_IsEmpty(&p_Memac->p_MulticastAddrHash->p_Lsts[hash]))
  7651. + fman_memac_set_hash_table(p_Memac->p_MemMap, (hash & ~HASH_CTRL_MCAST_EN));
  7652. +
  7653. + return E_OK;
  7654. +}
  7655. +
  7656. +
  7657. +/* ......................................................................... */
  7658. +
  7659. +static t_Error MemacSetException(t_Handle h_Memac, e_FmMacExceptions exception, bool enable)
  7660. +{
  7661. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7662. + uint32_t bitMask = 0;
  7663. +
  7664. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7665. + SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7666. +
  7667. + GET_EXCEPTION_FLAG(bitMask, exception);
  7668. + if (bitMask)
  7669. + {
  7670. + if (enable)
  7671. + p_Memac->exceptions |= bitMask;
  7672. + else
  7673. + p_Memac->exceptions &= ~bitMask;
  7674. + }
  7675. + else
  7676. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  7677. +
  7678. + fman_memac_set_exception(p_Memac->p_MemMap, bitMask, enable);
  7679. +
  7680. + return E_OK;
  7681. +}
  7682. +
  7683. +/* ......................................................................... */
  7684. +
  7685. +static uint16_t MemacGetMaxFrameLength(t_Handle h_Memac)
  7686. +{
  7687. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7688. +
  7689. + SANITY_CHECK_RETURN_VALUE(p_Memac, E_INVALID_HANDLE, 0);
  7690. + SANITY_CHECK_RETURN_VALUE(!p_Memac->p_MemacDriverParam, E_INVALID_STATE, 0);
  7691. +
  7692. + return fman_memac_get_max_frame_len(p_Memac->p_MemMap);
  7693. +}
  7694. +
  7695. +
  7696. +/*****************************************************************************/
  7697. +/* mEMAC Init & Free API */
  7698. +/*****************************************************************************/
  7699. +
  7700. +/* ......................................................................... */
  7701. +void *g_MemacRegs;
  7702. +static t_Error MemacInit(t_Handle h_Memac)
  7703. +{
  7704. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7705. + struct memac_cfg *p_MemacDriverParam;
  7706. + enum enet_interface enet_interface;
  7707. + enum enet_speed enet_speed;
  7708. + uint8_t i, phyAddr;
  7709. + t_EnetAddr ethAddr;
  7710. + e_FmMacType portType;
  7711. + t_Error err;
  7712. + bool slow_10g_if = FALSE;
  7713. + if (p_Memac->macId == 3) /* This is a quick WA */
  7714. + g_MemacRegs = p_Memac->p_MemMap;
  7715. +
  7716. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7717. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MemacDriverParam, E_INVALID_STATE);
  7718. + SANITY_CHECK_RETURN_ERROR(p_Memac->fmMacControllerDriver.h_Fm, E_INVALID_HANDLE);
  7719. +
  7720. + FM_GetRevision(p_Memac->fmMacControllerDriver.h_Fm, &p_Memac->fmMacControllerDriver.fmRevInfo);
  7721. + if (p_Memac->fmMacControllerDriver.fmRevInfo.majorRev == 6 &&
  7722. + p_Memac->fmMacControllerDriver.fmRevInfo.minorRev == 4)
  7723. + slow_10g_if = TRUE;
  7724. +
  7725. + CHECK_INIT_PARAMETERS(p_Memac, CheckInitParameters);
  7726. +
  7727. + p_MemacDriverParam = p_Memac->p_MemacDriverParam;
  7728. +
  7729. + portType =
  7730. + ((ENET_SPEED_FROM_MODE(p_Memac->enetMode) < e_ENET_SPEED_10000) ? e_FM_MAC_1G : e_FM_MAC_10G);
  7731. +
  7732. + /* First, reset the MAC if desired. */
  7733. + if (p_MemacDriverParam->reset_on_init)
  7734. + fman_memac_reset(p_Memac->p_MemMap);
  7735. +
  7736. + /* MAC Address */
  7737. + MAKE_ENET_ADDR_FROM_UINT64(p_Memac->addr, ethAddr);
  7738. + fman_memac_add_addr_in_paddr(p_Memac->p_MemMap, (uint8_t*)ethAddr, 0);
  7739. +
  7740. + enet_interface = (enum enet_interface) ENET_INTERFACE_FROM_MODE(p_Memac->enetMode);
  7741. + enet_speed = (enum enet_speed) ENET_SPEED_FROM_MODE(p_Memac->enetMode);
  7742. +
  7743. + fman_memac_init(p_Memac->p_MemMap,
  7744. + p_Memac->p_MemacDriverParam,
  7745. + enet_interface,
  7746. + enet_speed,
  7747. + slow_10g_if,
  7748. + p_Memac->exceptions);
  7749. +
  7750. +#ifdef FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
  7751. + {
  7752. + uint32_t tmpReg = 0;
  7753. +
  7754. + FM_GetRevision(p_Memac->fmMacControllerDriver.h_Fm, &p_Memac->fmMacControllerDriver.fmRevInfo);
  7755. + /* check the FMAN version - the bug exists only in rev1 */
  7756. + if ((p_Memac->fmMacControllerDriver.fmRevInfo.majorRev == 6) &&
  7757. + (p_Memac->fmMacControllerDriver.fmRevInfo.minorRev == 0))
  7758. + {
  7759. + /* MAC strips CRC from received frames - this workaround should
  7760. + decrease the likelihood of bug appearance
  7761. + */
  7762. + tmpReg = GET_UINT32(p_Memac->p_MemMap->command_config);
  7763. + tmpReg &= ~CMD_CFG_CRC_FWD;
  7764. + WRITE_UINT32(p_Memac->p_MemMap->command_config, tmpReg);
  7765. + /* DBG(WARNING, ("mEMAC strips CRC from received frames as part of A006320 errata workaround"));*/
  7766. + }
  7767. + }
  7768. +#endif /* FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320 */
  7769. +
  7770. + if (ENET_INTERFACE_FROM_MODE(p_Memac->enetMode) == e_ENET_IF_SGMII)
  7771. + {
  7772. + /* Configure internal SGMII PHY */
  7773. + if (p_Memac->enetMode & ENET_IF_SGMII_BASEX)
  7774. + SetupSgmiiInternalPhyBaseX(p_Memac, PHY_MDIO_ADDR);
  7775. + else
  7776. + SetupSgmiiInternalPhy(p_Memac, PHY_MDIO_ADDR);
  7777. + }
  7778. + else if (ENET_INTERFACE_FROM_MODE(p_Memac->enetMode) == e_ENET_IF_QSGMII)
  7779. + {
  7780. + /* Configure 4 internal SGMII PHYs */
  7781. + for (i = 0; i < 4; i++)
  7782. + {
  7783. + /* QSGMII PHY address occupies 3 upper bits of 5-bit
  7784. + phyAddress; the lower 2 bits are used to extend
  7785. + register address space and access each one of 4
  7786. + ports inside QSGMII. */
  7787. + phyAddr = (uint8_t)((PHY_MDIO_ADDR << 2) | i);
  7788. + if (p_Memac->enetMode & ENET_IF_SGMII_BASEX)
  7789. + SetupSgmiiInternalPhyBaseX(p_Memac, phyAddr);
  7790. + else
  7791. + SetupSgmiiInternalPhy(p_Memac, phyAddr);
  7792. + }
  7793. + }
  7794. +
  7795. + /* Max Frame Length */
  7796. + err = FmSetMacMaxFrame(p_Memac->fmMacControllerDriver.h_Fm,
  7797. + portType,
  7798. + p_Memac->fmMacControllerDriver.macId,
  7799. + p_MemacDriverParam->max_frame_length);
  7800. + if (err)
  7801. + RETURN_ERROR(MAJOR, err, ("settings Mac max frame length is FAILED"));
  7802. +
  7803. + p_Memac->p_MulticastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
  7804. + if (!p_Memac->p_MulticastAddrHash)
  7805. + {
  7806. + FreeInitResources(p_Memac);
  7807. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
  7808. + }
  7809. +
  7810. + p_Memac->p_UnicastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
  7811. + if (!p_Memac->p_UnicastAddrHash)
  7812. + {
  7813. + FreeInitResources(p_Memac);
  7814. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
  7815. + }
  7816. +
  7817. + FmRegisterIntr(p_Memac->fmMacControllerDriver.h_Fm,
  7818. + (portType == e_FM_MAC_10G) ? e_FM_MOD_10G_MAC : e_FM_MOD_1G_MAC,
  7819. + p_Memac->macId,
  7820. + e_FM_INTR_TYPE_ERR,
  7821. + MemacErrException,
  7822. + p_Memac);
  7823. +
  7824. + FmRegisterIntr(p_Memac->fmMacControllerDriver.h_Fm,
  7825. + (portType == e_FM_MAC_10G) ? e_FM_MOD_10G_MAC : e_FM_MOD_1G_MAC,
  7826. + p_Memac->macId,
  7827. + e_FM_INTR_TYPE_NORMAL,
  7828. + MemacException,
  7829. + p_Memac);
  7830. +
  7831. + XX_Free(p_MemacDriverParam);
  7832. + p_Memac->p_MemacDriverParam = NULL;
  7833. +
  7834. + return E_OK;
  7835. +}
  7836. +
  7837. +/* ......................................................................... */
  7838. +
  7839. +static t_Error MemacFree(t_Handle h_Memac)
  7840. +{
  7841. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  7842. +
  7843. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  7844. +
  7845. + if (p_Memac->p_MemacDriverParam)
  7846. + {
  7847. + /* Called after config */
  7848. + XX_Free(p_Memac->p_MemacDriverParam);
  7849. + p_Memac->p_MemacDriverParam = NULL;
  7850. + }
  7851. + else
  7852. + /* Called after init */
  7853. + FreeInitResources(p_Memac);
  7854. +
  7855. + XX_Free(p_Memac);
  7856. +
  7857. + return E_OK;
  7858. +}
  7859. +
  7860. +/* ......................................................................... */
  7861. +
  7862. +static void InitFmMacControllerDriver(t_FmMacControllerDriver *p_FmMacControllerDriver)
  7863. +{
  7864. + p_FmMacControllerDriver->f_FM_MAC_Init = MemacInit;
  7865. + p_FmMacControllerDriver->f_FM_MAC_Free = MemacFree;
  7866. +
  7867. + p_FmMacControllerDriver->f_FM_MAC_SetStatistics = NULL;
  7868. + p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback = MemacConfigLoopback;
  7869. + p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength = MemacConfigMaxFrameLength;
  7870. +
  7871. + p_FmMacControllerDriver->f_FM_MAC_ConfigWan = MemacConfigWan;
  7872. +
  7873. + p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc = MemacConfigPad;
  7874. + p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex = NULL; /* half-duplex is detected automatically */
  7875. + p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck = MemacConfigLengthCheck;
  7876. +
  7877. + p_FmMacControllerDriver->f_FM_MAC_ConfigException = MemacConfigException;
  7878. + p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit = MemacConfigResetOnInit;
  7879. +
  7880. + p_FmMacControllerDriver->f_FM_MAC_SetException = MemacSetException;
  7881. +
  7882. + p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp = MemacEnable1588TimeStamp; /* always enabled */
  7883. + p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp = NULL;
  7884. +
  7885. + p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous = MemacSetPromiscuous;
  7886. + p_FmMacControllerDriver->f_FM_MAC_AdjustLink = MemacAdjustLink;
  7887. + p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg = NULL;
  7888. +
  7889. + p_FmMacControllerDriver->f_FM_MAC_Enable = MemacEnable;
  7890. + p_FmMacControllerDriver->f_FM_MAC_Disable = MemacDisable;
  7891. +
  7892. + p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames = MemacSetTxAutoPauseFrames;
  7893. + p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames = MemacSetTxPauseFrames;
  7894. + p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames = MemacSetRxIgnorePauseFrames;
  7895. +
  7896. + p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan = MemacSetWakeOnLan;
  7897. +
  7898. + p_FmMacControllerDriver->f_FM_MAC_ResetCounters = MemacResetCounters;
  7899. + p_FmMacControllerDriver->f_FM_MAC_GetStatistics = MemacGetStatistics;
  7900. +
  7901. + p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr = MemacModifyMacAddress;
  7902. + p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr = MemacAddHashMacAddress;
  7903. + p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr = MemacDelHashMacAddress;
  7904. + p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr = MemacAddExactMatchMacAddress;
  7905. + p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr = MemacDelExactMatchMacAddress;
  7906. + p_FmMacControllerDriver->f_FM_MAC_GetId = MemacGetId;
  7907. + p_FmMacControllerDriver->f_FM_MAC_GetVersion = NULL;
  7908. + p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength = MemacGetMaxFrameLength;
  7909. +
  7910. + p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg = MEMAC_MII_WritePhyReg;
  7911. + p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg = MEMAC_MII_ReadPhyReg;
  7912. +}
  7913. +
  7914. +
  7915. +/*****************************************************************************/
  7916. +/* mEMAC Config Main Entry */
  7917. +/*****************************************************************************/
  7918. +
  7919. +/* ......................................................................... */
  7920. +
  7921. +t_Handle MEMAC_Config(t_FmMacParams *p_FmMacParam)
  7922. +{
  7923. + t_Memac *p_Memac;
  7924. + struct memac_cfg *p_MemacDriverParam;
  7925. + uintptr_t baseAddr;
  7926. +
  7927. + SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_NULL_POINTER, NULL);
  7928. +
  7929. + baseAddr = p_FmMacParam->baseAddr;
  7930. + /* Allocate memory for the mEMAC data structure */
  7931. + p_Memac = (t_Memac *)XX_Malloc(sizeof(t_Memac));
  7932. + if (!p_Memac)
  7933. + {
  7934. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("mEMAC driver structure"));
  7935. + return NULL;
  7936. + }
  7937. + memset(p_Memac, 0, sizeof(t_Memac));
  7938. + InitFmMacControllerDriver(&p_Memac->fmMacControllerDriver);
  7939. +
  7940. + /* Allocate memory for the mEMAC driver parameters data structure */
  7941. + p_MemacDriverParam = (struct memac_cfg *)XX_Malloc(sizeof(struct memac_cfg));
  7942. + if (!p_MemacDriverParam)
  7943. + {
  7944. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("mEMAC driver parameters"));
  7945. + XX_Free(p_Memac);
  7946. + return NULL;
  7947. + }
  7948. + memset(p_MemacDriverParam, 0, sizeof(struct memac_cfg));
  7949. +
  7950. + /* Plant parameter structure pointer */
  7951. + p_Memac->p_MemacDriverParam = p_MemacDriverParam;
  7952. +
  7953. + fman_memac_defconfig(p_MemacDriverParam);
  7954. +
  7955. + p_Memac->addr = ENET_ADDR_TO_UINT64(p_FmMacParam->addr);
  7956. +
  7957. + p_Memac->p_MemMap = (struct memac_regs *)UINT_TO_PTR(baseAddr);
  7958. + p_Memac->p_MiiMemMap = (struct memac_mii_access_mem_map*)UINT_TO_PTR(baseAddr + MEMAC_TO_MII_OFFSET);
  7959. +
  7960. + p_Memac->enetMode = p_FmMacParam->enetMode;
  7961. + p_Memac->macId = p_FmMacParam->macId;
  7962. + p_Memac->exceptions = MEMAC_default_exceptions;
  7963. + p_Memac->f_Exception = p_FmMacParam->f_Exception;
  7964. + p_Memac->f_Event = p_FmMacParam->f_Event;
  7965. + p_Memac->h_App = p_FmMacParam->h_App;
  7966. +
  7967. + return p_Memac;
  7968. +}
  7969. --- /dev/null
  7970. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.h
  7971. @@ -0,0 +1,110 @@
  7972. +/*
  7973. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  7974. + *
  7975. + * Redistribution and use in source and binary forms, with or without
  7976. + * modification, are permitted provided that the following conditions are met:
  7977. + * * Redistributions of source code must retain the above copyright
  7978. + * notice, this list of conditions and the following disclaimer.
  7979. + * * Redistributions in binary form must reproduce the above copyright
  7980. + * notice, this list of conditions and the following disclaimer in the
  7981. + * documentation and/or other materials provided with the distribution.
  7982. + * * Neither the name of Freescale Semiconductor nor the
  7983. + * names of its contributors may be used to endorse or promote products
  7984. + * derived from this software without specific prior written permission.
  7985. + *
  7986. + *
  7987. + * ALTERNATIVELY, this software may be distributed under the terms of the
  7988. + * GNU General Public License ("GPL") as published by the Free Software
  7989. + * Foundation, either version 2 of that License or (at your option) any
  7990. + * later version.
  7991. + *
  7992. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  7993. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  7994. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  7995. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  7996. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  7997. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  7998. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  7999. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  8000. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  8001. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  8002. + */
  8003. +
  8004. +
  8005. +/******************************************************************************
  8006. + @File memac.h
  8007. +
  8008. + @Description FM Multirate Ethernet MAC (mEMAC)
  8009. +*//***************************************************************************/
  8010. +#ifndef __MEMAC_H
  8011. +#define __MEMAC_H
  8012. +
  8013. +#include "std_ext.h"
  8014. +#include "error_ext.h"
  8015. +#include "list_ext.h"
  8016. +
  8017. +#include "fsl_fman_memac_mii_acc.h"
  8018. +#include "fm_mac.h"
  8019. +#include "fsl_fman_memac.h"
  8020. +
  8021. +
  8022. +#define MEMAC_default_exceptions \
  8023. + ((uint32_t)(MEMAC_IMASK_TSECC_ER | MEMAC_IMASK_TECC_ER | MEMAC_IMASK_RECC_ER | MEMAC_IMASK_MGI))
  8024. +
  8025. +#define GET_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \
  8026. + case e_FM_MAC_EX_10G_1TX_ECC_ER: \
  8027. + bitMask = MEMAC_IMASK_TECC_ER; break; \
  8028. + case e_FM_MAC_EX_10G_RX_ECC_ER: \
  8029. + bitMask = MEMAC_IMASK_RECC_ER; break; \
  8030. + case e_FM_MAC_EX_TS_FIFO_ECC_ERR: \
  8031. + bitMask = MEMAC_IMASK_TSECC_ER; break; \
  8032. + case e_FM_MAC_EX_MAGIC_PACKET_INDICATION: \
  8033. + bitMask = MEMAC_IMASK_MGI; break; \
  8034. + default: bitMask = 0;break;}
  8035. +
  8036. +
  8037. +typedef struct
  8038. +{
  8039. + t_FmMacControllerDriver fmMacControllerDriver; /**< Upper Mac control block */
  8040. + t_Handle h_App; /**< Handle to the upper layer application */
  8041. + struct memac_regs *p_MemMap; /**< Pointer to MAC memory mapped registers */
  8042. + struct memac_mii_access_mem_map *p_MiiMemMap; /**< Pointer to MII memory mapped registers */
  8043. + uint64_t addr; /**< MAC address of device */
  8044. + e_EnetMode enetMode; /**< Ethernet physical interface */
  8045. + t_FmMacExceptionCallback *f_Exception;
  8046. + int mdioIrq;
  8047. + t_FmMacExceptionCallback *f_Event;
  8048. + bool indAddrRegUsed[MEMAC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
  8049. + uint64_t paddr[MEMAC_NUM_OF_PADDRS]; /**< MAC address for particular individual address recognition register */
  8050. + uint8_t numOfIndAddrInRegs; /**< Number of individual addresses in registers for this station. */
  8051. + t_EthHash *p_MulticastAddrHash; /**< Pointer to driver's global address hash table */
  8052. + t_EthHash *p_UnicastAddrHash; /**< Pointer to driver's individual address hash table */
  8053. + bool debugMode;
  8054. + uint8_t macId;
  8055. + uint32_t exceptions;
  8056. + struct memac_cfg *p_MemacDriverParam;
  8057. +} t_Memac;
  8058. +
  8059. +
  8060. +/* Internal PHY access */
  8061. +#define PHY_MDIO_ADDR 0
  8062. +
  8063. +/* Internal PHY Registers - SGMII */
  8064. +#define PHY_SGMII_CR_PHY_RESET 0x8000
  8065. +#define PHY_SGMII_CR_RESET_AN 0x0200
  8066. +#define PHY_SGMII_CR_DEF_VAL 0x1140
  8067. +#define PHY_SGMII_DEV_ABILITY_SGMII 0x4001
  8068. +#define PHY_SGMII_DEV_ABILITY_1000X 0x01A0
  8069. +#define PHY_SGMII_IF_SPEED_GIGABIT 0x0008
  8070. +#define PHY_SGMII_IF_MODE_AN 0x0002
  8071. +#define PHY_SGMII_IF_MODE_SGMII 0x0001
  8072. +#define PHY_SGMII_IF_MODE_1000X 0x0000
  8073. +
  8074. +
  8075. +#define MEMAC_TO_MII_OFFSET 0x030 /* Offset from the MEM map to the MDIO mem map */
  8076. +
  8077. +t_Error MEMAC_MII_WritePhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t data);
  8078. +t_Error MEMAC_MII_ReadPhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
  8079. +
  8080. +
  8081. +#endif /* __MEMAC_H */
  8082. --- /dev/null
  8083. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.c
  8084. @@ -0,0 +1,78 @@
  8085. +/*
  8086. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  8087. + *
  8088. + * Redistribution and use in source and binary forms, with or without
  8089. + * modification, are permitted provided that the following conditions are met:
  8090. + * * Redistributions of source code must retain the above copyright
  8091. + * notice, this list of conditions and the following disclaimer.
  8092. + * * Redistributions in binary form must reproduce the above copyright
  8093. + * notice, this list of conditions and the following disclaimer in the
  8094. + * documentation and/or other materials provided with the distribution.
  8095. + * * Neither the name of Freescale Semiconductor nor the
  8096. + * names of its contributors may be used to endorse or promote products
  8097. + * derived from this software without specific prior written permission.
  8098. + *
  8099. + *
  8100. + * ALTERNATIVELY, this software may be distributed under the terms of the
  8101. + * GNU General Public License ("GPL") as published by the Free Software
  8102. + * Foundation, either version 2 of that License or (at your option) any
  8103. + * later version.
  8104. + *
  8105. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  8106. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  8107. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  8108. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  8109. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  8110. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  8111. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  8112. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  8113. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  8114. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  8115. + */
  8116. +
  8117. +
  8118. +#include "error_ext.h"
  8119. +#include "std_ext.h"
  8120. +#include "fm_mac.h"
  8121. +#include "memac.h"
  8122. +#include "xx_ext.h"
  8123. +
  8124. +#include "fm_common.h"
  8125. +#include "memac_mii_acc.h"
  8126. +
  8127. +
  8128. +/*****************************************************************************/
  8129. +t_Error MEMAC_MII_WritePhyReg(t_Handle h_Memac,
  8130. + uint8_t phyAddr,
  8131. + uint8_t reg,
  8132. + uint16_t data)
  8133. +{
  8134. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  8135. +
  8136. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  8137. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MiiMemMap, E_INVALID_HANDLE);
  8138. +
  8139. + return (t_Error)fman_memac_mii_write_phy_reg(p_Memac->p_MiiMemMap,
  8140. + phyAddr,
  8141. + reg,
  8142. + data,
  8143. + (enum enet_speed)ENET_SPEED_FROM_MODE(p_Memac->enetMode));
  8144. +}
  8145. +
  8146. +/*****************************************************************************/
  8147. +t_Error MEMAC_MII_ReadPhyReg(t_Handle h_Memac,
  8148. + uint8_t phyAddr,
  8149. + uint8_t reg,
  8150. + uint16_t *p_Data)
  8151. +{
  8152. + t_Memac *p_Memac = (t_Memac *)h_Memac;
  8153. +
  8154. + SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
  8155. + SANITY_CHECK_RETURN_ERROR(p_Memac->p_MiiMemMap, E_INVALID_HANDLE);
  8156. +
  8157. + return fman_memac_mii_read_phy_reg(p_Memac->p_MiiMemMap,
  8158. + phyAddr,
  8159. + reg,
  8160. + p_Data,
  8161. + (enum enet_speed)ENET_SPEED_FROM_MODE(p_Memac->enetMode));
  8162. +}
  8163. --- /dev/null
  8164. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac_mii_acc.h
  8165. @@ -0,0 +1,73 @@
  8166. +/*
  8167. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  8168. + *
  8169. + * Redistribution and use in source and binary forms, with or without
  8170. + * modification, are permitted provided that the following conditions are met:
  8171. + * * Redistributions of source code must retain the above copyright
  8172. + * notice, this list of conditions and the following disclaimer.
  8173. + * * Redistributions in binary form must reproduce the above copyright
  8174. + * notice, this list of conditions and the following disclaimer in the
  8175. + * documentation and/or other materials provided with the distribution.
  8176. + * * Neither the name of Freescale Semiconductor nor the
  8177. + * names of its contributors may be used to endorse or promote products
  8178. + * derived from this software without specific prior written permission.
  8179. + *
  8180. + *
  8181. + * ALTERNATIVELY, this software may be distributed under the terms of the
  8182. + * GNU General Public License ("GPL") as published by the Free Software
  8183. + * Foundation, either version 2 of that License or (at your option) any
  8184. + * later version.
  8185. + *
  8186. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  8187. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  8188. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  8189. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  8190. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  8191. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  8192. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  8193. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  8194. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  8195. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  8196. + */
  8197. +
  8198. +
  8199. +#ifndef __MEMAC_MII_ACC_H
  8200. +#define __MEMAC_MII_ACC_H
  8201. +
  8202. +#include "std_ext.h"
  8203. +
  8204. +
  8205. +/* MII Management Registers */
  8206. +#define MDIO_CFG_CLK_DIV_MASK 0x0080ff80
  8207. +#define MDIO_CFG_CLK_DIV_SHIFT 7
  8208. +#define MDIO_CFG_HOLD_MASK 0x0000001c
  8209. +#define MDIO_CFG_ENC45 0x00000040
  8210. +#define MDIO_CFG_READ_ERR 0x00000002
  8211. +#define MDIO_CFG_BSY 0x00000001
  8212. +
  8213. +#define MDIO_CTL_PHY_ADDR_SHIFT 5
  8214. +#define MDIO_CTL_READ 0x00008000
  8215. +
  8216. +#define MDIO_DATA_BSY 0x80000000
  8217. +
  8218. +#if defined(__MWERKS__) && !defined(__GNUC__)
  8219. +#pragma pack(push,1)
  8220. +#endif /* defined(__MWERKS__) && ... */
  8221. +
  8222. +/*----------------------------------------------------*/
  8223. +/* MII Configuration Control Memory Map Registers */
  8224. +/*----------------------------------------------------*/
  8225. +typedef struct t_MemacMiiAccessMemMap
  8226. +{
  8227. + volatile uint32_t mdio_cfg; /* 0x030 */
  8228. + volatile uint32_t mdio_ctrl; /* 0x034 */
  8229. + volatile uint32_t mdio_data; /* 0x038 */
  8230. + volatile uint32_t mdio_addr; /* 0x03c */
  8231. +} t_MemacMiiAccessMemMap ;
  8232. +
  8233. +#if defined(__MWERKS__) && !defined(__GNUC__)
  8234. +#pragma pack(pop)
  8235. +#endif /* defined(__MWERKS__) && ... */
  8236. +
  8237. +
  8238. +#endif /* __MEMAC_MII_ACC_H */
  8239. --- /dev/null
  8240. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.c
  8241. @@ -0,0 +1,974 @@
  8242. +/*
  8243. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  8244. + *
  8245. + * Redistribution and use in source and binary forms, with or without
  8246. + * modification, are permitted provided that the following conditions are met:
  8247. + * * Redistributions of source code must retain the above copyright
  8248. + * notice, this list of conditions and the following disclaimer.
  8249. + * * Redistributions in binary form must reproduce the above copyright
  8250. + * notice, this list of conditions and the following disclaimer in the
  8251. + * documentation and/or other materials provided with the distribution.
  8252. + * * Neither the name of Freescale Semiconductor nor the
  8253. + * names of its contributors may be used to endorse or promote products
  8254. + * derived from this software without specific prior written permission.
  8255. + *
  8256. + *
  8257. + * ALTERNATIVELY, this software may be distributed under the terms of the
  8258. + * GNU General Public License ("GPL") as published by the Free Software
  8259. + * Foundation, either version 2 of that License or (at your option) any
  8260. + * later version.
  8261. + *
  8262. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  8263. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  8264. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  8265. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  8266. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  8267. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  8268. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  8269. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  8270. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  8271. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  8272. + */
  8273. +
  8274. +
  8275. +/******************************************************************************
  8276. + @File tgec.c
  8277. +
  8278. + @Description FM 10G MAC ...
  8279. +*//***************************************************************************/
  8280. +
  8281. +#include "std_ext.h"
  8282. +#include "string_ext.h"
  8283. +#include "error_ext.h"
  8284. +#include "xx_ext.h"
  8285. +#include "endian_ext.h"
  8286. +#include "debug_ext.h"
  8287. +#include "crc_mac_addr_ext.h"
  8288. +
  8289. +#include "fm_common.h"
  8290. +#include "fsl_fman_tgec.h"
  8291. +#include "tgec.h"
  8292. +
  8293. +
  8294. +/*****************************************************************************/
  8295. +/* Internal routines */
  8296. +/*****************************************************************************/
  8297. +
  8298. +static t_Error CheckInitParameters(t_Tgec *p_Tgec)
  8299. +{
  8300. + if (ENET_SPEED_FROM_MODE(p_Tgec->enetMode) < e_ENET_SPEED_10000)
  8301. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet 10G MAC driver only support 10G speed"));
  8302. +#if (FM_MAX_NUM_OF_10G_MACS > 0)
  8303. + if (p_Tgec->macId >= FM_MAX_NUM_OF_10G_MACS)
  8304. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("macId of 10G can not be greater than 0"));
  8305. +#endif /* (FM_MAX_NUM_OF_10G_MACS > 0) */
  8306. +
  8307. + if (p_Tgec->addr == 0)
  8308. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet 10G MAC Must have a valid MAC Address"));
  8309. + if (!p_Tgec->f_Exception)
  8310. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("uninitialized f_Exception"));
  8311. + if (!p_Tgec->f_Event)
  8312. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("uninitialized f_Event"));
  8313. +#ifdef FM_LEN_CHECK_ERRATA_FMAN_SW002
  8314. + if (!p_Tgec->p_TgecDriverParam->no_length_check_enable)
  8315. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("LengthCheck!"));
  8316. +#endif /* FM_LEN_CHECK_ERRATA_FMAN_SW002 */
  8317. + return E_OK;
  8318. +}
  8319. +
  8320. +/* ......................................................................... */
  8321. +
  8322. +static uint32_t GetMacAddrHashCode(uint64_t ethAddr)
  8323. +{
  8324. + uint32_t crc;
  8325. +
  8326. + /* CRC calculation */
  8327. + GET_MAC_ADDR_CRC(ethAddr, crc);
  8328. +
  8329. + crc = GetMirror32(crc);
  8330. +
  8331. + return crc;
  8332. +}
  8333. +
  8334. +/* ......................................................................... */
  8335. +
  8336. +static void TgecErrException(t_Handle h_Tgec)
  8337. +{
  8338. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8339. + uint32_t event;
  8340. + struct tgec_regs *p_TgecMemMap = p_Tgec->p_MemMap;
  8341. +
  8342. + /* do not handle MDIO events */
  8343. + event = fman_tgec_get_event(p_TgecMemMap, ~(TGEC_IMASK_MDIO_SCAN_EVENT | TGEC_IMASK_MDIO_CMD_CMPL));
  8344. + event &= fman_tgec_get_interrupt_mask(p_TgecMemMap);
  8345. +
  8346. + fman_tgec_ack_event(p_TgecMemMap, event);
  8347. +
  8348. + if (event & TGEC_IMASK_REM_FAULT)
  8349. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_REM_FAULT);
  8350. + if (event & TGEC_IMASK_LOC_FAULT)
  8351. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_LOC_FAULT);
  8352. + if (event & TGEC_IMASK_TX_ECC_ER)
  8353. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_1TX_ECC_ER);
  8354. + if (event & TGEC_IMASK_TX_FIFO_UNFL)
  8355. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_TX_FIFO_UNFL);
  8356. + if (event & TGEC_IMASK_TX_FIFO_OVFL)
  8357. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_TX_FIFO_OVFL);
  8358. + if (event & TGEC_IMASK_TX_ER)
  8359. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_TX_ER);
  8360. + if (event & TGEC_IMASK_RX_FIFO_OVFL)
  8361. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_FIFO_OVFL);
  8362. + if (event & TGEC_IMASK_RX_ECC_ER)
  8363. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_ECC_ER);
  8364. + if (event & TGEC_IMASK_RX_JAB_FRM)
  8365. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_JAB_FRM);
  8366. + if (event & TGEC_IMASK_RX_OVRSZ_FRM)
  8367. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_OVRSZ_FRM);
  8368. + if (event & TGEC_IMASK_RX_RUNT_FRM)
  8369. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_RUNT_FRM);
  8370. + if (event & TGEC_IMASK_RX_FRAG_FRM)
  8371. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_FRAG_FRM);
  8372. + if (event & TGEC_IMASK_RX_LEN_ER)
  8373. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_LEN_ER);
  8374. + if (event & TGEC_IMASK_RX_CRC_ER)
  8375. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_CRC_ER);
  8376. + if (event & TGEC_IMASK_RX_ALIGN_ER)
  8377. + p_Tgec->f_Exception(p_Tgec->h_App, e_FM_MAC_EX_10G_RX_ALIGN_ER);
  8378. +}
  8379. +
  8380. +/* ......................................................................... */
  8381. +
  8382. +static void TgecException(t_Handle h_Tgec)
  8383. +{
  8384. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8385. + uint32_t event;
  8386. + struct tgec_regs *p_TgecMemMap = p_Tgec->p_MemMap;
  8387. +
  8388. + /* handle only MDIO events */
  8389. + event = fman_tgec_get_event(p_TgecMemMap, (TGEC_IMASK_MDIO_SCAN_EVENT | TGEC_IMASK_MDIO_CMD_CMPL));
  8390. + event &= fman_tgec_get_interrupt_mask(p_TgecMemMap);
  8391. +
  8392. + fman_tgec_ack_event(p_TgecMemMap, event);
  8393. +
  8394. + if (event & TGEC_IMASK_MDIO_SCAN_EVENT)
  8395. + p_Tgec->f_Event(p_Tgec->h_App, e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO);
  8396. + if (event & TGEC_IMASK_MDIO_CMD_CMPL)
  8397. + p_Tgec->f_Event(p_Tgec->h_App, e_FM_MAC_EX_10G_MDIO_CMD_CMPL);
  8398. +}
  8399. +
  8400. +/* ......................................................................... */
  8401. +
  8402. +static void FreeInitResources(t_Tgec *p_Tgec)
  8403. +{
  8404. + if (p_Tgec->mdioIrq != NO_IRQ)
  8405. + {
  8406. + XX_DisableIntr(p_Tgec->mdioIrq);
  8407. + XX_FreeIntr(p_Tgec->mdioIrq);
  8408. + }
  8409. +
  8410. + FmUnregisterIntr(p_Tgec->fmMacControllerDriver.h_Fm, e_FM_MOD_10G_MAC, p_Tgec->macId, e_FM_INTR_TYPE_ERR);
  8411. +
  8412. + /* release the driver's group hash table */
  8413. + FreeHashTable(p_Tgec->p_MulticastAddrHash);
  8414. + p_Tgec->p_MulticastAddrHash = NULL;
  8415. +
  8416. + /* release the driver's individual hash table */
  8417. + FreeHashTable(p_Tgec->p_UnicastAddrHash);
  8418. + p_Tgec->p_UnicastAddrHash = NULL;
  8419. +}
  8420. +
  8421. +
  8422. +/*****************************************************************************/
  8423. +/* 10G MAC API routines */
  8424. +/*****************************************************************************/
  8425. +
  8426. +/* ......................................................................... */
  8427. +
  8428. +static t_Error TgecEnable(t_Handle h_Tgec, e_CommMode mode)
  8429. +{
  8430. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8431. +
  8432. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8433. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8434. +
  8435. + fman_tgec_enable(p_Tgec->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
  8436. +
  8437. + return E_OK;
  8438. +}
  8439. +
  8440. +/* ......................................................................... */
  8441. +
  8442. +static t_Error TgecDisable (t_Handle h_Tgec, e_CommMode mode)
  8443. +{
  8444. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8445. +
  8446. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8447. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8448. +
  8449. + fman_tgec_disable(p_Tgec->p_MemMap, (mode & e_COMM_MODE_RX), (mode & e_COMM_MODE_TX));
  8450. +
  8451. + return E_OK;
  8452. +}
  8453. +
  8454. +/* ......................................................................... */
  8455. +
  8456. +static t_Error TgecSetPromiscuous(t_Handle h_Tgec, bool newVal)
  8457. +{
  8458. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8459. +
  8460. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8461. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8462. +
  8463. + fman_tgec_set_promiscuous(p_Tgec->p_MemMap, newVal);
  8464. +
  8465. + return E_OK;
  8466. +}
  8467. +
  8468. +
  8469. +/*****************************************************************************/
  8470. +/* Tgec Configs modification functions */
  8471. +/*****************************************************************************/
  8472. +
  8473. +/* ......................................................................... */
  8474. +
  8475. +static t_Error TgecConfigLoopback(t_Handle h_Tgec, bool newVal)
  8476. +{
  8477. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8478. +
  8479. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8480. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8481. +
  8482. + p_Tgec->p_TgecDriverParam->loopback_enable = newVal;
  8483. +
  8484. + return E_OK;
  8485. +}
  8486. +
  8487. +/* ......................................................................... */
  8488. +
  8489. +static t_Error TgecConfigWan(t_Handle h_Tgec, bool newVal)
  8490. +{
  8491. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8492. +
  8493. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8494. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8495. +
  8496. + p_Tgec->p_TgecDriverParam->wan_mode_enable = newVal;
  8497. +
  8498. + return E_OK;
  8499. +}
  8500. +
  8501. +/* ......................................................................... */
  8502. +
  8503. +static t_Error TgecConfigMaxFrameLength(t_Handle h_Tgec, uint16_t newVal)
  8504. +{
  8505. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8506. +
  8507. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8508. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8509. +
  8510. + p_Tgec->p_TgecDriverParam->max_frame_length = newVal;
  8511. +
  8512. + return E_OK;
  8513. +}
  8514. +
  8515. +/* ......................................................................... */
  8516. +
  8517. +static t_Error TgecConfigLengthCheck(t_Handle h_Tgec, bool newVal)
  8518. +{
  8519. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8520. +
  8521. + UNUSED(newVal);
  8522. +
  8523. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8524. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8525. +
  8526. + p_Tgec->p_TgecDriverParam->no_length_check_enable = !newVal;
  8527. +
  8528. + return E_OK;
  8529. +}
  8530. +
  8531. +/* ......................................................................... */
  8532. +
  8533. +static t_Error TgecConfigException(t_Handle h_Tgec, e_FmMacExceptions exception, bool enable)
  8534. +{
  8535. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8536. + uint32_t bitMask = 0;
  8537. +
  8538. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8539. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8540. +
  8541. + GET_EXCEPTION_FLAG(bitMask, exception);
  8542. + if (bitMask)
  8543. + {
  8544. + if (enable)
  8545. + p_Tgec->exceptions |= bitMask;
  8546. + else
  8547. + p_Tgec->exceptions &= ~bitMask;
  8548. + }
  8549. + else
  8550. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  8551. +
  8552. + return E_OK;
  8553. +}
  8554. +
  8555. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  8556. +/* ......................................................................... */
  8557. +
  8558. +static t_Error TgecConfigSkipFman11Workaround(t_Handle h_Tgec)
  8559. +{
  8560. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8561. +
  8562. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8563. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8564. +
  8565. + p_Tgec->p_TgecDriverParam->skip_fman11_workaround = TRUE;
  8566. +
  8567. + return E_OK;
  8568. +}
  8569. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  8570. +
  8571. +
  8572. +/*****************************************************************************/
  8573. +/* Tgec Run Time API functions */
  8574. +/*****************************************************************************/
  8575. +
  8576. +/* ......................................................................... */
  8577. +/* backward compatibility. will be removed in the future. */
  8578. +static t_Error TgecTxMacPause(t_Handle h_Tgec, uint16_t pauseTime)
  8579. +{
  8580. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8581. +
  8582. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_STATE);
  8583. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8584. + fman_tgec_set_tx_pause_frames(p_Tgec->p_MemMap, pauseTime);
  8585. +
  8586. +
  8587. + return E_OK;
  8588. +}
  8589. +
  8590. +/* ......................................................................... */
  8591. +
  8592. +static t_Error TgecSetTxPauseFrames(t_Handle h_Tgec,
  8593. + uint8_t priority,
  8594. + uint16_t pauseTime,
  8595. + uint16_t threshTime)
  8596. +{
  8597. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8598. +
  8599. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_STATE);
  8600. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8601. +
  8602. + UNUSED(priority); UNUSED(threshTime);
  8603. +
  8604. + fman_tgec_set_tx_pause_frames(p_Tgec->p_MemMap, pauseTime);
  8605. +
  8606. + return E_OK;
  8607. +}
  8608. +
  8609. +/* ......................................................................... */
  8610. +
  8611. +static t_Error TgecRxIgnoreMacPause(t_Handle h_Tgec, bool en)
  8612. +{
  8613. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8614. +
  8615. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_STATE);
  8616. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8617. +
  8618. + fman_tgec_set_rx_ignore_pause_frames(p_Tgec->p_MemMap, en);
  8619. +
  8620. + return E_OK;
  8621. +}
  8622. +
  8623. +/* ......................................................................... */
  8624. +
  8625. +static t_Error TgecGetStatistics(t_Handle h_Tgec, t_FmMacStatistics *p_Statistics)
  8626. +{
  8627. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8628. + struct tgec_regs *p_TgecMemMap;
  8629. +
  8630. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
  8631. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8632. + SANITY_CHECK_RETURN_ERROR(p_Statistics, E_NULL_POINTER);
  8633. +
  8634. + p_TgecMemMap = p_Tgec->p_MemMap;
  8635. +
  8636. + p_Statistics->eStatPkts64 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R64);
  8637. + p_Statistics->eStatPkts65to127 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R127);
  8638. + p_Statistics->eStatPkts128to255 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R255);
  8639. + p_Statistics->eStatPkts256to511 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R511);
  8640. + p_Statistics->eStatPkts512to1023 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1023);
  8641. + p_Statistics->eStatPkts1024to1518 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1518);
  8642. + p_Statistics->eStatPkts1519to1522 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1519X);
  8643. +/* */
  8644. + p_Statistics->eStatFragments = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TRFRG);
  8645. + p_Statistics->eStatJabbers = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TRJBR);
  8646. +
  8647. + p_Statistics->eStatsDropEvents = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RDRP);
  8648. + p_Statistics->eStatCRCAlignErrors = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RALN);
  8649. +
  8650. + p_Statistics->eStatUndersizePkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TRUND);
  8651. + p_Statistics->eStatOversizePkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TROVR);
  8652. +/* Pause */
  8653. + p_Statistics->reStatPause = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RXPF);
  8654. + p_Statistics->teStatPause = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TXPF);
  8655. +
  8656. +/* MIB II */
  8657. + p_Statistics->ifInOctets = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_ROCT);
  8658. + p_Statistics->ifInUcastPkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RUCA);
  8659. + p_Statistics->ifInMcastPkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RMCA);
  8660. + p_Statistics->ifInBcastPkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RBCA);
  8661. + p_Statistics->ifInPkts = p_Statistics->ifInUcastPkts
  8662. + + p_Statistics->ifInMcastPkts
  8663. + + p_Statistics->ifInBcastPkts;
  8664. + p_Statistics->ifInDiscards = 0;
  8665. + p_Statistics->ifInErrors = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_RERR);
  8666. +
  8667. + p_Statistics->ifOutOctets = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TOCT);
  8668. + p_Statistics->ifOutUcastPkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TUCA);
  8669. + p_Statistics->ifOutMcastPkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TMCA);
  8670. + p_Statistics->ifOutBcastPkts = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TBCA);
  8671. + p_Statistics->ifOutPkts = p_Statistics->ifOutUcastPkts
  8672. + + p_Statistics->ifOutMcastPkts
  8673. + + p_Statistics->ifOutBcastPkts;
  8674. + p_Statistics->ifOutDiscards = 0;
  8675. + p_Statistics->ifOutErrors = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_TERR);
  8676. +
  8677. + return E_OK;
  8678. +}
  8679. +
  8680. +/* ......................................................................... */
  8681. +
  8682. +static t_Error TgecEnable1588TimeStamp(t_Handle h_Tgec)
  8683. +{
  8684. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8685. +
  8686. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8687. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8688. +
  8689. + fman_tgec_enable_1588_time_stamp(p_Tgec->p_MemMap, 1);
  8690. +
  8691. + return E_OK;
  8692. +}
  8693. +
  8694. +/* ......................................................................... */
  8695. +
  8696. +static t_Error TgecDisable1588TimeStamp(t_Handle h_Tgec)
  8697. +{
  8698. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8699. +
  8700. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8701. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8702. +
  8703. + fman_tgec_enable_1588_time_stamp(p_Tgec->p_MemMap, 0);
  8704. +
  8705. + return E_OK;
  8706. +}
  8707. +
  8708. +/* ......................................................................... */
  8709. +
  8710. +static t_Error TgecModifyMacAddress (t_Handle h_Tgec, t_EnetAddr *p_EnetAddr)
  8711. +{
  8712. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8713. +
  8714. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
  8715. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8716. +
  8717. + p_Tgec->addr = ENET_ADDR_TO_UINT64(*p_EnetAddr);
  8718. + fman_tgec_set_mac_address(p_Tgec->p_MemMap, (uint8_t *)(*p_EnetAddr));
  8719. +
  8720. + return E_OK;
  8721. +}
  8722. +
  8723. +/* ......................................................................... */
  8724. +
  8725. +static t_Error TgecResetCounters (t_Handle h_Tgec)
  8726. +{
  8727. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8728. +
  8729. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8730. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8731. +
  8732. + fman_tgec_reset_stat(p_Tgec->p_MemMap);
  8733. +
  8734. + return E_OK;
  8735. +}
  8736. +
  8737. +/* ......................................................................... */
  8738. +
  8739. +static t_Error TgecAddExactMatchMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
  8740. +{
  8741. + t_Tgec *p_Tgec = (t_Tgec *) h_Tgec;
  8742. + uint64_t ethAddr;
  8743. + uint8_t paddrNum;
  8744. +
  8745. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8746. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8747. +
  8748. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  8749. +
  8750. + if (ethAddr & GROUP_ADDRESS)
  8751. + /* Multicast address has no effect in PADDR */
  8752. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Multicast address"));
  8753. +
  8754. + /* Make sure no PADDR contains this address */
  8755. + for (paddrNum = 0; paddrNum < TGEC_NUM_OF_PADDRS; paddrNum++)
  8756. + if (p_Tgec->indAddrRegUsed[paddrNum])
  8757. + if (p_Tgec->paddr[paddrNum] == ethAddr)
  8758. + RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
  8759. +
  8760. + /* Find first unused PADDR */
  8761. + for (paddrNum = 0; paddrNum < TGEC_NUM_OF_PADDRS; paddrNum++)
  8762. + {
  8763. + if (!(p_Tgec->indAddrRegUsed[paddrNum]))
  8764. + {
  8765. + /* mark this PADDR as used */
  8766. + p_Tgec->indAddrRegUsed[paddrNum] = TRUE;
  8767. + /* store address */
  8768. + p_Tgec->paddr[paddrNum] = ethAddr;
  8769. +
  8770. + /* put in hardware */
  8771. + fman_tgec_add_addr_in_paddr(p_Tgec->p_MemMap, (uint8_t*)(*p_EthAddr)/* , paddrNum */);
  8772. + p_Tgec->numOfIndAddrInRegs++;
  8773. +
  8774. + return E_OK;
  8775. + }
  8776. + }
  8777. +
  8778. + /* No free PADDR */
  8779. + RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
  8780. +}
  8781. +
  8782. +/* ......................................................................... */
  8783. +
  8784. +static t_Error TgecDelExactMatchMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
  8785. +{
  8786. + t_Tgec *p_Tgec = (t_Tgec *) h_Tgec;
  8787. + uint64_t ethAddr;
  8788. + uint8_t paddrNum;
  8789. +
  8790. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8791. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8792. +
  8793. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  8794. +
  8795. + /* Find used PADDR containing this address */
  8796. + for (paddrNum = 0; paddrNum < TGEC_NUM_OF_PADDRS; paddrNum++)
  8797. + {
  8798. + if ((p_Tgec->indAddrRegUsed[paddrNum]) &&
  8799. + (p_Tgec->paddr[paddrNum] == ethAddr))
  8800. + {
  8801. + /* mark this PADDR as not used */
  8802. + p_Tgec->indAddrRegUsed[paddrNum] = FALSE;
  8803. + /* clear in hardware */
  8804. + fman_tgec_clear_addr_in_paddr(p_Tgec->p_MemMap /*, paddrNum */);
  8805. + p_Tgec->numOfIndAddrInRegs--;
  8806. +
  8807. + return E_OK;
  8808. + }
  8809. + }
  8810. +
  8811. + RETURN_ERROR(MAJOR, E_NOT_FOUND, NO_MSG);
  8812. +}
  8813. +
  8814. +/* ......................................................................... */
  8815. +
  8816. +static t_Error TgecAddHashMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
  8817. +{
  8818. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8819. + t_EthHashEntry *p_HashEntry;
  8820. + uint32_t crc;
  8821. + uint32_t hash;
  8822. + uint64_t ethAddr;
  8823. +
  8824. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
  8825. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8826. +
  8827. + ethAddr = ENET_ADDR_TO_UINT64(*p_EthAddr);
  8828. +
  8829. + if (!(ethAddr & GROUP_ADDRESS))
  8830. + /* Unicast addresses not supported in hash */
  8831. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unicast Address"));
  8832. +
  8833. + /* CRC calculation */
  8834. + crc = GetMacAddrHashCode(ethAddr);
  8835. +
  8836. + hash = (crc >> TGEC_HASH_MCAST_SHIFT) & TGEC_HASH_ADR_MSK; /* Take 9 MSB bits */
  8837. +
  8838. + /* Create element to be added to the driver hash table */
  8839. + p_HashEntry = (t_EthHashEntry *)XX_Malloc(sizeof(t_EthHashEntry));
  8840. + p_HashEntry->addr = ethAddr;
  8841. + INIT_LIST(&p_HashEntry->node);
  8842. +
  8843. + LIST_AddToTail(&(p_HashEntry->node), &(p_Tgec->p_MulticastAddrHash->p_Lsts[hash]));
  8844. + fman_tgec_set_hash_table(p_Tgec->p_MemMap, (hash | TGEC_HASH_MCAST_EN));
  8845. +
  8846. + return E_OK;
  8847. +}
  8848. +
  8849. +/* ......................................................................... */
  8850. +
  8851. +static t_Error TgecDelHashMacAddress(t_Handle h_Tgec, t_EnetAddr *p_EthAddr)
  8852. +{
  8853. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8854. + t_EthHashEntry *p_HashEntry = NULL;
  8855. + t_List *p_Pos;
  8856. + uint32_t crc;
  8857. + uint32_t hash;
  8858. + uint64_t ethAddr;
  8859. +
  8860. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
  8861. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8862. +
  8863. + ethAddr = ((*(uint64_t *)p_EthAddr) >> 16);
  8864. +
  8865. + /* CRC calculation */
  8866. + crc = GetMacAddrHashCode(ethAddr);
  8867. +
  8868. + hash = (crc >> TGEC_HASH_MCAST_SHIFT) & TGEC_HASH_ADR_MSK; /* Take 9 MSB bits */
  8869. +
  8870. + LIST_FOR_EACH(p_Pos, &(p_Tgec->p_MulticastAddrHash->p_Lsts[hash]))
  8871. + {
  8872. + p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
  8873. + if (p_HashEntry->addr == ethAddr)
  8874. + {
  8875. + LIST_DelAndInit(&p_HashEntry->node);
  8876. + XX_Free(p_HashEntry);
  8877. + break;
  8878. + }
  8879. + }
  8880. + if (LIST_IsEmpty(&p_Tgec->p_MulticastAddrHash->p_Lsts[hash]))
  8881. + fman_tgec_set_hash_table(p_Tgec->p_MemMap, (hash & ~TGEC_HASH_MCAST_EN));
  8882. +
  8883. + return E_OK;
  8884. +}
  8885. +
  8886. +/* ......................................................................... */
  8887. +
  8888. +static t_Error TgecGetId(t_Handle h_Tgec, uint32_t *macId)
  8889. +{
  8890. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8891. +
  8892. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8893. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8894. +
  8895. + UNUSED(p_Tgec);
  8896. + UNUSED(macId);
  8897. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("TgecGetId Not Supported"));
  8898. +}
  8899. +
  8900. +/* ......................................................................... */
  8901. +
  8902. +static t_Error TgecGetVersion(t_Handle h_Tgec, uint32_t *macVersion)
  8903. +{
  8904. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8905. +
  8906. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8907. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8908. +
  8909. + *macVersion = fman_tgec_get_revision(p_Tgec->p_MemMap);
  8910. +
  8911. + return E_OK;
  8912. +}
  8913. +
  8914. +/* ......................................................................... */
  8915. +
  8916. +static t_Error TgecSetExcpetion(t_Handle h_Tgec, e_FmMacExceptions exception, bool enable)
  8917. +{
  8918. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8919. + uint32_t bitMask = 0;
  8920. +
  8921. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8922. + SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  8923. +
  8924. + GET_EXCEPTION_FLAG(bitMask, exception);
  8925. + if (bitMask)
  8926. + {
  8927. + if (enable)
  8928. + p_Tgec->exceptions |= bitMask;
  8929. + else
  8930. + p_Tgec->exceptions &= ~bitMask;
  8931. + }
  8932. + else
  8933. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  8934. +
  8935. + if (enable)
  8936. + fman_tgec_enable_interrupt(p_Tgec->p_MemMap, bitMask);
  8937. + else
  8938. + fman_tgec_disable_interrupt(p_Tgec->p_MemMap, bitMask);
  8939. +
  8940. + return E_OK;
  8941. +}
  8942. +
  8943. +/* ......................................................................... */
  8944. +
  8945. +static uint16_t TgecGetMaxFrameLength(t_Handle h_Tgec)
  8946. +{
  8947. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8948. +
  8949. + SANITY_CHECK_RETURN_VALUE(p_Tgec, E_INVALID_HANDLE, 0);
  8950. + SANITY_CHECK_RETURN_VALUE(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE, 0);
  8951. +
  8952. + return fman_tgec_get_max_frame_len(p_Tgec->p_MemMap);
  8953. +}
  8954. +
  8955. +/* ......................................................................... */
  8956. +
  8957. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  8958. +static t_Error TgecTxEccWorkaround(t_Tgec *p_Tgec)
  8959. +{
  8960. + t_Error err;
  8961. +
  8962. +#if defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)
  8963. + XX_Print("Applying 10G TX ECC workaround (10GMAC-A004) ... ");
  8964. +#endif /* (DEBUG_ERRORS > 0) */
  8965. + /* enable and set promiscuous */
  8966. + fman_tgec_enable(p_Tgec->p_MemMap, TRUE, TRUE);
  8967. + fman_tgec_set_promiscuous(p_Tgec->p_MemMap, TRUE);
  8968. + err = Fm10GTxEccWorkaround(p_Tgec->fmMacControllerDriver.h_Fm, p_Tgec->macId);
  8969. + /* disable */
  8970. + fman_tgec_set_promiscuous(p_Tgec->p_MemMap, FALSE);
  8971. + fman_tgec_enable(p_Tgec->p_MemMap, FALSE, FALSE);
  8972. + fman_tgec_reset_stat(p_Tgec->p_MemMap);
  8973. + fman_tgec_ack_event(p_Tgec->p_MemMap, 0xffffffff);
  8974. +#if defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)
  8975. + if (err)
  8976. + XX_Print("FAILED!\n");
  8977. + else
  8978. + XX_Print("done.\n");
  8979. +#endif /* (DEBUG_ERRORS > 0) */
  8980. +
  8981. + return err;
  8982. +}
  8983. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  8984. +
  8985. +/*****************************************************************************/
  8986. +/* FM Init & Free API */
  8987. +/*****************************************************************************/
  8988. +
  8989. +/* ......................................................................... */
  8990. +
  8991. +static t_Error TgecInit(t_Handle h_Tgec)
  8992. +{
  8993. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  8994. + struct tgec_cfg *p_TgecDriverParam;
  8995. + t_EnetAddr ethAddr;
  8996. + t_Error err;
  8997. +
  8998. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  8999. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
  9000. + SANITY_CHECK_RETURN_ERROR(p_Tgec->fmMacControllerDriver.h_Fm, E_INVALID_HANDLE);
  9001. +
  9002. + FM_GetRevision(p_Tgec->fmMacControllerDriver.h_Fm, &p_Tgec->fmMacControllerDriver.fmRevInfo);
  9003. + CHECK_INIT_PARAMETERS(p_Tgec, CheckInitParameters);
  9004. +
  9005. + p_TgecDriverParam = p_Tgec->p_TgecDriverParam;
  9006. +
  9007. + MAKE_ENET_ADDR_FROM_UINT64(p_Tgec->addr, ethAddr);
  9008. + fman_tgec_set_mac_address(p_Tgec->p_MemMap, (uint8_t *)ethAddr);
  9009. +
  9010. + /* interrupts */
  9011. +#ifdef FM_10G_REM_N_LCL_FLT_EX_10GMAC_ERRATA_SW005
  9012. + {
  9013. + if (p_Tgec->fmMacControllerDriver.fmRevInfo.majorRev <=2)
  9014. + p_Tgec->exceptions &= ~(TGEC_IMASK_REM_FAULT | TGEC_IMASK_LOC_FAULT);
  9015. + }
  9016. +#endif /* FM_10G_REM_N_LCL_FLT_EX_10GMAC_ERRATA_SW005 */
  9017. +
  9018. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  9019. + if (!p_Tgec->p_TgecDriverParam->skip_fman11_workaround &&
  9020. + ((err = TgecTxEccWorkaround(p_Tgec)) != E_OK))
  9021. + {
  9022. + FreeInitResources(p_Tgec);
  9023. + REPORT_ERROR(MINOR, err, ("TgecTxEccWorkaround FAILED"));
  9024. + }
  9025. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  9026. +
  9027. + err = fman_tgec_init(p_Tgec->p_MemMap, p_TgecDriverParam, p_Tgec->exceptions);
  9028. + if (err)
  9029. + {
  9030. + FreeInitResources(p_Tgec);
  9031. + RETURN_ERROR(MAJOR, err, ("This TGEC version does not support the required i/f mode"));
  9032. + }
  9033. +
  9034. + /* Max Frame Length */
  9035. + err = FmSetMacMaxFrame(p_Tgec->fmMacControllerDriver.h_Fm,
  9036. + e_FM_MAC_10G,
  9037. + p_Tgec->fmMacControllerDriver.macId,
  9038. + p_TgecDriverParam->max_frame_length);
  9039. + if (err != E_OK)
  9040. + {
  9041. + FreeInitResources(p_Tgec);
  9042. + RETURN_ERROR(MINOR, err, NO_MSG);
  9043. + }
  9044. +/* we consider having no IPC a non crasher... */
  9045. +
  9046. +#ifdef FM_TX_FIFO_CORRUPTION_ERRATA_10GMAC_A007
  9047. + if (p_Tgec->fmMacControllerDriver.fmRevInfo.majorRev == 2)
  9048. + fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(p_Tgec->p_MemMap);
  9049. +#endif /* FM_TX_FIFO_CORRUPTION_ERRATA_10GMAC_A007 */
  9050. +
  9051. + p_Tgec->p_MulticastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
  9052. + if (!p_Tgec->p_MulticastAddrHash)
  9053. + {
  9054. + FreeInitResources(p_Tgec);
  9055. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
  9056. + }
  9057. +
  9058. + p_Tgec->p_UnicastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
  9059. + if (!p_Tgec->p_UnicastAddrHash)
  9060. + {
  9061. + FreeInitResources(p_Tgec);
  9062. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("allocation hash table is FAILED"));
  9063. + }
  9064. +
  9065. + FmRegisterIntr(p_Tgec->fmMacControllerDriver.h_Fm,
  9066. + e_FM_MOD_10G_MAC,
  9067. + p_Tgec->macId,
  9068. + e_FM_INTR_TYPE_ERR,
  9069. + TgecErrException,
  9070. + p_Tgec);
  9071. + if (p_Tgec->mdioIrq != NO_IRQ)
  9072. + {
  9073. + XX_SetIntr(p_Tgec->mdioIrq, TgecException, p_Tgec);
  9074. + XX_EnableIntr(p_Tgec->mdioIrq);
  9075. + }
  9076. +
  9077. + XX_Free(p_TgecDriverParam);
  9078. + p_Tgec->p_TgecDriverParam = NULL;
  9079. +
  9080. + return E_OK;
  9081. +}
  9082. +
  9083. +/* ......................................................................... */
  9084. +
  9085. +static t_Error TgecFree(t_Handle h_Tgec)
  9086. +{
  9087. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  9088. +
  9089. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  9090. +
  9091. + if (p_Tgec->p_TgecDriverParam)
  9092. + {
  9093. + /* Called after config */
  9094. + XX_Free(p_Tgec->p_TgecDriverParam);
  9095. + p_Tgec->p_TgecDriverParam = NULL;
  9096. + }
  9097. + else
  9098. + /* Called after init */
  9099. + FreeInitResources(p_Tgec);
  9100. +
  9101. + XX_Free(p_Tgec);
  9102. +
  9103. + return E_OK;
  9104. +}
  9105. +
  9106. +/* ......................................................................... */
  9107. +
  9108. +static void InitFmMacControllerDriver(t_FmMacControllerDriver *p_FmMacControllerDriver)
  9109. +{
  9110. + p_FmMacControllerDriver->f_FM_MAC_Init = TgecInit;
  9111. + p_FmMacControllerDriver->f_FM_MAC_Free = TgecFree;
  9112. +
  9113. + p_FmMacControllerDriver->f_FM_MAC_SetStatistics = NULL;
  9114. + p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback = TgecConfigLoopback;
  9115. + p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength = TgecConfigMaxFrameLength;
  9116. +
  9117. + p_FmMacControllerDriver->f_FM_MAC_ConfigWan = TgecConfigWan;
  9118. +
  9119. + p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc = NULL; /* TGEC always works with pad+crc */
  9120. + p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex = NULL; /* half-duplex is not supported in xgec */
  9121. + p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck = TgecConfigLengthCheck;
  9122. + p_FmMacControllerDriver->f_FM_MAC_ConfigException = TgecConfigException;
  9123. + p_FmMacControllerDriver->f_FM_MAC_ConfigResetOnInit = NULL;
  9124. +
  9125. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  9126. + p_FmMacControllerDriver->f_FM_MAC_ConfigSkipFman11Workaround= TgecConfigSkipFman11Workaround;
  9127. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  9128. +
  9129. + p_FmMacControllerDriver->f_FM_MAC_SetException = TgecSetExcpetion;
  9130. +
  9131. + p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp = TgecEnable1588TimeStamp;
  9132. + p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp = TgecDisable1588TimeStamp;
  9133. +
  9134. + p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous = TgecSetPromiscuous;
  9135. + p_FmMacControllerDriver->f_FM_MAC_AdjustLink = NULL;
  9136. + p_FmMacControllerDriver->f_FM_MAC_SetWakeOnLan = NULL;
  9137. + p_FmMacControllerDriver->f_FM_MAC_RestartAutoneg = NULL;
  9138. +
  9139. + p_FmMacControllerDriver->f_FM_MAC_Enable = TgecEnable;
  9140. + p_FmMacControllerDriver->f_FM_MAC_Disable = TgecDisable;
  9141. +
  9142. + p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames = TgecTxMacPause;
  9143. + p_FmMacControllerDriver->f_FM_MAC_SetTxPauseFrames = TgecSetTxPauseFrames;
  9144. + p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames = TgecRxIgnoreMacPause;
  9145. +
  9146. + p_FmMacControllerDriver->f_FM_MAC_ResetCounters = TgecResetCounters;
  9147. + p_FmMacControllerDriver->f_FM_MAC_GetStatistics = TgecGetStatistics;
  9148. +
  9149. + p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr = TgecModifyMacAddress;
  9150. + p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr = TgecAddHashMacAddress;
  9151. + p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr = TgecDelHashMacAddress;
  9152. + p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr = TgecAddExactMatchMacAddress;
  9153. + p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr = TgecDelExactMatchMacAddress;
  9154. + p_FmMacControllerDriver->f_FM_MAC_GetId = TgecGetId;
  9155. + p_FmMacControllerDriver->f_FM_MAC_GetVersion = TgecGetVersion;
  9156. + p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength = TgecGetMaxFrameLength;
  9157. +
  9158. + p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg = TGEC_MII_WritePhyReg;
  9159. + p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg = TGEC_MII_ReadPhyReg;
  9160. +}
  9161. +
  9162. +
  9163. +/*****************************************************************************/
  9164. +/* Tgec Config Main Entry */
  9165. +/*****************************************************************************/
  9166. +
  9167. +/* ......................................................................... */
  9168. +
  9169. +t_Handle TGEC_Config(t_FmMacParams *p_FmMacParam)
  9170. +{
  9171. + t_Tgec *p_Tgec;
  9172. + struct tgec_cfg *p_TgecDriverParam;
  9173. + uintptr_t baseAddr;
  9174. +
  9175. + SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_NULL_POINTER, NULL);
  9176. +
  9177. + baseAddr = p_FmMacParam->baseAddr;
  9178. + /* allocate memory for the UCC GETH data structure. */
  9179. + p_Tgec = (t_Tgec *)XX_Malloc(sizeof(t_Tgec));
  9180. + if (!p_Tgec)
  9181. + {
  9182. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("10G MAC driver structure"));
  9183. + return NULL;
  9184. + }
  9185. + memset(p_Tgec, 0, sizeof(t_Tgec));
  9186. + InitFmMacControllerDriver(&p_Tgec->fmMacControllerDriver);
  9187. +
  9188. + /* allocate memory for the 10G MAC driver parameters data structure. */
  9189. + p_TgecDriverParam = (struct tgec_cfg *) XX_Malloc(sizeof(struct tgec_cfg));
  9190. + if (!p_TgecDriverParam)
  9191. + {
  9192. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("10G MAC driver parameters"));
  9193. + XX_Free(p_Tgec);
  9194. + return NULL;
  9195. + }
  9196. + memset(p_TgecDriverParam, 0, sizeof(struct tgec_cfg));
  9197. +
  9198. + /* Plant parameter structure pointer */
  9199. + p_Tgec->p_TgecDriverParam = p_TgecDriverParam;
  9200. +
  9201. + fman_tgec_defconfig(p_TgecDriverParam);
  9202. +
  9203. + p_Tgec->p_MemMap = (struct tgec_regs *)UINT_TO_PTR(baseAddr);
  9204. + p_Tgec->p_MiiMemMap = (t_TgecMiiAccessMemMap *)UINT_TO_PTR(baseAddr + TGEC_TO_MII_OFFSET);
  9205. + p_Tgec->addr = ENET_ADDR_TO_UINT64(p_FmMacParam->addr);
  9206. + p_Tgec->enetMode = p_FmMacParam->enetMode;
  9207. + p_Tgec->macId = p_FmMacParam->macId;
  9208. + p_Tgec->exceptions = DEFAULT_exceptions;
  9209. + p_Tgec->mdioIrq = p_FmMacParam->mdioIrq;
  9210. + p_Tgec->f_Exception = p_FmMacParam->f_Exception;
  9211. + p_Tgec->f_Event = p_FmMacParam->f_Event;
  9212. + p_Tgec->h_App = p_FmMacParam->h_App;
  9213. +
  9214. + return p_Tgec;
  9215. +}
  9216. --- /dev/null
  9217. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.h
  9218. @@ -0,0 +1,151 @@
  9219. +/*
  9220. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  9221. + *
  9222. + * Redistribution and use in source and binary forms, with or without
  9223. + * modification, are permitted provided that the following conditions are met:
  9224. + * * Redistributions of source code must retain the above copyright
  9225. + * notice, this list of conditions and the following disclaimer.
  9226. + * * Redistributions in binary form must reproduce the above copyright
  9227. + * notice, this list of conditions and the following disclaimer in the
  9228. + * documentation and/or other materials provided with the distribution.
  9229. + * * Neither the name of Freescale Semiconductor nor the
  9230. + * names of its contributors may be used to endorse or promote products
  9231. + * derived from this software without specific prior written permission.
  9232. + *
  9233. + *
  9234. + * ALTERNATIVELY, this software may be distributed under the terms of the
  9235. + * GNU General Public License ("GPL") as published by the Free Software
  9236. + * Foundation, either version 2 of that License or (at your option) any
  9237. + * later version.
  9238. + *
  9239. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  9240. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  9241. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  9242. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  9243. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  9244. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  9245. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  9246. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  9247. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  9248. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  9249. + */
  9250. +
  9251. +
  9252. +/******************************************************************************
  9253. + @File tgec.h
  9254. +
  9255. + @Description FM 10G MAC ...
  9256. +*//***************************************************************************/
  9257. +#ifndef __TGEC_H
  9258. +#define __TGEC_H
  9259. +
  9260. +#include "std_ext.h"
  9261. +#include "error_ext.h"
  9262. +#include "list_ext.h"
  9263. +#include "enet_ext.h"
  9264. +
  9265. +#include "tgec_mii_acc.h"
  9266. +#include "fm_mac.h"
  9267. +
  9268. +
  9269. +#define DEFAULT_exceptions \
  9270. + ((uint32_t)(TGEC_IMASK_MDIO_SCAN_EVENT | \
  9271. + TGEC_IMASK_REM_FAULT | \
  9272. + TGEC_IMASK_LOC_FAULT | \
  9273. + TGEC_IMASK_TX_ECC_ER | \
  9274. + TGEC_IMASK_TX_FIFO_UNFL | \
  9275. + TGEC_IMASK_TX_FIFO_OVFL | \
  9276. + TGEC_IMASK_TX_ER | \
  9277. + TGEC_IMASK_RX_FIFO_OVFL | \
  9278. + TGEC_IMASK_RX_ECC_ER | \
  9279. + TGEC_IMASK_RX_JAB_FRM | \
  9280. + TGEC_IMASK_RX_OVRSZ_FRM | \
  9281. + TGEC_IMASK_RX_RUNT_FRM | \
  9282. + TGEC_IMASK_RX_FRAG_FRM | \
  9283. + TGEC_IMASK_RX_CRC_ER | \
  9284. + TGEC_IMASK_RX_ALIGN_ER))
  9285. +
  9286. +#define GET_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \
  9287. + case e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO: \
  9288. + bitMask = TGEC_IMASK_MDIO_SCAN_EVENT ; break; \
  9289. + case e_FM_MAC_EX_10G_MDIO_CMD_CMPL: \
  9290. + bitMask = TGEC_IMASK_MDIO_CMD_CMPL ; break; \
  9291. + case e_FM_MAC_EX_10G_REM_FAULT: \
  9292. + bitMask = TGEC_IMASK_REM_FAULT ; break; \
  9293. + case e_FM_MAC_EX_10G_LOC_FAULT: \
  9294. + bitMask = TGEC_IMASK_LOC_FAULT ; break; \
  9295. + case e_FM_MAC_EX_10G_1TX_ECC_ER: \
  9296. + bitMask = TGEC_IMASK_TX_ECC_ER ; break; \
  9297. + case e_FM_MAC_EX_10G_TX_FIFO_UNFL: \
  9298. + bitMask = TGEC_IMASK_TX_FIFO_UNFL ; break; \
  9299. + case e_FM_MAC_EX_10G_TX_FIFO_OVFL: \
  9300. + bitMask = TGEC_IMASK_TX_FIFO_OVFL ; break; \
  9301. + case e_FM_MAC_EX_10G_TX_ER: \
  9302. + bitMask = TGEC_IMASK_TX_ER ; break; \
  9303. + case e_FM_MAC_EX_10G_RX_FIFO_OVFL: \
  9304. + bitMask = TGEC_IMASK_RX_FIFO_OVFL ; break; \
  9305. + case e_FM_MAC_EX_10G_RX_ECC_ER: \
  9306. + bitMask = TGEC_IMASK_RX_ECC_ER ; break; \
  9307. + case e_FM_MAC_EX_10G_RX_JAB_FRM: \
  9308. + bitMask = TGEC_IMASK_RX_JAB_FRM ; break; \
  9309. + case e_FM_MAC_EX_10G_RX_OVRSZ_FRM: \
  9310. + bitMask = TGEC_IMASK_RX_OVRSZ_FRM ; break; \
  9311. + case e_FM_MAC_EX_10G_RX_RUNT_FRM: \
  9312. + bitMask = TGEC_IMASK_RX_RUNT_FRM ; break; \
  9313. + case e_FM_MAC_EX_10G_RX_FRAG_FRM: \
  9314. + bitMask = TGEC_IMASK_RX_FRAG_FRM ; break; \
  9315. + case e_FM_MAC_EX_10G_RX_LEN_ER: \
  9316. + bitMask = TGEC_IMASK_RX_LEN_ER ; break; \
  9317. + case e_FM_MAC_EX_10G_RX_CRC_ER: \
  9318. + bitMask = TGEC_IMASK_RX_CRC_ER ; break; \
  9319. + case e_FM_MAC_EX_10G_RX_ALIGN_ER: \
  9320. + bitMask = TGEC_IMASK_RX_ALIGN_ER ; break; \
  9321. + default: bitMask = 0;break;}
  9322. +
  9323. +#define MAX_PACKET_ALIGNMENT 31
  9324. +#define MAX_INTER_PACKET_GAP 0x7f
  9325. +#define MAX_INTER_PALTERNATE_BEB 0x0f
  9326. +#define MAX_RETRANSMISSION 0x0f
  9327. +#define MAX_COLLISION_WINDOW 0x03ff
  9328. +
  9329. +#define TGEC_NUM_OF_PADDRS 1 /* number of pattern match registers (entries) */
  9330. +
  9331. +#define GROUP_ADDRESS 0x0000010000000000LL /* Group address bit indication */
  9332. +
  9333. +#define HASH_TABLE_SIZE 512 /* Hash table size (= 32 bits * 8 regs) */
  9334. +
  9335. +#define TGEC_TO_MII_OFFSET 0x1030 /* Offset from the MEM map to the MDIO mem map */
  9336. +
  9337. +/* 10-gigabit Ethernet MAC Controller ID (10GEC_ID) */
  9338. +#define TGEC_ID_ID 0xffff0000
  9339. +#define TGEC_ID_MAC_VERSION 0x0000FF00
  9340. +#define TGEC_ID_MAC_REV 0x000000ff
  9341. +
  9342. +
  9343. +typedef struct {
  9344. + t_FmMacControllerDriver fmMacControllerDriver; /**< Upper Mac control block */
  9345. + t_Handle h_App; /**< Handle to the upper layer application */
  9346. + struct tgec_regs *p_MemMap; /**< pointer to 10G memory mapped registers. */
  9347. + t_TgecMiiAccessMemMap *p_MiiMemMap; /**< pointer to MII memory mapped registers. */
  9348. + uint64_t addr; /**< MAC address of device; */
  9349. + e_EnetMode enetMode; /**< Ethernet physical interface */
  9350. + t_FmMacExceptionCallback *f_Exception;
  9351. + int mdioIrq;
  9352. + t_FmMacExceptionCallback *f_Event;
  9353. + bool indAddrRegUsed[TGEC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
  9354. + uint64_t paddr[TGEC_NUM_OF_PADDRS]; /**< MAC address for particular individual address recognition register */
  9355. + uint8_t numOfIndAddrInRegs; /**< Number of individual addresses in registers for this station. */
  9356. + t_EthHash *p_MulticastAddrHash; /**< pointer to driver's global address hash table */
  9357. + t_EthHash *p_UnicastAddrHash; /**< pointer to driver's individual address hash table */
  9358. + bool debugMode;
  9359. + uint8_t macId;
  9360. + uint32_t exceptions;
  9361. + struct tgec_cfg *p_TgecDriverParam;
  9362. +} t_Tgec;
  9363. +
  9364. +
  9365. +t_Error TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data);
  9366. +t_Error TGEC_MII_ReadPhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
  9367. +
  9368. +
  9369. +#endif /* __TGEC_H */
  9370. --- /dev/null
  9371. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.c
  9372. @@ -0,0 +1,139 @@
  9373. +/*
  9374. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  9375. + *
  9376. + * Redistribution and use in source and binary forms, with or without
  9377. + * modification, are permitted provided that the following conditions are met:
  9378. + * * Redistributions of source code must retain the above copyright
  9379. + * notice, this list of conditions and the following disclaimer.
  9380. + * * Redistributions in binary form must reproduce the above copyright
  9381. + * notice, this list of conditions and the following disclaimer in the
  9382. + * documentation and/or other materials provided with the distribution.
  9383. + * * Neither the name of Freescale Semiconductor nor the
  9384. + * names of its contributors may be used to endorse or promote products
  9385. + * derived from this software without specific prior written permission.
  9386. + *
  9387. + *
  9388. + * ALTERNATIVELY, this software may be distributed under the terms of the
  9389. + * GNU General Public License ("GPL") as published by the Free Software
  9390. + * Foundation, either version 2 of that License or (at your option) any
  9391. + * later version.
  9392. + *
  9393. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  9394. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  9395. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  9396. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  9397. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  9398. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  9399. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  9400. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  9401. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  9402. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  9403. + */
  9404. +
  9405. +
  9406. +
  9407. +#include "error_ext.h"
  9408. +#include "std_ext.h"
  9409. +#include "fm_mac.h"
  9410. +#include "tgec.h"
  9411. +#include "xx_ext.h"
  9412. +
  9413. +#include "fm_common.h"
  9414. +
  9415. +
  9416. +/*****************************************************************************/
  9417. +t_Error TGEC_MII_WritePhyReg(t_Handle h_Tgec,
  9418. + uint8_t phyAddr,
  9419. + uint8_t reg,
  9420. + uint16_t data)
  9421. +{
  9422. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  9423. + t_TgecMiiAccessMemMap *p_MiiAccess;
  9424. + uint32_t cfgStatusReg;
  9425. +
  9426. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  9427. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_MiiMemMap, E_INVALID_HANDLE);
  9428. +
  9429. + p_MiiAccess = p_Tgec->p_MiiMemMap;
  9430. +
  9431. + /* Configure MII */
  9432. + cfgStatusReg = GET_UINT32(p_MiiAccess->mdio_cfg_status);
  9433. + cfgStatusReg &= ~MIIMCOM_DIV_MASK;
  9434. + /* (one half of fm clock => 2.5Mhz) */
  9435. + cfgStatusReg |=((((p_Tgec->fmMacControllerDriver.clkFreq*10)/2)/25) << MIIMCOM_DIV_SHIFT);
  9436. + WRITE_UINT32(p_MiiAccess->mdio_cfg_status, cfgStatusReg);
  9437. +
  9438. + while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
  9439. + XX_UDelay (1);
  9440. +
  9441. + WRITE_UINT32(p_MiiAccess->mdio_command, phyAddr);
  9442. +
  9443. + WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg);
  9444. +
  9445. + CORE_MemoryBarrier();
  9446. +
  9447. + while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
  9448. + XX_UDelay (1);
  9449. +
  9450. + WRITE_UINT32(p_MiiAccess->mdio_data, data);
  9451. +
  9452. + CORE_MemoryBarrier();
  9453. +
  9454. + while ((GET_UINT32(p_MiiAccess->mdio_data)) & MIIDATA_BUSY)
  9455. + XX_UDelay (1);
  9456. +
  9457. + return E_OK;
  9458. +}
  9459. +
  9460. +/*****************************************************************************/
  9461. +t_Error TGEC_MII_ReadPhyReg(t_Handle h_Tgec,
  9462. + uint8_t phyAddr,
  9463. + uint8_t reg,
  9464. + uint16_t *p_Data)
  9465. +{
  9466. + t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
  9467. + t_TgecMiiAccessMemMap *p_MiiAccess;
  9468. + uint32_t cfgStatusReg;
  9469. +
  9470. + SANITY_CHECK_RETURN_ERROR(p_Tgec, E_INVALID_HANDLE);
  9471. + SANITY_CHECK_RETURN_ERROR(p_Tgec->p_MiiMemMap, E_INVALID_HANDLE);
  9472. +
  9473. + p_MiiAccess = p_Tgec->p_MiiMemMap;
  9474. +
  9475. + /* Configure MII */
  9476. + cfgStatusReg = GET_UINT32(p_MiiAccess->mdio_cfg_status);
  9477. + cfgStatusReg &= ~MIIMCOM_DIV_MASK;
  9478. + /* (one half of fm clock => 2.5Mhz) */
  9479. + cfgStatusReg |=((((p_Tgec->fmMacControllerDriver.clkFreq*10)/2)/25) << MIIMCOM_DIV_SHIFT);
  9480. + WRITE_UINT32(p_MiiAccess->mdio_cfg_status, cfgStatusReg);
  9481. +
  9482. + while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
  9483. + XX_UDelay (1);
  9484. +
  9485. + WRITE_UINT32(p_MiiAccess->mdio_command, phyAddr);
  9486. +
  9487. + WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg);
  9488. +
  9489. + CORE_MemoryBarrier();
  9490. +
  9491. + while ((GET_UINT32(p_MiiAccess->mdio_cfg_status)) & MIIMIND_BUSY)
  9492. + XX_UDelay (1);
  9493. +
  9494. + WRITE_UINT32(p_MiiAccess->mdio_command, (uint32_t)(phyAddr | MIIMCOM_READ_CYCLE));
  9495. +
  9496. + CORE_MemoryBarrier();
  9497. +
  9498. + while ((GET_UINT32(p_MiiAccess->mdio_data)) & MIIDATA_BUSY)
  9499. + XX_UDelay (1);
  9500. +
  9501. + *p_Data = (uint16_t)GET_UINT32(p_MiiAccess->mdio_data);
  9502. +
  9503. + cfgStatusReg = GET_UINT32(p_MiiAccess->mdio_cfg_status);
  9504. +
  9505. + if (cfgStatusReg & MIIMIND_READ_ERROR)
  9506. + RETURN_ERROR(MINOR, E_INVALID_VALUE,
  9507. + ("Read Error: phyAddr 0x%x, dev 0x%x, reg 0x%x, cfgStatusReg 0x%x",
  9508. + ((phyAddr & 0xe0)>>5), (phyAddr & 0x1f), reg, cfgStatusReg));
  9509. +
  9510. + return E_OK;
  9511. +}
  9512. --- /dev/null
  9513. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.h
  9514. @@ -0,0 +1,80 @@
  9515. +/*
  9516. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  9517. + *
  9518. + * Redistribution and use in source and binary forms, with or without
  9519. + * modification, are permitted provided that the following conditions are met:
  9520. + * * Redistributions of source code must retain the above copyright
  9521. + * notice, this list of conditions and the following disclaimer.
  9522. + * * Redistributions in binary form must reproduce the above copyright
  9523. + * notice, this list of conditions and the following disclaimer in the
  9524. + * documentation and/or other materials provided with the distribution.
  9525. + * * Neither the name of Freescale Semiconductor nor the
  9526. + * names of its contributors may be used to endorse or promote products
  9527. + * derived from this software without specific prior written permission.
  9528. + *
  9529. + *
  9530. + * ALTERNATIVELY, this software may be distributed under the terms of the
  9531. + * GNU General Public License ("GPL") as published by the Free Software
  9532. + * Foundation, either version 2 of that License or (at your option) any
  9533. + * later version.
  9534. + *
  9535. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  9536. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  9537. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  9538. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  9539. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  9540. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  9541. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  9542. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  9543. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  9544. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  9545. + */
  9546. +
  9547. +
  9548. +#ifndef __TGEC_MII_ACC_H
  9549. +#define __TGEC_MII_ACC_H
  9550. +
  9551. +#include "std_ext.h"
  9552. +
  9553. +
  9554. +/* MII Management Command Register */
  9555. +#define MIIMCOM_READ_POST_INCREMENT 0x00004000
  9556. +#define MIIMCOM_READ_CYCLE 0x00008000
  9557. +#define MIIMCOM_SCAN_CYCLE 0x00000800
  9558. +#define MIIMCOM_PREAMBLE_DISABLE 0x00000400
  9559. +
  9560. +#define MIIMCOM_MDIO_HOLD_1_REG_CLK 0
  9561. +#define MIIMCOM_MDIO_HOLD_2_REG_CLK 1
  9562. +#define MIIMCOM_MDIO_HOLD_3_REG_CLK 2
  9563. +#define MIIMCOM_MDIO_HOLD_4_REG_CLK 3
  9564. +
  9565. +#define MIIMCOM_DIV_MASK 0x0000ff00
  9566. +#define MIIMCOM_DIV_SHIFT 8
  9567. +
  9568. +/* MII Management Indicator Register */
  9569. +#define MIIMIND_BUSY 0x00000001
  9570. +#define MIIMIND_READ_ERROR 0x00000002
  9571. +
  9572. +#define MIIDATA_BUSY 0x80000000
  9573. +
  9574. +#if defined(__MWERKS__) && !defined(__GNUC__)
  9575. +#pragma pack(push,1)
  9576. +#endif /* defined(__MWERKS__) && ... */
  9577. +
  9578. +/*----------------------------------------------------*/
  9579. +/* MII Configuration Control Memory Map Registers */
  9580. +/*----------------------------------------------------*/
  9581. +typedef _Packed struct t_TgecMiiAccessMemMap
  9582. +{
  9583. + volatile uint32_t mdio_cfg_status; /* 0x030 */
  9584. + volatile uint32_t mdio_command; /* 0x034 */
  9585. + volatile uint32_t mdio_data; /* 0x038 */
  9586. + volatile uint32_t mdio_regaddr; /* 0x03c */
  9587. +} _PackedType t_TgecMiiAccessMemMap ;
  9588. +
  9589. +#if defined(__MWERKS__) && !defined(__GNUC__)
  9590. +#pragma pack(pop)
  9591. +#endif /* defined(__MWERKS__) && ... */
  9592. +
  9593. +
  9594. +#endif /* __TGEC_MII_ACC_H */
  9595. --- /dev/null
  9596. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/Makefile
  9597. @@ -0,0 +1,15 @@
  9598. +#
  9599. +# Makefile for the Freescale Ethernet controllers
  9600. +#
  9601. +ccflags-y += -DVERSION=\"\"
  9602. +#
  9603. +#Include netcomm SW specific definitions
  9604. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  9605. +
  9606. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  9607. +
  9608. +ccflags-y += -I$(NCSW_FM_INC)
  9609. +
  9610. +obj-y += fsl-ncsw-macsec.o
  9611. +
  9612. +fsl-ncsw-macsec-objs := fm_macsec.o fm_macsec_guest.o fm_macsec_master.o fm_macsec_secy.o
  9613. --- /dev/null
  9614. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.c
  9615. @@ -0,0 +1,237 @@
  9616. +/*
  9617. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  9618. + *
  9619. + * Redistribution and use in source and binary forms, with or without
  9620. + * modification, are permitted provided that the following conditions are met:
  9621. + * * Redistributions of source code must retain the above copyright
  9622. + * notice, this list of conditions and the following disclaimer.
  9623. + * * Redistributions in binary form must reproduce the above copyright
  9624. + * notice, this list of conditions and the following disclaimer in the
  9625. + * documentation and/or other materials provided with the distribution.
  9626. + * * Neither the name of Freescale Semiconductor nor the
  9627. + * names of its contributors may be used to endorse or promote products
  9628. + * derived from this software without specific prior written permission.
  9629. + *
  9630. + *
  9631. + * ALTERNATIVELY, this software may be distributed under the terms of the
  9632. + * GNU General Public License ("GPL") as published by the Free Software
  9633. + * Foundation, either version 2 of that License or (at your option) any
  9634. + * later version.
  9635. + *
  9636. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  9637. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  9638. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  9639. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  9640. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  9641. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  9642. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  9643. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  9644. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  9645. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  9646. + */
  9647. +/******************************************************************************
  9648. +
  9649. + @File fm_macsec.c
  9650. +
  9651. + @Description FM MACSEC driver routines implementation.
  9652. +*//***************************************************************************/
  9653. +
  9654. +#include "std_ext.h"
  9655. +#include "error_ext.h"
  9656. +#include "xx_ext.h"
  9657. +#include "string_ext.h"
  9658. +#include "sprint_ext.h"
  9659. +#include "debug_ext.h"
  9660. +
  9661. +#include "fm_macsec.h"
  9662. +
  9663. +
  9664. +/****************************************/
  9665. +/* API Init unit functions */
  9666. +/****************************************/
  9667. +t_Handle FM_MACSEC_Config(t_FmMacsecParams *p_FmMacsecParam)
  9668. +{
  9669. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver;
  9670. +
  9671. + SANITY_CHECK_RETURN_VALUE(p_FmMacsecParam, E_INVALID_HANDLE, NULL);
  9672. +
  9673. + if (p_FmMacsecParam->guestMode)
  9674. + p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)FM_MACSEC_GUEST_Config(p_FmMacsecParam);
  9675. + else
  9676. + p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)FM_MACSEC_MASTER_Config(p_FmMacsecParam);
  9677. +
  9678. + if (!p_FmMacsecControllerDriver)
  9679. + return NULL;
  9680. +
  9681. + return (t_Handle)p_FmMacsecControllerDriver;
  9682. +}
  9683. +
  9684. +t_Error FM_MACSEC_Init(t_Handle h_FmMacsec)
  9685. +{
  9686. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9687. +
  9688. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9689. +
  9690. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_Init)
  9691. + return p_FmMacsecControllerDriver->f_FM_MACSEC_Init(h_FmMacsec);
  9692. +
  9693. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9694. +}
  9695. +
  9696. +t_Error FM_MACSEC_Free(t_Handle h_FmMacsec)
  9697. +{
  9698. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9699. +
  9700. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9701. +
  9702. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_Free)
  9703. + return p_FmMacsecControllerDriver->f_FM_MACSEC_Free(h_FmMacsec);
  9704. +
  9705. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9706. +}
  9707. +
  9708. +t_Error FM_MACSEC_ConfigUnknownSciFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode)
  9709. +{
  9710. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9711. +
  9712. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9713. +
  9714. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUnknownSciFrameTreatment)
  9715. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUnknownSciFrameTreatment(h_FmMacsec, treatMode);
  9716. +
  9717. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9718. +}
  9719. +
  9720. +t_Error FM_MACSEC_ConfigInvalidTagsFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
  9721. +{
  9722. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9723. +
  9724. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9725. +
  9726. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigInvalidTagsFrameTreatment)
  9727. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigInvalidTagsFrameTreatment(h_FmMacsec, deliverUncontrolled);
  9728. +
  9729. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9730. +}
  9731. +
  9732. +t_Error FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(t_Handle h_FmMacsec, bool discardUncontrolled)
  9733. +{
  9734. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9735. +
  9736. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9737. +
  9738. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment)
  9739. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(h_FmMacsec, discardUncontrolled);
  9740. +
  9741. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9742. +}
  9743. +
  9744. +t_Error FM_MACSEC_ConfigUntagFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode)
  9745. +{
  9746. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9747. +
  9748. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9749. +
  9750. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUntagFrameTreatment)
  9751. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUntagFrameTreatment(h_FmMacsec, treatMode);
  9752. +
  9753. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9754. +}
  9755. +
  9756. +t_Error FM_MACSEC_ConfigPnExhaustionThreshold(t_Handle h_FmMacsec, uint32_t pnExhThr)
  9757. +{
  9758. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9759. +
  9760. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9761. +
  9762. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigPnExhaustionThreshold)
  9763. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigPnExhaustionThreshold(h_FmMacsec, pnExhThr);
  9764. +
  9765. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9766. +}
  9767. +
  9768. +t_Error FM_MACSEC_ConfigKeysUnreadable(t_Handle h_FmMacsec)
  9769. +{
  9770. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9771. +
  9772. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9773. +
  9774. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigKeysUnreadable)
  9775. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigKeysUnreadable(h_FmMacsec);
  9776. +
  9777. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9778. +}
  9779. +
  9780. +t_Error FM_MACSEC_ConfigSectagWithoutSCI(t_Handle h_FmMacsec)
  9781. +{
  9782. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9783. +
  9784. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9785. +
  9786. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigSectagWithoutSCI)
  9787. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigSectagWithoutSCI(h_FmMacsec);
  9788. +
  9789. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9790. +}
  9791. +
  9792. +t_Error FM_MACSEC_ConfigException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
  9793. +{
  9794. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9795. +
  9796. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9797. +
  9798. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigException)
  9799. + return p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigException(h_FmMacsec, exception, enable);
  9800. +
  9801. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9802. +}
  9803. +
  9804. +t_Error FM_MACSEC_GetRevision(t_Handle h_FmMacsec, uint32_t *p_MacsecRevision)
  9805. +{
  9806. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9807. +
  9808. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9809. +
  9810. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_GetRevision)
  9811. + return p_FmMacsecControllerDriver->f_FM_MACSEC_GetRevision(h_FmMacsec, p_MacsecRevision);
  9812. +
  9813. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9814. +}
  9815. +
  9816. +
  9817. +t_Error FM_MACSEC_Enable(t_Handle h_FmMacsec)
  9818. +{
  9819. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9820. +
  9821. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9822. +
  9823. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_Enable)
  9824. + return p_FmMacsecControllerDriver->f_FM_MACSEC_Enable(h_FmMacsec);
  9825. +
  9826. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9827. +}
  9828. +
  9829. +t_Error FM_MACSEC_Disable(t_Handle h_FmMacsec)
  9830. +{
  9831. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9832. +
  9833. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9834. +
  9835. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_Disable)
  9836. + return p_FmMacsecControllerDriver->f_FM_MACSEC_Disable(h_FmMacsec);
  9837. +
  9838. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9839. +}
  9840. +
  9841. +t_Error FM_MACSEC_SetException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
  9842. +{
  9843. + t_FmMacsecControllerDriver *p_FmMacsecControllerDriver = (t_FmMacsecControllerDriver *)h_FmMacsec;
  9844. +
  9845. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecControllerDriver, E_INVALID_HANDLE);
  9846. +
  9847. + if (p_FmMacsecControllerDriver->f_FM_MACSEC_SetException)
  9848. + return p_FmMacsecControllerDriver->f_FM_MACSEC_SetException(h_FmMacsec, exception, enable);
  9849. +
  9850. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  9851. +}
  9852. +
  9853. --- /dev/null
  9854. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec.h
  9855. @@ -0,0 +1,203 @@
  9856. +/*
  9857. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  9858. + *
  9859. + * Redistribution and use in source and binary forms, with or without
  9860. + * modification, are permitted provided that the following conditions are met:
  9861. + * * Redistributions of source code must retain the above copyright
  9862. + * notice, this list of conditions and the following disclaimer.
  9863. + * * Redistributions in binary form must reproduce the above copyright
  9864. + * notice, this list of conditions and the following disclaimer in the
  9865. + * documentation and/or other materials provided with the distribution.
  9866. + * * Neither the name of Freescale Semiconductor nor the
  9867. + * names of its contributors may be used to endorse or promote products
  9868. + * derived from this software without specific prior written permission.
  9869. + *
  9870. + *
  9871. + * ALTERNATIVELY, this software may be distributed under the terms of the
  9872. + * GNU General Public License ("GPL") as published by the Free Software
  9873. + * Foundation, either version 2 of that License or (at your option) any
  9874. + * later version.
  9875. + *
  9876. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  9877. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  9878. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  9879. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  9880. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  9881. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  9882. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  9883. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  9884. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  9885. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  9886. + */
  9887. +
  9888. +/******************************************************************************
  9889. + @File fm_macsec.h
  9890. +
  9891. + @Description FM MACSEC internal structures and definitions.
  9892. +*//***************************************************************************/
  9893. +#ifndef __FM_MACSEC_H
  9894. +#define __FM_MACSEC_H
  9895. +
  9896. +#include "error_ext.h"
  9897. +#include "std_ext.h"
  9898. +#include "fm_macsec_ext.h"
  9899. +
  9900. +#include "fm_common.h"
  9901. +
  9902. +
  9903. +#define __ERR_MODULE__ MODULE_FM_MACSEC
  9904. +
  9905. +
  9906. +typedef struct
  9907. +{
  9908. + t_Error (*f_FM_MACSEC_Init) (t_Handle h_FmMacsec);
  9909. + t_Error (*f_FM_MACSEC_Free) (t_Handle h_FmMacsec);
  9910. +
  9911. + t_Error (*f_FM_MACSEC_ConfigUnknownSciFrameTreatment) (t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode);
  9912. + t_Error (*f_FM_MACSEC_ConfigInvalidTagsFrameTreatment) (t_Handle h_FmMacsec, bool deliverUncontrolled);
  9913. + t_Error (*f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment) (t_Handle h_FmMacsec, bool discardUncontrolled);
  9914. + t_Error (*f_FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment) (t_Handle h_FmMacsec, bool deliverUncontrolled);
  9915. + t_Error (*f_FM_MACSEC_ConfigUntagFrameTreatment) (t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode);
  9916. + t_Error (*f_FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment) (t_Handle h_FmMacsec, bool deliverUncontrolled);
  9917. + t_Error (*f_FM_MACSEC_ConfigPnExhaustionThreshold) (t_Handle h_FmMacsec, uint32_t pnExhThr);
  9918. + t_Error (*f_FM_MACSEC_ConfigKeysUnreadable) (t_Handle h_FmMacsec);
  9919. + t_Error (*f_FM_MACSEC_ConfigSectagWithoutSCI) (t_Handle h_FmMacsec);
  9920. + t_Error (*f_FM_MACSEC_ConfigException) (t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
  9921. +
  9922. + t_Error (*f_FM_MACSEC_GetRevision) (t_Handle h_FmMacsec, uint32_t *p_MacsecRevision);
  9923. + t_Error (*f_FM_MACSEC_Enable) (t_Handle h_FmMacsec);
  9924. + t_Error (*f_FM_MACSEC_Disable) (t_Handle h_FmMacsec);
  9925. + t_Error (*f_FM_MACSEC_SetException) (t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
  9926. +
  9927. +} t_FmMacsecControllerDriver;
  9928. +
  9929. +t_Handle FM_MACSEC_GUEST_Config(t_FmMacsecParams *p_FmMacsecParam);
  9930. +t_Handle FM_MACSEC_MASTER_Config(t_FmMacsecParams *p_FmMacsecParams);
  9931. +
  9932. +/***********************************************************************/
  9933. +/* MACSEC internal routines */
  9934. +/***********************************************************************/
  9935. +
  9936. +/**************************************************************************//**
  9937. +
  9938. + @Group FM_MACSEC_InterModule_grp FM MACSEC Inter-Module Unit
  9939. +
  9940. + @Description FM MACSEC Inter Module functions -
  9941. + These are not User API routines but routines that may be called
  9942. + from other modules. This will be the case in a single core environment,
  9943. + where instead of using the XX messaging mechanism, the routines may be
  9944. + called from other modules. In a multicore environment, the other modules may
  9945. + be run by other cores and therefore these routines may not be called directly.
  9946. +
  9947. + @{
  9948. +*//***************************************************************************/
  9949. +
  9950. +#define MAX_NUM_OF_SA_PER_SC 4
  9951. +
  9952. +typedef enum
  9953. +{
  9954. + e_SC_RX = 0,
  9955. + e_SC_TX
  9956. +} e_ScType;
  9957. +
  9958. +typedef enum
  9959. +{
  9960. + e_SC_SA_A = 0,
  9961. + e_SC_SA_B ,
  9962. + e_SC_SA_C ,
  9963. + e_SC_SA_D
  9964. +} e_ScSaId;
  9965. +
  9966. +typedef struct
  9967. +{
  9968. + uint32_t scId;
  9969. + macsecSCI_t sci;
  9970. + bool replayProtect;
  9971. + uint32_t replayWindow;
  9972. + e_FmMacsecValidFrameBehavior validateFrames;
  9973. + uint16_t confidentialityOffset;
  9974. + e_FmMacsecSecYCipherSuite cipherSuite;
  9975. +} t_RxScParams;
  9976. +
  9977. +typedef struct
  9978. +{
  9979. + uint32_t scId;
  9980. + macsecSCI_t sci;
  9981. + bool protectFrames;
  9982. + e_FmMacsecSciInsertionMode sciInsertionMode;
  9983. + bool confidentialityEnable;
  9984. + uint16_t confidentialityOffset;
  9985. + e_FmMacsecSecYCipherSuite cipherSuite;
  9986. +} t_TxScParams;
  9987. +
  9988. +typedef enum e_FmMacsecGlobalExceptions {
  9989. + e_FM_MACSEC_EX_TX_SC, /**< Tx Sc 0 frame discarded error. */
  9990. + e_FM_MACSEC_EX_ECC /**< MACSEC memory ECC multiple-bit error. */
  9991. +} e_FmMacsecGlobalExceptions;
  9992. +
  9993. +typedef enum e_FmMacsecGlobalEvents {
  9994. + e_FM_MACSEC_EV_TX_SC_NEXT_PN /**< Tx Sc 0 Next Pn exhaustion threshold reached. */
  9995. +} e_FmMacsecGlobalEvents;
  9996. +
  9997. +/**************************************************************************//**
  9998. + @Description Enum for inter-module interrupts registration
  9999. +*//***************************************************************************/
  10000. +typedef enum e_FmMacsecEventModules{
  10001. + e_FM_MACSEC_MOD_SC_TX,
  10002. + e_FM_MACSEC_MOD_DUMMY_LAST
  10003. +} e_FmMacsecEventModules;
  10004. +
  10005. +typedef enum e_FmMacsecInterModuleEvent {
  10006. + e_FM_MACSEC_EV_SC_TX,
  10007. + e_FM_MACSEC_EV_ERR_SC_TX,
  10008. + e_FM_MACSEC_EV_DUMMY_LAST
  10009. +} e_FmMacsecInterModuleEvent;
  10010. +
  10011. +#define NUM_OF_INTER_MODULE_EVENTS (NUM_OF_TX_SC * 2)
  10012. +
  10013. +#define GET_MACSEC_MODULE_EVENT(mod, id, intrType, event) \
  10014. + switch(mod){ \
  10015. + case e_FM_MACSEC_MOD_SC_TX: \
  10016. + event = (intrType == e_FM_INTR_TYPE_ERR) ? \
  10017. + e_FM_MACSEC_EV_ERR_SC_TX: \
  10018. + e_FM_MACSEC_EV_SC_TX; \
  10019. + event += (uint8_t)(2 * id);break; \
  10020. + break; \
  10021. + default:event = e_FM_MACSEC_EV_DUMMY_LAST; \
  10022. + break;}
  10023. +
  10024. +void FmMacsecRegisterIntr(t_Handle h_FmMacsec,
  10025. + e_FmMacsecEventModules module,
  10026. + uint8_t modId,
  10027. + e_FmIntrType intrType,
  10028. + void (*f_Isr) (t_Handle h_Arg, uint32_t id),
  10029. + t_Handle h_Arg);
  10030. +
  10031. +void FmMacsecUnregisterIntr(t_Handle h_FmMacsec,
  10032. + e_FmMacsecEventModules module,
  10033. + uint8_t modId,
  10034. + e_FmIntrType intrType);
  10035. +
  10036. +t_Error FmMacsecAllocScs(t_Handle h_FmMacsec, e_ScType type, bool isPtp, uint32_t numOfScs, uint32_t *p_ScIds);
  10037. +t_Error FmMacsecFreeScs(t_Handle h_FmMacsec, e_ScType type, uint32_t numOfScs, uint32_t *p_ScIds);
  10038. +t_Error FmMacsecCreateRxSc(t_Handle h_FmMacsec, t_RxScParams *p_RxScParams);
  10039. +t_Error FmMacsecDeleteRxSc(t_Handle h_FmMacsec, uint32_t scId);
  10040. +t_Error FmMacsecCreateTxSc(t_Handle h_FmMacsec, t_TxScParams *p_RxScParams);
  10041. +t_Error FmMacsecDeleteTxSc(t_Handle h_FmMacsec, uint32_t scId);
  10042. +t_Error FmMacsecCreateRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key);
  10043. +t_Error FmMacsecCreateTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecSAKey_t key);
  10044. +t_Error FmMacsecDeleteRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId);
  10045. +t_Error FmMacsecDeleteTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId);
  10046. +t_Error FmMacsecRxSaSetReceive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, bool enableReceive);
  10047. +t_Error FmMacsecRxSaUpdateNextPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtNextPN);
  10048. +t_Error FmMacsecRxSaUpdateLowestPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtLowestPN);
  10049. +t_Error FmMacsecTxSaSetActive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an);
  10050. +t_Error FmMacsecTxSaGetActive(t_Handle h_FmMacsec, uint32_t scId, macsecAN_t *p_An);
  10051. +t_Error FmMacsecSetPTP(t_Handle h_FmMacsec, bool enable);
  10052. +
  10053. +t_Error FmMacsecSetException(t_Handle h_FmMacsec, e_FmMacsecGlobalExceptions exception, uint32_t scId, bool enable);
  10054. +t_Error FmMacsecSetEvent(t_Handle h_FmMacsec, e_FmMacsecGlobalEvents event, uint32_t scId, bool enable);
  10055. +
  10056. +
  10057. +
  10058. +#endif /* __FM_MACSEC_H */
  10059. --- /dev/null
  10060. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_guest.c
  10061. @@ -0,0 +1,59 @@
  10062. +/*
  10063. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  10064. + *
  10065. + * Redistribution and use in source and binary forms, with or without
  10066. + * modification, are permitted provided that the following conditions are met:
  10067. + * * Redistributions of source code must retain the above copyright
  10068. + * notice, this list of conditions and the following disclaimer.
  10069. + * * Redistributions in binary form must reproduce the above copyright
  10070. + * notice, this list of conditions and the following disclaimer in the
  10071. + * documentation and/or other materials provided with the distribution.
  10072. + * * Neither the name of Freescale Semiconductor nor the
  10073. + * names of its contributors may be used to endorse or promote products
  10074. + * derived from this software without specific prior written permission.
  10075. + *
  10076. + *
  10077. + * ALTERNATIVELY, this software may be distributed under the terms of the
  10078. + * GNU General Public License ("GPL") as published by the Free Software
  10079. + * Foundation, either version 2 of that License or (at your option) any
  10080. + * later version.
  10081. + *
  10082. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  10083. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  10084. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  10085. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  10086. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  10087. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  10088. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  10089. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  10090. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  10091. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  10092. + */
  10093. +
  10094. +/******************************************************************************
  10095. + @File fm_macsec.c
  10096. +
  10097. + @Description FM MACSEC driver routines implementation.
  10098. +*//***************************************************************************/
  10099. +
  10100. +#include "std_ext.h"
  10101. +#include "error_ext.h"
  10102. +#include "xx_ext.h"
  10103. +#include "string_ext.h"
  10104. +#include "sprint_ext.h"
  10105. +#include "debug_ext.h"
  10106. +#include "fm_macsec.h"
  10107. +
  10108. +
  10109. +/****************************************/
  10110. +/* static functions */
  10111. +/****************************************/
  10112. +
  10113. +/****************************************/
  10114. +/* API Init unit functions */
  10115. +/****************************************/
  10116. +t_Handle FM_MACSEC_GUEST_Config(t_FmMacsecParams *p_FmMacsecParam)
  10117. +{
  10118. + UNUSED(p_FmMacsecParam);
  10119. + return NULL;
  10120. +}
  10121. --- /dev/null
  10122. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.c
  10123. @@ -0,0 +1,1031 @@
  10124. +/*
  10125. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  10126. + *
  10127. + * Redistribution and use in source and binary forms, with or without
  10128. + * modification, are permitted provided that the following conditions are met:
  10129. + * * Redistributions of source code must retain the above copyright
  10130. + * notice, this list of conditions and the following disclaimer.
  10131. + * * Redistributions in binary form must reproduce the above copyright
  10132. + * notice, this list of conditions and the following disclaimer in the
  10133. + * documentation and/or other materials provided with the distribution.
  10134. + * * Neither the name of Freescale Semiconductor nor the
  10135. + * names of its contributors may be used to endorse or promote products
  10136. + * derived from this software without specific prior written permission.
  10137. + *
  10138. + *
  10139. + * ALTERNATIVELY, this software may be distributed under the terms of the
  10140. + * GNU General Public License ("GPL") as published by the Free Software
  10141. + * Foundation, either version 2 of that License or (at your option) any
  10142. + * later version.
  10143. + *
  10144. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  10145. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  10146. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  10147. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  10148. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  10149. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  10150. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  10151. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  10152. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  10153. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  10154. + */
  10155. +
  10156. +/******************************************************************************
  10157. + @File fm_macsec.c
  10158. +
  10159. + @Description FM MACSEC driver routines implementation.
  10160. +*//***************************************************************************/
  10161. +
  10162. +#include "std_ext.h"
  10163. +#include "error_ext.h"
  10164. +#include "xx_ext.h"
  10165. +#include "string_ext.h"
  10166. +#include "sprint_ext.h"
  10167. +#include "fm_mac_ext.h"
  10168. +
  10169. +#include "fm_macsec_master.h"
  10170. +
  10171. +
  10172. +extern uint16_t FM_MAC_GetMaxFrameLength(t_Handle FmMac);
  10173. +
  10174. +
  10175. +/****************************************/
  10176. +/* static functions */
  10177. +/****************************************/
  10178. +static t_Error CheckFmMacsecParameters(t_FmMacsec *p_FmMacsec)
  10179. +{
  10180. + if (!p_FmMacsec->f_Exception)
  10181. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
  10182. +
  10183. + return E_OK;
  10184. +}
  10185. +
  10186. +static void UnimplementedIsr(t_Handle h_Arg, uint32_t id)
  10187. +{
  10188. + UNUSED(h_Arg); UNUSED(id);
  10189. +
  10190. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unimplemented Isr!"));
  10191. +}
  10192. +
  10193. +static void MacsecEventIsr(t_Handle h_FmMacsec)
  10194. +{
  10195. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10196. + uint32_t events,event,i;
  10197. +
  10198. + SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
  10199. +
  10200. + events = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->evr);
  10201. + events |= GET_UINT32(p_FmMacsec->p_FmMacsecRegs->ever);
  10202. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->evr,events);
  10203. +
  10204. + for (i=0; i<NUM_OF_TX_SC; i++)
  10205. + if (events & FM_MACSEC_EV_TX_SC_NEXT_PN(i))
  10206. + {
  10207. + GET_MACSEC_MODULE_EVENT(e_FM_MACSEC_MOD_SC_TX, i, e_FM_INTR_TYPE_NORMAL, event);
  10208. + p_FmMacsec->intrMng[event].f_Isr(p_FmMacsec->intrMng[event].h_SrcHandle, i);
  10209. + }
  10210. +}
  10211. +
  10212. +static void MacsecErrorIsr(t_Handle h_FmMacsec)
  10213. +{
  10214. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10215. + uint32_t errors,error,i;
  10216. +
  10217. + SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
  10218. +
  10219. + errors = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->err);
  10220. + errors |= GET_UINT32(p_FmMacsec->p_FmMacsecRegs->erer);
  10221. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->err,errors);
  10222. +
  10223. + for (i=0; i<NUM_OF_TX_SC; i++)
  10224. + if (errors & FM_MACSEC_EX_TX_SC(i))
  10225. + {
  10226. + GET_MACSEC_MODULE_EVENT(e_FM_MACSEC_MOD_SC_TX, i, e_FM_INTR_TYPE_ERR, error);
  10227. + p_FmMacsec->intrMng[error].f_Isr(p_FmMacsec->intrMng[error].h_SrcHandle, i);
  10228. + }
  10229. +
  10230. + if (errors & FM_MACSEC_EX_ECC)
  10231. + {
  10232. + uint8_t eccType;
  10233. + uint32_t tmpReg;
  10234. +
  10235. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->meec);
  10236. + ASSERT_COND(tmpReg & MECC_CAP);
  10237. + eccType = (uint8_t)((tmpReg & MECC_CET) >> MECC_CET_SHIFT);
  10238. +
  10239. + if (!eccType && (p_FmMacsec->userExceptions & FM_MACSEC_USER_EX_SINGLE_BIT_ECC))
  10240. + p_FmMacsec->f_Exception(p_FmMacsec->h_App,e_FM_MACSEC_EX_SINGLE_BIT_ECC);
  10241. + else if (eccType && (p_FmMacsec->userExceptions & FM_MACSEC_USER_EX_MULTI_BIT_ECC))
  10242. + p_FmMacsec->f_Exception(p_FmMacsec->h_App,e_FM_MACSEC_EX_MULTI_BIT_ECC);
  10243. + else
  10244. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->meec,tmpReg);
  10245. + }
  10246. +}
  10247. +
  10248. +static t_Error MacsecInit(t_Handle h_FmMacsec)
  10249. +{
  10250. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10251. + t_FmMacsecDriverParam *p_FmMacsecDriverParam = NULL;
  10252. + uint32_t tmpReg,i,macId;
  10253. +
  10254. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10255. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10256. +
  10257. + CHECK_INIT_PARAMETERS(p_FmMacsec, CheckFmMacsecParameters);
  10258. +
  10259. + p_FmMacsecDriverParam = p_FmMacsec->p_FmMacsecDriverParam;
  10260. +
  10261. + for (i=0;i<e_FM_MACSEC_EV_DUMMY_LAST;i++)
  10262. + p_FmMacsec->intrMng[i].f_Isr = UnimplementedIsr;
  10263. +
  10264. + tmpReg = 0;
  10265. + tmpReg |= (p_FmMacsecDriverParam->changedTextWithNoEncryptDeliverUncontrolled << CFG_UECT_SHIFT)|
  10266. + (p_FmMacsecDriverParam->onlyScbIsSetDeliverUncontrolled << CFG_ESCBT_SHIFT) |
  10267. + (p_FmMacsecDriverParam->unknownSciTreatMode << CFG_USFT_SHIFT) |
  10268. + (p_FmMacsecDriverParam->invalidTagsDeliverUncontrolled << CFG_ITT_SHIFT) |
  10269. + (p_FmMacsecDriverParam->encryptWithNoChangedTextDiscardUncontrolled << CFG_KFT_SHIFT) |
  10270. + (p_FmMacsecDriverParam->untagTreatMode << CFG_UFT_SHIFT) |
  10271. + (p_FmMacsecDriverParam->keysUnreadable << CFG_KSS_SHIFT) |
  10272. + (p_FmMacsecDriverParam->reservedSc0 << CFG_S0I_SHIFT) |
  10273. + (p_FmMacsecDriverParam->byPassMode << CFG_BYPN_SHIFT);
  10274. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg, tmpReg);
  10275. +
  10276. + tmpReg = FM_MAC_GetMaxFrameLength(p_FmMacsec->h_FmMac);
  10277. + /* At least Ethernet FCS (4 bytes) overhead must be subtracted from MFL.
  10278. + * In addition, the SCI (8 bytes) overhead might be subtracted as well. */
  10279. + tmpReg -= p_FmMacsecDriverParam->mflSubtract;
  10280. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->mfl, tmpReg);
  10281. +
  10282. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->tpnet, p_FmMacsecDriverParam->pnExhThr);
  10283. +
  10284. + if (!p_FmMacsec->userExceptions)
  10285. + p_FmMacsec->exceptions &= ~FM_MACSEC_EX_ECC;
  10286. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->erer, p_FmMacsec->exceptions);
  10287. +
  10288. + p_FmMacsec->numRxScAvailable = NUM_OF_RX_SC;
  10289. + if (p_FmMacsecDriverParam->reservedSc0)
  10290. + p_FmMacsec->numRxScAvailable --;
  10291. + p_FmMacsec->numTxScAvailable = NUM_OF_TX_SC;
  10292. +
  10293. + XX_Free(p_FmMacsecDriverParam);
  10294. + p_FmMacsec->p_FmMacsecDriverParam = NULL;
  10295. +
  10296. + FM_MAC_GetId(p_FmMacsec->h_FmMac, &macId);
  10297. + FmRegisterIntr(p_FmMacsec->h_Fm,
  10298. + e_FM_MOD_MACSEC,
  10299. + (uint8_t)macId,
  10300. + e_FM_INTR_TYPE_NORMAL,
  10301. + MacsecEventIsr,
  10302. + p_FmMacsec);
  10303. +
  10304. + FmRegisterIntr(p_FmMacsec->h_Fm,
  10305. + e_FM_MOD_MACSEC,
  10306. + 0,
  10307. + e_FM_INTR_TYPE_ERR,
  10308. + MacsecErrorIsr,
  10309. + p_FmMacsec);
  10310. +
  10311. + return E_OK;
  10312. +}
  10313. +
  10314. +static t_Error MacsecFree(t_Handle h_FmMacsec)
  10315. +{
  10316. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10317. + uint32_t macId;
  10318. +
  10319. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10320. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10321. +
  10322. + FM_MAC_GetId(p_FmMacsec->h_FmMac, &macId);
  10323. + FmUnregisterIntr(p_FmMacsec->h_Fm,
  10324. + e_FM_MOD_MACSEC,
  10325. + (uint8_t)macId,
  10326. + e_FM_INTR_TYPE_NORMAL);
  10327. +
  10328. + FmUnregisterIntr(p_FmMacsec->h_Fm,
  10329. + e_FM_MOD_MACSEC,
  10330. + 0,
  10331. + e_FM_INTR_TYPE_ERR);
  10332. +
  10333. + if (p_FmMacsec->rxScSpinLock)
  10334. + XX_FreeSpinlock(p_FmMacsec->rxScSpinLock);
  10335. + if (p_FmMacsec->txScSpinLock)
  10336. + XX_FreeSpinlock(p_FmMacsec->txScSpinLock);
  10337. +
  10338. + XX_Free(p_FmMacsec);
  10339. +
  10340. + return E_OK;
  10341. +}
  10342. +
  10343. +static t_Error MacsecConfigUnknownSciFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode)
  10344. +{
  10345. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10346. +
  10347. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10348. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10349. +
  10350. + p_FmMacsec->p_FmMacsecDriverParam->unknownSciTreatMode = treatMode;
  10351. +
  10352. + return E_OK;
  10353. +}
  10354. +
  10355. +static t_Error MacsecConfigInvalidTagsFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
  10356. +{
  10357. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10358. +
  10359. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10360. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10361. +
  10362. + p_FmMacsec->p_FmMacsecDriverParam->invalidTagsDeliverUncontrolled = deliverUncontrolled;
  10363. +
  10364. + return E_OK;
  10365. +}
  10366. +
  10367. +static t_Error MacsecConfigChangedTextWithNoEncryptFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
  10368. +{
  10369. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10370. +
  10371. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10372. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10373. +
  10374. + p_FmMacsec->p_FmMacsecDriverParam->changedTextWithNoEncryptDeliverUncontrolled = deliverUncontrolled;
  10375. +
  10376. + return E_OK;
  10377. +}
  10378. +
  10379. +static t_Error MacsecConfigOnlyScbIsSetFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled)
  10380. +{
  10381. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10382. +
  10383. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10384. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10385. +
  10386. + p_FmMacsec->p_FmMacsecDriverParam->onlyScbIsSetDeliverUncontrolled = deliverUncontrolled;
  10387. +
  10388. + return E_OK;
  10389. +}
  10390. +
  10391. +static t_Error MacsecConfigEncryptWithNoChangedTextFrameTreatment(t_Handle h_FmMacsec, bool discardUncontrolled)
  10392. +{
  10393. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10394. +
  10395. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10396. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10397. +
  10398. + p_FmMacsec->p_FmMacsecDriverParam->encryptWithNoChangedTextDiscardUncontrolled = discardUncontrolled;
  10399. +
  10400. + return E_OK;
  10401. +}
  10402. +
  10403. +static t_Error MacsecConfigUntagFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode)
  10404. +{
  10405. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10406. +
  10407. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10408. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10409. +
  10410. + p_FmMacsec->p_FmMacsecDriverParam->untagTreatMode = treatMode;
  10411. +
  10412. + return E_OK;
  10413. +}
  10414. +
  10415. +static t_Error MacsecConfigPnExhaustionThreshold(t_Handle h_FmMacsec, uint32_t pnExhThr)
  10416. +{
  10417. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10418. +
  10419. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10420. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10421. +
  10422. + p_FmMacsec->p_FmMacsecDriverParam->pnExhThr = pnExhThr;
  10423. +
  10424. + return E_OK;
  10425. +}
  10426. +
  10427. +static t_Error MacsecConfigKeysUnreadable(t_Handle h_FmMacsec)
  10428. +{
  10429. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10430. +
  10431. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10432. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10433. +
  10434. + p_FmMacsec->p_FmMacsecDriverParam->keysUnreadable = TRUE;
  10435. +
  10436. + return E_OK;
  10437. +}
  10438. +
  10439. +static t_Error MacsecConfigSectagWithoutSCI(t_Handle h_FmMacsec)
  10440. +{
  10441. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10442. +
  10443. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10444. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10445. +
  10446. + p_FmMacsec->p_FmMacsecDriverParam->sectagOverhead -= MACSEC_SCI_SIZE;
  10447. + p_FmMacsec->p_FmMacsecDriverParam->mflSubtract += MACSEC_SCI_SIZE;
  10448. +
  10449. + return E_OK;
  10450. +}
  10451. +
  10452. +static t_Error MacsecConfigException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
  10453. +{
  10454. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10455. + uint32_t bitMask = 0;
  10456. +
  10457. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10458. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10459. +
  10460. + GET_USER_EXCEPTION_FLAG(bitMask, exception);
  10461. + if (bitMask)
  10462. + {
  10463. + if (enable)
  10464. + p_FmMacsec->userExceptions |= bitMask;
  10465. + else
  10466. + p_FmMacsec->userExceptions &= ~bitMask;
  10467. + }
  10468. + else
  10469. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  10470. +
  10471. + return E_OK;
  10472. +}
  10473. +
  10474. +static t_Error MacsecGetRevision(t_Handle h_FmMacsec, uint32_t *p_MacsecRevision)
  10475. +{
  10476. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10477. +
  10478. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10479. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10480. +
  10481. + *p_MacsecRevision = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->ip_rev1);
  10482. +
  10483. + return E_OK;
  10484. +}
  10485. +
  10486. +static t_Error MacsecEnable(t_Handle h_FmMacsec)
  10487. +{
  10488. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10489. + uint32_t tmpReg;
  10490. +
  10491. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10492. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10493. +
  10494. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg);
  10495. + tmpReg |= CFG_BYPN;
  10496. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg,tmpReg);
  10497. +
  10498. + return E_OK;
  10499. +}
  10500. +
  10501. +static t_Error MacsecDisable(t_Handle h_FmMacsec)
  10502. +{
  10503. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10504. + uint32_t tmpReg;
  10505. +
  10506. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10507. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10508. +
  10509. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg);
  10510. + tmpReg &= ~CFG_BYPN;
  10511. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg,tmpReg);
  10512. +
  10513. + return E_OK;
  10514. +}
  10515. +
  10516. +static t_Error MacsecSetException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable)
  10517. +{
  10518. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10519. + uint32_t bitMask;
  10520. +
  10521. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10522. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  10523. +
  10524. + GET_USER_EXCEPTION_FLAG(bitMask, exception);
  10525. + if (bitMask)
  10526. + {
  10527. + if (enable)
  10528. + p_FmMacsec->userExceptions |= bitMask;
  10529. + else
  10530. + p_FmMacsec->userExceptions &= ~bitMask;
  10531. + }
  10532. + else
  10533. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  10534. +
  10535. + if (!p_FmMacsec->userExceptions)
  10536. + p_FmMacsec->exceptions &= ~FM_MACSEC_EX_ECC;
  10537. + else
  10538. + p_FmMacsec->exceptions |= FM_MACSEC_EX_ECC;
  10539. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->erer, p_FmMacsec->exceptions);
  10540. +
  10541. + return E_OK;
  10542. +}
  10543. +
  10544. +static void InitFmMacsecControllerDriver(t_FmMacsecControllerDriver *p_FmMacsecControllerDriver)
  10545. +{
  10546. + p_FmMacsecControllerDriver->f_FM_MACSEC_Init = MacsecInit;
  10547. + p_FmMacsecControllerDriver->f_FM_MACSEC_Free = MacsecFree;
  10548. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUnknownSciFrameTreatment = MacsecConfigUnknownSciFrameTreatment;
  10549. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigInvalidTagsFrameTreatment = MacsecConfigInvalidTagsFrameTreatment;
  10550. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment = MacsecConfigEncryptWithNoChangedTextFrameTreatment;
  10551. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigUntagFrameTreatment = MacsecConfigUntagFrameTreatment;
  10552. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment = MacsecConfigChangedTextWithNoEncryptFrameTreatment;
  10553. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment = MacsecConfigOnlyScbIsSetFrameTreatment;
  10554. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigPnExhaustionThreshold = MacsecConfigPnExhaustionThreshold;
  10555. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigKeysUnreadable = MacsecConfigKeysUnreadable;
  10556. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigSectagWithoutSCI = MacsecConfigSectagWithoutSCI;
  10557. + p_FmMacsecControllerDriver->f_FM_MACSEC_ConfigException = MacsecConfigException;
  10558. + p_FmMacsecControllerDriver->f_FM_MACSEC_GetRevision = MacsecGetRevision;
  10559. + p_FmMacsecControllerDriver->f_FM_MACSEC_Enable = MacsecEnable;
  10560. + p_FmMacsecControllerDriver->f_FM_MACSEC_Disable = MacsecDisable;
  10561. + p_FmMacsecControllerDriver->f_FM_MACSEC_SetException = MacsecSetException;
  10562. +}
  10563. +
  10564. +/****************************************/
  10565. +/* Inter-Module functions */
  10566. +/****************************************/
  10567. +
  10568. +void FmMacsecRegisterIntr(t_Handle h_FmMacsec,
  10569. + e_FmMacsecEventModules module,
  10570. + uint8_t modId,
  10571. + e_FmIntrType intrType,
  10572. + void (*f_Isr) (t_Handle h_Arg, uint32_t id),
  10573. + t_Handle h_Arg)
  10574. +{
  10575. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10576. + uint8_t event= 0;
  10577. +
  10578. + SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
  10579. +
  10580. + GET_MACSEC_MODULE_EVENT(module, modId, intrType, event);
  10581. +
  10582. + ASSERT_COND(event != e_FM_MACSEC_EV_DUMMY_LAST);
  10583. + p_FmMacsec->intrMng[event].f_Isr = f_Isr;
  10584. + p_FmMacsec->intrMng[event].h_SrcHandle = h_Arg;
  10585. +}
  10586. +
  10587. +void FmMacsecUnregisterIntr(t_Handle h_FmMacsec,
  10588. + e_FmMacsecEventModules module,
  10589. + uint8_t modId,
  10590. + e_FmIntrType intrType)
  10591. +{
  10592. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10593. + uint8_t event= 0;
  10594. +
  10595. + SANITY_CHECK_RETURN(p_FmMacsec, E_INVALID_HANDLE);
  10596. +
  10597. + GET_MACSEC_MODULE_EVENT(module, modId,intrType, event);
  10598. +
  10599. + ASSERT_COND(event != e_FM_MACSEC_EV_DUMMY_LAST);
  10600. + p_FmMacsec->intrMng[event].f_Isr = NULL;
  10601. + p_FmMacsec->intrMng[event].h_SrcHandle = NULL;
  10602. +}
  10603. +
  10604. +t_Error FmMacsecAllocScs(t_Handle h_FmMacsec, e_ScType type, bool isPtp, uint32_t numOfScs, uint32_t *p_ScIds)
  10605. +{
  10606. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10607. + t_Error err = E_OK;
  10608. + bool *p_ScTable;
  10609. + uint32_t *p_ScAvailable,i;
  10610. +
  10611. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10612. + SANITY_CHECK_RETURN_ERROR(p_ScIds, E_INVALID_HANDLE);
  10613. + SANITY_CHECK_RETURN_ERROR(numOfScs, E_INVALID_HANDLE);
  10614. +
  10615. + if (type == e_SC_RX)
  10616. + {
  10617. + p_ScTable = (bool *)p_FmMacsec->rxScTable;
  10618. + p_ScAvailable = &p_FmMacsec->numRxScAvailable;
  10619. + i = (NUM_OF_RX_SC - 1);
  10620. + }
  10621. + else
  10622. + {
  10623. + p_ScTable = (bool *)p_FmMacsec->txScTable;
  10624. + p_ScAvailable = &p_FmMacsec->numTxScAvailable;
  10625. + i = (NUM_OF_TX_SC - 1);
  10626. +
  10627. + }
  10628. + if (*p_ScAvailable < numOfScs)
  10629. + RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Not enough SCs available"));
  10630. +
  10631. + if (isPtp)
  10632. + {
  10633. + i = 0;
  10634. + if (p_ScTable[i])
  10635. + RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Sc 0 Not available"));
  10636. + }
  10637. +
  10638. + for (;numOfScs;i--)
  10639. + {
  10640. + if (p_ScTable[i])
  10641. + continue;
  10642. + numOfScs --;
  10643. + (*p_ScAvailable)--;
  10644. + p_ScIds[numOfScs] = i;
  10645. + p_ScTable[i] = TRUE;
  10646. + }
  10647. +
  10648. + return err;
  10649. +}
  10650. +
  10651. +t_Error FmMacsecFreeScs(t_Handle h_FmMacsec, e_ScType type, uint32_t numOfScs, uint32_t *p_ScIds)
  10652. +{
  10653. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10654. + t_Error err = E_OK;
  10655. + bool *p_ScTable;
  10656. + uint32_t *p_ScAvailable,maxNumOfSc,i;
  10657. +
  10658. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10659. + SANITY_CHECK_RETURN_ERROR(p_ScIds, E_INVALID_HANDLE);
  10660. + SANITY_CHECK_RETURN_ERROR(numOfScs, E_INVALID_HANDLE);
  10661. +
  10662. + if (type == e_SC_RX)
  10663. + {
  10664. + p_ScTable = (bool *)p_FmMacsec->rxScTable;
  10665. + p_ScAvailable = &p_FmMacsec->numRxScAvailable;
  10666. + maxNumOfSc = NUM_OF_RX_SC;
  10667. + }
  10668. + else
  10669. + {
  10670. + p_ScTable = (bool *)p_FmMacsec->txScTable;
  10671. + p_ScAvailable = &p_FmMacsec->numTxScAvailable;
  10672. + maxNumOfSc = NUM_OF_TX_SC;
  10673. + }
  10674. +
  10675. + if ((*p_ScAvailable + numOfScs) > maxNumOfSc)
  10676. + RETURN_ERROR(MINOR, E_FULL, ("Too much SCs"));
  10677. +
  10678. + for (i=0;i<numOfScs;i++)
  10679. + {
  10680. + p_ScTable[p_ScIds[i]] = FALSE;
  10681. + (*p_ScAvailable)++;
  10682. + }
  10683. +
  10684. + return err;
  10685. +
  10686. +}
  10687. +
  10688. +t_Error FmMacsecSetPTP(t_Handle h_FmMacsec, bool enable)
  10689. +{
  10690. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10691. + uint32_t tmpReg = 0;
  10692. +
  10693. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10694. +
  10695. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg);
  10696. + if (enable && (tmpReg & CFG_S0I))
  10697. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("MACSEC already in point-to-point mode"));
  10698. +
  10699. + if (enable)
  10700. + tmpReg |= CFG_S0I;
  10701. + else
  10702. + tmpReg &= ~CFG_S0I;
  10703. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->cfg, tmpReg);
  10704. +
  10705. + return E_OK;
  10706. +}
  10707. +
  10708. +t_Error FmMacsecCreateRxSc(t_Handle h_FmMacsec, t_RxScParams *p_RxScParams)
  10709. +{
  10710. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10711. + t_Error err = E_OK;
  10712. + uint32_t tmpReg = 0, intFlags;
  10713. +
  10714. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10715. + SANITY_CHECK_RETURN_ERROR(p_RxScParams, E_INVALID_HANDLE);
  10716. + SANITY_CHECK_RETURN_ERROR(p_RxScParams->scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10717. +
  10718. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
  10719. +
  10720. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, p_RxScParams->scId);
  10721. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsccfg);
  10722. + if (tmpReg & RX_SCCFG_SCI_EN_MASK)
  10723. + {
  10724. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10725. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Rx Sc %d must be disable",p_RxScParams->scId));
  10726. + }
  10727. +
  10728. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsci1h, GET_SCI_FIRST_HALF(p_RxScParams->sci));
  10729. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsci2h, GET_SCI_SECOND_HALF(p_RxScParams->sci));
  10730. + tmpReg |= ((p_RxScParams->replayProtect << RX_SCCFG_RP_SHIFT) & RX_SCCFG_RP_MASK);
  10731. + tmpReg |= ((p_RxScParams->validateFrames << RX_SCCFG_VF_SHIFT) & RX_SCCFG_VF_MASK);
  10732. + tmpReg |= ((p_RxScParams->confidentialityOffset << RX_SCCFG_CO_SHIFT) & RX_SCCFG_CO_MASK);
  10733. + tmpReg |= RX_SCCFG_SCI_EN_MASK;
  10734. + tmpReg |= (p_RxScParams->cipherSuite << RX_SCCFG_CS_SHIFT);
  10735. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsccfg, tmpReg);
  10736. +
  10737. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rpw, p_RxScParams->replayWindow);
  10738. +
  10739. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10740. +
  10741. + return err;
  10742. +}
  10743. +
  10744. +t_Error FmMacsecDeleteRxSc(t_Handle h_FmMacsec, uint32_t scId)
  10745. +{
  10746. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10747. + t_Error err = E_OK;
  10748. + uint32_t tmpReg = 0, intFlags;
  10749. +
  10750. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10751. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10752. +
  10753. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
  10754. +
  10755. + tmpReg &= ~RX_SCCFG_SCI_EN_MASK;
  10756. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
  10757. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsccfg, tmpReg);
  10758. +
  10759. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10760. +
  10761. + return err;
  10762. +}
  10763. +
  10764. +t_Error FmMacsecCreateTxSc(t_Handle h_FmMacsec, t_TxScParams *p_TxScParams)
  10765. +{
  10766. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10767. + t_Error err = E_OK;
  10768. + uint32_t tmpReg = 0, intFlags;
  10769. + bool alwaysIncludeSCI = FALSE, useES = FALSE, useSCB = FALSE;
  10770. +
  10771. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10772. + SANITY_CHECK_RETURN_ERROR(p_TxScParams, E_INVALID_HANDLE);
  10773. + SANITY_CHECK_RETURN_ERROR(p_TxScParams->scId < NUM_OF_TX_SC, E_INVALID_HANDLE);
  10774. +
  10775. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
  10776. +
  10777. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, p_TxScParams->scId);
  10778. +
  10779. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg);
  10780. + if (tmpReg & TX_SCCFG_SCE_MASK)
  10781. + {
  10782. + XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
  10783. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Tx Sc %d must be disable",p_TxScParams->scId));
  10784. + }
  10785. +
  10786. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsci1h, GET_SCI_FIRST_HALF(p_TxScParams->sci));
  10787. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsci2h, GET_SCI_SECOND_HALF(p_TxScParams->sci));
  10788. + alwaysIncludeSCI = (p_TxScParams->sciInsertionMode == e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG);
  10789. + useES = (p_TxScParams->sciInsertionMode == e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_MAC_SA);
  10790. +
  10791. + tmpReg |= ((p_TxScParams->protectFrames << TX_SCCFG_PF_SHIFT) & TX_SCCFG_PF_MASK);
  10792. + tmpReg |= ((alwaysIncludeSCI << TX_SCCFG_AIS_SHIFT) & TX_SCCFG_AIS_MASK);
  10793. + tmpReg |= ((useES << TX_SCCFG_UES_SHIFT) & TX_SCCFG_UES_MASK);
  10794. + tmpReg |= ((useSCB << TX_SCCFG_USCB_SHIFT) & TX_SCCFG_USCB_MASK);
  10795. + tmpReg |= ((p_TxScParams->confidentialityEnable << TX_SCCFG_CE_SHIFT) & TX_SCCFG_CE_MASK);
  10796. + tmpReg |= ((p_TxScParams->confidentialityOffset << TX_SCCFG_CO_SHIFT) & TX_SCCFG_CO_MASK);
  10797. + tmpReg |= TX_SCCFG_SCE_MASK;
  10798. + tmpReg |= (p_TxScParams->cipherSuite << TX_SCCFG_CS_SHIFT);
  10799. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg, tmpReg);
  10800. +
  10801. + XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
  10802. +
  10803. + return err;
  10804. +}
  10805. +
  10806. +t_Error FmMacsecDeleteTxSc(t_Handle h_FmMacsec, uint32_t scId)
  10807. +{
  10808. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10809. + t_Error err = E_OK;
  10810. + uint32_t tmpReg = 0, intFlags;
  10811. +
  10812. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10813. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_TX_SC, E_INVALID_HANDLE);
  10814. +
  10815. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
  10816. +
  10817. + tmpReg &= ~TX_SCCFG_SCE_MASK;
  10818. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
  10819. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg, tmpReg);
  10820. +
  10821. + XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
  10822. +
  10823. + return err;
  10824. +}
  10825. +
  10826. +t_Error FmMacsecCreateRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key)
  10827. +{
  10828. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10829. + t_Error err = E_OK;
  10830. + uint32_t tmpReg = 0, intFlags;
  10831. +
  10832. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10833. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10834. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
  10835. +
  10836. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
  10837. +
  10838. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
  10839. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsanpn, DEFAULT_initNextPn);
  10840. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsalpn, lowestPn);
  10841. + MemCpy8((void*)p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsak, key, sizeof(macsecSAKey_t));
  10842. +
  10843. + tmpReg |= RX_SACFG_ACTIVE;
  10844. + tmpReg |= ((an << RX_SACFG_AN_SHIFT) & RX_SACFG_AN_MASK);
  10845. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs, tmpReg);
  10846. +
  10847. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10848. +
  10849. + return err;
  10850. +}
  10851. +
  10852. +t_Error FmMacsecCreateTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecSAKey_t key)
  10853. +{
  10854. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10855. + t_Error err = E_OK;
  10856. + uint32_t tmpReg = 0, intFlags;
  10857. +
  10858. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10859. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10860. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_TX_SC, E_INVALID_HANDLE);
  10861. +
  10862. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
  10863. +
  10864. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
  10865. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsanpn, DEFAULT_initNextPn);
  10866. + MemCpy8((void*)p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsak, key, sizeof(macsecSAKey_t));
  10867. +
  10868. + tmpReg |= TX_SACFG_ACTIVE;
  10869. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsacs, tmpReg);
  10870. +
  10871. + XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
  10872. +
  10873. + return err;
  10874. +}
  10875. +
  10876. +t_Error FmMacsecDeleteRxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId)
  10877. +{
  10878. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10879. + t_Error err = E_OK;
  10880. + uint32_t tmpReg = 0, i, intFlags;
  10881. +
  10882. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10883. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10884. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
  10885. +
  10886. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
  10887. +
  10888. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
  10889. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsanpn, 0x0);
  10890. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsalpn, 0x0);
  10891. + for (i=0; i<4; i++)
  10892. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsak[i], 0x0);
  10893. +
  10894. + tmpReg |= RX_SACFG_ACTIVE;
  10895. + tmpReg &= ~RX_SACFG_EN_MASK;
  10896. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs, tmpReg);
  10897. +
  10898. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10899. +
  10900. + return err;
  10901. +}
  10902. +
  10903. +t_Error FmMacsecDeleteTxSa(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId)
  10904. +{
  10905. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10906. + t_Error err = E_OK;
  10907. + uint32_t tmpReg = 0, i, intFlags;
  10908. +
  10909. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10910. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10911. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_TX_SC, E_INVALID_HANDLE);
  10912. +
  10913. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
  10914. +
  10915. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
  10916. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsanpn, 0x0);
  10917. + for (i=0; i<4; i++)
  10918. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsak[i], 0x0);
  10919. +
  10920. + tmpReg |= TX_SACFG_ACTIVE;
  10921. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecTxScSa[saId].txsacs, tmpReg);
  10922. +
  10923. + XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
  10924. +
  10925. + return err;
  10926. +}
  10927. +
  10928. +t_Error FmMacsecRxSaSetReceive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, bool enableReceive)
  10929. +{
  10930. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10931. + t_Error err = E_OK;
  10932. + uint32_t tmpReg = 0, intFlags;
  10933. +
  10934. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10935. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10936. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
  10937. +
  10938. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
  10939. +
  10940. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
  10941. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs);
  10942. + if (enableReceive)
  10943. + tmpReg |= RX_SACFG_EN_MASK;
  10944. + else
  10945. + tmpReg &= ~RX_SACFG_EN_MASK;
  10946. +
  10947. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsacs, tmpReg);
  10948. +
  10949. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10950. +
  10951. + return err;
  10952. +}
  10953. +
  10954. +t_Error FmMacsecRxSaUpdateNextPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtNextPN)
  10955. +{
  10956. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10957. + t_Error err = E_OK;
  10958. + uint32_t intFlags;
  10959. +
  10960. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10961. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10962. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
  10963. +
  10964. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
  10965. +
  10966. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
  10967. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsanpn, updtNextPN);
  10968. +
  10969. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10970. +
  10971. + return err;
  10972. +}
  10973. +
  10974. +t_Error FmMacsecRxSaUpdateLowestPn(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, uint32_t updtLowestPN)
  10975. +{
  10976. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10977. + t_Error err = E_OK;
  10978. + uint32_t intFlags;
  10979. +
  10980. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  10981. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  10982. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_RX_SC, E_INVALID_HANDLE);
  10983. +
  10984. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->rxScSpinLock);
  10985. +
  10986. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->rxsca, scId);
  10987. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->fmMacsecRxScSa[saId].rxsalpn, updtLowestPN);
  10988. +
  10989. + XX_UnlockIntrSpinlock(p_FmMacsec->rxScSpinLock, intFlags);
  10990. +
  10991. + return err;
  10992. +}
  10993. +
  10994. +t_Error FmMacsecTxSaSetActive(t_Handle h_FmMacsec, uint32_t scId, e_ScSaId saId, macsecAN_t an)
  10995. +{
  10996. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  10997. + t_Error err = E_OK;
  10998. + uint32_t tmpReg = 0, intFlags;
  10999. +
  11000. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  11001. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  11002. + SANITY_CHECK_RETURN_ERROR(saId < NUM_OF_SA_PER_TX_SC, E_INVALID_HANDLE);
  11003. +
  11004. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
  11005. +
  11006. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
  11007. +
  11008. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg);
  11009. +
  11010. + tmpReg |= ((an << TX_SCCFG_AN_SHIFT) & TX_SCCFG_AN_MASK);
  11011. + tmpReg |= ((saId << TX_SCCFG_ASA_SHIFT) & TX_SCCFG_ASA_MASK);
  11012. +
  11013. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg, tmpReg);
  11014. +
  11015. + XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
  11016. +
  11017. + return err;
  11018. +}
  11019. +
  11020. +t_Error FmMacsecTxSaGetActive(t_Handle h_FmMacsec, uint32_t scId, macsecAN_t *p_An)
  11021. +{
  11022. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  11023. + t_Error err = E_OK;
  11024. + uint32_t tmpReg = 0, intFlags;
  11025. +
  11026. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  11027. + SANITY_CHECK_RETURN_ERROR(scId < NUM_OF_RX_SC, E_INVALID_HANDLE);
  11028. + SANITY_CHECK_RETURN_ERROR(p_An, E_INVALID_HANDLE);
  11029. +
  11030. + intFlags = XX_LockIntrSpinlock(p_FmMacsec->txScSpinLock);
  11031. +
  11032. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->txsca, scId);
  11033. +
  11034. + tmpReg = GET_UINT32(p_FmMacsec->p_FmMacsecRegs->txsccfg);
  11035. +
  11036. + XX_UnlockIntrSpinlock(p_FmMacsec->txScSpinLock, intFlags);
  11037. +
  11038. + *p_An = (macsecAN_t)((tmpReg & TX_SCCFG_AN_MASK) >> TX_SCCFG_AN_SHIFT);
  11039. +
  11040. + return err;
  11041. +}
  11042. +
  11043. +t_Error FmMacsecSetException(t_Handle h_FmMacsec, e_FmMacsecGlobalExceptions exception, uint32_t scId, bool enable)
  11044. +{
  11045. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  11046. + uint32_t bitMask;
  11047. +
  11048. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  11049. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  11050. +
  11051. + GET_EXCEPTION_FLAG(bitMask, exception, scId);
  11052. + if (bitMask)
  11053. + {
  11054. + if (enable)
  11055. + p_FmMacsec->exceptions |= bitMask;
  11056. + else
  11057. + p_FmMacsec->exceptions &= ~bitMask;
  11058. + }
  11059. + else
  11060. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  11061. +
  11062. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->erer, p_FmMacsec->exceptions);
  11063. +
  11064. + return E_OK;
  11065. +}
  11066. +
  11067. +t_Error FmMacsecSetEvent(t_Handle h_FmMacsec, e_FmMacsecGlobalEvents event, uint32_t scId, bool enable)
  11068. +{
  11069. + t_FmMacsec *p_FmMacsec = (t_FmMacsec*)h_FmMacsec;
  11070. + uint32_t bitMask;
  11071. +
  11072. + SANITY_CHECK_RETURN_ERROR(p_FmMacsec, E_INVALID_HANDLE);
  11073. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsec->p_FmMacsecDriverParam, E_INVALID_HANDLE);
  11074. +
  11075. + GET_EVENT_FLAG(bitMask, event, scId);
  11076. + if (bitMask)
  11077. + {
  11078. + if (enable)
  11079. + p_FmMacsec->events |= bitMask;
  11080. + else
  11081. + p_FmMacsec->events &= ~bitMask;
  11082. + }
  11083. + else
  11084. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined event"));
  11085. +
  11086. + WRITE_UINT32(p_FmMacsec->p_FmMacsecRegs->ever, p_FmMacsec->events);
  11087. +
  11088. + return E_OK;
  11089. +}
  11090. +
  11091. +/****************************************/
  11092. +/* API Init unit functions */
  11093. +/****************************************/
  11094. +t_Handle FM_MACSEC_MASTER_Config(t_FmMacsecParams *p_FmMacsecParam)
  11095. +{
  11096. + t_FmMacsec *p_FmMacsec;
  11097. + uint32_t macId;
  11098. +
  11099. + /* Allocate FM MACSEC structure */
  11100. + p_FmMacsec = (t_FmMacsec *) XX_Malloc(sizeof(t_FmMacsec));
  11101. + if (!p_FmMacsec)
  11102. + {
  11103. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC driver structure"));
  11104. + return NULL;
  11105. + }
  11106. + memset(p_FmMacsec, 0, sizeof(t_FmMacsec));
  11107. + InitFmMacsecControllerDriver(&p_FmMacsec->fmMacsecControllerDriver);
  11108. +
  11109. + /* Allocate the FM MACSEC driver's parameters structure */
  11110. + p_FmMacsec->p_FmMacsecDriverParam = (t_FmMacsecDriverParam *)XX_Malloc(sizeof(t_FmMacsecDriverParam));
  11111. + if (!p_FmMacsec->p_FmMacsecDriverParam)
  11112. + {
  11113. + XX_Free(p_FmMacsec);
  11114. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC driver parameters"));
  11115. + return NULL;
  11116. + }
  11117. + memset(p_FmMacsec->p_FmMacsecDriverParam, 0, sizeof(t_FmMacsecDriverParam));
  11118. +
  11119. + /* Initialize FM MACSEC parameters which will be kept by the driver */
  11120. + p_FmMacsec->h_Fm = p_FmMacsecParam->h_Fm;
  11121. + p_FmMacsec->h_FmMac = p_FmMacsecParam->nonGuestParams.h_FmMac;
  11122. + p_FmMacsec->p_FmMacsecRegs = (t_FmMacsecRegs *)UINT_TO_PTR(p_FmMacsecParam->nonGuestParams.baseAddr);
  11123. + p_FmMacsec->f_Exception = p_FmMacsecParam->nonGuestParams.f_Exception;
  11124. + p_FmMacsec->h_App = p_FmMacsecParam->nonGuestParams.h_App;
  11125. + p_FmMacsec->userExceptions = DEFAULT_userExceptions;
  11126. + p_FmMacsec->exceptions = DEFAULT_exceptions;
  11127. + p_FmMacsec->events = DEFAULT_events;
  11128. + p_FmMacsec->rxScSpinLock = XX_InitSpinlock();
  11129. + p_FmMacsec->txScSpinLock = XX_InitSpinlock();
  11130. +
  11131. + /* Initialize FM MACSEC driver parameters parameters (for initialization phase only) */
  11132. + p_FmMacsec->p_FmMacsecDriverParam->unknownSciTreatMode = DEFAULT_unknownSciFrameTreatment;
  11133. + p_FmMacsec->p_FmMacsecDriverParam->invalidTagsDeliverUncontrolled = DEFAULT_invalidTagsFrameTreatment;
  11134. + p_FmMacsec->p_FmMacsecDriverParam->encryptWithNoChangedTextDiscardUncontrolled = DEFAULT_encryptWithNoChangedTextFrameTreatment;
  11135. + p_FmMacsec->p_FmMacsecDriverParam->untagTreatMode = DEFAULT_untagFrameTreatment;
  11136. + p_FmMacsec->p_FmMacsecDriverParam->keysUnreadable = DEFAULT_keysUnreadable;
  11137. + p_FmMacsec->p_FmMacsecDriverParam->reservedSc0 = DEFAULT_sc0ReservedForPTP;
  11138. + p_FmMacsec->p_FmMacsecDriverParam->byPassMode = !DEFAULT_normalMode;
  11139. + p_FmMacsec->p_FmMacsecDriverParam->pnExhThr = DEFAULT_pnExhThr;
  11140. + p_FmMacsec->p_FmMacsecDriverParam->sectagOverhead = DEFAULT_sectagOverhead;
  11141. + p_FmMacsec->p_FmMacsecDriverParam->mflSubtract = DEFAULT_mflSubtract;
  11142. + /* build the FM MACSEC master IPC address */
  11143. + memset(p_FmMacsec->fmMacsecModuleName, 0, (sizeof(char))*MODULE_NAME_SIZE);
  11144. + FM_MAC_GetId(p_FmMacsec->h_FmMac,&macId);
  11145. + if (Sprint (p_FmMacsec->fmMacsecModuleName, "FM-%d-MAC-%d-MACSEC-Master",
  11146. + FmGetId(p_FmMacsec->h_Fm),macId) != 24)
  11147. + {
  11148. + XX_Free(p_FmMacsec->p_FmMacsecDriverParam);
  11149. + XX_Free(p_FmMacsec);
  11150. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  11151. + return NULL;
  11152. + }
  11153. + return p_FmMacsec;
  11154. +}
  11155. --- /dev/null
  11156. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_master.h
  11157. @@ -0,0 +1,479 @@
  11158. +/*
  11159. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  11160. + *
  11161. + * Redistribution and use in source and binary forms, with or without
  11162. + * modification, are permitted provided that the following conditions are met:
  11163. + * * Redistributions of source code must retain the above copyright
  11164. + * notice, this list of conditions and the following disclaimer.
  11165. + * * Redistributions in binary form must reproduce the above copyright
  11166. + * notice, this list of conditions and the following disclaimer in the
  11167. + * documentation and/or other materials provided with the distribution.
  11168. + * * Neither the name of Freescale Semiconductor nor the
  11169. + * names of its contributors may be used to endorse or promote products
  11170. + * derived from this software without specific prior written permission.
  11171. + *
  11172. + *
  11173. + * ALTERNATIVELY, this software may be distributed under the terms of the
  11174. + * GNU General Public License ("GPL") as published by the Free Software
  11175. + * Foundation, either version 2 of that License or (at your option) any
  11176. + * later version.
  11177. + *
  11178. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  11179. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  11180. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  11181. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  11182. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  11183. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  11184. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  11185. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  11186. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  11187. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  11188. + */
  11189. +
  11190. +/******************************************************************************
  11191. + @File fm_macsec_master.h
  11192. +
  11193. + @Description FM MACSEC internal structures and definitions.
  11194. +*//***************************************************************************/
  11195. +#ifndef __FM_MACSEC_MASTER_H
  11196. +#define __FM_MACSEC_MASTER_H
  11197. +
  11198. +#include "error_ext.h"
  11199. +#include "std_ext.h"
  11200. +
  11201. +#include "fm_macsec.h"
  11202. +
  11203. +
  11204. +#define MACSEC_ICV_SIZE 16
  11205. +#define MACSEC_SECTAG_SIZE 16
  11206. +#define MACSEC_SCI_SIZE 8
  11207. +#define MACSEC_FCS_SIZE 4
  11208. +
  11209. +/**************************************************************************//**
  11210. + @Description Exceptions
  11211. +*//***************************************************************************/
  11212. +
  11213. +#define FM_MACSEC_EX_TX_SC_0 0x80000000
  11214. +#define FM_MACSEC_EX_TX_SC(sc) (FM_MACSEC_EX_TX_SC_0 >> (sc))
  11215. +#define FM_MACSEC_EX_ECC 0x00000001
  11216. +
  11217. +#define GET_EXCEPTION_FLAG(bitMask, exception, id) switch (exception){ \
  11218. + case e_FM_MACSEC_EX_TX_SC: \
  11219. + bitMask = FM_MACSEC_EX_TX_SC(id); break; \
  11220. + case e_FM_MACSEC_EX_ECC: \
  11221. + bitMask = FM_MACSEC_EX_ECC; break; \
  11222. + default: bitMask = 0;break;}
  11223. +
  11224. +#define FM_MACSEC_USER_EX_SINGLE_BIT_ECC 0x80000000
  11225. +#define FM_MACSEC_USER_EX_MULTI_BIT_ECC 0x40000000
  11226. +
  11227. +#define GET_USER_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \
  11228. + case e_FM_MACSEC_EX_SINGLE_BIT_ECC: \
  11229. + bitMask = FM_MACSEC_USER_EX_SINGLE_BIT_ECC; break; \
  11230. + case e_FM_MACSEC_EX_MULTI_BIT_ECC: \
  11231. + bitMask = FM_MACSEC_USER_EX_MULTI_BIT_ECC; break; \
  11232. + default: bitMask = 0;break;}
  11233. +
  11234. +/**************************************************************************//**
  11235. + @Description Events
  11236. +*//***************************************************************************/
  11237. +
  11238. +#define FM_MACSEC_EV_TX_SC_0_NEXT_PN 0x80000000
  11239. +#define FM_MACSEC_EV_TX_SC_NEXT_PN(sc) (FM_MACSEC_EV_TX_SC_0_NEXT_PN >> (sc))
  11240. +
  11241. +#define GET_EVENT_FLAG(bitMask, event, id) switch (event){ \
  11242. + case e_FM_MACSEC_EV_TX_SC_NEXT_PN: \
  11243. + bitMask = FM_MACSEC_EV_TX_SC_NEXT_PN(id); break; \
  11244. + default: bitMask = 0;break;}
  11245. +
  11246. +/**************************************************************************//**
  11247. + @Description Defaults
  11248. +*//***************************************************************************/
  11249. +#define DEFAULT_userExceptions (FM_MACSEC_USER_EX_SINGLE_BIT_ECC |\
  11250. + FM_MACSEC_USER_EX_MULTI_BIT_ECC)
  11251. +
  11252. +#define DEFAULT_exceptions (FM_MACSEC_EX_TX_SC(0) |\
  11253. + FM_MACSEC_EX_TX_SC(1) |\
  11254. + FM_MACSEC_EX_TX_SC(2) |\
  11255. + FM_MACSEC_EX_TX_SC(3) |\
  11256. + FM_MACSEC_EX_TX_SC(4) |\
  11257. + FM_MACSEC_EX_TX_SC(5) |\
  11258. + FM_MACSEC_EX_TX_SC(6) |\
  11259. + FM_MACSEC_EX_TX_SC(7) |\
  11260. + FM_MACSEC_EX_TX_SC(8) |\
  11261. + FM_MACSEC_EX_TX_SC(9) |\
  11262. + FM_MACSEC_EX_TX_SC(10) |\
  11263. + FM_MACSEC_EX_TX_SC(11) |\
  11264. + FM_MACSEC_EX_TX_SC(12) |\
  11265. + FM_MACSEC_EX_TX_SC(13) |\
  11266. + FM_MACSEC_EX_TX_SC(14) |\
  11267. + FM_MACSEC_EX_TX_SC(15) |\
  11268. + FM_MACSEC_EX_ECC )
  11269. +
  11270. +#define DEFAULT_events (FM_MACSEC_EV_TX_SC_NEXT_PN(0) |\
  11271. + FM_MACSEC_EV_TX_SC_NEXT_PN(1) |\
  11272. + FM_MACSEC_EV_TX_SC_NEXT_PN(2) |\
  11273. + FM_MACSEC_EV_TX_SC_NEXT_PN(3) |\
  11274. + FM_MACSEC_EV_TX_SC_NEXT_PN(4) |\
  11275. + FM_MACSEC_EV_TX_SC_NEXT_PN(5) |\
  11276. + FM_MACSEC_EV_TX_SC_NEXT_PN(6) |\
  11277. + FM_MACSEC_EV_TX_SC_NEXT_PN(7) |\
  11278. + FM_MACSEC_EV_TX_SC_NEXT_PN(8) |\
  11279. + FM_MACSEC_EV_TX_SC_NEXT_PN(9) |\
  11280. + FM_MACSEC_EV_TX_SC_NEXT_PN(10) |\
  11281. + FM_MACSEC_EV_TX_SC_NEXT_PN(11) |\
  11282. + FM_MACSEC_EV_TX_SC_NEXT_PN(12) |\
  11283. + FM_MACSEC_EV_TX_SC_NEXT_PN(13) |\
  11284. + FM_MACSEC_EV_TX_SC_NEXT_PN(14) |\
  11285. + FM_MACSEC_EV_TX_SC_NEXT_PN(15) )
  11286. +
  11287. +#define DEFAULT_unknownSciFrameTreatment e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH
  11288. +#define DEFAULT_invalidTagsFrameTreatment FALSE
  11289. +#define DEFAULT_encryptWithNoChangedTextFrameTreatment FALSE
  11290. +#define DEFAULT_untagFrameTreatment e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED
  11291. +#define DEFAULT_changedTextWithNoEncryptFrameTreatment FALSE
  11292. +#define DEFAULT_onlyScbIsSetFrameTreatment FALSE
  11293. +#define DEFAULT_keysUnreadable FALSE
  11294. +#define DEFAULT_normalMode TRUE
  11295. +#define DEFAULT_sc0ReservedForPTP FALSE
  11296. +#define DEFAULT_initNextPn 1
  11297. +#define DEFAULT_pnExhThr 0xffffffff
  11298. +#define DEFAULT_sectagOverhead (MACSEC_ICV_SIZE + MACSEC_SECTAG_SIZE)
  11299. +#define DEFAULT_mflSubtract MACSEC_FCS_SIZE
  11300. +
  11301. +
  11302. +/**************************************************************************//**
  11303. + @Description Memory Mapped Registers
  11304. +*//***************************************************************************/
  11305. +
  11306. +#if defined(__MWERKS__) && !defined(__GNUC__)
  11307. +#pragma pack(push,1)
  11308. +#endif /* defined(__MWERKS__) && ... */
  11309. +
  11310. +typedef _Packed struct
  11311. +{
  11312. + /* MACsec configuration */
  11313. + volatile uint32_t cfg; /**< MACsec configuration */
  11314. + volatile uint32_t et; /**< MACsec EtherType */
  11315. + volatile uint8_t res1[56]; /**< reserved */
  11316. + volatile uint32_t mfl; /**< Maximum Frame Length */
  11317. + volatile uint32_t tpnet; /**< TX Packet Number exhaustion threshold */
  11318. + volatile uint8_t res2[56]; /**< reserved */
  11319. + volatile uint32_t rxsca; /**< RX SC access select */
  11320. + volatile uint8_t res3[60]; /**< reserved */
  11321. + volatile uint32_t txsca; /**< TX SC access select */
  11322. + volatile uint8_t res4[60]; /**< reserved */
  11323. +
  11324. + /* RX configuration, status and statistic */
  11325. + volatile uint32_t rxsci1h; /**< RX Secure Channel Identifier first half */
  11326. + volatile uint32_t rxsci2h; /**< RX Secure Channel Identifier second half */
  11327. + volatile uint8_t res5[8]; /**< reserved */
  11328. + volatile uint32_t ifio1hs; /**< ifInOctets first half Statistic */
  11329. + volatile uint32_t ifio2hs; /**< ifInOctets second half Statistic */
  11330. + volatile uint32_t ifiups; /**< ifInUcastPkts Statistic */
  11331. + volatile uint8_t res6[4]; /**< reserved */
  11332. + volatile uint32_t ifimps; /**< ifInMulticastPkts Statistic */
  11333. + volatile uint32_t ifibps; /**< ifInBroadcastPkts Statistic */
  11334. + volatile uint32_t rxsccfg; /**< RX Secure Channel configuration */
  11335. + volatile uint32_t rpw; /**< replayWindow */
  11336. + volatile uint8_t res7[16]; /**< reserved */
  11337. + volatile uint32_t inov1hs; /**< InOctetsValidated first half Statistic */
  11338. + volatile uint32_t inov2hs; /**< InOctetsValidated second half Statistic */
  11339. + volatile uint32_t inod1hs; /**< InOctetsDecrypted first half Statistic */
  11340. + volatile uint32_t inod2hs; /**< InOctetsDecrypted second half Statistic */
  11341. + volatile uint32_t rxscipus; /**< RX Secure Channel InPktsUnchecked Statistic */
  11342. + volatile uint32_t rxscipds; /**< RX Secure Channel InPktsDelayed Statistic */
  11343. + volatile uint32_t rxscipls; /**< RX Secure Channel InPktsLate Statistic */
  11344. + volatile uint8_t res8[4]; /**< reserved */
  11345. + volatile uint32_t rxaninuss[MAX_NUM_OF_SA_PER_SC]; /**< RX AN 0-3 InNotUsingSA Statistic */
  11346. + volatile uint32_t rxanipuss[MAX_NUM_OF_SA_PER_SC]; /**< RX AN 0-3 InPktsUnusedSA Statistic */
  11347. + _Packed struct
  11348. + {
  11349. + volatile uint32_t rxsacs; /**< RX Security Association configuration and status */
  11350. + volatile uint32_t rxsanpn; /**< RX Security Association nextPN */
  11351. + volatile uint32_t rxsalpn; /**< RX Security Association lowestPN */
  11352. + volatile uint32_t rxsaipos; /**< RX Security Association InPktsOK Statistic */
  11353. + volatile uint32_t rxsak[4]; /**< RX Security Association key (128 bit) */
  11354. + volatile uint32_t rxsah[4]; /**< RX Security Association hash (128 bit) */
  11355. + volatile uint32_t rxsaipis; /**< RX Security Association InPktsInvalid Statistic */
  11356. + volatile uint32_t rxsaipnvs; /**< RX Security Association InPktsNotValid Statistic */
  11357. + volatile uint8_t res9[8]; /**< reserved */
  11358. + } _PackedType fmMacsecRxScSa[NUM_OF_SA_PER_RX_SC];
  11359. +
  11360. + /* TX configuration, status and statistic */
  11361. + volatile uint32_t txsci1h; /**< TX Secure Channel Identifier first half */
  11362. + volatile uint32_t txsci2h; /**< TX Secure Channel Identifier second half */
  11363. + volatile uint8_t res10[8]; /**< reserved */
  11364. + volatile uint32_t ifoo1hs; /**< ifOutOctets first half Statistic */
  11365. + volatile uint32_t ifoo2hs; /**< ifOutOctets second half Statistic */
  11366. + volatile uint32_t ifoups; /**< ifOutUcastPkts Statistic */
  11367. + volatile uint32_t opus; /**< OutPktsUntagged Statistic */
  11368. + volatile uint32_t ifomps; /**< ifOutMulticastPkts Statistic */
  11369. + volatile uint32_t ifobps; /**< ifOutBroadcastPkts Statistic */
  11370. + volatile uint32_t txsccfg; /**< TX Secure Channel configuration */
  11371. + volatile uint32_t optls; /**< OutPktsTooLong Statistic */
  11372. + volatile uint8_t res11[16]; /**< reserved */
  11373. + volatile uint32_t oop1hs; /**< OutOctetsProtected first half Statistic */
  11374. + volatile uint32_t oop2hs; /**< OutOctetsProtected second half Statistic */
  11375. + volatile uint32_t ooe1hs; /**< OutOctetsEncrypted first half Statistic */
  11376. + volatile uint32_t ooe2hs; /**< OutOctetsEncrypted second half Statistic */
  11377. + volatile uint8_t res12[48]; /**< reserved */
  11378. + _Packed struct
  11379. + {
  11380. + volatile uint32_t txsacs; /**< TX Security Association configuration and status */
  11381. + volatile uint32_t txsanpn; /**< TX Security Association nextPN */
  11382. + volatile uint32_t txsaopps; /**< TX Security Association OutPktsProtected Statistic */
  11383. + volatile uint32_t txsaopes; /**< TX Security Association OutPktsEncrypted Statistic */
  11384. + volatile uint32_t txsak[4]; /**< TX Security Association key (128 bit) */
  11385. + volatile uint32_t txsah[4]; /**< TX Security Association hash (128 bit) */
  11386. + volatile uint8_t res13[16]; /**< reserved */
  11387. + } _PackedType fmMacsecTxScSa[NUM_OF_SA_PER_TX_SC];
  11388. + volatile uint8_t res14[248]; /**< reserved */
  11389. +
  11390. + /* Global configuration and status */
  11391. + volatile uint32_t ip_rev1; /**< MACsec IP Block Revision 1 register */
  11392. + volatile uint32_t ip_rev2; /**< MACsec IP Block Revision 2 register */
  11393. + volatile uint32_t evr; /**< MACsec Event Register */
  11394. + volatile uint32_t ever; /**< MACsec Event Enable Register */
  11395. + volatile uint32_t evfr; /**< MACsec Event Force Register */
  11396. + volatile uint32_t err; /**< MACsec Error Register */
  11397. + volatile uint32_t erer; /**< MACsec Error Enable Register */
  11398. + volatile uint32_t erfr; /**< MACsec Error Force Register */
  11399. + volatile uint8_t res15[40]; /**< reserved */
  11400. + volatile uint32_t meec; /**< MACsec Memory ECC Error Capture Register */
  11401. + volatile uint32_t idle; /**< MACsec Idle status Register */
  11402. + volatile uint8_t res16[184]; /**< reserved */
  11403. + /* DEBUG */
  11404. + volatile uint32_t rxec; /**< MACsec RX error capture Register */
  11405. + volatile uint8_t res17[28]; /**< reserved */
  11406. + volatile uint32_t txec; /**< MACsec TX error capture Register */
  11407. + volatile uint8_t res18[220]; /**< reserved */
  11408. +
  11409. + /* Macsec Rx global statistic */
  11410. + volatile uint32_t ifiocp1hs; /**< ifInOctetsCp first half Statistic */
  11411. + volatile uint32_t ifiocp2hs; /**< ifInOctetsCp second half Statistic */
  11412. + volatile uint32_t ifiupcps; /**< ifInUcastPktsCp Statistic */
  11413. + volatile uint8_t res19[4]; /**< reserved */
  11414. + volatile uint32_t ifioup1hs; /**< ifInOctetsUp first half Statistic */
  11415. + volatile uint32_t ifioup2hs; /**< ifInOctetsUp second half Statistic */
  11416. + volatile uint32_t ifiupups; /**< ifInUcastPktsUp Statistic */
  11417. + volatile uint8_t res20[4]; /**< reserved */
  11418. + volatile uint32_t ifimpcps; /**< ifInMulticastPktsCp Statistic */
  11419. + volatile uint32_t ifibpcps; /**< ifInBroadcastPktsCp Statistic */
  11420. + volatile uint32_t ifimpups; /**< ifInMulticastPktsUp Statistic */
  11421. + volatile uint32_t ifibpups; /**< ifInBroadcastPktsUp Statistic */
  11422. + volatile uint32_t ipwts; /**< InPktsWithoutTag Statistic */
  11423. + volatile uint32_t ipkays; /**< InPktsKaY Statistic */
  11424. + volatile uint32_t ipbts; /**< InPktsBadTag Statistic */
  11425. + volatile uint32_t ipsnfs; /**< InPktsSCINotFound Statistic */
  11426. + volatile uint32_t ipuecs; /**< InPktsUnsupportedEC Statistic */
  11427. + volatile uint32_t ipescbs; /**< InPktsEponSingleCopyBroadcast Statistic */
  11428. + volatile uint32_t iptls; /**< InPktsTooLong Statistic */
  11429. + volatile uint8_t res21[52]; /**< reserved */
  11430. +
  11431. + /* Macsec Tx global statistic */
  11432. + volatile uint32_t opds; /**< OutPktsDiscarded Statistic */
  11433. +#if (DPAA_VERSION >= 11)
  11434. + volatile uint8_t res22[124]; /**< reserved */
  11435. + _Packed struct
  11436. + {
  11437. + volatile uint32_t rxsak[8]; /**< RX Security Association key (128/256 bit) */
  11438. + volatile uint8_t res23[32]; /**< reserved */
  11439. + } _PackedType rxScSaKey[NUM_OF_SA_PER_RX_SC];
  11440. + _Packed struct
  11441. + {
  11442. + volatile uint32_t txsak[8]; /**< TX Security Association key (128/256 bit) */
  11443. + volatile uint8_t res24[32]; /**< reserved */
  11444. + } _PackedType txScSaKey[NUM_OF_SA_PER_TX_SC];
  11445. +#endif /* (DPAA_VERSION >= 11) */
  11446. +} _PackedType t_FmMacsecRegs;
  11447. +
  11448. +#if defined(__MWERKS__) && !defined(__GNUC__)
  11449. +#pragma pack(pop)
  11450. +#endif /* defined(__MWERKS__) && ... */
  11451. +
  11452. +
  11453. +/**************************************************************************//**
  11454. + @Description General defines
  11455. +*//***************************************************************************/
  11456. +
  11457. +#define SCI_HIGH_MASK 0xffffffff00000000LL
  11458. +#define SCI_LOW_MASK 0x00000000ffffffffLL
  11459. +
  11460. +#define LONG_SHIFT 32
  11461. +
  11462. +#define GET_SCI_FIRST_HALF(sci) (uint32_t)((macsecSCI_t)((macsecSCI_t)(sci) & SCI_HIGH_MASK) >> LONG_SHIFT)
  11463. +#define GET_SCI_SECOND_HALF(sci) (uint32_t)((macsecSCI_t)(sci) & SCI_LOW_MASK)
  11464. +
  11465. +/**************************************************************************//**
  11466. + @Description Configuration defines
  11467. +*//***************************************************************************/
  11468. +
  11469. +/* masks */
  11470. +#define CFG_UECT 0x00000800
  11471. +#define CFG_ESCBT 0x00000400
  11472. +#define CFG_USFT 0x00000300
  11473. +#define CFG_ITT 0x00000080
  11474. +#define CFG_KFT 0x00000040
  11475. +#define CFG_UFT 0x00000030
  11476. +#define CFG_KSS 0x00000004
  11477. +#define CFG_BYPN 0x00000002
  11478. +#define CFG_S0I 0x00000001
  11479. +
  11480. +#define ET_TYPE 0x0000ffff
  11481. +
  11482. +#define MFL_MAX_LEN 0x0000ffff
  11483. +
  11484. +#define RXSCA_SC_SEL 0x0000000f
  11485. +
  11486. +#define TXSCA_SC_SEL 0x0000000f
  11487. +
  11488. +#define IP_REV_1_IP_ID 0xffff0000
  11489. +#define IP_REV_1_IP_MJ 0x0000ff00
  11490. +#define IP_REV_1_IP_MM 0x000000ff
  11491. +
  11492. +#define IP_REV_2_IP_INT 0x00ff0000
  11493. +#define IP_REV_2_IP_ERR 0x0000ff00
  11494. +#define IP_REV_2_IP_CFG 0x000000ff
  11495. +
  11496. +#define MECC_CAP 0x80000000
  11497. +#define MECC_CET 0x40000000
  11498. +#define MECC_SERCNT 0x00ff0000
  11499. +#define MECC_MEMADDR 0x000001ff
  11500. +
  11501. +/* shifts */
  11502. +#define CFG_UECT_SHIFT (31-20)
  11503. +#define CFG_ESCBT_SHIFT (31-21)
  11504. +#define CFG_USFT_SHIFT (31-23)
  11505. +#define CFG_ITT_SHIFT (31-24)
  11506. +#define CFG_KFT_SHIFT (31-25)
  11507. +#define CFG_UFT_SHIFT (31-27)
  11508. +#define CFG_KSS_SHIFT (31-29)
  11509. +#define CFG_BYPN_SHIFT (31-30)
  11510. +#define CFG_S0I_SHIFT (31-31)
  11511. +
  11512. +#define IP_REV_1_IP_ID_SHIFT (31-15)
  11513. +#define IP_REV_1_IP_MJ_SHIFT (31-23)
  11514. +#define IP_REV_1_IP_MM_SHIFT (31-31)
  11515. +
  11516. +#define IP_REV_2_IP_INT_SHIFT (31-15)
  11517. +#define IP_REV_2_IP_ERR_SHIFT (31-23)
  11518. +#define IP_REV_2_IP_CFG_SHIFT (31-31)
  11519. +
  11520. +#define MECC_CAP_SHIFT (31-0)
  11521. +#define MECC_CET_SHIFT (31-1)
  11522. +#define MECC_SERCNT_SHIFT (31-15)
  11523. +#define MECC_MEMADDR_SHIFT (31-31)
  11524. +
  11525. +/**************************************************************************//**
  11526. + @Description RX SC defines
  11527. +*//***************************************************************************/
  11528. +
  11529. +/* masks */
  11530. +#define RX_SCCFG_SCI_EN_MASK 0x00000800
  11531. +#define RX_SCCFG_RP_MASK 0x00000400
  11532. +#define RX_SCCFG_VF_MASK 0x00000300
  11533. +#define RX_SCCFG_CO_MASK 0x0000003f
  11534. +
  11535. +/* shifts */
  11536. +#define RX_SCCFG_SCI_EN_SHIFT (31-20)
  11537. +#define RX_SCCFG_RP_SHIFT (31-21)
  11538. +#define RX_SCCFG_VF_SHIFT (31-23)
  11539. +#define RX_SCCFG_CO_SHIFT (31-31)
  11540. +#define RX_SCCFG_CS_SHIFT (31-7)
  11541. +
  11542. +/**************************************************************************//**
  11543. + @Description RX SA defines
  11544. +*//***************************************************************************/
  11545. +
  11546. +/* masks */
  11547. +#define RX_SACFG_ACTIVE 0x80000000
  11548. +#define RX_SACFG_AN_MASK 0x00000006
  11549. +#define RX_SACFG_EN_MASK 0x00000001
  11550. +
  11551. +/* shifts */
  11552. +#define RX_SACFG_AN_SHIFT (31-30)
  11553. +#define RX_SACFG_EN_SHIFT (31-31)
  11554. +
  11555. +/**************************************************************************//**
  11556. + @Description TX SC defines
  11557. +*//***************************************************************************/
  11558. +
  11559. +/* masks */
  11560. +#define TX_SCCFG_AN_MASK 0x000c0000
  11561. +#define TX_SCCFG_ASA_MASK 0x00020000
  11562. +#define TX_SCCFG_SCE_MASK 0x00010000
  11563. +#define TX_SCCFG_CO_MASK 0x00003f00
  11564. +#define TX_SCCFG_CE_MASK 0x00000010
  11565. +#define TX_SCCFG_PF_MASK 0x00000008
  11566. +#define TX_SCCFG_AIS_MASK 0x00000004
  11567. +#define TX_SCCFG_UES_MASK 0x00000002
  11568. +#define TX_SCCFG_USCB_MASK 0x00000001
  11569. +
  11570. +/* shifts */
  11571. +#define TX_SCCFG_AN_SHIFT (31-13)
  11572. +#define TX_SCCFG_ASA_SHIFT (31-14)
  11573. +#define TX_SCCFG_SCE_SHIFT (31-15)
  11574. +#define TX_SCCFG_CO_SHIFT (31-23)
  11575. +#define TX_SCCFG_CE_SHIFT (31-27)
  11576. +#define TX_SCCFG_PF_SHIFT (31-28)
  11577. +#define TX_SCCFG_AIS_SHIFT (31-29)
  11578. +#define TX_SCCFG_UES_SHIFT (31-30)
  11579. +#define TX_SCCFG_USCB_SHIFT (31-31)
  11580. +#define TX_SCCFG_CS_SHIFT (31-7)
  11581. +
  11582. +/**************************************************************************//**
  11583. + @Description TX SA defines
  11584. +*//***************************************************************************/
  11585. +
  11586. +/* masks */
  11587. +#define TX_SACFG_ACTIVE 0x80000000
  11588. +
  11589. +
  11590. +typedef struct
  11591. +{
  11592. + void (*f_Isr) (t_Handle h_Arg, uint32_t id);
  11593. + t_Handle h_SrcHandle;
  11594. +} t_FmMacsecIntrSrc;
  11595. +
  11596. +typedef struct
  11597. +{
  11598. + e_FmMacsecUnknownSciFrameTreatment unknownSciTreatMode;
  11599. + bool invalidTagsDeliverUncontrolled;
  11600. + bool changedTextWithNoEncryptDeliverUncontrolled;
  11601. + bool onlyScbIsSetDeliverUncontrolled;
  11602. + bool encryptWithNoChangedTextDiscardUncontrolled;
  11603. + e_FmMacsecUntagFrameTreatment untagTreatMode;
  11604. + uint32_t pnExhThr;
  11605. + bool keysUnreadable;
  11606. + bool byPassMode;
  11607. + bool reservedSc0;
  11608. + uint32_t sectagOverhead;
  11609. + uint32_t mflSubtract;
  11610. +} t_FmMacsecDriverParam;
  11611. +
  11612. +typedef struct
  11613. +{
  11614. + t_FmMacsecControllerDriver fmMacsecControllerDriver;
  11615. + t_Handle h_Fm;
  11616. + t_FmMacsecRegs *p_FmMacsecRegs;
  11617. + t_Handle h_FmMac; /**< A handle to the FM MAC object related to */
  11618. + char fmMacsecModuleName[MODULE_NAME_SIZE];
  11619. + t_FmMacsecIntrSrc intrMng[NUM_OF_INTER_MODULE_EVENTS];
  11620. + uint32_t events;
  11621. + uint32_t exceptions;
  11622. + uint32_t userExceptions;
  11623. + t_FmMacsecExceptionsCallback *f_Exception; /**< Exception Callback Routine */
  11624. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  11625. + be passed by the driver upon calling the above callbacks */
  11626. + bool rxScTable[NUM_OF_RX_SC];
  11627. + uint32_t numRxScAvailable;
  11628. + bool txScTable[NUM_OF_TX_SC];
  11629. + uint32_t numTxScAvailable;
  11630. + t_Handle rxScSpinLock;
  11631. + t_Handle txScSpinLock;
  11632. + t_FmMacsecDriverParam *p_FmMacsecDriverParam;
  11633. +} t_FmMacsec;
  11634. +
  11635. +
  11636. +#endif /* __FM_MACSEC_MASTER_H */
  11637. --- /dev/null
  11638. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.c
  11639. @@ -0,0 +1,883 @@
  11640. +/*
  11641. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  11642. + *
  11643. + * Redistribution and use in source and binary forms, with or without
  11644. + * modification, are permitted provided that the following conditions are met:
  11645. + * * Redistributions of source code must retain the above copyright
  11646. + * notice, this list of conditions and the following disclaimer.
  11647. + * * Redistributions in binary form must reproduce the above copyright
  11648. + * notice, this list of conditions and the following disclaimer in the
  11649. + * documentation and/or other materials provided with the distribution.
  11650. + * * Neither the name of Freescale Semiconductor nor the
  11651. + * names of its contributors may be used to endorse or promote products
  11652. + * derived from this software without specific prior written permission.
  11653. + *
  11654. + *
  11655. + * ALTERNATIVELY, this software may be distributed under the terms of the
  11656. + * GNU General Public License ("GPL") as published by the Free Software
  11657. + * Foundation, either version 2 of that License or (at your option) any
  11658. + * later version.
  11659. + *
  11660. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  11661. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  11662. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  11663. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  11664. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  11665. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  11666. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  11667. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  11668. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  11669. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  11670. + */
  11671. +
  11672. +/******************************************************************************
  11673. + @File fm_macsec_secy.c
  11674. +
  11675. + @Description FM MACSEC SECY driver routines implementation.
  11676. +*//***************************************************************************/
  11677. +
  11678. +#include "std_ext.h"
  11679. +#include "error_ext.h"
  11680. +#include "xx_ext.h"
  11681. +#include "string_ext.h"
  11682. +#include "sprint_ext.h"
  11683. +
  11684. +#include "fm_macsec_secy.h"
  11685. +
  11686. +
  11687. +/****************************************/
  11688. +/* static functions */
  11689. +/****************************************/
  11690. +static void FmMacsecSecYExceptionsIsr(t_Handle h_FmMacsecSecY, uint32_t id)
  11691. +{
  11692. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  11693. +
  11694. + UNUSED(id);
  11695. + SANITY_CHECK_RETURN(p_FmMacsecSecY, E_INVALID_HANDLE);
  11696. +
  11697. + if (p_FmMacsecSecY->exceptions & FM_MACSEC_SECY_EX_FRAME_DISCARDED)
  11698. + p_FmMacsecSecY->f_Exception(p_FmMacsecSecY->h_App, e_FM_MACSEC_SECY_EX_FRAME_DISCARDED);
  11699. +}
  11700. +
  11701. +static void FmMacsecSecYEventsIsr(t_Handle h_FmMacsecSecY, uint32_t id)
  11702. +{
  11703. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  11704. +
  11705. + UNUSED(id);
  11706. + SANITY_CHECK_RETURN(p_FmMacsecSecY, E_INVALID_HANDLE);
  11707. +
  11708. + if (p_FmMacsecSecY->events & FM_MACSEC_SECY_EV_NEXT_PN)
  11709. + p_FmMacsecSecY->f_Event(p_FmMacsecSecY->h_App, e_FM_MACSEC_SECY_EV_NEXT_PN);
  11710. +}
  11711. +
  11712. +static t_Error CheckFmMacsecSecYParameters(t_FmMacsecSecY *p_FmMacsecSecY)
  11713. +{
  11714. + if (!p_FmMacsecSecY->f_Exception)
  11715. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
  11716. +
  11717. + if (!p_FmMacsecSecY->f_Event)
  11718. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Events callback not provided"));
  11719. +
  11720. + if (!p_FmMacsecSecY->numOfRxSc)
  11721. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Num of Rx Scs must be greater than '0'"));
  11722. +
  11723. +
  11724. + return E_OK;
  11725. +}
  11726. +
  11727. +static t_Handle FmMacsecSecYCreateSc(t_FmMacsecSecY *p_FmMacsecSecY,
  11728. + macsecSCI_t sci,
  11729. + e_FmMacsecSecYCipherSuite cipherSuite,
  11730. + e_ScType type)
  11731. +{
  11732. + t_SecYSc *p_ScTable;
  11733. + void *p_Params;
  11734. + uint32_t numOfSc,i;
  11735. + t_Error err = E_OK;
  11736. + t_RxScParams rxScParams;
  11737. + t_TxScParams txScParams;
  11738. +
  11739. + ASSERT_COND(p_FmMacsecSecY);
  11740. + ASSERT_COND(p_FmMacsecSecY->h_FmMacsec);
  11741. +
  11742. + if (type == e_SC_RX)
  11743. + {
  11744. + memset(&rxScParams, 0, sizeof(rxScParams));
  11745. + i = (NUM_OF_RX_SC - 1);
  11746. + p_ScTable = p_FmMacsecSecY->p_RxSc;
  11747. + numOfSc = p_FmMacsecSecY->numOfRxSc;
  11748. + rxScParams.confidentialityOffset = p_FmMacsecSecY->confidentialityOffset;
  11749. + rxScParams.replayProtect = p_FmMacsecSecY->replayProtect;
  11750. + rxScParams.replayWindow = p_FmMacsecSecY->replayWindow;
  11751. + rxScParams.validateFrames = p_FmMacsecSecY->validateFrames;
  11752. + rxScParams.cipherSuite = cipherSuite;
  11753. + p_Params = &rxScParams;
  11754. + }
  11755. + else
  11756. + {
  11757. + memset(&txScParams, 0, sizeof(txScParams));
  11758. + i = (NUM_OF_TX_SC - 1);
  11759. + p_ScTable = p_FmMacsecSecY->p_TxSc;
  11760. + numOfSc = p_FmMacsecSecY->numOfTxSc;
  11761. + txScParams.sciInsertionMode = p_FmMacsecSecY->sciInsertionMode;
  11762. + txScParams.protectFrames = p_FmMacsecSecY->protectFrames;
  11763. + txScParams.confidentialityEnable = p_FmMacsecSecY->confidentialityEnable;
  11764. + txScParams.confidentialityOffset = p_FmMacsecSecY->confidentialityOffset;
  11765. + txScParams.cipherSuite = cipherSuite;
  11766. + p_Params = &txScParams;
  11767. + }
  11768. +
  11769. + for (i=0;i<numOfSc;i++)
  11770. + if (!p_ScTable[i].inUse)
  11771. + break;
  11772. + if (i == numOfSc)
  11773. + {
  11774. + REPORT_ERROR(MAJOR, E_FULL, ("FM MACSEC SECY SC"));
  11775. + return NULL;
  11776. + }
  11777. +
  11778. + if (type == e_SC_RX)
  11779. + {
  11780. + ((t_RxScParams *)p_Params)->scId = p_ScTable[i].scId;
  11781. + ((t_RxScParams *)p_Params)->sci = sci;
  11782. + if ((err = FmMacsecCreateRxSc(p_FmMacsecSecY->h_FmMacsec, (t_RxScParams *)p_Params)) != E_OK)
  11783. + {
  11784. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY RX SC"));
  11785. + return NULL;
  11786. + }
  11787. + }
  11788. + else
  11789. + {
  11790. + ((t_TxScParams *)p_Params)->scId = p_ScTable[i].scId;
  11791. + ((t_TxScParams *)p_Params)->sci = sci;
  11792. + if ((err = FmMacsecCreateTxSc(p_FmMacsecSecY->h_FmMacsec, (t_TxScParams *)p_Params)) != E_OK)
  11793. + {
  11794. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY TX SC"));
  11795. + return NULL;
  11796. + }
  11797. + }
  11798. +
  11799. + p_ScTable[i].inUse = TRUE;
  11800. + return &p_ScTable[i];
  11801. +}
  11802. +
  11803. +static t_Error FmMacsecSecYDeleteSc(t_FmMacsecSecY *p_FmMacsecSecY, t_SecYSc *p_FmSecYSc, e_ScType type)
  11804. +{
  11805. + t_Error err = E_OK;
  11806. +
  11807. + ASSERT_COND(p_FmMacsecSecY);
  11808. + ASSERT_COND(p_FmMacsecSecY->h_FmMacsec);
  11809. + ASSERT_COND(p_FmSecYSc);
  11810. +
  11811. + if (type == e_SC_RX)
  11812. + {
  11813. + if ((err = FmMacsecDeleteRxSc(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId)) != E_OK)
  11814. + RETURN_ERROR(MINOR, err, NO_MSG);
  11815. + }
  11816. + else
  11817. + if ((err = FmMacsecDeleteTxSc(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId)) != E_OK)
  11818. + RETURN_ERROR(MINOR, err, NO_MSG);
  11819. +
  11820. + p_FmSecYSc->inUse = FALSE;
  11821. +
  11822. + return err;
  11823. +}
  11824. +
  11825. +/****************************************/
  11826. +/* API Init unit functions */
  11827. +/****************************************/
  11828. +t_Handle FM_MACSEC_SECY_Config(t_FmMacsecSecYParams *p_FmMacsecSecYParam)
  11829. +{
  11830. + t_FmMacsecSecY *p_FmMacsecSecY;
  11831. +
  11832. + /* Allocate FM MACSEC structure */
  11833. + p_FmMacsecSecY = (t_FmMacsecSecY *) XX_Malloc(sizeof(t_FmMacsecSecY));
  11834. + if (!p_FmMacsecSecY)
  11835. + {
  11836. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY driver structure"));
  11837. + return NULL;
  11838. + }
  11839. + memset(p_FmMacsecSecY, 0, sizeof(t_FmMacsecSecY));
  11840. +
  11841. + /* Allocate the FM MACSEC driver's parameters structure */
  11842. + p_FmMacsecSecY->p_FmMacsecSecYDriverParam = (t_FmMacsecSecYDriverParam *)XX_Malloc(sizeof(t_FmMacsecSecYDriverParam));
  11843. + if (!p_FmMacsecSecY->p_FmMacsecSecYDriverParam)
  11844. + {
  11845. + XX_Free(p_FmMacsecSecY);
  11846. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY driver parameters"));
  11847. + return NULL;
  11848. + }
  11849. + memset(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, 0, sizeof(t_FmMacsecSecYDriverParam));
  11850. +
  11851. + /* Initialize FM MACSEC SECY parameters which will be kept by the driver */
  11852. + p_FmMacsecSecY->h_FmMacsec = p_FmMacsecSecYParam->h_FmMacsec;
  11853. + p_FmMacsecSecY->f_Event = p_FmMacsecSecYParam->f_Event;
  11854. + p_FmMacsecSecY->f_Exception = p_FmMacsecSecYParam->f_Exception;
  11855. + p_FmMacsecSecY->h_App = p_FmMacsecSecYParam->h_App;
  11856. + p_FmMacsecSecY->confidentialityEnable = DEFAULT_confidentialityEnable;
  11857. + p_FmMacsecSecY->confidentialityOffset = DEFAULT_confidentialityOffset;
  11858. + p_FmMacsecSecY->validateFrames = DEFAULT_validateFrames;
  11859. + p_FmMacsecSecY->replayProtect = DEFAULT_replayEnable;
  11860. + p_FmMacsecSecY->replayWindow = DEFAULT_replayWindow;
  11861. + p_FmMacsecSecY->protectFrames = DEFAULT_protectFrames;
  11862. + p_FmMacsecSecY->sciInsertionMode = DEFAULT_sciInsertionMode;
  11863. + p_FmMacsecSecY->isPointToPoint = DEFAULT_ptp;
  11864. + p_FmMacsecSecY->numOfRxSc = p_FmMacsecSecYParam->numReceiveChannels;
  11865. + p_FmMacsecSecY->numOfTxSc = DEFAULT_numOfTxSc;
  11866. + p_FmMacsecSecY->exceptions = DEFAULT_exceptions;
  11867. + p_FmMacsecSecY->events = DEFAULT_events;
  11868. +
  11869. + memcpy(&p_FmMacsecSecY->p_FmMacsecSecYDriverParam->txScParams,
  11870. + &p_FmMacsecSecYParam->txScParams,
  11871. + sizeof(t_FmMacsecSecYSCParams));
  11872. + return p_FmMacsecSecY;
  11873. +}
  11874. +
  11875. +t_Error FM_MACSEC_SECY_Init(t_Handle h_FmMacsecSecY)
  11876. +{
  11877. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  11878. + t_FmMacsecSecYDriverParam *p_FmMacsecSecYDriverParam = NULL;
  11879. + uint32_t rxScIds[NUM_OF_RX_SC], txScIds[NUM_OF_TX_SC], i, j;
  11880. + t_Error err;
  11881. +
  11882. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  11883. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_HANDLE);
  11884. +
  11885. + CHECK_INIT_PARAMETERS(p_FmMacsecSecY, CheckFmMacsecSecYParameters);
  11886. +
  11887. + p_FmMacsecSecYDriverParam = p_FmMacsecSecY->p_FmMacsecSecYDriverParam;
  11888. +
  11889. + if ((p_FmMacsecSecY->isPointToPoint) &&
  11890. + ((err = FmMacsecSetPTP(p_FmMacsecSecY->h_FmMacsec, TRUE)) != E_OK))
  11891. + RETURN_ERROR(MAJOR, err, ("Can't set Poin-to-Point"));
  11892. +
  11893. + /* Rx Sc Allocation */
  11894. + p_FmMacsecSecY->p_RxSc = (t_SecYSc *)XX_Malloc(sizeof(t_SecYSc) * p_FmMacsecSecY->numOfRxSc);
  11895. + if (!p_FmMacsecSecY->p_RxSc)
  11896. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY RX SC"));
  11897. + memset(p_FmMacsecSecY->p_RxSc, 0, sizeof(t_SecYSc) * p_FmMacsecSecY->numOfRxSc);
  11898. + if ((err = FmMacsecAllocScs(p_FmMacsecSecY->h_FmMacsec, e_SC_RX, p_FmMacsecSecY->isPointToPoint, p_FmMacsecSecY->numOfRxSc, rxScIds)) != E_OK)
  11899. + {
  11900. + if (p_FmMacsecSecY->p_TxSc)
  11901. + XX_Free(p_FmMacsecSecY->p_TxSc);
  11902. + if (p_FmMacsecSecY->p_RxSc)
  11903. + XX_Free(p_FmMacsecSecY->p_RxSc);
  11904. + return ERROR_CODE(err);
  11905. + }
  11906. + for (i=0; i<p_FmMacsecSecY->numOfRxSc; i++)
  11907. + {
  11908. + p_FmMacsecSecY->p_RxSc[i].scId = rxScIds[i];
  11909. + p_FmMacsecSecY->p_RxSc[i].type = e_SC_RX;
  11910. + for (j=0; j<MAX_NUM_OF_SA_PER_SC;j++)
  11911. + p_FmMacsecSecY->p_RxSc[i].sa[j].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
  11912. + }
  11913. +
  11914. + /* Tx Sc Allocation */
  11915. + p_FmMacsecSecY->p_TxSc = (t_SecYSc *)XX_Malloc(sizeof(t_SecYSc) * p_FmMacsecSecY->numOfTxSc);
  11916. + if (!p_FmMacsecSecY->p_TxSc)
  11917. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM MACSEC SECY TX SC"));
  11918. + memset(p_FmMacsecSecY->p_TxSc, 0, sizeof(t_SecYSc) * p_FmMacsecSecY->numOfTxSc);
  11919. +
  11920. + if ((err = FmMacsecAllocScs(p_FmMacsecSecY->h_FmMacsec, e_SC_TX, p_FmMacsecSecY->isPointToPoint, p_FmMacsecSecY->numOfTxSc, txScIds)) != E_OK)
  11921. + {
  11922. + if (p_FmMacsecSecY->p_TxSc)
  11923. + XX_Free(p_FmMacsecSecY->p_TxSc);
  11924. + if (p_FmMacsecSecY->p_RxSc)
  11925. + XX_Free(p_FmMacsecSecY->p_RxSc);
  11926. + return ERROR_CODE(err);
  11927. + }
  11928. + for (i=0; i<p_FmMacsecSecY->numOfTxSc; i++)
  11929. + {
  11930. + p_FmMacsecSecY->p_TxSc[i].scId = txScIds[i];
  11931. + p_FmMacsecSecY->p_TxSc[i].type = e_SC_TX;
  11932. + for (j=0; j<MAX_NUM_OF_SA_PER_SC;j++)
  11933. + p_FmMacsecSecY->p_TxSc[i].sa[j].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
  11934. + FmMacsecRegisterIntr(p_FmMacsecSecY->h_FmMacsec,
  11935. + e_FM_MACSEC_MOD_SC_TX,
  11936. + (uint8_t)txScIds[i],
  11937. + e_FM_INTR_TYPE_ERR,
  11938. + FmMacsecSecYExceptionsIsr,
  11939. + p_FmMacsecSecY);
  11940. + FmMacsecRegisterIntr(p_FmMacsecSecY->h_FmMacsec,
  11941. + e_FM_MACSEC_MOD_SC_TX,
  11942. + (uint8_t)txScIds[i],
  11943. + e_FM_INTR_TYPE_NORMAL,
  11944. + FmMacsecSecYEventsIsr,
  11945. + p_FmMacsecSecY);
  11946. +
  11947. + if (p_FmMacsecSecY->exceptions & FM_MACSEC_SECY_EX_FRAME_DISCARDED)
  11948. + FmMacsecSetException(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EX_TX_SC, txScIds[i], TRUE);
  11949. + if (p_FmMacsecSecY->events & FM_MACSEC_SECY_EV_NEXT_PN)
  11950. + FmMacsecSetEvent(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EV_TX_SC_NEXT_PN, txScIds[i], TRUE);
  11951. + }
  11952. +
  11953. + FmMacsecSecYCreateSc(p_FmMacsecSecY,
  11954. + p_FmMacsecSecYDriverParam->txScParams.sci,
  11955. + p_FmMacsecSecYDriverParam->txScParams.cipherSuite,
  11956. + e_SC_TX);
  11957. + XX_Free(p_FmMacsecSecYDriverParam);
  11958. + p_FmMacsecSecY->p_FmMacsecSecYDriverParam = NULL;
  11959. +
  11960. + return E_OK;
  11961. +}
  11962. +
  11963. +t_Error FM_MACSEC_SECY_Free(t_Handle h_FmMacsecSecY)
  11964. +{
  11965. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  11966. + t_Error err = E_OK;
  11967. + uint32_t rxScIds[NUM_OF_RX_SC], txScIds[NUM_OF_TX_SC], i;
  11968. +
  11969. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  11970. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  11971. +
  11972. + if (p_FmMacsecSecY->isPointToPoint)
  11973. + FmMacsecSetPTP(p_FmMacsecSecY->h_FmMacsec, FALSE);
  11974. + if (p_FmMacsecSecY->p_RxSc)
  11975. + {
  11976. + for (i=0; i<p_FmMacsecSecY->numOfRxSc; i++)
  11977. + rxScIds[i] = p_FmMacsecSecY->p_RxSc[i].scId;
  11978. + if ((err = FmMacsecFreeScs(p_FmMacsecSecY->h_FmMacsec, e_SC_RX, p_FmMacsecSecY->numOfRxSc, rxScIds)) != E_OK)
  11979. + return ERROR_CODE(err);
  11980. + XX_Free(p_FmMacsecSecY->p_RxSc);
  11981. + }
  11982. + if (p_FmMacsecSecY->p_TxSc)
  11983. + {
  11984. + FmMacsecSecYDeleteSc(p_FmMacsecSecY, &p_FmMacsecSecY->p_TxSc[0], e_SC_TX);
  11985. +
  11986. + for (i=0; i<p_FmMacsecSecY->numOfTxSc; i++) {
  11987. + txScIds[i] = p_FmMacsecSecY->p_TxSc[i].scId;
  11988. + FmMacsecUnregisterIntr(p_FmMacsecSecY->h_FmMacsec,
  11989. + e_FM_MACSEC_MOD_SC_TX,
  11990. + (uint8_t)txScIds[i],
  11991. + e_FM_INTR_TYPE_ERR);
  11992. + FmMacsecUnregisterIntr(p_FmMacsecSecY->h_FmMacsec,
  11993. + e_FM_MACSEC_MOD_SC_TX,
  11994. + (uint8_t)txScIds[i],
  11995. + e_FM_INTR_TYPE_NORMAL);
  11996. +
  11997. + if (p_FmMacsecSecY->exceptions & FM_MACSEC_SECY_EX_FRAME_DISCARDED)
  11998. + FmMacsecSetException(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EX_TX_SC, txScIds[i], FALSE);
  11999. + if (p_FmMacsecSecY->events & FM_MACSEC_SECY_EV_NEXT_PN)
  12000. + FmMacsecSetEvent(p_FmMacsecSecY->h_FmMacsec, e_FM_MACSEC_EV_TX_SC_NEXT_PN, txScIds[i], FALSE);
  12001. + }
  12002. +
  12003. + if ((err = FmMacsecFreeScs(p_FmMacsecSecY->h_FmMacsec, e_SC_TX, p_FmMacsecSecY->numOfTxSc, txScIds)) != E_OK)
  12004. + return ERROR_CODE(err);
  12005. + XX_Free(p_FmMacsecSecY->p_TxSc);
  12006. + }
  12007. +
  12008. + XX_Free(p_FmMacsecSecY);
  12009. +
  12010. + return err;
  12011. +}
  12012. +
  12013. +t_Error FM_MACSEC_SECY_ConfigSciInsertionMode(t_Handle h_FmMacsecSecY, e_FmMacsecSciInsertionMode sciInsertionMode)
  12014. +{
  12015. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12016. +
  12017. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12018. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12019. +
  12020. + p_FmMacsecSecY->sciInsertionMode = sciInsertionMode;
  12021. +
  12022. + return E_OK;
  12023. +}
  12024. +
  12025. +t_Error FM_MACSEC_SECY_ConfigProtectFrames(t_Handle h_FmMacsecSecY, bool protectFrames)
  12026. +{
  12027. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12028. +
  12029. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12030. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12031. +
  12032. + p_FmMacsecSecY->protectFrames = protectFrames;
  12033. +
  12034. + return E_OK;
  12035. +}
  12036. +
  12037. +t_Error FM_MACSEC_SECY_ConfigReplayWindow(t_Handle h_FmMacsecSecY, bool replayProtect, uint32_t replayWindow)
  12038. +{
  12039. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12040. +
  12041. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12042. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12043. +
  12044. + p_FmMacsecSecY->replayProtect = replayProtect;
  12045. + p_FmMacsecSecY->replayWindow = replayWindow;
  12046. +
  12047. + return E_OK;
  12048. +}
  12049. +
  12050. +t_Error FM_MACSEC_SECY_ConfigValidationMode(t_Handle h_FmMacsecSecY, e_FmMacsecValidFrameBehavior validateFrames)
  12051. +{
  12052. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12053. +
  12054. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12055. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12056. +
  12057. + p_FmMacsecSecY->validateFrames = validateFrames;
  12058. +
  12059. + return E_OK;
  12060. +}
  12061. +
  12062. +t_Error FM_MACSEC_SECY_ConfigConfidentiality(t_Handle h_FmMacsecSecY, bool confidentialityEnable, uint16_t confidentialityOffset)
  12063. +{
  12064. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12065. +
  12066. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12067. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12068. +
  12069. + p_FmMacsecSecY->confidentialityEnable = confidentialityEnable;
  12070. + p_FmMacsecSecY->confidentialityOffset = confidentialityOffset;
  12071. +
  12072. + return E_OK;
  12073. +}
  12074. +
  12075. +t_Error FM_MACSEC_SECY_ConfigPointToPoint(t_Handle h_FmMacsecSecY)
  12076. +{
  12077. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12078. +
  12079. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12080. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12081. +
  12082. + p_FmMacsecSecY->numOfRxSc = 1;
  12083. + p_FmMacsecSecY->isPointToPoint = TRUE;
  12084. + p_FmMacsecSecY->sciInsertionMode = e_FM_MACSEC_SCI_INSERTION_MODE_IMPLICT_PTP;
  12085. +
  12086. + return E_OK;
  12087. +}
  12088. +
  12089. +t_Error FM_MACSEC_SECY_ConfigException(t_Handle h_FmMacsecSecY, e_FmMacsecSecYExceptions exception, bool enable)
  12090. +{
  12091. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12092. + uint32_t bitMask = 0;
  12093. +
  12094. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12095. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12096. +
  12097. + GET_EXCEPTION_FLAG(bitMask, exception);
  12098. + if (bitMask)
  12099. + {
  12100. + if (enable)
  12101. + p_FmMacsecSecY->exceptions |= bitMask;
  12102. + else
  12103. + p_FmMacsecSecY->exceptions &= ~bitMask;
  12104. + }
  12105. + else
  12106. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  12107. +
  12108. + return E_OK;
  12109. +}
  12110. +
  12111. +t_Error FM_MACSEC_SECY_ConfigEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable)
  12112. +{
  12113. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12114. + uint32_t bitMask = 0;
  12115. +
  12116. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12117. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12118. +
  12119. + GET_EVENT_FLAG(bitMask, event);
  12120. + if (bitMask)
  12121. + {
  12122. + if (enable)
  12123. + p_FmMacsecSecY->events |= bitMask;
  12124. + else
  12125. + p_FmMacsecSecY->events &= ~bitMask;
  12126. + }
  12127. + else
  12128. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined event"));
  12129. +
  12130. + return E_OK;
  12131. +}
  12132. +
  12133. +t_Handle FM_MACSEC_SECY_CreateRxSc(t_Handle h_FmMacsecSecY, t_FmMacsecSecYSCParams *p_ScParams)
  12134. +{
  12135. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12136. +
  12137. + SANITY_CHECK_RETURN_VALUE(p_FmMacsecSecY, E_INVALID_HANDLE, NULL);
  12138. + SANITY_CHECK_RETURN_VALUE(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE, NULL);
  12139. + SANITY_CHECK_RETURN_VALUE(p_ScParams, E_NULL_POINTER, NULL);
  12140. + SANITY_CHECK_RETURN_VALUE(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE, NULL);
  12141. +
  12142. + return FmMacsecSecYCreateSc(p_FmMacsecSecY, p_ScParams->sci, p_ScParams->cipherSuite, e_SC_RX);
  12143. +}
  12144. +
  12145. +t_Error FM_MACSEC_SECY_DeleteRxSc(t_Handle h_FmMacsecSecY, t_Handle h_Sc)
  12146. +{
  12147. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12148. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12149. +
  12150. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12151. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12152. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12153. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12154. +
  12155. + return FmMacsecSecYDeleteSc(p_FmMacsecSecY, p_FmSecYSc, e_SC_RX);
  12156. +}
  12157. +
  12158. +t_Error FM_MACSEC_SECY_CreateRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key)
  12159. +{
  12160. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12161. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12162. + t_Error err = E_OK;
  12163. +
  12164. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12165. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12166. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12167. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12168. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12169. +
  12170. + if (p_FmSecYSc->sa[an].saId != SECY_AN_FREE_VALUE)
  12171. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is already assigned",an));
  12172. +
  12173. + if ((err = FmMacsecCreateRxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, (e_ScSaId)p_FmSecYSc->numOfSa, an, lowestPn, key)) != E_OK)
  12174. + RETURN_ERROR(MINOR, err, NO_MSG);
  12175. +
  12176. + p_FmSecYSc->sa[an].saId = (e_ScSaId)p_FmSecYSc->numOfSa++;
  12177. + return err;
  12178. +}
  12179. +
  12180. +t_Error FM_MACSEC_SECY_DeleteRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an)
  12181. +{
  12182. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12183. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12184. + t_Error err = E_OK;
  12185. +
  12186. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12187. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12188. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12189. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12190. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12191. +
  12192. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12193. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is already deleted",an));
  12194. +
  12195. + if ((err = FmMacsecDeleteRxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId)) != E_OK)
  12196. + RETURN_ERROR(MINOR, err, NO_MSG);
  12197. +
  12198. + p_FmSecYSc->numOfSa--;
  12199. + p_FmSecYSc->sa[an].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
  12200. + /* TODO - check if statistics need to be read*/
  12201. + return err;
  12202. +}
  12203. +
  12204. +t_Error FM_MACSEC_SECY_RxSaEnableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an)
  12205. +{
  12206. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12207. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12208. + t_Error err = E_OK;
  12209. +
  12210. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12211. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12212. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12213. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12214. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12215. +
  12216. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12217. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
  12218. +
  12219. + if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, TRUE)) != E_OK)
  12220. + RETURN_ERROR(MINOR, err, NO_MSG);
  12221. +
  12222. + p_FmSecYSc->sa[an].active = TRUE;
  12223. + return err;
  12224. +}
  12225. +
  12226. +t_Error FM_MACSEC_SECY_RxSaDisableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an)
  12227. +{
  12228. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12229. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12230. + t_Error err = E_OK;
  12231. +
  12232. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12233. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12234. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12235. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12236. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12237. +
  12238. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12239. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
  12240. +
  12241. + if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, FALSE)) != E_OK)
  12242. + RETURN_ERROR(MINOR, err, NO_MSG);
  12243. +
  12244. + p_FmSecYSc->sa[an].active = FALSE;
  12245. + return err;
  12246. +}
  12247. +
  12248. +t_Error FM_MACSEC_SECY_RxSaUpdateNextPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtNextPN)
  12249. +{
  12250. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12251. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12252. + t_Error err = E_OK;
  12253. +
  12254. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12255. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12256. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12257. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12258. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12259. +
  12260. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12261. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
  12262. +
  12263. + if ((err = FmMacsecRxSaUpdateNextPn(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, updtNextPN)) != E_OK)
  12264. + RETURN_ERROR(MINOR, err, NO_MSG);
  12265. +
  12266. + return err;
  12267. +}
  12268. +
  12269. +t_Error FM_MACSEC_SECY_RxSaUpdateLowestPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtLowestPN)
  12270. +{
  12271. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12272. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12273. + t_Error err = E_OK;
  12274. +
  12275. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12276. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12277. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12278. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12279. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12280. +
  12281. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12282. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
  12283. +
  12284. + if ((err = FmMacsecRxSaUpdateLowestPn(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, updtLowestPN)) != E_OK)
  12285. + RETURN_ERROR(MINOR, err, NO_MSG);
  12286. +
  12287. + return err;
  12288. +}
  12289. +
  12290. +t_Error FM_MACSEC_SECY_RxSaModifyKey(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, macsecSAKey_t key)
  12291. +{
  12292. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12293. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12294. + t_Error err = E_OK;
  12295. +
  12296. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12297. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12298. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12299. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12300. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12301. +
  12302. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12303. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
  12304. +
  12305. + if (p_FmSecYSc->sa[an].active)
  12306. + if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, FALSE)) != E_OK)
  12307. + RETURN_ERROR(MINOR, err, NO_MSG);
  12308. +
  12309. + /* TODO - statistics should be read */
  12310. +
  12311. + if ((err = FmMacsecCreateRxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, an, 1, key)) != E_OK)
  12312. + RETURN_ERROR(MINOR, err, NO_MSG);
  12313. +
  12314. + if (p_FmSecYSc->sa[an].active)
  12315. + if ((err = FmMacsecRxSaSetReceive(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId, TRUE)) != E_OK)
  12316. + RETURN_ERROR(MINOR, err, NO_MSG);
  12317. + return err;
  12318. +}
  12319. +
  12320. +
  12321. +t_Error FM_MACSEC_SECY_CreateTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an, macsecSAKey_t key)
  12322. +{
  12323. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12324. + t_SecYSc *p_FmSecYSc;
  12325. + t_Error err = E_OK;
  12326. +
  12327. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12328. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12329. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12330. + p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
  12331. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12332. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12333. +
  12334. + if (p_FmSecYSc->sa[an].saId != SECY_AN_FREE_VALUE)
  12335. + RETURN_ERROR(MINOR, err, ("An %d is already assigned",an));
  12336. +
  12337. + if ((err = FmMacsecCreateTxSa(p_FmMacsecSecY->h_FmMacsec,p_FmSecYSc->scId, (e_ScSaId)p_FmSecYSc->numOfSa, key)) != E_OK)
  12338. + RETURN_ERROR(MINOR, err, NO_MSG);
  12339. +
  12340. + p_FmSecYSc->sa[an].saId = (e_ScSaId)p_FmSecYSc->numOfSa++;
  12341. + return err;
  12342. +}
  12343. +
  12344. +t_Error FM_MACSEC_SECY_DeleteTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an)
  12345. +{
  12346. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12347. + t_SecYSc *p_FmSecYSc;
  12348. + t_Error err = E_OK;
  12349. +
  12350. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12351. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12352. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12353. + p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
  12354. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12355. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12356. +
  12357. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12358. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is already deleted",an));
  12359. +
  12360. + if ((err = FmMacsecDeleteTxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[an].saId)) != E_OK)
  12361. + RETURN_ERROR(MINOR, err, NO_MSG);
  12362. +
  12363. + p_FmSecYSc->numOfSa--;
  12364. + p_FmSecYSc->sa[an].saId = (e_ScSaId)SECY_AN_FREE_VALUE;
  12365. + /* TODO - check if statistics need to be read*/
  12366. + return err;
  12367. +}
  12368. +
  12369. +t_Error FM_MACSEC_SECY_TxSaModifyKey(t_Handle h_FmMacsecSecY, macsecAN_t nextActiveAn, macsecSAKey_t key)
  12370. +{
  12371. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12372. + t_SecYSc *p_FmSecYSc;
  12373. + macsecAN_t currentAn;
  12374. + t_Error err = E_OK;
  12375. +
  12376. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12377. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12378. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12379. + p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
  12380. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12381. + SANITY_CHECK_RETURN_ERROR(nextActiveAn < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12382. +
  12383. + if ((err = FmMacsecTxSaGetActive(p_FmMacsecSecY->h_FmMacsec,
  12384. + p_FmSecYSc->scId,
  12385. + &currentAn)) != E_OK)
  12386. + RETURN_ERROR(MINOR, err, NO_MSG);
  12387. +
  12388. + if ((err = FmMacsecTxSaSetActive(p_FmMacsecSecY->h_FmMacsec,
  12389. + p_FmSecYSc->scId,
  12390. + p_FmSecYSc->sa[nextActiveAn].saId,
  12391. + nextActiveAn)) != E_OK)
  12392. + RETURN_ERROR(MINOR, err, NO_MSG);
  12393. +
  12394. + /* TODO - statistics should be read */
  12395. +
  12396. + if ((err = FmMacsecCreateTxSa(p_FmMacsecSecY->h_FmMacsec, p_FmSecYSc->scId, p_FmSecYSc->sa[currentAn].saId, key)) != E_OK)
  12397. + RETURN_ERROR(MINOR, err, NO_MSG);
  12398. +
  12399. + return err;
  12400. +}
  12401. +
  12402. +t_Error FM_MACSEC_SECY_TxSaSetActive(t_Handle h_FmMacsecSecY, macsecAN_t an)
  12403. +{
  12404. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12405. + t_SecYSc *p_FmSecYSc;
  12406. + t_Error err = E_OK;
  12407. +
  12408. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12409. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12410. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12411. + p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
  12412. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12413. + SANITY_CHECK_RETURN_ERROR(an < MAX_NUM_OF_SA_PER_SC, E_INVALID_STATE);
  12414. +
  12415. + if (p_FmSecYSc->sa[an].saId == SECY_AN_FREE_VALUE)
  12416. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("An %d is not configured",an));
  12417. +
  12418. + if ((err = FmMacsecTxSaSetActive(p_FmMacsecSecY->h_FmMacsec,
  12419. + p_FmSecYSc->scId,
  12420. + p_FmSecYSc->sa[an].saId,
  12421. + an)) != E_OK)
  12422. + RETURN_ERROR(MINOR, err, NO_MSG);
  12423. +
  12424. + return err;
  12425. +}
  12426. +
  12427. +t_Error FM_MACSEC_SECY_TxSaGetActive(t_Handle h_FmMacsecSecY, macsecAN_t *p_An)
  12428. +{
  12429. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12430. + t_SecYSc *p_FmSecYSc;
  12431. + t_Error err = E_OK;
  12432. +
  12433. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12434. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12435. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12436. + p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
  12437. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12438. + SANITY_CHECK_RETURN_ERROR(p_An, E_INVALID_HANDLE);
  12439. +
  12440. + if ((err = FmMacsecTxSaGetActive(p_FmMacsecSecY->h_FmMacsec,
  12441. + p_FmSecYSc->scId,
  12442. + p_An)) != E_OK)
  12443. + RETURN_ERROR(MINOR, err, NO_MSG);
  12444. +
  12445. + return err;
  12446. +}
  12447. +
  12448. +t_Error FM_MACSEC_SECY_GetRxScPhysId(t_Handle h_FmMacsecSecY, t_Handle h_Sc, uint32_t *p_ScPhysId)
  12449. +{
  12450. + t_SecYSc *p_FmSecYSc = (t_SecYSc *)h_Sc;
  12451. + t_Error err = E_OK;
  12452. +
  12453. + SANITY_CHECK_RETURN_ERROR(h_FmMacsecSecY, E_INVALID_HANDLE);
  12454. + SANITY_CHECK_RETURN_ERROR(((t_FmMacsecSecY *)h_FmMacsecSecY)->h_FmMacsec, E_INVALID_HANDLE);
  12455. + SANITY_CHECK_RETURN_ERROR(!((t_FmMacsecSecY *)h_FmMacsecSecY)->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12456. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12457. +#ifdef DISABLE_SANITY_CHECKS
  12458. + UNUSED(h_FmMacsecSecY);
  12459. +#endif /* DISABLE_SANITY_CHECKS */
  12460. +
  12461. + *p_ScPhysId = p_FmSecYSc->scId;
  12462. + return err;
  12463. +}
  12464. +
  12465. +t_Error FM_MACSEC_SECY_GetTxScPhysId(t_Handle h_FmMacsecSecY, uint32_t *p_ScPhysId)
  12466. +{
  12467. + t_FmMacsecSecY *p_FmMacsecSecY = (t_FmMacsecSecY *)h_FmMacsecSecY;
  12468. + t_SecYSc *p_FmSecYSc;
  12469. + t_Error err = E_OK;
  12470. +
  12471. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY, E_INVALID_HANDLE);
  12472. + SANITY_CHECK_RETURN_ERROR(p_FmMacsecSecY->h_FmMacsec, E_INVALID_HANDLE);
  12473. + SANITY_CHECK_RETURN_ERROR(!p_FmMacsecSecY->p_FmMacsecSecYDriverParam, E_INVALID_STATE);
  12474. + p_FmSecYSc = &p_FmMacsecSecY->p_TxSc[0];
  12475. + SANITY_CHECK_RETURN_ERROR(p_FmSecYSc, E_INVALID_HANDLE);
  12476. +
  12477. + *p_ScPhysId = p_FmSecYSc->scId;
  12478. + return err;
  12479. +}
  12480. +
  12481. +t_Error FM_MACSEC_SECY_SetException(t_Handle h_FmMacsecSecY, e_FmMacsecExceptions exception, bool enable)
  12482. +{
  12483. + UNUSED(h_FmMacsecSecY);UNUSED(exception);UNUSED(enable);
  12484. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  12485. +}
  12486. +
  12487. +t_Error FM_MACSEC_SECY_SetEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable)
  12488. +{
  12489. + UNUSED(h_FmMacsecSecY);UNUSED(event);UNUSED(enable);
  12490. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  12491. +}
  12492. +
  12493. +t_Error FM_MACSEC_SECY_GetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYStatistics *p_Statistics)
  12494. +{
  12495. + UNUSED(h_FmMacsecSecY);UNUSED(p_Statistics);
  12496. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  12497. +}
  12498. +
  12499. +t_Error FM_MACSEC_SECY_RxScGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, t_FmMacsecSecYRxScStatistics *p_Statistics)
  12500. +{
  12501. + UNUSED(h_FmMacsecSecY);UNUSED(h_Sc);UNUSED(p_Statistics);
  12502. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  12503. +}
  12504. +
  12505. +t_Error FM_MACSEC_SECY_RxSaGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, t_FmMacsecSecYRxSaStatistics *p_Statistics)
  12506. +{
  12507. + UNUSED(h_FmMacsecSecY);UNUSED(h_Sc);UNUSED(an);UNUSED(p_Statistics);
  12508. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  12509. +}
  12510. +
  12511. +t_Error FM_MACSEC_SECY_TxScGetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYTxScStatistics *p_Statistics)
  12512. +{
  12513. + UNUSED(h_FmMacsecSecY);UNUSED(p_Statistics);
  12514. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  12515. +}
  12516. +
  12517. +t_Error FM_MACSEC_SECY_TxSaGetStatistics(t_Handle h_FmMacsecSecY, macsecAN_t an, t_FmMacsecSecYTxSaStatistics *p_Statistics)
  12518. +{
  12519. + UNUSED(h_FmMacsecSecY);UNUSED(an);UNUSED(p_Statistics);
  12520. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  12521. +}
  12522. +
  12523. --- /dev/null
  12524. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MACSEC/fm_macsec_secy.h
  12525. @@ -0,0 +1,144 @@
  12526. +/*
  12527. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  12528. + *
  12529. + * Redistribution and use in source and binary forms, with or without
  12530. + * modification, are permitted provided that the following conditions are met:
  12531. + * * Redistributions of source code must retain the above copyright
  12532. + * notice, this list of conditions and the following disclaimer.
  12533. + * * Redistributions in binary form must reproduce the above copyright
  12534. + * notice, this list of conditions and the following disclaimer in the
  12535. + * documentation and/or other materials provided with the distribution.
  12536. + * * Neither the name of Freescale Semiconductor nor the
  12537. + * names of its contributors may be used to endorse or promote products
  12538. + * derived from this software without specific prior written permission.
  12539. + *
  12540. + *
  12541. + * ALTERNATIVELY, this software may be distributed under the terms of the
  12542. + * GNU General Public License ("GPL") as published by the Free Software
  12543. + * Foundation, either version 2 of that License or (at your option) any
  12544. + * later version.
  12545. + *
  12546. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  12547. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  12548. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  12549. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  12550. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  12551. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  12552. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  12553. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  12554. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  12555. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  12556. + */
  12557. +
  12558. +/******************************************************************************
  12559. + @File fm_macsec_secy.h
  12560. +
  12561. + @Description FM MACSEC SecY internal structures and definitions.
  12562. +*//***************************************************************************/
  12563. +#ifndef __FM_MACSEC_SECY_H
  12564. +#define __FM_MACSEC_SECY_H
  12565. +
  12566. +#include "error_ext.h"
  12567. +#include "std_ext.h"
  12568. +
  12569. +#include "fm_macsec.h"
  12570. +
  12571. +
  12572. +/**************************************************************************//**
  12573. + @Description Exceptions
  12574. +*//***************************************************************************/
  12575. +
  12576. +#define FM_MACSEC_SECY_EX_FRAME_DISCARDED 0x80000000
  12577. +
  12578. +#define GET_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \
  12579. + case e_FM_MACSEC_SECY_EX_FRAME_DISCARDED: \
  12580. + bitMask = FM_MACSEC_SECY_EX_FRAME_DISCARDED; break; \
  12581. + default: bitMask = 0;break;}
  12582. +
  12583. +/**************************************************************************//**
  12584. + @Description Events
  12585. +*//***************************************************************************/
  12586. +
  12587. +#define FM_MACSEC_SECY_EV_NEXT_PN 0x80000000
  12588. +
  12589. +#define GET_EVENT_FLAG(bitMask, event) switch (event){ \
  12590. + case e_FM_MACSEC_SECY_EV_NEXT_PN: \
  12591. + bitMask = FM_MACSEC_SECY_EV_NEXT_PN; break; \
  12592. + default: bitMask = 0;break;}
  12593. +
  12594. +/**************************************************************************//**
  12595. + @Description Defaults
  12596. +*//***************************************************************************/
  12597. +
  12598. +#define DEFAULT_exceptions (FM_MACSEC_SECY_EX_FRAME_DISCARDED)
  12599. +#define DEFAULT_events (FM_MACSEC_SECY_EV_NEXT_PN)
  12600. +#define DEFAULT_numOfTxSc 1
  12601. +#define DEFAULT_confidentialityEnable FALSE
  12602. +#define DEFAULT_confidentialityOffset 0
  12603. +#define DEFAULT_sciInsertionMode e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG
  12604. +#define DEFAULT_validateFrames e_FM_MACSEC_VALID_FRAME_BEHAVIOR_STRICT
  12605. +#define DEFAULT_replayEnable FALSE
  12606. +#define DEFAULT_replayWindow 0
  12607. +#define DEFAULT_protectFrames TRUE
  12608. +#define DEFAULT_ptp FALSE
  12609. +
  12610. +/**************************************************************************//**
  12611. + @Description General defines
  12612. +*//***************************************************************************/
  12613. +
  12614. +#define SECY_AN_FREE_VALUE MAX_NUM_OF_SA_PER_SC
  12615. +
  12616. +
  12617. +typedef struct {
  12618. + e_ScSaId saId;
  12619. + bool active;
  12620. + union {
  12621. + t_FmMacsecSecYRxSaStatistics rxSaStatistics;
  12622. + t_FmMacsecSecYTxSaStatistics txSaStatistics;
  12623. + };
  12624. +} t_SecYSa;
  12625. +
  12626. +typedef struct {
  12627. + bool inUse;
  12628. + uint32_t scId;
  12629. + e_ScType type;
  12630. + uint8_t numOfSa;
  12631. + t_SecYSa sa[MAX_NUM_OF_SA_PER_SC];
  12632. + union {
  12633. + t_FmMacsecSecYRxScStatistics rxScStatistics;
  12634. + t_FmMacsecSecYTxScStatistics txScStatistics;
  12635. + };
  12636. +} t_SecYSc;
  12637. +
  12638. +typedef struct {
  12639. + t_FmMacsecSecYSCParams txScParams; /**< Tx SC Params */
  12640. +} t_FmMacsecSecYDriverParam;
  12641. +
  12642. +typedef struct {
  12643. + t_Handle h_FmMacsec;
  12644. + bool confidentialityEnable; /**< TRUE - confidentiality protection and integrity protection
  12645. + FALSE - no confidentiality protection, only integrity protection*/
  12646. + uint16_t confidentialityOffset; /**< The number of initial octets of each MSDU without confidentiality protection
  12647. + common values are 0, 30, and 50 */
  12648. + bool replayProtect; /**< replay protection function mode */
  12649. + uint32_t replayWindow; /**< the size of the replay window */
  12650. + e_FmMacsecValidFrameBehavior validateFrames; /**< validation function mode */
  12651. + e_FmMacsecSciInsertionMode sciInsertionMode;
  12652. + bool protectFrames;
  12653. + bool isPointToPoint;
  12654. + e_FmMacsecSecYCipherSuite cipherSuite; /**< Cipher suite to be used for this SecY */
  12655. + uint32_t numOfRxSc; /**< Number of receive channels */
  12656. + uint32_t numOfTxSc; /**< Number of transmit channels */
  12657. + t_SecYSc *p_RxSc;
  12658. + t_SecYSc *p_TxSc;
  12659. + uint32_t events;
  12660. + uint32_t exceptions;
  12661. + t_FmMacsecSecYExceptionsCallback *f_Exception; /**< TODO */
  12662. + t_FmMacsecSecYEventsCallback *f_Event; /**< TODO */
  12663. + t_Handle h_App;
  12664. + t_FmMacsecSecYStatistics statistics;
  12665. + t_FmMacsecSecYDriverParam *p_FmMacsecSecYDriverParam;
  12666. +} t_FmMacsecSecY;
  12667. +
  12668. +
  12669. +#endif /* __FM_MACSEC_SECY_H */
  12670. --- /dev/null
  12671. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Makefile
  12672. @@ -0,0 +1,23 @@
  12673. +#
  12674. +# Makefile for the Freescale Ethernet controllers
  12675. +#
  12676. +ccflags-y += -DVERSION=\"\"
  12677. +#
  12678. +#Include netcomm SW specific definitions
  12679. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  12680. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  12681. +
  12682. +ccflags-y += -I$(NCSW_FM_INC)
  12683. +
  12684. +
  12685. +obj-y += fsl-ncsw-PFM1.o
  12686. +
  12687. +fsl-ncsw-PFM1-objs := fm.o fm_muram.o fman.o
  12688. +
  12689. +obj-y += MAC/
  12690. +obj-y += Pcd/
  12691. +obj-y += SP/
  12692. +obj-y += Port/
  12693. +obj-y += HC/
  12694. +obj-y += Rtc/
  12695. +obj-y += MACSEC/
  12696. --- /dev/null
  12697. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/Makefile
  12698. @@ -0,0 +1,26 @@
  12699. +#
  12700. +# Makefile for the Freescale Ethernet controllers
  12701. +#
  12702. +ccflags-y += -DVERSION=\"\"
  12703. +#
  12704. +#Include netcomm SW specific definitions
  12705. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  12706. +
  12707. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  12708. +
  12709. +ccflags-y += -I$(NCSW_FM_INC)
  12710. +
  12711. +obj-y += fsl-ncsw-Pcd.o
  12712. +
  12713. +fsl-ncsw-Pcd-objs := fman_kg.o fman_prs.o fm_cc.o fm_kg.o fm_pcd.o fm_plcr.o fm_prs.o fm_manip.o
  12714. +
  12715. +ifeq ($(CONFIG_FMAN_V3H),y)
  12716. +fsl-ncsw-Pcd-objs += fm_replic.o
  12717. +endif
  12718. +ifeq ($(CONFIG_FMAN_V3L),y)
  12719. +fsl-ncsw-Pcd-objs += fm_replic.o
  12720. +endif
  12721. +ifeq ($(CONFIG_FMAN_ARM),y)
  12722. +fsl-ncsw-Pcd-objs += fm_replic.o
  12723. +endif
  12724. +
  12725. --- /dev/null
  12726. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/crc64.h
  12727. @@ -0,0 +1,360 @@
  12728. +/*
  12729. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  12730. + *
  12731. + * Redistribution and use in source and binary forms, with or without
  12732. + * modification, are permitted provided that the following conditions are met:
  12733. + * * Redistributions of source code must retain the above copyright
  12734. + * notice, this list of conditions and the following disclaimer.
  12735. + * * Redistributions in binary form must reproduce the above copyright
  12736. + * notice, this list of conditions and the following disclaimer in the
  12737. + * documentation and/or other materials provided with the distribution.
  12738. + * * Neither the name of Freescale Semiconductor nor the
  12739. + * names of its contributors may be used to endorse or promote products
  12740. + * derived from this software without specific prior written permission.
  12741. + *
  12742. + *
  12743. + * ALTERNATIVELY, this software may be distributed under the terms of the
  12744. + * GNU General Public License ("GPL") as published by the Free Software
  12745. + * Foundation, either version 2 of that License or (at your option) any
  12746. + * later version.
  12747. + *
  12748. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  12749. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  12750. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  12751. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  12752. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  12753. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  12754. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  12755. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  12756. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  12757. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  12758. + */
  12759. +
  12760. +
  12761. + /**************************************************************************//**
  12762. + @File crc64.h
  12763. +
  12764. + @Description brief This file contains the CRC64 Table, and __inline__
  12765. + functions used for calculating crc.
  12766. +*//***************************************************************************/
  12767. +#ifndef __CRC64_H
  12768. +#define __CRC64_H
  12769. +
  12770. +#include "std_ext.h"
  12771. +
  12772. +
  12773. +#define BITS_PER_BYTE 8
  12774. +
  12775. +#define CRC64_EXPON_ECMA_182 0xC96C5795D7870F42ULL
  12776. +#define CRC64_DEFAULT_INITVAL 0xFFFFFFFFFFFFFFFFULL
  12777. +
  12778. +#define CRC64_BYTE_MASK 0xFF
  12779. +#define CRC64_TABLE_ENTRIES ( 1 << BITS_PER_BYTE )
  12780. +#define CRC64_ODD_MASK 1
  12781. +
  12782. +
  12783. +/**
  12784. + \brief '64 bit crc' Table
  12785. + */
  12786. +struct crc64_t {
  12787. + uint64_t initial; /**< Initial seed */
  12788. + uint64_t table[CRC64_TABLE_ENTRIES]; /**< CRC table entries */
  12789. +};
  12790. +
  12791. +
  12792. +static struct crc64_t CRC64_ECMA_182 = {
  12793. + CRC64_DEFAULT_INITVAL,
  12794. + {
  12795. + 0x0000000000000000ULL,
  12796. + 0xb32e4cbe03a75f6fULL,
  12797. + 0xf4843657a840a05bULL,
  12798. + 0x47aa7ae9abe7ff34ULL,
  12799. + 0x7bd0c384ff8f5e33ULL,
  12800. + 0xc8fe8f3afc28015cULL,
  12801. + 0x8f54f5d357cffe68ULL,
  12802. + 0x3c7ab96d5468a107ULL,
  12803. + 0xf7a18709ff1ebc66ULL,
  12804. + 0x448fcbb7fcb9e309ULL,
  12805. + 0x0325b15e575e1c3dULL,
  12806. + 0xb00bfde054f94352ULL,
  12807. + 0x8c71448d0091e255ULL,
  12808. + 0x3f5f08330336bd3aULL,
  12809. + 0x78f572daa8d1420eULL,
  12810. + 0xcbdb3e64ab761d61ULL,
  12811. + 0x7d9ba13851336649ULL,
  12812. + 0xceb5ed8652943926ULL,
  12813. + 0x891f976ff973c612ULL,
  12814. + 0x3a31dbd1fad4997dULL,
  12815. + 0x064b62bcaebc387aULL,
  12816. + 0xb5652e02ad1b6715ULL,
  12817. + 0xf2cf54eb06fc9821ULL,
  12818. + 0x41e11855055bc74eULL,
  12819. + 0x8a3a2631ae2dda2fULL,
  12820. + 0x39146a8fad8a8540ULL,
  12821. + 0x7ebe1066066d7a74ULL,
  12822. + 0xcd905cd805ca251bULL,
  12823. + 0xf1eae5b551a2841cULL,
  12824. + 0x42c4a90b5205db73ULL,
  12825. + 0x056ed3e2f9e22447ULL,
  12826. + 0xb6409f5cfa457b28ULL,
  12827. + 0xfb374270a266cc92ULL,
  12828. + 0x48190ecea1c193fdULL,
  12829. + 0x0fb374270a266cc9ULL,
  12830. + 0xbc9d3899098133a6ULL,
  12831. + 0x80e781f45de992a1ULL,
  12832. + 0x33c9cd4a5e4ecdceULL,
  12833. + 0x7463b7a3f5a932faULL,
  12834. + 0xc74dfb1df60e6d95ULL,
  12835. + 0x0c96c5795d7870f4ULL,
  12836. + 0xbfb889c75edf2f9bULL,
  12837. + 0xf812f32ef538d0afULL,
  12838. + 0x4b3cbf90f69f8fc0ULL,
  12839. + 0x774606fda2f72ec7ULL,
  12840. + 0xc4684a43a15071a8ULL,
  12841. + 0x83c230aa0ab78e9cULL,
  12842. + 0x30ec7c140910d1f3ULL,
  12843. + 0x86ace348f355aadbULL,
  12844. + 0x3582aff6f0f2f5b4ULL,
  12845. + 0x7228d51f5b150a80ULL,
  12846. + 0xc10699a158b255efULL,
  12847. + 0xfd7c20cc0cdaf4e8ULL,
  12848. + 0x4e526c720f7dab87ULL,
  12849. + 0x09f8169ba49a54b3ULL,
  12850. + 0xbad65a25a73d0bdcULL,
  12851. + 0x710d64410c4b16bdULL,
  12852. + 0xc22328ff0fec49d2ULL,
  12853. + 0x85895216a40bb6e6ULL,
  12854. + 0x36a71ea8a7ace989ULL,
  12855. + 0x0adda7c5f3c4488eULL,
  12856. + 0xb9f3eb7bf06317e1ULL,
  12857. + 0xfe5991925b84e8d5ULL,
  12858. + 0x4d77dd2c5823b7baULL,
  12859. + 0x64b62bcaebc387a1ULL,
  12860. + 0xd7986774e864d8ceULL,
  12861. + 0x90321d9d438327faULL,
  12862. + 0x231c512340247895ULL,
  12863. + 0x1f66e84e144cd992ULL,
  12864. + 0xac48a4f017eb86fdULL,
  12865. + 0xebe2de19bc0c79c9ULL,
  12866. + 0x58cc92a7bfab26a6ULL,
  12867. + 0x9317acc314dd3bc7ULL,
  12868. + 0x2039e07d177a64a8ULL,
  12869. + 0x67939a94bc9d9b9cULL,
  12870. + 0xd4bdd62abf3ac4f3ULL,
  12871. + 0xe8c76f47eb5265f4ULL,
  12872. + 0x5be923f9e8f53a9bULL,
  12873. + 0x1c4359104312c5afULL,
  12874. + 0xaf6d15ae40b59ac0ULL,
  12875. + 0x192d8af2baf0e1e8ULL,
  12876. + 0xaa03c64cb957be87ULL,
  12877. + 0xeda9bca512b041b3ULL,
  12878. + 0x5e87f01b11171edcULL,
  12879. + 0x62fd4976457fbfdbULL,
  12880. + 0xd1d305c846d8e0b4ULL,
  12881. + 0x96797f21ed3f1f80ULL,
  12882. + 0x2557339fee9840efULL,
  12883. + 0xee8c0dfb45ee5d8eULL,
  12884. + 0x5da24145464902e1ULL,
  12885. + 0x1a083bacedaefdd5ULL,
  12886. + 0xa9267712ee09a2baULL,
  12887. + 0x955cce7fba6103bdULL,
  12888. + 0x267282c1b9c65cd2ULL,
  12889. + 0x61d8f8281221a3e6ULL,
  12890. + 0xd2f6b4961186fc89ULL,
  12891. + 0x9f8169ba49a54b33ULL,
  12892. + 0x2caf25044a02145cULL,
  12893. + 0x6b055fede1e5eb68ULL,
  12894. + 0xd82b1353e242b407ULL,
  12895. + 0xe451aa3eb62a1500ULL,
  12896. + 0x577fe680b58d4a6fULL,
  12897. + 0x10d59c691e6ab55bULL,
  12898. + 0xa3fbd0d71dcdea34ULL,
  12899. + 0x6820eeb3b6bbf755ULL,
  12900. + 0xdb0ea20db51ca83aULL,
  12901. + 0x9ca4d8e41efb570eULL,
  12902. + 0x2f8a945a1d5c0861ULL,
  12903. + 0x13f02d374934a966ULL,
  12904. + 0xa0de61894a93f609ULL,
  12905. + 0xe7741b60e174093dULL,
  12906. + 0x545a57dee2d35652ULL,
  12907. + 0xe21ac88218962d7aULL,
  12908. + 0x5134843c1b317215ULL,
  12909. + 0x169efed5b0d68d21ULL,
  12910. + 0xa5b0b26bb371d24eULL,
  12911. + 0x99ca0b06e7197349ULL,
  12912. + 0x2ae447b8e4be2c26ULL,
  12913. + 0x6d4e3d514f59d312ULL,
  12914. + 0xde6071ef4cfe8c7dULL,
  12915. + 0x15bb4f8be788911cULL,
  12916. + 0xa6950335e42fce73ULL,
  12917. + 0xe13f79dc4fc83147ULL,
  12918. + 0x521135624c6f6e28ULL,
  12919. + 0x6e6b8c0f1807cf2fULL,
  12920. + 0xdd45c0b11ba09040ULL,
  12921. + 0x9aefba58b0476f74ULL,
  12922. + 0x29c1f6e6b3e0301bULL,
  12923. + 0xc96c5795d7870f42ULL,
  12924. + 0x7a421b2bd420502dULL,
  12925. + 0x3de861c27fc7af19ULL,
  12926. + 0x8ec62d7c7c60f076ULL,
  12927. + 0xb2bc941128085171ULL,
  12928. + 0x0192d8af2baf0e1eULL,
  12929. + 0x4638a2468048f12aULL,
  12930. + 0xf516eef883efae45ULL,
  12931. + 0x3ecdd09c2899b324ULL,
  12932. + 0x8de39c222b3eec4bULL,
  12933. + 0xca49e6cb80d9137fULL,
  12934. + 0x7967aa75837e4c10ULL,
  12935. + 0x451d1318d716ed17ULL,
  12936. + 0xf6335fa6d4b1b278ULL,
  12937. + 0xb199254f7f564d4cULL,
  12938. + 0x02b769f17cf11223ULL,
  12939. + 0xb4f7f6ad86b4690bULL,
  12940. + 0x07d9ba1385133664ULL,
  12941. + 0x4073c0fa2ef4c950ULL,
  12942. + 0xf35d8c442d53963fULL,
  12943. + 0xcf273529793b3738ULL,
  12944. + 0x7c0979977a9c6857ULL,
  12945. + 0x3ba3037ed17b9763ULL,
  12946. + 0x888d4fc0d2dcc80cULL,
  12947. + 0x435671a479aad56dULL,
  12948. + 0xf0783d1a7a0d8a02ULL,
  12949. + 0xb7d247f3d1ea7536ULL,
  12950. + 0x04fc0b4dd24d2a59ULL,
  12951. + 0x3886b22086258b5eULL,
  12952. + 0x8ba8fe9e8582d431ULL,
  12953. + 0xcc0284772e652b05ULL,
  12954. + 0x7f2cc8c92dc2746aULL,
  12955. + 0x325b15e575e1c3d0ULL,
  12956. + 0x8175595b76469cbfULL,
  12957. + 0xc6df23b2dda1638bULL,
  12958. + 0x75f16f0cde063ce4ULL,
  12959. + 0x498bd6618a6e9de3ULL,
  12960. + 0xfaa59adf89c9c28cULL,
  12961. + 0xbd0fe036222e3db8ULL,
  12962. + 0x0e21ac88218962d7ULL,
  12963. + 0xc5fa92ec8aff7fb6ULL,
  12964. + 0x76d4de52895820d9ULL,
  12965. + 0x317ea4bb22bfdfedULL,
  12966. + 0x8250e80521188082ULL,
  12967. + 0xbe2a516875702185ULL,
  12968. + 0x0d041dd676d77eeaULL,
  12969. + 0x4aae673fdd3081deULL,
  12970. + 0xf9802b81de97deb1ULL,
  12971. + 0x4fc0b4dd24d2a599ULL,
  12972. + 0xfceef8632775faf6ULL,
  12973. + 0xbb44828a8c9205c2ULL,
  12974. + 0x086ace348f355aadULL,
  12975. + 0x34107759db5dfbaaULL,
  12976. + 0x873e3be7d8faa4c5ULL,
  12977. + 0xc094410e731d5bf1ULL,
  12978. + 0x73ba0db070ba049eULL,
  12979. + 0xb86133d4dbcc19ffULL,
  12980. + 0x0b4f7f6ad86b4690ULL,
  12981. + 0x4ce50583738cb9a4ULL,
  12982. + 0xffcb493d702be6cbULL,
  12983. + 0xc3b1f050244347ccULL,
  12984. + 0x709fbcee27e418a3ULL,
  12985. + 0x3735c6078c03e797ULL,
  12986. + 0x841b8ab98fa4b8f8ULL,
  12987. + 0xadda7c5f3c4488e3ULL,
  12988. + 0x1ef430e13fe3d78cULL,
  12989. + 0x595e4a08940428b8ULL,
  12990. + 0xea7006b697a377d7ULL,
  12991. + 0xd60abfdbc3cbd6d0ULL,
  12992. + 0x6524f365c06c89bfULL,
  12993. + 0x228e898c6b8b768bULL,
  12994. + 0x91a0c532682c29e4ULL,
  12995. + 0x5a7bfb56c35a3485ULL,
  12996. + 0xe955b7e8c0fd6beaULL,
  12997. + 0xaeffcd016b1a94deULL,
  12998. + 0x1dd181bf68bdcbb1ULL,
  12999. + 0x21ab38d23cd56ab6ULL,
  13000. + 0x9285746c3f7235d9ULL,
  13001. + 0xd52f0e859495caedULL,
  13002. + 0x6601423b97329582ULL,
  13003. + 0xd041dd676d77eeaaULL,
  13004. + 0x636f91d96ed0b1c5ULL,
  13005. + 0x24c5eb30c5374ef1ULL,
  13006. + 0x97eba78ec690119eULL,
  13007. + 0xab911ee392f8b099ULL,
  13008. + 0x18bf525d915feff6ULL,
  13009. + 0x5f1528b43ab810c2ULL,
  13010. + 0xec3b640a391f4fadULL,
  13011. + 0x27e05a6e926952ccULL,
  13012. + 0x94ce16d091ce0da3ULL,
  13013. + 0xd3646c393a29f297ULL,
  13014. + 0x604a2087398eadf8ULL,
  13015. + 0x5c3099ea6de60cffULL,
  13016. + 0xef1ed5546e415390ULL,
  13017. + 0xa8b4afbdc5a6aca4ULL,
  13018. + 0x1b9ae303c601f3cbULL,
  13019. + 0x56ed3e2f9e224471ULL,
  13020. + 0xe5c372919d851b1eULL,
  13021. + 0xa26908783662e42aULL,
  13022. + 0x114744c635c5bb45ULL,
  13023. + 0x2d3dfdab61ad1a42ULL,
  13024. + 0x9e13b115620a452dULL,
  13025. + 0xd9b9cbfcc9edba19ULL,
  13026. + 0x6a978742ca4ae576ULL,
  13027. + 0xa14cb926613cf817ULL,
  13028. + 0x1262f598629ba778ULL,
  13029. + 0x55c88f71c97c584cULL,
  13030. + 0xe6e6c3cfcadb0723ULL,
  13031. + 0xda9c7aa29eb3a624ULL,
  13032. + 0x69b2361c9d14f94bULL,
  13033. + 0x2e184cf536f3067fULL,
  13034. + 0x9d36004b35545910ULL,
  13035. + 0x2b769f17cf112238ULL,
  13036. + 0x9858d3a9ccb67d57ULL,
  13037. + 0xdff2a94067518263ULL,
  13038. + 0x6cdce5fe64f6dd0cULL,
  13039. + 0x50a65c93309e7c0bULL,
  13040. + 0xe388102d33392364ULL,
  13041. + 0xa4226ac498dedc50ULL,
  13042. + 0x170c267a9b79833fULL,
  13043. + 0xdcd7181e300f9e5eULL,
  13044. + 0x6ff954a033a8c131ULL,
  13045. + 0x28532e49984f3e05ULL,
  13046. + 0x9b7d62f79be8616aULL,
  13047. + 0xa707db9acf80c06dULL,
  13048. + 0x14299724cc279f02ULL,
  13049. + 0x5383edcd67c06036ULL,
  13050. + 0xe0ada17364673f59ULL
  13051. + }
  13052. +};
  13053. +
  13054. +
  13055. +/**
  13056. + \brief Initializes the crc seed
  13057. + */
  13058. +static __inline__ uint64_t crc64_init(void)
  13059. +{
  13060. + return CRC64_ECMA_182.initial;
  13061. +}
  13062. +
  13063. +/**
  13064. + \brief Computes 64 bit the crc
  13065. + \param[in] data Pointer to the Data in the frame
  13066. + \param[in] len Length of the Data
  13067. + \param[in] crc seed
  13068. + \return calculated crc
  13069. + */
  13070. +static __inline__ uint64_t crc64_compute(void const *data,
  13071. + uint32_t len,
  13072. + uint64_t seed)
  13073. +{
  13074. + uint32_t i;
  13075. + uint64_t crc = seed;
  13076. + uint8_t *bdata = (uint8_t *) data;
  13077. +
  13078. + for (i = 0; i < len; i++)
  13079. + crc =
  13080. + CRC64_ECMA_182.
  13081. + table[(crc ^ *bdata++) & CRC64_BYTE_MASK] ^ (crc >> 8);
  13082. +
  13083. + return crc;
  13084. +}
  13085. +
  13086. +
  13087. +#endif /* __CRC64_H */
  13088. --- /dev/null
  13089. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c
  13090. @@ -0,0 +1,7538 @@
  13091. +/*
  13092. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  13093. + *
  13094. + * Redistribution and use in source and binary forms, with or without
  13095. + * modification, are permitted provided that the following conditions are met:
  13096. + * * Redistributions of source code must retain the above copyright
  13097. + * notice, this list of conditions and the following disclaimer.
  13098. + * * Redistributions in binary form must reproduce the above copyright
  13099. + * notice, this list of conditions and the following disclaimer in the
  13100. + * documentation and/or other materials provided with the distribution.
  13101. + * * Neither the name of Freescale Semiconductor nor the
  13102. + * names of its contributors may be used to endorse or promote products
  13103. + * derived from this software without specific prior written permission.
  13104. + *
  13105. + *
  13106. + * ALTERNATIVELY, this software may be distributed under the terms of the
  13107. + * GNU General Public License ("GPL") as published by the Free Software
  13108. + * Foundation, either version 2 of that License or (at your option) any
  13109. + * later version.
  13110. + *
  13111. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  13112. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  13113. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  13114. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  13115. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  13116. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  13117. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  13118. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  13119. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  13120. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  13121. + */
  13122. +
  13123. +
  13124. +/******************************************************************************
  13125. + @File fm_cc.c
  13126. +
  13127. + @Description FM Coarse Classifier implementation
  13128. + *//***************************************************************************/
  13129. +#include "std_ext.h"
  13130. +#include "error_ext.h"
  13131. +#include "string_ext.h"
  13132. +#include "debug_ext.h"
  13133. +#include "fm_pcd_ext.h"
  13134. +#include "fm_muram_ext.h"
  13135. +
  13136. +#include "fm_common.h"
  13137. +#include "fm_pcd.h"
  13138. +#include "fm_hc.h"
  13139. +#include "fm_cc.h"
  13140. +#include "crc64.h"
  13141. +
  13142. +/****************************************/
  13143. +/* static functions */
  13144. +/****************************************/
  13145. +
  13146. +
  13147. +static t_Error CcRootTryLock(t_Handle h_FmPcdCcTree)
  13148. +{
  13149. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
  13150. +
  13151. + ASSERT_COND(h_FmPcdCcTree);
  13152. +
  13153. + if (FmPcdLockTryLock(p_FmPcdCcTree->p_Lock))
  13154. + return E_OK;
  13155. +
  13156. + return ERROR_CODE(E_BUSY);
  13157. +}
  13158. +
  13159. +static void CcRootReleaseLock(t_Handle h_FmPcdCcTree)
  13160. +{
  13161. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
  13162. +
  13163. + ASSERT_COND(h_FmPcdCcTree);
  13164. +
  13165. + FmPcdLockUnlock(p_FmPcdCcTree->p_Lock);
  13166. +}
  13167. +
  13168. +static void UpdateNodeOwner(t_FmPcdCcNode *p_CcNode, bool add)
  13169. +{
  13170. + uint32_t intFlags;
  13171. +
  13172. + ASSERT_COND(p_CcNode);
  13173. +
  13174. + intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
  13175. +
  13176. + if (add)
  13177. + p_CcNode->owners++;
  13178. + else
  13179. + {
  13180. + ASSERT_COND(p_CcNode->owners);
  13181. + p_CcNode->owners--;
  13182. + }
  13183. +
  13184. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  13185. +}
  13186. +
  13187. +static __inline__ t_FmPcdStatsObj* DequeueStatsObj(t_List *p_List)
  13188. +{
  13189. + t_FmPcdStatsObj *p_StatsObj = NULL;
  13190. + t_List *p_Next;
  13191. +
  13192. + if (!LIST_IsEmpty(p_List))
  13193. + {
  13194. + p_Next = LIST_FIRST(p_List);
  13195. + p_StatsObj = LIST_OBJECT(p_Next, t_FmPcdStatsObj, node);
  13196. + ASSERT_COND(p_StatsObj);
  13197. + LIST_DelAndInit(p_Next);
  13198. + }
  13199. +
  13200. + return p_StatsObj;
  13201. +}
  13202. +
  13203. +static __inline__ void EnqueueStatsObj(t_List *p_List,
  13204. + t_FmPcdStatsObj *p_StatsObj)
  13205. +{
  13206. + LIST_AddToTail(&p_StatsObj->node, p_List);
  13207. +}
  13208. +
  13209. +static void FreeStatObjects(t_List *p_List, t_Handle h_FmMuram)
  13210. +{
  13211. + t_FmPcdStatsObj *p_StatsObj;
  13212. +
  13213. + while (!LIST_IsEmpty(p_List))
  13214. + {
  13215. + p_StatsObj = DequeueStatsObj(p_List);
  13216. + ASSERT_COND(p_StatsObj);
  13217. +
  13218. + FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsAd);
  13219. + FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsCounters);
  13220. +
  13221. + XX_Free(p_StatsObj);
  13222. + }
  13223. +}
  13224. +
  13225. +static t_FmPcdStatsObj* GetStatsObj(t_FmPcdCcNode *p_CcNode)
  13226. +{
  13227. + t_FmPcdStatsObj* p_StatsObj;
  13228. + t_Handle h_FmMuram;
  13229. +
  13230. + ASSERT_COND(p_CcNode);
  13231. +
  13232. + /* If 'maxNumOfKeys' was passed, all statistics object were preallocated
  13233. + upon node initialization */
  13234. + if (p_CcNode->maxNumOfKeys)
  13235. + {
  13236. + p_StatsObj = DequeueStatsObj(&p_CcNode->availableStatsLst);
  13237. + }
  13238. + else
  13239. + {
  13240. + h_FmMuram = ((t_FmPcd *)(p_CcNode->h_FmPcd))->h_FmMuram;
  13241. + ASSERT_COND(h_FmMuram);
  13242. +
  13243. + p_StatsObj = XX_Malloc(sizeof(t_FmPcdStatsObj));
  13244. + if (!p_StatsObj)
  13245. + {
  13246. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("statistics object"));
  13247. + return NULL;
  13248. + }
  13249. +
  13250. + p_StatsObj->h_StatsAd = (t_Handle)FM_MURAM_AllocMem(
  13251. + h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE, FM_PCD_CC_AD_TABLE_ALIGN);
  13252. + if (!p_StatsObj->h_StatsAd)
  13253. + {
  13254. + XX_Free(p_StatsObj);
  13255. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for statistics ADs"));
  13256. + return NULL;
  13257. + }
  13258. + MemSet8(p_StatsObj->h_StatsAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  13259. +
  13260. + p_StatsObj->h_StatsCounters = (t_Handle)FM_MURAM_AllocMem(
  13261. + h_FmMuram, p_CcNode->countersArraySize,
  13262. + FM_PCD_CC_AD_TABLE_ALIGN);
  13263. + if (!p_StatsObj->h_StatsCounters)
  13264. + {
  13265. + FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsAd);
  13266. + XX_Free(p_StatsObj);
  13267. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for statistics counters"));
  13268. + return NULL;
  13269. + }
  13270. + MemSet8(p_StatsObj->h_StatsCounters, 0, p_CcNode->countersArraySize);
  13271. + }
  13272. +
  13273. + return p_StatsObj;
  13274. +}
  13275. +
  13276. +static void PutStatsObj(t_FmPcdCcNode *p_CcNode, t_FmPcdStatsObj *p_StatsObj)
  13277. +{
  13278. + t_Handle h_FmMuram;
  13279. +
  13280. + ASSERT_COND(p_CcNode);
  13281. + ASSERT_COND(p_StatsObj);
  13282. +
  13283. + /* If 'maxNumOfKeys' was passed, all statistics object were preallocated
  13284. + upon node initialization and now will be enqueued back to the list */
  13285. + if (p_CcNode->maxNumOfKeys)
  13286. + {
  13287. + /* Nullify counters */
  13288. + MemSet8(p_StatsObj->h_StatsCounters, 0, p_CcNode->countersArraySize);
  13289. +
  13290. + EnqueueStatsObj(&p_CcNode->availableStatsLst, p_StatsObj);
  13291. + }
  13292. + else
  13293. + {
  13294. + h_FmMuram = ((t_FmPcd *)(p_CcNode->h_FmPcd))->h_FmMuram;
  13295. + ASSERT_COND(h_FmMuram);
  13296. +
  13297. + FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsAd);
  13298. + FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsCounters);
  13299. +
  13300. + XX_Free(p_StatsObj);
  13301. + }
  13302. +}
  13303. +
  13304. +static void SetStatsCounters(t_AdOfTypeStats *p_StatsAd,
  13305. + uint32_t statsCountersAddr)
  13306. +{
  13307. + uint32_t tmp = (statsCountersAddr & FM_PCD_AD_STATS_COUNTERS_ADDR_MASK);
  13308. +
  13309. + WRITE_UINT32(p_StatsAd->statsTableAddr, tmp);
  13310. +}
  13311. +
  13312. +
  13313. +static void UpdateStatsAd(t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
  13314. + t_Handle h_Ad, uint64_t physicalMuramBase)
  13315. +{
  13316. + t_AdOfTypeStats *p_StatsAd;
  13317. + uint32_t statsCountersAddr, nextActionAddr, tmp;
  13318. +#if (DPAA_VERSION >= 11)
  13319. + uint32_t frameLengthRangesAddr;
  13320. +#endif /* (DPAA_VERSION >= 11) */
  13321. +
  13322. + p_StatsAd = (t_AdOfTypeStats *)p_FmPcdCcStatsParams->h_StatsAd;
  13323. +
  13324. + tmp = FM_PCD_AD_STATS_TYPE;
  13325. +
  13326. +#if (DPAA_VERSION >= 11)
  13327. + if (p_FmPcdCcStatsParams->h_StatsFLRs)
  13328. + {
  13329. + frameLengthRangesAddr = (uint32_t)((XX_VirtToPhys(
  13330. + p_FmPcdCcStatsParams->h_StatsFLRs) - physicalMuramBase));
  13331. + tmp |= (frameLengthRangesAddr & FM_PCD_AD_STATS_FLR_ADDR_MASK);
  13332. + }
  13333. +#endif /* (DPAA_VERSION >= 11) */
  13334. + WRITE_UINT32(p_StatsAd->profileTableAddr, tmp);
  13335. +
  13336. + nextActionAddr = (uint32_t)((XX_VirtToPhys(h_Ad) - physicalMuramBase));
  13337. + tmp = 0;
  13338. + tmp |= (uint32_t)((nextActionAddr << FM_PCD_AD_STATS_NEXT_ACTION_SHIFT)
  13339. + & FM_PCD_AD_STATS_NEXT_ACTION_MASK);
  13340. + tmp |= (FM_PCD_AD_STATS_NAD_EN | FM_PCD_AD_STATS_OP_CODE);
  13341. +
  13342. +#if (DPAA_VERSION >= 11)
  13343. + if (p_FmPcdCcStatsParams->h_StatsFLRs)
  13344. + tmp |= FM_PCD_AD_STATS_FLR_EN;
  13345. +#endif /* (DPAA_VERSION >= 11) */
  13346. +
  13347. + WRITE_UINT32(p_StatsAd->nextActionIndx, tmp);
  13348. +
  13349. + statsCountersAddr = (uint32_t)((XX_VirtToPhys(
  13350. + p_FmPcdCcStatsParams->h_StatsCounters) - physicalMuramBase));
  13351. + SetStatsCounters(p_StatsAd, statsCountersAddr);
  13352. +}
  13353. +
  13354. +static void FillAdOfTypeContLookup(t_Handle h_Ad,
  13355. + t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
  13356. + t_Handle h_FmPcd, t_Handle p_CcNode,
  13357. + t_Handle h_Manip, t_Handle h_FrmReplic)
  13358. +{
  13359. + t_FmPcdCcNode *p_Node = (t_FmPcdCcNode *)p_CcNode;
  13360. + t_AdOfTypeContLookup *p_AdContLookup = (t_AdOfTypeContLookup *)h_Ad;
  13361. + t_Handle h_TmpAd;
  13362. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  13363. + uint32_t tmpReg32;
  13364. + t_Handle p_AdNewPtr = NULL;
  13365. +
  13366. + UNUSED(h_Manip);
  13367. + UNUSED(h_FrmReplic);
  13368. +
  13369. + /* there are 3 cases handled in this routine of building a "Continue lookup" type AD.
  13370. + * Case 1: No Manip. The action descriptor is built within the match table.
  13371. + * p_AdResult = p_AdNewPtr;
  13372. + * Case 2: Manip exists. A new AD is created - p_AdNewPtr. It is initialized
  13373. + * either in the FmPcdManipUpdateAdResultForCc routine or it was already
  13374. + * initialized and returned here.
  13375. + * p_AdResult (within the match table) will be initialized after
  13376. + * this routine returns and point to the existing AD.
  13377. + * Case 3: Manip exists. The action descriptor is built within the match table.
  13378. + * FmPcdManipUpdateAdContLookupForCc returns a NULL p_AdNewPtr.
  13379. + */
  13380. +
  13381. + /* As default, the "new" ptr is the current one. i.e. the content of the result
  13382. + * AD will be written into the match table itself (case (1))*/
  13383. + p_AdNewPtr = p_AdContLookup;
  13384. +
  13385. + /* Initialize an action descriptor, if current statistics mode requires an Ad */
  13386. + if (p_FmPcdCcStatsParams)
  13387. + {
  13388. + ASSERT_COND(p_FmPcdCcStatsParams->h_StatsAd);
  13389. + ASSERT_COND(p_FmPcdCcStatsParams->h_StatsCounters);
  13390. +
  13391. + /* Swapping addresses between statistics Ad and the current lookup AD */
  13392. + h_TmpAd = p_FmPcdCcStatsParams->h_StatsAd;
  13393. + p_FmPcdCcStatsParams->h_StatsAd = h_Ad;
  13394. + h_Ad = h_TmpAd;
  13395. +
  13396. + p_AdNewPtr = h_Ad;
  13397. + p_AdContLookup = h_Ad;
  13398. +
  13399. + /* Init statistics Ad and connect current lookup AD as 'next action' from statistics Ad */
  13400. + UpdateStatsAd(p_FmPcdCcStatsParams, h_Ad, p_FmPcd->physicalMuramBase);
  13401. + }
  13402. +
  13403. +#if DPAA_VERSION >= 11
  13404. + if (h_Manip && h_FrmReplic)
  13405. + FmPcdManipUpdateAdContLookupForCc(
  13406. + h_Manip,
  13407. + h_Ad,
  13408. + &p_AdNewPtr,
  13409. + (uint32_t)((XX_VirtToPhys(
  13410. + FrmReplicGroupGetSourceTableDescriptor(h_FrmReplic))
  13411. + - p_FmPcd->physicalMuramBase)));
  13412. + else
  13413. + if (h_FrmReplic)
  13414. + FrmReplicGroupUpdateAd(h_FrmReplic, h_Ad, &p_AdNewPtr);
  13415. + else
  13416. +#endif /* (DPAA_VERSION >= 11) */
  13417. + if (h_Manip)
  13418. + FmPcdManipUpdateAdContLookupForCc(
  13419. + h_Manip,
  13420. + h_Ad,
  13421. + &p_AdNewPtr,
  13422. +
  13423. +#ifdef FM_CAPWAP_SUPPORT
  13424. + /*no check for opcode of manip - this step can be reached only with capwap_applic_specific*/
  13425. + (uint32_t)((XX_VirtToPhys(p_Node->h_AdTable) - p_FmPcd->physicalMuramBase))
  13426. +#else /* not FM_CAPWAP_SUPPORT */
  13427. + (uint32_t)((XX_VirtToPhys(p_Node->h_Ad)
  13428. + - p_FmPcd->physicalMuramBase))
  13429. +#endif /* not FM_CAPWAP_SUPPORT */
  13430. + );
  13431. +
  13432. + /* if (p_AdNewPtr = NULL) --> Done. (case (3)) */
  13433. + if (p_AdNewPtr)
  13434. + {
  13435. + /* cases (1) & (2) */
  13436. + tmpReg32 = 0;
  13437. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  13438. + tmpReg32 |=
  13439. + p_Node->sizeOfExtraction ? ((p_Node->sizeOfExtraction - 1) << 24) :
  13440. + 0;
  13441. + tmpReg32 |= (uint32_t)(XX_VirtToPhys(p_Node->h_AdTable)
  13442. + - p_FmPcd->physicalMuramBase);
  13443. + WRITE_UINT32(p_AdContLookup->ccAdBase, tmpReg32);
  13444. +
  13445. + tmpReg32 = 0;
  13446. + tmpReg32 |= p_Node->numOfKeys << 24;
  13447. + tmpReg32 |= (p_Node->lclMask ? FM_PCD_AD_CONT_LOOKUP_LCL_MASK : 0);
  13448. + tmpReg32 |=
  13449. + p_Node->h_KeysMatchTable ? (uint32_t)(XX_VirtToPhys(
  13450. + p_Node->h_KeysMatchTable) - p_FmPcd->physicalMuramBase) :
  13451. + 0;
  13452. + WRITE_UINT32(p_AdContLookup->matchTblPtr, tmpReg32);
  13453. +
  13454. + tmpReg32 = 0;
  13455. + tmpReg32 |= p_Node->prsArrayOffset << 24;
  13456. + tmpReg32 |= p_Node->offset << 16;
  13457. + tmpReg32 |= p_Node->parseCode;
  13458. + WRITE_UINT32(p_AdContLookup->pcAndOffsets, tmpReg32);
  13459. +
  13460. + MemCpy8((void*)&p_AdContLookup->gmask, p_Node->p_GlblMask,
  13461. + CC_GLBL_MASK_SIZE);
  13462. + }
  13463. +}
  13464. +
  13465. +static t_Error AllocAndFillAdForContLookupManip(t_Handle h_CcNode)
  13466. +{
  13467. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  13468. + uint32_t intFlags;
  13469. +
  13470. + ASSERT_COND(p_CcNode);
  13471. +
  13472. + intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
  13473. +
  13474. + if (!p_CcNode->h_Ad)
  13475. + {
  13476. + if (p_CcNode->maxNumOfKeys)
  13477. + p_CcNode->h_Ad = p_CcNode->h_TmpAd;
  13478. + else
  13479. + p_CcNode->h_Ad = (t_Handle)FM_MURAM_AllocMem(
  13480. + ((t_FmPcd *)(p_CcNode->h_FmPcd))->h_FmMuram,
  13481. + FM_PCD_CC_AD_ENTRY_SIZE, FM_PCD_CC_AD_TABLE_ALIGN);
  13482. +
  13483. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  13484. +
  13485. + if (!p_CcNode->h_Ad)
  13486. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  13487. + ("MURAM allocation for CC action descriptor"));
  13488. +
  13489. + MemSet8(p_CcNode->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  13490. +
  13491. + FillAdOfTypeContLookup(p_CcNode->h_Ad, NULL, p_CcNode->h_FmPcd,
  13492. + p_CcNode, NULL, NULL);
  13493. + }
  13494. + else
  13495. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  13496. +
  13497. + return E_OK;
  13498. +}
  13499. +
  13500. +static t_Error SetRequiredAction1(
  13501. + t_Handle h_FmPcd, uint32_t requiredAction,
  13502. + t_FmPcdCcKeyAndNextEngineParams *p_CcKeyAndNextEngineParamsTmp,
  13503. + t_Handle h_AdTmp, uint16_t numOfEntries, t_Handle h_Tree)
  13504. +{
  13505. + t_AdOfTypeResult *p_AdTmp = (t_AdOfTypeResult *)h_AdTmp;
  13506. + uint32_t tmpReg32;
  13507. + t_Error err;
  13508. + t_FmPcdCcNode *p_CcNode;
  13509. + int i = 0;
  13510. + uint16_t tmp = 0;
  13511. + uint16_t profileId;
  13512. + uint8_t relativeSchemeId, physicalSchemeId;
  13513. + t_CcNodeInformation ccNodeInfo;
  13514. +
  13515. + for (i = 0; i < numOfEntries; i++)
  13516. + {
  13517. + if (i == 0)
  13518. + h_AdTmp = PTR_MOVE(h_AdTmp, i*FM_PCD_CC_AD_ENTRY_SIZE);
  13519. + else
  13520. + h_AdTmp = PTR_MOVE(h_AdTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  13521. +
  13522. + switch (p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.nextEngine)
  13523. + {
  13524. + case (e_FM_PCD_CC):
  13525. + if (requiredAction)
  13526. + {
  13527. + p_CcNode =
  13528. + p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.ccParams.h_CcNode;
  13529. + ASSERT_COND(p_CcNode);
  13530. + if (p_CcNode->shadowAction == requiredAction)
  13531. + break;
  13532. + if ((requiredAction & UPDATE_CC_WITH_TREE)
  13533. + && !(p_CcNode->shadowAction & UPDATE_CC_WITH_TREE))
  13534. + {
  13535. +
  13536. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  13537. + ccNodeInfo.h_CcNode = h_Tree;
  13538. + EnqueueNodeInfoToRelevantLst(&p_CcNode->ccTreesLst,
  13539. + &ccNodeInfo, NULL);
  13540. + p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
  13541. + UPDATE_CC_WITH_TREE;
  13542. + }
  13543. + if ((requiredAction & UPDATE_CC_SHADOW_CLEAR)
  13544. + && !(p_CcNode->shadowAction & UPDATE_CC_SHADOW_CLEAR))
  13545. + {
  13546. +
  13547. + p_CcNode->shadowAction = 0;
  13548. + }
  13549. +
  13550. + if ((requiredAction & UPDATE_CC_WITH_DELETE_TREE)
  13551. + && !(p_CcNode->shadowAction
  13552. + & UPDATE_CC_WITH_DELETE_TREE))
  13553. + {
  13554. + DequeueNodeInfoFromRelevantLst(&p_CcNode->ccTreesLst,
  13555. + h_Tree, NULL);
  13556. + p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
  13557. + UPDATE_CC_WITH_DELETE_TREE;
  13558. + }
  13559. + if (p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
  13560. + != e_FM_PCD_INVALID)
  13561. + tmp = (uint8_t)(p_CcNode->numOfKeys + 1);
  13562. + else
  13563. + tmp = p_CcNode->numOfKeys;
  13564. + err = SetRequiredAction1(h_FmPcd, requiredAction,
  13565. + p_CcNode->keyAndNextEngineParams,
  13566. + p_CcNode->h_AdTable, tmp, h_Tree);
  13567. + if (err != E_OK)
  13568. + return err;
  13569. + if (requiredAction != UPDATE_CC_SHADOW_CLEAR)
  13570. + p_CcNode->shadowAction |= requiredAction;
  13571. + }
  13572. + break;
  13573. +
  13574. + case (e_FM_PCD_KG):
  13575. + if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
  13576. + && !(p_CcKeyAndNextEngineParamsTmp[i].shadowAction
  13577. + & UPDATE_NIA_ENQ_WITHOUT_DMA))
  13578. + {
  13579. + physicalSchemeId =
  13580. + FmPcdKgGetSchemeId(
  13581. + p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.kgParams.h_DirectScheme);
  13582. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(
  13583. + h_FmPcd, physicalSchemeId);
  13584. + if (relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  13585. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  13586. + if (!FmPcdKgIsSchemeValidSw(
  13587. + p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.kgParams.h_DirectScheme))
  13588. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  13589. + ("Invalid direct scheme."));
  13590. + if (!KgIsSchemeAlwaysDirect(h_FmPcd, relativeSchemeId))
  13591. + RETURN_ERROR(
  13592. + MAJOR, E_INVALID_STATE,
  13593. + ("For this action scheme has to be direct."));
  13594. + err =
  13595. + FmPcdKgCcGetSetParams(
  13596. + h_FmPcd,
  13597. + p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.kgParams.h_DirectScheme,
  13598. + requiredAction, 0);
  13599. + if (err != E_OK)
  13600. + RETURN_ERROR(MAJOR, err, NO_MSG);
  13601. + p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
  13602. + requiredAction;
  13603. + }
  13604. + break;
  13605. +
  13606. + case (e_FM_PCD_PLCR):
  13607. + if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
  13608. + && !(p_CcKeyAndNextEngineParamsTmp[i].shadowAction
  13609. + & UPDATE_NIA_ENQ_WITHOUT_DMA))
  13610. + {
  13611. + if (!p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.plcrParams.overrideParams)
  13612. + RETURN_ERROR(
  13613. + MAJOR,
  13614. + E_NOT_SUPPORTED,
  13615. + ("In this initialization only overrideFqid can be initialized"));
  13616. + if (!p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.plcrParams.sharedProfile)
  13617. + RETURN_ERROR(
  13618. + MAJOR,
  13619. + E_NOT_SUPPORTED,
  13620. + ("In this initialization only overrideFqid can be initialized"));
  13621. + err =
  13622. + FmPcdPlcrGetAbsoluteIdByProfileParams(
  13623. + h_FmPcd,
  13624. + e_FM_PCD_PLCR_SHARED,
  13625. + NULL,
  13626. + p_CcKeyAndNextEngineParamsTmp[i].nextEngineParams.params.plcrParams.newRelativeProfileId,
  13627. + &profileId);
  13628. + if (err != E_OK)
  13629. + RETURN_ERROR(MAJOR, err, NO_MSG);
  13630. + err = FmPcdPlcrCcGetSetParams(h_FmPcd, profileId,
  13631. + requiredAction);
  13632. + if (err != E_OK)
  13633. + RETURN_ERROR(MAJOR, err, NO_MSG);
  13634. + p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
  13635. + requiredAction;
  13636. + }
  13637. + break;
  13638. +
  13639. + case (e_FM_PCD_DONE):
  13640. + if ((requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
  13641. + && !(p_CcKeyAndNextEngineParamsTmp[i].shadowAction
  13642. + & UPDATE_NIA_ENQ_WITHOUT_DMA))
  13643. + {
  13644. + tmpReg32 = GET_UINT32(p_AdTmp->nia);
  13645. + if ((tmpReg32 & GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd))
  13646. + != GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd))
  13647. + RETURN_ERROR(
  13648. + MAJOR,
  13649. + E_INVALID_STATE,
  13650. + ("Next engine was previously assigned not as PCD_DONE"));
  13651. + tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  13652. + WRITE_UINT32(p_AdTmp->nia, tmpReg32);
  13653. + p_CcKeyAndNextEngineParamsTmp[i].shadowAction |=
  13654. + requiredAction;
  13655. + }
  13656. + break;
  13657. +
  13658. + default:
  13659. + break;
  13660. + }
  13661. + }
  13662. +
  13663. + return E_OK;
  13664. +}
  13665. +
  13666. +static t_Error SetRequiredAction(
  13667. + t_Handle h_FmPcd, uint32_t requiredAction,
  13668. + t_FmPcdCcKeyAndNextEngineParams *p_CcKeyAndNextEngineParamsTmp,
  13669. + t_Handle h_AdTmp, uint16_t numOfEntries, t_Handle h_Tree)
  13670. +{
  13671. + t_Error err = SetRequiredAction1(h_FmPcd, requiredAction,
  13672. + p_CcKeyAndNextEngineParamsTmp, h_AdTmp,
  13673. + numOfEntries, h_Tree);
  13674. + if (err != E_OK)
  13675. + return err;
  13676. + return SetRequiredAction1(h_FmPcd, UPDATE_CC_SHADOW_CLEAR,
  13677. + p_CcKeyAndNextEngineParamsTmp, h_AdTmp,
  13678. + numOfEntries, h_Tree);
  13679. +}
  13680. +
  13681. +static t_Error ReleaseModifiedDataStructure(
  13682. + t_Handle h_FmPcd, t_List *h_FmPcdOldPointersLst,
  13683. + t_List *h_FmPcdNewPointersLst,
  13684. + t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalParams,
  13685. + bool useShadowStructs)
  13686. +{
  13687. + t_List *p_Pos;
  13688. + t_Error err = E_OK;
  13689. + t_CcNodeInformation ccNodeInfo, *p_CcNodeInformation;
  13690. + t_Handle h_Muram;
  13691. + t_FmPcdCcNode *p_FmPcdCcNextNode, *p_FmPcdCcWorkingOnNode;
  13692. + t_List *p_UpdateLst;
  13693. + uint32_t intFlags;
  13694. +
  13695. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  13696. + SANITY_CHECK_RETURN_ERROR(p_AdditionalParams->h_CurrentNode,
  13697. + E_INVALID_HANDLE);
  13698. + SANITY_CHECK_RETURN_ERROR(h_FmPcdOldPointersLst, E_INVALID_HANDLE);
  13699. + SANITY_CHECK_RETURN_ERROR(h_FmPcdNewPointersLst, E_INVALID_HANDLE);
  13700. +
  13701. + /* We don't update subtree of the new node with new tree because it was done in the previous stage */
  13702. + if (p_AdditionalParams->h_NodeForAdd)
  13703. + {
  13704. + p_FmPcdCcNextNode = (t_FmPcdCcNode*)p_AdditionalParams->h_NodeForAdd;
  13705. +
  13706. + if (!p_AdditionalParams->tree)
  13707. + p_UpdateLst = &p_FmPcdCcNextNode->ccPrevNodesLst;
  13708. + else
  13709. + p_UpdateLst = &p_FmPcdCcNextNode->ccTreeIdLst;
  13710. +
  13711. + p_CcNodeInformation = FindNodeInfoInReleventLst(
  13712. + p_UpdateLst, p_AdditionalParams->h_CurrentNode,
  13713. + p_FmPcdCcNextNode->h_Spinlock);
  13714. +
  13715. + if (p_CcNodeInformation)
  13716. + p_CcNodeInformation->index++;
  13717. + else
  13718. + {
  13719. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  13720. + ccNodeInfo.h_CcNode = (t_Handle)p_AdditionalParams->h_CurrentNode;
  13721. + ccNodeInfo.index = 1;
  13722. + EnqueueNodeInfoToRelevantLst(p_UpdateLst, &ccNodeInfo,
  13723. + p_FmPcdCcNextNode->h_Spinlock);
  13724. + }
  13725. + if (p_AdditionalParams->h_ManipForAdd)
  13726. + {
  13727. + p_CcNodeInformation = FindNodeInfoInReleventLst(
  13728. + FmPcdManipGetNodeLstPointedOnThisManip(
  13729. + p_AdditionalParams->h_ManipForAdd),
  13730. + p_AdditionalParams->h_CurrentNode,
  13731. + FmPcdManipGetSpinlock(p_AdditionalParams->h_ManipForAdd));
  13732. +
  13733. + if (p_CcNodeInformation)
  13734. + p_CcNodeInformation->index++;
  13735. + else
  13736. + {
  13737. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  13738. + ccNodeInfo.h_CcNode =
  13739. + (t_Handle)p_AdditionalParams->h_CurrentNode;
  13740. + ccNodeInfo.index = 1;
  13741. + EnqueueNodeInfoToRelevantLst(
  13742. + FmPcdManipGetNodeLstPointedOnThisManip(
  13743. + p_AdditionalParams->h_ManipForAdd),
  13744. + &ccNodeInfo,
  13745. + FmPcdManipGetSpinlock(
  13746. + p_AdditionalParams->h_ManipForAdd));
  13747. + }
  13748. + }
  13749. + }
  13750. +
  13751. + if (p_AdditionalParams->h_NodeForRmv)
  13752. + {
  13753. + p_FmPcdCcNextNode = (t_FmPcdCcNode*)p_AdditionalParams->h_NodeForRmv;
  13754. +
  13755. + if (!p_AdditionalParams->tree)
  13756. + {
  13757. + p_UpdateLst = &p_FmPcdCcNextNode->ccPrevNodesLst;
  13758. + p_FmPcdCcWorkingOnNode =
  13759. + (t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode);
  13760. +
  13761. + for (p_Pos = LIST_FIRST(&p_FmPcdCcWorkingOnNode->ccTreesLst);
  13762. + p_Pos != (&p_FmPcdCcWorkingOnNode->ccTreesLst); p_Pos =
  13763. + LIST_NEXT(p_Pos))
  13764. + {
  13765. + p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
  13766. +
  13767. + ASSERT_COND(p_CcNodeInformation->h_CcNode);
  13768. +
  13769. + err =
  13770. + SetRequiredAction(
  13771. + h_FmPcd,
  13772. + UPDATE_CC_WITH_DELETE_TREE,
  13773. + &((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams[p_AdditionalParams->savedKeyIndex],
  13774. + PTR_MOVE(((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_AdTable, p_AdditionalParams->savedKeyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
  13775. + 1, p_CcNodeInformation->h_CcNode);
  13776. + }
  13777. + }
  13778. + else
  13779. + {
  13780. + p_UpdateLst = &p_FmPcdCcNextNode->ccTreeIdLst;
  13781. +
  13782. + err =
  13783. + SetRequiredAction(
  13784. + h_FmPcd,
  13785. + UPDATE_CC_WITH_DELETE_TREE,
  13786. + &((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams[p_AdditionalParams->savedKeyIndex],
  13787. + UINT_TO_PTR(((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->ccTreeBaseAddr + p_AdditionalParams->savedKeyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
  13788. + 1, p_AdditionalParams->h_CurrentNode);
  13789. + }
  13790. + if (err)
  13791. + return err;
  13792. +
  13793. + /* We remove from the subtree of the removed node tree because it wasn't done in the previous stage
  13794. + Update ccPrevNodesLst or ccTreeIdLst of the removed node
  13795. + Update of the node owner */
  13796. + p_CcNodeInformation = FindNodeInfoInReleventLst(
  13797. + p_UpdateLst, p_AdditionalParams->h_CurrentNode,
  13798. + p_FmPcdCcNextNode->h_Spinlock);
  13799. +
  13800. + ASSERT_COND(p_CcNodeInformation);
  13801. + ASSERT_COND(p_CcNodeInformation->index);
  13802. +
  13803. + p_CcNodeInformation->index--;
  13804. +
  13805. + if (p_CcNodeInformation->index == 0)
  13806. + DequeueNodeInfoFromRelevantLst(p_UpdateLst,
  13807. + p_AdditionalParams->h_CurrentNode,
  13808. + p_FmPcdCcNextNode->h_Spinlock);
  13809. +
  13810. + UpdateNodeOwner(p_FmPcdCcNextNode, FALSE);
  13811. +
  13812. + if (p_AdditionalParams->h_ManipForRmv)
  13813. + {
  13814. + p_CcNodeInformation = FindNodeInfoInReleventLst(
  13815. + FmPcdManipGetNodeLstPointedOnThisManip(
  13816. + p_AdditionalParams->h_ManipForRmv),
  13817. + p_AdditionalParams->h_CurrentNode,
  13818. + FmPcdManipGetSpinlock(p_AdditionalParams->h_ManipForRmv));
  13819. +
  13820. + ASSERT_COND(p_CcNodeInformation);
  13821. + ASSERT_COND(p_CcNodeInformation->index);
  13822. +
  13823. + p_CcNodeInformation->index--;
  13824. +
  13825. + if (p_CcNodeInformation->index == 0)
  13826. + DequeueNodeInfoFromRelevantLst(
  13827. + FmPcdManipGetNodeLstPointedOnThisManip(
  13828. + p_AdditionalParams->h_ManipForRmv),
  13829. + p_AdditionalParams->h_CurrentNode,
  13830. + FmPcdManipGetSpinlock(
  13831. + p_AdditionalParams->h_ManipForRmv));
  13832. + }
  13833. + }
  13834. +
  13835. + if (p_AdditionalParams->h_ManipForRmv)
  13836. + FmPcdManipUpdateOwner(p_AdditionalParams->h_ManipForRmv, FALSE);
  13837. +
  13838. + if (p_AdditionalParams->p_StatsObjForRmv)
  13839. + PutStatsObj((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode),
  13840. + p_AdditionalParams->p_StatsObjForRmv);
  13841. +
  13842. +#if (DPAA_VERSION >= 11)
  13843. + if (p_AdditionalParams->h_FrmReplicForRmv)
  13844. + FrmReplicGroupUpdateOwner(p_AdditionalParams->h_FrmReplicForRmv,
  13845. + FALSE/* remove */);
  13846. +#endif /* (DPAA_VERSION >= 11) */
  13847. +
  13848. + if (!useShadowStructs)
  13849. + {
  13850. + h_Muram = FmPcdGetMuramHandle(h_FmPcd);
  13851. + ASSERT_COND(h_Muram);
  13852. +
  13853. + if ((p_AdditionalParams->tree && !((t_FmPcd *)h_FmPcd)->p_CcShadow)
  13854. + || (!p_AdditionalParams->tree
  13855. + && !((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->maxNumOfKeys))
  13856. + {
  13857. + /* We release new AD which was allocated and updated for copy from to actual AD */
  13858. + for (p_Pos = LIST_FIRST(h_FmPcdNewPointersLst);
  13859. + p_Pos != (h_FmPcdNewPointersLst); p_Pos = LIST_NEXT(p_Pos))
  13860. + {
  13861. +
  13862. + p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
  13863. + ASSERT_COND(p_CcNodeInformation->h_CcNode);
  13864. + FM_MURAM_FreeMem(h_Muram, p_CcNodeInformation->h_CcNode);
  13865. + }
  13866. + }
  13867. +
  13868. + /* Free Old data structure if it has to be freed - new data structure was allocated*/
  13869. + if (p_AdditionalParams->p_AdTableOld)
  13870. + FM_MURAM_FreeMem(h_Muram, p_AdditionalParams->p_AdTableOld);
  13871. +
  13872. + if (p_AdditionalParams->p_KeysMatchTableOld)
  13873. + FM_MURAM_FreeMem(h_Muram, p_AdditionalParams->p_KeysMatchTableOld);
  13874. + }
  13875. +
  13876. + /* Update current modified node with changed fields if it's required*/
  13877. + if (!p_AdditionalParams->tree)
  13878. + {
  13879. + if (p_AdditionalParams->p_AdTableNew)
  13880. + ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_AdTable =
  13881. + p_AdditionalParams->p_AdTableNew;
  13882. +
  13883. + if (p_AdditionalParams->p_KeysMatchTableNew)
  13884. + ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_KeysMatchTable =
  13885. + p_AdditionalParams->p_KeysMatchTableNew;
  13886. +
  13887. + /* Locking node's spinlock before updating 'keys and next engine' structure,
  13888. + as it maybe used to retrieve keys statistics */
  13889. + intFlags =
  13890. + XX_LockIntrSpinlock(
  13891. + ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_Spinlock);
  13892. +
  13893. + ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->numOfKeys =
  13894. + p_AdditionalParams->numOfKeys;
  13895. +
  13896. + memcpy(((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams,
  13897. + &p_AdditionalParams->keyAndNextEngineParams,
  13898. + sizeof(t_FmPcdCcKeyAndNextEngineParams) * (CC_MAX_NUM_OF_KEYS));
  13899. +
  13900. + XX_UnlockIntrSpinlock(
  13901. + ((t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode))->h_Spinlock,
  13902. + intFlags);
  13903. + }
  13904. + else
  13905. + {
  13906. + uint8_t numEntries =
  13907. + ((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->numOfEntries;
  13908. + ASSERT_COND(numEntries < FM_PCD_MAX_NUM_OF_CC_GROUPS);
  13909. + memcpy(&((t_FmPcdCcTree *)(p_AdditionalParams->h_CurrentNode))->keyAndNextEngineParams,
  13910. + &p_AdditionalParams->keyAndNextEngineParams,
  13911. + sizeof(t_FmPcdCcKeyAndNextEngineParams) * numEntries);
  13912. + }
  13913. +
  13914. + ReleaseLst(h_FmPcdOldPointersLst);
  13915. + ReleaseLst(h_FmPcdNewPointersLst);
  13916. +
  13917. + XX_Free(p_AdditionalParams);
  13918. +
  13919. + return E_OK;
  13920. +}
  13921. +
  13922. +static t_Handle BuildNewAd(
  13923. + t_Handle h_Ad,
  13924. + t_FmPcdModifyCcKeyAdditionalParams *p_FmPcdModifyCcKeyAdditionalParams,
  13925. + t_FmPcdCcNode *p_CcNode,
  13926. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  13927. +{
  13928. + t_FmPcdCcNode *p_FmPcdCcNodeTmp;
  13929. + t_Handle h_OrigAd = NULL;
  13930. +
  13931. + p_FmPcdCcNodeTmp = (t_FmPcdCcNode*)XX_Malloc(sizeof(t_FmPcdCcNode));
  13932. + if (!p_FmPcdCcNodeTmp)
  13933. + {
  13934. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_FmPcdCcNodeTmp"));
  13935. + return NULL;
  13936. + }
  13937. + memset(p_FmPcdCcNodeTmp, 0, sizeof(t_FmPcdCcNode));
  13938. +
  13939. + p_FmPcdCcNodeTmp->numOfKeys = p_FmPcdModifyCcKeyAdditionalParams->numOfKeys;
  13940. + p_FmPcdCcNodeTmp->h_KeysMatchTable =
  13941. + p_FmPcdModifyCcKeyAdditionalParams->p_KeysMatchTableNew;
  13942. + p_FmPcdCcNodeTmp->h_AdTable =
  13943. + p_FmPcdModifyCcKeyAdditionalParams->p_AdTableNew;
  13944. +
  13945. + p_FmPcdCcNodeTmp->lclMask = p_CcNode->lclMask;
  13946. + p_FmPcdCcNodeTmp->parseCode = p_CcNode->parseCode;
  13947. + p_FmPcdCcNodeTmp->offset = p_CcNode->offset;
  13948. + p_FmPcdCcNodeTmp->prsArrayOffset = p_CcNode->prsArrayOffset;
  13949. + p_FmPcdCcNodeTmp->ctrlFlow = p_CcNode->ctrlFlow;
  13950. + p_FmPcdCcNodeTmp->ccKeySizeAccExtraction = p_CcNode->ccKeySizeAccExtraction;
  13951. + p_FmPcdCcNodeTmp->sizeOfExtraction = p_CcNode->sizeOfExtraction;
  13952. + p_FmPcdCcNodeTmp->glblMaskSize = p_CcNode->glblMaskSize;
  13953. + p_FmPcdCcNodeTmp->p_GlblMask = p_CcNode->p_GlblMask;
  13954. +
  13955. + if (p_FmPcdCcNextEngineParams->nextEngine == e_FM_PCD_CC)
  13956. + {
  13957. + if (p_FmPcdCcNextEngineParams->h_Manip)
  13958. + {
  13959. + h_OrigAd = p_CcNode->h_Ad;
  13960. + if (AllocAndFillAdForContLookupManip(
  13961. + p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode)
  13962. + != E_OK)
  13963. + {
  13964. + REPORT_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  13965. + XX_Free(p_FmPcdCcNodeTmp);
  13966. + return NULL;
  13967. + }
  13968. + }
  13969. + FillAdOfTypeContLookup(h_Ad, NULL, p_CcNode->h_FmPcd, p_FmPcdCcNodeTmp,
  13970. + h_OrigAd ? NULL : p_FmPcdCcNextEngineParams->h_Manip, NULL);
  13971. + }
  13972. +
  13973. +#if (DPAA_VERSION >= 11)
  13974. + if ((p_FmPcdCcNextEngineParams->nextEngine == e_FM_PCD_FR)
  13975. + && (p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic))
  13976. + {
  13977. + FillAdOfTypeContLookup(
  13978. + h_Ad, NULL, p_CcNode->h_FmPcd, p_FmPcdCcNodeTmp,
  13979. + p_FmPcdCcNextEngineParams->h_Manip,
  13980. + p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic);
  13981. + }
  13982. +#endif /* (DPAA_VERSION >= 11) */
  13983. +
  13984. + XX_Free(p_FmPcdCcNodeTmp);
  13985. +
  13986. + return E_OK;
  13987. +}
  13988. +
  13989. +static t_Error DynamicChangeHc(
  13990. + t_Handle h_FmPcd, t_List *h_OldPointersLst, t_List *h_NewPointersLst,
  13991. + t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalParams,
  13992. + bool useShadowStructs)
  13993. +{
  13994. + t_List *p_PosOld, *p_PosNew;
  13995. + uint32_t oldAdAddrOffset, newAdAddrOffset;
  13996. + uint16_t i = 0;
  13997. + t_Error err = E_OK;
  13998. + uint8_t numOfModifiedPtr;
  13999. +
  14000. + ASSERT_COND(h_FmPcd);
  14001. + ASSERT_COND(h_OldPointersLst);
  14002. + ASSERT_COND(h_NewPointersLst);
  14003. +
  14004. + numOfModifiedPtr = (uint8_t)LIST_NumOfObjs(h_OldPointersLst);
  14005. +
  14006. + if (numOfModifiedPtr)
  14007. + {
  14008. + p_PosNew = LIST_FIRST(h_NewPointersLst);
  14009. + p_PosOld = LIST_FIRST(h_OldPointersLst);
  14010. +
  14011. + /* Retrieve address of new AD */
  14012. + newAdAddrOffset = FmPcdCcGetNodeAddrOffsetFromNodeInfo(h_FmPcd,
  14013. + p_PosNew);
  14014. + if (newAdAddrOffset == (uint32_t)ILLEGAL_BASE)
  14015. + {
  14016. + ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
  14017. + h_NewPointersLst,
  14018. + p_AdditionalParams, useShadowStructs);
  14019. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("New AD address"));
  14020. + }
  14021. +
  14022. + for (i = 0; i < numOfModifiedPtr; i++)
  14023. + {
  14024. + /* Retrieve address of current AD */
  14025. + oldAdAddrOffset = FmPcdCcGetNodeAddrOffsetFromNodeInfo(h_FmPcd,
  14026. + p_PosOld);
  14027. + if (oldAdAddrOffset == (uint32_t)ILLEGAL_BASE)
  14028. + {
  14029. + ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
  14030. + h_NewPointersLst,
  14031. + p_AdditionalParams,
  14032. + useShadowStructs);
  14033. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Old AD address"));
  14034. + }
  14035. +
  14036. + /* Invoke host command to copy from new AD to old AD */
  14037. + err = FmHcPcdCcDoDynamicChange(((t_FmPcd *)h_FmPcd)->h_Hc,
  14038. + oldAdAddrOffset, newAdAddrOffset);
  14039. + if (err)
  14040. + {
  14041. + ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
  14042. + h_NewPointersLst,
  14043. + p_AdditionalParams,
  14044. + useShadowStructs);
  14045. + RETURN_ERROR(
  14046. + MAJOR,
  14047. + err,
  14048. + ("For part of nodes changes are done - situation is danger"));
  14049. + }
  14050. +
  14051. + p_PosOld = LIST_NEXT(p_PosOld);
  14052. + }
  14053. + }
  14054. + return E_OK;
  14055. +}
  14056. +
  14057. +static t_Error DoDynamicChange(
  14058. + t_Handle h_FmPcd, t_List *h_OldPointersLst, t_List *h_NewPointersLst,
  14059. + t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalParams,
  14060. + bool useShadowStructs)
  14061. +{
  14062. + t_FmPcdCcNode *p_CcNode =
  14063. + (t_FmPcdCcNode *)(p_AdditionalParams->h_CurrentNode);
  14064. + t_List *p_PosNew;
  14065. + t_CcNodeInformation *p_CcNodeInfo;
  14066. + t_FmPcdCcNextEngineParams nextEngineParams;
  14067. + t_Handle h_Ad;
  14068. + uint32_t keySize;
  14069. + t_Error err = E_OK;
  14070. + uint8_t numOfModifiedPtr;
  14071. +
  14072. + ASSERT_COND(h_FmPcd);
  14073. +
  14074. + memset(&nextEngineParams, 0, sizeof(t_FmPcdCcNextEngineParams));
  14075. +
  14076. + numOfModifiedPtr = (uint8_t)LIST_NumOfObjs(h_OldPointersLst);
  14077. +
  14078. + if (numOfModifiedPtr)
  14079. + {
  14080. +
  14081. + p_PosNew = LIST_FIRST(h_NewPointersLst);
  14082. +
  14083. + /* Invoke host-command to copy from the new Ad to existing Ads */
  14084. + err = DynamicChangeHc(h_FmPcd, h_OldPointersLst, h_NewPointersLst,
  14085. + p_AdditionalParams, useShadowStructs);
  14086. + if (err)
  14087. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14088. +
  14089. + if (useShadowStructs)
  14090. + {
  14091. + /* When the host-command above has ended, the old structures are 'free'and we can update
  14092. + them by copying from the new shadow structures. */
  14093. + if (p_CcNode->lclMask)
  14094. + keySize = (uint32_t)(2 * p_CcNode->ccKeySizeAccExtraction);
  14095. + else
  14096. + keySize = p_CcNode->ccKeySizeAccExtraction;
  14097. +
  14098. + MemCpy8(p_AdditionalParams->p_KeysMatchTableOld,
  14099. + p_AdditionalParams->p_KeysMatchTableNew,
  14100. + p_CcNode->maxNumOfKeys * keySize * sizeof(uint8_t));
  14101. +
  14102. + MemCpy8(
  14103. + p_AdditionalParams->p_AdTableOld,
  14104. + p_AdditionalParams->p_AdTableNew,
  14105. + (uint32_t)((p_CcNode->maxNumOfKeys + 1)
  14106. + * FM_PCD_CC_AD_ENTRY_SIZE));
  14107. +
  14108. + /* Retrieve the address of the allocated Ad */
  14109. + p_CcNodeInfo = CC_NODE_F_OBJECT(p_PosNew);
  14110. + h_Ad = p_CcNodeInfo->h_CcNode;
  14111. +
  14112. + /* Build a new Ad that holds the old (now updated) structures */
  14113. + p_AdditionalParams->p_KeysMatchTableNew =
  14114. + p_AdditionalParams->p_KeysMatchTableOld;
  14115. + p_AdditionalParams->p_AdTableNew = p_AdditionalParams->p_AdTableOld;
  14116. +
  14117. + nextEngineParams.nextEngine = e_FM_PCD_CC;
  14118. + nextEngineParams.params.ccParams.h_CcNode = (t_Handle)p_CcNode;
  14119. +
  14120. + BuildNewAd(h_Ad, p_AdditionalParams, p_CcNode, &nextEngineParams);
  14121. +
  14122. + /* HC to copy from the new Ad (old updated structures) to current Ad (uses shadow structures) */
  14123. + err = DynamicChangeHc(h_FmPcd, h_OldPointersLst, h_NewPointersLst,
  14124. + p_AdditionalParams, useShadowStructs);
  14125. + if (err)
  14126. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14127. + }
  14128. + }
  14129. +
  14130. + err = ReleaseModifiedDataStructure(h_FmPcd, h_OldPointersLst,
  14131. + h_NewPointersLst,
  14132. + p_AdditionalParams, useShadowStructs);
  14133. + if (err)
  14134. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14135. +
  14136. + return E_OK;
  14137. +}
  14138. +
  14139. +#ifdef FM_CAPWAP_SUPPORT
  14140. +static bool IsCapwapApplSpecific(t_Handle h_Node)
  14141. +{
  14142. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_Node;
  14143. + bool isManipForCapwapApplSpecificBuild = FALSE;
  14144. + int i = 0;
  14145. +
  14146. + ASSERT_COND(h_Node);
  14147. + /* assumption that this function called only for INDEXED_FLOW_ID - so no miss*/
  14148. + for (i = 0; i < p_CcNode->numOfKeys; i++)
  14149. + {
  14150. + if ( p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip &&
  14151. + FmPcdManipIsCapwapApplSpecific(p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip))
  14152. + {
  14153. + isManipForCapwapApplSpecificBuild = TRUE;
  14154. + break;
  14155. + }
  14156. + }
  14157. + return isManipForCapwapApplSpecificBuild;
  14158. +
  14159. +}
  14160. +#endif /* FM_CAPWAP_SUPPORT */
  14161. +
  14162. +static t_Error CcUpdateParam(
  14163. + t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_FmPort,
  14164. + t_FmPcdCcKeyAndNextEngineParams *p_CcKeyAndNextEngineParams,
  14165. + uint16_t numOfEntries, t_Handle h_Ad, bool validate, uint16_t level,
  14166. + t_Handle h_FmTree, bool modify)
  14167. +{
  14168. + t_FmPcdCcNode *p_CcNode;
  14169. + t_Error err;
  14170. + uint16_t tmp = 0;
  14171. + int i = 0;
  14172. + t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_FmTree;
  14173. +
  14174. + level++;
  14175. +
  14176. + if (p_CcTree->h_IpReassemblyManip)
  14177. + {
  14178. + err = FmPcdManipUpdate(h_FmPcd, h_PcdParams, h_FmPort,
  14179. + p_CcTree->h_IpReassemblyManip, NULL, validate,
  14180. + level, h_FmTree, modify);
  14181. + if (err)
  14182. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14183. + }
  14184. +
  14185. + if (p_CcTree->h_CapwapReassemblyManip)
  14186. + {
  14187. + err = FmPcdManipUpdate(h_FmPcd, h_PcdParams, h_FmPort,
  14188. + p_CcTree->h_CapwapReassemblyManip, NULL, validate,
  14189. + level, h_FmTree, modify);
  14190. + if (err)
  14191. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14192. + }
  14193. +
  14194. + if (numOfEntries)
  14195. + {
  14196. + for (i = 0; i < numOfEntries; i++)
  14197. + {
  14198. + if (i == 0)
  14199. + h_Ad = PTR_MOVE(h_Ad, i*FM_PCD_CC_AD_ENTRY_SIZE);
  14200. + else
  14201. + h_Ad = PTR_MOVE(h_Ad, FM_PCD_CC_AD_ENTRY_SIZE);
  14202. +
  14203. + if (p_CcKeyAndNextEngineParams[i].nextEngineParams.nextEngine
  14204. + == e_FM_PCD_CC)
  14205. + {
  14206. + p_CcNode =
  14207. + p_CcKeyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
  14208. + ASSERT_COND(p_CcNode);
  14209. +
  14210. + if (p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip)
  14211. + {
  14212. + err =
  14213. + FmPcdManipUpdate(
  14214. + h_FmPcd,
  14215. + NULL,
  14216. + h_FmPort,
  14217. + p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip,
  14218. + h_Ad, validate, level, h_FmTree, modify);
  14219. + if (err)
  14220. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14221. + }
  14222. +
  14223. + if (p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
  14224. + != e_FM_PCD_INVALID)
  14225. + tmp = (uint8_t)(p_CcNode->numOfKeys + 1);
  14226. + else
  14227. + tmp = p_CcNode->numOfKeys;
  14228. +
  14229. + err = CcUpdateParam(h_FmPcd, h_PcdParams, h_FmPort,
  14230. + p_CcNode->keyAndNextEngineParams, tmp,
  14231. + p_CcNode->h_AdTable, validate, level,
  14232. + h_FmTree, modify);
  14233. + if (err)
  14234. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14235. + }
  14236. + else
  14237. + {
  14238. + if (p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip)
  14239. + {
  14240. + err =
  14241. + FmPcdManipUpdate(
  14242. + h_FmPcd,
  14243. + NULL,
  14244. + h_FmPort,
  14245. + p_CcKeyAndNextEngineParams[i].nextEngineParams.h_Manip,
  14246. + h_Ad, validate, level, h_FmTree, modify);
  14247. + if (err)
  14248. + RETURN_ERROR(MAJOR, err, NO_MSG);
  14249. + }
  14250. + }
  14251. + }
  14252. + }
  14253. +
  14254. + return E_OK;
  14255. +}
  14256. +
  14257. +static ccPrivateInfo_t IcDefineCode(t_FmPcdCcNodeParams *p_CcNodeParam)
  14258. +{
  14259. + switch (p_CcNodeParam->extractCcParams.extractNonHdr.action)
  14260. + {
  14261. + case (e_FM_PCD_ACTION_EXACT_MATCH):
  14262. + switch (p_CcNodeParam->extractCcParams.extractNonHdr.src)
  14263. + {
  14264. + case (e_FM_PCD_EXTRACT_FROM_KEY):
  14265. + return CC_PRIVATE_INFO_IC_KEY_EXACT_MATCH;
  14266. + case (e_FM_PCD_EXTRACT_FROM_HASH):
  14267. + return CC_PRIVATE_INFO_IC_HASH_EXACT_MATCH;
  14268. + default:
  14269. + return CC_PRIVATE_INFO_NONE;
  14270. + }
  14271. +
  14272. + case (e_FM_PCD_ACTION_INDEXED_LOOKUP):
  14273. + switch (p_CcNodeParam->extractCcParams.extractNonHdr.src)
  14274. + {
  14275. + case (e_FM_PCD_EXTRACT_FROM_HASH):
  14276. + return CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP;
  14277. + case (e_FM_PCD_EXTRACT_FROM_FLOW_ID):
  14278. + return CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP;
  14279. + default:
  14280. + return CC_PRIVATE_INFO_NONE;
  14281. + }
  14282. +
  14283. + default:
  14284. + break;
  14285. + }
  14286. +
  14287. + return CC_PRIVATE_INFO_NONE;
  14288. +}
  14289. +
  14290. +static t_CcNodeInformation * DequeueAdditionalInfoFromRelevantLst(
  14291. + t_List *p_List)
  14292. +{
  14293. + t_CcNodeInformation *p_CcNodeInfo = NULL;
  14294. +
  14295. + if (!LIST_IsEmpty(p_List))
  14296. + {
  14297. + p_CcNodeInfo = CC_NODE_F_OBJECT(p_List->p_Next);
  14298. + LIST_DelAndInit(&p_CcNodeInfo->node);
  14299. + }
  14300. +
  14301. + return p_CcNodeInfo;
  14302. +}
  14303. +
  14304. +void ReleaseLst(t_List *p_List)
  14305. +{
  14306. + t_CcNodeInformation *p_CcNodeInfo = NULL;
  14307. +
  14308. + if (!LIST_IsEmpty(p_List))
  14309. + {
  14310. + p_CcNodeInfo = DequeueAdditionalInfoFromRelevantLst(p_List);
  14311. + while (p_CcNodeInfo)
  14312. + {
  14313. + XX_Free(p_CcNodeInfo);
  14314. + p_CcNodeInfo = DequeueAdditionalInfoFromRelevantLst(p_List);
  14315. + }
  14316. + }
  14317. +
  14318. + LIST_Del(p_List);
  14319. +}
  14320. +
  14321. +static void DeleteNode(t_FmPcdCcNode *p_CcNode)
  14322. +{
  14323. + uint32_t i;
  14324. +
  14325. + if (!p_CcNode)
  14326. + return;
  14327. +
  14328. + if (p_CcNode->p_GlblMask)
  14329. + {
  14330. + XX_Free(p_CcNode->p_GlblMask);
  14331. + p_CcNode->p_GlblMask = NULL;
  14332. + }
  14333. +
  14334. + if (p_CcNode->h_KeysMatchTable)
  14335. + {
  14336. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
  14337. + p_CcNode->h_KeysMatchTable);
  14338. + p_CcNode->h_KeysMatchTable = NULL;
  14339. + }
  14340. +
  14341. + if (p_CcNode->h_AdTable)
  14342. + {
  14343. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
  14344. + p_CcNode->h_AdTable);
  14345. + p_CcNode->h_AdTable = NULL;
  14346. + }
  14347. +
  14348. + if (p_CcNode->h_Ad)
  14349. + {
  14350. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
  14351. + p_CcNode->h_Ad);
  14352. + p_CcNode->h_Ad = NULL;
  14353. + p_CcNode->h_TmpAd = NULL;
  14354. + }
  14355. +
  14356. + if (p_CcNode->h_StatsFLRs)
  14357. + {
  14358. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
  14359. + p_CcNode->h_StatsFLRs);
  14360. + p_CcNode->h_StatsFLRs = NULL;
  14361. + }
  14362. +
  14363. + if (p_CcNode->h_Spinlock)
  14364. + {
  14365. + XX_FreeSpinlock(p_CcNode->h_Spinlock);
  14366. + p_CcNode->h_Spinlock = NULL;
  14367. + }
  14368. +
  14369. + /* Restore the original counters pointer instead of the mutual pointer (mutual to all hash buckets) */
  14370. + if (p_CcNode->isHashBucket
  14371. + && (p_CcNode->statisticsMode != e_FM_PCD_CC_STATS_MODE_NONE))
  14372. + p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].p_StatsObj->h_StatsCounters =
  14373. + p_CcNode->h_PrivMissStatsCounters;
  14374. +
  14375. + /* Releasing all currently used statistics objects, including 'miss' entry */
  14376. + for (i = 0; i < p_CcNode->numOfKeys + 1; i++)
  14377. + if (p_CcNode->keyAndNextEngineParams[i].p_StatsObj)
  14378. + PutStatsObj(p_CcNode,
  14379. + p_CcNode->keyAndNextEngineParams[i].p_StatsObj);
  14380. +
  14381. + if (!LIST_IsEmpty(&p_CcNode->availableStatsLst))
  14382. + {
  14383. + t_Handle h_FmMuram = FmPcdGetMuramHandle(p_CcNode->h_FmPcd);
  14384. + ASSERT_COND(h_FmMuram);
  14385. +
  14386. + FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
  14387. + }
  14388. +
  14389. + LIST_Del(&p_CcNode->availableStatsLst);
  14390. +
  14391. + ReleaseLst(&p_CcNode->ccPrevNodesLst);
  14392. + ReleaseLst(&p_CcNode->ccTreeIdLst);
  14393. + ReleaseLst(&p_CcNode->ccTreesLst);
  14394. +
  14395. + XX_Free(p_CcNode);
  14396. +}
  14397. +
  14398. +static void DeleteTree(t_FmPcdCcTree *p_FmPcdTree, t_FmPcd *p_FmPcd)
  14399. +{
  14400. + if (p_FmPcdTree)
  14401. + {
  14402. + if (p_FmPcdTree->ccTreeBaseAddr)
  14403. + {
  14404. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_FmPcd),
  14405. + UINT_TO_PTR(p_FmPcdTree->ccTreeBaseAddr));
  14406. + p_FmPcdTree->ccTreeBaseAddr = 0;
  14407. + }
  14408. +
  14409. + ReleaseLst(&p_FmPcdTree->fmPortsLst);
  14410. +
  14411. + XX_Free(p_FmPcdTree);
  14412. + }
  14413. +}
  14414. +
  14415. +static void GetCcExtractKeySize(uint8_t parseCodeRealSize,
  14416. + uint8_t *parseCodeCcSize)
  14417. +{
  14418. + if ((parseCodeRealSize > 0) && (parseCodeRealSize < 2))
  14419. + *parseCodeCcSize = 1;
  14420. + else
  14421. + if (parseCodeRealSize == 2)
  14422. + *parseCodeCcSize = 2;
  14423. + else
  14424. + if ((parseCodeRealSize > 2) && (parseCodeRealSize <= 4))
  14425. + *parseCodeCcSize = 4;
  14426. + else
  14427. + if ((parseCodeRealSize > 4) && (parseCodeRealSize <= 8))
  14428. + *parseCodeCcSize = 8;
  14429. + else
  14430. + if ((parseCodeRealSize > 8) && (parseCodeRealSize <= 16))
  14431. + *parseCodeCcSize = 16;
  14432. + else
  14433. + if ((parseCodeRealSize > 16)
  14434. + && (parseCodeRealSize <= 24))
  14435. + *parseCodeCcSize = 24;
  14436. + else
  14437. + if ((parseCodeRealSize > 24)
  14438. + && (parseCodeRealSize <= 32))
  14439. + *parseCodeCcSize = 32;
  14440. + else
  14441. + if ((parseCodeRealSize > 32)
  14442. + && (parseCodeRealSize <= 40))
  14443. + *parseCodeCcSize = 40;
  14444. + else
  14445. + if ((parseCodeRealSize > 40)
  14446. + && (parseCodeRealSize <= 48))
  14447. + *parseCodeCcSize = 48;
  14448. + else
  14449. + if ((parseCodeRealSize > 48)
  14450. + && (parseCodeRealSize <= 56))
  14451. + *parseCodeCcSize = 56;
  14452. + else
  14453. + *parseCodeCcSize = 0;
  14454. +}
  14455. +
  14456. +static void GetSizeHeaderField(e_NetHeaderType hdr, t_FmPcdFields field,
  14457. + uint8_t *parseCodeRealSize)
  14458. +{
  14459. + switch (hdr)
  14460. + {
  14461. + case (HEADER_TYPE_ETH):
  14462. + switch (field.eth)
  14463. + {
  14464. + case (NET_HEADER_FIELD_ETH_DA):
  14465. + *parseCodeRealSize = 6;
  14466. + break;
  14467. +
  14468. + case (NET_HEADER_FIELD_ETH_SA):
  14469. + *parseCodeRealSize = 6;
  14470. + break;
  14471. +
  14472. + case (NET_HEADER_FIELD_ETH_TYPE):
  14473. + *parseCodeRealSize = 2;
  14474. + break;
  14475. +
  14476. + default:
  14477. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported1"));
  14478. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14479. + break;
  14480. + }
  14481. + break;
  14482. +
  14483. + case (HEADER_TYPE_PPPoE):
  14484. + switch (field.pppoe)
  14485. + {
  14486. + case (NET_HEADER_FIELD_PPPoE_PID):
  14487. + *parseCodeRealSize = 2;
  14488. + break;
  14489. +
  14490. + default:
  14491. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported1"));
  14492. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14493. + break;
  14494. + }
  14495. + break;
  14496. +
  14497. + case (HEADER_TYPE_VLAN):
  14498. + switch (field.vlan)
  14499. + {
  14500. + case (NET_HEADER_FIELD_VLAN_TCI):
  14501. + *parseCodeRealSize = 2;
  14502. + break;
  14503. +
  14504. + default:
  14505. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported2"));
  14506. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14507. + break;
  14508. + }
  14509. + break;
  14510. +
  14511. + case (HEADER_TYPE_MPLS):
  14512. + switch (field.mpls)
  14513. + {
  14514. + case (NET_HEADER_FIELD_MPLS_LABEL_STACK):
  14515. + *parseCodeRealSize = 4;
  14516. + break;
  14517. +
  14518. + default:
  14519. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported3"));
  14520. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14521. + break;
  14522. + }
  14523. + break;
  14524. +
  14525. + case (HEADER_TYPE_IPv4):
  14526. + switch (field.ipv4)
  14527. + {
  14528. + case (NET_HEADER_FIELD_IPv4_DST_IP):
  14529. + case (NET_HEADER_FIELD_IPv4_SRC_IP):
  14530. + *parseCodeRealSize = 4;
  14531. + break;
  14532. +
  14533. + case (NET_HEADER_FIELD_IPv4_TOS):
  14534. + case (NET_HEADER_FIELD_IPv4_PROTO):
  14535. + *parseCodeRealSize = 1;
  14536. + break;
  14537. +
  14538. + case (NET_HEADER_FIELD_IPv4_DST_IP
  14539. + | NET_HEADER_FIELD_IPv4_SRC_IP):
  14540. + *parseCodeRealSize = 8;
  14541. + break;
  14542. +
  14543. + case (NET_HEADER_FIELD_IPv4_TTL):
  14544. + *parseCodeRealSize = 1;
  14545. + break;
  14546. +
  14547. + default:
  14548. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported4"));
  14549. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14550. + break;
  14551. + }
  14552. + break;
  14553. +
  14554. + case (HEADER_TYPE_IPv6):
  14555. + switch (field.ipv6)
  14556. + {
  14557. + case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL
  14558. + | NET_HEADER_FIELD_IPv6_TC):
  14559. + *parseCodeRealSize = 4;
  14560. + break;
  14561. +
  14562. + case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
  14563. + case (NET_HEADER_FIELD_IPv6_HOP_LIMIT):
  14564. + *parseCodeRealSize = 1;
  14565. + break;
  14566. +
  14567. + case (NET_HEADER_FIELD_IPv6_DST_IP):
  14568. + case (NET_HEADER_FIELD_IPv6_SRC_IP):
  14569. + *parseCodeRealSize = 16;
  14570. + break;
  14571. +
  14572. + default:
  14573. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported5"));
  14574. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14575. + break;
  14576. + }
  14577. + break;
  14578. +
  14579. + case (HEADER_TYPE_IP):
  14580. + switch (field.ip)
  14581. + {
  14582. + case (NET_HEADER_FIELD_IP_DSCP):
  14583. + case (NET_HEADER_FIELD_IP_PROTO):
  14584. + *parseCodeRealSize = 1;
  14585. + break;
  14586. +
  14587. + default:
  14588. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported5"));
  14589. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14590. + break;
  14591. + }
  14592. + break;
  14593. +
  14594. + case (HEADER_TYPE_GRE):
  14595. + switch (field.gre)
  14596. + {
  14597. + case (NET_HEADER_FIELD_GRE_TYPE):
  14598. + *parseCodeRealSize = 2;
  14599. + break;
  14600. +
  14601. + default:
  14602. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported6"));
  14603. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14604. + break;
  14605. + }
  14606. + break;
  14607. +
  14608. + case (HEADER_TYPE_MINENCAP):
  14609. + switch (field.minencap)
  14610. + {
  14611. + case (NET_HEADER_FIELD_MINENCAP_TYPE):
  14612. + *parseCodeRealSize = 1;
  14613. + break;
  14614. +
  14615. + case (NET_HEADER_FIELD_MINENCAP_DST_IP):
  14616. + case (NET_HEADER_FIELD_MINENCAP_SRC_IP):
  14617. + *parseCodeRealSize = 4;
  14618. + break;
  14619. +
  14620. + case (NET_HEADER_FIELD_MINENCAP_SRC_IP
  14621. + | NET_HEADER_FIELD_MINENCAP_DST_IP):
  14622. + *parseCodeRealSize = 8;
  14623. + break;
  14624. +
  14625. + default:
  14626. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported7"));
  14627. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14628. + break;
  14629. + }
  14630. + break;
  14631. +
  14632. + case (HEADER_TYPE_TCP):
  14633. + switch (field.tcp)
  14634. + {
  14635. + case (NET_HEADER_FIELD_TCP_PORT_SRC):
  14636. + case (NET_HEADER_FIELD_TCP_PORT_DST):
  14637. + *parseCodeRealSize = 2;
  14638. + break;
  14639. +
  14640. + case (NET_HEADER_FIELD_TCP_PORT_SRC
  14641. + | NET_HEADER_FIELD_TCP_PORT_DST):
  14642. + *parseCodeRealSize = 4;
  14643. + break;
  14644. +
  14645. + default:
  14646. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported8"));
  14647. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14648. + break;
  14649. + }
  14650. + break;
  14651. +
  14652. + case (HEADER_TYPE_UDP):
  14653. + switch (field.udp)
  14654. + {
  14655. + case (NET_HEADER_FIELD_UDP_PORT_SRC):
  14656. + case (NET_HEADER_FIELD_UDP_PORT_DST):
  14657. + *parseCodeRealSize = 2;
  14658. + break;
  14659. +
  14660. + case (NET_HEADER_FIELD_UDP_PORT_SRC
  14661. + | NET_HEADER_FIELD_UDP_PORT_DST):
  14662. + *parseCodeRealSize = 4;
  14663. + break;
  14664. +
  14665. + default:
  14666. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported9"));
  14667. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14668. + break;
  14669. + }
  14670. + break;
  14671. +
  14672. + default:
  14673. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported10"));
  14674. + *parseCodeRealSize = CC_SIZE_ILLEGAL;
  14675. + break;
  14676. + }
  14677. +}
  14678. +
  14679. +t_Error ValidateNextEngineParams(
  14680. + t_Handle h_FmPcd, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
  14681. + e_FmPcdCcStatsMode statsMode)
  14682. +{
  14683. + uint16_t absoluteProfileId;
  14684. + t_Error err = E_OK;
  14685. + uint8_t relativeSchemeId;
  14686. +
  14687. + if ((statsMode == e_FM_PCD_CC_STATS_MODE_NONE)
  14688. + && (p_FmPcdCcNextEngineParams->statisticsEn))
  14689. + RETURN_ERROR(
  14690. + MAJOR,
  14691. + E_CONFLICT,
  14692. + ("Statistics are requested for a key, but statistics mode was set"
  14693. + "to 'NONE' upon initialization"));
  14694. +
  14695. + switch (p_FmPcdCcNextEngineParams->nextEngine)
  14696. + {
  14697. + case (e_FM_PCD_INVALID):
  14698. + err = E_NOT_SUPPORTED;
  14699. + break;
  14700. +
  14701. + case (e_FM_PCD_DONE):
  14702. + if ((p_FmPcdCcNextEngineParams->params.enqueueParams.action
  14703. + == e_FM_PCD_ENQ_FRAME)
  14704. + && p_FmPcdCcNextEngineParams->params.enqueueParams.overrideFqid)
  14705. + {
  14706. + if (!p_FmPcdCcNextEngineParams->params.enqueueParams.newFqid)
  14707. + RETURN_ERROR(
  14708. + MAJOR,
  14709. + E_CONFLICT,
  14710. + ("When overrideFqid is set, newFqid must not be zero"));
  14711. + if (p_FmPcdCcNextEngineParams->params.enqueueParams.newFqid
  14712. + & ~0x00FFFFFF)
  14713. + RETURN_ERROR(
  14714. + MAJOR, E_INVALID_VALUE,
  14715. + ("fqidForCtrlFlow must be between 1 and 2^24-1"));
  14716. + }
  14717. + break;
  14718. +
  14719. + case (e_FM_PCD_KG):
  14720. + relativeSchemeId =
  14721. + FmPcdKgGetRelativeSchemeId(
  14722. + h_FmPcd,
  14723. + FmPcdKgGetSchemeId(
  14724. + p_FmPcdCcNextEngineParams->params.kgParams.h_DirectScheme));
  14725. + if (relativeSchemeId == FM_PCD_KG_NUM_OF_SCHEMES)
  14726. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  14727. + if (!FmPcdKgIsSchemeValidSw(
  14728. + p_FmPcdCcNextEngineParams->params.kgParams.h_DirectScheme))
  14729. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  14730. + ("not valid schemeIndex in KG next engine param"));
  14731. + if (!KgIsSchemeAlwaysDirect(h_FmPcd, relativeSchemeId))
  14732. + RETURN_ERROR(
  14733. + MAJOR,
  14734. + E_INVALID_STATE,
  14735. + ("CC Node may point only to a scheme that is always direct."));
  14736. + break;
  14737. +
  14738. + case (e_FM_PCD_PLCR):
  14739. + if (p_FmPcdCcNextEngineParams->params.plcrParams.overrideParams)
  14740. + {
  14741. + /* if private policer profile, it may be uninitialized yet, therefore no checks are done at this stage */
  14742. + if (p_FmPcdCcNextEngineParams->params.plcrParams.sharedProfile)
  14743. + {
  14744. + err =
  14745. + FmPcdPlcrGetAbsoluteIdByProfileParams(
  14746. + h_FmPcd,
  14747. + e_FM_PCD_PLCR_SHARED,
  14748. + NULL,
  14749. + p_FmPcdCcNextEngineParams->params.plcrParams.newRelativeProfileId,
  14750. + &absoluteProfileId);
  14751. + if (err)
  14752. + RETURN_ERROR(MAJOR, err,
  14753. + ("Shared profile offset is out of range"));
  14754. + if (!FmPcdPlcrIsProfileValid(h_FmPcd, absoluteProfileId))
  14755. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  14756. + ("Invalid profile"));
  14757. + }
  14758. + }
  14759. + break;
  14760. +
  14761. + case (e_FM_PCD_HASH):
  14762. + p_FmPcdCcNextEngineParams->nextEngine = e_FM_PCD_CC;
  14763. + case (e_FM_PCD_CC):
  14764. + if (!p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode)
  14765. + RETURN_ERROR(MAJOR, E_NULL_POINTER,
  14766. + ("handler to next Node is NULL"));
  14767. + break;
  14768. +
  14769. +#if (DPAA_VERSION >= 11)
  14770. + case (e_FM_PCD_FR):
  14771. + if (!p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic)
  14772. + err = E_NOT_SUPPORTED;
  14773. + break;
  14774. +#endif /* (DPAA_VERSION >= 11) */
  14775. +
  14776. + default:
  14777. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  14778. + ("Next engine is not correct"));
  14779. + }
  14780. +
  14781. +
  14782. + return err;
  14783. +}
  14784. +
  14785. +static uint8_t GetGenParseCode(e_FmPcdExtractFrom src,
  14786. + uint32_t offset, bool glblMask,
  14787. + uint8_t *parseArrayOffset, bool fromIc,
  14788. + ccPrivateInfo_t icCode)
  14789. +{
  14790. + if (!fromIc)
  14791. + {
  14792. + switch (src)
  14793. + {
  14794. + case (e_FM_PCD_EXTRACT_FROM_FRAME_START):
  14795. + if (glblMask)
  14796. + return CC_PC_GENERIC_WITH_MASK;
  14797. + else
  14798. + return CC_PC_GENERIC_WITHOUT_MASK;
  14799. +
  14800. + case (e_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE):
  14801. + *parseArrayOffset = CC_PC_PR_NEXT_HEADER_OFFSET;
  14802. + if (offset)
  14803. + return CC_PR_OFFSET;
  14804. + else
  14805. + return CC_PR_WITHOUT_OFFSET;
  14806. +
  14807. + default:
  14808. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 'extract from' src"));
  14809. + return CC_PC_ILLEGAL;
  14810. + }
  14811. + }
  14812. + else
  14813. + {
  14814. + switch (icCode)
  14815. + {
  14816. + case (CC_PRIVATE_INFO_IC_KEY_EXACT_MATCH):
  14817. + *parseArrayOffset = 0x50;
  14818. + return CC_PC_GENERIC_IC_GMASK;
  14819. +
  14820. + case (CC_PRIVATE_INFO_IC_HASH_EXACT_MATCH):
  14821. + *parseArrayOffset = 0x48;
  14822. + return CC_PC_GENERIC_IC_GMASK;
  14823. +
  14824. + case (CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP):
  14825. + *parseArrayOffset = 0x48;
  14826. + return CC_PC_GENERIC_IC_HASH_INDEXED;
  14827. +
  14828. + case (CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP):
  14829. + *parseArrayOffset = 0x16;
  14830. + return CC_PC_GENERIC_IC_HASH_INDEXED;
  14831. +
  14832. + default:
  14833. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 'extract from' src"));
  14834. + break;
  14835. + }
  14836. + }
  14837. +
  14838. + return CC_PC_ILLEGAL;
  14839. +}
  14840. +
  14841. +static uint8_t GetFullFieldParseCode(e_NetHeaderType hdr, e_FmPcdHdrIndex index,
  14842. + t_FmPcdFields field)
  14843. +{
  14844. + switch (hdr)
  14845. + {
  14846. + case (HEADER_TYPE_NONE):
  14847. + ASSERT_COND(FALSE);
  14848. + return CC_PC_ILLEGAL;
  14849. +
  14850. + case (HEADER_TYPE_ETH):
  14851. + switch (field.eth)
  14852. + {
  14853. + case (NET_HEADER_FIELD_ETH_DA):
  14854. + return CC_PC_FF_MACDST;
  14855. + case (NET_HEADER_FIELD_ETH_SA):
  14856. + return CC_PC_FF_MACSRC;
  14857. + case (NET_HEADER_FIELD_ETH_TYPE):
  14858. + return CC_PC_FF_ETYPE;
  14859. + default:
  14860. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  14861. + return CC_PC_ILLEGAL;
  14862. + }
  14863. +
  14864. + case (HEADER_TYPE_VLAN):
  14865. + switch (field.vlan)
  14866. + {
  14867. + case (NET_HEADER_FIELD_VLAN_TCI):
  14868. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14869. + || (index == e_FM_PCD_HDR_INDEX_1))
  14870. + return CC_PC_FF_TCI1;
  14871. + if (index == e_FM_PCD_HDR_INDEX_LAST)
  14872. + return CC_PC_FF_TCI2;
  14873. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  14874. + return CC_PC_ILLEGAL;
  14875. + default:
  14876. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  14877. + return CC_PC_ILLEGAL;
  14878. + }
  14879. +
  14880. + case (HEADER_TYPE_MPLS):
  14881. + switch (field.mpls)
  14882. + {
  14883. + case (NET_HEADER_FIELD_MPLS_LABEL_STACK):
  14884. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14885. + || (index == e_FM_PCD_HDR_INDEX_1))
  14886. + return CC_PC_FF_MPLS1;
  14887. + if (index == e_FM_PCD_HDR_INDEX_LAST)
  14888. + return CC_PC_FF_MPLS_LAST;
  14889. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS index"));
  14890. + return CC_PC_ILLEGAL;
  14891. + default:
  14892. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  14893. + return CC_PC_ILLEGAL;
  14894. + }
  14895. +
  14896. + case (HEADER_TYPE_IPv4):
  14897. + switch (field.ipv4)
  14898. + {
  14899. + case (NET_HEADER_FIELD_IPv4_DST_IP):
  14900. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14901. + || (index == e_FM_PCD_HDR_INDEX_1))
  14902. + return CC_PC_FF_IPV4DST1;
  14903. + if (index == e_FM_PCD_HDR_INDEX_2)
  14904. + return CC_PC_FF_IPV4DST2;
  14905. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  14906. + return CC_PC_ILLEGAL;
  14907. + case (NET_HEADER_FIELD_IPv4_TOS):
  14908. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14909. + || (index == e_FM_PCD_HDR_INDEX_1))
  14910. + return CC_PC_FF_IPV4IPTOS_TC1;
  14911. + if (index == e_FM_PCD_HDR_INDEX_2)
  14912. + return CC_PC_FF_IPV4IPTOS_TC2;
  14913. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  14914. + return CC_PC_ILLEGAL;
  14915. + case (NET_HEADER_FIELD_IPv4_PROTO):
  14916. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14917. + || (index == e_FM_PCD_HDR_INDEX_1))
  14918. + return CC_PC_FF_IPV4PTYPE1;
  14919. + if (index == e_FM_PCD_HDR_INDEX_2)
  14920. + return CC_PC_FF_IPV4PTYPE2;
  14921. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  14922. + return CC_PC_ILLEGAL;
  14923. + case (NET_HEADER_FIELD_IPv4_SRC_IP):
  14924. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14925. + || (index == e_FM_PCD_HDR_INDEX_1))
  14926. + return CC_PC_FF_IPV4SRC1;
  14927. + if (index == e_FM_PCD_HDR_INDEX_2)
  14928. + return CC_PC_FF_IPV4SRC2;
  14929. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  14930. + return CC_PC_ILLEGAL;
  14931. + case (NET_HEADER_FIELD_IPv4_SRC_IP
  14932. + | NET_HEADER_FIELD_IPv4_DST_IP):
  14933. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14934. + || (index == e_FM_PCD_HDR_INDEX_1))
  14935. + return CC_PC_FF_IPV4SRC1_IPV4DST1;
  14936. + if (index == e_FM_PCD_HDR_INDEX_2)
  14937. + return CC_PC_FF_IPV4SRC2_IPV4DST2;
  14938. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  14939. + return CC_PC_ILLEGAL;
  14940. + case (NET_HEADER_FIELD_IPv4_TTL):
  14941. + return CC_PC_FF_IPV4TTL;
  14942. + default:
  14943. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  14944. + return CC_PC_ILLEGAL;
  14945. + }
  14946. +
  14947. + case (HEADER_TYPE_IPv6):
  14948. + switch (field.ipv6)
  14949. + {
  14950. + case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL
  14951. + | NET_HEADER_FIELD_IPv6_TC):
  14952. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14953. + || (index == e_FM_PCD_HDR_INDEX_1))
  14954. + return CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1;
  14955. + if (index == e_FM_PCD_HDR_INDEX_2)
  14956. + return CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2;
  14957. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  14958. + return CC_PC_ILLEGAL;
  14959. +
  14960. + case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
  14961. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14962. + || (index == e_FM_PCD_HDR_INDEX_1))
  14963. + return CC_PC_FF_IPV6PTYPE1;
  14964. + if (index == e_FM_PCD_HDR_INDEX_2)
  14965. + return CC_PC_FF_IPV6PTYPE2;
  14966. + if (index == e_FM_PCD_HDR_INDEX_LAST)
  14967. + return CC_PC_FF_IPPID;
  14968. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  14969. + return CC_PC_ILLEGAL;
  14970. +
  14971. + case (NET_HEADER_FIELD_IPv6_DST_IP):
  14972. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14973. + || (index == e_FM_PCD_HDR_INDEX_1))
  14974. + return CC_PC_FF_IPV6DST1;
  14975. + if (index == e_FM_PCD_HDR_INDEX_2)
  14976. + return CC_PC_FF_IPV6DST2;
  14977. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  14978. + return CC_PC_ILLEGAL;
  14979. +
  14980. + case (NET_HEADER_FIELD_IPv6_SRC_IP):
  14981. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  14982. + || (index == e_FM_PCD_HDR_INDEX_1))
  14983. + return CC_PC_FF_IPV6SRC1;
  14984. + if (index == e_FM_PCD_HDR_INDEX_2)
  14985. + return CC_PC_FF_IPV6SRC2;
  14986. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  14987. + return CC_PC_ILLEGAL;
  14988. +
  14989. + case (NET_HEADER_FIELD_IPv6_HOP_LIMIT):
  14990. + return CC_PC_FF_IPV6HOP_LIMIT;
  14991. +
  14992. + default:
  14993. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  14994. + return CC_PC_ILLEGAL;
  14995. + }
  14996. +
  14997. + case (HEADER_TYPE_IP):
  14998. + switch (field.ip)
  14999. + {
  15000. + case (NET_HEADER_FIELD_IP_DSCP):
  15001. + if ((index == e_FM_PCD_HDR_INDEX_NONE)
  15002. + || (index == e_FM_PCD_HDR_INDEX_1))
  15003. + return CC_PC_FF_IPDSCP;
  15004. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP index"));
  15005. + return CC_PC_ILLEGAL;
  15006. +
  15007. + case (NET_HEADER_FIELD_IP_PROTO):
  15008. + if (index == e_FM_PCD_HDR_INDEX_LAST)
  15009. + return CC_PC_FF_IPPID;
  15010. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP index"));
  15011. + return CC_PC_ILLEGAL;
  15012. +
  15013. + default:
  15014. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15015. + return CC_PC_ILLEGAL;
  15016. + }
  15017. +
  15018. + case (HEADER_TYPE_GRE):
  15019. + switch (field.gre)
  15020. + {
  15021. + case (NET_HEADER_FIELD_GRE_TYPE):
  15022. + return CC_PC_FF_GREPTYPE;
  15023. +
  15024. + default:
  15025. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15026. + return CC_PC_ILLEGAL;
  15027. + }
  15028. +
  15029. + case (HEADER_TYPE_MINENCAP):
  15030. + switch (field.minencap)
  15031. + {
  15032. + case (NET_HEADER_FIELD_MINENCAP_TYPE):
  15033. + return CC_PC_FF_MINENCAP_PTYPE;
  15034. +
  15035. + case (NET_HEADER_FIELD_MINENCAP_DST_IP):
  15036. + return CC_PC_FF_MINENCAP_IPDST;
  15037. +
  15038. + case (NET_HEADER_FIELD_MINENCAP_SRC_IP):
  15039. + return CC_PC_FF_MINENCAP_IPSRC;
  15040. +
  15041. + case (NET_HEADER_FIELD_MINENCAP_SRC_IP
  15042. + | NET_HEADER_FIELD_MINENCAP_DST_IP):
  15043. + return CC_PC_FF_MINENCAP_IPSRC_IPDST;
  15044. +
  15045. + default:
  15046. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15047. + return CC_PC_ILLEGAL;
  15048. + }
  15049. +
  15050. + case (HEADER_TYPE_TCP):
  15051. + switch (field.tcp)
  15052. + {
  15053. + case (NET_HEADER_FIELD_TCP_PORT_SRC):
  15054. + return CC_PC_FF_L4PSRC;
  15055. +
  15056. + case (NET_HEADER_FIELD_TCP_PORT_DST):
  15057. + return CC_PC_FF_L4PDST;
  15058. +
  15059. + case (NET_HEADER_FIELD_TCP_PORT_DST
  15060. + | NET_HEADER_FIELD_TCP_PORT_SRC):
  15061. + return CC_PC_FF_L4PSRC_L4PDST;
  15062. +
  15063. + default:
  15064. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15065. + return CC_PC_ILLEGAL;
  15066. + }
  15067. +
  15068. + case (HEADER_TYPE_PPPoE):
  15069. + switch (field.pppoe)
  15070. + {
  15071. + case (NET_HEADER_FIELD_PPPoE_PID):
  15072. + return CC_PC_FF_PPPPID;
  15073. +
  15074. + default:
  15075. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15076. + return CC_PC_ILLEGAL;
  15077. + }
  15078. +
  15079. + case (HEADER_TYPE_UDP):
  15080. + switch (field.udp)
  15081. + {
  15082. + case (NET_HEADER_FIELD_UDP_PORT_SRC):
  15083. + return CC_PC_FF_L4PSRC;
  15084. +
  15085. + case (NET_HEADER_FIELD_UDP_PORT_DST):
  15086. + return CC_PC_FF_L4PDST;
  15087. +
  15088. + case (NET_HEADER_FIELD_UDP_PORT_DST
  15089. + | NET_HEADER_FIELD_UDP_PORT_SRC):
  15090. + return CC_PC_FF_L4PSRC_L4PDST;
  15091. +
  15092. + default:
  15093. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15094. + return CC_PC_ILLEGAL;
  15095. + }
  15096. +
  15097. + default:
  15098. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15099. + return CC_PC_ILLEGAL;
  15100. + }
  15101. +}
  15102. +
  15103. +static uint8_t GetPrParseCode(e_NetHeaderType hdr, e_FmPcdHdrIndex hdrIndex,
  15104. + uint32_t offset, bool glblMask,
  15105. + uint8_t *parseArrayOffset)
  15106. +{
  15107. + bool offsetRelevant = FALSE;
  15108. +
  15109. + if (offset)
  15110. + offsetRelevant = TRUE;
  15111. +
  15112. + switch (hdr)
  15113. + {
  15114. + case (HEADER_TYPE_NONE):
  15115. + ASSERT_COND(FALSE);
  15116. + return CC_PC_ILLEGAL;
  15117. +
  15118. + case (HEADER_TYPE_ETH):
  15119. + *parseArrayOffset = (uint8_t)CC_PC_PR_ETH_OFFSET;
  15120. + break;
  15121. +
  15122. + case (HEADER_TYPE_USER_DEFINED_SHIM1):
  15123. + if (offset || glblMask)
  15124. + *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM1_OFFSET;
  15125. + else
  15126. + return CC_PC_PR_SHIM1;
  15127. + break;
  15128. +
  15129. + case (HEADER_TYPE_USER_DEFINED_SHIM2):
  15130. + if (offset || glblMask)
  15131. + *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM2_OFFSET;
  15132. + else
  15133. + return CC_PC_PR_SHIM2;
  15134. + break;
  15135. +
  15136. + case (HEADER_TYPE_LLC_SNAP):
  15137. + *parseArrayOffset = CC_PC_PR_USER_LLC_SNAP_OFFSET;
  15138. + break;
  15139. +
  15140. + case (HEADER_TYPE_PPPoE):
  15141. + *parseArrayOffset = CC_PC_PR_PPPOE_OFFSET;
  15142. + break;
  15143. +
  15144. + case (HEADER_TYPE_MPLS):
  15145. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
  15146. + || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  15147. + *parseArrayOffset = CC_PC_PR_MPLS1_OFFSET;
  15148. + else
  15149. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  15150. + *parseArrayOffset = CC_PC_PR_MPLS_LAST_OFFSET;
  15151. + else
  15152. + {
  15153. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS header index"));
  15154. + return CC_PC_ILLEGAL;
  15155. + }
  15156. + break;
  15157. +
  15158. + case (HEADER_TYPE_IPv4):
  15159. + case (HEADER_TYPE_IPv6):
  15160. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
  15161. + || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  15162. + *parseArrayOffset = CC_PC_PR_IP1_OFFSET;
  15163. + else
  15164. + if (hdrIndex == e_FM_PCD_HDR_INDEX_2)
  15165. + *parseArrayOffset = CC_PC_PR_IP_LAST_OFFSET;
  15166. + else
  15167. + {
  15168. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP header index"));
  15169. + return CC_PC_ILLEGAL;
  15170. + }
  15171. + break;
  15172. +
  15173. + case (HEADER_TYPE_MINENCAP):
  15174. + *parseArrayOffset = CC_PC_PR_MINENC_OFFSET;
  15175. + break;
  15176. +
  15177. + case (HEADER_TYPE_GRE):
  15178. + *parseArrayOffset = CC_PC_PR_GRE_OFFSET;
  15179. + break;
  15180. +
  15181. + case (HEADER_TYPE_TCP):
  15182. + case (HEADER_TYPE_UDP):
  15183. + case (HEADER_TYPE_IPSEC_AH):
  15184. + case (HEADER_TYPE_IPSEC_ESP):
  15185. + case (HEADER_TYPE_DCCP):
  15186. + case (HEADER_TYPE_SCTP):
  15187. + *parseArrayOffset = CC_PC_PR_L4_OFFSET;
  15188. + break;
  15189. +
  15190. + default:
  15191. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP header for this type of operation"));
  15192. + return CC_PC_ILLEGAL;
  15193. + }
  15194. +
  15195. + if (offsetRelevant)
  15196. + return CC_PR_OFFSET;
  15197. + else
  15198. + return CC_PR_WITHOUT_OFFSET;
  15199. +}
  15200. +
  15201. +static uint8_t GetFieldParseCode(e_NetHeaderType hdr, t_FmPcdFields field,
  15202. + uint32_t offset, uint8_t *parseArrayOffset,
  15203. + e_FmPcdHdrIndex hdrIndex)
  15204. +{
  15205. + bool offsetRelevant = FALSE;
  15206. +
  15207. + if (offset)
  15208. + offsetRelevant = TRUE;
  15209. +
  15210. + switch (hdr)
  15211. + {
  15212. + case (HEADER_TYPE_NONE):
  15213. + ASSERT_COND(FALSE);
  15214. + break;
  15215. + case (HEADER_TYPE_ETH):
  15216. + switch (field.eth)
  15217. + {
  15218. + case (NET_HEADER_FIELD_ETH_TYPE):
  15219. + *parseArrayOffset = CC_PC_PR_ETYPE_LAST_OFFSET;
  15220. + break;
  15221. +
  15222. + default:
  15223. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15224. + return CC_PC_ILLEGAL;
  15225. + }
  15226. + break;
  15227. +
  15228. + case (HEADER_TYPE_VLAN):
  15229. + switch (field.vlan)
  15230. + {
  15231. + case (NET_HEADER_FIELD_VLAN_TCI):
  15232. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
  15233. + || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  15234. + *parseArrayOffset = CC_PC_PR_VLAN1_OFFSET;
  15235. + else
  15236. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  15237. + *parseArrayOffset = CC_PC_PR_VLAN2_OFFSET;
  15238. + break;
  15239. +
  15240. + default:
  15241. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  15242. + return CC_PC_ILLEGAL;
  15243. + }
  15244. + break;
  15245. +
  15246. + default:
  15247. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal header "));
  15248. + return CC_PC_ILLEGAL;
  15249. + }
  15250. +
  15251. + if (offsetRelevant)
  15252. + return CC_PR_OFFSET;
  15253. + else
  15254. + return CC_PR_WITHOUT_OFFSET;
  15255. +}
  15256. +
  15257. +static void FillAdOfTypeResult(t_Handle h_Ad,
  15258. + t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
  15259. + t_FmPcd *p_FmPcd,
  15260. + t_FmPcdCcNextEngineParams *p_CcNextEngineParams)
  15261. +{
  15262. + t_AdOfTypeResult *p_AdResult = (t_AdOfTypeResult *)h_Ad;
  15263. + t_Handle h_TmpAd;
  15264. + uint32_t tmp = 0, tmpNia = 0;
  15265. + uint16_t profileId;
  15266. + t_Handle p_AdNewPtr = NULL;
  15267. +
  15268. + /* There are 3 cases handled in this routine of building a "result" type AD.
  15269. + * Case 1: No Manip. The action descriptor is built within the match table.
  15270. + * Case 2: Manip exists. A new AD is created - p_AdNewPtr. It is initialized
  15271. + * either in the FmPcdManipUpdateAdResultForCc routine or it was already
  15272. + * initialized and returned here.
  15273. + * p_AdResult (within the match table) will be initialized after
  15274. + * this routine returns and point to the existing AD.
  15275. + * Case 3: Manip exists. The action descriptor is built within the match table.
  15276. + * FmPcdManipUpdateAdResultForCc returns a NULL p_AdNewPtr.
  15277. + *
  15278. + * If statistics were enabled and the statistics mode of this node requires
  15279. + * a statistics Ad, it will be placed after the result Ad and before the
  15280. + * manip Ad, if manip Ad exists here.
  15281. + */
  15282. +
  15283. + /* As default, the "new" ptr is the current one. i.e. the content of the result
  15284. + * AD will be written into the match table itself (case (1))*/
  15285. + p_AdNewPtr = p_AdResult;
  15286. +
  15287. + /* Initialize an action descriptor, if current statistics mode requires an Ad */
  15288. + if (p_FmPcdCcStatsParams)
  15289. + {
  15290. + ASSERT_COND(p_FmPcdCcStatsParams->h_StatsAd);
  15291. + ASSERT_COND(p_FmPcdCcStatsParams->h_StatsCounters);
  15292. +
  15293. + /* Swapping addresses between statistics Ad and the current lookup AD addresses */
  15294. + h_TmpAd = p_FmPcdCcStatsParams->h_StatsAd;
  15295. + p_FmPcdCcStatsParams->h_StatsAd = h_Ad;
  15296. + h_Ad = h_TmpAd;
  15297. +
  15298. + p_AdNewPtr = h_Ad;
  15299. + p_AdResult = h_Ad;
  15300. +
  15301. + /* Init statistics Ad and connect current lookup AD as 'next action' from statistics Ad */
  15302. + UpdateStatsAd(p_FmPcdCcStatsParams, h_Ad, p_FmPcd->physicalMuramBase);
  15303. + }
  15304. +
  15305. + /* Create manip and return p_AdNewPtr to either a new descriptor or NULL */
  15306. + if (p_CcNextEngineParams->h_Manip)
  15307. + FmPcdManipUpdateAdResultForCc(p_CcNextEngineParams->h_Manip,
  15308. + p_CcNextEngineParams, h_Ad, &p_AdNewPtr);
  15309. +
  15310. + /* if (p_AdNewPtr = NULL) --> Done. (case (3)) */
  15311. + if (p_AdNewPtr)
  15312. + {
  15313. + /* case (1) and (2) */
  15314. + switch (p_CcNextEngineParams->nextEngine)
  15315. + {
  15316. + case (e_FM_PCD_DONE):
  15317. + if (p_CcNextEngineParams->params.enqueueParams.action
  15318. + == e_FM_PCD_ENQ_FRAME)
  15319. + {
  15320. + if (p_CcNextEngineParams->params.enqueueParams.overrideFqid)
  15321. + {
  15322. + tmp = FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE;
  15323. + tmp |=
  15324. + p_CcNextEngineParams->params.enqueueParams.newFqid;
  15325. +#if (DPAA_VERSION >= 11)
  15326. + tmp |=
  15327. + (p_CcNextEngineParams->params.enqueueParams.newRelativeStorageProfileId
  15328. + & FM_PCD_AD_RESULT_VSP_MASK)
  15329. + << FM_PCD_AD_RESULT_VSP_SHIFT;
  15330. +#endif /* (DPAA_VERSION >= 11) */
  15331. + }
  15332. + else
  15333. + {
  15334. + tmp = FM_PCD_AD_RESULT_DATA_FLOW_TYPE;
  15335. + tmp |= FM_PCD_AD_RESULT_PLCR_DIS;
  15336. + }
  15337. + }
  15338. +
  15339. + if (p_CcNextEngineParams->params.enqueueParams.action
  15340. + == e_FM_PCD_DROP_FRAME)
  15341. + tmpNia |= GET_NIA_BMI_AC_DISCARD_FRAME(p_FmPcd);
  15342. + else
  15343. + tmpNia |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
  15344. + break;
  15345. +
  15346. + case (e_FM_PCD_KG):
  15347. + if (p_CcNextEngineParams->params.kgParams.overrideFqid)
  15348. + {
  15349. + tmp = FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE;
  15350. + tmp |= p_CcNextEngineParams->params.kgParams.newFqid;
  15351. +#if (DPAA_VERSION >= 11)
  15352. + tmp |=
  15353. + (p_CcNextEngineParams->params.kgParams.newRelativeStorageProfileId
  15354. + & FM_PCD_AD_RESULT_VSP_MASK)
  15355. + << FM_PCD_AD_RESULT_VSP_SHIFT;
  15356. +#endif /* (DPAA_VERSION >= 11) */
  15357. + }
  15358. + else
  15359. + {
  15360. + tmp = FM_PCD_AD_RESULT_DATA_FLOW_TYPE;
  15361. + tmp |= FM_PCD_AD_RESULT_PLCR_DIS;
  15362. + }
  15363. + tmpNia = NIA_KG_DIRECT;
  15364. + tmpNia |= NIA_ENG_KG;
  15365. + tmpNia |= NIA_KG_CC_EN;
  15366. + tmpNia |= FmPcdKgGetSchemeId(
  15367. + p_CcNextEngineParams->params.kgParams.h_DirectScheme);
  15368. + break;
  15369. +
  15370. + case (e_FM_PCD_PLCR):
  15371. + if (p_CcNextEngineParams->params.plcrParams.overrideParams)
  15372. + {
  15373. + tmp = FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE;
  15374. +
  15375. + /* if private policer profile, it may be uninitialized yet, therefore no checks are done at this stage */
  15376. + if (p_CcNextEngineParams->params.plcrParams.sharedProfile)
  15377. + {
  15378. + tmpNia |= NIA_PLCR_ABSOLUTE;
  15379. + FmPcdPlcrGetAbsoluteIdByProfileParams(
  15380. + (t_Handle)p_FmPcd,
  15381. + e_FM_PCD_PLCR_SHARED,
  15382. + NULL,
  15383. + p_CcNextEngineParams->params.plcrParams.newRelativeProfileId,
  15384. + &profileId);
  15385. + }
  15386. + else
  15387. + profileId =
  15388. + p_CcNextEngineParams->params.plcrParams.newRelativeProfileId;
  15389. +
  15390. + tmp |= p_CcNextEngineParams->params.plcrParams.newFqid;
  15391. +#if (DPAA_VERSION >= 11)
  15392. + tmp |=
  15393. + (p_CcNextEngineParams->params.plcrParams.newRelativeStorageProfileId
  15394. + & FM_PCD_AD_RESULT_VSP_MASK)
  15395. + << FM_PCD_AD_RESULT_VSP_SHIFT;
  15396. +#endif /* (DPAA_VERSION >= 11) */
  15397. + WRITE_UINT32(
  15398. + p_AdResult->plcrProfile,
  15399. + (uint32_t)((uint32_t)profileId << FM_PCD_AD_PROFILEID_FOR_CNTRL_SHIFT));
  15400. + }
  15401. + else
  15402. + tmp = FM_PCD_AD_RESULT_DATA_FLOW_TYPE;
  15403. +
  15404. + tmpNia |=
  15405. + NIA_ENG_PLCR
  15406. + | p_CcNextEngineParams->params.plcrParams.newRelativeProfileId;
  15407. + break;
  15408. +
  15409. + default:
  15410. + return;
  15411. + }WRITE_UINT32(p_AdResult->fqid, tmp);
  15412. +
  15413. + if (p_CcNextEngineParams->h_Manip)
  15414. + {
  15415. + tmp = GET_UINT32(p_AdResult->plcrProfile);
  15416. + tmp |= (uint32_t)(XX_VirtToPhys(p_AdNewPtr)
  15417. + - (p_FmPcd->physicalMuramBase)) >> 4;
  15418. + WRITE_UINT32(p_AdResult->plcrProfile, tmp);
  15419. +
  15420. + tmpNia |= FM_PCD_AD_RESULT_EXTENDED_MODE;
  15421. + tmpNia |= FM_PCD_AD_RESULT_NADEN;
  15422. + }
  15423. +
  15424. +#if (DPAA_VERSION >= 11)
  15425. + tmpNia |= FM_PCD_AD_RESULT_NO_OM_VSPE;
  15426. +#endif /* (DPAA_VERSION >= 11) */
  15427. + WRITE_UINT32(p_AdResult->nia, tmpNia);
  15428. + }
  15429. +}
  15430. +
  15431. +static t_Error CcUpdateParams(t_Handle h_FmPcd, t_Handle h_PcdParams,
  15432. + t_Handle h_FmPort, t_Handle h_FmTree,
  15433. + bool validate)
  15434. +{
  15435. + t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_FmTree;
  15436. +
  15437. + return CcUpdateParam(h_FmPcd, h_PcdParams, h_FmPort,
  15438. + p_CcTree->keyAndNextEngineParams,
  15439. + p_CcTree->numOfEntries,
  15440. + UINT_TO_PTR(p_CcTree->ccTreeBaseAddr), validate, 0,
  15441. + h_FmTree, FALSE);
  15442. +}
  15443. +
  15444. +
  15445. +static void ReleaseNewNodeCommonPart(
  15446. + t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
  15447. +{
  15448. + if (p_AdditionalInfo->p_AdTableNew)
  15449. + FM_MURAM_FreeMem(
  15450. + FmPcdGetMuramHandle(
  15451. + ((t_FmPcdCcNode *)(p_AdditionalInfo->h_CurrentNode))->h_FmPcd),
  15452. + p_AdditionalInfo->p_AdTableNew);
  15453. +
  15454. + if (p_AdditionalInfo->p_KeysMatchTableNew)
  15455. + FM_MURAM_FreeMem(
  15456. + FmPcdGetMuramHandle(
  15457. + ((t_FmPcdCcNode *)(p_AdditionalInfo->h_CurrentNode))->h_FmPcd),
  15458. + p_AdditionalInfo->p_KeysMatchTableNew);
  15459. +}
  15460. +
  15461. +static t_Error UpdateGblMask(t_FmPcdCcNode *p_CcNode, uint8_t keySize,
  15462. + uint8_t *p_Mask)
  15463. +{
  15464. + uint8_t prvGlblMaskSize = p_CcNode->glblMaskSize;
  15465. +
  15466. + if (p_Mask && !p_CcNode->glblMaskUpdated && (keySize <= 4)
  15467. + && !p_CcNode->lclMask)
  15468. + {
  15469. + if (p_CcNode->parseCode && (p_CcNode->parseCode != CC_PC_FF_TCI1)
  15470. + && (p_CcNode->parseCode != CC_PC_FF_TCI2)
  15471. + && (p_CcNode->parseCode != CC_PC_FF_MPLS1)
  15472. + && (p_CcNode->parseCode != CC_PC_FF_MPLS_LAST)
  15473. + && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC1)
  15474. + && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC2)
  15475. + && (p_CcNode->parseCode != CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1)
  15476. + && (p_CcNode->parseCode != CC_PC_FF_IPDSCP)
  15477. + && (p_CcNode->parseCode != CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2))
  15478. + {
  15479. + p_CcNode->glblMaskSize = 0;
  15480. + p_CcNode->lclMask = TRUE;
  15481. + }
  15482. + else
  15483. + {
  15484. + memcpy(p_CcNode->p_GlblMask, p_Mask, (sizeof(uint8_t)) * keySize);
  15485. + p_CcNode->glblMaskUpdated = TRUE;
  15486. + p_CcNode->glblMaskSize = 4;
  15487. + }
  15488. + }
  15489. + else
  15490. + if (p_Mask && (keySize <= 4) && !p_CcNode->lclMask)
  15491. + {
  15492. + if (memcmp(p_CcNode->p_GlblMask, p_Mask, keySize) != 0)
  15493. + {
  15494. + p_CcNode->lclMask = TRUE;
  15495. + p_CcNode->glblMaskSize = 0;
  15496. + }
  15497. + }
  15498. + else
  15499. + if (!p_Mask && p_CcNode->glblMaskUpdated && (keySize <= 4))
  15500. + {
  15501. + uint32_t tmpMask = 0xffffffff;
  15502. + if (memcmp(p_CcNode->p_GlblMask, &tmpMask, 4) != 0)
  15503. + {
  15504. + p_CcNode->lclMask = TRUE;
  15505. + p_CcNode->glblMaskSize = 0;
  15506. + }
  15507. + }
  15508. + else
  15509. + if (p_Mask)
  15510. + {
  15511. + p_CcNode->lclMask = TRUE;
  15512. + p_CcNode->glblMaskSize = 0;
  15513. + }
  15514. +
  15515. + /* In static mode (maxNumOfKeys > 0), local mask is supported
  15516. + only is mask support was enabled at initialization */
  15517. + if (p_CcNode->maxNumOfKeys && (!p_CcNode->maskSupport) && p_CcNode->lclMask)
  15518. + {
  15519. + p_CcNode->lclMask = FALSE;
  15520. + p_CcNode->glblMaskSize = prvGlblMaskSize;
  15521. + return ERROR_CODE(E_NOT_SUPPORTED);
  15522. + }
  15523. +
  15524. + return E_OK;
  15525. +}
  15526. +
  15527. +static __inline__ t_Handle GetNewAd(t_Handle h_FmPcdCcNodeOrTree, bool isTree)
  15528. +{
  15529. + t_FmPcd *p_FmPcd;
  15530. + t_Handle h_Ad;
  15531. +
  15532. + if (isTree)
  15533. + p_FmPcd = (t_FmPcd *)(((t_FmPcdCcTree *)h_FmPcdCcNodeOrTree)->h_FmPcd);
  15534. + else
  15535. + p_FmPcd = (t_FmPcd *)(((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->h_FmPcd);
  15536. +
  15537. + if ((isTree && p_FmPcd->p_CcShadow)
  15538. + || (!isTree && ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->maxNumOfKeys))
  15539. + {
  15540. + /* The allocated shadow is divided as follows:
  15541. + 0 . . . 16 . . .
  15542. + ---------------------------------------------------
  15543. + | Shadow | Shadow Keys | Shadow Next |
  15544. + | Ad | Match Table | Engine Table |
  15545. + | (16 bytes) | (maximal size) | (maximal size) |
  15546. + ---------------------------------------------------
  15547. + */
  15548. + if (!p_FmPcd->p_CcShadow)
  15549. + {
  15550. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("CC Shadow not allocated"));
  15551. + return NULL;
  15552. + }
  15553. +
  15554. + h_Ad = p_FmPcd->p_CcShadow;
  15555. + }
  15556. + else
  15557. + {
  15558. + h_Ad = (t_Handle)FM_MURAM_AllocMem(FmPcdGetMuramHandle(p_FmPcd),
  15559. + FM_PCD_CC_AD_ENTRY_SIZE,
  15560. + FM_PCD_CC_AD_TABLE_ALIGN);
  15561. + if (!h_Ad)
  15562. + {
  15563. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC node action descriptor"));
  15564. + return NULL;
  15565. + }
  15566. + }
  15567. +
  15568. + return h_Ad;
  15569. +}
  15570. +
  15571. +static t_Error BuildNewNodeCommonPart(
  15572. + t_FmPcdCcNode *p_CcNode, int *size,
  15573. + t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
  15574. +{
  15575. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  15576. +
  15577. + if (p_CcNode->lclMask)
  15578. + *size = 2 * p_CcNode->ccKeySizeAccExtraction;
  15579. + else
  15580. + *size = p_CcNode->ccKeySizeAccExtraction;
  15581. +
  15582. + if (p_CcNode->maxNumOfKeys == 0)
  15583. + {
  15584. + p_AdditionalInfo->p_AdTableNew = (t_Handle)FM_MURAM_AllocMem(
  15585. + FmPcdGetMuramHandle(p_FmPcd),
  15586. + (uint32_t)((p_AdditionalInfo->numOfKeys + 1)
  15587. + * FM_PCD_CC_AD_ENTRY_SIZE),
  15588. + FM_PCD_CC_AD_TABLE_ALIGN);
  15589. + if (!p_AdditionalInfo->p_AdTableNew)
  15590. + RETURN_ERROR(
  15591. + MAJOR, E_NO_MEMORY,
  15592. + ("MURAM allocation for CC node action descriptors table"));
  15593. +
  15594. + p_AdditionalInfo->p_KeysMatchTableNew = (t_Handle)FM_MURAM_AllocMem(
  15595. + FmPcdGetMuramHandle(p_FmPcd),
  15596. + (uint32_t)(*size * sizeof(uint8_t)
  15597. + * (p_AdditionalInfo->numOfKeys + 1)),
  15598. + FM_PCD_CC_KEYS_MATCH_TABLE_ALIGN);
  15599. + if (!p_AdditionalInfo->p_KeysMatchTableNew)
  15600. + {
  15601. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_CcNode->h_FmPcd),
  15602. + p_AdditionalInfo->p_AdTableNew);
  15603. + p_AdditionalInfo->p_AdTableNew = NULL;
  15604. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  15605. + ("MURAM allocation for CC node key match table"));
  15606. + }
  15607. +
  15608. + MemSet8(
  15609. + (uint8_t*)p_AdditionalInfo->p_AdTableNew,
  15610. + 0,
  15611. + (uint32_t)((p_AdditionalInfo->numOfKeys + 1)
  15612. + * FM_PCD_CC_AD_ENTRY_SIZE));
  15613. + MemSet8((uint8_t*)p_AdditionalInfo->p_KeysMatchTableNew, 0,
  15614. + *size * sizeof(uint8_t) * (p_AdditionalInfo->numOfKeys + 1));
  15615. + }
  15616. + else
  15617. + {
  15618. + /* The allocated shadow is divided as follows:
  15619. + 0 . . . 16 . . .
  15620. + ---------------------------------------------------
  15621. + | Shadow | Shadow Keys | Shadow Next |
  15622. + | Ad | Match Table | Engine Table |
  15623. + | (16 bytes) | (maximal size) | (maximal size) |
  15624. + ---------------------------------------------------
  15625. + */
  15626. +
  15627. + if (!p_FmPcd->p_CcShadow)
  15628. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("CC Shadow not allocated"));
  15629. +
  15630. + p_AdditionalInfo->p_KeysMatchTableNew =
  15631. + PTR_MOVE(p_FmPcd->p_CcShadow, FM_PCD_CC_AD_ENTRY_SIZE);
  15632. + p_AdditionalInfo->p_AdTableNew =
  15633. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, p_CcNode->keysMatchTableMaxSize);
  15634. +
  15635. + MemSet8(
  15636. + (uint8_t*)p_AdditionalInfo->p_AdTableNew,
  15637. + 0,
  15638. + (uint32_t)((p_CcNode->maxNumOfKeys + 1)
  15639. + * FM_PCD_CC_AD_ENTRY_SIZE));
  15640. + MemSet8((uint8_t*)p_AdditionalInfo->p_KeysMatchTableNew, 0,
  15641. + (*size) * sizeof(uint8_t) * (p_CcNode->maxNumOfKeys));
  15642. + }
  15643. +
  15644. + p_AdditionalInfo->p_AdTableOld = p_CcNode->h_AdTable;
  15645. + p_AdditionalInfo->p_KeysMatchTableOld = p_CcNode->h_KeysMatchTable;
  15646. +
  15647. + return E_OK;
  15648. +}
  15649. +
  15650. +static t_Error BuildNewNodeAddOrMdfyKeyAndNextEngine(
  15651. + t_Handle h_FmPcd, t_FmPcdCcNode *p_CcNode, uint16_t keyIndex,
  15652. + t_FmPcdCcKeyParams *p_KeyParams,
  15653. + t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo, bool add)
  15654. +{
  15655. + t_Error err = E_OK;
  15656. + t_Handle p_AdTableNewTmp, p_KeysMatchTableNewTmp;
  15657. + t_Handle p_KeysMatchTableOldTmp, p_AdTableOldTmp;
  15658. + int size;
  15659. + int i = 0, j = 0;
  15660. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  15661. + uint32_t requiredAction = 0;
  15662. + bool prvLclMask;
  15663. + t_CcNodeInformation *p_CcNodeInformation;
  15664. + t_FmPcdCcStatsParams statsParams = { 0 };
  15665. + t_List *p_Pos;
  15666. + t_FmPcdStatsObj *p_StatsObj;
  15667. +
  15668. + /* Check that new NIA is legal */
  15669. + err = ValidateNextEngineParams(h_FmPcd, &p_KeyParams->ccNextEngineParams,
  15670. + p_CcNode->statisticsMode);
  15671. + if (err)
  15672. + RETURN_ERROR(MAJOR, err, NO_MSG);
  15673. +
  15674. + prvLclMask = p_CcNode->lclMask;
  15675. +
  15676. + /* Check that new key is not require update of localMask */
  15677. + err = UpdateGblMask(p_CcNode, p_CcNode->ccKeySizeAccExtraction,
  15678. + p_KeyParams->p_Mask);
  15679. + if (err)
  15680. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  15681. +
  15682. + /* Update internal data structure with new next engine for the given index */
  15683. + memcpy(&p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams,
  15684. + &p_KeyParams->ccNextEngineParams, sizeof(t_FmPcdCcNextEngineParams));
  15685. +
  15686. + memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].key,
  15687. + p_KeyParams->p_Key, p_CcNode->userSizeOfExtraction);
  15688. +
  15689. + if ((p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  15690. + == e_FM_PCD_CC)
  15691. + && p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
  15692. + {
  15693. + err =
  15694. + AllocAndFillAdForContLookupManip(
  15695. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode);
  15696. + if (err)
  15697. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  15698. + }
  15699. +
  15700. + if (p_KeyParams->p_Mask)
  15701. + memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask,
  15702. + p_KeyParams->p_Mask, p_CcNode->userSizeOfExtraction);
  15703. + else
  15704. + memset(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask, 0xFF,
  15705. + p_CcNode->userSizeOfExtraction);
  15706. +
  15707. + /* Update numOfKeys */
  15708. + if (add)
  15709. + p_AdditionalInfo->numOfKeys = (uint8_t)(p_CcNode->numOfKeys + 1);
  15710. + else
  15711. + p_AdditionalInfo->numOfKeys = (uint8_t)p_CcNode->numOfKeys;
  15712. +
  15713. + /* Allocate new tables in MURAM: keys match table and action descriptors table */
  15714. + err = BuildNewNodeCommonPart(p_CcNode, &size, p_AdditionalInfo);
  15715. + if (err)
  15716. + RETURN_ERROR(MAJOR, err, NO_MSG);
  15717. +
  15718. + /* Check that manip is legal and what requiredAction is necessary for this manip */
  15719. + if (p_KeyParams->ccNextEngineParams.h_Manip)
  15720. + {
  15721. + err = FmPcdManipCheckParamsForCcNextEngine(
  15722. + &p_KeyParams->ccNextEngineParams, &requiredAction);
  15723. + if (err)
  15724. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  15725. + }
  15726. +
  15727. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction =
  15728. + requiredAction;
  15729. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction |=
  15730. + UPDATE_CC_WITH_TREE;
  15731. +
  15732. + /* Update new Ad and new Key Table according to new requirement */
  15733. + i = 0;
  15734. + for (j = 0; j < p_AdditionalInfo->numOfKeys; j++)
  15735. + {
  15736. + p_AdTableNewTmp =
  15737. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j*FM_PCD_CC_AD_ENTRY_SIZE);
  15738. +
  15739. + if (j == keyIndex)
  15740. + {
  15741. + if (p_KeyParams->ccNextEngineParams.statisticsEn)
  15742. + {
  15743. + /* Allocate a statistics object that holds statistics AD and counters.
  15744. + - For added key - New statistics AD and counters pointer need to be allocated
  15745. + new statistics object. If statistics were enabled, we need to replace the
  15746. + existing descriptor with a new descriptor with nullified counters.
  15747. + */
  15748. + p_StatsObj = GetStatsObj(p_CcNode);
  15749. + ASSERT_COND(p_StatsObj);
  15750. +
  15751. + /* Store allocated statistics object */
  15752. + ASSERT_COND(keyIndex < CC_MAX_NUM_OF_KEYS);
  15753. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj =
  15754. + p_StatsObj;
  15755. +
  15756. + statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
  15757. + statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
  15758. +#if (DPAA_VERSION >= 11)
  15759. + statsParams.h_StatsFLRs = p_CcNode->h_StatsFLRs;
  15760. +
  15761. +#endif /* (DPAA_VERSION >= 11) */
  15762. +
  15763. + /* Building action descriptor for the received new key */
  15764. + NextStepAd(p_AdTableNewTmp, &statsParams,
  15765. + &p_KeyParams->ccNextEngineParams, p_FmPcd);
  15766. + }
  15767. + else
  15768. + {
  15769. + /* Building action descriptor for the received new key */
  15770. + NextStepAd(p_AdTableNewTmp, NULL,
  15771. + &p_KeyParams->ccNextEngineParams, p_FmPcd);
  15772. + }
  15773. +
  15774. + /* Copy the received new key into keys match table */
  15775. + p_KeysMatchTableNewTmp =
  15776. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j*size*sizeof(uint8_t));
  15777. +
  15778. + MemCpy8((void*)p_KeysMatchTableNewTmp, p_KeyParams->p_Key,
  15779. + p_CcNode->userSizeOfExtraction);
  15780. +
  15781. + /* Update mask for the received new key */
  15782. + if (p_CcNode->lclMask)
  15783. + {
  15784. + if (p_KeyParams->p_Mask)
  15785. + {
  15786. + MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
  15787. + p_CcNode->ccKeySizeAccExtraction),
  15788. + p_KeyParams->p_Mask,
  15789. + p_CcNode->userSizeOfExtraction);
  15790. + }
  15791. + else
  15792. + if (p_CcNode->ccKeySizeAccExtraction > 4)
  15793. + {
  15794. + MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
  15795. + p_CcNode->ccKeySizeAccExtraction),
  15796. + 0xff, p_CcNode->userSizeOfExtraction);
  15797. + }
  15798. + else
  15799. + {
  15800. + MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
  15801. + p_CcNode->ccKeySizeAccExtraction),
  15802. + p_CcNode->p_GlblMask,
  15803. + p_CcNode->userSizeOfExtraction);
  15804. + }
  15805. + }
  15806. +
  15807. + /* If key modification requested, the old entry is omitted and replaced by the new parameters */
  15808. + if (!add)
  15809. + i++;
  15810. + }
  15811. + else
  15812. + {
  15813. + /* Copy existing action descriptors to the newly allocated Ad table */
  15814. + p_AdTableOldTmp =
  15815. + PTR_MOVE(p_AdditionalInfo->p_AdTableOld, i*FM_PCD_CC_AD_ENTRY_SIZE);
  15816. + MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp,
  15817. + FM_PCD_CC_AD_ENTRY_SIZE);
  15818. +
  15819. + /* Copy existing keys and their masks to the newly allocated keys match table */
  15820. + p_KeysMatchTableNewTmp =
  15821. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j * size * sizeof(uint8_t));
  15822. + p_KeysMatchTableOldTmp =
  15823. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableOld, i * size * sizeof(uint8_t));
  15824. +
  15825. + if (p_CcNode->lclMask)
  15826. + {
  15827. + if (prvLclMask)
  15828. + {
  15829. + MemCpy8(
  15830. + PTR_MOVE(p_KeysMatchTableNewTmp, p_CcNode->ccKeySizeAccExtraction),
  15831. + PTR_MOVE(p_KeysMatchTableOldTmp, p_CcNode->ccKeySizeAccExtraction),
  15832. + p_CcNode->ccKeySizeAccExtraction);
  15833. + }
  15834. + else
  15835. + {
  15836. + p_KeysMatchTableOldTmp =
  15837. + PTR_MOVE(p_CcNode->h_KeysMatchTable,
  15838. + i * (int)p_CcNode->ccKeySizeAccExtraction * sizeof(uint8_t));
  15839. +
  15840. + if (p_CcNode->ccKeySizeAccExtraction > 4)
  15841. + {
  15842. + MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
  15843. + p_CcNode->ccKeySizeAccExtraction),
  15844. + 0xff, p_CcNode->userSizeOfExtraction);
  15845. + }
  15846. + else
  15847. + {
  15848. + MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
  15849. + p_CcNode->ccKeySizeAccExtraction),
  15850. + p_CcNode->p_GlblMask,
  15851. + p_CcNode->userSizeOfExtraction);
  15852. + }
  15853. + }
  15854. + }
  15855. +
  15856. + MemCpy8(p_KeysMatchTableNewTmp, p_KeysMatchTableOldTmp,
  15857. + p_CcNode->ccKeySizeAccExtraction);
  15858. +
  15859. + i++;
  15860. + }
  15861. + }
  15862. +
  15863. + /* Miss action descriptor */
  15864. + p_AdTableNewTmp =
  15865. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j * FM_PCD_CC_AD_ENTRY_SIZE);
  15866. + p_AdTableOldTmp =
  15867. + PTR_MOVE(p_AdditionalInfo->p_AdTableOld, i * FM_PCD_CC_AD_ENTRY_SIZE);
  15868. + MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  15869. +
  15870. + if (!LIST_IsEmpty(&p_CcNode->ccTreesLst))
  15871. + {
  15872. + LIST_FOR_EACH(p_Pos, &p_CcNode->ccTreesLst)
  15873. + {
  15874. + p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
  15875. + ASSERT_COND(p_CcNodeInformation->h_CcNode);
  15876. + /* Update the manipulation which has to be updated from parameters of the port */
  15877. + /* It's has to be updated with restrictions defined in the function */
  15878. + err =
  15879. + SetRequiredAction(
  15880. + p_CcNode->h_FmPcd,
  15881. + p_CcNode->shadowAction
  15882. + | p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction,
  15883. + &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
  15884. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, keyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
  15885. + 1, p_CcNodeInformation->h_CcNode);
  15886. + if (err)
  15887. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  15888. +
  15889. + err =
  15890. + CcUpdateParam(
  15891. + p_CcNode->h_FmPcd,
  15892. + NULL,
  15893. + NULL,
  15894. + &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
  15895. + 1,
  15896. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, keyIndex*FM_PCD_CC_AD_ENTRY_SIZE),
  15897. + TRUE, p_CcNodeInformation->index,
  15898. + p_CcNodeInformation->h_CcNode, TRUE);
  15899. + if (err)
  15900. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  15901. + }
  15902. + }
  15903. +
  15904. + if (p_CcNode->lclMask)
  15905. + memset(p_CcNode->p_GlblMask, 0xff, CC_GLBL_MASK_SIZE * sizeof(uint8_t));
  15906. +
  15907. + if (p_KeyParams->ccNextEngineParams.nextEngine == e_FM_PCD_CC)
  15908. + p_AdditionalInfo->h_NodeForAdd =
  15909. + p_KeyParams->ccNextEngineParams.params.ccParams.h_CcNode;
  15910. + if (p_KeyParams->ccNextEngineParams.h_Manip)
  15911. + p_AdditionalInfo->h_ManipForAdd =
  15912. + p_KeyParams->ccNextEngineParams.h_Manip;
  15913. +
  15914. +#if (DPAA_VERSION >= 11)
  15915. + if ((p_KeyParams->ccNextEngineParams.nextEngine == e_FM_PCD_FR)
  15916. + && (p_KeyParams->ccNextEngineParams.params.frParams.h_FrmReplic))
  15917. + p_AdditionalInfo->h_FrmReplicForAdd =
  15918. + p_KeyParams->ccNextEngineParams.params.frParams.h_FrmReplic;
  15919. +#endif /* (DPAA_VERSION >= 11) */
  15920. +
  15921. + if (!add)
  15922. + {
  15923. + if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  15924. + == e_FM_PCD_CC)
  15925. + p_AdditionalInfo->h_NodeForRmv =
  15926. + p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
  15927. +
  15928. + if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
  15929. + p_AdditionalInfo->h_ManipForRmv =
  15930. + p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
  15931. +
  15932. + /* If statistics were previously enabled, store the old statistics object to be released */
  15933. + if (p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
  15934. + {
  15935. + p_AdditionalInfo->p_StatsObjForRmv =
  15936. + p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj;
  15937. + }
  15938. +
  15939. +#if (DPAA_VERSION >= 11)
  15940. + if ((p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  15941. + == e_FM_PCD_FR)
  15942. + && (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
  15943. + p_AdditionalInfo->h_FrmReplicForRmv =
  15944. + p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
  15945. +#endif /* (DPAA_VERSION >= 11) */
  15946. + }
  15947. +
  15948. + return E_OK;
  15949. +}
  15950. +
  15951. +static t_Error BuildNewNodeRemoveKey(
  15952. + t_FmPcdCcNode *p_CcNode, uint16_t keyIndex,
  15953. + t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
  15954. +{
  15955. + int i = 0, j = 0;
  15956. + t_Handle p_AdTableNewTmp, p_KeysMatchTableNewTmp;
  15957. + t_Handle p_KeysMatchTableOldTmp, p_AdTableOldTmp;
  15958. + int size;
  15959. + t_Error err = E_OK;
  15960. +
  15961. + /*save new numOfKeys*/
  15962. + p_AdditionalInfo->numOfKeys = (uint16_t)(p_CcNode->numOfKeys - 1);
  15963. +
  15964. + /*function which allocates in the memory new KeyTbl, AdTbl*/
  15965. + err = BuildNewNodeCommonPart(p_CcNode, &size, p_AdditionalInfo);
  15966. + if (err)
  15967. + RETURN_ERROR(MAJOR, err, NO_MSG);
  15968. +
  15969. + /*update new Ad and new Key Table according to new requirement*/
  15970. + for (i = 0, j = 0; j < p_CcNode->numOfKeys; i++, j++)
  15971. + {
  15972. + if (j == keyIndex)
  15973. + j++;
  15974. +
  15975. + if (j == p_CcNode->numOfKeys)
  15976. + break;
  15977. + p_AdTableNewTmp =
  15978. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, i * FM_PCD_CC_AD_ENTRY_SIZE);
  15979. + p_AdTableOldTmp =
  15980. + PTR_MOVE(p_AdditionalInfo->p_AdTableOld, j * FM_PCD_CC_AD_ENTRY_SIZE);
  15981. + MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  15982. +
  15983. + p_KeysMatchTableOldTmp =
  15984. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableOld, j * size * sizeof(uint8_t));
  15985. + p_KeysMatchTableNewTmp =
  15986. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, i * size * sizeof(uint8_t));
  15987. + MemCpy8(p_KeysMatchTableNewTmp, p_KeysMatchTableOldTmp,
  15988. + size * sizeof(uint8_t));
  15989. + }
  15990. +
  15991. + p_AdTableNewTmp =
  15992. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, i * FM_PCD_CC_AD_ENTRY_SIZE);
  15993. + p_AdTableOldTmp =
  15994. + PTR_MOVE(p_AdditionalInfo->p_AdTableOld, j * FM_PCD_CC_AD_ENTRY_SIZE);
  15995. + MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  15996. +
  15997. + if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  15998. + == e_FM_PCD_CC)
  15999. + p_AdditionalInfo->h_NodeForRmv =
  16000. + p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
  16001. +
  16002. + if (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
  16003. + p_AdditionalInfo->h_ManipForRmv =
  16004. + p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
  16005. +
  16006. + /* If statistics were previously enabled, store the old statistics object to be released */
  16007. + if (p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
  16008. + {
  16009. + p_AdditionalInfo->p_StatsObjForRmv =
  16010. + p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj;
  16011. + }
  16012. +
  16013. +#if (DPAA_VERSION >= 11)
  16014. + if ((p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  16015. + == e_FM_PCD_FR)
  16016. + && (p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
  16017. + p_AdditionalInfo->h_FrmReplicForRmv =
  16018. + p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
  16019. +#endif /* (DPAA_VERSION >= 11) */
  16020. +
  16021. + return E_OK;
  16022. +}
  16023. +
  16024. +static t_Error BuildNewNodeModifyKey(
  16025. + t_FmPcdCcNode *p_CcNode, uint16_t keyIndex, uint8_t *p_Key,
  16026. + uint8_t *p_Mask, t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
  16027. +{
  16028. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  16029. + t_Error err = E_OK;
  16030. + t_Handle p_AdTableNewTmp, p_KeysMatchTableNewTmp;
  16031. + t_Handle p_KeysMatchTableOldTmp, p_AdTableOldTmp;
  16032. + int size;
  16033. + int i = 0, j = 0;
  16034. + bool prvLclMask;
  16035. + t_FmPcdStatsObj *p_StatsObj, tmpStatsObj;
  16036. + p_AdditionalInfo->numOfKeys = p_CcNode->numOfKeys;
  16037. +
  16038. + prvLclMask = p_CcNode->lclMask;
  16039. +
  16040. + /* Check that new key is not require update of localMask */
  16041. + err = UpdateGblMask(p_CcNode, p_CcNode->ccKeySizeAccExtraction, p_Mask);
  16042. + if (err)
  16043. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16044. +
  16045. + /* Update internal data structure with new next engine for the given index */
  16046. + memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].key, p_Key,
  16047. + p_CcNode->userSizeOfExtraction);
  16048. +
  16049. + if (p_Mask)
  16050. + memcpy(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask, p_Mask,
  16051. + p_CcNode->userSizeOfExtraction);
  16052. + else
  16053. + memset(p_AdditionalInfo->keyAndNextEngineParams[keyIndex].mask, 0xFF,
  16054. + p_CcNode->userSizeOfExtraction);
  16055. +
  16056. + /*function which build in the memory new KeyTbl, AdTbl*/
  16057. + err = BuildNewNodeCommonPart(p_CcNode, &size, p_AdditionalInfo);
  16058. + if (err)
  16059. + RETURN_ERROR(MAJOR, err, NO_MSG);
  16060. +
  16061. + /*fill the New AdTable and New KeyTable*/
  16062. + for (j = 0, i = 0; j < p_AdditionalInfo->numOfKeys; j++, i++)
  16063. + {
  16064. + p_AdTableNewTmp =
  16065. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j*FM_PCD_CC_AD_ENTRY_SIZE);
  16066. + p_AdTableOldTmp =
  16067. + PTR_MOVE(p_AdditionalInfo->p_AdTableOld, i*FM_PCD_CC_AD_ENTRY_SIZE);
  16068. +
  16069. + MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  16070. +
  16071. + if (j == keyIndex)
  16072. + {
  16073. + ASSERT_COND(keyIndex < CC_MAX_NUM_OF_KEYS);
  16074. + if (p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
  16075. + {
  16076. + /* As statistics were enabled, we need to update the existing
  16077. + statistics descriptor with a new nullified counters. */
  16078. + p_StatsObj = GetStatsObj(p_CcNode);
  16079. + ASSERT_COND(p_StatsObj);
  16080. +
  16081. + SetStatsCounters(
  16082. + p_AdTableNewTmp,
  16083. + (uint32_t)((XX_VirtToPhys(p_StatsObj->h_StatsCounters)
  16084. + - p_FmPcd->physicalMuramBase)));
  16085. +
  16086. + tmpStatsObj.h_StatsAd = p_StatsObj->h_StatsAd;
  16087. + tmpStatsObj.h_StatsCounters = p_StatsObj->h_StatsCounters;
  16088. +
  16089. + /* As we need to replace only the counters, we build a new statistics
  16090. + object that holds the old AD and the new counters - this will be the
  16091. + currently used statistics object.
  16092. + The newly allocated AD is not required and may be released back to
  16093. + the available objects with the previous counters pointer. */
  16094. + p_StatsObj->h_StatsAd =
  16095. + p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsAd;
  16096. +
  16097. + p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsAd =
  16098. + tmpStatsObj.h_StatsAd;
  16099. +
  16100. + /* Store allocated statistics object */
  16101. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj =
  16102. + p_StatsObj;
  16103. +
  16104. + /* As statistics were previously enabled, store the old statistics object to be released */
  16105. + p_AdditionalInfo->p_StatsObjForRmv =
  16106. + p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj;
  16107. + }
  16108. +
  16109. + p_KeysMatchTableNewTmp =
  16110. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j * size * sizeof(uint8_t));
  16111. +
  16112. + MemCpy8(p_KeysMatchTableNewTmp, p_Key,
  16113. + p_CcNode->userSizeOfExtraction);
  16114. +
  16115. + if (p_CcNode->lclMask)
  16116. + {
  16117. + if (p_Mask)
  16118. + MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
  16119. + p_CcNode->ccKeySizeAccExtraction),
  16120. + p_Mask, p_CcNode->userSizeOfExtraction);
  16121. + else
  16122. + if (p_CcNode->ccKeySizeAccExtraction > 4)
  16123. + MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
  16124. + p_CcNode->ccKeySizeAccExtraction),
  16125. + 0xff, p_CcNode->userSizeOfExtraction);
  16126. + else
  16127. + MemCpy8(PTR_MOVE(p_KeysMatchTableNewTmp,
  16128. + p_CcNode->ccKeySizeAccExtraction),
  16129. + p_CcNode->p_GlblMask,
  16130. + p_CcNode->userSizeOfExtraction);
  16131. + }
  16132. + }
  16133. + else
  16134. + {
  16135. + p_KeysMatchTableNewTmp =
  16136. + PTR_MOVE(p_AdditionalInfo->p_KeysMatchTableNew, j * size * sizeof(uint8_t));
  16137. + p_KeysMatchTableOldTmp =
  16138. + PTR_MOVE(p_CcNode->h_KeysMatchTable, i * size * sizeof(uint8_t));
  16139. +
  16140. + if (p_CcNode->lclMask)
  16141. + {
  16142. + if (prvLclMask)
  16143. + MemCpy8(
  16144. + PTR_MOVE(p_KeysMatchTableNewTmp, p_CcNode->ccKeySizeAccExtraction),
  16145. + PTR_MOVE(p_KeysMatchTableOldTmp, p_CcNode->ccKeySizeAccExtraction),
  16146. + p_CcNode->userSizeOfExtraction);
  16147. + else
  16148. + {
  16149. + p_KeysMatchTableOldTmp =
  16150. + PTR_MOVE(p_CcNode->h_KeysMatchTable,
  16151. + i * (int)p_CcNode->ccKeySizeAccExtraction * sizeof(uint8_t));
  16152. +
  16153. + if (p_CcNode->ccKeySizeAccExtraction > 4)
  16154. + MemSet8(PTR_MOVE(p_KeysMatchTableNewTmp,
  16155. + p_CcNode->ccKeySizeAccExtraction),
  16156. + 0xff, p_CcNode->userSizeOfExtraction);
  16157. + else
  16158. + MemCpy8(
  16159. + PTR_MOVE(p_KeysMatchTableNewTmp, p_CcNode->ccKeySizeAccExtraction),
  16160. + p_CcNode->p_GlblMask,
  16161. + p_CcNode->userSizeOfExtraction);
  16162. + }
  16163. + }
  16164. + MemCpy8((void*)p_KeysMatchTableNewTmp, p_KeysMatchTableOldTmp,
  16165. + p_CcNode->ccKeySizeAccExtraction);
  16166. + }
  16167. + }
  16168. +
  16169. + p_AdTableNewTmp =
  16170. + PTR_MOVE(p_AdditionalInfo->p_AdTableNew, j * FM_PCD_CC_AD_ENTRY_SIZE);
  16171. + p_AdTableOldTmp = PTR_MOVE(p_CcNode->h_AdTable, i * FM_PCD_CC_AD_ENTRY_SIZE);
  16172. +
  16173. + MemCpy8(p_AdTableNewTmp, p_AdTableOldTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  16174. +
  16175. + return E_OK;
  16176. +}
  16177. +
  16178. +static t_Error BuildNewNodeModifyNextEngine(
  16179. + t_Handle h_FmPcd, t_Handle h_FmPcdCcNodeOrTree, uint16_t keyIndex,
  16180. + t_FmPcdCcNextEngineParams *p_CcNextEngineParams, t_List *h_OldLst,
  16181. + t_List *h_NewLst, t_FmPcdModifyCcKeyAdditionalParams *p_AdditionalInfo)
  16182. +{
  16183. + t_Error err = E_OK;
  16184. + uint32_t requiredAction = 0;
  16185. + t_List *p_Pos;
  16186. + t_CcNodeInformation *p_CcNodeInformation, ccNodeInfo;
  16187. + t_Handle p_Ad;
  16188. + t_FmPcdCcNode *p_FmPcdCcNode1 = NULL;
  16189. + t_FmPcdCcTree *p_FmPcdCcTree = NULL;
  16190. + t_FmPcdStatsObj *p_StatsObj;
  16191. + t_FmPcdCcStatsParams statsParams = { 0 };
  16192. +
  16193. + ASSERT_COND(p_CcNextEngineParams);
  16194. +
  16195. + /* check that new NIA is legal */
  16196. + if (!p_AdditionalInfo->tree)
  16197. + err = ValidateNextEngineParams(
  16198. + h_FmPcd, p_CcNextEngineParams,
  16199. + ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->statisticsMode);
  16200. + else
  16201. + /* Statistics are not supported for CC root */
  16202. + err = ValidateNextEngineParams(h_FmPcd, p_CcNextEngineParams,
  16203. + e_FM_PCD_CC_STATS_MODE_NONE);
  16204. + if (err)
  16205. + RETURN_ERROR(MAJOR, err, NO_MSG);
  16206. +
  16207. + /* Update internal data structure for next engine per index (index - key) */
  16208. + memcpy(&p_AdditionalInfo->keyAndNextEngineParams[keyIndex].nextEngineParams,
  16209. + p_CcNextEngineParams, sizeof(t_FmPcdCcNextEngineParams));
  16210. +
  16211. + /* Check that manip is legal and what requiredAction is necessary for this manip */
  16212. + if (p_CcNextEngineParams->h_Manip)
  16213. + {
  16214. + err = FmPcdManipCheckParamsForCcNextEngine(p_CcNextEngineParams,
  16215. + &requiredAction);
  16216. + if (err)
  16217. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16218. + }
  16219. +
  16220. + if (!p_AdditionalInfo->tree)
  16221. + {
  16222. + p_FmPcdCcNode1 = (t_FmPcdCcNode *)h_FmPcdCcNodeOrTree;
  16223. + p_AdditionalInfo->numOfKeys = p_FmPcdCcNode1->numOfKeys;
  16224. + p_Ad = p_FmPcdCcNode1->h_AdTable;
  16225. +
  16226. + if (p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  16227. + == e_FM_PCD_CC)
  16228. + p_AdditionalInfo->h_NodeForRmv =
  16229. + p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
  16230. +
  16231. + if (p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
  16232. + p_AdditionalInfo->h_ManipForRmv =
  16233. + p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
  16234. +
  16235. +#if (DPAA_VERSION >= 11)
  16236. + if ((p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  16237. + == e_FM_PCD_FR)
  16238. + && (p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
  16239. + p_AdditionalInfo->h_FrmReplicForRmv =
  16240. + p_FmPcdCcNode1->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
  16241. +#endif /* (DPAA_VERSION >= 11) */
  16242. + }
  16243. + else
  16244. + {
  16245. + p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcNodeOrTree;
  16246. + p_Ad = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
  16247. +
  16248. + if (p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  16249. + == e_FM_PCD_CC)
  16250. + p_AdditionalInfo->h_NodeForRmv =
  16251. + p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.params.ccParams.h_CcNode;
  16252. +
  16253. + if (p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip)
  16254. + p_AdditionalInfo->h_ManipForRmv =
  16255. + p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.h_Manip;
  16256. +
  16257. +#if (DPAA_VERSION >= 11)
  16258. + if ((p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.nextEngine
  16259. + == e_FM_PCD_FR)
  16260. + && (p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic))
  16261. + p_AdditionalInfo->h_FrmReplicForRmv =
  16262. + p_FmPcdCcTree->keyAndNextEngineParams[keyIndex].nextEngineParams.params.frParams.h_FrmReplic;
  16263. +#endif /* (DPAA_VERSION >= 11) */
  16264. + }
  16265. +
  16266. + if ((p_CcNextEngineParams->nextEngine == e_FM_PCD_CC)
  16267. + && p_CcNextEngineParams->h_Manip)
  16268. + {
  16269. + err = AllocAndFillAdForContLookupManip(
  16270. + p_CcNextEngineParams->params.ccParams.h_CcNode);
  16271. + if (err)
  16272. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16273. + }
  16274. +
  16275. + ASSERT_COND(p_Ad);
  16276. +
  16277. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  16278. + ccNodeInfo.h_CcNode = PTR_MOVE(p_Ad, keyIndex * FM_PCD_CC_AD_ENTRY_SIZE);
  16279. +
  16280. + /* If statistics were enabled, this Ad is the statistics Ad. Need to follow its
  16281. + nextAction to retrieve the actual Nia-Ad. If statistics should remain enabled,
  16282. + only the actual Nia-Ad should be modified. */
  16283. + if ((!p_AdditionalInfo->tree)
  16284. + && (((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj)
  16285. + && (p_CcNextEngineParams->statisticsEn))
  16286. + ccNodeInfo.h_CcNode =
  16287. + ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsAd;
  16288. +
  16289. + EnqueueNodeInfoToRelevantLst(h_OldLst, &ccNodeInfo, NULL);
  16290. +
  16291. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  16292. + p_Ad = GetNewAd(h_FmPcdCcNodeOrTree, p_AdditionalInfo->tree);
  16293. + if (!p_Ad)
  16294. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  16295. + ("MURAM allocation for CC node action descriptor"));
  16296. + MemSet8((uint8_t *)p_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  16297. +
  16298. + /* If statistics were not enabled before, but requested now - Allocate a statistics
  16299. + object that holds statistics AD and counters. */
  16300. + if ((!p_AdditionalInfo->tree)
  16301. + && (!((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj)
  16302. + && (p_CcNextEngineParams->statisticsEn))
  16303. + {
  16304. + p_StatsObj = GetStatsObj((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree);
  16305. + ASSERT_COND(p_StatsObj);
  16306. +
  16307. + /* Store allocated statistics object */
  16308. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj =
  16309. + p_StatsObj;
  16310. +
  16311. + statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
  16312. + statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
  16313. +
  16314. +#if (DPAA_VERSION >= 11)
  16315. + statsParams.h_StatsFLRs =
  16316. + ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->h_StatsFLRs;
  16317. +
  16318. +#endif /* (DPAA_VERSION >= 11) */
  16319. +
  16320. + NextStepAd(p_Ad, &statsParams, p_CcNextEngineParams, h_FmPcd);
  16321. + }
  16322. + else
  16323. + NextStepAd(p_Ad, NULL, p_CcNextEngineParams, h_FmPcd);
  16324. +
  16325. + ccNodeInfo.h_CcNode = p_Ad;
  16326. + EnqueueNodeInfoToRelevantLst(h_NewLst, &ccNodeInfo, NULL);
  16327. +
  16328. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction =
  16329. + requiredAction;
  16330. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction |=
  16331. + UPDATE_CC_WITH_TREE;
  16332. +
  16333. + if (!p_AdditionalInfo->tree)
  16334. + {
  16335. + ASSERT_COND(p_FmPcdCcNode1);
  16336. + if (!LIST_IsEmpty(&p_FmPcdCcNode1->ccTreesLst))
  16337. + {
  16338. + LIST_FOR_EACH(p_Pos, &p_FmPcdCcNode1->ccTreesLst)
  16339. + {
  16340. + p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
  16341. +
  16342. + ASSERT_COND(p_CcNodeInformation->h_CcNode);
  16343. + /* Update the manipulation which has to be updated from parameters of the port
  16344. + it's has to be updated with restrictions defined in the function */
  16345. +
  16346. + err =
  16347. + SetRequiredAction(
  16348. + p_FmPcdCcNode1->h_FmPcd,
  16349. + p_FmPcdCcNode1->shadowAction
  16350. + | p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction,
  16351. + &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
  16352. + p_Ad, 1, p_CcNodeInformation->h_CcNode);
  16353. + if (err)
  16354. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16355. +
  16356. + err = CcUpdateParam(
  16357. + p_FmPcdCcNode1->h_FmPcd, NULL, NULL,
  16358. + &p_AdditionalInfo->keyAndNextEngineParams[keyIndex], 1,
  16359. + p_Ad, TRUE, p_CcNodeInformation->index,
  16360. + p_CcNodeInformation->h_CcNode, TRUE);
  16361. + if (err)
  16362. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16363. + }
  16364. + }
  16365. + }
  16366. + else
  16367. + {
  16368. + ASSERT_COND(p_FmPcdCcTree);
  16369. +
  16370. + err =
  16371. + SetRequiredAction(
  16372. + h_FmPcd,
  16373. + p_FmPcdCcTree->requiredAction
  16374. + | p_AdditionalInfo->keyAndNextEngineParams[keyIndex].requiredAction,
  16375. + &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
  16376. + p_Ad, 1, (t_Handle)p_FmPcdCcTree);
  16377. + if (err)
  16378. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16379. +
  16380. + err = CcUpdateParam(h_FmPcd, NULL, NULL,
  16381. + &p_AdditionalInfo->keyAndNextEngineParams[keyIndex],
  16382. + 1, p_Ad, TRUE, 0, (t_Handle)p_FmPcdCcTree, TRUE);
  16383. + if (err)
  16384. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16385. + }
  16386. +
  16387. + if (p_CcNextEngineParams->nextEngine == e_FM_PCD_CC)
  16388. + p_AdditionalInfo->h_NodeForAdd =
  16389. + p_CcNextEngineParams->params.ccParams.h_CcNode;
  16390. + if (p_CcNextEngineParams->h_Manip)
  16391. + p_AdditionalInfo->h_ManipForAdd = p_CcNextEngineParams->h_Manip;
  16392. +
  16393. + /* If statistics were previously enabled, but now are disabled,
  16394. + store the old statistics object to be released */
  16395. + if ((!p_AdditionalInfo->tree)
  16396. + && (((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj)
  16397. + && (!p_CcNextEngineParams->statisticsEn))
  16398. + {
  16399. + p_AdditionalInfo->p_StatsObjForRmv =
  16400. + ((t_FmPcdCcNode *)h_FmPcdCcNodeOrTree)->keyAndNextEngineParams[keyIndex].p_StatsObj;
  16401. +
  16402. +
  16403. + p_AdditionalInfo->keyAndNextEngineParams[keyIndex].p_StatsObj = NULL;
  16404. + }
  16405. +#if (DPAA_VERSION >= 11)
  16406. + if ((p_CcNextEngineParams->nextEngine == e_FM_PCD_FR)
  16407. + && (p_CcNextEngineParams->params.frParams.h_FrmReplic))
  16408. + p_AdditionalInfo->h_FrmReplicForAdd =
  16409. + p_CcNextEngineParams->params.frParams.h_FrmReplic;
  16410. +#endif /* (DPAA_VERSION >= 11) */
  16411. +
  16412. + return E_OK;
  16413. +}
  16414. +
  16415. +static void UpdateAdPtrOfNodesWhichPointsOnCrntMdfNode(
  16416. + t_FmPcdCcNode *p_CrntMdfNode, t_List *h_OldLst,
  16417. + t_FmPcdCcNextEngineParams **p_NextEngineParams)
  16418. +{
  16419. + t_CcNodeInformation *p_CcNodeInformation;
  16420. + t_FmPcdCcNode *p_NodePtrOnCurrentMdfNode = NULL;
  16421. + t_List *p_Pos;
  16422. + int i = 0;
  16423. + t_Handle p_AdTablePtOnCrntCurrentMdfNode/*, p_AdTableNewModified*/;
  16424. + t_CcNodeInformation ccNodeInfo;
  16425. +
  16426. + LIST_FOR_EACH(p_Pos, &p_CrntMdfNode->ccPrevNodesLst)
  16427. + {
  16428. + p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
  16429. + p_NodePtrOnCurrentMdfNode =
  16430. + (t_FmPcdCcNode *)p_CcNodeInformation->h_CcNode;
  16431. +
  16432. + ASSERT_COND(p_NodePtrOnCurrentMdfNode);
  16433. +
  16434. + /* Search in the previous node which exact index points on this current modified node for getting AD */
  16435. + for (i = 0; i < p_NodePtrOnCurrentMdfNode->numOfKeys + 1; i++)
  16436. + {
  16437. + if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  16438. + == e_FM_PCD_CC)
  16439. + {
  16440. + if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode
  16441. + == (t_Handle)p_CrntMdfNode)
  16442. + {
  16443. + if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
  16444. + p_AdTablePtOnCrntCurrentMdfNode = p_CrntMdfNode->h_Ad;
  16445. + else
  16446. + if (p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].p_StatsObj)
  16447. + p_AdTablePtOnCrntCurrentMdfNode =
  16448. + p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].p_StatsObj->h_StatsAd;
  16449. + else
  16450. + p_AdTablePtOnCrntCurrentMdfNode =
  16451. + PTR_MOVE(p_NodePtrOnCurrentMdfNode->h_AdTable, i*FM_PCD_CC_AD_ENTRY_SIZE);
  16452. +
  16453. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  16454. + ccNodeInfo.h_CcNode = p_AdTablePtOnCrntCurrentMdfNode;
  16455. + EnqueueNodeInfoToRelevantLst(h_OldLst, &ccNodeInfo, NULL);
  16456. +
  16457. + if (!(*p_NextEngineParams))
  16458. + *p_NextEngineParams =
  16459. + &p_NodePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams;
  16460. + }
  16461. + }
  16462. + }
  16463. +
  16464. + ASSERT_COND(i != p_NodePtrOnCurrentMdfNode->numOfKeys);
  16465. + }
  16466. +}
  16467. +
  16468. +static void UpdateAdPtrOfTreesWhichPointsOnCrntMdfNode(
  16469. + t_FmPcdCcNode *p_CrntMdfNode, t_List *h_OldLst,
  16470. + t_FmPcdCcNextEngineParams **p_NextEngineParams)
  16471. +{
  16472. + t_CcNodeInformation *p_CcNodeInformation;
  16473. + t_FmPcdCcTree *p_TreePtrOnCurrentMdfNode = NULL;
  16474. + t_List *p_Pos;
  16475. + int i = 0;
  16476. + t_Handle p_AdTableTmp;
  16477. + t_CcNodeInformation ccNodeInfo;
  16478. +
  16479. + LIST_FOR_EACH(p_Pos, &p_CrntMdfNode->ccTreeIdLst)
  16480. + {
  16481. + p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
  16482. + p_TreePtrOnCurrentMdfNode =
  16483. + (t_FmPcdCcTree *)p_CcNodeInformation->h_CcNode;
  16484. +
  16485. + ASSERT_COND(p_TreePtrOnCurrentMdfNode);
  16486. +
  16487. + /*search in the trees which exact index points on this current modified node for getting AD */
  16488. + for (i = 0; i < p_TreePtrOnCurrentMdfNode->numOfEntries; i++)
  16489. + {
  16490. + if (p_TreePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  16491. + == e_FM_PCD_CC)
  16492. + {
  16493. + if (p_TreePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode
  16494. + == (t_Handle)p_CrntMdfNode)
  16495. + {
  16496. + p_AdTableTmp =
  16497. + UINT_TO_PTR(p_TreePtrOnCurrentMdfNode->ccTreeBaseAddr + i*FM_PCD_CC_AD_ENTRY_SIZE);
  16498. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  16499. + ccNodeInfo.h_CcNode = p_AdTableTmp;
  16500. + EnqueueNodeInfoToRelevantLst(h_OldLst, &ccNodeInfo, NULL);
  16501. +
  16502. + if (!(*p_NextEngineParams))
  16503. + *p_NextEngineParams =
  16504. + &p_TreePtrOnCurrentMdfNode->keyAndNextEngineParams[i].nextEngineParams;
  16505. + }
  16506. + }
  16507. + }
  16508. +
  16509. + ASSERT_COND(i == p_TreePtrOnCurrentMdfNode->numOfEntries);
  16510. + }
  16511. +}
  16512. +
  16513. +static t_FmPcdModifyCcKeyAdditionalParams * ModifyNodeCommonPart(
  16514. + t_Handle h_FmPcdCcNodeOrTree, uint16_t keyIndex,
  16515. + e_ModifyState modifyState, bool ttlCheck, bool hashCheck, bool tree)
  16516. +{
  16517. + t_FmPcdModifyCcKeyAdditionalParams *p_FmPcdModifyCcKeyAdditionalParams;
  16518. + int i = 0, j = 0;
  16519. + bool wasUpdate = FALSE;
  16520. + t_FmPcdCcNode *p_CcNode = NULL;
  16521. + t_FmPcdCcTree *p_FmPcdCcTree;
  16522. + uint16_t numOfKeys;
  16523. + t_FmPcdCcKeyAndNextEngineParams *p_KeyAndNextEngineParams;
  16524. +
  16525. + SANITY_CHECK_RETURN_VALUE(h_FmPcdCcNodeOrTree, E_INVALID_HANDLE, NULL);
  16526. +
  16527. + if (!tree)
  16528. + {
  16529. + p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNodeOrTree;
  16530. + numOfKeys = p_CcNode->numOfKeys;
  16531. +
  16532. + /* node has to be pointed by another node or tree */
  16533. +
  16534. + p_KeyAndNextEngineParams = (t_FmPcdCcKeyAndNextEngineParams *)XX_Malloc(
  16535. + sizeof(t_FmPcdCcKeyAndNextEngineParams) * (numOfKeys + 1));
  16536. + if (!p_KeyAndNextEngineParams)
  16537. + {
  16538. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Next engine and required action structure"));
  16539. + return NULL;
  16540. + }
  16541. + memcpy(p_KeyAndNextEngineParams, p_CcNode->keyAndNextEngineParams,
  16542. + (numOfKeys + 1) * sizeof(t_FmPcdCcKeyAndNextEngineParams));
  16543. +
  16544. + if (ttlCheck)
  16545. + {
  16546. + if ((p_CcNode->parseCode == CC_PC_FF_IPV4TTL)
  16547. + || (p_CcNode->parseCode == CC_PC_FF_IPV6HOP_LIMIT))
  16548. + {
  16549. + XX_Free(p_KeyAndNextEngineParams);
  16550. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("nodeId of CC_PC_FF_IPV4TTL or CC_PC_FF_IPV6HOP_LIMIT can not be used for this operation"));
  16551. + return NULL;
  16552. + }
  16553. + }
  16554. +
  16555. + if (hashCheck)
  16556. + {
  16557. + if (p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED)
  16558. + {
  16559. + XX_Free(p_KeyAndNextEngineParams);
  16560. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("nodeId of CC_PC_GENERIC_IC_HASH_INDEXED can not be used for this operation"));
  16561. + return NULL;
  16562. + }
  16563. + }
  16564. + }
  16565. + else
  16566. + {
  16567. + p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcNodeOrTree;
  16568. + numOfKeys = p_FmPcdCcTree->numOfEntries;
  16569. +
  16570. + p_KeyAndNextEngineParams = (t_FmPcdCcKeyAndNextEngineParams *)XX_Malloc(
  16571. + sizeof(t_FmPcdCcKeyAndNextEngineParams)
  16572. + * FM_PCD_MAX_NUM_OF_CC_GROUPS);
  16573. + if (!p_KeyAndNextEngineParams)
  16574. + {
  16575. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Next engine and required action structure"));
  16576. + return NULL;
  16577. + }
  16578. + memcpy(p_KeyAndNextEngineParams,
  16579. + p_FmPcdCcTree->keyAndNextEngineParams,
  16580. + FM_PCD_MAX_NUM_OF_CC_GROUPS
  16581. + * sizeof(t_FmPcdCcKeyAndNextEngineParams));
  16582. + }
  16583. +
  16584. + p_FmPcdModifyCcKeyAdditionalParams =
  16585. + (t_FmPcdModifyCcKeyAdditionalParams *)XX_Malloc(
  16586. + sizeof(t_FmPcdModifyCcKeyAdditionalParams));
  16587. + if (!p_FmPcdModifyCcKeyAdditionalParams)
  16588. + {
  16589. + XX_Free(p_KeyAndNextEngineParams);
  16590. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Allocation of internal data structure FAILED"));
  16591. + return NULL;
  16592. + }
  16593. + memset(p_FmPcdModifyCcKeyAdditionalParams, 0,
  16594. + sizeof(t_FmPcdModifyCcKeyAdditionalParams));
  16595. +
  16596. + p_FmPcdModifyCcKeyAdditionalParams->h_CurrentNode = h_FmPcdCcNodeOrTree;
  16597. + p_FmPcdModifyCcKeyAdditionalParams->savedKeyIndex = keyIndex;
  16598. +
  16599. + while (i < numOfKeys)
  16600. + {
  16601. + if ((j == keyIndex) && !wasUpdate)
  16602. + {
  16603. + if (modifyState == e_MODIFY_STATE_ADD)
  16604. + j++;
  16605. + else
  16606. + if (modifyState == e_MODIFY_STATE_REMOVE)
  16607. + i++;
  16608. + wasUpdate = TRUE;
  16609. + }
  16610. + else
  16611. + {
  16612. + memcpy(&p_FmPcdModifyCcKeyAdditionalParams->keyAndNextEngineParams[j],
  16613. + p_KeyAndNextEngineParams + i,
  16614. + sizeof(t_FmPcdCcKeyAndNextEngineParams));
  16615. + i++;
  16616. + j++;
  16617. + }
  16618. + }
  16619. +
  16620. + if (keyIndex == numOfKeys)
  16621. + {
  16622. + if (modifyState == e_MODIFY_STATE_ADD)
  16623. + j++;
  16624. + }
  16625. +
  16626. + memcpy(&p_FmPcdModifyCcKeyAdditionalParams->keyAndNextEngineParams[j],
  16627. + p_KeyAndNextEngineParams + numOfKeys,
  16628. + sizeof(t_FmPcdCcKeyAndNextEngineParams));
  16629. +
  16630. + XX_Free(p_KeyAndNextEngineParams);
  16631. +
  16632. + return p_FmPcdModifyCcKeyAdditionalParams;
  16633. +}
  16634. +
  16635. +static t_Error UpdatePtrWhichPointOnCrntMdfNode(
  16636. + t_FmPcdCcNode *p_CcNode,
  16637. + t_FmPcdModifyCcKeyAdditionalParams *p_FmPcdModifyCcKeyAdditionalParams,
  16638. + t_List *h_OldLst, t_List *h_NewLst)
  16639. +{
  16640. + t_FmPcdCcNextEngineParams *p_NextEngineParams = NULL;
  16641. + t_CcNodeInformation ccNodeInfo = { 0 };
  16642. + t_Handle h_NewAd;
  16643. + t_Handle h_OrigAd = NULL;
  16644. +
  16645. + /* Building a list of all action descriptors that point to the previous node */
  16646. + if (!LIST_IsEmpty(&p_CcNode->ccPrevNodesLst))
  16647. + UpdateAdPtrOfNodesWhichPointsOnCrntMdfNode(p_CcNode, h_OldLst,
  16648. + &p_NextEngineParams);
  16649. +
  16650. + if (!LIST_IsEmpty(&p_CcNode->ccTreeIdLst))
  16651. + UpdateAdPtrOfTreesWhichPointsOnCrntMdfNode(p_CcNode, h_OldLst,
  16652. + &p_NextEngineParams);
  16653. +
  16654. + /* This node must be found as next engine of one of its previous nodes or trees*/
  16655. + if (p_NextEngineParams)
  16656. + {
  16657. + /* Building a new action descriptor that points to the modified node */
  16658. + h_NewAd = GetNewAd(p_CcNode, FALSE);
  16659. + if (!h_NewAd)
  16660. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  16661. + MemSet8(h_NewAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  16662. +
  16663. + h_OrigAd = p_CcNode->h_Ad;
  16664. + BuildNewAd(h_NewAd, p_FmPcdModifyCcKeyAdditionalParams, p_CcNode,
  16665. + p_NextEngineParams);
  16666. +
  16667. + ccNodeInfo.h_CcNode = h_NewAd;
  16668. + EnqueueNodeInfoToRelevantLst(h_NewLst, &ccNodeInfo, NULL);
  16669. +
  16670. + if (p_NextEngineParams->h_Manip && !h_OrigAd)
  16671. + FmPcdManipUpdateOwner(p_NextEngineParams->h_Manip, FALSE);
  16672. + }
  16673. + return E_OK;
  16674. +}
  16675. +
  16676. +static void UpdateCcRootOwner(t_FmPcdCcTree *p_FmPcdCcTree, bool add)
  16677. +{
  16678. + ASSERT_COND(p_FmPcdCcTree);
  16679. +
  16680. + /* this routine must be protected by the calling routine! */
  16681. +
  16682. + if (add)
  16683. + p_FmPcdCcTree->owners++;
  16684. + else
  16685. + {
  16686. + ASSERT_COND(p_FmPcdCcTree->owners);
  16687. + p_FmPcdCcTree->owners--;
  16688. + }
  16689. +}
  16690. +
  16691. +static t_Error CheckAndSetManipParamsWithCcNodeParams(t_FmPcdCcNode *p_CcNode)
  16692. +{
  16693. + t_Error err = E_OK;
  16694. + int i = 0;
  16695. +
  16696. + for (i = 0; i < p_CcNode->numOfKeys; i++)
  16697. + {
  16698. + if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
  16699. + {
  16700. + err =
  16701. + FmPcdManipCheckParamsWithCcNodeParams(
  16702. + p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip,
  16703. + (t_Handle)p_CcNode);
  16704. + if (err)
  16705. + return err;
  16706. + }
  16707. + }
  16708. +
  16709. + return err;
  16710. +}
  16711. +static t_Error ValidateAndCalcStatsParams(t_FmPcdCcNode *p_CcNode,
  16712. + t_FmPcdCcNodeParams *p_CcNodeParam,
  16713. + uint32_t *p_NumOfRanges,
  16714. + uint32_t *p_CountersArraySize)
  16715. +{
  16716. + e_FmPcdCcStatsMode statisticsMode = p_CcNode->statisticsMode;
  16717. + uint32_t i;
  16718. +
  16719. + UNUSED(p_CcNodeParam);
  16720. +
  16721. + switch (statisticsMode)
  16722. + {
  16723. + case e_FM_PCD_CC_STATS_MODE_NONE:
  16724. + for (i = 0; i < p_CcNode->numOfKeys; i++)
  16725. + if (p_CcNodeParam->keysParams.keyParams[i].ccNextEngineParams.statisticsEn)
  16726. + RETURN_ERROR(
  16727. + MAJOR,
  16728. + E_INVALID_VALUE,
  16729. + ("Statistics cannot be enabled for key %d when statistics mode was set to 'NONE'", i));
  16730. + return E_OK;
  16731. +
  16732. + case e_FM_PCD_CC_STATS_MODE_FRAME:
  16733. + case e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME:
  16734. + *p_NumOfRanges = 1;
  16735. + *p_CountersArraySize = 2 * FM_PCD_CC_STATS_COUNTER_SIZE;
  16736. + return E_OK;
  16737. +
  16738. +#if (DPAA_VERSION >= 11)
  16739. + case e_FM_PCD_CC_STATS_MODE_RMON:
  16740. + {
  16741. + uint16_t *p_FrameLengthRanges =
  16742. + p_CcNodeParam->keysParams.frameLengthRanges;
  16743. + uint32_t i;
  16744. +
  16745. + if (p_FrameLengthRanges[0] <= 0)
  16746. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Statistics mode"));
  16747. +
  16748. + if (p_FrameLengthRanges[0] == 0xFFFF)
  16749. + {
  16750. + *p_NumOfRanges = 1;
  16751. + *p_CountersArraySize = 2 * FM_PCD_CC_STATS_COUNTER_SIZE;
  16752. + return E_OK;
  16753. + }
  16754. +
  16755. + for (i = 1; i < FM_PCD_CC_STATS_MAX_NUM_OF_FLR; i++)
  16756. + {
  16757. + if (p_FrameLengthRanges[i - 1] >= p_FrameLengthRanges[i])
  16758. + RETURN_ERROR(
  16759. + MAJOR,
  16760. + E_INVALID_VALUE,
  16761. + ("Frame length range must be larger at least by 1 from preceding range"));
  16762. +
  16763. + /* Stop when last range is reached */
  16764. + if (p_FrameLengthRanges[i] == 0xFFFF)
  16765. + break;
  16766. + }
  16767. +
  16768. + if ((i >= FM_PCD_CC_STATS_MAX_NUM_OF_FLR)
  16769. + || (p_FrameLengthRanges[i] != 0xFFFF))
  16770. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  16771. + ("Last Frame length range must be 0xFFFF"));
  16772. +
  16773. + *p_NumOfRanges = i + 1;
  16774. +
  16775. + /* Allocate an extra counter for byte count, as counters
  16776. + array always begins with byte count */
  16777. + *p_CountersArraySize = (*p_NumOfRanges + 1)
  16778. + * FM_PCD_CC_STATS_COUNTER_SIZE;
  16779. +
  16780. + }
  16781. + return E_OK;
  16782. +#endif /* (DPAA_VERSION >= 11) */
  16783. +
  16784. + default:
  16785. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Statistics mode"));
  16786. + }
  16787. +}
  16788. +
  16789. +static t_Error CheckParams(t_Handle h_FmPcd, t_FmPcdCcNodeParams *p_CcNodeParam,
  16790. + t_FmPcdCcNode *p_CcNode, bool *isKeyTblAlloc)
  16791. +{
  16792. + int tmp = 0;
  16793. + t_FmPcdCcKeyParams *p_KeyParams;
  16794. + t_Error err;
  16795. + uint32_t requiredAction = 0;
  16796. +
  16797. + /* Validate statistics parameters */
  16798. + err = ValidateAndCalcStatsParams(p_CcNode, p_CcNodeParam,
  16799. + &(p_CcNode->numOfStatsFLRs),
  16800. + &(p_CcNode->countersArraySize));
  16801. + if (err)
  16802. + RETURN_ERROR(MAJOR, err, ("Invalid statistics parameters"));
  16803. +
  16804. + /* Validate next engine parameters on Miss */
  16805. + err = ValidateNextEngineParams(
  16806. + h_FmPcd, &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  16807. + p_CcNode->statisticsMode);
  16808. + if (err)
  16809. + RETURN_ERROR(MAJOR, err,
  16810. + ("For this node MissNextEngineParams are not valid"));
  16811. +
  16812. + if (p_CcNodeParam->keysParams.ccNextEngineParamsForMiss.h_Manip)
  16813. + {
  16814. + err = FmPcdManipCheckParamsForCcNextEngine(
  16815. + &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  16816. + &requiredAction);
  16817. + if (err)
  16818. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16819. + }
  16820. +
  16821. + memcpy(&p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams,
  16822. + &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  16823. + sizeof(t_FmPcdCcNextEngineParams));
  16824. +
  16825. + p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].requiredAction =
  16826. + requiredAction;
  16827. +
  16828. + if ((p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
  16829. + == e_FM_PCD_CC)
  16830. + && p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.h_Manip)
  16831. + {
  16832. + err =
  16833. + AllocAndFillAdForContLookupManip(
  16834. + p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.params.ccParams.h_CcNode);
  16835. + if (err)
  16836. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16837. + }
  16838. +
  16839. + for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
  16840. + {
  16841. + p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
  16842. +
  16843. + if (!p_KeyParams->p_Key)
  16844. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_Key is not initialized"));
  16845. +
  16846. + err = ValidateNextEngineParams(h_FmPcd,
  16847. + &p_KeyParams->ccNextEngineParams,
  16848. + p_CcNode->statisticsMode);
  16849. + if (err)
  16850. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16851. +
  16852. + err = UpdateGblMask(p_CcNode, p_CcNodeParam->keysParams.keySize,
  16853. + p_KeyParams->p_Mask);
  16854. + if (err)
  16855. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16856. +
  16857. + if (p_KeyParams->ccNextEngineParams.h_Manip)
  16858. + {
  16859. + err = FmPcdManipCheckParamsForCcNextEngine(
  16860. + &p_KeyParams->ccNextEngineParams, &requiredAction);
  16861. + if (err)
  16862. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16863. + }
  16864. +
  16865. + /* Store 'key' parameters - key, mask (if passed by the user) */
  16866. + memcpy(p_CcNode->keyAndNextEngineParams[tmp].key, p_KeyParams->p_Key,
  16867. + p_CcNodeParam->keysParams.keySize);
  16868. +
  16869. + if (p_KeyParams->p_Mask)
  16870. + memcpy(p_CcNode->keyAndNextEngineParams[tmp].mask,
  16871. + p_KeyParams->p_Mask, p_CcNodeParam->keysParams.keySize);
  16872. + else
  16873. + memset((void *)(p_CcNode->keyAndNextEngineParams[tmp].mask), 0xFF,
  16874. + p_CcNodeParam->keysParams.keySize);
  16875. +
  16876. + /* Store next engine parameters */
  16877. + memcpy(&p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams,
  16878. + &p_KeyParams->ccNextEngineParams,
  16879. + sizeof(t_FmPcdCcNextEngineParams));
  16880. +
  16881. + p_CcNode->keyAndNextEngineParams[tmp].requiredAction = requiredAction;
  16882. +
  16883. + if ((p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
  16884. + == e_FM_PCD_CC)
  16885. + && p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
  16886. + {
  16887. + err =
  16888. + AllocAndFillAdForContLookupManip(
  16889. + p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode);
  16890. + if (err)
  16891. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16892. + }
  16893. + }
  16894. +
  16895. + if (p_CcNode->maxNumOfKeys)
  16896. + {
  16897. + if (p_CcNode->maxNumOfKeys < p_CcNode->numOfKeys)
  16898. + RETURN_ERROR(
  16899. + MAJOR,
  16900. + E_INVALID_VALUE,
  16901. + ("Number of keys exceed the provided maximal number of keys"));
  16902. + }
  16903. +
  16904. + *isKeyTblAlloc = TRUE;
  16905. +
  16906. + return E_OK;
  16907. +}
  16908. +
  16909. +static t_Error Ipv4TtlOrIpv6HopLimitCheckParams(
  16910. + t_Handle h_FmPcd, t_FmPcdCcNodeParams *p_CcNodeParam,
  16911. + t_FmPcdCcNode *p_CcNode, bool *isKeyTblAlloc)
  16912. +{
  16913. + int tmp = 0;
  16914. + t_FmPcdCcKeyParams *p_KeyParams;
  16915. + t_Error err;
  16916. + uint8_t key = 0x01;
  16917. + uint32_t requiredAction = 0;
  16918. +
  16919. + if (p_CcNode->numOfKeys != 1)
  16920. + RETURN_ERROR(
  16921. + MAJOR,
  16922. + E_INVALID_VALUE,
  16923. + ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT the maximal supported 'numOfKeys' is 1"));
  16924. +
  16925. + if ((p_CcNodeParam->keysParams.maxNumOfKeys)
  16926. + && (p_CcNodeParam->keysParams.maxNumOfKeys != 1))
  16927. + RETURN_ERROR(
  16928. + MAJOR,
  16929. + E_INVALID_VALUE,
  16930. + ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT the maximal supported 'maxNumOfKeys' is 1"));
  16931. +
  16932. + /* Validate statistics parameters */
  16933. + err = ValidateAndCalcStatsParams(p_CcNode, p_CcNodeParam,
  16934. + &(p_CcNode->numOfStatsFLRs),
  16935. + &(p_CcNode->countersArraySize));
  16936. + if (err)
  16937. + RETURN_ERROR(MAJOR, err, ("Invalid statistics parameters"));
  16938. +
  16939. + err = ValidateNextEngineParams(
  16940. + h_FmPcd, &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  16941. + p_CcNodeParam->keysParams.statisticsMode);
  16942. + if (err)
  16943. + RETURN_ERROR(MAJOR, err,
  16944. + ("For this node MissNextEngineParams are not valid"));
  16945. +
  16946. + if (p_CcNodeParam->keysParams.ccNextEngineParamsForMiss.h_Manip)
  16947. + {
  16948. + err = FmPcdManipCheckParamsForCcNextEngine(
  16949. + &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  16950. + &requiredAction);
  16951. + if (err)
  16952. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16953. + }
  16954. +
  16955. + memcpy(&p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams,
  16956. + &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  16957. + sizeof(t_FmPcdCcNextEngineParams));
  16958. +
  16959. + p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].requiredAction =
  16960. + requiredAction;
  16961. +
  16962. + if ((p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.nextEngine
  16963. + == e_FM_PCD_CC)
  16964. + && p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.h_Manip)
  16965. + {
  16966. + err =
  16967. + AllocAndFillAdForContLookupManip(
  16968. + p_CcNode->keyAndNextEngineParams[p_CcNode->numOfKeys].nextEngineParams.params.ccParams.h_CcNode);
  16969. + if (err)
  16970. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16971. + }
  16972. +
  16973. + for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
  16974. + {
  16975. + p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
  16976. +
  16977. + if (p_KeyParams->p_Mask)
  16978. + RETURN_ERROR(
  16979. + MAJOR,
  16980. + E_INVALID_VALUE,
  16981. + ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT p_Mask can not be initialized"));
  16982. +
  16983. + if (memcmp(p_KeyParams->p_Key, &key, 1) != 0)
  16984. + RETURN_ERROR(
  16985. + MAJOR,
  16986. + E_INVALID_VALUE,
  16987. + ("For node of the type IPV4_TTL or IPV6_HOP_LIMIT p_Key has to be 1"));
  16988. +
  16989. + err = ValidateNextEngineParams(h_FmPcd,
  16990. + &p_KeyParams->ccNextEngineParams,
  16991. + p_CcNode->statisticsMode);
  16992. + if (err)
  16993. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  16994. +
  16995. + if (p_KeyParams->ccNextEngineParams.h_Manip)
  16996. + {
  16997. + err = FmPcdManipCheckParamsForCcNextEngine(
  16998. + &p_KeyParams->ccNextEngineParams, &requiredAction);
  16999. + if (err)
  17000. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  17001. + }
  17002. +
  17003. + /* Store 'key' parameters - key (fixed to 0x01), key size of 1 byte and full mask */
  17004. + p_CcNode->keyAndNextEngineParams[tmp].key[0] = key;
  17005. + p_CcNode->keyAndNextEngineParams[tmp].mask[0] = 0xFF;
  17006. +
  17007. + /* Store NextEngine parameters */
  17008. + memcpy(&p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams,
  17009. + &p_KeyParams->ccNextEngineParams,
  17010. + sizeof(t_FmPcdCcNextEngineParams));
  17011. +
  17012. + if ((p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
  17013. + == e_FM_PCD_CC)
  17014. + && p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
  17015. + {
  17016. + err =
  17017. + AllocAndFillAdForContLookupManip(
  17018. + p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode);
  17019. + if (err)
  17020. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  17021. + }
  17022. + p_CcNode->keyAndNextEngineParams[tmp].requiredAction = requiredAction;
  17023. + }
  17024. +
  17025. + *isKeyTblAlloc = FALSE;
  17026. +
  17027. + return E_OK;
  17028. +}
  17029. +
  17030. +static t_Error IcHashIndexedCheckParams(t_Handle h_FmPcd,
  17031. + t_FmPcdCcNodeParams *p_CcNodeParam,
  17032. + t_FmPcdCcNode *p_CcNode,
  17033. + bool *isKeyTblAlloc)
  17034. +{
  17035. + int tmp = 0, countOnes = 0;
  17036. + t_FmPcdCcKeyParams *p_KeyParams;
  17037. + t_Error err;
  17038. + uint16_t glblMask = p_CcNodeParam->extractCcParams.extractNonHdr.icIndxMask;
  17039. + uint16_t countMask = (uint16_t)(glblMask >> 4);
  17040. + uint32_t requiredAction = 0;
  17041. +
  17042. + if (glblMask & 0x000f)
  17043. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  17044. + ("icIndxMask has to be with last nibble 0"));
  17045. +
  17046. + while (countMask)
  17047. + {
  17048. + countOnes++;
  17049. + countMask = (uint16_t)(countMask >> 1);
  17050. + }
  17051. +
  17052. + if (!POWER_OF_2(p_CcNode->numOfKeys))
  17053. + RETURN_ERROR(
  17054. + MAJOR,
  17055. + E_INVALID_VALUE,
  17056. + ("For Node of the type INDEXED numOfKeys has to be powerOfTwo"));
  17057. +
  17058. + if (p_CcNode->numOfKeys != ((uint32_t)1 << countOnes))
  17059. + RETURN_ERROR(
  17060. + MAJOR,
  17061. + E_INVALID_VALUE,
  17062. + ("For Node of the type IC_HASH_INDEXED numOfKeys has to be powerOfTwo"));
  17063. +
  17064. + if (p_CcNodeParam->keysParams.maxNumOfKeys
  17065. + && (p_CcNodeParam->keysParams.maxNumOfKeys != p_CcNode->numOfKeys))
  17066. + RETURN_ERROR(
  17067. + MAJOR,
  17068. + E_INVALID_VALUE,
  17069. + ("For Node of the type INDEXED 'maxNumOfKeys' should be 0 or equal 'numOfKeys'"));
  17070. +
  17071. + /* Validate statistics parameters */
  17072. + err = ValidateAndCalcStatsParams(p_CcNode, p_CcNodeParam,
  17073. + &(p_CcNode->numOfStatsFLRs),
  17074. + &(p_CcNode->countersArraySize));
  17075. + if (err)
  17076. + RETURN_ERROR(MAJOR, err, ("Invalid statistics parameters"));
  17077. +
  17078. + err = ValidateNextEngineParams(
  17079. + h_FmPcd, &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  17080. + p_CcNode->statisticsMode);
  17081. + if (GET_ERROR_TYPE(err) != E_NOT_SUPPORTED)
  17082. + RETURN_ERROR(
  17083. + MAJOR,
  17084. + err,
  17085. + ("MissNextEngineParams for the node of the type IC_INDEX_HASH has to be UnInitialized"));
  17086. +
  17087. + for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
  17088. + {
  17089. + p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
  17090. +
  17091. + if (p_KeyParams->p_Mask || p_KeyParams->p_Key)
  17092. + RETURN_ERROR(
  17093. + MAJOR,
  17094. + E_INVALID_VALUE,
  17095. + ("For Node of the type IC_HASH_INDEXED p_Key or p_Mask has to be NULL"));
  17096. +
  17097. + if ((glblMask & (tmp * 16)) == (tmp * 16))
  17098. + {
  17099. + err = ValidateNextEngineParams(h_FmPcd,
  17100. + &p_KeyParams->ccNextEngineParams,
  17101. + p_CcNode->statisticsMode);
  17102. + if (err)
  17103. + RETURN_ERROR(
  17104. + MAJOR,
  17105. + err,
  17106. + ("This index has to be initialized for the node of the type IC_INDEX_HASH according to settings of GlobalMask "));
  17107. +
  17108. + if (p_KeyParams->ccNextEngineParams.h_Manip)
  17109. + {
  17110. + err = FmPcdManipCheckParamsForCcNextEngine(
  17111. + &p_KeyParams->ccNextEngineParams, &requiredAction);
  17112. + if (err)
  17113. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  17114. + p_CcNode->keyAndNextEngineParams[tmp].requiredAction =
  17115. + requiredAction;
  17116. + }
  17117. +
  17118. + memcpy(&p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams,
  17119. + &p_KeyParams->ccNextEngineParams,
  17120. + sizeof(t_FmPcdCcNextEngineParams));
  17121. +
  17122. + if ((p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
  17123. + == e_FM_PCD_CC)
  17124. + && p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
  17125. + {
  17126. + err =
  17127. + AllocAndFillAdForContLookupManip(
  17128. + p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode);
  17129. + if (err)
  17130. + RETURN_ERROR(MAJOR, err, (NO_MSG));
  17131. + }
  17132. + }
  17133. + else
  17134. + {
  17135. + err = ValidateNextEngineParams(h_FmPcd,
  17136. + &p_KeyParams->ccNextEngineParams,
  17137. + p_CcNode->statisticsMode);
  17138. + if (GET_ERROR_TYPE(err) != E_NOT_SUPPORTED)
  17139. + RETURN_ERROR(
  17140. + MAJOR,
  17141. + err,
  17142. + ("This index has to be UnInitialized for the node of the type IC_INDEX_HASH according to settings of GlobalMask"));
  17143. + }
  17144. + }
  17145. +
  17146. + *isKeyTblAlloc = FALSE;
  17147. + cpu_to_be16s(&glblMask);
  17148. + memcpy(PTR_MOVE(p_CcNode->p_GlblMask, 2), &glblMask, 2);
  17149. +
  17150. + return E_OK;
  17151. +}
  17152. +
  17153. +static t_Error ModifyNextEngineParamNode(
  17154. + t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex,
  17155. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  17156. +{
  17157. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
  17158. + t_FmPcd *p_FmPcd;
  17159. + t_List h_OldPointersLst, h_NewPointersLst;
  17160. + t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
  17161. + t_Error err = E_OK;
  17162. +
  17163. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_VALUE);
  17164. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  17165. +
  17166. + if (keyIndex >= p_CcNode->numOfKeys)
  17167. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  17168. + ("keyIndex > previously cleared last index + 1"));
  17169. +
  17170. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  17171. +
  17172. + INIT_LIST(&h_OldPointersLst);
  17173. + INIT_LIST(&h_NewPointersLst);
  17174. +
  17175. + p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
  17176. + e_MODIFY_STATE_CHANGE, FALSE,
  17177. + FALSE, FALSE);
  17178. + if (!p_ModifyKeyParams)
  17179. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  17180. +
  17181. + if (p_CcNode->maxNumOfKeys
  17182. + && !TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  17183. + {
  17184. + XX_Free(p_ModifyKeyParams);
  17185. + return ERROR_CODE(E_BUSY);
  17186. + }
  17187. +
  17188. + err = BuildNewNodeModifyNextEngine(h_FmPcd, p_CcNode, keyIndex,
  17189. + p_FmPcdCcNextEngineParams,
  17190. + &h_OldPointersLst, &h_NewPointersLst,
  17191. + p_ModifyKeyParams);
  17192. + if (err)
  17193. + {
  17194. + XX_Free(p_ModifyKeyParams);
  17195. + if (p_CcNode->maxNumOfKeys)
  17196. + RELEASE_LOCK(p_FmPcd->shadowLock);
  17197. + RETURN_ERROR(MAJOR, err, NO_MSG);
  17198. + }
  17199. +
  17200. + err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
  17201. + p_ModifyKeyParams, FALSE);
  17202. +
  17203. + if (p_CcNode->maxNumOfKeys)
  17204. + RELEASE_LOCK(p_FmPcd->shadowLock);
  17205. +
  17206. + return err;
  17207. +}
  17208. +
  17209. +static t_Error FindKeyIndex(t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key,
  17210. + uint8_t *p_Mask, uint16_t *p_KeyIndex)
  17211. +{
  17212. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  17213. + uint8_t tmpMask[FM_PCD_MAX_SIZE_OF_KEY];
  17214. + uint16_t i;
  17215. +
  17216. + ASSERT_COND(p_Key);
  17217. + ASSERT_COND(p_KeyIndex);
  17218. + ASSERT_COND(keySize < FM_PCD_MAX_SIZE_OF_KEY);
  17219. +
  17220. + if (keySize != p_CcNode->userSizeOfExtraction)
  17221. + RETURN_ERROR(
  17222. + MINOR, E_INVALID_VALUE,
  17223. + ("Key size doesn't match the extraction size of the node"));
  17224. +
  17225. + /* If user didn't pass a mask for this key, we'll look for full extraction mask */
  17226. + if (!p_Mask)
  17227. + memset(tmpMask, 0xFF, keySize);
  17228. +
  17229. + for (i = 0; i < p_CcNode->numOfKeys; i++)
  17230. + {
  17231. + /* Comparing received key */
  17232. + if (memcmp(p_Key, p_CcNode->keyAndNextEngineParams[i].key, keySize)
  17233. + == 0)
  17234. + {
  17235. + if (p_Mask)
  17236. + {
  17237. + /* If a user passed a mask for this key, it must match to the existing key's mask for a correct match */
  17238. + if (memcmp(p_Mask, p_CcNode->keyAndNextEngineParams[i].mask,
  17239. + keySize) == 0)
  17240. + {
  17241. + *p_KeyIndex = i;
  17242. + return E_OK;
  17243. + }
  17244. + }
  17245. + else
  17246. + {
  17247. + /* If user didn't pass a mask for this key, check if the existing key mask is full extraction */
  17248. + if (memcmp(tmpMask, p_CcNode->keyAndNextEngineParams[i].mask,
  17249. + keySize) == 0)
  17250. + {
  17251. + *p_KeyIndex = i;
  17252. + return E_OK;
  17253. + }
  17254. + }
  17255. + }
  17256. + }
  17257. +
  17258. + return ERROR_CODE(E_NOT_FOUND);
  17259. +}
  17260. +
  17261. +static t_Error CalcAndUpdateCcShadow(t_FmPcdCcNode *p_CcNode,
  17262. + bool isKeyTblAlloc,
  17263. + uint32_t *p_MatchTableSize,
  17264. + uint32_t *p_AdTableSize)
  17265. +{
  17266. + uint32_t shadowSize;
  17267. + t_Error err;
  17268. +
  17269. + /* Calculate keys table maximal size - each entry consists of a key and a mask,
  17270. + (if local mask support is requested) */
  17271. + *p_MatchTableSize = p_CcNode->ccKeySizeAccExtraction * sizeof(uint8_t)
  17272. + * p_CcNode->maxNumOfKeys;
  17273. +
  17274. + if (p_CcNode->maskSupport)
  17275. + *p_MatchTableSize *= 2;
  17276. +
  17277. + /* Calculate next action descriptors table, including one more entry for miss */
  17278. + *p_AdTableSize = (uint32_t)((p_CcNode->maxNumOfKeys + 1)
  17279. + * FM_PCD_CC_AD_ENTRY_SIZE);
  17280. +
  17281. + /* Calculate maximal shadow size of this node.
  17282. + All shadow structures will be used for runtime modifications host command. If
  17283. + keys table was allocated for this node, the keys table and next engines table may
  17284. + be modified in run time (entries added or removed), so shadow tables are requires.
  17285. + Otherwise, the only supported runtime modification is a specific next engine update
  17286. + and this requires shadow memory of a single AD */
  17287. +
  17288. + /* Shadow size should be enough to hold the following 3 structures:
  17289. + * 1 - an action descriptor */
  17290. + shadowSize = FM_PCD_CC_AD_ENTRY_SIZE;
  17291. +
  17292. + /* 2 - keys match table, if was allocated for the current node */
  17293. + if (isKeyTblAlloc)
  17294. + shadowSize += *p_MatchTableSize;
  17295. +
  17296. + /* 3 - next action descriptors table */
  17297. + shadowSize += *p_AdTableSize;
  17298. +
  17299. + /* Update shadow to the calculated size */
  17300. + err = FmPcdUpdateCcShadow(p_CcNode->h_FmPcd, (uint32_t)shadowSize,
  17301. + FM_PCD_CC_AD_TABLE_ALIGN);
  17302. + if (err != E_OK)
  17303. + {
  17304. + DeleteNode(p_CcNode);
  17305. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC node shadow"));
  17306. + }
  17307. +
  17308. + return E_OK;
  17309. +}
  17310. +
  17311. +static t_Error AllocStatsObjs(t_FmPcdCcNode *p_CcNode)
  17312. +{
  17313. + t_FmPcdStatsObj *p_StatsObj;
  17314. + t_Handle h_FmMuram, h_StatsAd, h_StatsCounters;
  17315. + uint32_t i;
  17316. +
  17317. + h_FmMuram = FmPcdGetMuramHandle(p_CcNode->h_FmPcd);
  17318. + if (!h_FmMuram)
  17319. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM MURAM"));
  17320. +
  17321. + /* Allocate statistics ADs and statistics counter. An extra pair (AD + counters)
  17322. + will be allocated to support runtime modifications */
  17323. + for (i = 0; i < p_CcNode->maxNumOfKeys + 2; i++)
  17324. + {
  17325. + /* Allocate list object structure */
  17326. + p_StatsObj = XX_Malloc(sizeof(t_FmPcdStatsObj));
  17327. + if (!p_StatsObj)
  17328. + {
  17329. + FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
  17330. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Statistics object"));
  17331. + }
  17332. + memset(p_StatsObj, 0, sizeof(t_FmPcdStatsObj));
  17333. +
  17334. + /* Allocate statistics AD from MURAM */
  17335. + h_StatsAd = (t_Handle)FM_MURAM_AllocMem(h_FmMuram,
  17336. + FM_PCD_CC_AD_ENTRY_SIZE,
  17337. + FM_PCD_CC_AD_TABLE_ALIGN);
  17338. + if (!h_StatsAd)
  17339. + {
  17340. + FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
  17341. + XX_Free(p_StatsObj);
  17342. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  17343. + ("MURAM allocation for statistics ADs"));
  17344. + }
  17345. + MemSet8(h_StatsAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  17346. +
  17347. + /* Allocate statistics counters from MURAM */
  17348. + h_StatsCounters = (t_Handle)FM_MURAM_AllocMem(
  17349. + h_FmMuram, p_CcNode->countersArraySize,
  17350. + FM_PCD_CC_AD_TABLE_ALIGN);
  17351. + if (!h_StatsCounters)
  17352. + {
  17353. + FreeStatObjects(&p_CcNode->availableStatsLst, h_FmMuram);
  17354. + FM_MURAM_FreeMem(h_FmMuram, h_StatsAd);
  17355. + XX_Free(p_StatsObj);
  17356. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  17357. + ("MURAM allocation for statistics counters"));
  17358. + }
  17359. + MemSet8(h_StatsCounters, 0, p_CcNode->countersArraySize);
  17360. +
  17361. + p_StatsObj->h_StatsAd = h_StatsAd;
  17362. + p_StatsObj->h_StatsCounters = h_StatsCounters;
  17363. +
  17364. + EnqueueStatsObj(&p_CcNode->availableStatsLst, p_StatsObj);
  17365. + }
  17366. +
  17367. + return E_OK;
  17368. +}
  17369. +
  17370. +static t_Error MatchTableGetKeyStatistics(
  17371. + t_FmPcdCcNode *p_CcNode, uint16_t keyIndex,
  17372. + t_FmPcdCcKeyStatistics *p_KeyStatistics)
  17373. +{
  17374. + uint32_t *p_StatsCounters, i;
  17375. +
  17376. + if (p_CcNode->statisticsMode == e_FM_PCD_CC_STATS_MODE_NONE)
  17377. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  17378. + ("Statistics were not enabled for this match table"));
  17379. +
  17380. + if (!p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
  17381. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  17382. + ("Statistics were not enabled for this key"));
  17383. +
  17384. + memset(p_KeyStatistics, 0, sizeof(t_FmPcdCcKeyStatistics));
  17385. +
  17386. + p_StatsCounters =
  17387. + p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsCounters;
  17388. + ASSERT_COND(p_StatsCounters);
  17389. +
  17390. + p_KeyStatistics->byteCount = GET_UINT32(*p_StatsCounters);
  17391. +
  17392. + for (i = 1; i <= p_CcNode->numOfStatsFLRs; i++)
  17393. + {
  17394. + p_StatsCounters =
  17395. + PTR_MOVE(p_StatsCounters, FM_PCD_CC_STATS_COUNTER_SIZE);
  17396. +
  17397. + p_KeyStatistics->frameCount += GET_UINT32(*p_StatsCounters);
  17398. +
  17399. +#if (DPAA_VERSION >= 11)
  17400. + p_KeyStatistics->frameLengthRangeCount[i - 1] =
  17401. + GET_UINT32(*p_StatsCounters);
  17402. +#endif /* (DPAA_VERSION >= 11) */
  17403. + }
  17404. +
  17405. + return E_OK;
  17406. +}
  17407. +
  17408. +static t_Error MatchTableSet(t_Handle h_FmPcd, t_FmPcdCcNode *p_CcNode,
  17409. + t_FmPcdCcNodeParams *p_CcNodeParam)
  17410. +{
  17411. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  17412. + t_FmPcdCcNode *p_FmPcdCcNextNode;
  17413. + t_Error err = E_OK;
  17414. + uint32_t tmp, keySize;
  17415. + bool glblMask = FALSE;
  17416. + t_FmPcdCcKeyParams *p_KeyParams;
  17417. + t_Handle h_FmMuram, p_KeysMatchTblTmp, p_AdTableTmp;
  17418. +#if (DPAA_VERSION >= 11)
  17419. + t_Handle h_StatsFLRs;
  17420. +#endif /* (DPAA_VERSION >= 11) */
  17421. + bool fullField = FALSE;
  17422. + ccPrivateInfo_t icCode = CC_PRIVATE_INFO_NONE;
  17423. + bool isKeyTblAlloc, fromIc = FALSE;
  17424. + uint32_t matchTableSize, adTableSize;
  17425. + t_CcNodeInformation ccNodeInfo, *p_CcInformation;
  17426. + t_FmPcdStatsObj *p_StatsObj;
  17427. + t_FmPcdCcStatsParams statsParams = { 0 };
  17428. + t_Handle h_Manip;
  17429. +
  17430. + ASSERT_COND(h_FmPcd);
  17431. + ASSERT_COND(p_CcNode);
  17432. + ASSERT_COND(p_CcNodeParam);
  17433. +
  17434. + p_CcNode->p_GlblMask = (t_Handle)XX_Malloc(
  17435. + CC_GLBL_MASK_SIZE * sizeof(uint8_t));
  17436. + memset(p_CcNode->p_GlblMask, 0, CC_GLBL_MASK_SIZE * sizeof(uint8_t));
  17437. +
  17438. + p_CcNode->h_FmPcd = h_FmPcd;
  17439. + p_CcNode->numOfKeys = p_CcNodeParam->keysParams.numOfKeys;
  17440. + p_CcNode->maxNumOfKeys = p_CcNodeParam->keysParams.maxNumOfKeys;
  17441. + p_CcNode->maskSupport = p_CcNodeParam->keysParams.maskSupport;
  17442. + p_CcNode->statisticsMode = p_CcNodeParam->keysParams.statisticsMode;
  17443. +
  17444. + /* For backward compatibility - even if statistics mode is nullified,
  17445. + we'll fix it to frame mode so we can support per-key request for
  17446. + statistics using 'statisticsEn' in next engine parameters */
  17447. + if (!p_CcNode->maxNumOfKeys
  17448. + && (p_CcNode->statisticsMode == e_FM_PCD_CC_STATS_MODE_NONE))
  17449. + p_CcNode->statisticsMode = e_FM_PCD_CC_STATS_MODE_FRAME;
  17450. +
  17451. + h_FmMuram = FmPcdGetMuramHandle(h_FmPcd);
  17452. + if (!h_FmMuram)
  17453. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM MURAM"));
  17454. +
  17455. + INIT_LIST(&p_CcNode->ccPrevNodesLst);
  17456. + INIT_LIST(&p_CcNode->ccTreeIdLst);
  17457. + INIT_LIST(&p_CcNode->ccTreesLst);
  17458. + INIT_LIST(&p_CcNode->availableStatsLst);
  17459. +
  17460. + p_CcNode->h_Spinlock = XX_InitSpinlock();
  17461. + if (!p_CcNode->h_Spinlock)
  17462. + {
  17463. + DeleteNode(p_CcNode);
  17464. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("CC node spinlock"));
  17465. + }
  17466. +
  17467. + if ((p_CcNodeParam->extractCcParams.type == e_FM_PCD_EXTRACT_BY_HDR)
  17468. + && ((p_CcNodeParam->extractCcParams.extractByHdr.hdr
  17469. + == HEADER_TYPE_IPv4)
  17470. + || (p_CcNodeParam->extractCcParams.extractByHdr.hdr
  17471. + == HEADER_TYPE_IPv6))
  17472. + && (p_CcNodeParam->extractCcParams.extractByHdr.type
  17473. + == e_FM_PCD_EXTRACT_FULL_FIELD)
  17474. + && ((p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField.ipv6
  17475. + == NET_HEADER_FIELD_IPv6_HOP_LIMIT)
  17476. + || (p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField.ipv4
  17477. + == NET_HEADER_FIELD_IPv4_TTL)))
  17478. + {
  17479. + err = Ipv4TtlOrIpv6HopLimitCheckParams(h_FmPcd, p_CcNodeParam, p_CcNode,
  17480. + &isKeyTblAlloc);
  17481. + glblMask = FALSE;
  17482. + }
  17483. + else
  17484. + if ((p_CcNodeParam->extractCcParams.type == e_FM_PCD_EXTRACT_NON_HDR)
  17485. + && ((p_CcNodeParam->extractCcParams.extractNonHdr.src
  17486. + == e_FM_PCD_EXTRACT_FROM_KEY)
  17487. + || (p_CcNodeParam->extractCcParams.extractNonHdr.src
  17488. + == e_FM_PCD_EXTRACT_FROM_HASH)
  17489. + || (p_CcNodeParam->extractCcParams.extractNonHdr.src
  17490. + == e_FM_PCD_EXTRACT_FROM_FLOW_ID)))
  17491. + {
  17492. + if ((p_CcNodeParam->extractCcParams.extractNonHdr.src
  17493. + == e_FM_PCD_EXTRACT_FROM_FLOW_ID)
  17494. + && (p_CcNodeParam->extractCcParams.extractNonHdr.offset != 0))
  17495. + {
  17496. + DeleteNode(p_CcNode);
  17497. + RETURN_ERROR(
  17498. + MAJOR,
  17499. + E_INVALID_VALUE,
  17500. + ("In the case of the extraction from e_FM_PCD_EXTRACT_FROM_FLOW_ID offset has to be 0"));
  17501. + }
  17502. +
  17503. + icCode = IcDefineCode(p_CcNodeParam);
  17504. + fromIc = TRUE;
  17505. + if (icCode == CC_PRIVATE_INFO_NONE)
  17506. + {
  17507. + DeleteNode(p_CcNode);
  17508. + RETURN_ERROR(
  17509. + MAJOR,
  17510. + E_INVALID_STATE,
  17511. + ("user asked extraction from IC and field in internal context or action wasn't initialized in the right way"));
  17512. + }
  17513. +
  17514. + if ((icCode == CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP)
  17515. + || (icCode == CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP))
  17516. + {
  17517. + err = IcHashIndexedCheckParams(h_FmPcd, p_CcNodeParam, p_CcNode,
  17518. + &isKeyTblAlloc);
  17519. + glblMask = TRUE;
  17520. + }
  17521. + else
  17522. + {
  17523. + err = CheckParams(h_FmPcd, p_CcNodeParam, p_CcNode,
  17524. + &isKeyTblAlloc);
  17525. + if (p_CcNode->glblMaskSize)
  17526. + glblMask = TRUE;
  17527. + }
  17528. + }
  17529. + else
  17530. + {
  17531. + err = CheckParams(h_FmPcd, p_CcNodeParam, p_CcNode, &isKeyTblAlloc);
  17532. + if (p_CcNode->glblMaskSize)
  17533. + glblMask = TRUE;
  17534. + }
  17535. +
  17536. + if (err)
  17537. + {
  17538. + DeleteNode(p_CcNode);
  17539. + RETURN_ERROR(MAJOR, err, NO_MSG);
  17540. + }
  17541. +
  17542. + switch (p_CcNodeParam->extractCcParams.type)
  17543. + {
  17544. + case (e_FM_PCD_EXTRACT_BY_HDR):
  17545. + switch (p_CcNodeParam->extractCcParams.extractByHdr.type)
  17546. + {
  17547. + case (e_FM_PCD_EXTRACT_FULL_FIELD):
  17548. + p_CcNode->parseCode =
  17549. + GetFullFieldParseCode(
  17550. + p_CcNodeParam->extractCcParams.extractByHdr.hdr,
  17551. + p_CcNodeParam->extractCcParams.extractByHdr.hdrIndex,
  17552. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField);
  17553. + GetSizeHeaderField(
  17554. + p_CcNodeParam->extractCcParams.extractByHdr.hdr,
  17555. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fullField,
  17556. + &p_CcNode->sizeOfExtraction);
  17557. + fullField = TRUE;
  17558. + if ((p_CcNode->parseCode != CC_PC_FF_TCI1)
  17559. + && (p_CcNode->parseCode != CC_PC_FF_TCI2)
  17560. + && (p_CcNode->parseCode != CC_PC_FF_MPLS1)
  17561. + && (p_CcNode->parseCode != CC_PC_FF_MPLS_LAST)
  17562. + && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC1)
  17563. + && (p_CcNode->parseCode != CC_PC_FF_IPV4IPTOS_TC2)
  17564. + && (p_CcNode->parseCode
  17565. + != CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1)
  17566. + && (p_CcNode->parseCode != CC_PC_FF_IPDSCP)
  17567. + && (p_CcNode->parseCode
  17568. + != CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2)
  17569. + && glblMask)
  17570. + {
  17571. + glblMask = FALSE;
  17572. + p_CcNode->glblMaskSize = 4;
  17573. + p_CcNode->lclMask = TRUE;
  17574. + }
  17575. + break;
  17576. +
  17577. + case (e_FM_PCD_EXTRACT_FROM_HDR):
  17578. + p_CcNode->sizeOfExtraction =
  17579. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromHdr.size;
  17580. + p_CcNode->offset =
  17581. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromHdr.offset;
  17582. + p_CcNode->userOffset =
  17583. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromHdr.offset;
  17584. + p_CcNode->parseCode =
  17585. + GetPrParseCode(
  17586. + p_CcNodeParam->extractCcParams.extractByHdr.hdr,
  17587. + p_CcNodeParam->extractCcParams.extractByHdr.hdrIndex,
  17588. + p_CcNode->offset, glblMask,
  17589. + &p_CcNode->prsArrayOffset);
  17590. + break;
  17591. +
  17592. + case (e_FM_PCD_EXTRACT_FROM_FIELD):
  17593. + p_CcNode->offset =
  17594. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.offset;
  17595. + p_CcNode->userOffset =
  17596. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.offset;
  17597. + p_CcNode->sizeOfExtraction =
  17598. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.size;
  17599. + p_CcNode->parseCode =
  17600. + GetFieldParseCode(
  17601. + p_CcNodeParam->extractCcParams.extractByHdr.hdr,
  17602. + p_CcNodeParam->extractCcParams.extractByHdr.extractByHdrType.fromField.field,
  17603. + p_CcNode->offset,
  17604. + &p_CcNode->prsArrayOffset,
  17605. + p_CcNodeParam->extractCcParams.extractByHdr.hdrIndex);
  17606. + break;
  17607. +
  17608. + default:
  17609. + DeleteNode(p_CcNode);
  17610. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  17611. + }
  17612. + break;
  17613. +
  17614. + case (e_FM_PCD_EXTRACT_NON_HDR):
  17615. + /* get the field code for the generic extract */
  17616. + p_CcNode->sizeOfExtraction =
  17617. + p_CcNodeParam->extractCcParams.extractNonHdr.size;
  17618. + p_CcNode->offset =
  17619. + p_CcNodeParam->extractCcParams.extractNonHdr.offset;
  17620. + p_CcNode->userOffset =
  17621. + p_CcNodeParam->extractCcParams.extractNonHdr.offset;
  17622. + p_CcNode->parseCode = GetGenParseCode(
  17623. + p_CcNodeParam->extractCcParams.extractNonHdr.src,
  17624. + p_CcNode->offset, glblMask, &p_CcNode->prsArrayOffset,
  17625. + fromIc, icCode);
  17626. +
  17627. + if (p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED)
  17628. + {
  17629. + if ((p_CcNode->offset + p_CcNode->sizeOfExtraction) > 8)
  17630. + {
  17631. + DeleteNode(p_CcNode);
  17632. + RETURN_ERROR(
  17633. + MAJOR,
  17634. + E_INVALID_SELECTION,
  17635. + ("when node of the type CC_PC_GENERIC_IC_HASH_INDEXED offset + size can not be bigger then size of HASH 64 bits (8 bytes)"));
  17636. + }
  17637. + }
  17638. + if ((p_CcNode->parseCode == CC_PC_GENERIC_IC_GMASK)
  17639. + || (p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED))
  17640. + {
  17641. + p_CcNode->offset += p_CcNode->prsArrayOffset;
  17642. + p_CcNode->prsArrayOffset = 0;
  17643. + }
  17644. + break;
  17645. +
  17646. + default:
  17647. + DeleteNode(p_CcNode);
  17648. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  17649. + }
  17650. +
  17651. + if (p_CcNode->parseCode == CC_PC_ILLEGAL)
  17652. + {
  17653. + DeleteNode(p_CcNode);
  17654. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("illegal extraction type"));
  17655. + }
  17656. +
  17657. + if ((p_CcNode->sizeOfExtraction > FM_PCD_MAX_SIZE_OF_KEY)
  17658. + || !p_CcNode->sizeOfExtraction)
  17659. + {
  17660. + DeleteNode(p_CcNode);
  17661. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  17662. + ("sizeOfExatrction can not be greater than 56 and not 0"));
  17663. + }
  17664. +
  17665. + if (p_CcNodeParam->keysParams.keySize != p_CcNode->sizeOfExtraction)
  17666. + {
  17667. + DeleteNode(p_CcNode);
  17668. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  17669. + ("keySize has to be equal to sizeOfExtraction"));
  17670. + }
  17671. +
  17672. + p_CcNode->userSizeOfExtraction = p_CcNode->sizeOfExtraction;
  17673. +
  17674. + if (!glblMask)
  17675. + memset(p_CcNode->p_GlblMask, 0xff, CC_GLBL_MASK_SIZE * sizeof(uint8_t));
  17676. +
  17677. + err = CheckAndSetManipParamsWithCcNodeParams(p_CcNode);
  17678. + if (err != E_OK)
  17679. + {
  17680. + DeleteNode(p_CcNode);
  17681. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  17682. + ("keySize has to be equal to sizeOfExtraction"));
  17683. + }
  17684. +
  17685. + /* Calculating matching table entry size by rounding up the user-defined size of extraction to valid entry size */
  17686. + GetCcExtractKeySize(p_CcNode->sizeOfExtraction,
  17687. + &p_CcNode->ccKeySizeAccExtraction);
  17688. +
  17689. + /* If local mask is used, it is stored next to each key in the keys match table */
  17690. + if (p_CcNode->lclMask)
  17691. + keySize = (uint32_t)(2 * p_CcNode->ccKeySizeAccExtraction);
  17692. + else
  17693. + keySize = p_CcNode->ccKeySizeAccExtraction;
  17694. +
  17695. + /* Update CC shadow with maximal size required by this node */
  17696. + if (p_CcNode->maxNumOfKeys)
  17697. + {
  17698. + err = CalcAndUpdateCcShadow(p_CcNode, isKeyTblAlloc, &matchTableSize,
  17699. + &adTableSize);
  17700. + if (err != E_OK)
  17701. + {
  17702. + DeleteNode(p_CcNode);
  17703. + RETURN_ERROR(MAJOR, err, NO_MSG);
  17704. + }
  17705. +
  17706. + p_CcNode->keysMatchTableMaxSize = matchTableSize;
  17707. +
  17708. + if (p_CcNode->statisticsMode != e_FM_PCD_CC_STATS_MODE_NONE)
  17709. + {
  17710. + err = AllocStatsObjs(p_CcNode);
  17711. + if (err != E_OK)
  17712. + {
  17713. + DeleteNode(p_CcNode);
  17714. + RETURN_ERROR(MAJOR, err, NO_MSG);
  17715. + }
  17716. + }
  17717. +
  17718. + /* If manipulation will be initialized before this node, it will use the table
  17719. + descriptor in the AD table of previous node and this node will need an extra
  17720. + AD as his table descriptor. */
  17721. + p_CcNode->h_TmpAd = (t_Handle)FM_MURAM_AllocMem(
  17722. + h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE, FM_PCD_CC_AD_TABLE_ALIGN);
  17723. + if (!p_CcNode->h_TmpAd)
  17724. + {
  17725. + DeleteNode(p_CcNode);
  17726. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  17727. + ("MURAM allocation for CC action descriptor"));
  17728. + }
  17729. + }
  17730. + else
  17731. + {
  17732. + matchTableSize = (uint32_t)(keySize * sizeof(uint8_t)
  17733. + * (p_CcNode->numOfKeys + 1));
  17734. + adTableSize = (uint32_t)(FM_PCD_CC_AD_ENTRY_SIZE
  17735. + * (p_CcNode->numOfKeys + 1));
  17736. + }
  17737. +
  17738. +#if (DPAA_VERSION >= 11)
  17739. + switch (p_CcNode->statisticsMode)
  17740. + {
  17741. +
  17742. + case e_FM_PCD_CC_STATS_MODE_RMON:
  17743. + /* If RMON statistics or RMON conditional statistics modes are requested,
  17744. + allocate frame length ranges array */
  17745. + p_CcNode->h_StatsFLRs = FM_MURAM_AllocMem(
  17746. + h_FmMuram,
  17747. + (uint32_t)(p_CcNode->numOfStatsFLRs)
  17748. + * FM_PCD_CC_STATS_FLR_SIZE,
  17749. + FM_PCD_CC_AD_TABLE_ALIGN);
  17750. +
  17751. + if (!p_CcNode->h_StatsFLRs)
  17752. + {
  17753. + DeleteNode(p_CcNode);
  17754. + RETURN_ERROR(
  17755. + MAJOR, E_NO_MEMORY,
  17756. + ("MURAM allocation for CC frame length ranges array"));
  17757. + }
  17758. +
  17759. + /* Initialize using value received from the user */
  17760. + for (tmp = 0; tmp < p_CcNode->numOfStatsFLRs; tmp++)
  17761. + {
  17762. + uint16_t flr =
  17763. + cpu_to_be16(p_CcNodeParam->keysParams.frameLengthRanges[tmp]);
  17764. +
  17765. + h_StatsFLRs =
  17766. + PTR_MOVE(p_CcNode->h_StatsFLRs, tmp * FM_PCD_CC_STATS_FLR_SIZE);
  17767. +
  17768. + MemCpy8(h_StatsFLRs,
  17769. + &flr,
  17770. + FM_PCD_CC_STATS_FLR_SIZE);
  17771. + }
  17772. + break;
  17773. +
  17774. + default:
  17775. + break;
  17776. + }
  17777. +#endif /* (DPAA_VERSION >= 11) */
  17778. +
  17779. + /* Allocate keys match table. Not required for some CC nodes, for example for IPv4 TTL
  17780. + identification, IPv6 hop count identification, etc. */
  17781. + if (isKeyTblAlloc)
  17782. + {
  17783. + p_CcNode->h_KeysMatchTable = (t_Handle)FM_MURAM_AllocMem(
  17784. + h_FmMuram, matchTableSize, FM_PCD_CC_KEYS_MATCH_TABLE_ALIGN);
  17785. + if (!p_CcNode->h_KeysMatchTable)
  17786. + {
  17787. + DeleteNode(p_CcNode);
  17788. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  17789. + ("MURAM allocation for CC node key match table"));
  17790. + }
  17791. + MemSet8((uint8_t *)p_CcNode->h_KeysMatchTable, 0, matchTableSize);
  17792. + }
  17793. +
  17794. + /* Allocate action descriptors table */
  17795. + p_CcNode->h_AdTable = (t_Handle)FM_MURAM_AllocMem(h_FmMuram, adTableSize,
  17796. + FM_PCD_CC_AD_TABLE_ALIGN);
  17797. + if (!p_CcNode->h_AdTable)
  17798. + {
  17799. + DeleteNode(p_CcNode);
  17800. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  17801. + ("MURAM allocation for CC node action descriptors table"));
  17802. + }
  17803. + MemSet8((uint8_t *)p_CcNode->h_AdTable, 0, adTableSize);
  17804. +
  17805. + p_KeysMatchTblTmp = p_CcNode->h_KeysMatchTable;
  17806. + p_AdTableTmp = p_CcNode->h_AdTable;
  17807. +
  17808. + /* For each key, create the key and the next step AD */
  17809. + for (tmp = 0; tmp < p_CcNode->numOfKeys; tmp++)
  17810. + {
  17811. + p_KeyParams = &p_CcNodeParam->keysParams.keyParams[tmp];
  17812. +
  17813. + if (p_KeysMatchTblTmp)
  17814. + {
  17815. + /* Copy the key */
  17816. + MemCpy8((void*)p_KeysMatchTblTmp, p_KeyParams->p_Key,
  17817. + p_CcNode->sizeOfExtraction);
  17818. +
  17819. + /* Copy the key mask or initialize it to 0xFF..F */
  17820. + if (p_CcNode->lclMask && p_KeyParams->p_Mask)
  17821. + {
  17822. + MemCpy8(PTR_MOVE(p_KeysMatchTblTmp,
  17823. + p_CcNode->ccKeySizeAccExtraction), /* User's size of extraction rounded up to a valid matching table entry size */
  17824. + p_KeyParams->p_Mask, p_CcNode->sizeOfExtraction); /* Exact size of extraction as received from the user */
  17825. + }
  17826. + else
  17827. + if (p_CcNode->lclMask)
  17828. + {
  17829. + MemSet8(PTR_MOVE(p_KeysMatchTblTmp,
  17830. + p_CcNode->ccKeySizeAccExtraction), /* User's size of extraction rounded up to a valid matching table entry size */
  17831. + 0xff, p_CcNode->sizeOfExtraction); /* Exact size of extraction as received from the user */
  17832. + }
  17833. +
  17834. + p_KeysMatchTblTmp =
  17835. + PTR_MOVE(p_KeysMatchTblTmp, keySize * sizeof(uint8_t));
  17836. + }
  17837. +
  17838. + /* Create the next action descriptor in the match table */
  17839. + if (p_KeyParams->ccNextEngineParams.statisticsEn)
  17840. + {
  17841. + p_StatsObj = GetStatsObj(p_CcNode);
  17842. + ASSERT_COND(p_StatsObj);
  17843. +
  17844. + statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
  17845. + statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
  17846. +#if (DPAA_VERSION >= 11)
  17847. + statsParams.h_StatsFLRs = p_CcNode->h_StatsFLRs;
  17848. +
  17849. +#endif /* (DPAA_VERSION >= 11) */
  17850. + NextStepAd(p_AdTableTmp, &statsParams,
  17851. + &p_KeyParams->ccNextEngineParams, p_FmPcd);
  17852. +
  17853. + p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = p_StatsObj;
  17854. + }
  17855. + else
  17856. + {
  17857. + NextStepAd(p_AdTableTmp, NULL, &p_KeyParams->ccNextEngineParams,
  17858. + p_FmPcd);
  17859. +
  17860. + p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = NULL;
  17861. + }
  17862. +
  17863. + p_AdTableTmp = PTR_MOVE(p_AdTableTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  17864. + }
  17865. +
  17866. + /* Update next engine for the 'miss' entry */
  17867. + if (p_CcNodeParam->keysParams.ccNextEngineParamsForMiss.statisticsEn)
  17868. + {
  17869. + p_StatsObj = GetStatsObj(p_CcNode);
  17870. + ASSERT_COND(p_StatsObj);
  17871. +
  17872. + /* All 'bucket' nodes of a hash table should share the same statistics counters,
  17873. + allocated by the hash table. So, if this node is a bucket of a hash table,
  17874. + we'll replace the locally allocated counters with the shared counters. */
  17875. + if (p_CcNode->isHashBucket)
  17876. + {
  17877. + ASSERT_COND(p_CcNode->h_MissStatsCounters);
  17878. +
  17879. + /* Store original counters pointer and replace it with mutual preallocated pointer */
  17880. + p_CcNode->h_PrivMissStatsCounters = p_StatsObj->h_StatsCounters;
  17881. + p_StatsObj->h_StatsCounters = p_CcNode->h_MissStatsCounters;
  17882. + }
  17883. +
  17884. + statsParams.h_StatsAd = p_StatsObj->h_StatsAd;
  17885. + statsParams.h_StatsCounters = p_StatsObj->h_StatsCounters;
  17886. +#if (DPAA_VERSION >= 11)
  17887. + statsParams.h_StatsFLRs = p_CcNode->h_StatsFLRs;
  17888. +
  17889. +#endif /* (DPAA_VERSION >= 11) */
  17890. +
  17891. + NextStepAd(p_AdTableTmp, &statsParams,
  17892. + &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  17893. + p_FmPcd);
  17894. +
  17895. + p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = p_StatsObj;
  17896. + }
  17897. + else
  17898. + {
  17899. + NextStepAd(p_AdTableTmp, NULL,
  17900. + &p_CcNodeParam->keysParams.ccNextEngineParamsForMiss,
  17901. + p_FmPcd);
  17902. +
  17903. + p_CcNode->keyAndNextEngineParams[tmp].p_StatsObj = NULL;
  17904. + }
  17905. +
  17906. + /* This parameter will be used to initialize the "key length" field in the action descriptor
  17907. + that points to this node and it should be 0 for full field extraction */
  17908. + if (fullField == TRUE)
  17909. + p_CcNode->sizeOfExtraction = 0;
  17910. +
  17911. + for (tmp = 0; tmp < MIN(p_CcNode->numOfKeys + 1, CC_MAX_NUM_OF_KEYS); tmp++)
  17912. + {
  17913. + if (p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.nextEngine
  17914. + == e_FM_PCD_CC)
  17915. + {
  17916. + p_FmPcdCcNextNode =
  17917. + (t_FmPcdCcNode*)p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.params.ccParams.h_CcNode;
  17918. + p_CcInformation = FindNodeInfoInReleventLst(
  17919. + &p_FmPcdCcNextNode->ccPrevNodesLst, (t_Handle)p_CcNode,
  17920. + p_FmPcdCcNextNode->h_Spinlock);
  17921. + if (!p_CcInformation)
  17922. + {
  17923. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  17924. + ccNodeInfo.h_CcNode = (t_Handle)p_CcNode;
  17925. + ccNodeInfo.index = 1;
  17926. + EnqueueNodeInfoToRelevantLst(&p_FmPcdCcNextNode->ccPrevNodesLst,
  17927. + &ccNodeInfo,
  17928. + p_FmPcdCcNextNode->h_Spinlock);
  17929. + }
  17930. + else
  17931. + p_CcInformation->index++;
  17932. +
  17933. + if (p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip)
  17934. + {
  17935. + h_Manip =
  17936. + p_CcNode->keyAndNextEngineParams[tmp].nextEngineParams.h_Manip;
  17937. + p_CcInformation = FindNodeInfoInReleventLst(
  17938. + FmPcdManipGetNodeLstPointedOnThisManip(h_Manip),
  17939. + (t_Handle)p_CcNode, FmPcdManipGetSpinlock(h_Manip));
  17940. + if (!p_CcInformation)
  17941. + {
  17942. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  17943. + ccNodeInfo.h_CcNode = (t_Handle)p_CcNode;
  17944. + ccNodeInfo.index = 1;
  17945. + EnqueueNodeInfoToRelevantLst(
  17946. + FmPcdManipGetNodeLstPointedOnThisManip(h_Manip),
  17947. + &ccNodeInfo, FmPcdManipGetSpinlock(h_Manip));
  17948. + }
  17949. + else
  17950. + p_CcInformation->index++;
  17951. + }
  17952. + }
  17953. + }
  17954. +
  17955. + p_AdTableTmp = p_CcNode->h_AdTable;
  17956. +
  17957. + if (!FmPcdLockTryLockAll(h_FmPcd))
  17958. + {
  17959. + FM_PCD_MatchTableDelete((t_Handle)p_CcNode);
  17960. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  17961. + return ERROR_CODE(E_BUSY);
  17962. + }
  17963. +
  17964. + /* Required action for each next engine */
  17965. + for (tmp = 0; tmp < MIN(p_CcNode->numOfKeys + 1, CC_MAX_NUM_OF_KEYS); tmp++)
  17966. + {
  17967. + if (p_CcNode->keyAndNextEngineParams[tmp].requiredAction)
  17968. + {
  17969. + err = SetRequiredAction(
  17970. + h_FmPcd,
  17971. + p_CcNode->keyAndNextEngineParams[tmp].requiredAction,
  17972. + &p_CcNode->keyAndNextEngineParams[tmp], p_AdTableTmp, 1,
  17973. + NULL);
  17974. + if (err)
  17975. + {
  17976. + FmPcdLockUnlockAll(h_FmPcd);
  17977. + FM_PCD_MatchTableDelete((t_Handle)p_CcNode);
  17978. + RETURN_ERROR(MAJOR, err, NO_MSG);
  17979. + }
  17980. + p_AdTableTmp = PTR_MOVE(p_AdTableTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  17981. + }
  17982. + }
  17983. +
  17984. + FmPcdLockUnlockAll(h_FmPcd);
  17985. +
  17986. + return E_OK;
  17987. +}
  17988. +/************************** End of static functions **************************/
  17989. +
  17990. +/*****************************************************************************/
  17991. +/* Inter-module API routines */
  17992. +/*****************************************************************************/
  17993. +
  17994. +t_CcNodeInformation* FindNodeInfoInReleventLst(t_List *p_List, t_Handle h_Info,
  17995. + t_Handle h_Spinlock)
  17996. +{
  17997. + t_CcNodeInformation *p_CcInformation;
  17998. + t_List *p_Pos;
  17999. + uint32_t intFlags;
  18000. +
  18001. + intFlags = XX_LockIntrSpinlock(h_Spinlock);
  18002. +
  18003. + for (p_Pos = LIST_FIRST(p_List); p_Pos != (p_List);
  18004. + p_Pos = LIST_NEXT(p_Pos))
  18005. + {
  18006. + p_CcInformation = CC_NODE_F_OBJECT(p_Pos);
  18007. +
  18008. + ASSERT_COND(p_CcInformation->h_CcNode);
  18009. +
  18010. + if (p_CcInformation->h_CcNode == h_Info)
  18011. + {
  18012. + XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
  18013. + return p_CcInformation;
  18014. + }
  18015. + }
  18016. +
  18017. + XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
  18018. +
  18019. + return NULL;
  18020. +}
  18021. +
  18022. +void EnqueueNodeInfoToRelevantLst(t_List *p_List, t_CcNodeInformation *p_CcInfo,
  18023. + t_Handle h_Spinlock)
  18024. +{
  18025. + t_CcNodeInformation *p_CcInformation;
  18026. + uint32_t intFlags = 0;
  18027. +
  18028. + p_CcInformation = (t_CcNodeInformation *)XX_Malloc(
  18029. + sizeof(t_CcNodeInformation));
  18030. +
  18031. + if (p_CcInformation)
  18032. + {
  18033. + memset(p_CcInformation, 0, sizeof(t_CcNodeInformation));
  18034. + memcpy(p_CcInformation, p_CcInfo, sizeof(t_CcNodeInformation));
  18035. + INIT_LIST(&p_CcInformation->node);
  18036. +
  18037. + if (h_Spinlock)
  18038. + intFlags = XX_LockIntrSpinlock(h_Spinlock);
  18039. +
  18040. + LIST_AddToTail(&p_CcInformation->node, p_List);
  18041. +
  18042. + if (h_Spinlock)
  18043. + XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
  18044. + }
  18045. + else
  18046. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("CC Node Information"));
  18047. +}
  18048. +
  18049. +void DequeueNodeInfoFromRelevantLst(t_List *p_List, t_Handle h_Info,
  18050. + t_Handle h_Spinlock)
  18051. +{
  18052. + t_CcNodeInformation *p_CcInformation = NULL;
  18053. + uint32_t intFlags = 0;
  18054. + t_List *p_Pos;
  18055. +
  18056. + if (h_Spinlock)
  18057. + intFlags = XX_LockIntrSpinlock(h_Spinlock);
  18058. +
  18059. + if (LIST_IsEmpty(p_List))
  18060. + {
  18061. + XX_RestoreAllIntr(intFlags);
  18062. + return;
  18063. + }
  18064. +
  18065. + for (p_Pos = LIST_FIRST(p_List); p_Pos != (p_List);
  18066. + p_Pos = LIST_NEXT(p_Pos))
  18067. + {
  18068. + p_CcInformation = CC_NODE_F_OBJECT(p_Pos);
  18069. + ASSERT_COND(p_CcInformation);
  18070. + ASSERT_COND(p_CcInformation->h_CcNode);
  18071. + if (p_CcInformation->h_CcNode == h_Info)
  18072. + break;
  18073. + }
  18074. +
  18075. + if (p_CcInformation)
  18076. + {
  18077. + LIST_DelAndInit(&p_CcInformation->node);
  18078. + XX_Free(p_CcInformation);
  18079. + }
  18080. +
  18081. + if (h_Spinlock)
  18082. + XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
  18083. +}
  18084. +
  18085. +void NextStepAd(t_Handle h_Ad, t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
  18086. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
  18087. + t_FmPcd *p_FmPcd)
  18088. +{
  18089. + switch (p_FmPcdCcNextEngineParams->nextEngine)
  18090. + {
  18091. + case (e_FM_PCD_KG):
  18092. + case (e_FM_PCD_PLCR):
  18093. + case (e_FM_PCD_DONE):
  18094. + /* if NIA is not CC, create a "result" type AD */
  18095. + FillAdOfTypeResult(h_Ad, p_FmPcdCcStatsParams, p_FmPcd,
  18096. + p_FmPcdCcNextEngineParams);
  18097. + break;
  18098. +#if (DPAA_VERSION >= 11)
  18099. + case (e_FM_PCD_FR):
  18100. + if (p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic)
  18101. + {
  18102. + FillAdOfTypeContLookup(
  18103. + h_Ad, p_FmPcdCcStatsParams, p_FmPcd,
  18104. + p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode,
  18105. + p_FmPcdCcNextEngineParams->h_Manip,
  18106. + p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic);
  18107. + FrmReplicGroupUpdateOwner(
  18108. + p_FmPcdCcNextEngineParams->params.frParams.h_FrmReplic,
  18109. + TRUE/* add */);
  18110. + }
  18111. + break;
  18112. +#endif /* (DPAA_VERSION >= 11) */
  18113. +
  18114. + case (e_FM_PCD_CC):
  18115. + /* if NIA is not CC, create a TD to continue the CC lookup */
  18116. + FillAdOfTypeContLookup(
  18117. + h_Ad, p_FmPcdCcStatsParams, p_FmPcd,
  18118. + p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode,
  18119. + p_FmPcdCcNextEngineParams->h_Manip, NULL);
  18120. +
  18121. + UpdateNodeOwner(p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode,
  18122. + TRUE);
  18123. + break;
  18124. +
  18125. + default:
  18126. + return;
  18127. + }
  18128. +}
  18129. +
  18130. +t_Error FmPcdCcTreeAddIPR(t_Handle h_FmPcd, t_Handle h_FmTree,
  18131. + t_Handle h_NetEnv, t_Handle h_IpReassemblyManip,
  18132. + bool createSchemes)
  18133. +{
  18134. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
  18135. + t_FmPcdCcNextEngineParams nextEngineParams;
  18136. + t_NetEnvParams netEnvParams;
  18137. + t_Handle h_Ad;
  18138. + bool isIpv6Present;
  18139. + uint8_t ipv4GroupId, ipv6GroupId;
  18140. + t_Error err;
  18141. +
  18142. + ASSERT_COND(p_FmPcdCcTree);
  18143. +
  18144. + /* this routine must be protected by the calling routine! */
  18145. +
  18146. + memset(&nextEngineParams, 0, sizeof(t_FmPcdCcNextEngineParams));
  18147. + memset(&netEnvParams, 0, sizeof(t_NetEnvParams));
  18148. +
  18149. + h_Ad = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
  18150. +
  18151. + isIpv6Present = FmPcdManipIpReassmIsIpv6Hdr(h_IpReassemblyManip);
  18152. +
  18153. + if (isIpv6Present
  18154. + && (p_FmPcdCcTree->numOfEntries > (FM_PCD_MAX_NUM_OF_CC_GROUPS - 2)))
  18155. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("need two free entries for IPR"));
  18156. +
  18157. + if (p_FmPcdCcTree->numOfEntries > (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1))
  18158. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("need two free entries for IPR"));
  18159. +
  18160. + nextEngineParams.nextEngine = e_FM_PCD_DONE;
  18161. + nextEngineParams.h_Manip = h_IpReassemblyManip;
  18162. +
  18163. + /* Lock tree */
  18164. + err = CcRootTryLock(p_FmPcdCcTree);
  18165. + if (err)
  18166. + return ERROR_CODE(E_BUSY);
  18167. +
  18168. + if (p_FmPcdCcTree->h_IpReassemblyManip == h_IpReassemblyManip)
  18169. + {
  18170. + CcRootReleaseLock(p_FmPcdCcTree);
  18171. + return E_OK;
  18172. + }
  18173. +
  18174. + if ((p_FmPcdCcTree->h_IpReassemblyManip)
  18175. + && (p_FmPcdCcTree->h_IpReassemblyManip != h_IpReassemblyManip))
  18176. + {
  18177. + CcRootReleaseLock(p_FmPcdCcTree);
  18178. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  18179. + ("This tree was previously updated with different IPR"));
  18180. + }
  18181. +
  18182. + /* Initialize IPR for the first time for this tree */
  18183. + if (isIpv6Present)
  18184. + {
  18185. + ipv6GroupId = p_FmPcdCcTree->numOfGrps++;
  18186. + p_FmPcdCcTree->fmPcdGroupParam[ipv6GroupId].baseGroupEntry =
  18187. + (FM_PCD_MAX_NUM_OF_CC_GROUPS - 2);
  18188. +
  18189. + if (createSchemes)
  18190. + {
  18191. + err = FmPcdManipBuildIpReassmScheme(h_FmPcd, h_NetEnv,
  18192. + p_FmPcdCcTree,
  18193. + h_IpReassemblyManip, FALSE,
  18194. + ipv6GroupId);
  18195. + if (err)
  18196. + {
  18197. + p_FmPcdCcTree->numOfGrps--;
  18198. + CcRootReleaseLock(p_FmPcdCcTree);
  18199. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18200. + }
  18201. + }
  18202. +
  18203. + NextStepAd(
  18204. + PTR_MOVE(h_Ad, (FM_PCD_MAX_NUM_OF_CC_GROUPS-2) * FM_PCD_CC_AD_ENTRY_SIZE),
  18205. + NULL, &nextEngineParams, h_FmPcd);
  18206. + }
  18207. +
  18208. + ipv4GroupId = p_FmPcdCcTree->numOfGrps++;
  18209. + p_FmPcdCcTree->fmPcdGroupParam[ipv4GroupId].totalBitsMask = 0;
  18210. + p_FmPcdCcTree->fmPcdGroupParam[ipv4GroupId].baseGroupEntry =
  18211. + (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1);
  18212. +
  18213. + if (createSchemes)
  18214. + {
  18215. + err = FmPcdManipBuildIpReassmScheme(h_FmPcd, h_NetEnv, p_FmPcdCcTree,
  18216. + h_IpReassemblyManip, TRUE,
  18217. + ipv4GroupId);
  18218. + if (err)
  18219. + {
  18220. + p_FmPcdCcTree->numOfGrps--;
  18221. + if (isIpv6Present)
  18222. + {
  18223. + p_FmPcdCcTree->numOfGrps--;
  18224. + FmPcdManipDeleteIpReassmSchemes(h_IpReassemblyManip);
  18225. + }
  18226. + CcRootReleaseLock(p_FmPcdCcTree);
  18227. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18228. + }
  18229. + }
  18230. +
  18231. + NextStepAd(
  18232. + PTR_MOVE(h_Ad, (FM_PCD_MAX_NUM_OF_CC_GROUPS-1) * FM_PCD_CC_AD_ENTRY_SIZE),
  18233. + NULL, &nextEngineParams, h_FmPcd);
  18234. +
  18235. + p_FmPcdCcTree->h_IpReassemblyManip = h_IpReassemblyManip;
  18236. +
  18237. + CcRootReleaseLock(p_FmPcdCcTree);
  18238. +
  18239. + return E_OK;
  18240. +}
  18241. +
  18242. +t_Error FmPcdCcTreeAddCPR(t_Handle h_FmPcd, t_Handle h_FmTree,
  18243. + t_Handle h_NetEnv, t_Handle h_ReassemblyManip,
  18244. + bool createSchemes)
  18245. +{
  18246. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
  18247. + t_FmPcdCcNextEngineParams nextEngineParams;
  18248. + t_NetEnvParams netEnvParams;
  18249. + t_Handle h_Ad;
  18250. + uint8_t groupId;
  18251. + t_Error err;
  18252. +
  18253. + ASSERT_COND(p_FmPcdCcTree);
  18254. +
  18255. + /* this routine must be protected by the calling routine! */
  18256. + memset(&nextEngineParams, 0, sizeof(t_FmPcdCcNextEngineParams));
  18257. + memset(&netEnvParams, 0, sizeof(t_NetEnvParams));
  18258. +
  18259. + h_Ad = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
  18260. +
  18261. + if (p_FmPcdCcTree->numOfEntries > (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1))
  18262. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("need one free entries for CPR"));
  18263. +
  18264. + nextEngineParams.nextEngine = e_FM_PCD_DONE;
  18265. + nextEngineParams.h_Manip = h_ReassemblyManip;
  18266. +
  18267. + /* Lock tree */
  18268. + err = CcRootTryLock(p_FmPcdCcTree);
  18269. + if (err)
  18270. + return ERROR_CODE(E_BUSY);
  18271. +
  18272. + if (p_FmPcdCcTree->h_CapwapReassemblyManip == h_ReassemblyManip)
  18273. + {
  18274. + CcRootReleaseLock(p_FmPcdCcTree);
  18275. + return E_OK;
  18276. + }
  18277. +
  18278. + if ((p_FmPcdCcTree->h_CapwapReassemblyManip)
  18279. + && (p_FmPcdCcTree->h_CapwapReassemblyManip != h_ReassemblyManip))
  18280. + {
  18281. + CcRootReleaseLock(p_FmPcdCcTree);
  18282. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  18283. + ("This tree was previously updated with different CPR"));
  18284. + }
  18285. +
  18286. + groupId = p_FmPcdCcTree->numOfGrps++;
  18287. + p_FmPcdCcTree->fmPcdGroupParam[groupId].baseGroupEntry =
  18288. + (FM_PCD_MAX_NUM_OF_CC_GROUPS - 1);
  18289. +
  18290. + if (createSchemes)
  18291. + {
  18292. + err = FmPcdManipBuildCapwapReassmScheme(h_FmPcd, h_NetEnv,
  18293. + p_FmPcdCcTree,
  18294. + h_ReassemblyManip, groupId);
  18295. + if (err)
  18296. + {
  18297. + p_FmPcdCcTree->numOfGrps--;
  18298. + CcRootReleaseLock(p_FmPcdCcTree);
  18299. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18300. + }
  18301. + }
  18302. +
  18303. + NextStepAd(
  18304. + PTR_MOVE(h_Ad, (FM_PCD_MAX_NUM_OF_CC_GROUPS-1) * FM_PCD_CC_AD_ENTRY_SIZE),
  18305. + NULL, &nextEngineParams, h_FmPcd);
  18306. +
  18307. + p_FmPcdCcTree->h_CapwapReassemblyManip = h_ReassemblyManip;
  18308. +
  18309. + CcRootReleaseLock(p_FmPcdCcTree);
  18310. +
  18311. + return E_OK;
  18312. +}
  18313. +
  18314. +t_Handle FmPcdCcTreeGetSavedManipParams(t_Handle h_FmTree)
  18315. +{
  18316. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
  18317. +
  18318. + ASSERT_COND(p_FmPcdCcTree);
  18319. +
  18320. + return p_FmPcdCcTree->h_FmPcdCcSavedManipParams;
  18321. +}
  18322. +
  18323. +void FmPcdCcTreeSetSavedManipParams(t_Handle h_FmTree,
  18324. + t_Handle h_SavedManipParams)
  18325. +{
  18326. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmTree;
  18327. +
  18328. + ASSERT_COND(p_FmPcdCcTree);
  18329. +
  18330. + p_FmPcdCcTree->h_FmPcdCcSavedManipParams = h_SavedManipParams;
  18331. +}
  18332. +
  18333. +uint8_t FmPcdCcGetParseCode(t_Handle h_CcNode)
  18334. +{
  18335. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  18336. +
  18337. + ASSERT_COND(p_CcNode);
  18338. +
  18339. + return p_CcNode->parseCode;
  18340. +}
  18341. +
  18342. +uint8_t FmPcdCcGetOffset(t_Handle h_CcNode)
  18343. +{
  18344. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  18345. +
  18346. + ASSERT_COND(p_CcNode);
  18347. +
  18348. + return p_CcNode->offset;
  18349. +}
  18350. +
  18351. +uint16_t FmPcdCcGetNumOfKeys(t_Handle h_CcNode)
  18352. +{
  18353. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  18354. +
  18355. + ASSERT_COND(p_CcNode);
  18356. +
  18357. + return p_CcNode->numOfKeys;
  18358. +}
  18359. +
  18360. +t_Error FmPcdCcModifyNextEngineParamTree(
  18361. + t_Handle h_FmPcd, t_Handle h_FmPcdCcTree, uint8_t grpId, uint8_t index,
  18362. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  18363. +{
  18364. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
  18365. + t_FmPcd *p_FmPcd;
  18366. + t_List h_OldPointersLst, h_NewPointersLst;
  18367. + uint16_t keyIndex;
  18368. + t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
  18369. + t_Error err = E_OK;
  18370. +
  18371. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  18372. + SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
  18373. + SANITY_CHECK_RETURN_ERROR((grpId <= 7), E_INVALID_VALUE);
  18374. +
  18375. + if (grpId >= p_FmPcdCcTree->numOfGrps)
  18376. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE,
  18377. + ("grpId you asked > numOfGroup of relevant tree"));
  18378. +
  18379. + if (index >= p_FmPcdCcTree->fmPcdGroupParam[grpId].numOfEntriesInGroup)
  18380. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("index > numOfEntriesInGroup"));
  18381. +
  18382. + p_FmPcd = (t_FmPcd *)h_FmPcd;
  18383. +
  18384. + INIT_LIST(&h_OldPointersLst);
  18385. + INIT_LIST(&h_NewPointersLst);
  18386. +
  18387. + keyIndex = (uint16_t)(p_FmPcdCcTree->fmPcdGroupParam[grpId].baseGroupEntry
  18388. + + index);
  18389. +
  18390. + p_ModifyKeyParams = ModifyNodeCommonPart(p_FmPcdCcTree, keyIndex,
  18391. + e_MODIFY_STATE_CHANGE, FALSE,
  18392. + FALSE, TRUE);
  18393. + if (!p_ModifyKeyParams)
  18394. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  18395. +
  18396. + p_ModifyKeyParams->tree = TRUE;
  18397. +
  18398. + if (p_FmPcd->p_CcShadow
  18399. + && !TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  18400. + {
  18401. + XX_Free(p_ModifyKeyParams);
  18402. + return ERROR_CODE(E_BUSY);
  18403. + }
  18404. +
  18405. + err = BuildNewNodeModifyNextEngine(p_FmPcd, p_FmPcdCcTree, keyIndex,
  18406. + p_FmPcdCcNextEngineParams,
  18407. + &h_OldPointersLst, &h_NewPointersLst,
  18408. + p_ModifyKeyParams);
  18409. + if (err)
  18410. + {
  18411. + XX_Free(p_ModifyKeyParams);
  18412. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18413. + }
  18414. +
  18415. + err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
  18416. + p_ModifyKeyParams, FALSE);
  18417. +
  18418. + if (p_FmPcd->p_CcShadow)
  18419. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18420. +
  18421. + return err;
  18422. +
  18423. +}
  18424. +
  18425. +t_Error FmPcdCcRemoveKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
  18426. + uint16_t keyIndex)
  18427. +{
  18428. +
  18429. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
  18430. + t_FmPcd *p_FmPcd;
  18431. + t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
  18432. + t_List h_OldPointersLst, h_NewPointersLst;
  18433. + bool useShadowStructs = FALSE;
  18434. + t_Error err = E_OK;
  18435. +
  18436. + if (keyIndex >= p_CcNode->numOfKeys)
  18437. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  18438. + ("impossible to remove key when numOfKeys <= keyIndex"));
  18439. +
  18440. + if (p_CcNode->h_FmPcd != h_FmPcd)
  18441. + RETURN_ERROR(
  18442. + MAJOR,
  18443. + E_INVALID_VALUE,
  18444. + ("handler to FmPcd is different from the handle provided at node initialization time"));
  18445. +
  18446. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  18447. +
  18448. + INIT_LIST(&h_OldPointersLst);
  18449. + INIT_LIST(&h_NewPointersLst);
  18450. +
  18451. + p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
  18452. + e_MODIFY_STATE_REMOVE, TRUE, TRUE,
  18453. + FALSE);
  18454. + if (!p_ModifyKeyParams)
  18455. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  18456. +
  18457. + if (p_CcNode->maxNumOfKeys)
  18458. + {
  18459. + if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  18460. + {
  18461. + XX_Free(p_ModifyKeyParams);
  18462. + return ERROR_CODE(E_BUSY);
  18463. + }
  18464. +
  18465. + useShadowStructs = TRUE;
  18466. + }
  18467. +
  18468. + err = BuildNewNodeRemoveKey(p_CcNode, keyIndex, p_ModifyKeyParams);
  18469. + if (err)
  18470. + {
  18471. + XX_Free(p_ModifyKeyParams);
  18472. + if (p_CcNode->maxNumOfKeys)
  18473. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18474. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18475. + }
  18476. +
  18477. + err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
  18478. + &h_OldPointersLst,
  18479. + &h_NewPointersLst);
  18480. + if (err)
  18481. + {
  18482. + ReleaseNewNodeCommonPart(p_ModifyKeyParams);
  18483. + XX_Free(p_ModifyKeyParams);
  18484. + if (p_CcNode->maxNumOfKeys)
  18485. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18486. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18487. + }
  18488. +
  18489. + err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
  18490. + p_ModifyKeyParams, useShadowStructs);
  18491. +
  18492. + if (p_CcNode->maxNumOfKeys)
  18493. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18494. +
  18495. + return err;
  18496. +}
  18497. +
  18498. +t_Error FmPcdCcModifyKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
  18499. + uint16_t keyIndex, uint8_t keySize, uint8_t *p_Key,
  18500. + uint8_t *p_Mask)
  18501. +{
  18502. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
  18503. + t_FmPcd *p_FmPcd;
  18504. + t_List h_OldPointersLst, h_NewPointersLst;
  18505. + t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
  18506. + uint16_t tmpKeyIndex;
  18507. + bool useShadowStructs = FALSE;
  18508. + t_Error err = E_OK;
  18509. +
  18510. + if (keyIndex >= p_CcNode->numOfKeys)
  18511. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  18512. + ("keyIndex > previously cleared last index + 1"));
  18513. +
  18514. + if (keySize != p_CcNode->userSizeOfExtraction)
  18515. + RETURN_ERROR(
  18516. + MAJOR,
  18517. + E_INVALID_VALUE,
  18518. + ("size for ModifyKey has to be the same as defined in SetNode"));
  18519. +
  18520. + if (p_CcNode->h_FmPcd != h_FmPcd)
  18521. + RETURN_ERROR(
  18522. + MAJOR,
  18523. + E_INVALID_VALUE,
  18524. + ("handler to FmPcd is different from the handle provided at node initialization time"));
  18525. +
  18526. + err = FindKeyIndex(h_FmPcdCcNode, keySize, p_Key, p_Mask, &tmpKeyIndex);
  18527. + if (GET_ERROR_TYPE(err) != E_NOT_FOUND)
  18528. + RETURN_ERROR(
  18529. + MINOR,
  18530. + E_ALREADY_EXISTS,
  18531. + ("The received key and mask pair was already found in the match table of the provided node"));
  18532. +
  18533. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  18534. +
  18535. + INIT_LIST(&h_OldPointersLst);
  18536. + INIT_LIST(&h_NewPointersLst);
  18537. +
  18538. + p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
  18539. + e_MODIFY_STATE_CHANGE, TRUE, TRUE,
  18540. + FALSE);
  18541. + if (!p_ModifyKeyParams)
  18542. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  18543. +
  18544. + if (p_CcNode->maxNumOfKeys)
  18545. + {
  18546. + if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  18547. + {
  18548. + XX_Free(p_ModifyKeyParams);
  18549. + return ERROR_CODE(E_BUSY);
  18550. + }
  18551. +
  18552. + useShadowStructs = TRUE;
  18553. + }
  18554. +
  18555. + err = BuildNewNodeModifyKey(p_CcNode, keyIndex, p_Key, p_Mask,
  18556. + p_ModifyKeyParams);
  18557. + if (err)
  18558. + {
  18559. + XX_Free(p_ModifyKeyParams);
  18560. + if (p_CcNode->maxNumOfKeys)
  18561. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18562. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18563. + }
  18564. +
  18565. + err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
  18566. + &h_OldPointersLst,
  18567. + &h_NewPointersLst);
  18568. + if (err)
  18569. + {
  18570. + ReleaseNewNodeCommonPart(p_ModifyKeyParams);
  18571. + XX_Free(p_ModifyKeyParams);
  18572. + if (p_CcNode->maxNumOfKeys)
  18573. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18574. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18575. + }
  18576. +
  18577. + err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
  18578. + p_ModifyKeyParams, useShadowStructs);
  18579. +
  18580. + if (p_CcNode->maxNumOfKeys)
  18581. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18582. +
  18583. + return err;
  18584. +}
  18585. +
  18586. +t_Error FmPcdCcModifyMissNextEngineParamNode(
  18587. + t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
  18588. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  18589. +{
  18590. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
  18591. + t_FmPcd *p_FmPcd;
  18592. + t_List h_OldPointersLst, h_NewPointersLst;
  18593. + uint16_t keyIndex;
  18594. + t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
  18595. + t_Error err = E_OK;
  18596. +
  18597. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_VALUE);
  18598. +
  18599. + keyIndex = p_CcNode->numOfKeys;
  18600. +
  18601. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  18602. +
  18603. + INIT_LIST(&h_OldPointersLst);
  18604. + INIT_LIST(&h_NewPointersLst);
  18605. +
  18606. + p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
  18607. + e_MODIFY_STATE_CHANGE, FALSE, TRUE,
  18608. + FALSE);
  18609. + if (!p_ModifyKeyParams)
  18610. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  18611. +
  18612. + if (p_CcNode->maxNumOfKeys
  18613. + && !TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  18614. + {
  18615. + XX_Free(p_ModifyKeyParams);
  18616. + return ERROR_CODE(E_BUSY);
  18617. + }
  18618. +
  18619. + err = BuildNewNodeModifyNextEngine(h_FmPcd, p_CcNode, keyIndex,
  18620. + p_FmPcdCcNextEngineParams,
  18621. + &h_OldPointersLst, &h_NewPointersLst,
  18622. + p_ModifyKeyParams);
  18623. + if (err)
  18624. + {
  18625. + XX_Free(p_ModifyKeyParams);
  18626. + if (p_CcNode->maxNumOfKeys)
  18627. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18628. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18629. + }
  18630. +
  18631. + err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
  18632. + p_ModifyKeyParams, FALSE);
  18633. +
  18634. + if (p_CcNode->maxNumOfKeys)
  18635. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18636. +
  18637. + return err;
  18638. +}
  18639. +
  18640. +t_Error FmPcdCcAddKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
  18641. + uint16_t keyIndex, uint8_t keySize,
  18642. + t_FmPcdCcKeyParams *p_FmPcdCcKeyParams)
  18643. +{
  18644. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
  18645. + t_FmPcd *p_FmPcd;
  18646. + t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
  18647. + t_List h_OldPointersLst, h_NewPointersLst;
  18648. + bool useShadowStructs = FALSE;
  18649. + uint16_t tmpKeyIndex;
  18650. + t_Error err = E_OK;
  18651. +
  18652. + if (keyIndex > p_CcNode->numOfKeys)
  18653. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
  18654. + ("keyIndex > previously cleared last index + 1"));
  18655. +
  18656. + if (keySize != p_CcNode->userSizeOfExtraction)
  18657. + RETURN_ERROR(
  18658. + MAJOR,
  18659. + E_INVALID_VALUE,
  18660. + ("keySize has to be defined as it was defined in initialization step"));
  18661. +
  18662. + if (p_CcNode->h_FmPcd != h_FmPcd)
  18663. + RETURN_ERROR(
  18664. + MAJOR,
  18665. + E_INVALID_VALUE,
  18666. + ("handler to FmPcd is different from the handle provided at node initialization time"));
  18667. +
  18668. + if (p_CcNode->maxNumOfKeys)
  18669. + {
  18670. + if (p_CcNode->numOfKeys == p_CcNode->maxNumOfKeys)
  18671. + RETURN_ERROR(
  18672. + MAJOR,
  18673. + E_FULL,
  18674. + ("number of keys exceeds the maximal number of keys provided at node initialization time"));
  18675. + }
  18676. + else
  18677. + if (p_CcNode->numOfKeys == FM_PCD_MAX_NUM_OF_KEYS)
  18678. + RETURN_ERROR(
  18679. + MAJOR,
  18680. + E_INVALID_VALUE,
  18681. + ("number of keys can not be larger than %d", FM_PCD_MAX_NUM_OF_KEYS));
  18682. +
  18683. + err = FindKeyIndex(h_FmPcdCcNode, keySize, p_FmPcdCcKeyParams->p_Key,
  18684. + p_FmPcdCcKeyParams->p_Mask, &tmpKeyIndex);
  18685. + if (GET_ERROR_TYPE(err) != E_NOT_FOUND)
  18686. + RETURN_ERROR(
  18687. + MAJOR,
  18688. + E_ALREADY_EXISTS,
  18689. + ("The received key and mask pair was already found in the match table of the provided node"));
  18690. +
  18691. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  18692. +
  18693. + INIT_LIST(&h_OldPointersLst);
  18694. + INIT_LIST(&h_NewPointersLst);
  18695. +
  18696. + p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
  18697. + e_MODIFY_STATE_ADD, TRUE, TRUE,
  18698. + FALSE);
  18699. + if (!p_ModifyKeyParams)
  18700. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  18701. +
  18702. + if (p_CcNode->maxNumOfKeys)
  18703. + {
  18704. + if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  18705. + {
  18706. + XX_Free(p_ModifyKeyParams);
  18707. + return ERROR_CODE(E_BUSY);
  18708. + }
  18709. +
  18710. + useShadowStructs = TRUE;
  18711. + }
  18712. +
  18713. + err = BuildNewNodeAddOrMdfyKeyAndNextEngine(h_FmPcd, p_CcNode, keyIndex,
  18714. + p_FmPcdCcKeyParams,
  18715. + p_ModifyKeyParams, TRUE);
  18716. + if (err)
  18717. + {
  18718. + ReleaseNewNodeCommonPart(p_ModifyKeyParams);
  18719. + XX_Free(p_ModifyKeyParams);
  18720. + if (p_CcNode->maxNumOfKeys)
  18721. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18722. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18723. + }
  18724. +
  18725. + err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
  18726. + &h_OldPointersLst,
  18727. + &h_NewPointersLst);
  18728. + if (err)
  18729. + {
  18730. + ReleaseNewNodeCommonPart(p_ModifyKeyParams);
  18731. + XX_Free(p_ModifyKeyParams);
  18732. + if (p_CcNode->maxNumOfKeys)
  18733. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18734. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18735. + }
  18736. +
  18737. + err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
  18738. + p_ModifyKeyParams, useShadowStructs);
  18739. + if (p_CcNode->maxNumOfKeys)
  18740. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18741. +
  18742. + return err;
  18743. +}
  18744. +
  18745. +t_Error FmPcdCcModifyKeyAndNextEngine(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
  18746. + uint16_t keyIndex, uint8_t keySize,
  18747. + t_FmPcdCcKeyParams *p_FmPcdCcKeyParams)
  18748. +{
  18749. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
  18750. + t_FmPcd *p_FmPcd;
  18751. + t_List h_OldPointersLst, h_NewPointersLst;
  18752. + t_FmPcdModifyCcKeyAdditionalParams *p_ModifyKeyParams;
  18753. + uint16_t tmpKeyIndex;
  18754. + bool useShadowStructs = FALSE;
  18755. + t_Error err = E_OK;
  18756. +
  18757. + if (keyIndex > p_CcNode->numOfKeys)
  18758. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  18759. + ("keyIndex > previously cleared last index + 1"));
  18760. +
  18761. + if (keySize != p_CcNode->userSizeOfExtraction)
  18762. + RETURN_ERROR(
  18763. + MAJOR,
  18764. + E_INVALID_VALUE,
  18765. + ("keySize has to be defined as it was defined in initialization step"));
  18766. +
  18767. + if (p_CcNode->h_FmPcd != h_FmPcd)
  18768. + RETURN_ERROR(
  18769. + MAJOR,
  18770. + E_INVALID_VALUE,
  18771. + ("handler to FmPcd is different from the handle provided at node initialization time"));
  18772. +
  18773. + err = FindKeyIndex(h_FmPcdCcNode, keySize, p_FmPcdCcKeyParams->p_Key,
  18774. + p_FmPcdCcKeyParams->p_Mask, &tmpKeyIndex);
  18775. + if (GET_ERROR_TYPE(err) != E_NOT_FOUND)
  18776. + RETURN_ERROR(
  18777. + MINOR,
  18778. + E_ALREADY_EXISTS,
  18779. + ("The received key and mask pair was already found in the match table of the provided node"));
  18780. +
  18781. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  18782. +
  18783. + INIT_LIST(&h_OldPointersLst);
  18784. + INIT_LIST(&h_NewPointersLst);
  18785. +
  18786. + p_ModifyKeyParams = ModifyNodeCommonPart(p_CcNode, keyIndex,
  18787. + e_MODIFY_STATE_CHANGE, TRUE, TRUE,
  18788. + FALSE);
  18789. + if (!p_ModifyKeyParams)
  18790. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  18791. +
  18792. + if (p_CcNode->maxNumOfKeys)
  18793. + {
  18794. + if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  18795. + {
  18796. + XX_Free(p_ModifyKeyParams);
  18797. + return ERROR_CODE(E_BUSY);
  18798. + }
  18799. +
  18800. + useShadowStructs = TRUE;
  18801. + }
  18802. +
  18803. + err = BuildNewNodeAddOrMdfyKeyAndNextEngine(h_FmPcd, p_CcNode, keyIndex,
  18804. + p_FmPcdCcKeyParams,
  18805. + p_ModifyKeyParams, FALSE);
  18806. + if (err)
  18807. + {
  18808. + ReleaseNewNodeCommonPart(p_ModifyKeyParams);
  18809. + XX_Free(p_ModifyKeyParams);
  18810. + if (p_CcNode->maxNumOfKeys)
  18811. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18812. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18813. + }
  18814. +
  18815. + err = UpdatePtrWhichPointOnCrntMdfNode(p_CcNode, p_ModifyKeyParams,
  18816. + &h_OldPointersLst,
  18817. + &h_NewPointersLst);
  18818. + if (err)
  18819. + {
  18820. + ReleaseNewNodeCommonPart(p_ModifyKeyParams);
  18821. + XX_Free(p_ModifyKeyParams);
  18822. + if (p_CcNode->maxNumOfKeys)
  18823. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18824. + RETURN_ERROR(MAJOR, err, NO_MSG);
  18825. + }
  18826. +
  18827. + err = DoDynamicChange(p_FmPcd, &h_OldPointersLst, &h_NewPointersLst,
  18828. + p_ModifyKeyParams, useShadowStructs);
  18829. +
  18830. + if (p_CcNode->maxNumOfKeys)
  18831. + RELEASE_LOCK(p_FmPcd->shadowLock);
  18832. +
  18833. + return err;
  18834. +}
  18835. +
  18836. +uint32_t FmPcdCcGetNodeAddrOffsetFromNodeInfo(t_Handle h_FmPcd,
  18837. + t_Handle h_Pointer)
  18838. +{
  18839. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  18840. + t_CcNodeInformation *p_CcNodeInfo;
  18841. +
  18842. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE,
  18843. + (uint32_t)ILLEGAL_BASE);
  18844. +
  18845. + p_CcNodeInfo = CC_NODE_F_OBJECT(h_Pointer);
  18846. +
  18847. + return (uint32_t)(XX_VirtToPhys(p_CcNodeInfo->h_CcNode)
  18848. + - p_FmPcd->physicalMuramBase);
  18849. +}
  18850. +
  18851. +t_Error FmPcdCcGetGrpParams(t_Handle h_FmPcdCcTree, uint8_t grpId,
  18852. + uint32_t *p_GrpBits, uint8_t *p_GrpBase)
  18853. +{
  18854. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
  18855. +
  18856. + SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
  18857. +
  18858. + if (grpId >= p_FmPcdCcTree->numOfGrps)
  18859. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE,
  18860. + ("grpId you asked > numOfGroup of relevant tree"));
  18861. +
  18862. + *p_GrpBits = p_FmPcdCcTree->fmPcdGroupParam[grpId].totalBitsMask;
  18863. + *p_GrpBase = p_FmPcdCcTree->fmPcdGroupParam[grpId].baseGroupEntry;
  18864. +
  18865. + return E_OK;
  18866. +}
  18867. +
  18868. +t_Error FmPcdCcBindTree(t_Handle h_FmPcd, t_Handle h_PcdParams,
  18869. + t_Handle h_FmPcdCcTree, uint32_t *p_Offset,
  18870. + t_Handle h_FmPort)
  18871. +{
  18872. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  18873. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
  18874. + t_Error err = E_OK;
  18875. +
  18876. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  18877. + SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
  18878. +
  18879. + /* this routine must be protected by the calling routine by locking all PCD modules! */
  18880. +
  18881. + err = CcUpdateParams(h_FmPcd, h_PcdParams, h_FmPort, h_FmPcdCcTree, TRUE);
  18882. +
  18883. + if (err == E_OK)
  18884. + UpdateCcRootOwner(p_FmPcdCcTree, TRUE);
  18885. +
  18886. + *p_Offset = (uint32_t)(XX_VirtToPhys(
  18887. + UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr))
  18888. + - p_FmPcd->physicalMuramBase);
  18889. +
  18890. + return err;
  18891. +}
  18892. +
  18893. +t_Error FmPcdCcUnbindTree(t_Handle h_FmPcd, t_Handle h_FmPcdCcTree)
  18894. +{
  18895. + t_FmPcdCcTree *p_FmPcdCcTree = (t_FmPcdCcTree *)h_FmPcdCcTree;
  18896. +
  18897. + /* this routine must be protected by the calling routine by locking all PCD modules! */
  18898. +
  18899. + UNUSED(h_FmPcd);
  18900. +
  18901. + SANITY_CHECK_RETURN_ERROR(h_FmPcdCcTree, E_INVALID_HANDLE);
  18902. +
  18903. + UpdateCcRootOwner(p_FmPcdCcTree, FALSE);
  18904. +
  18905. + return E_OK;
  18906. +}
  18907. +
  18908. +t_Error FmPcdCcNodeTreeTryLock(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode,
  18909. + t_List *p_List)
  18910. +{
  18911. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_FmPcdCcNode;
  18912. + t_List *p_Pos, *p_Tmp;
  18913. + t_CcNodeInformation *p_CcNodeInfo, nodeInfo;
  18914. + uint32_t intFlags;
  18915. + t_Error err = E_OK;
  18916. +
  18917. + intFlags = FmPcdLock(h_FmPcd);
  18918. +
  18919. + LIST_FOR_EACH(p_Pos, &p_CcNode->ccTreesLst)
  18920. + {
  18921. + p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
  18922. + ASSERT_COND(p_CcNodeInfo->h_CcNode);
  18923. +
  18924. + err = CcRootTryLock(p_CcNodeInfo->h_CcNode);
  18925. +
  18926. + if (err)
  18927. + {
  18928. + LIST_FOR_EACH(p_Tmp, &p_CcNode->ccTreesLst)
  18929. + {
  18930. + if (p_Tmp == p_Pos)
  18931. + break;
  18932. +
  18933. + CcRootReleaseLock(p_CcNodeInfo->h_CcNode);
  18934. + }
  18935. + break;
  18936. + }
  18937. +
  18938. + memset(&nodeInfo, 0, sizeof(t_CcNodeInformation));
  18939. + nodeInfo.h_CcNode = p_CcNodeInfo->h_CcNode;
  18940. + EnqueueNodeInfoToRelevantLst(p_List, &nodeInfo, NULL);
  18941. + }
  18942. +
  18943. + FmPcdUnlock(h_FmPcd, intFlags);
  18944. + CORE_MemoryBarrier();
  18945. +
  18946. + return err;
  18947. +}
  18948. +
  18949. +void FmPcdCcNodeTreeReleaseLock(t_Handle h_FmPcd, t_List *p_List)
  18950. +{
  18951. + t_List *p_Pos;
  18952. + t_CcNodeInformation *p_CcNodeInfo;
  18953. + t_Handle h_FmPcdCcTree;
  18954. + uint32_t intFlags;
  18955. +
  18956. + intFlags = FmPcdLock(h_FmPcd);
  18957. +
  18958. + LIST_FOR_EACH(p_Pos, p_List)
  18959. + {
  18960. + p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
  18961. + h_FmPcdCcTree = p_CcNodeInfo->h_CcNode;
  18962. + CcRootReleaseLock(h_FmPcdCcTree);
  18963. + }
  18964. +
  18965. + ReleaseLst(p_List);
  18966. +
  18967. + FmPcdUnlock(h_FmPcd, intFlags);
  18968. + CORE_MemoryBarrier();
  18969. +}
  18970. +
  18971. +t_Error FmPcdUpdateCcShadow(t_FmPcd *p_FmPcd, uint32_t size, uint32_t align)
  18972. +{
  18973. + uint32_t intFlags;
  18974. + uint32_t newSize = 0, newAlign = 0;
  18975. + bool allocFail = FALSE;
  18976. +
  18977. + ASSERT_COND(p_FmPcd);
  18978. +
  18979. + if (!size)
  18980. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("size must be larger then 0"));
  18981. +
  18982. + if (!POWER_OF_2(align))
  18983. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("alignment must be power of 2"));
  18984. +
  18985. + newSize = p_FmPcd->ccShadowSize;
  18986. + newAlign = p_FmPcd->ccShadowAlign;
  18987. +
  18988. + /* Check if current shadow is large enough to hold the requested size */
  18989. + if (size > p_FmPcd->ccShadowSize)
  18990. + newSize = size;
  18991. +
  18992. + /* Check if current shadow matches the requested alignment */
  18993. + if (align > p_FmPcd->ccShadowAlign)
  18994. + newAlign = align;
  18995. +
  18996. + /* If a bigger shadow size or bigger shadow alignment are required,
  18997. + a new shadow will be allocated */
  18998. + if ((newSize != p_FmPcd->ccShadowSize)
  18999. + || (newAlign != p_FmPcd->ccShadowAlign))
  19000. + {
  19001. + intFlags = FmPcdLock(p_FmPcd);
  19002. +
  19003. + if (p_FmPcd->p_CcShadow)
  19004. + {
  19005. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(p_FmPcd), p_FmPcd->p_CcShadow);
  19006. + p_FmPcd->ccShadowSize = 0;
  19007. + p_FmPcd->ccShadowAlign = 0;
  19008. + }
  19009. +
  19010. + p_FmPcd->p_CcShadow = FM_MURAM_AllocMem(FmPcdGetMuramHandle(p_FmPcd),
  19011. + newSize, newAlign);
  19012. + if (!p_FmPcd->p_CcShadow)
  19013. + {
  19014. + allocFail = TRUE;
  19015. +
  19016. + /* If new shadow size allocation failed,
  19017. + re-allocate with previous parameters */
  19018. + p_FmPcd->p_CcShadow = FM_MURAM_AllocMem(
  19019. + FmPcdGetMuramHandle(p_FmPcd), p_FmPcd->ccShadowSize,
  19020. + p_FmPcd->ccShadowAlign);
  19021. + }
  19022. +
  19023. + FmPcdUnlock(p_FmPcd, intFlags);
  19024. +
  19025. + if (allocFail)
  19026. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  19027. + ("MURAM allocation for CC Shadow memory"));
  19028. +
  19029. + p_FmPcd->ccShadowSize = newSize;
  19030. + p_FmPcd->ccShadowAlign = newAlign;
  19031. + }
  19032. +
  19033. + return E_OK;
  19034. +}
  19035. +
  19036. +#if (DPAA_VERSION >= 11)
  19037. +void FmPcdCcGetAdTablesThatPointOnReplicGroup(t_Handle h_Node,
  19038. + t_Handle h_ReplicGroup,
  19039. + t_List *p_AdTables,
  19040. + uint32_t *p_NumOfAdTables)
  19041. +{
  19042. + t_FmPcdCcNode *p_CurrentNode = (t_FmPcdCcNode *)h_Node;
  19043. + int i = 0;
  19044. + void * p_AdTable;
  19045. + t_CcNodeInformation ccNodeInfo;
  19046. +
  19047. + ASSERT_COND(h_Node);
  19048. + *p_NumOfAdTables = 0;
  19049. +
  19050. + /* search in the current node which exact index points on this current replicator group for getting AD */
  19051. + for (i = 0; i < p_CurrentNode->numOfKeys + 1; i++)
  19052. + {
  19053. + if ((p_CurrentNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  19054. + == e_FM_PCD_FR)
  19055. + && ((p_CurrentNode->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic
  19056. + == (t_Handle)h_ReplicGroup)))
  19057. + {
  19058. + /* save the current ad table in the list */
  19059. + /* this entry uses the input replicator group */
  19060. + p_AdTable =
  19061. + PTR_MOVE(p_CurrentNode->h_AdTable, i*FM_PCD_CC_AD_ENTRY_SIZE);
  19062. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  19063. + ccNodeInfo.h_CcNode = p_AdTable;
  19064. + EnqueueNodeInfoToRelevantLst(p_AdTables, &ccNodeInfo, NULL);
  19065. + (*p_NumOfAdTables)++;
  19066. + }
  19067. + }
  19068. +
  19069. + ASSERT_COND(i != p_CurrentNode->numOfKeys);
  19070. +}
  19071. +#endif /* (DPAA_VERSION >= 11) */
  19072. +/*********************** End of inter-module routines ************************/
  19073. +
  19074. +/****************************************/
  19075. +/* API Init unit functions */
  19076. +/****************************************/
  19077. +
  19078. +t_Handle FM_PCD_CcRootBuild(t_Handle h_FmPcd,
  19079. + t_FmPcdCcTreeParams *p_PcdGroupsParam)
  19080. +{
  19081. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  19082. + t_Error err = E_OK;
  19083. + int i = 0, j = 0, k = 0;
  19084. + t_FmPcdCcTree *p_FmPcdCcTree;
  19085. + uint8_t numOfEntries;
  19086. + t_Handle p_CcTreeTmp;
  19087. + t_FmPcdCcGrpParams *p_FmPcdCcGroupParams;
  19088. + t_FmPcdCcKeyAndNextEngineParams *p_Params, *p_KeyAndNextEngineParams;
  19089. + t_NetEnvParams netEnvParams;
  19090. + uint8_t lastOne = 0;
  19091. + uint32_t requiredAction = 0;
  19092. + t_FmPcdCcNode *p_FmPcdCcNextNode;
  19093. + t_CcNodeInformation ccNodeInfo, *p_CcInformation;
  19094. +
  19095. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
  19096. + SANITY_CHECK_RETURN_VALUE(p_PcdGroupsParam, E_INVALID_HANDLE, NULL);
  19097. +
  19098. + if (p_PcdGroupsParam->numOfGrps > FM_PCD_MAX_NUM_OF_CC_GROUPS)
  19099. + {
  19100. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("numOfGrps should not exceed %d", FM_PCD_MAX_NUM_OF_CC_GROUPS));
  19101. + return NULL;
  19102. + }
  19103. +
  19104. + p_FmPcdCcTree = (t_FmPcdCcTree*)XX_Malloc(sizeof(t_FmPcdCcTree));
  19105. + if (!p_FmPcdCcTree)
  19106. + {
  19107. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("PCD tree structure"));
  19108. + return NULL;
  19109. + }
  19110. + memset(p_FmPcdCcTree, 0, sizeof(t_FmPcdCcTree));
  19111. + p_FmPcdCcTree->h_FmPcd = h_FmPcd;
  19112. +
  19113. + p_Params = (t_FmPcdCcKeyAndNextEngineParams*)XX_Malloc(
  19114. + FM_PCD_MAX_NUM_OF_CC_GROUPS
  19115. + * sizeof(t_FmPcdCcKeyAndNextEngineParams));
  19116. + memset(p_Params,
  19117. + 0,
  19118. + FM_PCD_MAX_NUM_OF_CC_GROUPS
  19119. + * sizeof(t_FmPcdCcKeyAndNextEngineParams));
  19120. +
  19121. + INIT_LIST(&p_FmPcdCcTree->fmPortsLst);
  19122. +
  19123. +#ifdef FM_CAPWAP_SUPPORT
  19124. + if ((p_PcdGroupsParam->numOfGrps == 1) &&
  19125. + (p_PcdGroupsParam->ccGrpParams[0].numOfDistinctionUnits == 0) &&
  19126. + (p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].nextEngine == e_FM_PCD_CC) &&
  19127. + p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].params.ccParams.h_CcNode &&
  19128. + IsCapwapApplSpecific(p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].params.ccParams.h_CcNode))
  19129. + {
  19130. + p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].h_Manip = FmPcdManipApplSpecificBuild();
  19131. + if (!p_PcdGroupsParam->ccGrpParams[0].nextEnginePerEntriesInGrp[0].h_Manip)
  19132. + {
  19133. + DeleteTree(p_FmPcdCcTree,p_FmPcd);
  19134. + XX_Free(p_Params);
  19135. + REPORT_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  19136. + return NULL;
  19137. + }
  19138. + }
  19139. +#endif /* FM_CAPWAP_SUPPORT */
  19140. +
  19141. + numOfEntries = 0;
  19142. + p_FmPcdCcTree->netEnvId = FmPcdGetNetEnvId(p_PcdGroupsParam->h_NetEnv);
  19143. +
  19144. + for (i = 0; i < p_PcdGroupsParam->numOfGrps; i++)
  19145. + {
  19146. + p_FmPcdCcGroupParams = &p_PcdGroupsParam->ccGrpParams[i];
  19147. +
  19148. + if (p_FmPcdCcGroupParams->numOfDistinctionUnits
  19149. + > FM_PCD_MAX_NUM_OF_CC_UNITS)
  19150. + {
  19151. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19152. + XX_Free(p_Params);
  19153. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  19154. + ("numOfDistinctionUnits (group %d) should not exceed %d", i, FM_PCD_MAX_NUM_OF_CC_UNITS));
  19155. + return NULL;
  19156. + }
  19157. +
  19158. + p_FmPcdCcTree->fmPcdGroupParam[i].baseGroupEntry = numOfEntries;
  19159. + p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup = (uint8_t)(0x01
  19160. + << p_FmPcdCcGroupParams->numOfDistinctionUnits);
  19161. + numOfEntries += p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup;
  19162. + if (numOfEntries > FM_PCD_MAX_NUM_OF_CC_GROUPS)
  19163. + {
  19164. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19165. + XX_Free(p_Params);
  19166. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("numOfEntries can not be larger than %d", FM_PCD_MAX_NUM_OF_CC_GROUPS));
  19167. + return NULL;
  19168. + }
  19169. +
  19170. + if (lastOne)
  19171. + {
  19172. + if (p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup > lastOne)
  19173. + {
  19174. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19175. + XX_Free(p_Params);
  19176. + REPORT_ERROR(MAJOR, E_CONFLICT, ("numOfEntries per group must be set in descending order"));
  19177. + return NULL;
  19178. + }
  19179. + }
  19180. +
  19181. + lastOne = p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup;
  19182. +
  19183. + netEnvParams.netEnvId = p_FmPcdCcTree->netEnvId;
  19184. + netEnvParams.numOfDistinctionUnits =
  19185. + p_FmPcdCcGroupParams->numOfDistinctionUnits;
  19186. +
  19187. + memcpy(netEnvParams.unitIds, &p_FmPcdCcGroupParams->unitIds,
  19188. + (sizeof(uint8_t)) * p_FmPcdCcGroupParams->numOfDistinctionUnits);
  19189. +
  19190. + err = PcdGetUnitsVector(p_FmPcd, &netEnvParams);
  19191. + if (err)
  19192. + {
  19193. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19194. + XX_Free(p_Params);
  19195. + REPORT_ERROR(MAJOR, err, NO_MSG);
  19196. + return NULL;
  19197. + }
  19198. +
  19199. + p_FmPcdCcTree->fmPcdGroupParam[i].totalBitsMask = netEnvParams.vector;
  19200. + for (j = 0; j < p_FmPcdCcTree->fmPcdGroupParam[i].numOfEntriesInGroup;
  19201. + j++)
  19202. + {
  19203. + err = ValidateNextEngineParams(
  19204. + h_FmPcd,
  19205. + &p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j],
  19206. + e_FM_PCD_CC_STATS_MODE_NONE);
  19207. + if (err)
  19208. + {
  19209. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19210. + XX_Free(p_Params);
  19211. + REPORT_ERROR(MAJOR, err, (NO_MSG));
  19212. + return NULL;
  19213. + }
  19214. +
  19215. + if (p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j].h_Manip)
  19216. + {
  19217. + err = FmPcdManipCheckParamsForCcNextEngine(
  19218. + &p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j],
  19219. + &requiredAction);
  19220. + if (err)
  19221. + {
  19222. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19223. + XX_Free(p_Params);
  19224. + REPORT_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  19225. + return NULL;
  19226. + }
  19227. + }
  19228. + p_KeyAndNextEngineParams = p_Params + k;
  19229. +
  19230. + memcpy(&p_KeyAndNextEngineParams->nextEngineParams,
  19231. + &p_FmPcdCcGroupParams->nextEnginePerEntriesInGrp[j],
  19232. + sizeof(t_FmPcdCcNextEngineParams));
  19233. +
  19234. + if ((p_KeyAndNextEngineParams->nextEngineParams.nextEngine
  19235. + == e_FM_PCD_CC)
  19236. + && p_KeyAndNextEngineParams->nextEngineParams.h_Manip)
  19237. + {
  19238. + err =
  19239. + AllocAndFillAdForContLookupManip(
  19240. + p_KeyAndNextEngineParams->nextEngineParams.params.ccParams.h_CcNode);
  19241. + if (err)
  19242. + {
  19243. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19244. + XX_Free(p_Params);
  19245. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC Tree"));
  19246. + return NULL;
  19247. + }
  19248. + }
  19249. +
  19250. + requiredAction |= UPDATE_CC_WITH_TREE;
  19251. + p_KeyAndNextEngineParams->requiredAction = requiredAction;
  19252. +
  19253. + k++;
  19254. + }
  19255. + }
  19256. +
  19257. + p_FmPcdCcTree->numOfEntries = (uint8_t)k;
  19258. + p_FmPcdCcTree->numOfGrps = p_PcdGroupsParam->numOfGrps;
  19259. +
  19260. + p_FmPcdCcTree->ccTreeBaseAddr =
  19261. + PTR_TO_UINT(FM_MURAM_AllocMem(FmPcdGetMuramHandle(h_FmPcd),
  19262. + (uint32_t)( FM_PCD_MAX_NUM_OF_CC_GROUPS * FM_PCD_CC_AD_ENTRY_SIZE),
  19263. + FM_PCD_CC_TREE_ADDR_ALIGN));
  19264. + if (!p_FmPcdCcTree->ccTreeBaseAddr)
  19265. + {
  19266. + DeleteTree(p_FmPcdCcTree, p_FmPcd);
  19267. + XX_Free(p_Params);
  19268. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CC Tree"));
  19269. + return NULL;
  19270. + }
  19271. + MemSet8(
  19272. + UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr), 0,
  19273. + (uint32_t)(FM_PCD_MAX_NUM_OF_CC_GROUPS * FM_PCD_CC_AD_ENTRY_SIZE));
  19274. +
  19275. + p_CcTreeTmp = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
  19276. +
  19277. + for (i = 0; i < numOfEntries; i++)
  19278. + {
  19279. + p_KeyAndNextEngineParams = p_Params + i;
  19280. +
  19281. + NextStepAd(p_CcTreeTmp, NULL,
  19282. + &p_KeyAndNextEngineParams->nextEngineParams, p_FmPcd);
  19283. +
  19284. + p_CcTreeTmp = PTR_MOVE(p_CcTreeTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  19285. +
  19286. + memcpy(&p_FmPcdCcTree->keyAndNextEngineParams[i],
  19287. + p_KeyAndNextEngineParams,
  19288. + sizeof(t_FmPcdCcKeyAndNextEngineParams));
  19289. +
  19290. + if (p_FmPcdCcTree->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  19291. + == e_FM_PCD_CC)
  19292. + {
  19293. + p_FmPcdCcNextNode =
  19294. + (t_FmPcdCcNode*)p_FmPcdCcTree->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
  19295. + p_CcInformation = FindNodeInfoInReleventLst(
  19296. + &p_FmPcdCcNextNode->ccTreeIdLst, (t_Handle)p_FmPcdCcTree,
  19297. + p_FmPcdCcNextNode->h_Spinlock);
  19298. +
  19299. + if (!p_CcInformation)
  19300. + {
  19301. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  19302. + ccNodeInfo.h_CcNode = (t_Handle)p_FmPcdCcTree;
  19303. + ccNodeInfo.index = 1;
  19304. + EnqueueNodeInfoToRelevantLst(&p_FmPcdCcNextNode->ccTreeIdLst,
  19305. + &ccNodeInfo,
  19306. + p_FmPcdCcNextNode->h_Spinlock);
  19307. + }
  19308. + else
  19309. + p_CcInformation->index++;
  19310. + }
  19311. + }
  19312. +
  19313. + FmPcdIncNetEnvOwners(h_FmPcd, p_FmPcdCcTree->netEnvId);
  19314. + p_CcTreeTmp = UINT_TO_PTR(p_FmPcdCcTree->ccTreeBaseAddr);
  19315. +
  19316. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19317. + {
  19318. + FM_PCD_CcRootDelete(p_FmPcdCcTree);
  19319. + XX_Free(p_Params);
  19320. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19321. + return NULL;
  19322. + }
  19323. +
  19324. + for (i = 0; i < numOfEntries; i++)
  19325. + {
  19326. + if (p_FmPcdCcTree->keyAndNextEngineParams[i].requiredAction)
  19327. + {
  19328. + err = SetRequiredAction(
  19329. + h_FmPcd,
  19330. + p_FmPcdCcTree->keyAndNextEngineParams[i].requiredAction,
  19331. + &p_FmPcdCcTree->keyAndNextEngineParams[i], p_CcTreeTmp, 1,
  19332. + p_FmPcdCcTree);
  19333. + if (err)
  19334. + {
  19335. + FmPcdLockUnlockAll(p_FmPcd);
  19336. + FM_PCD_CcRootDelete(p_FmPcdCcTree);
  19337. + XX_Free(p_Params);
  19338. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
  19339. + return NULL;
  19340. + }
  19341. + p_CcTreeTmp = PTR_MOVE(p_CcTreeTmp, FM_PCD_CC_AD_ENTRY_SIZE);
  19342. + }
  19343. + }
  19344. +
  19345. + FmPcdLockUnlockAll(p_FmPcd);
  19346. + p_FmPcdCcTree->p_Lock = FmPcdAcquireLock(p_FmPcd);
  19347. + if (!p_FmPcdCcTree->p_Lock)
  19348. + {
  19349. + FM_PCD_CcRootDelete(p_FmPcdCcTree);
  19350. + XX_Free(p_Params);
  19351. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM CC lock"));
  19352. + return NULL;
  19353. + }
  19354. +
  19355. + XX_Free(p_Params);
  19356. +
  19357. + return p_FmPcdCcTree;
  19358. +}
  19359. +
  19360. +t_Error FM_PCD_CcRootDelete(t_Handle h_CcTree)
  19361. +{
  19362. + t_FmPcd *p_FmPcd;
  19363. + t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_CcTree;
  19364. + int i = 0;
  19365. +
  19366. + SANITY_CHECK_RETURN_ERROR(p_CcTree, E_INVALID_STATE);
  19367. + p_FmPcd = (t_FmPcd *)p_CcTree->h_FmPcd;
  19368. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19369. +
  19370. + FmPcdDecNetEnvOwners(p_FmPcd, p_CcTree->netEnvId);
  19371. +
  19372. + if (p_CcTree->owners)
  19373. + RETURN_ERROR(
  19374. + MAJOR,
  19375. + E_INVALID_SELECTION,
  19376. + ("the tree with this ID can not be removed because this tree is occupied, first - unbind this tree"));
  19377. +
  19378. + /* Delete ip-reassembly schemes if exist */
  19379. + if (p_CcTree->h_IpReassemblyManip)
  19380. + {
  19381. + FmPcdManipDeleteIpReassmSchemes(p_CcTree->h_IpReassemblyManip);
  19382. + FmPcdManipUpdateOwner(p_CcTree->h_IpReassemblyManip, FALSE);
  19383. + }
  19384. +
  19385. + /* Delete capwap-reassembly schemes if exist */
  19386. + if (p_CcTree->h_CapwapReassemblyManip)
  19387. + {
  19388. + FmPcdManipDeleteCapwapReassmSchemes(p_CcTree->h_CapwapReassemblyManip);
  19389. + FmPcdManipUpdateOwner(p_CcTree->h_CapwapReassemblyManip, FALSE);
  19390. + }
  19391. +
  19392. + for (i = 0; i < p_CcTree->numOfEntries; i++)
  19393. + {
  19394. + if (p_CcTree->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  19395. + == e_FM_PCD_CC)
  19396. + UpdateNodeOwner(
  19397. + p_CcTree->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode,
  19398. + FALSE);
  19399. +
  19400. + if (p_CcTree->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
  19401. + FmPcdManipUpdateOwner(
  19402. + p_CcTree->keyAndNextEngineParams[i].nextEngineParams.h_Manip,
  19403. + FALSE);
  19404. +
  19405. +#ifdef FM_CAPWAP_SUPPORT
  19406. + if ((p_CcTree->numOfGrps == 1) &&
  19407. + (p_CcTree->fmPcdGroupParam[0].numOfEntriesInGroup == 1) &&
  19408. + (p_CcTree->keyAndNextEngineParams[0].nextEngineParams.nextEngine == e_FM_PCD_CC) &&
  19409. + p_CcTree->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode &&
  19410. + IsCapwapApplSpecific(p_CcTree->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode))
  19411. + {
  19412. + if (FM_PCD_ManipNodeDelete(p_CcTree->keyAndNextEngineParams[0].nextEngineParams.h_Manip) != E_OK)
  19413. + return E_INVALID_STATE;
  19414. + }
  19415. +#endif /* FM_CAPWAP_SUPPORT */
  19416. +
  19417. +#if (DPAA_VERSION >= 11)
  19418. + if ((p_CcTree->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  19419. + == e_FM_PCD_FR)
  19420. + && (p_CcTree->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic))
  19421. + FrmReplicGroupUpdateOwner(
  19422. + p_CcTree->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic,
  19423. + FALSE);
  19424. +#endif /* (DPAA_VERSION >= 11) */
  19425. + }
  19426. +
  19427. + if (p_CcTree->p_Lock)
  19428. + FmPcdReleaseLock(p_CcTree->h_FmPcd, p_CcTree->p_Lock);
  19429. +
  19430. + DeleteTree(p_CcTree, p_FmPcd);
  19431. +
  19432. + return E_OK;
  19433. +}
  19434. +
  19435. +t_Error FM_PCD_CcRootModifyNextEngine(
  19436. + t_Handle h_CcTree, uint8_t grpId, uint8_t index,
  19437. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  19438. +{
  19439. + t_FmPcd *p_FmPcd;
  19440. + t_FmPcdCcTree *p_CcTree = (t_FmPcdCcTree *)h_CcTree;
  19441. + t_Error err = E_OK;
  19442. +
  19443. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  19444. + SANITY_CHECK_RETURN_ERROR(p_CcTree, E_INVALID_STATE);
  19445. + p_FmPcd = (t_FmPcd *)p_CcTree->h_FmPcd;
  19446. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19447. +
  19448. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19449. + {
  19450. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19451. + return ERROR_CODE(E_BUSY);
  19452. + }
  19453. +
  19454. + err = FmPcdCcModifyNextEngineParamTree(p_FmPcd, p_CcTree, grpId, index,
  19455. + p_FmPcdCcNextEngineParams);
  19456. + FmPcdLockUnlockAll(p_FmPcd);
  19457. +
  19458. + if (err)
  19459. + {
  19460. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19461. + }
  19462. +
  19463. + return E_OK;
  19464. +}
  19465. +
  19466. +t_Handle FM_PCD_MatchTableSet(t_Handle h_FmPcd,
  19467. + t_FmPcdCcNodeParams *p_CcNodeParam)
  19468. +{
  19469. + t_FmPcdCcNode *p_CcNode;
  19470. + t_Error err;
  19471. +
  19472. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
  19473. + SANITY_CHECK_RETURN_VALUE(p_CcNodeParam, E_NULL_POINTER, NULL);
  19474. +
  19475. + p_CcNode = (t_FmPcdCcNode*)XX_Malloc(sizeof(t_FmPcdCcNode));
  19476. + if (!p_CcNode)
  19477. + {
  19478. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
  19479. + return NULL;
  19480. + }
  19481. + memset(p_CcNode, 0, sizeof(t_FmPcdCcNode));
  19482. +
  19483. + err = MatchTableSet(h_FmPcd, p_CcNode, p_CcNodeParam);
  19484. +
  19485. + switch(GET_ERROR_TYPE(err)
  19486. +) {
  19487. + case E_OK:
  19488. + break;
  19489. +
  19490. + case E_BUSY:
  19491. + DBG(TRACE, ("E_BUSY error"));
  19492. + return NULL;
  19493. +
  19494. + default:
  19495. + REPORT_ERROR(MAJOR, err, NO_MSG);
  19496. + return NULL;
  19497. + }
  19498. +
  19499. + return p_CcNode;
  19500. +}
  19501. +
  19502. +t_Error FM_PCD_MatchTableDelete(t_Handle h_CcNode)
  19503. +{
  19504. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19505. + int i = 0;
  19506. +
  19507. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19508. + SANITY_CHECK_RETURN_ERROR(p_CcNode->h_FmPcd, E_INVALID_HANDLE);
  19509. +
  19510. + if (p_CcNode->owners)
  19511. + RETURN_ERROR(
  19512. + MAJOR,
  19513. + E_INVALID_STATE,
  19514. + ("This node cannot be removed because it is occupied; first unbind this node"));
  19515. +
  19516. + for (i = 0; i < p_CcNode->numOfKeys; i++)
  19517. + if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  19518. + == e_FM_PCD_CC)
  19519. + UpdateNodeOwner(
  19520. + p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode,
  19521. + FALSE);
  19522. +
  19523. + if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  19524. + == e_FM_PCD_CC)
  19525. + UpdateNodeOwner(
  19526. + p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode,
  19527. + FALSE);
  19528. +
  19529. + /* Handle also Miss entry */
  19530. + for (i = 0; i < p_CcNode->numOfKeys + 1; i++)
  19531. + {
  19532. + if (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip)
  19533. + FmPcdManipUpdateOwner(
  19534. + p_CcNode->keyAndNextEngineParams[i].nextEngineParams.h_Manip,
  19535. + FALSE);
  19536. +
  19537. +#if (DPAA_VERSION >= 11)
  19538. + if ((p_CcNode->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  19539. + == e_FM_PCD_FR)
  19540. + && (p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic))
  19541. + {
  19542. + FrmReplicGroupUpdateOwner(
  19543. + p_CcNode->keyAndNextEngineParams[i].nextEngineParams.params.frParams.h_FrmReplic,
  19544. + FALSE);
  19545. + }
  19546. +#endif /* (DPAA_VERSION >= 11) */
  19547. + }
  19548. +
  19549. + DeleteNode(p_CcNode);
  19550. +
  19551. + return E_OK;
  19552. +}
  19553. +
  19554. +t_Error FM_PCD_MatchTableAddKey(t_Handle h_CcNode, uint16_t keyIndex,
  19555. + uint8_t keySize,
  19556. + t_FmPcdCcKeyParams *p_KeyParams)
  19557. +{
  19558. + t_FmPcd *p_FmPcd;
  19559. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19560. + t_Error err = E_OK;
  19561. +
  19562. + SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
  19563. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19564. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19565. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19566. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19567. +
  19568. + if (keyIndex == FM_PCD_LAST_KEY_INDEX)
  19569. + keyIndex = p_CcNode->numOfKeys;
  19570. +
  19571. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19572. + {
  19573. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19574. + return ERROR_CODE(E_BUSY);
  19575. + }
  19576. +
  19577. + err = FmPcdCcAddKey(p_FmPcd, p_CcNode, keyIndex, keySize, p_KeyParams);
  19578. +
  19579. + FmPcdLockUnlockAll(p_FmPcd);
  19580. +
  19581. + switch(GET_ERROR_TYPE(err)
  19582. +) {
  19583. + case E_OK:
  19584. + return E_OK;
  19585. +
  19586. + case E_BUSY:
  19587. + DBG(TRACE, ("E_BUSY error"));
  19588. + return ERROR_CODE(E_BUSY);
  19589. +
  19590. + default:
  19591. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19592. + }
  19593. +}
  19594. +
  19595. +t_Error FM_PCD_MatchTableRemoveKey(t_Handle h_CcNode, uint16_t keyIndex)
  19596. +{
  19597. + t_FmPcd *p_FmPcd;
  19598. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19599. + t_Error err = E_OK;
  19600. +
  19601. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19602. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19603. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19604. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19605. +
  19606. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19607. + {
  19608. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19609. + return ERROR_CODE(E_BUSY);
  19610. + }
  19611. +
  19612. + err = FmPcdCcRemoveKey(p_FmPcd, p_CcNode, keyIndex);
  19613. +
  19614. + FmPcdLockUnlockAll(p_FmPcd);
  19615. +
  19616. + switch(GET_ERROR_TYPE(err)
  19617. +) {
  19618. + case E_OK:
  19619. + return E_OK;
  19620. +
  19621. + case E_BUSY:
  19622. + DBG(TRACE, ("E_BUSY error"));
  19623. + return ERROR_CODE(E_BUSY);
  19624. +
  19625. + default:
  19626. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19627. + }
  19628. +
  19629. + return E_OK;
  19630. +}
  19631. +
  19632. +t_Error FM_PCD_MatchTableModifyKey(t_Handle h_CcNode, uint16_t keyIndex,
  19633. + uint8_t keySize, uint8_t *p_Key,
  19634. + uint8_t *p_Mask)
  19635. +{
  19636. + t_FmPcd *p_FmPcd;
  19637. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19638. + t_Error err = E_OK;
  19639. +
  19640. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19641. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  19642. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19643. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19644. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19645. +
  19646. +
  19647. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19648. + {
  19649. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19650. + return ERROR_CODE(E_BUSY);
  19651. + }
  19652. +
  19653. + err = FmPcdCcModifyKey(p_FmPcd, p_CcNode, keyIndex, keySize, p_Key, p_Mask);
  19654. +
  19655. + FmPcdLockUnlockAll(p_FmPcd);
  19656. +
  19657. + switch(GET_ERROR_TYPE(err)
  19658. +) {
  19659. + case E_OK:
  19660. + return E_OK;
  19661. +
  19662. + case E_BUSY:
  19663. + DBG(TRACE, ("E_BUSY error"));
  19664. + return ERROR_CODE(E_BUSY);
  19665. +
  19666. + default:
  19667. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19668. + }
  19669. +}
  19670. +
  19671. +t_Error FM_PCD_MatchTableModifyNextEngine(
  19672. + t_Handle h_CcNode, uint16_t keyIndex,
  19673. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  19674. +{
  19675. + t_FmPcd *p_FmPcd;
  19676. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19677. + t_Error err = E_OK;
  19678. +
  19679. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  19680. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19681. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19682. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19683. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19684. +
  19685. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19686. + {
  19687. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19688. + return ERROR_CODE(E_BUSY);
  19689. + }
  19690. +
  19691. + err = ModifyNextEngineParamNode(p_FmPcd, p_CcNode, keyIndex,
  19692. + p_FmPcdCcNextEngineParams);
  19693. +
  19694. + FmPcdLockUnlockAll(p_FmPcd);
  19695. +
  19696. + switch(GET_ERROR_TYPE(err)
  19697. +) {
  19698. + case E_OK:
  19699. + return E_OK;
  19700. +
  19701. + case E_BUSY:
  19702. + DBG(TRACE, ("E_BUSY error"));
  19703. + return ERROR_CODE(E_BUSY);
  19704. +
  19705. + default:
  19706. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19707. + }
  19708. +}
  19709. +
  19710. +t_Error FM_PCD_MatchTableModifyMissNextEngine(
  19711. + t_Handle h_CcNode, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  19712. +{
  19713. + t_FmPcd *p_FmPcd;
  19714. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19715. + t_Error err = E_OK;
  19716. +
  19717. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  19718. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19719. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19720. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19721. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19722. +
  19723. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19724. + {
  19725. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19726. + return ERROR_CODE(E_BUSY);
  19727. + }
  19728. +
  19729. + err = FmPcdCcModifyMissNextEngineParamNode(p_FmPcd, p_CcNode,
  19730. + p_FmPcdCcNextEngineParams);
  19731. +
  19732. + FmPcdLockUnlockAll(p_FmPcd);
  19733. +
  19734. + switch(GET_ERROR_TYPE(err)
  19735. +) {
  19736. + case E_OK:
  19737. + return E_OK;
  19738. +
  19739. + case E_BUSY:
  19740. + DBG(TRACE, ("E_BUSY error"));
  19741. + return ERROR_CODE(E_BUSY);
  19742. +
  19743. + default:
  19744. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19745. + }
  19746. +}
  19747. +
  19748. +t_Error FM_PCD_MatchTableModifyKeyAndNextEngine(t_Handle h_CcNode,
  19749. + uint16_t keyIndex,
  19750. + uint8_t keySize,
  19751. + t_FmPcdCcKeyParams *p_KeyParams)
  19752. +{
  19753. + t_FmPcd *p_FmPcd;
  19754. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19755. + t_Error err = E_OK;
  19756. +
  19757. + SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
  19758. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19759. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19760. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19761. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19762. +
  19763. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19764. + {
  19765. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19766. + return ERROR_CODE(E_BUSY);
  19767. + }
  19768. +
  19769. + err = FmPcdCcModifyKeyAndNextEngine(p_FmPcd, p_CcNode, keyIndex, keySize,
  19770. + p_KeyParams);
  19771. +
  19772. + FmPcdLockUnlockAll(p_FmPcd);
  19773. +
  19774. + switch(GET_ERROR_TYPE(err)
  19775. +) {
  19776. + case E_OK:
  19777. + return E_OK;
  19778. +
  19779. + case E_BUSY:
  19780. + DBG(TRACE, ("E_BUSY error"));
  19781. + return ERROR_CODE(E_BUSY);
  19782. +
  19783. + default:
  19784. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19785. + }
  19786. +}
  19787. +
  19788. +t_Error FM_PCD_MatchTableFindNRemoveKey(t_Handle h_CcNode, uint8_t keySize,
  19789. + uint8_t *p_Key, uint8_t *p_Mask)
  19790. +{
  19791. + t_FmPcd *p_FmPcd;
  19792. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19793. + uint16_t keyIndex;
  19794. + t_Error err;
  19795. +
  19796. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  19797. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19798. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19799. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19800. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19801. +
  19802. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19803. + {
  19804. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19805. + return ERROR_CODE(E_BUSY);
  19806. + }
  19807. +
  19808. + err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
  19809. + if (GET_ERROR_TYPE(err) != E_OK)
  19810. + {
  19811. + FmPcdLockUnlockAll(p_FmPcd);
  19812. + RETURN_ERROR(
  19813. + MAJOR,
  19814. + err,
  19815. + ("The received key and mask pair was not found in the match table of the provided node"));
  19816. + }
  19817. +
  19818. + err = FmPcdCcRemoveKey(p_FmPcd, p_CcNode, keyIndex);
  19819. +
  19820. + FmPcdLockUnlockAll(p_FmPcd);
  19821. +
  19822. + switch(GET_ERROR_TYPE(err)
  19823. +) {
  19824. + case E_OK:
  19825. + return E_OK;
  19826. +
  19827. + case E_BUSY:
  19828. + DBG(TRACE, ("E_BUSY error"));
  19829. + return ERROR_CODE(E_BUSY);
  19830. +
  19831. + default:
  19832. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19833. + }
  19834. +}
  19835. +
  19836. +t_Error FM_PCD_MatchTableFindNModifyNextEngine(
  19837. + t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask,
  19838. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  19839. +{
  19840. + t_FmPcd *p_FmPcd;
  19841. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19842. + uint16_t keyIndex;
  19843. + t_Error err;
  19844. +
  19845. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  19846. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  19847. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19848. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19849. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19850. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19851. +
  19852. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19853. + {
  19854. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19855. + return ERROR_CODE(E_BUSY);
  19856. + }
  19857. +
  19858. + err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
  19859. + if (GET_ERROR_TYPE(err) != E_OK)
  19860. + {
  19861. + FmPcdLockUnlockAll(p_FmPcd);
  19862. + RETURN_ERROR(
  19863. + MAJOR,
  19864. + err,
  19865. + ("The received key and mask pair was not found in the match table of the provided node"));
  19866. + }
  19867. +
  19868. + err = ModifyNextEngineParamNode(p_FmPcd, p_CcNode, keyIndex,
  19869. + p_FmPcdCcNextEngineParams);
  19870. +
  19871. + FmPcdLockUnlockAll(p_FmPcd);
  19872. +
  19873. + switch(GET_ERROR_TYPE(err)
  19874. +) {
  19875. + case E_OK:
  19876. + return E_OK;
  19877. +
  19878. + case E_BUSY:
  19879. + DBG(TRACE, ("E_BUSY error"));
  19880. + return ERROR_CODE(E_BUSY);
  19881. +
  19882. + default:
  19883. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19884. + }
  19885. +}
  19886. +
  19887. +t_Error FM_PCD_MatchTableFindNModifyKeyAndNextEngine(
  19888. + t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask,
  19889. + t_FmPcdCcKeyParams *p_KeyParams)
  19890. +{
  19891. + t_FmPcd *p_FmPcd;
  19892. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19893. + uint16_t keyIndex;
  19894. + t_Error err;
  19895. +
  19896. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  19897. + SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
  19898. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19899. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19900. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19901. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19902. +
  19903. + if (!FmPcdLockTryLockAll(p_FmPcd))
  19904. + {
  19905. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  19906. + return ERROR_CODE(E_BUSY);
  19907. + }
  19908. +
  19909. + err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
  19910. + if (GET_ERROR_TYPE(err) != E_OK)
  19911. + {
  19912. + FmPcdLockUnlockAll(p_FmPcd);
  19913. + RETURN_ERROR(
  19914. + MAJOR,
  19915. + err,
  19916. + ("The received key and mask pair was not found in the match table of the provided node"));
  19917. + }
  19918. +
  19919. + err = FmPcdCcModifyKeyAndNextEngine(p_FmPcd, h_CcNode, keyIndex, keySize,
  19920. + p_KeyParams);
  19921. +
  19922. + FmPcdLockUnlockAll(p_FmPcd);
  19923. +
  19924. + switch(GET_ERROR_TYPE(err)
  19925. +) {
  19926. + case E_OK:
  19927. + return E_OK;
  19928. +
  19929. + case E_BUSY:
  19930. + DBG(TRACE, ("E_BUSY error"));
  19931. + return ERROR_CODE(E_BUSY);
  19932. +
  19933. + default:
  19934. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19935. + }
  19936. +}
  19937. +
  19938. +t_Error FM_PCD_MatchTableFindNModifyKey(t_Handle h_CcNode, uint8_t keySize,
  19939. + uint8_t *p_Key, uint8_t *p_Mask,
  19940. + uint8_t *p_NewKey, uint8_t *p_NewMask)
  19941. +{
  19942. + t_FmPcd *p_FmPcd;
  19943. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19944. + t_List h_List;
  19945. + uint16_t keyIndex;
  19946. + t_Error err;
  19947. +
  19948. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  19949. + SANITY_CHECK_RETURN_ERROR(p_NewKey, E_NULL_POINTER);
  19950. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19951. + p_FmPcd = (t_FmPcd *)p_CcNode->h_FmPcd;
  19952. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  19953. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  19954. +
  19955. + INIT_LIST(&h_List);
  19956. +
  19957. + err = FmPcdCcNodeTreeTryLock(p_FmPcd, p_CcNode, &h_List);
  19958. + if (err)
  19959. + {
  19960. + DBG(TRACE, ("Node's trees lock failed"));
  19961. + return ERROR_CODE(E_BUSY);
  19962. + }
  19963. +
  19964. + err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
  19965. + if (GET_ERROR_TYPE(err) != E_OK)
  19966. + {
  19967. + FmPcdCcNodeTreeReleaseLock(p_FmPcd, &h_List);
  19968. + RETURN_ERROR(MAJOR, err,
  19969. + ("The received key and mask pair was not found in the "
  19970. + "match table of the provided node"));
  19971. + }
  19972. +
  19973. + err = FmPcdCcModifyKey(p_FmPcd, p_CcNode, keyIndex, keySize, p_NewKey,
  19974. + p_NewMask);
  19975. +
  19976. + FmPcdCcNodeTreeReleaseLock(p_FmPcd, &h_List);
  19977. +
  19978. + switch(GET_ERROR_TYPE(err)
  19979. +) {
  19980. + case E_OK:
  19981. + return E_OK;
  19982. +
  19983. + case E_BUSY:
  19984. + DBG(TRACE, ("E_BUSY error"));
  19985. + return ERROR_CODE(E_BUSY);
  19986. +
  19987. + default:
  19988. + RETURN_ERROR(MAJOR, err, NO_MSG);
  19989. + }
  19990. +}
  19991. +
  19992. +t_Error FM_PCD_MatchTableGetNextEngine(
  19993. + t_Handle h_CcNode, uint16_t keyIndex,
  19994. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  19995. +{
  19996. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  19997. +
  19998. + SANITY_CHECK_RETURN_ERROR(p_CcNode, E_INVALID_HANDLE);
  19999. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  20000. +
  20001. + if (keyIndex >= p_CcNode->numOfKeys)
  20002. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  20003. + ("keyIndex exceeds current number of keys"));
  20004. +
  20005. + if (keyIndex > (FM_PCD_MAX_NUM_OF_KEYS - 1))
  20006. + RETURN_ERROR(
  20007. + MAJOR,
  20008. + E_INVALID_VALUE,
  20009. + ("keyIndex can not be larger than %d", (FM_PCD_MAX_NUM_OF_KEYS - 1)));
  20010. +
  20011. + memcpy(p_FmPcdCcNextEngineParams,
  20012. + &p_CcNode->keyAndNextEngineParams[keyIndex].nextEngineParams,
  20013. + sizeof(t_FmPcdCcNextEngineParams));
  20014. +
  20015. + return E_OK;
  20016. +}
  20017. +
  20018. +
  20019. +uint32_t FM_PCD_MatchTableGetKeyCounter(t_Handle h_CcNode, uint16_t keyIndex)
  20020. +{
  20021. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  20022. + uint32_t *p_StatsCounters, frameCount;
  20023. + uint32_t intFlags;
  20024. +
  20025. + SANITY_CHECK_RETURN_VALUE(p_CcNode, E_INVALID_HANDLE, 0);
  20026. +
  20027. + if (p_CcNode->statisticsMode == e_FM_PCD_CC_STATS_MODE_NONE)
  20028. + {
  20029. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Statistics were not enabled for this match table"));
  20030. + return 0;
  20031. + }
  20032. +
  20033. + if ((p_CcNode->statisticsMode != e_FM_PCD_CC_STATS_MODE_FRAME)
  20034. + && (p_CcNode->statisticsMode
  20035. + != e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME))
  20036. + {
  20037. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Frame count is not supported in the statistics mode of this match table"));
  20038. + return 0;
  20039. + }
  20040. +
  20041. + intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
  20042. +
  20043. + if (keyIndex >= p_CcNode->numOfKeys)
  20044. + {
  20045. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  20046. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("The provided keyIndex exceeds the number of keys in this match table"));
  20047. + return 0;
  20048. + }
  20049. +
  20050. + if (!p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj)
  20051. + {
  20052. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  20053. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Statistics were not enabled for this key"));
  20054. + return 0;
  20055. + }
  20056. +
  20057. + p_StatsCounters =
  20058. + p_CcNode->keyAndNextEngineParams[keyIndex].p_StatsObj->h_StatsCounters;
  20059. + ASSERT_COND(p_StatsCounters);
  20060. +
  20061. + /* The first counter is byte counter, so we need to advance to the next counter */
  20062. + frameCount = GET_UINT32(*(uint32_t *)(PTR_MOVE(p_StatsCounters,
  20063. + FM_PCD_CC_STATS_COUNTER_SIZE)));
  20064. +
  20065. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  20066. +
  20067. + return frameCount;
  20068. +}
  20069. +
  20070. +t_Error FM_PCD_MatchTableGetKeyStatistics(
  20071. + t_Handle h_CcNode, uint16_t keyIndex,
  20072. + t_FmPcdCcKeyStatistics *p_KeyStatistics)
  20073. +{
  20074. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  20075. + uint32_t intFlags;
  20076. + t_Error err;
  20077. +
  20078. + SANITY_CHECK_RETURN_ERROR(h_CcNode, E_INVALID_HANDLE);
  20079. + SANITY_CHECK_RETURN_ERROR(p_KeyStatistics, E_NULL_POINTER);
  20080. +
  20081. + intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
  20082. +
  20083. + if (keyIndex >= p_CcNode->numOfKeys)
  20084. + RETURN_ERROR(
  20085. + MAJOR,
  20086. + E_INVALID_STATE,
  20087. + ("The provided keyIndex exceeds the number of keys in this match table"));
  20088. +
  20089. + err = MatchTableGetKeyStatistics(p_CcNode, keyIndex, p_KeyStatistics);
  20090. +
  20091. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  20092. +
  20093. + if (err != E_OK)
  20094. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20095. +
  20096. + return E_OK;
  20097. +}
  20098. +
  20099. +t_Error FM_PCD_MatchTableGetMissStatistics(
  20100. + t_Handle h_CcNode, t_FmPcdCcKeyStatistics *p_MissStatistics)
  20101. +{
  20102. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  20103. + uint32_t intFlags;
  20104. + t_Error err;
  20105. +
  20106. + SANITY_CHECK_RETURN_ERROR(h_CcNode, E_INVALID_HANDLE);
  20107. + SANITY_CHECK_RETURN_ERROR(p_MissStatistics, E_NULL_POINTER);
  20108. +
  20109. + intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
  20110. +
  20111. + err = MatchTableGetKeyStatistics(p_CcNode, p_CcNode->numOfKeys,
  20112. + p_MissStatistics);
  20113. +
  20114. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  20115. +
  20116. + if (err != E_OK)
  20117. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20118. +
  20119. + return E_OK;
  20120. +}
  20121. +
  20122. +t_Error FM_PCD_MatchTableFindNGetKeyStatistics(
  20123. + t_Handle h_CcNode, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask,
  20124. + t_FmPcdCcKeyStatistics *p_KeyStatistics)
  20125. +{
  20126. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  20127. + uint16_t keyIndex;
  20128. + uint32_t intFlags;
  20129. + t_Error err;
  20130. +
  20131. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  20132. + SANITY_CHECK_RETURN_ERROR(p_KeyStatistics, E_NULL_POINTER);
  20133. +
  20134. + intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock);
  20135. +
  20136. + err = FindKeyIndex(p_CcNode, keySize, p_Key, p_Mask, &keyIndex);
  20137. + if (GET_ERROR_TYPE(err) != E_OK)
  20138. + {
  20139. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  20140. + RETURN_ERROR(MAJOR, err,
  20141. + ("The received key and mask pair was not found in the "
  20142. + "match table of the provided node"));
  20143. + }
  20144. +
  20145. + ASSERT_COND(keyIndex < p_CcNode->numOfKeys);
  20146. +
  20147. + err = MatchTableGetKeyStatistics(p_CcNode, keyIndex, p_KeyStatistics);
  20148. +
  20149. + XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags);
  20150. +
  20151. + if (err != E_OK)
  20152. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20153. +
  20154. + return E_OK;
  20155. +}
  20156. +
  20157. +t_Error FM_PCD_MatchTableGetIndexedHashBucket(t_Handle h_CcNode,
  20158. + uint8_t keySize, uint8_t *p_Key,
  20159. + uint8_t hashShift,
  20160. + t_Handle *p_CcNodeBucketHandle,
  20161. + uint8_t *p_BucketIndex,
  20162. + uint16_t *p_LastIndex)
  20163. +{
  20164. + t_FmPcdCcNode *p_CcNode = (t_FmPcdCcNode *)h_CcNode;
  20165. + uint16_t glblMask;
  20166. + uint64_t crc64 = 0;
  20167. +
  20168. + SANITY_CHECK_RETURN_ERROR(h_CcNode, E_INVALID_HANDLE);
  20169. + SANITY_CHECK_RETURN_ERROR(
  20170. + p_CcNode->parseCode == CC_PC_GENERIC_IC_HASH_INDEXED,
  20171. + E_INVALID_STATE);
  20172. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  20173. + SANITY_CHECK_RETURN_ERROR(p_CcNodeBucketHandle, E_NULL_POINTER);
  20174. +
  20175. + memcpy(&glblMask, PTR_MOVE(p_CcNode->p_GlblMask, 2), 2);
  20176. + be16_to_cpus(&glblMask);
  20177. +
  20178. + crc64 = crc64_init();
  20179. + crc64 = crc64_compute(p_Key, keySize, crc64);
  20180. + crc64 >>= hashShift;
  20181. +
  20182. + *p_BucketIndex = (uint8_t)(((crc64 >> (8 * (6 - p_CcNode->userOffset)))
  20183. + & glblMask) >> 4);
  20184. + if (*p_BucketIndex >= p_CcNode->numOfKeys)
  20185. + RETURN_ERROR(MINOR, E_NOT_IN_RANGE, ("bucket index!"));
  20186. +
  20187. + *p_CcNodeBucketHandle =
  20188. + p_CcNode->keyAndNextEngineParams[*p_BucketIndex].nextEngineParams.params.ccParams.h_CcNode;
  20189. + if (!*p_CcNodeBucketHandle)
  20190. + RETURN_ERROR(MINOR, E_NOT_FOUND, ("bucket!"));
  20191. +
  20192. + *p_LastIndex = ((t_FmPcdCcNode *)*p_CcNodeBucketHandle)->numOfKeys;
  20193. +
  20194. + return E_OK;
  20195. +}
  20196. +
  20197. +t_Handle FM_PCD_HashTableSet(t_Handle h_FmPcd, t_FmPcdHashTableParams *p_Param)
  20198. +{
  20199. + t_FmPcdCcNode *p_CcNodeHashTbl;
  20200. + t_FmPcdCcNodeParams *p_IndxHashCcNodeParam, *p_ExactMatchCcNodeParam;
  20201. + t_FmPcdCcNode *p_CcNode;
  20202. + t_Handle h_MissStatsCounters = NULL;
  20203. + t_FmPcdCcKeyParams *p_HashKeyParams;
  20204. + int i;
  20205. + uint16_t numOfSets, numOfWays, countMask, onesCount = 0;
  20206. + bool statsEnForMiss = FALSE;
  20207. + t_Error err;
  20208. +
  20209. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
  20210. + SANITY_CHECK_RETURN_VALUE(p_Param, E_NULL_POINTER, NULL);
  20211. +
  20212. + if (p_Param->maxNumOfKeys == 0)
  20213. + {
  20214. + REPORT_ERROR(MINOR, E_INVALID_VALUE, ("Max number of keys must be higher then 0"));
  20215. + return NULL;
  20216. + }
  20217. +
  20218. + if (p_Param->hashResMask == 0)
  20219. + {
  20220. + REPORT_ERROR(MINOR, E_INVALID_VALUE, ("Hash result mask must differ from 0"));
  20221. + return NULL;
  20222. + }
  20223. +
  20224. +#if (DPAA_VERSION >= 11)
  20225. + if (p_Param->statisticsMode == e_FM_PCD_CC_STATS_MODE_RMON)
  20226. + {
  20227. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  20228. + ("RMON statistics mode is not supported for hash table"));
  20229. + return NULL;
  20230. + }
  20231. +#endif /* (DPAA_VERSION >= 11) */
  20232. +
  20233. + p_ExactMatchCcNodeParam = (t_FmPcdCcNodeParams*)XX_Malloc(
  20234. + sizeof(t_FmPcdCcNodeParams));
  20235. + if (!p_ExactMatchCcNodeParam)
  20236. + {
  20237. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_ExactMatchCcNodeParam"));
  20238. + return NULL;
  20239. + }
  20240. + memset(p_ExactMatchCcNodeParam, 0, sizeof(t_FmPcdCcNodeParams));
  20241. +
  20242. + p_IndxHashCcNodeParam = (t_FmPcdCcNodeParams*)XX_Malloc(
  20243. + sizeof(t_FmPcdCcNodeParams));
  20244. + if (!p_IndxHashCcNodeParam)
  20245. + {
  20246. + XX_Free(p_ExactMatchCcNodeParam);
  20247. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_IndxHashCcNodeParam"));
  20248. + return NULL;
  20249. + }
  20250. + memset(p_IndxHashCcNodeParam, 0, sizeof(t_FmPcdCcNodeParams));
  20251. +
  20252. + /* Calculate number of sets and number of ways of the hash table */
  20253. + countMask = (uint16_t)(p_Param->hashResMask >> 4);
  20254. + while (countMask)
  20255. + {
  20256. + onesCount++;
  20257. + countMask = (uint16_t)(countMask >> 1);
  20258. + }
  20259. +
  20260. + numOfSets = (uint16_t)(1 << onesCount);
  20261. + numOfWays = (uint16_t)DIV_CEIL(p_Param->maxNumOfKeys, numOfSets);
  20262. +
  20263. + if (p_Param->maxNumOfKeys % numOfSets)
  20264. + DBG(INFO, ("'maxNumOfKeys' is not a multiple of hash number of ways, so number of ways will be rounded up"));
  20265. +
  20266. + if ((p_Param->statisticsMode == e_FM_PCD_CC_STATS_MODE_FRAME)
  20267. + || (p_Param->statisticsMode == e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME))
  20268. + {
  20269. + /* Allocating a statistics counters table that will be used by all
  20270. + 'miss' entries of the hash table */
  20271. + h_MissStatsCounters = (t_Handle)FM_MURAM_AllocMem(
  20272. + FmPcdGetMuramHandle(h_FmPcd), 2 * FM_PCD_CC_STATS_COUNTER_SIZE,
  20273. + FM_PCD_CC_AD_TABLE_ALIGN);
  20274. + if (!h_MissStatsCounters)
  20275. + {
  20276. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for statistics table for hash miss"));
  20277. + XX_Free(p_IndxHashCcNodeParam);
  20278. + XX_Free(p_ExactMatchCcNodeParam);
  20279. + return NULL;
  20280. + }
  20281. + memset(h_MissStatsCounters, 0, (2 * FM_PCD_CC_STATS_COUNTER_SIZE));
  20282. +
  20283. + /* Always enable statistics for 'miss', so that a statistics AD will be
  20284. + initialized from the start. We'll store the requested 'statistics enable'
  20285. + value and it will be used when statistics are read by the user. */
  20286. + statsEnForMiss = p_Param->ccNextEngineParamsForMiss.statisticsEn;
  20287. + p_Param->ccNextEngineParamsForMiss.statisticsEn = TRUE;
  20288. + }
  20289. +
  20290. + /* Building exact-match node params, will be used to create the hash buckets */
  20291. + p_ExactMatchCcNodeParam->extractCcParams.type = e_FM_PCD_EXTRACT_NON_HDR;
  20292. +
  20293. + p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.src =
  20294. + e_FM_PCD_EXTRACT_FROM_KEY;
  20295. + p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.action =
  20296. + e_FM_PCD_ACTION_EXACT_MATCH;
  20297. + p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.offset = 0;
  20298. + p_ExactMatchCcNodeParam->extractCcParams.extractNonHdr.size =
  20299. + p_Param->matchKeySize;
  20300. +
  20301. + p_ExactMatchCcNodeParam->keysParams.maxNumOfKeys = numOfWays;
  20302. + p_ExactMatchCcNodeParam->keysParams.maskSupport = FALSE;
  20303. + p_ExactMatchCcNodeParam->keysParams.statisticsMode =
  20304. + p_Param->statisticsMode;
  20305. + p_ExactMatchCcNodeParam->keysParams.numOfKeys = 0;
  20306. + p_ExactMatchCcNodeParam->keysParams.keySize = p_Param->matchKeySize;
  20307. + p_ExactMatchCcNodeParam->keysParams.ccNextEngineParamsForMiss =
  20308. + p_Param->ccNextEngineParamsForMiss;
  20309. +
  20310. + p_HashKeyParams = p_IndxHashCcNodeParam->keysParams.keyParams;
  20311. +
  20312. + for (i = 0; i < numOfSets; i++)
  20313. + {
  20314. + /* Each exact-match node will be marked as a 'bucket' and provided with
  20315. + a pointer to statistics counters, to be used for 'miss' entry
  20316. + statistics */
  20317. + p_CcNode = (t_FmPcdCcNode *)XX_Malloc(sizeof(t_FmPcdCcNode));
  20318. + if (!p_CcNode)
  20319. + break;
  20320. + memset(p_CcNode, 0, sizeof(t_FmPcdCcNode));
  20321. +
  20322. + p_CcNode->isHashBucket = TRUE;
  20323. + p_CcNode->h_MissStatsCounters = h_MissStatsCounters;
  20324. +
  20325. + err = MatchTableSet(h_FmPcd, p_CcNode, p_ExactMatchCcNodeParam);
  20326. + if (err)
  20327. + break;
  20328. +
  20329. + p_HashKeyParams[i].ccNextEngineParams.nextEngine = e_FM_PCD_CC;
  20330. + p_HashKeyParams[i].ccNextEngineParams.statisticsEn = FALSE;
  20331. + p_HashKeyParams[i].ccNextEngineParams.params.ccParams.h_CcNode =
  20332. + p_CcNode;
  20333. + }
  20334. +
  20335. + if (i < numOfSets)
  20336. + {
  20337. + for (i = i - 1; i >= 0; i--)
  20338. + FM_PCD_MatchTableDelete(
  20339. + p_HashKeyParams[i].ccNextEngineParams.params.ccParams.h_CcNode);
  20340. +
  20341. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(h_FmPcd), h_MissStatsCounters);
  20342. +
  20343. + REPORT_ERROR(MAJOR, E_NULL_POINTER, NO_MSG);
  20344. + XX_Free(p_IndxHashCcNodeParam);
  20345. + XX_Free(p_ExactMatchCcNodeParam);
  20346. + return NULL;
  20347. + }
  20348. +
  20349. + /* Creating indexed-hash CC node */
  20350. + p_IndxHashCcNodeParam->extractCcParams.type = e_FM_PCD_EXTRACT_NON_HDR;
  20351. + p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.src =
  20352. + e_FM_PCD_EXTRACT_FROM_HASH;
  20353. + p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.action =
  20354. + e_FM_PCD_ACTION_INDEXED_LOOKUP;
  20355. + p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.icIndxMask =
  20356. + p_Param->hashResMask;
  20357. + p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.offset =
  20358. + p_Param->hashShift;
  20359. + p_IndxHashCcNodeParam->extractCcParams.extractNonHdr.size = 2;
  20360. +
  20361. + p_IndxHashCcNodeParam->keysParams.maxNumOfKeys = numOfSets;
  20362. + p_IndxHashCcNodeParam->keysParams.maskSupport = FALSE;
  20363. + p_IndxHashCcNodeParam->keysParams.statisticsMode =
  20364. + e_FM_PCD_CC_STATS_MODE_NONE;
  20365. + /* Number of keys of this node is number of sets of the hash */
  20366. + p_IndxHashCcNodeParam->keysParams.numOfKeys = numOfSets;
  20367. + p_IndxHashCcNodeParam->keysParams.keySize = 2;
  20368. +
  20369. + p_CcNodeHashTbl = FM_PCD_MatchTableSet(h_FmPcd, p_IndxHashCcNodeParam);
  20370. +
  20371. + if (p_CcNodeHashTbl)
  20372. + {
  20373. + p_CcNodeHashTbl->kgHashShift = p_Param->kgHashShift;
  20374. +
  20375. + /* Storing the allocated counters for buckets 'miss' in the hash table
  20376. + and if statistics for miss were enabled. */
  20377. + p_CcNodeHashTbl->h_MissStatsCounters = h_MissStatsCounters;
  20378. + p_CcNodeHashTbl->statsEnForMiss = statsEnForMiss;
  20379. + }
  20380. +
  20381. + XX_Free(p_IndxHashCcNodeParam);
  20382. + XX_Free(p_ExactMatchCcNodeParam);
  20383. +
  20384. + return p_CcNodeHashTbl;
  20385. +}
  20386. +
  20387. +t_Error FM_PCD_HashTableDelete(t_Handle h_HashTbl)
  20388. +{
  20389. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20390. + t_Handle h_FmPcd;
  20391. + t_Handle *p_HashBuckets, h_MissStatsCounters;
  20392. + uint16_t i, numOfBuckets;
  20393. + t_Error err;
  20394. +
  20395. + SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
  20396. +
  20397. + /* Store all hash buckets before the hash is freed */
  20398. + numOfBuckets = p_HashTbl->numOfKeys;
  20399. +
  20400. + p_HashBuckets = (t_Handle *)XX_Malloc(numOfBuckets * sizeof(t_Handle));
  20401. + if (!p_HashBuckets)
  20402. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  20403. +
  20404. + for (i = 0; i < numOfBuckets; i++)
  20405. + p_HashBuckets[i] =
  20406. + p_HashTbl->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
  20407. +
  20408. + h_FmPcd = p_HashTbl->h_FmPcd;
  20409. + h_MissStatsCounters = p_HashTbl->h_MissStatsCounters;
  20410. +
  20411. + /* Free the hash */
  20412. + err = FM_PCD_MatchTableDelete(p_HashTbl);
  20413. +
  20414. + /* Free each hash bucket */
  20415. + for (i = 0; i < numOfBuckets; i++)
  20416. + err |= FM_PCD_MatchTableDelete(p_HashBuckets[i]);
  20417. +
  20418. + XX_Free(p_HashBuckets);
  20419. +
  20420. + /* Free statistics counters for 'miss', if these were allocated */
  20421. + if (h_MissStatsCounters)
  20422. + FM_MURAM_FreeMem(FmPcdGetMuramHandle(h_FmPcd), h_MissStatsCounters);
  20423. +
  20424. + if (err)
  20425. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20426. +
  20427. + return E_OK;
  20428. +}
  20429. +
  20430. +t_Error FM_PCD_HashTableAddKey(t_Handle h_HashTbl, uint8_t keySize,
  20431. + t_FmPcdCcKeyParams *p_KeyParams)
  20432. +{
  20433. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20434. + t_Handle h_HashBucket;
  20435. + uint8_t bucketIndex;
  20436. + uint16_t lastIndex;
  20437. + t_Error err;
  20438. +
  20439. + SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
  20440. + SANITY_CHECK_RETURN_ERROR(p_KeyParams, E_NULL_POINTER);
  20441. + SANITY_CHECK_RETURN_ERROR(p_KeyParams->p_Key, E_NULL_POINTER);
  20442. +
  20443. + if (p_KeyParams->p_Mask)
  20444. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  20445. + ("Keys masks not supported for hash table"));
  20446. +
  20447. + err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize,
  20448. + p_KeyParams->p_Key,
  20449. + p_HashTbl->kgHashShift,
  20450. + &h_HashBucket, &bucketIndex,
  20451. + &lastIndex);
  20452. + if (err)
  20453. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20454. +
  20455. + return FM_PCD_MatchTableAddKey(h_HashBucket, FM_PCD_LAST_KEY_INDEX, keySize,
  20456. + p_KeyParams);
  20457. +}
  20458. +
  20459. +t_Error FM_PCD_HashTableRemoveKey(t_Handle h_HashTbl, uint8_t keySize,
  20460. + uint8_t *p_Key)
  20461. +{
  20462. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20463. + t_Handle h_HashBucket;
  20464. + uint8_t bucketIndex;
  20465. + uint16_t lastIndex;
  20466. + t_Error err;
  20467. +
  20468. + SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
  20469. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  20470. +
  20471. + err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize, p_Key,
  20472. + p_HashTbl->kgHashShift,
  20473. + &h_HashBucket, &bucketIndex,
  20474. + &lastIndex);
  20475. + if (err)
  20476. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20477. +
  20478. + return FM_PCD_MatchTableFindNRemoveKey(h_HashBucket, keySize, p_Key, NULL);
  20479. +}
  20480. +
  20481. +t_Error FM_PCD_HashTableModifyNextEngine(
  20482. + t_Handle h_HashTbl, uint8_t keySize, uint8_t *p_Key,
  20483. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  20484. +{
  20485. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20486. + t_Handle h_HashBucket;
  20487. + uint8_t bucketIndex;
  20488. + uint16_t lastIndex;
  20489. + t_Error err;
  20490. +
  20491. + SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
  20492. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  20493. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  20494. +
  20495. + err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize, p_Key,
  20496. + p_HashTbl->kgHashShift,
  20497. + &h_HashBucket, &bucketIndex,
  20498. + &lastIndex);
  20499. + if (err)
  20500. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20501. +
  20502. + return FM_PCD_MatchTableFindNModifyNextEngine(h_HashBucket, keySize, p_Key,
  20503. + NULL,
  20504. + p_FmPcdCcNextEngineParams);
  20505. +}
  20506. +
  20507. +t_Error FM_PCD_HashTableModifyMissNextEngine(
  20508. + t_Handle h_HashTbl,
  20509. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  20510. +{
  20511. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20512. + t_Handle h_HashBucket;
  20513. + uint8_t i;
  20514. + bool nullifyMissStats = FALSE;
  20515. + t_Error err;
  20516. +
  20517. + SANITY_CHECK_RETURN_ERROR(h_HashTbl, E_INVALID_HANDLE);
  20518. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  20519. +
  20520. + if ((!p_HashTbl->h_MissStatsCounters)
  20521. + && (p_FmPcdCcNextEngineParams->statisticsEn))
  20522. + RETURN_ERROR(
  20523. + MAJOR,
  20524. + E_CONFLICT,
  20525. + ("Statistics are requested for a key, but statistics mode was set"
  20526. + "to 'NONE' upon initialization"));
  20527. +
  20528. + if (p_HashTbl->h_MissStatsCounters)
  20529. + {
  20530. + if ((!p_HashTbl->statsEnForMiss)
  20531. + && (p_FmPcdCcNextEngineParams->statisticsEn))
  20532. + nullifyMissStats = TRUE;
  20533. +
  20534. + if ((p_HashTbl->statsEnForMiss)
  20535. + && (!p_FmPcdCcNextEngineParams->statisticsEn))
  20536. + {
  20537. + p_HashTbl->statsEnForMiss = FALSE;
  20538. + p_FmPcdCcNextEngineParams->statisticsEn = TRUE;
  20539. + }
  20540. + }
  20541. +
  20542. + for (i = 0; i < p_HashTbl->numOfKeys; i++)
  20543. + {
  20544. + h_HashBucket =
  20545. + p_HashTbl->keyAndNextEngineParams[i].nextEngineParams.params.ccParams.h_CcNode;
  20546. +
  20547. + err = FM_PCD_MatchTableModifyMissNextEngine(h_HashBucket,
  20548. + p_FmPcdCcNextEngineParams);
  20549. + if (err)
  20550. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20551. + }
  20552. +
  20553. + if (nullifyMissStats)
  20554. + {
  20555. + memset(p_HashTbl->h_MissStatsCounters, 0,
  20556. + (2 * FM_PCD_CC_STATS_COUNTER_SIZE));
  20557. + memset(p_HashTbl->h_MissStatsCounters, 0,
  20558. + (2 * FM_PCD_CC_STATS_COUNTER_SIZE));
  20559. + p_HashTbl->statsEnForMiss = TRUE;
  20560. + }
  20561. +
  20562. + return E_OK;
  20563. +}
  20564. +
  20565. +
  20566. +t_Error FM_PCD_HashTableGetMissNextEngine(
  20567. + t_Handle h_HashTbl,
  20568. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams)
  20569. +{
  20570. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20571. + t_FmPcdCcNode *p_HashBucket;
  20572. +
  20573. + SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
  20574. +
  20575. + /* Miss next engine of each bucket was initialized with the next engine of the hash table */
  20576. + p_HashBucket =
  20577. + p_HashTbl->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode;
  20578. +
  20579. + memcpy(p_FmPcdCcNextEngineParams,
  20580. + &p_HashBucket->keyAndNextEngineParams[p_HashBucket->numOfKeys].nextEngineParams,
  20581. + sizeof(t_FmPcdCcNextEngineParams));
  20582. +
  20583. + return E_OK;
  20584. +}
  20585. +
  20586. +t_Error FM_PCD_HashTableFindNGetKeyStatistics(
  20587. + t_Handle h_HashTbl, uint8_t keySize, uint8_t *p_Key,
  20588. + t_FmPcdCcKeyStatistics *p_KeyStatistics)
  20589. +{
  20590. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20591. + t_Handle h_HashBucket;
  20592. + uint8_t bucketIndex;
  20593. + uint16_t lastIndex;
  20594. + t_Error err;
  20595. +
  20596. + SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
  20597. + SANITY_CHECK_RETURN_ERROR(p_Key, E_NULL_POINTER);
  20598. + SANITY_CHECK_RETURN_ERROR(p_KeyStatistics, E_NULL_POINTER);
  20599. +
  20600. + err = FM_PCD_MatchTableGetIndexedHashBucket(p_HashTbl, keySize, p_Key,
  20601. + p_HashTbl->kgHashShift,
  20602. + &h_HashBucket, &bucketIndex,
  20603. + &lastIndex);
  20604. + if (err)
  20605. + RETURN_ERROR(MAJOR, err, NO_MSG);
  20606. +
  20607. + return FM_PCD_MatchTableFindNGetKeyStatistics(h_HashBucket, keySize, p_Key,
  20608. + NULL, p_KeyStatistics);
  20609. +}
  20610. +
  20611. +t_Error FM_PCD_HashTableGetMissStatistics(
  20612. + t_Handle h_HashTbl, t_FmPcdCcKeyStatistics *p_MissStatistics)
  20613. +{
  20614. + t_FmPcdCcNode *p_HashTbl = (t_FmPcdCcNode *)h_HashTbl;
  20615. + t_Handle h_HashBucket;
  20616. +
  20617. + SANITY_CHECK_RETURN_ERROR(p_HashTbl, E_INVALID_HANDLE);
  20618. + SANITY_CHECK_RETURN_ERROR(p_MissStatistics, E_NULL_POINTER);
  20619. +
  20620. + if (!p_HashTbl->statsEnForMiss)
  20621. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  20622. + ("Statistics were not enabled for miss"));
  20623. +
  20624. + h_HashBucket =
  20625. + p_HashTbl->keyAndNextEngineParams[0].nextEngineParams.params.ccParams.h_CcNode;
  20626. +
  20627. + return FM_PCD_MatchTableGetMissStatistics(h_HashBucket, p_MissStatistics);
  20628. +}
  20629. --- /dev/null
  20630. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.h
  20631. @@ -0,0 +1,399 @@
  20632. +/*
  20633. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  20634. + *
  20635. + * Redistribution and use in source and binary forms, with or without
  20636. + * modification, are permitted provided that the following conditions are met:
  20637. + * * Redistributions of source code must retain the above copyright
  20638. + * notice, this list of conditions and the following disclaimer.
  20639. + * * Redistributions in binary form must reproduce the above copyright
  20640. + * notice, this list of conditions and the following disclaimer in the
  20641. + * documentation and/or other materials provided with the distribution.
  20642. + * * Neither the name of Freescale Semiconductor nor the
  20643. + * names of its contributors may be used to endorse or promote products
  20644. + * derived from this software without specific prior written permission.
  20645. + *
  20646. + *
  20647. + * ALTERNATIVELY, this software may be distributed under the terms of the
  20648. + * GNU General Public License ("GPL") as published by the Free Software
  20649. + * Foundation, either version 2 of that License or (at your option) any
  20650. + * later version.
  20651. + *
  20652. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  20653. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20654. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  20655. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  20656. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  20657. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  20658. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  20659. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  20660. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  20661. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20662. + */
  20663. +
  20664. +
  20665. +/******************************************************************************
  20666. + @File fm_cc.h
  20667. +
  20668. + @Description FM PCD CC ...
  20669. +*//***************************************************************************/
  20670. +#ifndef __FM_CC_H
  20671. +#define __FM_CC_H
  20672. +
  20673. +#include "std_ext.h"
  20674. +#include "error_ext.h"
  20675. +#include "list_ext.h"
  20676. +
  20677. +#include "fm_pcd.h"
  20678. +
  20679. +
  20680. +/***********************************************************************/
  20681. +/* Coarse classification defines */
  20682. +/***********************************************************************/
  20683. +
  20684. +#define CC_MAX_NUM_OF_KEYS (FM_PCD_MAX_NUM_OF_KEYS + 1)
  20685. +
  20686. +#define CC_PC_FF_MACDST 0x00
  20687. +#define CC_PC_FF_MACSRC 0x01
  20688. +#define CC_PC_FF_ETYPE 0x02
  20689. +
  20690. +#define CC_PC_FF_TCI1 0x03
  20691. +#define CC_PC_FF_TCI2 0x04
  20692. +
  20693. +#define CC_PC_FF_MPLS1 0x06
  20694. +#define CC_PC_FF_MPLS_LAST 0x07
  20695. +
  20696. +#define CC_PC_FF_IPV4DST1 0x08
  20697. +#define CC_PC_FF_IPV4DST2 0x16
  20698. +#define CC_PC_FF_IPV4IPTOS_TC1 0x09
  20699. +#define CC_PC_FF_IPV4IPTOS_TC2 0x17
  20700. +#define CC_PC_FF_IPV4PTYPE1 0x0A
  20701. +#define CC_PC_FF_IPV4PTYPE2 0x18
  20702. +#define CC_PC_FF_IPV4SRC1 0x0b
  20703. +#define CC_PC_FF_IPV4SRC2 0x19
  20704. +#define CC_PC_FF_IPV4SRC1_IPV4DST1 0x0c
  20705. +#define CC_PC_FF_IPV4SRC2_IPV4DST2 0x1a
  20706. +#define CC_PC_FF_IPV4TTL 0x29
  20707. +
  20708. +
  20709. +#define CC_PC_FF_IPTOS_IPV6TC1_IPV6FLOW1 0x0d /*TODO - CLASS - what is it? TOS*/
  20710. +#define CC_PC_FF_IPTOS_IPV6TC2_IPV6FLOW2 0x1b
  20711. +#define CC_PC_FF_IPV6PTYPE1 0x0e
  20712. +#define CC_PC_FF_IPV6PTYPE2 0x1c
  20713. +#define CC_PC_FF_IPV6DST1 0x0f
  20714. +#define CC_PC_FF_IPV6DST2 0x1d
  20715. +#define CC_PC_FF_IPV6SRC1 0x10
  20716. +#define CC_PC_FF_IPV6SRC2 0x1e
  20717. +#define CC_PC_FF_IPV6HOP_LIMIT 0x2a
  20718. +#define CC_PC_FF_IPPID 0x24
  20719. +#define CC_PC_FF_IPDSCP 0x76
  20720. +
  20721. +#define CC_PC_FF_GREPTYPE 0x11
  20722. +
  20723. +#define CC_PC_FF_MINENCAP_PTYPE 0x12
  20724. +#define CC_PC_FF_MINENCAP_IPDST 0x13
  20725. +#define CC_PC_FF_MINENCAP_IPSRC 0x14
  20726. +#define CC_PC_FF_MINENCAP_IPSRC_IPDST 0x15
  20727. +
  20728. +#define CC_PC_FF_L4PSRC 0x1f
  20729. +#define CC_PC_FF_L4PDST 0x20
  20730. +#define CC_PC_FF_L4PSRC_L4PDST 0x21
  20731. +
  20732. +#define CC_PC_FF_PPPPID 0x05
  20733. +
  20734. +#define CC_PC_PR_SHIM1 0x22
  20735. +#define CC_PC_PR_SHIM2 0x23
  20736. +
  20737. +#define CC_PC_GENERIC_WITHOUT_MASK 0x27
  20738. +#define CC_PC_GENERIC_WITH_MASK 0x28
  20739. +#define CC_PC_GENERIC_IC_GMASK 0x2B
  20740. +#define CC_PC_GENERIC_IC_HASH_INDEXED 0x2C
  20741. +#define CC_PC_GENERIC_IC_AGING_MASK 0x2D
  20742. +
  20743. +#define CC_PR_OFFSET 0x25
  20744. +#define CC_PR_WITHOUT_OFFSET 0x26
  20745. +
  20746. +#define CC_PC_PR_ETH_OFFSET 19
  20747. +#define CC_PC_PR_USER_DEFINED_SHIM1_OFFSET 16
  20748. +#define CC_PC_PR_USER_DEFINED_SHIM2_OFFSET 17
  20749. +#define CC_PC_PR_USER_LLC_SNAP_OFFSET 20
  20750. +#define CC_PC_PR_VLAN1_OFFSET 21
  20751. +#define CC_PC_PR_VLAN2_OFFSET 22
  20752. +#define CC_PC_PR_PPPOE_OFFSET 24
  20753. +#define CC_PC_PR_MPLS1_OFFSET 25
  20754. +#define CC_PC_PR_MPLS_LAST_OFFSET 26
  20755. +#define CC_PC_PR_IP1_OFFSET 27
  20756. +#define CC_PC_PR_IP_LAST_OFFSET 28
  20757. +#define CC_PC_PR_MINENC_OFFSET 28
  20758. +#define CC_PC_PR_L4_OFFSET 30
  20759. +#define CC_PC_PR_GRE_OFFSET 29
  20760. +#define CC_PC_PR_ETYPE_LAST_OFFSET 23
  20761. +#define CC_PC_PR_NEXT_HEADER_OFFSET 31
  20762. +
  20763. +#define CC_PC_ILLEGAL 0xff
  20764. +#define CC_SIZE_ILLEGAL 0
  20765. +
  20766. +#define FM_PCD_CC_KEYS_MATCH_TABLE_ALIGN 16
  20767. +#define FM_PCD_CC_AD_TABLE_ALIGN 16
  20768. +#define FM_PCD_CC_AD_ENTRY_SIZE 16
  20769. +#define FM_PCD_CC_NUM_OF_KEYS 255
  20770. +#define FM_PCD_CC_TREE_ADDR_ALIGN 256
  20771. +
  20772. +#define FM_PCD_AD_RESULT_CONTRL_FLOW_TYPE 0x00000000
  20773. +#define FM_PCD_AD_RESULT_DATA_FLOW_TYPE 0x80000000
  20774. +#define FM_PCD_AD_RESULT_PLCR_DIS 0x20000000
  20775. +#define FM_PCD_AD_RESULT_EXTENDED_MODE 0x80000000
  20776. +#define FM_PCD_AD_RESULT_NADEN 0x20000000
  20777. +#define FM_PCD_AD_RESULT_STATISTICS_EN 0x40000000
  20778. +
  20779. +#define FM_PCD_AD_CONT_LOOKUP_TYPE 0x40000000
  20780. +#define FM_PCD_AD_CONT_LOOKUP_LCL_MASK 0x00800000
  20781. +
  20782. +#define FM_PCD_AD_STATS_TYPE 0x40000000
  20783. +#define FM_PCD_AD_STATS_FLR_ADDR_MASK 0x00FFFFFF
  20784. +#define FM_PCD_AD_STATS_COUNTERS_ADDR_MASK 0x00FFFFFF
  20785. +#define FM_PCD_AD_STATS_NEXT_ACTION_MASK 0xFFFF0000
  20786. +#define FM_PCD_AD_STATS_NEXT_ACTION_SHIFT 12
  20787. +#define FM_PCD_AD_STATS_NAD_EN 0x00008000
  20788. +#define FM_PCD_AD_STATS_OP_CODE 0x00000036
  20789. +#define FM_PCD_AD_STATS_FLR_EN 0x00004000
  20790. +#define FM_PCD_AD_STATS_COND_EN 0x00002000
  20791. +
  20792. +
  20793. +
  20794. +#define FM_PCD_AD_BYPASS_TYPE 0xc0000000
  20795. +
  20796. +#define FM_PCD_AD_TYPE_MASK 0xc0000000
  20797. +#define FM_PCD_AD_OPCODE_MASK 0x0000000f
  20798. +
  20799. +#define FM_PCD_AD_PROFILEID_FOR_CNTRL_SHIFT 16
  20800. +#if (DPAA_VERSION >= 11)
  20801. +#define FM_PCD_AD_RESULT_VSP_SHIFT 24
  20802. +#define FM_PCD_AD_RESULT_NO_OM_VSPE 0x02000000
  20803. +#define FM_PCD_AD_RESULT_VSP_MASK 0x3f
  20804. +#define FM_PCD_AD_NCSPFQIDM_MASK 0x80000000
  20805. +#endif /* (DPAA_VERSION >= 11) */
  20806. +
  20807. +#define GLBL_MASK_FOR_HASH_INDEXED 0xfff00000
  20808. +#define CC_GLBL_MASK_SIZE 4
  20809. +#define CC_AGING_MASK_SIZE 4
  20810. +
  20811. +typedef uint32_t ccPrivateInfo_t; /**< private info of CC: */
  20812. +
  20813. +#define CC_PRIVATE_INFO_NONE 0
  20814. +#define CC_PRIVATE_INFO_IC_HASH_INDEX_LOOKUP 0x80000000
  20815. +#define CC_PRIVATE_INFO_IC_HASH_EXACT_MATCH 0x40000000
  20816. +#define CC_PRIVATE_INFO_IC_KEY_EXACT_MATCH 0x20000000
  20817. +#define CC_PRIVATE_INFO_IC_DEQ_FQID_INDEX_LOOKUP 0x10000000
  20818. +
  20819. +#define CC_BUILD_AGING_MASK(numOfKeys) ((((1LL << ((numOfKeys) + 1)) - 1)) << (31 - (numOfKeys)))
  20820. +/***********************************************************************/
  20821. +/* Memory map */
  20822. +/***********************************************************************/
  20823. +#if defined(__MWERKS__) && !defined(__GNUC__)
  20824. +#pragma pack(push,1)
  20825. +#endif /* defined(__MWERKS__) && ... */
  20826. +
  20827. +typedef struct
  20828. +{
  20829. + volatile uint32_t fqid;
  20830. + volatile uint32_t plcrProfile;
  20831. + volatile uint32_t nia;
  20832. + volatile uint32_t res;
  20833. +} t_AdOfTypeResult;
  20834. +
  20835. +typedef struct
  20836. +{
  20837. + volatile uint32_t ccAdBase;
  20838. + volatile uint32_t matchTblPtr;
  20839. + volatile uint32_t pcAndOffsets;
  20840. + volatile uint32_t gmask;
  20841. +} t_AdOfTypeContLookup;
  20842. +
  20843. +typedef struct
  20844. +{
  20845. + volatile uint32_t profileTableAddr;
  20846. + volatile uint32_t reserved;
  20847. + volatile uint32_t nextActionIndx;
  20848. + volatile uint32_t statsTableAddr;
  20849. +} t_AdOfTypeStats;
  20850. +
  20851. +typedef union
  20852. +{
  20853. + volatile t_AdOfTypeResult adResult;
  20854. + volatile t_AdOfTypeContLookup adContLookup;
  20855. +} t_Ad;
  20856. +
  20857. +#if defined(__MWERKS__) && !defined(__GNUC__)
  20858. +#pragma pack(pop)
  20859. +#endif /* defined(__MWERKS__) && ... */
  20860. +
  20861. +
  20862. +/***********************************************************************/
  20863. +/* Driver's internal structures */
  20864. +/***********************************************************************/
  20865. +
  20866. +typedef struct t_FmPcdStatsObj
  20867. +{
  20868. + t_Handle h_StatsAd;
  20869. + t_Handle h_StatsCounters;
  20870. + t_List node;
  20871. +} t_FmPcdStatsObj;
  20872. +
  20873. +typedef struct
  20874. +{
  20875. + uint8_t key[FM_PCD_MAX_SIZE_OF_KEY];
  20876. + uint8_t mask[FM_PCD_MAX_SIZE_OF_KEY];
  20877. +
  20878. + t_FmPcdCcNextEngineParams nextEngineParams;
  20879. + uint32_t requiredAction;
  20880. + uint32_t shadowAction;
  20881. +
  20882. + t_FmPcdStatsObj *p_StatsObj;
  20883. +
  20884. +} t_FmPcdCcKeyAndNextEngineParams;
  20885. +
  20886. +typedef struct
  20887. +{
  20888. + t_Handle p_Ad;
  20889. + e_FmPcdEngine fmPcdEngine;
  20890. + bool adAllocated;
  20891. + bool isTree;
  20892. +
  20893. + uint32_t myInfo;
  20894. + t_List *h_CcNextNodesLst;
  20895. + t_Handle h_AdditionalInfo;
  20896. + t_Handle h_Node;
  20897. +} t_FmPcdModifyCcAdditionalParams;
  20898. +
  20899. +typedef struct
  20900. +{
  20901. + t_Handle p_AdTableNew;
  20902. + t_Handle p_KeysMatchTableNew;
  20903. + t_Handle p_AdTableOld;
  20904. + t_Handle p_KeysMatchTableOld;
  20905. + uint16_t numOfKeys;
  20906. + t_Handle h_CurrentNode;
  20907. + uint16_t savedKeyIndex;
  20908. + t_Handle h_NodeForAdd;
  20909. + t_Handle h_NodeForRmv;
  20910. + t_Handle h_ManipForRmv;
  20911. + t_Handle h_ManipForAdd;
  20912. + t_FmPcdStatsObj *p_StatsObjForRmv;
  20913. +#if (DPAA_VERSION >= 11)
  20914. + t_Handle h_FrmReplicForAdd;
  20915. + t_Handle h_FrmReplicForRmv;
  20916. +#endif /* (DPAA_VERSION >= 11) */
  20917. + bool tree;
  20918. +
  20919. + t_FmPcdCcKeyAndNextEngineParams keyAndNextEngineParams[CC_MAX_NUM_OF_KEYS];
  20920. +} t_FmPcdModifyCcKeyAdditionalParams;
  20921. +
  20922. +typedef struct
  20923. +{
  20924. + t_Handle h_Manip;
  20925. + t_Handle h_CcNode;
  20926. +} t_CcNextEngineInfo;
  20927. +
  20928. +typedef struct
  20929. +{
  20930. + uint16_t numOfKeys;
  20931. + uint16_t maxNumOfKeys;
  20932. +
  20933. + bool maskSupport;
  20934. + uint32_t keysMatchTableMaxSize;
  20935. +
  20936. + e_FmPcdCcStatsMode statisticsMode;
  20937. + uint32_t numOfStatsFLRs;
  20938. + uint32_t countersArraySize;
  20939. +
  20940. + bool isHashBucket; /**< Valid for match table node that is a bucket of a hash table only */
  20941. + t_Handle h_MissStatsCounters; /**< Valid for hash table node and match table that is a bucket;
  20942. + Holds the statistics counters allocated by the hash table and
  20943. + are shared by all hash table buckets; */
  20944. + t_Handle h_PrivMissStatsCounters; /**< Valid for match table node that is a bucket of a hash table only;
  20945. + Holds the statistics counters that were allocated for this node
  20946. + and replaced by the shared counters (allocated by the hash table); */
  20947. + bool statsEnForMiss; /**< Valid for hash table node only; TRUE is statistics are currently
  20948. + enabled for hash 'miss', FALSE otherwise; This parameter effects the
  20949. + returned statistics count to user, statistics AD always present for 'miss'
  20950. + for all hash buckets; */
  20951. + bool glblMaskUpdated;
  20952. + t_Handle p_GlblMask;
  20953. + bool lclMask;
  20954. + uint8_t parseCode;
  20955. + uint8_t offset;
  20956. + uint8_t prsArrayOffset;
  20957. + bool ctrlFlow;
  20958. + uint16_t owners;
  20959. +
  20960. + uint8_t ccKeySizeAccExtraction;
  20961. + uint8_t sizeOfExtraction;
  20962. + uint8_t glblMaskSize;
  20963. +
  20964. + t_Handle h_KeysMatchTable;
  20965. + t_Handle h_AdTable;
  20966. + t_Handle h_StatsAds;
  20967. + t_Handle h_TmpAd;
  20968. + t_Handle h_Ad;
  20969. + t_Handle h_StatsFLRs;
  20970. +
  20971. + t_List availableStatsLst;
  20972. +
  20973. + t_List ccPrevNodesLst;
  20974. +
  20975. + t_List ccTreeIdLst;
  20976. + t_List ccTreesLst;
  20977. +
  20978. + t_Handle h_FmPcd;
  20979. + uint32_t shadowAction;
  20980. + uint8_t userSizeOfExtraction;
  20981. + uint8_t userOffset;
  20982. + uint8_t kgHashShift; /* used in hash-table */
  20983. +
  20984. + t_Handle h_Spinlock;
  20985. +
  20986. + t_FmPcdCcKeyAndNextEngineParams keyAndNextEngineParams[CC_MAX_NUM_OF_KEYS];
  20987. +} t_FmPcdCcNode;
  20988. +
  20989. +typedef struct
  20990. +{
  20991. + t_FmPcdCcNode *p_FmPcdCcNode;
  20992. + bool occupied;
  20993. + uint16_t owners;
  20994. + volatile bool lock;
  20995. +} t_FmPcdCcNodeArray;
  20996. +
  20997. +typedef struct
  20998. +{
  20999. + uint8_t numOfEntriesInGroup;
  21000. + uint32_t totalBitsMask;
  21001. + uint8_t baseGroupEntry;
  21002. +} t_FmPcdCcGroupParam;
  21003. +
  21004. +typedef struct
  21005. +{
  21006. + t_Handle h_FmPcd;
  21007. + uint8_t netEnvId;
  21008. + uintptr_t ccTreeBaseAddr;
  21009. + uint8_t numOfGrps;
  21010. + t_FmPcdCcGroupParam fmPcdGroupParam[FM_PCD_MAX_NUM_OF_CC_GROUPS];
  21011. + t_List fmPortsLst;
  21012. + t_FmPcdLock *p_Lock;
  21013. + uint8_t numOfEntries;
  21014. + uint16_t owners;
  21015. + t_Handle h_FmPcdCcSavedManipParams;
  21016. + bool modifiedState;
  21017. + uint32_t requiredAction;
  21018. + t_Handle h_IpReassemblyManip;
  21019. + t_Handle h_CapwapReassemblyManip;
  21020. +
  21021. + t_FmPcdCcKeyAndNextEngineParams keyAndNextEngineParams[FM_PCD_MAX_NUM_OF_CC_GROUPS];
  21022. +} t_FmPcdCcTree;
  21023. +
  21024. +
  21025. +t_Error FmPcdCcNodeTreeTryLock(t_Handle h_FmPcd,t_Handle h_FmPcdCcNode, t_List *p_List);
  21026. +void FmPcdCcNodeTreeReleaseLock(t_Handle h_FmPcd, t_List *p_List);
  21027. +t_Error FmPcdUpdateCcShadow (t_FmPcd *p_FmPcd, uint32_t size, uint32_t align);
  21028. +
  21029. +
  21030. +#endif /* __FM_CC_H */
  21031. --- /dev/null
  21032. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c
  21033. @@ -0,0 +1,3242 @@
  21034. +/*
  21035. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  21036. + *
  21037. + * Redistribution and use in source and binary forms, with or without
  21038. + * modification, are permitted provided that the following conditions are met:
  21039. + * * Redistributions of source code must retain the above copyright
  21040. + * notice, this list of conditions and the following disclaimer.
  21041. + * * Redistributions in binary form must reproduce the above copyright
  21042. + * notice, this list of conditions and the following disclaimer in the
  21043. + * documentation and/or other materials provided with the distribution.
  21044. + * * Neither the name of Freescale Semiconductor nor the
  21045. + * names of its contributors may be used to endorse or promote products
  21046. + * derived from this software without specific prior written permission.
  21047. + *
  21048. + *
  21049. + * ALTERNATIVELY, this software may be distributed under the terms of the
  21050. + * GNU General Public License ("GPL") as published by the Free Software
  21051. + * Foundation, either version 2 of that License or (at your option) any
  21052. + * later version.
  21053. + *
  21054. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  21055. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21056. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  21057. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  21058. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21059. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21060. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  21061. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  21062. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  21063. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21064. + */
  21065. +
  21066. +
  21067. +/******************************************************************************
  21068. + @File fm_kg.c
  21069. +
  21070. + @Description FM PCD ...
  21071. +*//***************************************************************************/
  21072. +#include "std_ext.h"
  21073. +#include "error_ext.h"
  21074. +#include "string_ext.h"
  21075. +#include "debug_ext.h"
  21076. +#include "net_ext.h"
  21077. +#include "fm_port_ext.h"
  21078. +
  21079. +#include "fm_common.h"
  21080. +#include "fm_pcd.h"
  21081. +#include "fm_hc.h"
  21082. +#include "fm_pcd_ipc.h"
  21083. +#include "fm_kg.h"
  21084. +#include "fsl_fman_kg.h"
  21085. +
  21086. +
  21087. +/****************************************/
  21088. +/* static functions */
  21089. +/****************************************/
  21090. +
  21091. +static uint32_t KgHwLock(t_Handle h_FmPcdKg)
  21092. +{
  21093. + ASSERT_COND(h_FmPcdKg);
  21094. + return XX_LockIntrSpinlock(((t_FmPcdKg *)h_FmPcdKg)->h_HwSpinlock);
  21095. +}
  21096. +
  21097. +static void KgHwUnlock(t_Handle h_FmPcdKg, uint32_t intFlags)
  21098. +{
  21099. + ASSERT_COND(h_FmPcdKg);
  21100. + XX_UnlockIntrSpinlock(((t_FmPcdKg *)h_FmPcdKg)->h_HwSpinlock, intFlags);
  21101. +}
  21102. +
  21103. +static uint32_t KgSchemeLock(t_Handle h_Scheme)
  21104. +{
  21105. + ASSERT_COND(h_Scheme);
  21106. + return FmPcdLockSpinlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock);
  21107. +}
  21108. +
  21109. +static void KgSchemeUnlock(t_Handle h_Scheme, uint32_t intFlags)
  21110. +{
  21111. + ASSERT_COND(h_Scheme);
  21112. + FmPcdUnlockSpinlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock, intFlags);
  21113. +}
  21114. +
  21115. +static bool KgSchemeFlagTryLock(t_Handle h_Scheme)
  21116. +{
  21117. + ASSERT_COND(h_Scheme);
  21118. + return FmPcdLockTryLock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock);
  21119. +}
  21120. +
  21121. +static void KgSchemeFlagUnlock(t_Handle h_Scheme)
  21122. +{
  21123. + ASSERT_COND(h_Scheme);
  21124. + FmPcdLockUnlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock);
  21125. +}
  21126. +
  21127. +static t_Error WriteKgarWait(t_FmPcd *p_FmPcd, uint32_t fmkg_ar)
  21128. +{
  21129. +
  21130. + struct fman_kg_regs *regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  21131. +
  21132. + if (fman_kg_write_ar_wait(regs, fmkg_ar))
  21133. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Keygen scheme access violation"));
  21134. +
  21135. + return E_OK;
  21136. +}
  21137. +
  21138. +static e_FmPcdKgExtractDfltSelect GetGenericSwDefault(t_FmPcdKgExtractDflt swDefaults[], uint8_t numOfSwDefaults, uint8_t code)
  21139. +{
  21140. + int i;
  21141. +
  21142. + switch (code)
  21143. + {
  21144. + case (KG_SCH_GEN_PARSE_RESULT_N_FQID):
  21145. + case (KG_SCH_GEN_DEFAULT):
  21146. + case (KG_SCH_GEN_NEXTHDR):
  21147. + for (i=0 ; i<numOfSwDefaults ; i++)
  21148. + if (swDefaults[i].type == e_FM_PCD_KG_GENERIC_NOT_FROM_DATA)
  21149. + return swDefaults[i].dfltSelect;
  21150. + break;
  21151. + case (KG_SCH_GEN_SHIM1):
  21152. + case (KG_SCH_GEN_SHIM2):
  21153. + case (KG_SCH_GEN_IP_PID_NO_V):
  21154. + case (KG_SCH_GEN_ETH_NO_V):
  21155. + case (KG_SCH_GEN_SNAP_NO_V):
  21156. + case (KG_SCH_GEN_VLAN1_NO_V):
  21157. + case (KG_SCH_GEN_VLAN2_NO_V):
  21158. + case (KG_SCH_GEN_ETH_TYPE_NO_V):
  21159. + case (KG_SCH_GEN_PPP_NO_V):
  21160. + case (KG_SCH_GEN_MPLS1_NO_V):
  21161. + case (KG_SCH_GEN_MPLS_LAST_NO_V):
  21162. + case (KG_SCH_GEN_L3_NO_V):
  21163. + case (KG_SCH_GEN_IP2_NO_V):
  21164. + case (KG_SCH_GEN_GRE_NO_V):
  21165. + case (KG_SCH_GEN_L4_NO_V):
  21166. + for (i=0 ; i<numOfSwDefaults ; i++)
  21167. + if (swDefaults[i].type == e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V)
  21168. + return swDefaults[i].dfltSelect;
  21169. + break;
  21170. + case (KG_SCH_GEN_START_OF_FRM):
  21171. + case (KG_SCH_GEN_ETH):
  21172. + case (KG_SCH_GEN_SNAP):
  21173. + case (KG_SCH_GEN_VLAN1):
  21174. + case (KG_SCH_GEN_VLAN2):
  21175. + case (KG_SCH_GEN_ETH_TYPE):
  21176. + case (KG_SCH_GEN_PPP):
  21177. + case (KG_SCH_GEN_MPLS1):
  21178. + case (KG_SCH_GEN_MPLS2):
  21179. + case (KG_SCH_GEN_MPLS3):
  21180. + case (KG_SCH_GEN_MPLS_LAST):
  21181. + case (KG_SCH_GEN_IPV4):
  21182. + case (KG_SCH_GEN_IPV6):
  21183. + case (KG_SCH_GEN_IPV4_TUNNELED):
  21184. + case (KG_SCH_GEN_IPV6_TUNNELED):
  21185. + case (KG_SCH_GEN_MIN_ENCAP):
  21186. + case (KG_SCH_GEN_GRE):
  21187. + case (KG_SCH_GEN_TCP):
  21188. + case (KG_SCH_GEN_UDP):
  21189. + case (KG_SCH_GEN_IPSEC_AH):
  21190. + case (KG_SCH_GEN_SCTP):
  21191. + case (KG_SCH_GEN_DCCP):
  21192. + case (KG_SCH_GEN_IPSEC_ESP):
  21193. + for (i=0 ; i<numOfSwDefaults ; i++)
  21194. + if (swDefaults[i].type == e_FM_PCD_KG_GENERIC_FROM_DATA)
  21195. + return swDefaults[i].dfltSelect;
  21196. + break;
  21197. + default:
  21198. + break;
  21199. + }
  21200. +
  21201. + return e_FM_PCD_KG_DFLT_ILLEGAL;
  21202. +}
  21203. +
  21204. +static uint8_t GetGenCode(e_FmPcdExtractFrom src, uint8_t *p_Offset)
  21205. +{
  21206. + *p_Offset = 0;
  21207. +
  21208. + switch (src)
  21209. + {
  21210. + case (e_FM_PCD_EXTRACT_FROM_FRAME_START):
  21211. + return KG_SCH_GEN_START_OF_FRM;
  21212. + case (e_FM_PCD_EXTRACT_FROM_DFLT_VALUE):
  21213. + return KG_SCH_GEN_DEFAULT;
  21214. + case (e_FM_PCD_EXTRACT_FROM_PARSE_RESULT):
  21215. + return KG_SCH_GEN_PARSE_RESULT_N_FQID;
  21216. + case (e_FM_PCD_EXTRACT_FROM_ENQ_FQID):
  21217. + *p_Offset = 32;
  21218. + return KG_SCH_GEN_PARSE_RESULT_N_FQID;
  21219. + case (e_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE):
  21220. + return KG_SCH_GEN_NEXTHDR;
  21221. + default:
  21222. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 'extract from' src"));
  21223. + return 0;
  21224. + }
  21225. +}
  21226. +
  21227. +static uint8_t GetGenHdrCode(e_NetHeaderType hdr, e_FmPcdHdrIndex hdrIndex, bool ignoreProtocolValidation)
  21228. +{
  21229. + if (!ignoreProtocolValidation)
  21230. + switch (hdr)
  21231. + {
  21232. + case (HEADER_TYPE_NONE):
  21233. + ASSERT_COND(FALSE);
  21234. + case (HEADER_TYPE_ETH):
  21235. + return KG_SCH_GEN_ETH;
  21236. + case (HEADER_TYPE_LLC_SNAP):
  21237. + return KG_SCH_GEN_SNAP;
  21238. + case (HEADER_TYPE_PPPoE):
  21239. + return KG_SCH_GEN_PPP;
  21240. + case (HEADER_TYPE_MPLS):
  21241. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  21242. + return KG_SCH_GEN_MPLS1;
  21243. + if (hdrIndex == e_FM_PCD_HDR_INDEX_2)
  21244. + return KG_SCH_GEN_MPLS2;
  21245. + if (hdrIndex == e_FM_PCD_HDR_INDEX_3)
  21246. + return KG_SCH_GEN_MPLS3;
  21247. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  21248. + return KG_SCH_GEN_MPLS_LAST;
  21249. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS header index"));
  21250. + return 0;
  21251. + case (HEADER_TYPE_IPv4):
  21252. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  21253. + return KG_SCH_GEN_IPV4;
  21254. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_LAST))
  21255. + return KG_SCH_GEN_IPV4_TUNNELED;
  21256. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 header index"));
  21257. + return 0;
  21258. + case (HEADER_TYPE_IPv6):
  21259. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  21260. + return KG_SCH_GEN_IPV6;
  21261. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_LAST))
  21262. + return KG_SCH_GEN_IPV6_TUNNELED;
  21263. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 header index"));
  21264. + return 0;
  21265. + case (HEADER_TYPE_GRE):
  21266. + return KG_SCH_GEN_GRE;
  21267. + case (HEADER_TYPE_TCP):
  21268. + return KG_SCH_GEN_TCP;
  21269. + case (HEADER_TYPE_UDP):
  21270. + return KG_SCH_GEN_UDP;
  21271. + case (HEADER_TYPE_IPSEC_AH):
  21272. + return KG_SCH_GEN_IPSEC_AH;
  21273. + case (HEADER_TYPE_IPSEC_ESP):
  21274. + return KG_SCH_GEN_IPSEC_ESP;
  21275. + case (HEADER_TYPE_SCTP):
  21276. + return KG_SCH_GEN_SCTP;
  21277. + case (HEADER_TYPE_DCCP):
  21278. + return KG_SCH_GEN_DCCP;
  21279. + default:
  21280. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21281. + return 0;
  21282. + }
  21283. + else
  21284. + switch (hdr)
  21285. + {
  21286. + case (HEADER_TYPE_NONE):
  21287. + ASSERT_COND(FALSE);
  21288. + case (HEADER_TYPE_ETH):
  21289. + return KG_SCH_GEN_ETH_NO_V;
  21290. + case (HEADER_TYPE_LLC_SNAP):
  21291. + return KG_SCH_GEN_SNAP_NO_V;
  21292. + case (HEADER_TYPE_PPPoE):
  21293. + return KG_SCH_GEN_PPP_NO_V;
  21294. + case (HEADER_TYPE_MPLS):
  21295. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  21296. + return KG_SCH_GEN_MPLS1_NO_V;
  21297. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  21298. + return KG_SCH_GEN_MPLS_LAST_NO_V;
  21299. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_3) )
  21300. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Indexed MPLS Extraction not supported"));
  21301. + else
  21302. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS header index"));
  21303. + return 0;
  21304. + case (HEADER_TYPE_IPv4):
  21305. + case (HEADER_TYPE_IPv6):
  21306. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  21307. + return KG_SCH_GEN_L3_NO_V;
  21308. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_2) || (hdrIndex == e_FM_PCD_HDR_INDEX_LAST))
  21309. + return KG_SCH_GEN_IP2_NO_V;
  21310. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IP header index"));
  21311. + case (HEADER_TYPE_MINENCAP):
  21312. + return KG_SCH_GEN_IP2_NO_V;
  21313. + case (HEADER_TYPE_USER_DEFINED_L3):
  21314. + return KG_SCH_GEN_L3_NO_V;
  21315. + case (HEADER_TYPE_GRE):
  21316. + return KG_SCH_GEN_GRE_NO_V;
  21317. + case (HEADER_TYPE_TCP):
  21318. + case (HEADER_TYPE_UDP):
  21319. + case (HEADER_TYPE_IPSEC_AH):
  21320. + case (HEADER_TYPE_IPSEC_ESP):
  21321. + case (HEADER_TYPE_SCTP):
  21322. + case (HEADER_TYPE_DCCP):
  21323. + return KG_SCH_GEN_L4_NO_V;
  21324. + case (HEADER_TYPE_USER_DEFINED_SHIM1):
  21325. + return KG_SCH_GEN_SHIM1;
  21326. + case (HEADER_TYPE_USER_DEFINED_SHIM2):
  21327. + return KG_SCH_GEN_SHIM2;
  21328. + default:
  21329. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21330. + return 0;
  21331. + }
  21332. +}
  21333. +static t_GenericCodes GetGenFieldCode(e_NetHeaderType hdr, t_FmPcdFields field, bool ignoreProtocolValidation, e_FmPcdHdrIndex hdrIndex)
  21334. +{
  21335. + if (!ignoreProtocolValidation)
  21336. + switch (hdr)
  21337. + {
  21338. + case (HEADER_TYPE_NONE):
  21339. + ASSERT_COND(FALSE);
  21340. + break;
  21341. + case (HEADER_TYPE_ETH):
  21342. + switch (field.eth)
  21343. + {
  21344. + case (NET_HEADER_FIELD_ETH_TYPE):
  21345. + return KG_SCH_GEN_ETH_TYPE;
  21346. + default:
  21347. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21348. + return 0;
  21349. + }
  21350. + break;
  21351. + case (HEADER_TYPE_VLAN):
  21352. + switch (field.vlan)
  21353. + {
  21354. + case (NET_HEADER_FIELD_VLAN_TCI):
  21355. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  21356. + return KG_SCH_GEN_VLAN1;
  21357. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  21358. + return KG_SCH_GEN_VLAN2;
  21359. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal VLAN header index"));
  21360. + return 0;
  21361. + }
  21362. + break;
  21363. + case (HEADER_TYPE_MPLS):
  21364. + case (HEADER_TYPE_IPSEC_AH):
  21365. + case (HEADER_TYPE_IPSEC_ESP):
  21366. + case (HEADER_TYPE_LLC_SNAP):
  21367. + case (HEADER_TYPE_PPPoE):
  21368. + case (HEADER_TYPE_IPv4):
  21369. + case (HEADER_TYPE_IPv6):
  21370. + case (HEADER_TYPE_GRE):
  21371. + case (HEADER_TYPE_MINENCAP):
  21372. + case (HEADER_TYPE_USER_DEFINED_L3):
  21373. + case (HEADER_TYPE_TCP):
  21374. + case (HEADER_TYPE_UDP):
  21375. + case (HEADER_TYPE_SCTP):
  21376. + case (HEADER_TYPE_DCCP):
  21377. + case (HEADER_TYPE_USER_DEFINED_L4):
  21378. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21379. + return 0;
  21380. + default:
  21381. + break;
  21382. +
  21383. + }
  21384. + else
  21385. + switch (hdr)
  21386. + {
  21387. + case (HEADER_TYPE_NONE):
  21388. + ASSERT_COND(FALSE);
  21389. + break;
  21390. + case (HEADER_TYPE_ETH):
  21391. + switch (field.eth)
  21392. + {
  21393. + case (NET_HEADER_FIELD_ETH_TYPE):
  21394. + return KG_SCH_GEN_ETH_TYPE_NO_V;
  21395. + default:
  21396. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21397. + return 0;
  21398. + }
  21399. + break;
  21400. + case (HEADER_TYPE_VLAN):
  21401. + switch (field.vlan)
  21402. + {
  21403. + case (NET_HEADER_FIELD_VLAN_TCI) :
  21404. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE) || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  21405. + return KG_SCH_GEN_VLAN1_NO_V;
  21406. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  21407. + return KG_SCH_GEN_VLAN2_NO_V;
  21408. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal VLAN header index"));
  21409. + return 0;
  21410. + }
  21411. + break;
  21412. + case (HEADER_TYPE_IPv4):
  21413. + switch (field.ipv4)
  21414. + {
  21415. + case (NET_HEADER_FIELD_IPv4_PROTO):
  21416. + return KG_SCH_GEN_IP_PID_NO_V;
  21417. + default:
  21418. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21419. + return 0;
  21420. + }
  21421. + break;
  21422. + case (HEADER_TYPE_IPv6):
  21423. + switch (field.ipv6)
  21424. + {
  21425. + case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
  21426. + return KG_SCH_GEN_IP_PID_NO_V;
  21427. + default:
  21428. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21429. + return 0;
  21430. + }
  21431. + break;
  21432. + case (HEADER_TYPE_MPLS):
  21433. + case (HEADER_TYPE_LLC_SNAP):
  21434. + case (HEADER_TYPE_PPPoE):
  21435. + case (HEADER_TYPE_GRE):
  21436. + case (HEADER_TYPE_MINENCAP):
  21437. + case (HEADER_TYPE_USER_DEFINED_L3):
  21438. + case (HEADER_TYPE_TCP):
  21439. + case (HEADER_TYPE_UDP):
  21440. + case (HEADER_TYPE_IPSEC_AH):
  21441. + case (HEADER_TYPE_IPSEC_ESP):
  21442. + case (HEADER_TYPE_SCTP):
  21443. + case (HEADER_TYPE_DCCP):
  21444. + case (HEADER_TYPE_USER_DEFINED_L4):
  21445. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21446. + return 0;
  21447. + default:
  21448. + break;
  21449. + }
  21450. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Header not supported"));
  21451. + return 0;
  21452. +}
  21453. +
  21454. +static t_KnownFieldsMasks GetKnownProtMask(t_FmPcd *p_FmPcd, e_NetHeaderType hdr, e_FmPcdHdrIndex index, t_FmPcdFields field)
  21455. +{
  21456. + UNUSED(p_FmPcd);
  21457. +
  21458. + switch (hdr)
  21459. + {
  21460. + case (HEADER_TYPE_NONE):
  21461. + ASSERT_COND(FALSE);
  21462. + break;
  21463. + case (HEADER_TYPE_ETH):
  21464. + switch (field.eth)
  21465. + {
  21466. + case (NET_HEADER_FIELD_ETH_DA):
  21467. + return KG_SCH_KN_MACDST;
  21468. + case (NET_HEADER_FIELD_ETH_SA):
  21469. + return KG_SCH_KN_MACSRC;
  21470. + case (NET_HEADER_FIELD_ETH_TYPE):
  21471. + return KG_SCH_KN_ETYPE;
  21472. + default:
  21473. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21474. + return 0;
  21475. + }
  21476. + case (HEADER_TYPE_LLC_SNAP):
  21477. + switch (field.llcSnap)
  21478. + {
  21479. + case (NET_HEADER_FIELD_LLC_SNAP_TYPE):
  21480. + return KG_SCH_KN_ETYPE;
  21481. + default:
  21482. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21483. + return 0;
  21484. + }
  21485. + case (HEADER_TYPE_VLAN):
  21486. + switch (field.vlan)
  21487. + {
  21488. + case (NET_HEADER_FIELD_VLAN_TCI):
  21489. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21490. + return KG_SCH_KN_TCI1;
  21491. + if (index == e_FM_PCD_HDR_INDEX_LAST)
  21492. + return KG_SCH_KN_TCI2;
  21493. + else
  21494. + {
  21495. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21496. + return 0;
  21497. + }
  21498. + default:
  21499. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21500. + return 0;
  21501. + }
  21502. + case (HEADER_TYPE_MPLS):
  21503. + switch (field.mpls)
  21504. + {
  21505. + case (NET_HEADER_FIELD_MPLS_LABEL_STACK):
  21506. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21507. + return KG_SCH_KN_MPLS1;
  21508. + if (index == e_FM_PCD_HDR_INDEX_2)
  21509. + return KG_SCH_KN_MPLS2;
  21510. + if (index == e_FM_PCD_HDR_INDEX_LAST)
  21511. + return KG_SCH_KN_MPLS_LAST;
  21512. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal MPLS index"));
  21513. + return 0;
  21514. + default:
  21515. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21516. + return 0;
  21517. + }
  21518. + case (HEADER_TYPE_IPv4):
  21519. + switch (field.ipv4)
  21520. + {
  21521. + case (NET_HEADER_FIELD_IPv4_SRC_IP):
  21522. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21523. + return KG_SCH_KN_IPSRC1;
  21524. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21525. + return KG_SCH_KN_IPSRC2;
  21526. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  21527. + return 0;
  21528. + case (NET_HEADER_FIELD_IPv4_DST_IP):
  21529. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21530. + return KG_SCH_KN_IPDST1;
  21531. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21532. + return KG_SCH_KN_IPDST2;
  21533. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  21534. + return 0;
  21535. + case (NET_HEADER_FIELD_IPv4_PROTO):
  21536. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21537. + return KG_SCH_KN_PTYPE1;
  21538. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21539. + return KG_SCH_KN_PTYPE2;
  21540. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  21541. + return 0;
  21542. + case (NET_HEADER_FIELD_IPv4_TOS):
  21543. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21544. + return KG_SCH_KN_IPTOS_TC1;
  21545. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21546. + return KG_SCH_KN_IPTOS_TC2;
  21547. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv4 index"));
  21548. + return 0;
  21549. + default:
  21550. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21551. + return 0;
  21552. + }
  21553. + case (HEADER_TYPE_IPv6):
  21554. + switch (field.ipv6)
  21555. + {
  21556. + case (NET_HEADER_FIELD_IPv6_SRC_IP):
  21557. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21558. + return KG_SCH_KN_IPSRC1;
  21559. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21560. + return KG_SCH_KN_IPSRC2;
  21561. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  21562. + return 0;
  21563. + case (NET_HEADER_FIELD_IPv6_DST_IP):
  21564. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21565. + return KG_SCH_KN_IPDST1;
  21566. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21567. + return KG_SCH_KN_IPDST2;
  21568. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  21569. + return 0;
  21570. + case (NET_HEADER_FIELD_IPv6_NEXT_HDR):
  21571. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21572. + return KG_SCH_KN_PTYPE1;
  21573. + if (index == e_FM_PCD_HDR_INDEX_2)
  21574. + return KG_SCH_KN_PTYPE2;
  21575. + if (index == e_FM_PCD_HDR_INDEX_LAST)
  21576. +#ifdef FM_KG_NO_IPPID_SUPPORT
  21577. + if (p_FmPcd->fmRevInfo.majorRev < 6)
  21578. + return KG_SCH_KN_PTYPE2;
  21579. +#endif /* FM_KG_NO_IPPID_SUPPORT */
  21580. + return KG_SCH_KN_IPPID;
  21581. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  21582. + return 0;
  21583. + case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL | NET_HEADER_FIELD_IPv6_TC):
  21584. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21585. + return (KG_SCH_KN_IPV6FL1 | KG_SCH_KN_IPTOS_TC1);
  21586. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21587. + return (KG_SCH_KN_IPV6FL2 | KG_SCH_KN_IPTOS_TC2);
  21588. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  21589. + return 0;
  21590. + case (NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_TC):
  21591. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21592. + return KG_SCH_KN_IPTOS_TC1;
  21593. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21594. + return KG_SCH_KN_IPTOS_TC2;
  21595. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  21596. + return 0;
  21597. + case (NET_HEADER_FIELD_IPv6_FL):
  21598. + if ((index == e_FM_PCD_HDR_INDEX_NONE) || (index == e_FM_PCD_HDR_INDEX_1))
  21599. + return KG_SCH_KN_IPV6FL1;
  21600. + if ((index == e_FM_PCD_HDR_INDEX_2) || (index == e_FM_PCD_HDR_INDEX_LAST))
  21601. + return KG_SCH_KN_IPV6FL2;
  21602. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal IPv6 index"));
  21603. + return 0;
  21604. + default:
  21605. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21606. + return 0;
  21607. + }
  21608. + case (HEADER_TYPE_GRE):
  21609. + switch (field.gre)
  21610. + {
  21611. + case (NET_HEADER_FIELD_GRE_TYPE):
  21612. + return KG_SCH_KN_GREPTYPE;
  21613. + default:
  21614. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21615. + return 0;
  21616. + }
  21617. + case (HEADER_TYPE_MINENCAP):
  21618. + switch (field.minencap)
  21619. + {
  21620. + case (NET_HEADER_FIELD_MINENCAP_SRC_IP):
  21621. + return KG_SCH_KN_IPSRC2;
  21622. + case (NET_HEADER_FIELD_MINENCAP_DST_IP):
  21623. + return KG_SCH_KN_IPDST2;
  21624. + case (NET_HEADER_FIELD_MINENCAP_TYPE):
  21625. + return KG_SCH_KN_PTYPE2;
  21626. + default:
  21627. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21628. + return 0;
  21629. + }
  21630. + case (HEADER_TYPE_TCP):
  21631. + switch (field.tcp)
  21632. + {
  21633. + case (NET_HEADER_FIELD_TCP_PORT_SRC):
  21634. + return KG_SCH_KN_L4PSRC;
  21635. + case (NET_HEADER_FIELD_TCP_PORT_DST):
  21636. + return KG_SCH_KN_L4PDST;
  21637. + case (NET_HEADER_FIELD_TCP_FLAGS):
  21638. + return KG_SCH_KN_TFLG;
  21639. + default:
  21640. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21641. + return 0;
  21642. + }
  21643. + case (HEADER_TYPE_UDP):
  21644. + switch (field.udp)
  21645. + {
  21646. + case (NET_HEADER_FIELD_UDP_PORT_SRC):
  21647. + return KG_SCH_KN_L4PSRC;
  21648. + case (NET_HEADER_FIELD_UDP_PORT_DST):
  21649. + return KG_SCH_KN_L4PDST;
  21650. + default:
  21651. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21652. + return 0;
  21653. + }
  21654. + case (HEADER_TYPE_IPSEC_AH):
  21655. + switch (field.ipsecAh)
  21656. + {
  21657. + case (NET_HEADER_FIELD_IPSEC_AH_SPI):
  21658. + return KG_SCH_KN_IPSEC_SPI;
  21659. + case (NET_HEADER_FIELD_IPSEC_AH_NH):
  21660. + return KG_SCH_KN_IPSEC_NH;
  21661. + default:
  21662. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21663. + return 0;
  21664. + }
  21665. + case (HEADER_TYPE_IPSEC_ESP):
  21666. + switch (field.ipsecEsp)
  21667. + {
  21668. + case (NET_HEADER_FIELD_IPSEC_ESP_SPI):
  21669. + return KG_SCH_KN_IPSEC_SPI;
  21670. + default:
  21671. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21672. + return 0;
  21673. + }
  21674. + case (HEADER_TYPE_SCTP):
  21675. + switch (field.sctp)
  21676. + {
  21677. + case (NET_HEADER_FIELD_SCTP_PORT_SRC):
  21678. + return KG_SCH_KN_L4PSRC;
  21679. + case (NET_HEADER_FIELD_SCTP_PORT_DST):
  21680. + return KG_SCH_KN_L4PDST;
  21681. + default:
  21682. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21683. + return 0;
  21684. + }
  21685. + case (HEADER_TYPE_DCCP):
  21686. + switch (field.dccp)
  21687. + {
  21688. + case (NET_HEADER_FIELD_DCCP_PORT_SRC):
  21689. + return KG_SCH_KN_L4PSRC;
  21690. + case (NET_HEADER_FIELD_DCCP_PORT_DST):
  21691. + return KG_SCH_KN_L4PDST;
  21692. + default:
  21693. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21694. + return 0;
  21695. + }
  21696. + case (HEADER_TYPE_PPPoE):
  21697. + switch (field.pppoe)
  21698. + {
  21699. + case (NET_HEADER_FIELD_PPPoE_PID):
  21700. + return KG_SCH_KN_PPPID;
  21701. + case (NET_HEADER_FIELD_PPPoE_SID):
  21702. + return KG_SCH_KN_PPPSID;
  21703. + default:
  21704. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21705. + return 0;
  21706. + }
  21707. + default:
  21708. + break;
  21709. +
  21710. + }
  21711. +
  21712. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Extraction not supported"));
  21713. + return 0;
  21714. +}
  21715. +
  21716. +
  21717. +static uint8_t GetKnownFieldId(uint32_t bitMask)
  21718. +{
  21719. + uint8_t cnt = 0;
  21720. +
  21721. + while (bitMask)
  21722. + if (bitMask & 0x80000000)
  21723. + break;
  21724. + else
  21725. + {
  21726. + cnt++;
  21727. + bitMask <<= 1;
  21728. + }
  21729. + return cnt;
  21730. +
  21731. +}
  21732. +
  21733. +static uint8_t GetExtractedOrMask(uint8_t bitOffset, bool fqid)
  21734. +{
  21735. + uint8_t i, mask, numOfOnesToClear, walking1Mask = 1;
  21736. +
  21737. + /* bitOffset 1-7 --> mask 0x1-0x7F */
  21738. + if (bitOffset<8)
  21739. + {
  21740. + mask = 0;
  21741. + for (i = 0 ; i < bitOffset ; i++, walking1Mask <<= 1)
  21742. + mask |= walking1Mask;
  21743. + }
  21744. + else
  21745. + {
  21746. + mask = 0xFF;
  21747. + numOfOnesToClear = 0;
  21748. + if (fqid && bitOffset>24)
  21749. + /* bitOffset 25-31 --> mask 0xFE-0x80 */
  21750. + numOfOnesToClear = (uint8_t)(bitOffset-24);
  21751. + else
  21752. + /* bitOffset 9-15 --> mask 0xFE-0x80 */
  21753. + if (!fqid && bitOffset>8)
  21754. + numOfOnesToClear = (uint8_t)(bitOffset-8);
  21755. + for (i = 0 ; i < numOfOnesToClear ; i++, walking1Mask <<= 1)
  21756. + mask &= ~walking1Mask;
  21757. + /* bitOffset 8-24 for FQID, 8 for PP --> no mask (0xFF)*/
  21758. + }
  21759. + return mask;
  21760. +}
  21761. +
  21762. +static void IncSchemeOwners(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_BindPort)
  21763. +{
  21764. + t_FmPcdKg *p_FmPcdKg;
  21765. + t_FmPcdKgScheme *p_Scheme;
  21766. + uint32_t intFlags;
  21767. + uint8_t relativeSchemeId;
  21768. + int i;
  21769. +
  21770. + p_FmPcdKg = p_FmPcd->p_FmPcdKg;
  21771. +
  21772. + /* for each scheme - update owners counters */
  21773. + for (i = 0; i < p_BindPort->numOfSchemes; i++)
  21774. + {
  21775. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, p_BindPort->schemesIds[i]);
  21776. + ASSERT_COND(relativeSchemeId < FM_PCD_KG_NUM_OF_SCHEMES);
  21777. +
  21778. + p_Scheme = &p_FmPcdKg->schemes[relativeSchemeId];
  21779. +
  21780. + /* increment owners number */
  21781. + intFlags = KgSchemeLock(p_Scheme);
  21782. + p_Scheme->owners++;
  21783. + KgSchemeUnlock(p_Scheme, intFlags);
  21784. + }
  21785. +}
  21786. +
  21787. +static void DecSchemeOwners(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_BindPort)
  21788. +{
  21789. + t_FmPcdKg *p_FmPcdKg;
  21790. + t_FmPcdKgScheme *p_Scheme;
  21791. + uint32_t intFlags;
  21792. + uint8_t relativeSchemeId;
  21793. + int i;
  21794. +
  21795. + p_FmPcdKg = p_FmPcd->p_FmPcdKg;
  21796. +
  21797. + /* for each scheme - update owners counters */
  21798. + for (i = 0; i < p_BindPort->numOfSchemes; i++)
  21799. + {
  21800. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, p_BindPort->schemesIds[i]);
  21801. + ASSERT_COND(relativeSchemeId < FM_PCD_KG_NUM_OF_SCHEMES);
  21802. +
  21803. + p_Scheme = &p_FmPcdKg->schemes[relativeSchemeId];
  21804. +
  21805. + /* increment owners number */
  21806. + ASSERT_COND(p_Scheme->owners);
  21807. + intFlags = KgSchemeLock(p_Scheme);
  21808. + p_Scheme->owners--;
  21809. + KgSchemeUnlock(p_Scheme, intFlags);
  21810. + }
  21811. +}
  21812. +
  21813. +static void UpdateRequiredActionFlag(t_FmPcdKgScheme *p_Scheme, bool set)
  21814. +{
  21815. + /* this routine is locked by the calling routine */
  21816. + ASSERT_COND(p_Scheme);
  21817. + ASSERT_COND(p_Scheme->valid);
  21818. +
  21819. + if (set)
  21820. + p_Scheme->requiredActionFlag = TRUE;
  21821. + else
  21822. + {
  21823. + p_Scheme->requiredAction = 0;
  21824. + p_Scheme->requiredActionFlag = FALSE;
  21825. + }
  21826. +}
  21827. +
  21828. +static t_Error KgWriteSp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, uint32_t spReg, bool add)
  21829. +{
  21830. + struct fman_kg_regs *p_KgRegs;
  21831. +
  21832. + uint32_t tmpKgarReg = 0, intFlags;
  21833. + t_Error err = E_OK;
  21834. +
  21835. + /* The calling routine had locked the port, so for each port only one core can access
  21836. + * (so we don't need a lock here) */
  21837. +
  21838. + if (p_FmPcd->h_Hc)
  21839. + return FmHcKgWriteSp(p_FmPcd->h_Hc, hardwarePortId, spReg, add);
  21840. +
  21841. + p_KgRegs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  21842. +
  21843. + tmpKgarReg = FmPcdKgBuildReadPortSchemeBindActionReg(hardwarePortId);
  21844. + /* lock a common KG reg */
  21845. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  21846. + err = WriteKgarWait(p_FmPcd, tmpKgarReg);
  21847. + if (err)
  21848. + {
  21849. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  21850. + RETURN_ERROR(MINOR, err, NO_MSG);
  21851. + }
  21852. +
  21853. + fman_kg_write_sp(p_KgRegs, spReg, add);
  21854. +
  21855. + tmpKgarReg = FmPcdKgBuildWritePortSchemeBindActionReg(hardwarePortId);
  21856. +
  21857. + err = WriteKgarWait(p_FmPcd, tmpKgarReg);
  21858. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  21859. + return err;
  21860. +}
  21861. +
  21862. +static t_Error KgWriteCpp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, uint32_t cppReg)
  21863. +{
  21864. + struct fman_kg_regs *p_KgRegs;
  21865. + uint32_t tmpKgarReg, intFlags;
  21866. + t_Error err;
  21867. +
  21868. + p_KgRegs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  21869. +
  21870. + if (p_FmPcd->h_Hc)
  21871. + {
  21872. + err = FmHcKgWriteCpp(p_FmPcd->h_Hc, hardwarePortId, cppReg);
  21873. + return err;
  21874. + }
  21875. +
  21876. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  21877. + fman_kg_write_cpp(p_KgRegs, cppReg);
  21878. + tmpKgarReg = FmPcdKgBuildWritePortClsPlanBindActionReg(hardwarePortId);
  21879. + err = WriteKgarWait(p_FmPcd, tmpKgarReg);
  21880. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  21881. +
  21882. + return err;
  21883. +}
  21884. +
  21885. +static uint32_t BuildCppReg(t_FmPcd *p_FmPcd, uint8_t clsPlanGrpId)
  21886. +{
  21887. + uint32_t tmpKgpeCpp;
  21888. +
  21889. + tmpKgpeCpp = (uint32_t)(p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].baseEntry / 8);
  21890. + tmpKgpeCpp |= (uint32_t)(((p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].sizeOfGrp / 8) - 1) << FM_KG_PE_CPP_MASK_SHIFT);
  21891. +
  21892. + return tmpKgpeCpp;
  21893. +}
  21894. +
  21895. +static t_Error BindPortToClsPlanGrp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, uint8_t clsPlanGrpId)
  21896. +{
  21897. + uint32_t tmpKgpeCpp = 0;
  21898. +
  21899. + tmpKgpeCpp = BuildCppReg(p_FmPcd, clsPlanGrpId);
  21900. + return KgWriteCpp(p_FmPcd, hardwarePortId, tmpKgpeCpp);
  21901. +}
  21902. +
  21903. +static void UnbindPortToClsPlanGrp(t_FmPcd *p_FmPcd, uint8_t hardwarePortId)
  21904. +{
  21905. + KgWriteCpp(p_FmPcd, hardwarePortId, 0);
  21906. +}
  21907. +
  21908. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  21909. +static uint32_t ReadClsPlanBlockActionReg(uint8_t grpId)
  21910. +{
  21911. + return (uint32_t)(FM_KG_KGAR_GO |
  21912. + FM_KG_KGAR_READ |
  21913. + FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
  21914. + DUMMY_PORT_ID |
  21915. + ((uint32_t)grpId << FM_PCD_KG_KGAR_NUM_SHIFT) |
  21916. + FM_PCD_KG_KGAR_WSEL_MASK);
  21917. +
  21918. + /* if we ever want to write 1 by 1, use:
  21919. + sel = (uint8_t)(0x01 << (7- (entryId % CLS_PLAN_NUM_PER_GRP)));
  21920. + */
  21921. +}
  21922. +#endif /* (defined(DEBUG_ERRORS) && ... */
  21923. +
  21924. +static void PcdKgErrorException(t_Handle h_FmPcd)
  21925. +{
  21926. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  21927. + uint32_t event,schemeIndexes = 0, index = 0;
  21928. + struct fman_kg_regs *p_KgRegs;
  21929. +
  21930. + ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
  21931. + p_KgRegs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  21932. + fman_kg_get_event(p_KgRegs, &event, &schemeIndexes);
  21933. +
  21934. + if (event & FM_EX_KG_DOUBLE_ECC)
  21935. + p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC);
  21936. + if (event & FM_EX_KG_KEYSIZE_OVERFLOW)
  21937. + {
  21938. + if (schemeIndexes)
  21939. + {
  21940. + while (schemeIndexes)
  21941. + {
  21942. + if (schemeIndexes & 0x1)
  21943. + p_FmPcd->f_FmPcdIndexedException(p_FmPcd->h_App,e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW, (uint16_t)(31 - index));
  21944. + schemeIndexes >>= 1;
  21945. + index+=1;
  21946. + }
  21947. + }
  21948. + else /* this should happen only when interrupt is forced. */
  21949. + p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW);
  21950. + }
  21951. +}
  21952. +
  21953. +static t_Error KgInitGuest(t_FmPcd *p_FmPcd)
  21954. +{
  21955. + t_Error err = E_OK;
  21956. + t_FmPcdIpcKgSchemesParams kgAlloc;
  21957. + uint32_t replyLength;
  21958. + t_FmPcdIpcReply reply;
  21959. + t_FmPcdIpcMsg msg;
  21960. +
  21961. + ASSERT_COND(p_FmPcd->guestId != NCSW_MASTER_ID);
  21962. +
  21963. + /* in GUEST_PARTITION, we use the IPC */
  21964. + memset(&reply, 0, sizeof(reply));
  21965. + memset(&msg, 0, sizeof(msg));
  21966. + memset(&kgAlloc, 0, sizeof(t_FmPcdIpcKgSchemesParams));
  21967. + kgAlloc.numOfSchemes = p_FmPcd->p_FmPcdKg->numOfSchemes;
  21968. + kgAlloc.guestId = p_FmPcd->guestId;
  21969. + msg.msgId = FM_PCD_ALLOC_KG_SCHEMES;
  21970. + memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
  21971. + replyLength = sizeof(uint32_t) + p_FmPcd->p_FmPcdKg->numOfSchemes*sizeof(uint8_t);
  21972. + if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  21973. + (uint8_t*)&msg,
  21974. + sizeof(msg.msgId) + sizeof(kgAlloc),
  21975. + (uint8_t*)&reply,
  21976. + &replyLength,
  21977. + NULL,
  21978. + NULL)) != E_OK)
  21979. + RETURN_ERROR(MAJOR, err, NO_MSG);
  21980. + if (replyLength != (sizeof(uint32_t) + p_FmPcd->p_FmPcdKg->numOfSchemes*sizeof(uint8_t)))
  21981. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  21982. + memcpy(p_FmPcd->p_FmPcdKg->schemesIds, (uint8_t*)(reply.replyBody),p_FmPcd->p_FmPcdKg->numOfSchemes*sizeof(uint8_t));
  21983. +
  21984. + return (t_Error)reply.error;
  21985. +}
  21986. +
  21987. +static t_Error KgInitMaster(t_FmPcd *p_FmPcd)
  21988. +{
  21989. + t_Error err = E_OK;
  21990. + struct fman_kg_regs *p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  21991. +
  21992. + ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
  21993. +
  21994. + if (p_FmPcd->exceptions & FM_EX_KG_DOUBLE_ECC)
  21995. + FmEnableRamsEcc(p_FmPcd->h_Fm);
  21996. +
  21997. + fman_kg_init(p_Regs, p_FmPcd->exceptions, GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd));
  21998. +
  21999. + /* register even if no interrupts enabled, to allow future enablement */
  22000. + FmRegisterIntr(p_FmPcd->h_Fm,
  22001. + e_FM_MOD_KG,
  22002. + 0,
  22003. + e_FM_INTR_TYPE_ERR,
  22004. + PcdKgErrorException,
  22005. + p_FmPcd);
  22006. +
  22007. + fman_kg_enable_scheme_interrupts(p_Regs);
  22008. +
  22009. + if (p_FmPcd->p_FmPcdKg->numOfSchemes)
  22010. + {
  22011. + err = FmPcdKgAllocSchemes(p_FmPcd,
  22012. + p_FmPcd->p_FmPcdKg->numOfSchemes,
  22013. + p_FmPcd->guestId,
  22014. + p_FmPcd->p_FmPcdKg->schemesIds);
  22015. + if (err)
  22016. + RETURN_ERROR(MINOR, err, NO_MSG);
  22017. + }
  22018. +
  22019. + return E_OK;
  22020. +}
  22021. +
  22022. +static void ValidateSchemeSw(t_FmPcdKgScheme *p_Scheme)
  22023. +{
  22024. + ASSERT_COND(!p_Scheme->valid);
  22025. + if (p_Scheme->netEnvId != ILLEGAL_NETENV)
  22026. + FmPcdIncNetEnvOwners(p_Scheme->h_FmPcd, p_Scheme->netEnvId);
  22027. + p_Scheme->valid = TRUE;
  22028. +}
  22029. +
  22030. +static t_Error InvalidateSchemeSw(t_FmPcdKgScheme *p_Scheme)
  22031. +{
  22032. + if (p_Scheme->owners)
  22033. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Trying to delete a scheme that has ports bound to"));
  22034. +
  22035. + if (p_Scheme->netEnvId != ILLEGAL_NETENV)
  22036. + FmPcdDecNetEnvOwners(p_Scheme->h_FmPcd, p_Scheme->netEnvId);
  22037. + p_Scheme->valid = FALSE;
  22038. +
  22039. + return E_OK;
  22040. +}
  22041. +
  22042. +static t_Error BuildSchemeRegs(t_FmPcdKgScheme *p_Scheme,
  22043. + t_FmPcdKgSchemeParams *p_SchemeParams,
  22044. + struct fman_kg_scheme_regs *p_SchemeRegs)
  22045. +{
  22046. + t_FmPcd *p_FmPcd = (t_FmPcd *)(p_Scheme->h_FmPcd);
  22047. + uint32_t grpBits = 0;
  22048. + uint8_t grpBase;
  22049. + bool direct=TRUE, absolute=FALSE;
  22050. + uint16_t profileId=0, numOfProfiles=0, relativeProfileId;
  22051. + t_Error err = E_OK;
  22052. + int i = 0;
  22053. + t_NetEnvParams netEnvParams;
  22054. + uint32_t tmpReg, fqbTmp = 0, ppcTmp = 0, selectTmp, maskTmp, knownTmp, genTmp;
  22055. + t_FmPcdKgKeyExtractAndHashParams *p_KeyAndHash = NULL;
  22056. + uint8_t j, curr, idx;
  22057. + uint8_t id, shift=0, code=0, offset=0, size=0;
  22058. + t_FmPcdExtractEntry *p_Extract = NULL;
  22059. + t_FmPcdKgExtractedOrParams *p_ExtractOr;
  22060. + bool generic = FALSE;
  22061. + t_KnownFieldsMasks bitMask;
  22062. + e_FmPcdKgExtractDfltSelect swDefault = (e_FmPcdKgExtractDfltSelect)0;
  22063. + t_FmPcdKgSchemesExtracts *p_LocalExtractsArray;
  22064. + uint8_t numOfSwDefaults = 0;
  22065. + t_FmPcdKgExtractDflt swDefaults[NUM_OF_SW_DEFAULTS];
  22066. + uint8_t currGenId = 0;
  22067. +
  22068. + memset(swDefaults, 0, NUM_OF_SW_DEFAULTS*sizeof(t_FmPcdKgExtractDflt));
  22069. + memset(p_SchemeRegs, 0, sizeof(struct fman_kg_scheme_regs));
  22070. +
  22071. + if (p_SchemeParams->netEnvParams.numOfDistinctionUnits > FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  22072. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  22073. + ("numOfDistinctionUnits should not exceed %d", FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS));
  22074. +
  22075. + /* by netEnv parameters, get match vector */
  22076. + if (!p_SchemeParams->alwaysDirect)
  22077. + {
  22078. + p_Scheme->netEnvId = FmPcdGetNetEnvId(p_SchemeParams->netEnvParams.h_NetEnv);
  22079. + netEnvParams.netEnvId = p_Scheme->netEnvId;
  22080. + netEnvParams.numOfDistinctionUnits = p_SchemeParams->netEnvParams.numOfDistinctionUnits;
  22081. + memcpy(netEnvParams.unitIds, p_SchemeParams->netEnvParams.unitIds, (sizeof(uint8_t))*p_SchemeParams->netEnvParams.numOfDistinctionUnits);
  22082. + err = PcdGetUnitsVector(p_FmPcd, &netEnvParams);
  22083. + if (err)
  22084. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  22085. + p_Scheme->matchVector = netEnvParams.vector;
  22086. + }
  22087. + else
  22088. + {
  22089. + p_Scheme->matchVector = SCHEME_ALWAYS_DIRECT;
  22090. + p_Scheme->netEnvId = ILLEGAL_NETENV;
  22091. + }
  22092. +
  22093. + if (p_SchemeParams->nextEngine == e_FM_PCD_INVALID)
  22094. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next Engine of the scheme is not Valid"));
  22095. +
  22096. + if (p_SchemeParams->bypassFqidGeneration)
  22097. + {
  22098. +#ifdef FM_KG_NO_BYPASS_FQID_GEN
  22099. + if ((p_FmPcd->fmRevInfo.majorRev != 4) && (p_FmPcd->fmRevInfo.majorRev < 6))
  22100. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("bypassFqidGeneration."));
  22101. +#endif /* FM_KG_NO_BYPASS_FQID_GEN */
  22102. + if (p_SchemeParams->baseFqid)
  22103. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("baseFqid set for a scheme that does not generate an FQID"));
  22104. + }
  22105. + else
  22106. + if (!p_SchemeParams->baseFqid)
  22107. + DBG(WARNING, ("baseFqid is 0."));
  22108. +
  22109. + if (p_SchemeParams->nextEngine == e_FM_PCD_PLCR)
  22110. + {
  22111. + direct = p_SchemeParams->kgNextEngineParams.plcrProfile.direct;
  22112. + p_Scheme->directPlcr = direct;
  22113. + absolute = (bool)(p_SchemeParams->kgNextEngineParams.plcrProfile.sharedProfile ? TRUE : FALSE);
  22114. + if (!direct && absolute)
  22115. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Indirect policing is not available when profile is shared."));
  22116. +
  22117. + if (direct)
  22118. + {
  22119. + profileId = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.directRelativeProfileId;
  22120. + numOfProfiles = 1;
  22121. + }
  22122. + else
  22123. + {
  22124. + profileId = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.indirectProfile.fqidOffsetRelativeProfileIdBase;
  22125. + shift = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.indirectProfile.fqidOffsetShift;
  22126. + numOfProfiles = p_SchemeParams->kgNextEngineParams.plcrProfile.profileSelect.indirectProfile.numOfProfiles;
  22127. + }
  22128. + }
  22129. +
  22130. + if (p_SchemeParams->nextEngine == e_FM_PCD_CC)
  22131. + {
  22132. +#ifdef FM_KG_NO_BYPASS_PLCR_PROFILE_GEN
  22133. + if ((p_SchemeParams->kgNextEngineParams.cc.plcrNext) && (p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration))
  22134. + {
  22135. + if ((p_FmPcd->fmRevInfo.majorRev != 4) && (p_FmPcd->fmRevInfo.majorRev < 6))
  22136. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("bypassPlcrProfileGeneration."));
  22137. + }
  22138. +#endif /* FM_KG_NO_BYPASS_PLCR_PROFILE_GEN */
  22139. +
  22140. + err = FmPcdCcGetGrpParams(p_SchemeParams->kgNextEngineParams.cc.h_CcTree,
  22141. + p_SchemeParams->kgNextEngineParams.cc.grpId,
  22142. + &grpBits,
  22143. + &grpBase);
  22144. + if (err)
  22145. + RETURN_ERROR(MAJOR, err, NO_MSG);
  22146. + p_Scheme->ccUnits = grpBits;
  22147. +
  22148. + if ((p_SchemeParams->kgNextEngineParams.cc.plcrNext) &&
  22149. + (!p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration))
  22150. + {
  22151. + if (p_SchemeParams->kgNextEngineParams.cc.plcrProfile.sharedProfile)
  22152. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Shared profile may not be used after Coarse classification."));
  22153. + absolute = FALSE;
  22154. + direct = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.direct;
  22155. + if (direct)
  22156. + {
  22157. + profileId = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.directRelativeProfileId;
  22158. + numOfProfiles = 1;
  22159. + }
  22160. + else
  22161. + {
  22162. + profileId = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.indirectProfile.fqidOffsetRelativeProfileIdBase;
  22163. + shift = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.indirectProfile.fqidOffsetShift;
  22164. + numOfProfiles = p_SchemeParams->kgNextEngineParams.cc.plcrProfile.profileSelect.indirectProfile.numOfProfiles;
  22165. + }
  22166. + }
  22167. + }
  22168. +
  22169. + /* if policer is used directly after KG, or after CC */
  22170. + if ((p_SchemeParams->nextEngine == e_FM_PCD_PLCR) ||
  22171. + ((p_SchemeParams->nextEngine == e_FM_PCD_CC) &&
  22172. + (p_SchemeParams->kgNextEngineParams.cc.plcrNext) &&
  22173. + (!p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration)))
  22174. + {
  22175. + /* if private policer profile, it may be uninitialized yet, therefore no checks are done at this stage */
  22176. + if (absolute)
  22177. + {
  22178. + /* for absolute direct policy only, */
  22179. + relativeProfileId = profileId;
  22180. + err = FmPcdPlcrGetAbsoluteIdByProfileParams((t_Handle)p_FmPcd,e_FM_PCD_PLCR_SHARED,NULL, relativeProfileId, &profileId);
  22181. + if (err)
  22182. + RETURN_ERROR(MAJOR, err, ("Shared profile not valid offset"));
  22183. + if (!FmPcdPlcrIsProfileValid(p_FmPcd, profileId))
  22184. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Shared profile not valid."));
  22185. + p_Scheme->relativeProfileId = profileId;
  22186. + }
  22187. + else
  22188. + {
  22189. + /* save relative profile id's for later check */
  22190. + p_Scheme->nextRelativePlcrProfile = TRUE;
  22191. + p_Scheme->relativeProfileId = profileId;
  22192. + p_Scheme->numOfProfiles = numOfProfiles;
  22193. + }
  22194. + }
  22195. + else
  22196. + {
  22197. + /* if policer is NOT going to be used after KG at all than if bypassFqidGeneration
  22198. + is set, we do not need numOfUsedExtractedOrs and hashDistributionNumOfFqids */
  22199. + if (p_SchemeParams->bypassFqidGeneration && p_SchemeParams->numOfUsedExtractedOrs)
  22200. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  22201. + ("numOfUsedExtractedOrs is set in a scheme that does not generate FQID or policer profile ID"));
  22202. + if (p_SchemeParams->bypassFqidGeneration &&
  22203. + p_SchemeParams->useHash &&
  22204. + p_SchemeParams->keyExtractAndHashParams.hashDistributionNumOfFqids)
  22205. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  22206. + ("hashDistributionNumOfFqids is set in a scheme that does not generate FQID or policer profile ID"));
  22207. + }
  22208. +
  22209. + /* configure all 21 scheme registers */
  22210. + tmpReg = KG_SCH_MODE_EN;
  22211. + switch (p_SchemeParams->nextEngine)
  22212. + {
  22213. + case (e_FM_PCD_PLCR):
  22214. + /* add to mode register - NIA */
  22215. + tmpReg |= KG_SCH_MODE_NIA_PLCR;
  22216. + tmpReg |= NIA_ENG_PLCR;
  22217. + tmpReg |= (uint32_t)(p_SchemeParams->kgNextEngineParams.plcrProfile.sharedProfile ? NIA_PLCR_ABSOLUTE:0);
  22218. + /* initialize policer profile command - */
  22219. + /* configure kgse_ppc */
  22220. + if (direct)
  22221. + /* use profileId as base, other fields are 0 */
  22222. + p_SchemeRegs->kgse_ppc = (uint32_t)profileId;
  22223. + else
  22224. + {
  22225. + if (shift > MAX_PP_SHIFT)
  22226. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fqidOffsetShift may not be larger than %d", MAX_PP_SHIFT));
  22227. +
  22228. + if (!numOfProfiles || !POWER_OF_2(numOfProfiles))
  22229. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfProfiles must not be 0 and must be a power of 2"));
  22230. +
  22231. + ppcTmp = ((uint32_t)shift << KG_SCH_PP_SHIFT_HIGH_SHIFT) & KG_SCH_PP_SHIFT_HIGH;
  22232. + ppcTmp |= ((uint32_t)shift << KG_SCH_PP_SHIFT_LOW_SHIFT) & KG_SCH_PP_SHIFT_LOW;
  22233. + ppcTmp |= ((uint32_t)(numOfProfiles-1) << KG_SCH_PP_MASK_SHIFT);
  22234. + ppcTmp |= (uint32_t)profileId;
  22235. +
  22236. + p_SchemeRegs->kgse_ppc = ppcTmp;
  22237. + }
  22238. + break;
  22239. + case (e_FM_PCD_CC):
  22240. + /* mode reg - define NIA */
  22241. + tmpReg |= (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC);
  22242. +
  22243. + p_SchemeRegs->kgse_ccbs = grpBits;
  22244. + tmpReg |= (uint32_t)(grpBase << KG_SCH_MODE_CCOBASE_SHIFT);
  22245. +
  22246. + if (p_SchemeParams->kgNextEngineParams.cc.plcrNext)
  22247. + {
  22248. + if (!p_SchemeParams->kgNextEngineParams.cc.bypassPlcrProfileGeneration)
  22249. + {
  22250. + /* find out if absolute or relative */
  22251. + if (absolute)
  22252. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("It is illegal to request a shared profile in a scheme that is in a KG->CC->PLCR flow"));
  22253. + if (direct)
  22254. + {
  22255. + /* mask = 0, base = directProfileId */
  22256. + p_SchemeRegs->kgse_ppc = (uint32_t)profileId;
  22257. + }
  22258. + else
  22259. + {
  22260. + if (shift > MAX_PP_SHIFT)
  22261. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fqidOffsetShift may not be larger than %d", MAX_PP_SHIFT));
  22262. + if (!numOfProfiles || !POWER_OF_2(numOfProfiles))
  22263. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfProfiles must not be 0 and must be a power of 2"));
  22264. +
  22265. + ppcTmp = ((uint32_t)shift << KG_SCH_PP_SHIFT_HIGH_SHIFT) & KG_SCH_PP_SHIFT_HIGH;
  22266. + ppcTmp |= ((uint32_t)shift << KG_SCH_PP_SHIFT_LOW_SHIFT) & KG_SCH_PP_SHIFT_LOW;
  22267. + ppcTmp |= ((uint32_t)(numOfProfiles-1) << KG_SCH_PP_MASK_SHIFT);
  22268. + ppcTmp |= (uint32_t)profileId;
  22269. +
  22270. + p_SchemeRegs->kgse_ppc = ppcTmp;
  22271. + }
  22272. + }
  22273. + }
  22274. + break;
  22275. + case (e_FM_PCD_DONE):
  22276. + if (p_SchemeParams->kgNextEngineParams.doneAction == e_FM_PCD_DROP_FRAME)
  22277. + tmpReg |= GET_NIA_BMI_AC_DISCARD_FRAME(p_FmPcd);
  22278. + else
  22279. + tmpReg |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
  22280. + break;
  22281. + default:
  22282. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Next engine not supported"));
  22283. + }
  22284. + p_SchemeRegs->kgse_mode = tmpReg;
  22285. +
  22286. + p_SchemeRegs->kgse_mv = p_Scheme->matchVector;
  22287. +
  22288. +#if (DPAA_VERSION >= 11)
  22289. + if (p_SchemeParams->overrideStorageProfile)
  22290. + {
  22291. + p_SchemeRegs->kgse_om |= KG_SCH_OM_VSPE;
  22292. +
  22293. + if (p_SchemeParams->storageProfile.direct)
  22294. + {
  22295. + profileId = p_SchemeParams->storageProfile.profileSelect.directRelativeProfileId;
  22296. + shift = 0;
  22297. + numOfProfiles = 1;
  22298. + }
  22299. + else
  22300. + {
  22301. + profileId = p_SchemeParams->storageProfile.profileSelect.indirectProfile.fqidOffsetRelativeProfileIdBase;
  22302. + shift = p_SchemeParams->storageProfile.profileSelect.indirectProfile.fqidOffsetShift;
  22303. + numOfProfiles = p_SchemeParams->storageProfile.profileSelect.indirectProfile.numOfProfiles;
  22304. + }
  22305. + if (shift > MAX_SP_SHIFT)
  22306. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fqidOffsetShift may not be larger than %d", MAX_SP_SHIFT));
  22307. +
  22308. + if (!numOfProfiles || !POWER_OF_2(numOfProfiles))
  22309. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfProfiles must not be 0 and must be a power of 2"));
  22310. +
  22311. + tmpReg = (uint32_t)shift << KG_SCH_VSP_SHIFT;
  22312. + tmpReg |= ((uint32_t)(numOfProfiles-1) << KG_SCH_VSP_MASK_SHIFT);
  22313. + tmpReg |= (uint32_t)profileId;
  22314. +
  22315. +
  22316. + p_SchemeRegs->kgse_vsp = tmpReg;
  22317. +
  22318. + p_Scheme->vspe = TRUE;
  22319. +
  22320. + }
  22321. + else
  22322. + p_SchemeRegs->kgse_vsp = KG_SCH_VSP_NO_KSP_EN;
  22323. +#endif /* (DPAA_VERSION >= 11) */
  22324. +
  22325. + if (p_SchemeParams->useHash)
  22326. + {
  22327. + p_KeyAndHash = &p_SchemeParams->keyExtractAndHashParams;
  22328. +
  22329. + if (p_KeyAndHash->numOfUsedExtracts >= FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY)
  22330. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfUsedExtracts out of range"));
  22331. +
  22332. + /* configure kgse_dv0 */
  22333. + p_SchemeRegs->kgse_dv0 = p_KeyAndHash->privateDflt0;
  22334. +
  22335. + /* configure kgse_dv1 */
  22336. + p_SchemeRegs->kgse_dv1 = p_KeyAndHash->privateDflt1;
  22337. +
  22338. + if (!p_SchemeParams->bypassFqidGeneration)
  22339. + {
  22340. + if (!p_KeyAndHash->hashDistributionNumOfFqids || !POWER_OF_2(p_KeyAndHash->hashDistributionNumOfFqids))
  22341. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("hashDistributionNumOfFqids must not be 0 and must be a power of 2"));
  22342. + if ((p_KeyAndHash->hashDistributionNumOfFqids-1) & p_SchemeParams->baseFqid)
  22343. + DBG(WARNING, ("baseFqid unaligned. Distribution may result in less than hashDistributionNumOfFqids queues."));
  22344. + }
  22345. +
  22346. + /* configure kgse_ekdv */
  22347. + tmpReg = 0;
  22348. + for ( i=0 ;i<p_KeyAndHash->numOfUsedDflts ; i++)
  22349. + {
  22350. + switch (p_KeyAndHash->dflts[i].type)
  22351. + {
  22352. + case (e_FM_PCD_KG_MAC_ADDR):
  22353. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_MAC_ADDR_SHIFT);
  22354. + break;
  22355. + case (e_FM_PCD_KG_TCI):
  22356. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_TCI_SHIFT);
  22357. + break;
  22358. + case (e_FM_PCD_KG_ENET_TYPE):
  22359. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_ENET_TYPE_SHIFT);
  22360. + break;
  22361. + case (e_FM_PCD_KG_PPP_SESSION_ID):
  22362. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_PPP_SESSION_ID_SHIFT);
  22363. + break;
  22364. + case (e_FM_PCD_KG_PPP_PROTOCOL_ID):
  22365. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_PPP_PROTOCOL_ID_SHIFT);
  22366. + break;
  22367. + case (e_FM_PCD_KG_MPLS_LABEL):
  22368. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_MPLS_LABEL_SHIFT);
  22369. + break;
  22370. + case (e_FM_PCD_KG_IP_ADDR):
  22371. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_IP_ADDR_SHIFT);
  22372. + break;
  22373. + case (e_FM_PCD_KG_PROTOCOL_TYPE):
  22374. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_PROTOCOL_TYPE_SHIFT);
  22375. + break;
  22376. + case (e_FM_PCD_KG_IP_TOS_TC):
  22377. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_IP_TOS_TC_SHIFT);
  22378. + break;
  22379. + case (e_FM_PCD_KG_IPV6_FLOW_LABEL):
  22380. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_L4_PORT_SHIFT);
  22381. + break;
  22382. + case (e_FM_PCD_KG_IPSEC_SPI):
  22383. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_IPSEC_SPI_SHIFT);
  22384. + break;
  22385. + case (e_FM_PCD_KG_L4_PORT):
  22386. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_L4_PORT_SHIFT);
  22387. + break;
  22388. + case (e_FM_PCD_KG_TCP_FLAG):
  22389. + tmpReg |= (p_KeyAndHash->dflts[i].dfltSelect << KG_SCH_DEF_TCP_FLAG_SHIFT);
  22390. + break;
  22391. + case (e_FM_PCD_KG_GENERIC_FROM_DATA):
  22392. + swDefaults[numOfSwDefaults].type = e_FM_PCD_KG_GENERIC_FROM_DATA;
  22393. + swDefaults[numOfSwDefaults].dfltSelect = p_KeyAndHash->dflts[i].dfltSelect;
  22394. + numOfSwDefaults ++;
  22395. + break;
  22396. + case (e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V):
  22397. + swDefaults[numOfSwDefaults].type = e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V;
  22398. + swDefaults[numOfSwDefaults].dfltSelect = p_KeyAndHash->dflts[i].dfltSelect;
  22399. + numOfSwDefaults ++;
  22400. + break;
  22401. + case (e_FM_PCD_KG_GENERIC_NOT_FROM_DATA):
  22402. + swDefaults[numOfSwDefaults].type = e_FM_PCD_KG_GENERIC_NOT_FROM_DATA;
  22403. + swDefaults[numOfSwDefaults].dfltSelect = p_KeyAndHash->dflts[i].dfltSelect;
  22404. + numOfSwDefaults ++;
  22405. + break;
  22406. + default:
  22407. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  22408. + }
  22409. + }
  22410. + p_SchemeRegs->kgse_ekdv = tmpReg;
  22411. +
  22412. + p_LocalExtractsArray = (t_FmPcdKgSchemesExtracts *)XX_Malloc(sizeof(t_FmPcdKgSchemesExtracts));
  22413. + if (!p_LocalExtractsArray)
  22414. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
  22415. +
  22416. + /* configure kgse_ekfc and kgse_gec */
  22417. + knownTmp = 0;
  22418. + for ( i=0 ;i<p_KeyAndHash->numOfUsedExtracts ; i++)
  22419. + {
  22420. + p_Extract = &p_KeyAndHash->extractArray[i];
  22421. + switch (p_Extract->type)
  22422. + {
  22423. + case (e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO):
  22424. + knownTmp |= KG_SCH_KN_PORT_ID;
  22425. + /* save in driver structure */
  22426. + p_LocalExtractsArray->extractsArray[i].id = GetKnownFieldId(KG_SCH_KN_PORT_ID);
  22427. + p_LocalExtractsArray->extractsArray[i].known = TRUE;
  22428. + break;
  22429. + case (e_FM_PCD_EXTRACT_BY_HDR):
  22430. + switch (p_Extract->extractByHdr.hdr)
  22431. + {
  22432. +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  22433. + case (HEADER_TYPE_UDP_LITE):
  22434. + p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
  22435. + break;
  22436. +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  22437. + case (HEADER_TYPE_UDP_ENCAP_ESP):
  22438. + switch (p_Extract->extractByHdr.type)
  22439. + {
  22440. + case (e_FM_PCD_EXTRACT_FROM_HDR):
  22441. + /* case where extraction from ESP only */
  22442. + if (p_Extract->extractByHdr.extractByHdrType.fromHdr.offset >= UDP_HEADER_SIZE)
  22443. + {
  22444. + p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
  22445. + p_Extract->extractByHdr.extractByHdrType.fromHdr.offset -= UDP_HEADER_SIZE;
  22446. + p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
  22447. + }
  22448. + else
  22449. + {
  22450. + p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
  22451. + p_Extract->extractByHdr.ignoreProtocolValidation = FALSE;
  22452. + }
  22453. + break;
  22454. + case (e_FM_PCD_EXTRACT_FROM_FIELD):
  22455. + switch (p_Extract->extractByHdr.extractByHdrType.fromField.field.udpEncapEsp)
  22456. + {
  22457. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC):
  22458. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST):
  22459. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN):
  22460. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM):
  22461. + p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
  22462. + break;
  22463. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI):
  22464. + p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
  22465. + p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
  22466. + /*p_Extract->extractByHdr.extractByHdrType.fromField.offset += ESP_SPI_OFFSET;*/
  22467. + p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
  22468. + break;
  22469. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM):
  22470. + p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
  22471. + p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
  22472. + p_Extract->extractByHdr.extractByHdrType.fromField.offset += ESP_SEQ_NUM_OFFSET;
  22473. + p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
  22474. + break;
  22475. + }
  22476. + break;
  22477. + case (e_FM_PCD_EXTRACT_FULL_FIELD):
  22478. + switch (p_Extract->extractByHdr.extractByHdrType.fullField.udpEncapEsp)
  22479. + {
  22480. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC):
  22481. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST):
  22482. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN):
  22483. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM):
  22484. + p_Extract->extractByHdr.hdr = HEADER_TYPE_UDP;
  22485. + break;
  22486. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI):
  22487. + p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
  22488. + p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
  22489. + p_Extract->extractByHdr.extractByHdrType.fromHdr.size = ESP_SPI_SIZE;
  22490. + p_Extract->extractByHdr.extractByHdrType.fromHdr.offset = ESP_SPI_OFFSET;
  22491. + p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
  22492. + break;
  22493. + case (NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM):
  22494. + p_Extract->extractByHdr.type = e_FM_PCD_EXTRACT_FROM_HDR;
  22495. + p_Extract->extractByHdr.hdr = FmPcdGetAliasHdr(p_FmPcd, p_Scheme->netEnvId, HEADER_TYPE_UDP_ENCAP_ESP);
  22496. + p_Extract->extractByHdr.extractByHdrType.fromHdr.size = ESP_SEQ_NUM_SIZE;
  22497. + p_Extract->extractByHdr.extractByHdrType.fromHdr.offset = ESP_SEQ_NUM_OFFSET;
  22498. + p_Extract->extractByHdr.ignoreProtocolValidation = TRUE;
  22499. + break;
  22500. + }
  22501. + break;
  22502. + }
  22503. + break;
  22504. + default:
  22505. + break;
  22506. + }
  22507. + switch (p_Extract->extractByHdr.type)
  22508. + {
  22509. + case (e_FM_PCD_EXTRACT_FROM_HDR):
  22510. + generic = TRUE;
  22511. + /* get the header code for the generic extract */
  22512. + code = GetGenHdrCode(p_Extract->extractByHdr.hdr, p_Extract->extractByHdr.hdrIndex, p_Extract->extractByHdr.ignoreProtocolValidation);
  22513. + /* set generic register fields */
  22514. + offset = p_Extract->extractByHdr.extractByHdrType.fromHdr.offset;
  22515. + size = p_Extract->extractByHdr.extractByHdrType.fromHdr.size;
  22516. + break;
  22517. + case (e_FM_PCD_EXTRACT_FROM_FIELD):
  22518. + generic = TRUE;
  22519. + /* get the field code for the generic extract */
  22520. + code = GetGenFieldCode(p_Extract->extractByHdr.hdr,
  22521. + p_Extract->extractByHdr.extractByHdrType.fromField.field, p_Extract->extractByHdr.ignoreProtocolValidation,p_Extract->extractByHdr.hdrIndex);
  22522. + offset = p_Extract->extractByHdr.extractByHdrType.fromField.offset;
  22523. + size = p_Extract->extractByHdr.extractByHdrType.fromField.size;
  22524. + break;
  22525. + case (e_FM_PCD_EXTRACT_FULL_FIELD):
  22526. + if (!p_Extract->extractByHdr.ignoreProtocolValidation)
  22527. + {
  22528. + /* if we have a known field for it - use it, otherwise use generic */
  22529. + bitMask = GetKnownProtMask(p_FmPcd, p_Extract->extractByHdr.hdr, p_Extract->extractByHdr.hdrIndex,
  22530. + p_Extract->extractByHdr.extractByHdrType.fullField);
  22531. + if (bitMask)
  22532. + {
  22533. + knownTmp |= bitMask;
  22534. + /* save in driver structure */
  22535. + p_LocalExtractsArray->extractsArray[i].id = GetKnownFieldId(bitMask);
  22536. + p_LocalExtractsArray->extractsArray[i].known = TRUE;
  22537. + }
  22538. + else
  22539. + generic = TRUE;
  22540. + }
  22541. + else
  22542. + generic = TRUE;
  22543. + if (generic)
  22544. + {
  22545. + /* tmp - till we cover more headers under generic */
  22546. + XX_Free(p_LocalExtractsArray);
  22547. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Full header selection not supported"));
  22548. + }
  22549. + break;
  22550. + default:
  22551. + XX_Free(p_LocalExtractsArray);
  22552. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  22553. + }
  22554. + break;
  22555. + case (e_FM_PCD_EXTRACT_NON_HDR):
  22556. + /* use generic */
  22557. + generic = TRUE;
  22558. + offset = 0;
  22559. + /* get the field code for the generic extract */
  22560. + code = GetGenCode(p_Extract->extractNonHdr.src, &offset);
  22561. + offset += p_Extract->extractNonHdr.offset;
  22562. + size = p_Extract->extractNonHdr.size;
  22563. + break;
  22564. + default:
  22565. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  22566. + }
  22567. +
  22568. + if (generic)
  22569. + {
  22570. + /* set generic register fields */
  22571. + if (currGenId >= FM_KG_NUM_OF_GENERIC_REGS)
  22572. + {
  22573. + XX_Free(p_LocalExtractsArray);
  22574. + RETURN_ERROR(MAJOR, E_FULL, ("Generic registers are fully used"));
  22575. + }
  22576. + if (!code)
  22577. + {
  22578. + XX_Free(p_LocalExtractsArray);
  22579. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
  22580. + }
  22581. +
  22582. + genTmp = KG_SCH_GEN_VALID;
  22583. + genTmp |= (uint32_t)(code << KG_SCH_GEN_HT_SHIFT);
  22584. + genTmp |= offset;
  22585. + if ((size > MAX_KG_SCH_SIZE) || (size < 1))
  22586. + {
  22587. + XX_Free(p_LocalExtractsArray);
  22588. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Illegal extraction (size out of range)"));
  22589. + }
  22590. + genTmp |= (uint32_t)((size - 1) << KG_SCH_GEN_SIZE_SHIFT);
  22591. + swDefault = GetGenericSwDefault(swDefaults, numOfSwDefaults, code);
  22592. + if (swDefault == e_FM_PCD_KG_DFLT_ILLEGAL)
  22593. + DBG(WARNING, ("No sw default configured"));
  22594. + else
  22595. + genTmp |= swDefault << KG_SCH_GEN_DEF_SHIFT;
  22596. +
  22597. + genTmp |= KG_SCH_GEN_MASK;
  22598. + p_SchemeRegs->kgse_gec[currGenId] = genTmp;
  22599. + /* save in driver structure */
  22600. + p_LocalExtractsArray->extractsArray[i].id = currGenId++;
  22601. + p_LocalExtractsArray->extractsArray[i].known = FALSE;
  22602. + generic = FALSE;
  22603. + }
  22604. + }
  22605. + p_SchemeRegs->kgse_ekfc = knownTmp;
  22606. +
  22607. + selectTmp = 0;
  22608. + maskTmp = 0xFFFFFFFF;
  22609. + /* configure kgse_bmch, kgse_bmcl and kgse_fqb */
  22610. +
  22611. + if (p_KeyAndHash->numOfUsedMasks > FM_PCD_KG_NUM_OF_EXTRACT_MASKS)
  22612. + {
  22613. + XX_Free(p_LocalExtractsArray);
  22614. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Only %d masks supported", FM_PCD_KG_NUM_OF_EXTRACT_MASKS));
  22615. + }
  22616. + for ( i=0 ;i<p_KeyAndHash->numOfUsedMasks ; i++)
  22617. + {
  22618. + /* Get the relative id of the extract (for known 0-0x1f, for generic 0-7) */
  22619. + id = p_LocalExtractsArray->extractsArray[p_KeyAndHash->masks[i].extractArrayIndex].id;
  22620. + /* Get the shift of the select field (depending on i) */
  22621. + GET_MASK_SEL_SHIFT(shift,i);
  22622. + if (p_LocalExtractsArray->extractsArray[p_KeyAndHash->masks[i].extractArrayIndex].known)
  22623. + selectTmp |= id << shift;
  22624. + else
  22625. + selectTmp |= (id + MASK_FOR_GENERIC_BASE_ID) << shift;
  22626. +
  22627. + /* Get the shift of the offset field (depending on i) - may
  22628. + be in kgse_bmch or in kgse_fqb (depending on i) */
  22629. + GET_MASK_OFFSET_SHIFT(shift,i);
  22630. + if (i<=1)
  22631. + selectTmp |= p_KeyAndHash->masks[i].offset << shift;
  22632. + else
  22633. + fqbTmp |= p_KeyAndHash->masks[i].offset << shift;
  22634. +
  22635. + /* Get the shift of the mask field (depending on i) */
  22636. + GET_MASK_SHIFT(shift,i);
  22637. + /* pass all bits */
  22638. + maskTmp |= KG_SCH_BITMASK_MASK << shift;
  22639. + /* clear bits that need masking */
  22640. + maskTmp &= ~(0xFF << shift) ;
  22641. + /* set mask bits */
  22642. + maskTmp |= (p_KeyAndHash->masks[i].mask << shift) ;
  22643. + }
  22644. + p_SchemeRegs->kgse_bmch = selectTmp;
  22645. + p_SchemeRegs->kgse_bmcl = maskTmp;
  22646. + /* kgse_fqb will be written t the end of the routine */
  22647. +
  22648. + /* configure kgse_hc */
  22649. + if (p_KeyAndHash->hashShift > MAX_HASH_SHIFT)
  22650. + {
  22651. + XX_Free(p_LocalExtractsArray);
  22652. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("hashShift must not be larger than %d", MAX_HASH_SHIFT));
  22653. + }
  22654. + if (p_KeyAndHash->hashDistributionFqidsShift > MAX_DIST_FQID_SHIFT)
  22655. + {
  22656. + XX_Free(p_LocalExtractsArray);
  22657. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("hashDistributionFqidsShift must not be larger than %d", MAX_DIST_FQID_SHIFT));
  22658. + }
  22659. +
  22660. + tmpReg = 0;
  22661. +
  22662. + tmpReg |= ((p_KeyAndHash->hashDistributionNumOfFqids - 1) << p_KeyAndHash->hashDistributionFqidsShift);
  22663. + tmpReg |= p_KeyAndHash->hashShift << KG_SCH_HASH_CONFIG_SHIFT_SHIFT;
  22664. +
  22665. + if (p_KeyAndHash->symmetricHash)
  22666. + {
  22667. + if ((!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_MACSRC) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_MACDST)) ||
  22668. + (!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPSRC1) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPDST1)) ||
  22669. + (!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPSRC2) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_IPDST2)) ||
  22670. + (!!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_L4PSRC) != !!(p_SchemeRegs->kgse_ekfc & KG_SCH_KN_L4PDST)))
  22671. + {
  22672. + XX_Free(p_LocalExtractsArray);
  22673. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("symmetricHash set but src/dest extractions missing"));
  22674. + }
  22675. + tmpReg |= KG_SCH_HASH_CONFIG_SYM;
  22676. + }
  22677. + p_SchemeRegs->kgse_hc = tmpReg;
  22678. +
  22679. + /* build the return array describing the order of the extractions */
  22680. +
  22681. + /* the last currGenId places of the array
  22682. + are for generic extracts that are always last.
  22683. + We now sort for the calculation of the order of the known
  22684. + extractions we sort the known extracts between orderedArray[0] and
  22685. + orderedArray[p_KeyAndHash->numOfUsedExtracts - currGenId - 1].
  22686. + for the calculation of the order of the generic extractions we use:
  22687. + num_of_generic - currGenId
  22688. + num_of_known - p_KeyAndHash->numOfUsedExtracts - currGenId
  22689. + first_generic_index = num_of_known */
  22690. + curr = 0;
  22691. + for (i=0;i<p_KeyAndHash->numOfUsedExtracts ; i++)
  22692. + {
  22693. + if (p_LocalExtractsArray->extractsArray[i].known)
  22694. + {
  22695. + ASSERT_COND(curr<(p_KeyAndHash->numOfUsedExtracts - currGenId));
  22696. + j = curr;
  22697. + /* id is the extract id (port id = 0, mac src = 1 etc.). the value in the array is the original
  22698. + index in the user's extractions array */
  22699. + /* we compare the id of the current extract with the id of the extract in the orderedArray[j-1]
  22700. + location */
  22701. + while ((j > 0) && (p_LocalExtractsArray->extractsArray[i].id <
  22702. + p_LocalExtractsArray->extractsArray[p_Scheme->orderedArray[j-1]].id))
  22703. + {
  22704. + p_Scheme->orderedArray[j] =
  22705. + p_Scheme->orderedArray[j-1];
  22706. + j--;
  22707. + }
  22708. + p_Scheme->orderedArray[j] = (uint8_t)i;
  22709. + curr++;
  22710. + }
  22711. + else
  22712. + {
  22713. + /* index is first_generic_index + generic index (id) */
  22714. + idx = (uint8_t)(p_KeyAndHash->numOfUsedExtracts - currGenId + p_LocalExtractsArray->extractsArray[i].id);
  22715. + ASSERT_COND(idx < FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY);
  22716. + p_Scheme->orderedArray[idx]= (uint8_t)i;
  22717. + }
  22718. + }
  22719. + XX_Free(p_LocalExtractsArray);
  22720. + }
  22721. + else
  22722. + {
  22723. + /* clear all unused registers: */
  22724. + p_SchemeRegs->kgse_ekfc = 0;
  22725. + p_SchemeRegs->kgse_ekdv = 0;
  22726. + p_SchemeRegs->kgse_bmch = 0;
  22727. + p_SchemeRegs->kgse_bmcl = 0;
  22728. + p_SchemeRegs->kgse_hc = 0;
  22729. + p_SchemeRegs->kgse_dv0 = 0;
  22730. + p_SchemeRegs->kgse_dv1 = 0;
  22731. + }
  22732. +
  22733. + if (p_SchemeParams->bypassFqidGeneration)
  22734. + p_SchemeRegs->kgse_hc |= KG_SCH_HASH_CONFIG_NO_FQID;
  22735. +
  22736. + /* configure kgse_spc */
  22737. + if ( p_SchemeParams->schemeCounter.update)
  22738. + p_SchemeRegs->kgse_spc = p_SchemeParams->schemeCounter.value;
  22739. +
  22740. +
  22741. + /* check that are enough generic registers */
  22742. + if (p_SchemeParams->numOfUsedExtractedOrs + currGenId > FM_KG_NUM_OF_GENERIC_REGS)
  22743. + RETURN_ERROR(MAJOR, E_FULL, ("Generic registers are fully used"));
  22744. +
  22745. + /* extracted OR mask on Qid */
  22746. + for ( i=0 ;i<p_SchemeParams->numOfUsedExtractedOrs ; i++)
  22747. + {
  22748. +
  22749. + p_Scheme->extractedOrs = TRUE;
  22750. + /* configure kgse_gec[i] */
  22751. + p_ExtractOr = &p_SchemeParams->extractedOrs[i];
  22752. + switch (p_ExtractOr->type)
  22753. + {
  22754. + case (e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO):
  22755. + code = KG_SCH_GEN_PARSE_RESULT_N_FQID;
  22756. + offset = 0;
  22757. + break;
  22758. + case (e_FM_PCD_EXTRACT_BY_HDR):
  22759. + /* get the header code for the generic extract */
  22760. + code = GetGenHdrCode(p_ExtractOr->extractByHdr.hdr, p_ExtractOr->extractByHdr.hdrIndex, p_ExtractOr->extractByHdr.ignoreProtocolValidation);
  22761. + /* set generic register fields */
  22762. + offset = p_ExtractOr->extractionOffset;
  22763. + break;
  22764. + case (e_FM_PCD_EXTRACT_NON_HDR):
  22765. + /* get the field code for the generic extract */
  22766. + offset = 0;
  22767. + code = GetGenCode(p_ExtractOr->src, &offset);
  22768. + offset += p_ExtractOr->extractionOffset;
  22769. + break;
  22770. + default:
  22771. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  22772. + }
  22773. +
  22774. + /* set generic register fields */
  22775. + if (!code)
  22776. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
  22777. + genTmp = KG_SCH_GEN_EXTRACT_TYPE | KG_SCH_GEN_VALID;
  22778. + genTmp |= (uint32_t)(code << KG_SCH_GEN_HT_SHIFT);
  22779. + genTmp |= offset;
  22780. + if (!!p_ExtractOr->bitOffsetInFqid == !!p_ExtractOr->bitOffsetInPlcrProfile)
  22781. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, (" extracted byte must effect either FQID or Policer profile"));
  22782. +
  22783. + /************************************************************************************
  22784. + bitOffsetInFqid and bitOffsetInPolicerProfile are translated to rotate parameter
  22785. + in the following way:
  22786. +
  22787. + Driver API and implementation:
  22788. + ==============================
  22789. + FQID: extracted OR byte may be shifted right 1-31 bits to effect parts of the FQID.
  22790. + if shifted less than 8 bits, or more than 24 bits a mask is set on the bits that
  22791. + are not overlapping FQID.
  22792. + ------------------------
  22793. + | FQID (24) |
  22794. + ------------------------
  22795. + --------
  22796. + | | extracted OR byte
  22797. + --------
  22798. +
  22799. + Policer Profile: extracted OR byte may be shifted right 1-15 bits to effect parts of the
  22800. + PP id. Unless shifted exactly 8 bits to overlap the PP id, a mask is set on the bits that
  22801. + are not overlapping PP id.
  22802. +
  22803. + --------
  22804. + | PP (8) |
  22805. + --------
  22806. + --------
  22807. + | | extracted OR byte
  22808. + --------
  22809. +
  22810. + HW implementation
  22811. + =================
  22812. + FQID and PP construct a 32 bit word in the way describe below. Extracted byte is located
  22813. + as the highest byte of that word and may be rotated to effect any part os the FQID or
  22814. + the PP.
  22815. + ------------------------ --------
  22816. + | FQID (24) || PP (8) |
  22817. + ------------------------ --------
  22818. + --------
  22819. + | | extracted OR byte
  22820. + --------
  22821. +
  22822. + ************************************************************************************/
  22823. +
  22824. + if (p_ExtractOr->bitOffsetInFqid)
  22825. + {
  22826. + if (p_ExtractOr->bitOffsetInFqid > MAX_KG_SCH_FQID_BIT_OFFSET )
  22827. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal extraction (bitOffsetInFqid out of range)"));
  22828. + if (p_ExtractOr->bitOffsetInFqid<8)
  22829. + genTmp |= (uint32_t)((p_ExtractOr->bitOffsetInFqid+24) << KG_SCH_GEN_SIZE_SHIFT);
  22830. + else
  22831. + genTmp |= (uint32_t)((p_ExtractOr->bitOffsetInFqid-8) << KG_SCH_GEN_SIZE_SHIFT);
  22832. + p_ExtractOr->mask &= GetExtractedOrMask(p_ExtractOr->bitOffsetInFqid, TRUE);
  22833. + }
  22834. + else /* effect policer profile */
  22835. + {
  22836. + if (p_ExtractOr->bitOffsetInPlcrProfile > MAX_KG_SCH_PP_BIT_OFFSET )
  22837. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal extraction (bitOffsetInPlcrProfile out of range)"));
  22838. + p_Scheme->bitOffsetInPlcrProfile = p_ExtractOr->bitOffsetInPlcrProfile;
  22839. + genTmp |= (uint32_t)((p_ExtractOr->bitOffsetInPlcrProfile+16) << KG_SCH_GEN_SIZE_SHIFT);
  22840. + p_ExtractOr->mask &= GetExtractedOrMask(p_ExtractOr->bitOffsetInPlcrProfile, FALSE);
  22841. + }
  22842. +
  22843. + genTmp |= (uint32_t)(p_ExtractOr->extractionOffset << KG_SCH_GEN_DEF_SHIFT);
  22844. + /* clear bits that need masking */
  22845. + genTmp &= ~KG_SCH_GEN_MASK ;
  22846. + /* set mask bits */
  22847. + genTmp |= (uint32_t)(p_ExtractOr->mask << KG_SCH_GEN_MASK_SHIFT);
  22848. + p_SchemeRegs->kgse_gec[currGenId++] = genTmp;
  22849. +
  22850. + }
  22851. + /* clear all unused GEC registers */
  22852. + for ( i=currGenId ;i<FM_KG_NUM_OF_GENERIC_REGS ; i++)
  22853. + p_SchemeRegs->kgse_gec[i] = 0;
  22854. +
  22855. + /* add base Qid for this scheme */
  22856. + /* add configuration for kgse_fqb */
  22857. + if (p_SchemeParams->baseFqid & ~0x00FFFFFF)
  22858. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("baseFqid must be between 1 and 2^24-1"));
  22859. +
  22860. + fqbTmp |= p_SchemeParams->baseFqid;
  22861. + p_SchemeRegs->kgse_fqb = fqbTmp;
  22862. +
  22863. + p_Scheme->nextEngine = p_SchemeParams->nextEngine;
  22864. + p_Scheme->doneAction = p_SchemeParams->kgNextEngineParams.doneAction;
  22865. +
  22866. + return E_OK;
  22867. +}
  22868. +
  22869. +
  22870. +/*****************************************************************************/
  22871. +/* Inter-module API routines */
  22872. +/*****************************************************************************/
  22873. +
  22874. +t_Error FmPcdKgBuildClsPlanGrp(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_Grp, t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet)
  22875. +{
  22876. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  22877. + t_FmPcdKgClsPlanGrp *p_ClsPlanGrp;
  22878. + t_FmPcdIpcKgClsPlanParams kgAlloc;
  22879. + t_Error err = E_OK;
  22880. + uint32_t oredVectors = 0;
  22881. + int i, j;
  22882. +
  22883. + /* this routine is protected by the calling routine ! */
  22884. + if (p_Grp->numOfOptions >= FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS))
  22885. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,("Too many classification plan basic options selected."));
  22886. +
  22887. + /* find a new clsPlan group */
  22888. + for (i = 0; i < FM_MAX_NUM_OF_PORTS; i++)
  22889. + if (!p_FmPcd->p_FmPcdKg->clsPlanGrps[i].used)
  22890. + break;
  22891. + if (i == FM_MAX_NUM_OF_PORTS)
  22892. + RETURN_ERROR(MAJOR, E_FULL,("No classification plan groups available."));
  22893. +
  22894. + p_FmPcd->p_FmPcdKg->clsPlanGrps[i].used = TRUE;
  22895. +
  22896. + p_Grp->clsPlanGrpId = (uint8_t)i;
  22897. +
  22898. + if (p_Grp->numOfOptions == 0)
  22899. + p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId = (uint8_t)i;
  22900. +
  22901. + p_ClsPlanGrp = &p_FmPcd->p_FmPcdKg->clsPlanGrps[i];
  22902. + p_ClsPlanGrp->netEnvId = p_Grp->netEnvId;
  22903. + p_ClsPlanGrp->owners = 0;
  22904. + FmPcdSetClsPlanGrpId(p_FmPcd, p_Grp->netEnvId, p_Grp->clsPlanGrpId);
  22905. + if (p_Grp->numOfOptions != 0)
  22906. + FmPcdIncNetEnvOwners(p_FmPcd, p_Grp->netEnvId);
  22907. +
  22908. + p_ClsPlanGrp->sizeOfGrp = (uint16_t)(1 << p_Grp->numOfOptions);
  22909. + /* a minimal group of 8 is required */
  22910. + if (p_ClsPlanGrp->sizeOfGrp < CLS_PLAN_NUM_PER_GRP)
  22911. + p_ClsPlanGrp->sizeOfGrp = CLS_PLAN_NUM_PER_GRP;
  22912. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  22913. + {
  22914. + err = KgAllocClsPlanEntries(h_FmPcd, p_ClsPlanGrp->sizeOfGrp, p_FmPcd->guestId, &p_ClsPlanGrp->baseEntry);
  22915. +
  22916. + if (err)
  22917. + RETURN_ERROR(MINOR, E_INVALID_STATE, NO_MSG);
  22918. + }
  22919. + else
  22920. + {
  22921. + t_FmPcdIpcMsg msg;
  22922. + uint32_t replyLength;
  22923. + t_FmPcdIpcReply reply;
  22924. +
  22925. + /* in GUEST_PARTITION, we use the IPC, to also set a private driver group if required */
  22926. + memset(&reply, 0, sizeof(reply));
  22927. + memset(&msg, 0, sizeof(msg));
  22928. + memset(&kgAlloc, 0, sizeof(kgAlloc));
  22929. + kgAlloc.guestId = p_FmPcd->guestId;
  22930. + kgAlloc.numOfClsPlanEntries = p_ClsPlanGrp->sizeOfGrp;
  22931. + msg.msgId = FM_PCD_ALLOC_KG_CLSPLAN;
  22932. + memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
  22933. + replyLength = (sizeof(uint32_t) + sizeof(p_ClsPlanGrp->baseEntry));
  22934. + if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  22935. + (uint8_t*)&msg,
  22936. + sizeof(msg.msgId) + sizeof(kgAlloc),
  22937. + (uint8_t*)&reply,
  22938. + &replyLength,
  22939. + NULL,
  22940. + NULL)) != E_OK)
  22941. + RETURN_ERROR(MAJOR, err, NO_MSG);
  22942. +
  22943. + if (replyLength != (sizeof(uint32_t) + sizeof(p_ClsPlanGrp->baseEntry)))
  22944. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  22945. + if ((t_Error)reply.error != E_OK)
  22946. + RETURN_ERROR(MINOR, (t_Error)reply.error, NO_MSG);
  22947. +
  22948. + p_ClsPlanGrp->baseEntry = *(uint8_t*)(reply.replyBody);
  22949. + }
  22950. +
  22951. + /* build classification plan entries parameters */
  22952. + p_ClsPlanSet->baseEntry = p_ClsPlanGrp->baseEntry;
  22953. + p_ClsPlanSet->numOfClsPlanEntries = p_ClsPlanGrp->sizeOfGrp;
  22954. +
  22955. + oredVectors = 0;
  22956. + for (i = 0; i<p_Grp->numOfOptions; i++)
  22957. + {
  22958. + oredVectors |= p_Grp->optVectors[i];
  22959. + /* save an array of used options - the indexes represent the power of 2 index */
  22960. + p_ClsPlanGrp->optArray[i] = p_Grp->options[i];
  22961. + }
  22962. + /* set the classification plan relevant entries so that all bits
  22963. + * relevant to the list of options is cleared
  22964. + */
  22965. + for (j = 0; j<p_ClsPlanGrp->sizeOfGrp; j++)
  22966. + p_ClsPlanSet->vectors[j] = ~oredVectors;
  22967. +
  22968. + for (i = 0; i<p_Grp->numOfOptions; i++)
  22969. + {
  22970. + /* option i got the place 2^i in the clsPlan array. all entries that
  22971. + * have bit i set, should have the vector bit cleared. So each option
  22972. + * has one location that it is exclusive (1,2,4,8...) and represent the
  22973. + * presence of that option only, and other locations that represent a
  22974. + * combination of options.
  22975. + * e.g:
  22976. + * If ethernet-BC is option 1 it gets entry 2 in the table. Entry 2
  22977. + * now represents a frame with ethernet-BC header - so the bit
  22978. + * representing ethernet-BC should be set and all other option bits
  22979. + * should be cleared.
  22980. + * Entries 2,3,6,7,10... also have ethernet-BC and therefore have bit
  22981. + * vector[1] set, but they also have other bits set:
  22982. + * 3=1+2, options 0 and 1
  22983. + * 6=2+4, options 1 and 2
  22984. + * 7=1+2+4, options 0,1,and 2
  22985. + * 10=2+8, options 1 and 3
  22986. + * etc.
  22987. + * */
  22988. +
  22989. + /* now for each option (i), we set their bits in all entries (j)
  22990. + * that contain bit 2^i.
  22991. + */
  22992. + for (j = 0; j<p_ClsPlanGrp->sizeOfGrp; j++)
  22993. + {
  22994. + if (j & (1<<i))
  22995. + p_ClsPlanSet->vectors[j] |= p_Grp->optVectors[i];
  22996. + }
  22997. + }
  22998. +
  22999. + return E_OK;
  23000. +}
  23001. +
  23002. +void FmPcdKgDestroyClsPlanGrp(t_Handle h_FmPcd, uint8_t grpId)
  23003. +{
  23004. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23005. + t_FmPcdIpcKgClsPlanParams kgAlloc;
  23006. + t_Error err;
  23007. + t_FmPcdIpcMsg msg;
  23008. + uint32_t replyLength;
  23009. + t_FmPcdIpcReply reply;
  23010. +
  23011. + /* check that no port is bound to this clsPlan */
  23012. + if (p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].owners)
  23013. + {
  23014. + REPORT_ERROR(MINOR, E_INVALID_STATE, ("Trying to delete a clsPlan grp that has ports bound to"));
  23015. + return;
  23016. + }
  23017. +
  23018. + FmPcdSetClsPlanGrpId(p_FmPcd, p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].netEnvId, ILLEGAL_CLS_PLAN);
  23019. +
  23020. + if (grpId == p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId)
  23021. + p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId = ILLEGAL_CLS_PLAN;
  23022. + else
  23023. + FmPcdDecNetEnvOwners(p_FmPcd, p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].netEnvId);
  23024. +
  23025. + /* free blocks */
  23026. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  23027. + KgFreeClsPlanEntries(h_FmPcd,
  23028. + p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].sizeOfGrp,
  23029. + p_FmPcd->guestId,
  23030. + p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].baseEntry);
  23031. + else /* in GUEST_PARTITION, we use the IPC, to also set a private driver group if required */
  23032. + {
  23033. + memset(&reply, 0, sizeof(reply));
  23034. + memset(&msg, 0, sizeof(msg));
  23035. + kgAlloc.guestId = p_FmPcd->guestId;
  23036. + kgAlloc.numOfClsPlanEntries = p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].sizeOfGrp;
  23037. + kgAlloc.clsPlanBase = p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId].baseEntry;
  23038. + msg.msgId = FM_PCD_FREE_KG_CLSPLAN;
  23039. + memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
  23040. + replyLength = sizeof(uint32_t);
  23041. + err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  23042. + (uint8_t*)&msg,
  23043. + sizeof(msg.msgId) + sizeof(kgAlloc),
  23044. + (uint8_t*)&reply,
  23045. + &replyLength,
  23046. + NULL,
  23047. + NULL);
  23048. + if (err != E_OK)
  23049. + {
  23050. + REPORT_ERROR(MINOR, err, NO_MSG);
  23051. + return;
  23052. + }
  23053. + if (replyLength != sizeof(uint32_t))
  23054. + {
  23055. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  23056. + return;
  23057. + }
  23058. + if ((t_Error)reply.error != E_OK)
  23059. + {
  23060. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Free KG clsPlan failed"));
  23061. + return;
  23062. + }
  23063. + }
  23064. +
  23065. + /* clear clsPlan driver structure */
  23066. + memset(&p_FmPcd->p_FmPcdKg->clsPlanGrps[grpId], 0, sizeof(t_FmPcdKgClsPlanGrp));
  23067. +}
  23068. +
  23069. +t_Error FmPcdKgBuildBindPortToSchemes(t_Handle h_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_BindPort, uint32_t *p_SpReg, bool add)
  23070. +{
  23071. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23072. + uint32_t j, schemesPerPortVector = 0;
  23073. + t_FmPcdKgScheme *p_Scheme;
  23074. + uint8_t i, relativeSchemeId;
  23075. + uint32_t tmp, walking1Mask;
  23076. + uint8_t swPortIndex = 0;
  23077. +
  23078. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  23079. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE);
  23080. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
  23081. +
  23082. + /* for each scheme */
  23083. + for (i = 0; i<p_BindPort->numOfSchemes; i++)
  23084. + {
  23085. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, p_BindPort->schemesIds[i]);
  23086. + if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
  23087. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  23088. +
  23089. + if (add)
  23090. + {
  23091. + p_Scheme = &p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId];
  23092. + if (!FmPcdKgIsSchemeValidSw(p_Scheme))
  23093. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Requested scheme is invalid."));
  23094. + /* check netEnvId of the port against the scheme netEnvId */
  23095. + if ((p_Scheme->netEnvId != p_BindPort->netEnvId) && (p_Scheme->netEnvId != ILLEGAL_NETENV))
  23096. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Port may not be bound to requested scheme - differ in netEnvId"));
  23097. +
  23098. + /* if next engine is private port policer profile, we need to check that it is valid */
  23099. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, p_BindPort->hardwarePortId);
  23100. + if (p_Scheme->nextRelativePlcrProfile)
  23101. + {
  23102. + for (j = 0;j<p_Scheme->numOfProfiles;j++)
  23103. + {
  23104. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].h_FmPort);
  23105. + if (p_Scheme->relativeProfileId+j >= p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles)
  23106. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Relative profile not in range"));
  23107. + if (!FmPcdPlcrIsProfileValid(p_FmPcd, (uint16_t)(p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase + p_Scheme->relativeProfileId + j)))
  23108. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Relative profile not valid."));
  23109. + }
  23110. + }
  23111. + if (!p_BindPort->useClsPlan)
  23112. + {
  23113. + /* This check may be redundant as port is a assigned to the whole NetEnv */
  23114. +
  23115. + /* if this port does not use clsPlan, it may not be bound to schemes with units that contain
  23116. + cls plan options. Schemes that are used only directly, should not be checked.
  23117. + it also may not be bound to schemes that go to CC with units that are options - so we OR
  23118. + the match vector and the grpBits (= ccUnits) */
  23119. + if ((p_Scheme->matchVector != SCHEME_ALWAYS_DIRECT) || p_Scheme->ccUnits)
  23120. + {
  23121. + uint8_t netEnvId;
  23122. + walking1Mask = 0x80000000;
  23123. + netEnvId = (p_Scheme->netEnvId == ILLEGAL_NETENV)? p_BindPort->netEnvId:p_Scheme->netEnvId;
  23124. + tmp = (p_Scheme->matchVector == SCHEME_ALWAYS_DIRECT)? 0:p_Scheme->matchVector;
  23125. + tmp |= p_Scheme->ccUnits;
  23126. + while (tmp)
  23127. + {
  23128. + if (tmp & walking1Mask)
  23129. + {
  23130. + tmp &= ~walking1Mask;
  23131. + if (!PcdNetEnvIsUnitWithoutOpts(p_FmPcd, netEnvId, walking1Mask))
  23132. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Port (without clsPlan) may not be bound to requested scheme - uses clsPlan options"));
  23133. + }
  23134. + walking1Mask >>= 1;
  23135. + }
  23136. + }
  23137. + }
  23138. + }
  23139. + /* build vector */
  23140. + schemesPerPortVector |= 1 << (31 - p_BindPort->schemesIds[i]);
  23141. + }
  23142. +
  23143. + *p_SpReg = schemesPerPortVector;
  23144. +
  23145. + return E_OK;
  23146. +}
  23147. +
  23148. +t_Error FmPcdKgBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind)
  23149. +{
  23150. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23151. + uint32_t spReg;
  23152. + t_Error err = E_OK;
  23153. +
  23154. + err = FmPcdKgBuildBindPortToSchemes(h_FmPcd, p_SchemeBind, &spReg, TRUE);
  23155. + if (err)
  23156. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23157. +
  23158. + err = KgWriteSp(p_FmPcd, p_SchemeBind->hardwarePortId, spReg, TRUE);
  23159. + if (err)
  23160. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23161. +
  23162. + IncSchemeOwners(p_FmPcd, p_SchemeBind);
  23163. +
  23164. + return E_OK;
  23165. +}
  23166. +
  23167. +t_Error FmPcdKgUnbindPortToSchemes(t_Handle h_FmPcd, t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind)
  23168. +{
  23169. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23170. + uint32_t spReg;
  23171. + t_Error err = E_OK;
  23172. +
  23173. + err = FmPcdKgBuildBindPortToSchemes(p_FmPcd, p_SchemeBind, &spReg, FALSE);
  23174. + if (err)
  23175. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23176. +
  23177. + err = KgWriteSp(p_FmPcd, p_SchemeBind->hardwarePortId, spReg, FALSE);
  23178. + if (err)
  23179. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23180. +
  23181. + DecSchemeOwners(p_FmPcd, p_SchemeBind);
  23182. +
  23183. + return E_OK;
  23184. +}
  23185. +
  23186. +bool FmPcdKgIsSchemeValidSw(t_Handle h_Scheme)
  23187. +{
  23188. + t_FmPcdKgScheme *p_Scheme = (t_FmPcdKgScheme*)h_Scheme;
  23189. +
  23190. + return p_Scheme->valid;
  23191. +}
  23192. +
  23193. +bool KgIsSchemeAlwaysDirect(t_Handle h_FmPcd, uint8_t schemeId)
  23194. +{
  23195. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23196. +
  23197. + if (p_FmPcd->p_FmPcdKg->schemes[schemeId].matchVector == SCHEME_ALWAYS_DIRECT)
  23198. + return TRUE;
  23199. + else
  23200. + return FALSE;
  23201. +}
  23202. +
  23203. +t_Error FmPcdKgAllocSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds)
  23204. +{
  23205. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  23206. + uint8_t i, j;
  23207. +
  23208. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  23209. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE);
  23210. +
  23211. + /* This routine is issued only on master core of master partition -
  23212. + either directly or through IPC, so no need for lock */
  23213. +
  23214. + for (j = 0, i = 0; i < FM_PCD_KG_NUM_OF_SCHEMES && j < numOfSchemes; i++)
  23215. + {
  23216. + if (!p_FmPcd->p_FmPcdKg->schemesMng[i].allocated)
  23217. + {
  23218. + p_FmPcd->p_FmPcdKg->schemesMng[i].allocated = TRUE;
  23219. + p_FmPcd->p_FmPcdKg->schemesMng[i].ownerId = guestId;
  23220. + p_SchemesIds[j] = i;
  23221. + j++;
  23222. + }
  23223. + }
  23224. +
  23225. + if (j != numOfSchemes)
  23226. + {
  23227. + /* roll back */
  23228. + for (j--; j; j--)
  23229. + {
  23230. + p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[j]].allocated = FALSE;
  23231. + p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[j]].ownerId = 0;
  23232. + p_SchemesIds[j] = 0;
  23233. + }
  23234. +
  23235. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("No schemes found"));
  23236. + }
  23237. +
  23238. + return E_OK;
  23239. +}
  23240. +
  23241. +t_Error FmPcdKgFreeSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds)
  23242. +{
  23243. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  23244. + uint8_t i;
  23245. +
  23246. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  23247. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE);
  23248. +
  23249. + /* This routine is issued only on master core of master partition -
  23250. + either directly or through IPC */
  23251. +
  23252. + for (i = 0; i < numOfSchemes; i++)
  23253. + {
  23254. + if (!p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].allocated)
  23255. + {
  23256. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Scheme was not previously allocated"));
  23257. + }
  23258. + if (p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].ownerId != guestId)
  23259. + {
  23260. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Scheme is not owned by caller. "));
  23261. + }
  23262. + p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].allocated = FALSE;
  23263. + p_FmPcd->p_FmPcdKg->schemesMng[p_SchemesIds[i]].ownerId = 0;
  23264. + }
  23265. +
  23266. + return E_OK;
  23267. +}
  23268. +
  23269. +t_Error KgAllocClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t *p_First)
  23270. +{
  23271. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  23272. + uint8_t numOfBlocks, blocksFound=0, first=0;
  23273. + uint8_t i, j;
  23274. +
  23275. + /* This routine is issued only on master core of master partition -
  23276. + either directly or through IPC, so no need for lock */
  23277. +
  23278. + if (!numOfClsPlanEntries)
  23279. + return E_OK;
  23280. +
  23281. + if ((numOfClsPlanEntries % CLS_PLAN_NUM_PER_GRP) || (!POWER_OF_2(numOfClsPlanEntries)))
  23282. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfClsPlanEntries must be a power of 2 and divisible by 8"));
  23283. +
  23284. + numOfBlocks = (uint8_t)(numOfClsPlanEntries/CLS_PLAN_NUM_PER_GRP);
  23285. +
  23286. + /* try to find consequent blocks */
  23287. + first = 0;
  23288. + for (i = 0; i < FM_PCD_MAX_NUM_OF_CLS_PLANS/CLS_PLAN_NUM_PER_GRP;)
  23289. + {
  23290. + if (!p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].allocated)
  23291. + {
  23292. + blocksFound++;
  23293. + i++;
  23294. + if (blocksFound == numOfBlocks)
  23295. + break;
  23296. + }
  23297. + else
  23298. + {
  23299. + blocksFound = 0;
  23300. + /* advance i to the next aligned address */
  23301. + first = i = (uint8_t)(first + numOfBlocks);
  23302. + }
  23303. + }
  23304. +
  23305. + if (blocksFound == numOfBlocks)
  23306. + {
  23307. + *p_First = (uint8_t)(first * CLS_PLAN_NUM_PER_GRP);
  23308. + for (j = first; j < (first + numOfBlocks); j++)
  23309. + {
  23310. + p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[j].allocated = TRUE;
  23311. + p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[j].ownerId = guestId;
  23312. + }
  23313. + return E_OK;
  23314. + }
  23315. + else
  23316. + RETURN_ERROR(MINOR, E_FULL, ("No resources for clsPlan"));
  23317. +}
  23318. +
  23319. +void KgFreeClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t base)
  23320. +{
  23321. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23322. + uint8_t numOfBlocks;
  23323. + uint8_t i, baseBlock;
  23324. +
  23325. +#ifdef DISABLE_ASSERTIONS
  23326. +UNUSED(guestId);
  23327. +#endif /* DISABLE_ASSERTIONS */
  23328. +
  23329. + /* This routine is issued only on master core of master partition -
  23330. + either directly or through IPC, so no need for lock */
  23331. +
  23332. + numOfBlocks = (uint8_t)(numOfClsPlanEntries/CLS_PLAN_NUM_PER_GRP);
  23333. + ASSERT_COND(!(base%CLS_PLAN_NUM_PER_GRP));
  23334. +
  23335. + baseBlock = (uint8_t)(base/CLS_PLAN_NUM_PER_GRP);
  23336. + for (i=baseBlock;i<baseBlock+numOfBlocks;i++)
  23337. + {
  23338. + ASSERT_COND(p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].allocated);
  23339. + ASSERT_COND(guestId == p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].ownerId);
  23340. + p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].allocated = FALSE;
  23341. + p_FmPcd->p_FmPcdKg->clsPlanBlocksMng[i].ownerId = 0;
  23342. + }
  23343. +}
  23344. +
  23345. +void KgEnable(t_FmPcd *p_FmPcd)
  23346. +{
  23347. + struct fman_kg_regs *p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  23348. +
  23349. + ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
  23350. + fman_kg_enable(p_Regs);
  23351. +}
  23352. +
  23353. +void KgDisable(t_FmPcd *p_FmPcd)
  23354. +{
  23355. + struct fman_kg_regs *p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  23356. +
  23357. + ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
  23358. + fman_kg_disable(p_Regs);
  23359. +}
  23360. +
  23361. +void KgSetClsPlan(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanSet *p_Set)
  23362. +{
  23363. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  23364. + struct fman_kg_cp_regs *p_FmPcdKgPortRegs;
  23365. + uint32_t tmpKgarReg = 0, intFlags;
  23366. + uint16_t i, j;
  23367. +
  23368. + /* This routine is protected by the calling routine ! */
  23369. + ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
  23370. + p_FmPcdKgPortRegs = &p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->clsPlanRegs;
  23371. +
  23372. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  23373. + for (i=p_Set->baseEntry;i<p_Set->baseEntry+p_Set->numOfClsPlanEntries;i+=8)
  23374. + {
  23375. + tmpKgarReg = FmPcdKgBuildWriteClsPlanBlockActionReg((uint8_t)(i / CLS_PLAN_NUM_PER_GRP));
  23376. +
  23377. + for (j = i; j < i+8; j++)
  23378. + {
  23379. + ASSERT_COND(IN_RANGE(0, (j - p_Set->baseEntry), FM_PCD_MAX_NUM_OF_CLS_PLANS-1));
  23380. + WRITE_UINT32(p_FmPcdKgPortRegs->kgcpe[j % CLS_PLAN_NUM_PER_GRP],p_Set->vectors[j - p_Set->baseEntry]);
  23381. + }
  23382. +
  23383. + if (WriteKgarWait(p_FmPcd, tmpKgarReg) != E_OK)
  23384. + {
  23385. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("WriteKgarWait FAILED"));
  23386. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  23387. + return;
  23388. + }
  23389. + }
  23390. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  23391. +}
  23392. +
  23393. +t_Handle KgConfig( t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams)
  23394. +{
  23395. + t_FmPcdKg *p_FmPcdKg;
  23396. +
  23397. + UNUSED(p_FmPcd);
  23398. +
  23399. + if (p_FmPcdParams->numOfSchemes > FM_PCD_KG_NUM_OF_SCHEMES)
  23400. + {
  23401. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  23402. + ("numOfSchemes should not exceed %d", FM_PCD_KG_NUM_OF_SCHEMES));
  23403. + return NULL;
  23404. + }
  23405. +
  23406. + p_FmPcdKg = (t_FmPcdKg *)XX_Malloc(sizeof(t_FmPcdKg));
  23407. + if (!p_FmPcdKg)
  23408. + {
  23409. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Keygen allocation FAILED"));
  23410. + return NULL;
  23411. + }
  23412. + memset(p_FmPcdKg, 0, sizeof(t_FmPcdKg));
  23413. +
  23414. +
  23415. + if (FmIsMaster(p_FmPcd->h_Fm))
  23416. + {
  23417. + p_FmPcdKg->p_FmPcdKgRegs = (struct fman_kg_regs *)UINT_TO_PTR(FmGetPcdKgBaseAddr(p_FmPcdParams->h_Fm));
  23418. + p_FmPcd->exceptions |= DEFAULT_fmPcdKgErrorExceptions;
  23419. + p_FmPcdKg->p_IndirectAccessRegs = (u_FmPcdKgIndirectAccessRegs *)&p_FmPcdKg->p_FmPcdKgRegs->fmkg_indirect[0];
  23420. + }
  23421. +
  23422. + p_FmPcdKg->numOfSchemes = p_FmPcdParams->numOfSchemes;
  23423. + if ((p_FmPcd->guestId == NCSW_MASTER_ID) && !p_FmPcdKg->numOfSchemes)
  23424. + {
  23425. + p_FmPcdKg->numOfSchemes = FM_PCD_KG_NUM_OF_SCHEMES;
  23426. + DBG(WARNING, ("numOfSchemes was defined 0 by user, re-defined by driver to FM_PCD_KG_NUM_OF_SCHEMES"));
  23427. + }
  23428. +
  23429. + p_FmPcdKg->emptyClsPlanGrpId = ILLEGAL_CLS_PLAN;
  23430. +
  23431. + return p_FmPcdKg;
  23432. +}
  23433. +
  23434. +t_Error KgInit(t_FmPcd *p_FmPcd)
  23435. +{
  23436. + t_Error err = E_OK;
  23437. +
  23438. + p_FmPcd->p_FmPcdKg->h_HwSpinlock = XX_InitSpinlock();
  23439. + if (!p_FmPcd->p_FmPcdKg->h_HwSpinlock)
  23440. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM KG HW spinlock"));
  23441. +
  23442. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  23443. + err = KgInitMaster(p_FmPcd);
  23444. + else
  23445. + err = KgInitGuest(p_FmPcd);
  23446. +
  23447. + if (err != E_OK)
  23448. + {
  23449. + if (p_FmPcd->p_FmPcdKg->h_HwSpinlock)
  23450. + XX_FreeSpinlock(p_FmPcd->p_FmPcdKg->h_HwSpinlock);
  23451. + }
  23452. +
  23453. + return err;
  23454. +}
  23455. +
  23456. +t_Error KgFree(t_FmPcd *p_FmPcd)
  23457. +{
  23458. + t_FmPcdIpcKgSchemesParams kgAlloc;
  23459. + t_Error err = E_OK;
  23460. + t_FmPcdIpcMsg msg;
  23461. + uint32_t replyLength;
  23462. + t_FmPcdIpcReply reply;
  23463. +
  23464. + FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_KG, 0, e_FM_INTR_TYPE_ERR);
  23465. +
  23466. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  23467. + {
  23468. + err = FmPcdKgFreeSchemes(p_FmPcd,
  23469. + p_FmPcd->p_FmPcdKg->numOfSchemes,
  23470. + p_FmPcd->guestId,
  23471. + p_FmPcd->p_FmPcdKg->schemesIds);
  23472. + if (err)
  23473. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23474. +
  23475. + if (p_FmPcd->p_FmPcdKg->h_HwSpinlock)
  23476. + XX_FreeSpinlock(p_FmPcd->p_FmPcdKg->h_HwSpinlock);
  23477. +
  23478. + return E_OK;
  23479. + }
  23480. +
  23481. + /* guest */
  23482. + memset(&reply, 0, sizeof(reply));
  23483. + memset(&msg, 0, sizeof(msg));
  23484. + kgAlloc.numOfSchemes = p_FmPcd->p_FmPcdKg->numOfSchemes;
  23485. + kgAlloc.guestId = p_FmPcd->guestId;
  23486. + ASSERT_COND(kgAlloc.numOfSchemes < FM_PCD_KG_NUM_OF_SCHEMES);
  23487. + memcpy(kgAlloc.schemesIds, p_FmPcd->p_FmPcdKg->schemesIds, (sizeof(uint8_t))*kgAlloc.numOfSchemes);
  23488. + msg.msgId = FM_PCD_FREE_KG_SCHEMES;
  23489. + memcpy(msg.msgBody, &kgAlloc, sizeof(kgAlloc));
  23490. + replyLength = sizeof(uint32_t);
  23491. + if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  23492. + (uint8_t*)&msg,
  23493. + sizeof(msg.msgId) + sizeof(kgAlloc),
  23494. + (uint8_t*)&reply,
  23495. + &replyLength,
  23496. + NULL,
  23497. + NULL)) != E_OK)
  23498. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23499. + if (replyLength != sizeof(uint32_t))
  23500. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  23501. +
  23502. + if (p_FmPcd->p_FmPcdKg->h_HwSpinlock)
  23503. + XX_FreeSpinlock(p_FmPcd->p_FmPcdKg->h_HwSpinlock);
  23504. +
  23505. + return (t_Error)reply.error;
  23506. +}
  23507. +
  23508. +t_Error FmPcdKgSetOrBindToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t netEnvId, protocolOpt_t *p_OptArray, uint8_t *p_ClsPlanGrpId, bool *p_IsEmptyClsPlanGrp)
  23509. +{
  23510. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  23511. + t_FmPcdKgInterModuleClsPlanGrpParams grpParams, *p_GrpParams;
  23512. + t_FmPcdKgClsPlanGrp *p_ClsPlanGrp;
  23513. + t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet;
  23514. + t_Error err;
  23515. +
  23516. + /* This function is issued only from FM_PORT_SetPcd which locked all PCD modules,
  23517. + so no need for lock here */
  23518. +
  23519. + memset(&grpParams, 0, sizeof(grpParams));
  23520. + grpParams.clsPlanGrpId = ILLEGAL_CLS_PLAN;
  23521. + p_GrpParams = &grpParams;
  23522. +
  23523. + p_GrpParams->netEnvId = netEnvId;
  23524. +
  23525. + /* Get from the NetEnv the information of the clsPlan (can be already created,
  23526. + * or needs to build) */
  23527. + err = PcdGetClsPlanGrpParams(h_FmPcd, p_GrpParams);
  23528. + if (err)
  23529. + RETURN_ERROR(MINOR,err,NO_MSG);
  23530. +
  23531. + if (p_GrpParams->grpExists)
  23532. + {
  23533. + /* this group was already updated (at least) in SW */
  23534. + *p_ClsPlanGrpId = p_GrpParams->clsPlanGrpId;
  23535. + }
  23536. + else
  23537. + {
  23538. + p_ClsPlanSet = (t_FmPcdKgInterModuleClsPlanSet *)XX_Malloc(sizeof(t_FmPcdKgInterModuleClsPlanSet));
  23539. + if (!p_ClsPlanSet)
  23540. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Classification plan set"));
  23541. + memset(p_ClsPlanSet, 0, sizeof(t_FmPcdKgInterModuleClsPlanSet));
  23542. + /* Build (in SW) the clsPlan parameters, including the vectors to be written to HW */
  23543. + err = FmPcdKgBuildClsPlanGrp(h_FmPcd, p_GrpParams, p_ClsPlanSet);
  23544. + if (err)
  23545. + {
  23546. + XX_Free(p_ClsPlanSet);
  23547. + RETURN_ERROR(MINOR, err, NO_MSG);
  23548. + }
  23549. + *p_ClsPlanGrpId = p_GrpParams->clsPlanGrpId;
  23550. +
  23551. + if (p_FmPcd->h_Hc)
  23552. + {
  23553. + /* write clsPlan entries to memory */
  23554. + err = FmHcPcdKgSetClsPlan(p_FmPcd->h_Hc, p_ClsPlanSet);
  23555. + if (err)
  23556. + {
  23557. + XX_Free(p_ClsPlanSet);
  23558. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23559. + }
  23560. + }
  23561. + else
  23562. + /* write clsPlan entries to memory */
  23563. + KgSetClsPlan(p_FmPcd, p_ClsPlanSet);
  23564. +
  23565. + XX_Free(p_ClsPlanSet);
  23566. + }
  23567. +
  23568. + /* Set caller parameters */
  23569. +
  23570. + /* mark if this is an empty classification group */
  23571. + if (*p_ClsPlanGrpId == p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId)
  23572. + *p_IsEmptyClsPlanGrp = TRUE;
  23573. + else
  23574. + *p_IsEmptyClsPlanGrp = FALSE;
  23575. +
  23576. + p_ClsPlanGrp = &p_FmPcd->p_FmPcdKg->clsPlanGrps[*p_ClsPlanGrpId];
  23577. +
  23578. + /* increment owners number */
  23579. + p_ClsPlanGrp->owners++;
  23580. +
  23581. + /* copy options array for port */
  23582. + memcpy(p_OptArray, &p_FmPcd->p_FmPcdKg->clsPlanGrps[*p_ClsPlanGrpId].optArray, FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)*sizeof(protocolOpt_t));
  23583. +
  23584. + /* bind port to the new or existing group */
  23585. + err = BindPortToClsPlanGrp(p_FmPcd, hardwarePortId, p_GrpParams->clsPlanGrpId);
  23586. + if (err)
  23587. + RETURN_ERROR(MINOR, err, NO_MSG);
  23588. +
  23589. + return E_OK;
  23590. +}
  23591. +
  23592. +t_Error FmPcdKgDeleteOrUnbindPortToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t clsPlanGrpId)
  23593. +{
  23594. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  23595. + t_FmPcdKgClsPlanGrp *p_ClsPlanGrp = &p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId];
  23596. + t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet;
  23597. + t_Error err;
  23598. +
  23599. + /* This function is issued only from FM_PORT_DeletePcd which locked all PCD modules,
  23600. + so no need for lock here */
  23601. +
  23602. + UnbindPortToClsPlanGrp(p_FmPcd, hardwarePortId);
  23603. +
  23604. + /* decrement owners number */
  23605. + ASSERT_COND(p_ClsPlanGrp->owners);
  23606. + p_ClsPlanGrp->owners--;
  23607. +
  23608. + if (!p_ClsPlanGrp->owners)
  23609. + {
  23610. + if (p_FmPcd->h_Hc)
  23611. + {
  23612. + err = FmHcPcdKgDeleteClsPlan(p_FmPcd->h_Hc, clsPlanGrpId);
  23613. + return err;
  23614. + }
  23615. + else
  23616. + {
  23617. + /* clear clsPlan entries in memory */
  23618. + p_ClsPlanSet = (t_FmPcdKgInterModuleClsPlanSet *)XX_Malloc(sizeof(t_FmPcdKgInterModuleClsPlanSet));
  23619. + if (!p_ClsPlanSet)
  23620. + {
  23621. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Classification plan set"));
  23622. + }
  23623. + memset(p_ClsPlanSet, 0, sizeof(t_FmPcdKgInterModuleClsPlanSet));
  23624. +
  23625. + p_ClsPlanSet->baseEntry = p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].baseEntry;
  23626. + p_ClsPlanSet->numOfClsPlanEntries = p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrpId].sizeOfGrp;
  23627. + KgSetClsPlan(p_FmPcd, p_ClsPlanSet);
  23628. + XX_Free(p_ClsPlanSet);
  23629. +
  23630. + FmPcdKgDestroyClsPlanGrp(h_FmPcd, clsPlanGrpId);
  23631. + }
  23632. + }
  23633. + return E_OK;
  23634. +}
  23635. +
  23636. +uint32_t FmPcdKgGetRequiredAction(t_Handle h_FmPcd, uint8_t schemeId)
  23637. +{
  23638. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23639. + ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
  23640. +
  23641. + return p_FmPcd->p_FmPcdKg->schemes[schemeId].requiredAction;
  23642. +}
  23643. +
  23644. +uint32_t FmPcdKgGetRequiredActionFlag(t_Handle h_FmPcd, uint8_t schemeId)
  23645. +{
  23646. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23647. +
  23648. + ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
  23649. +
  23650. + return p_FmPcd->p_FmPcdKg->schemes[schemeId].requiredActionFlag;
  23651. +}
  23652. +
  23653. +bool FmPcdKgIsDirectPlcr(t_Handle h_FmPcd, uint8_t schemeId)
  23654. +{
  23655. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23656. +
  23657. + ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
  23658. +
  23659. + return p_FmPcd->p_FmPcdKg->schemes[schemeId].directPlcr;
  23660. +}
  23661. +
  23662. +
  23663. +uint16_t FmPcdKgGetRelativeProfileId(t_Handle h_FmPcd, uint8_t schemeId)
  23664. +{
  23665. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23666. +
  23667. + ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
  23668. +
  23669. + return p_FmPcd->p_FmPcdKg->schemes[schemeId].relativeProfileId;
  23670. +}
  23671. +
  23672. +bool FmPcdKgIsDistrOnPlcrProfile(t_Handle h_FmPcd, uint8_t schemeId)
  23673. +{
  23674. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23675. +
  23676. + ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
  23677. +
  23678. + if ((p_FmPcd->p_FmPcdKg->schemes[schemeId].extractedOrs &&
  23679. + p_FmPcd->p_FmPcdKg->schemes[schemeId].bitOffsetInPlcrProfile) ||
  23680. + p_FmPcd->p_FmPcdKg->schemes[schemeId].nextRelativePlcrProfile)
  23681. + return TRUE;
  23682. + else
  23683. + return FALSE;
  23684. +
  23685. +}
  23686. +
  23687. +e_FmPcdEngine FmPcdKgGetNextEngine(t_Handle h_FmPcd, uint8_t relativeSchemeId)
  23688. +{
  23689. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23690. +
  23691. + ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].valid);
  23692. +
  23693. + return p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextEngine;
  23694. +}
  23695. +
  23696. +e_FmPcdDoneAction FmPcdKgGetDoneAction(t_Handle h_FmPcd, uint8_t schemeId)
  23697. +{
  23698. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23699. +
  23700. + ASSERT_COND(p_FmPcd->p_FmPcdKg->schemes[schemeId].valid);
  23701. +
  23702. + return p_FmPcd->p_FmPcdKg->schemes[schemeId].doneAction;
  23703. +}
  23704. +
  23705. +void FmPcdKgUpdateRequiredAction(t_Handle h_Scheme, uint32_t requiredAction)
  23706. +{
  23707. + t_FmPcdKgScheme *p_Scheme = (t_FmPcdKgScheme *)h_Scheme;
  23708. +
  23709. + /* this routine is protected by calling routine */
  23710. +
  23711. + ASSERT_COND(p_Scheme->valid);
  23712. +
  23713. + p_Scheme->requiredAction |= requiredAction;
  23714. +}
  23715. +
  23716. +bool FmPcdKgHwSchemeIsValid(uint32_t schemeModeReg)
  23717. +{
  23718. + return (bool)!!(schemeModeReg & KG_SCH_MODE_EN);
  23719. +}
  23720. +
  23721. +uint32_t FmPcdKgBuildWriteSchemeActionReg(uint8_t schemeId, bool updateCounter)
  23722. +{
  23723. + return (uint32_t)(((uint32_t)schemeId << FM_PCD_KG_KGAR_NUM_SHIFT) |
  23724. + FM_KG_KGAR_GO |
  23725. + FM_KG_KGAR_WRITE |
  23726. + FM_KG_KGAR_SEL_SCHEME_ENTRY |
  23727. + DUMMY_PORT_ID |
  23728. + (updateCounter ? FM_KG_KGAR_SCM_WSEL_UPDATE_CNT:0));
  23729. +}
  23730. +
  23731. +uint32_t FmPcdKgBuildReadSchemeActionReg(uint8_t schemeId)
  23732. +{
  23733. + return (uint32_t)(((uint32_t)schemeId << FM_PCD_KG_KGAR_NUM_SHIFT) |
  23734. + FM_KG_KGAR_GO |
  23735. + FM_KG_KGAR_READ |
  23736. + FM_KG_KGAR_SEL_SCHEME_ENTRY |
  23737. + DUMMY_PORT_ID |
  23738. + FM_KG_KGAR_SCM_WSEL_UPDATE_CNT);
  23739. +
  23740. +}
  23741. +
  23742. +uint32_t FmPcdKgBuildWriteClsPlanBlockActionReg(uint8_t grpId)
  23743. +{
  23744. + return (uint32_t)(FM_KG_KGAR_GO |
  23745. + FM_KG_KGAR_WRITE |
  23746. + FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
  23747. + DUMMY_PORT_ID |
  23748. + ((uint32_t)grpId << FM_PCD_KG_KGAR_NUM_SHIFT) |
  23749. + FM_PCD_KG_KGAR_WSEL_MASK);
  23750. +
  23751. + /* if we ever want to write 1 by 1, use:
  23752. + sel = (uint8_t)(0x01 << (7- (entryId % CLS_PLAN_NUM_PER_GRP)));
  23753. + */
  23754. +}
  23755. +
  23756. +uint32_t FmPcdKgBuildWritePortSchemeBindActionReg(uint8_t hardwarePortId)
  23757. +{
  23758. +
  23759. + return (uint32_t)(FM_KG_KGAR_GO |
  23760. + FM_KG_KGAR_WRITE |
  23761. + FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
  23762. + hardwarePortId |
  23763. + FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP);
  23764. +}
  23765. +
  23766. +uint32_t FmPcdKgBuildReadPortSchemeBindActionReg(uint8_t hardwarePortId)
  23767. +{
  23768. +
  23769. + return (uint32_t)(FM_KG_KGAR_GO |
  23770. + FM_KG_KGAR_READ |
  23771. + FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
  23772. + hardwarePortId |
  23773. + FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP);
  23774. +}
  23775. +
  23776. +uint32_t FmPcdKgBuildWritePortClsPlanBindActionReg(uint8_t hardwarePortId)
  23777. +{
  23778. +
  23779. + return (uint32_t)(FM_KG_KGAR_GO |
  23780. + FM_KG_KGAR_WRITE |
  23781. + FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
  23782. + hardwarePortId |
  23783. + FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP);
  23784. +}
  23785. +
  23786. +uint8_t FmPcdKgGetClsPlanGrpBase(t_Handle h_FmPcd, uint8_t clsPlanGrp)
  23787. +{
  23788. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23789. +
  23790. + return p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrp].baseEntry;
  23791. +}
  23792. +
  23793. +uint16_t FmPcdKgGetClsPlanGrpSize(t_Handle h_FmPcd, uint8_t clsPlanGrp)
  23794. +{
  23795. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23796. +
  23797. + return p_FmPcd->p_FmPcdKg->clsPlanGrps[clsPlanGrp].sizeOfGrp;
  23798. +}
  23799. +
  23800. +
  23801. +uint8_t FmPcdKgGetSchemeId(t_Handle h_Scheme)
  23802. +{
  23803. + return ((t_FmPcdKgScheme*)h_Scheme)->schemeId;
  23804. +
  23805. +}
  23806. +
  23807. +#if (DPAA_VERSION >= 11)
  23808. +bool FmPcdKgGetVspe(t_Handle h_Scheme)
  23809. +{
  23810. + return ((t_FmPcdKgScheme*)h_Scheme)->vspe;
  23811. +
  23812. +}
  23813. +#endif /* (DPAA_VERSION >= 11) */
  23814. +
  23815. +uint8_t FmPcdKgGetRelativeSchemeId(t_Handle h_FmPcd, uint8_t schemeId)
  23816. +{
  23817. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23818. + uint8_t i;
  23819. +
  23820. + for (i = 0;i<p_FmPcd->p_FmPcdKg->numOfSchemes;i++)
  23821. + if (p_FmPcd->p_FmPcdKg->schemesIds[i] == schemeId)
  23822. + return i;
  23823. +
  23824. + if (i == p_FmPcd->p_FmPcdKg->numOfSchemes)
  23825. + REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, ("Scheme is out of partition range"));
  23826. +
  23827. + return FM_PCD_KG_NUM_OF_SCHEMES;
  23828. +}
  23829. +
  23830. +t_Handle FmPcdKgGetSchemeHandle(t_Handle h_FmPcd, uint8_t relativeSchemeId)
  23831. +{
  23832. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23833. +
  23834. + ASSERT_COND(p_FmPcd);
  23835. +
  23836. + /* check that schemeId is in range */
  23837. + if (relativeSchemeId >= p_FmPcd->p_FmPcdKg->numOfSchemes)
  23838. + {
  23839. + REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, ("relative-scheme-id %d!", relativeSchemeId));
  23840. + return NULL;
  23841. + }
  23842. +
  23843. + if (!FmPcdKgIsSchemeValidSw(&p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId]))
  23844. + return NULL;
  23845. +
  23846. + return &p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId];
  23847. +}
  23848. +
  23849. +bool FmPcdKgIsSchemeHasOwners(t_Handle h_Scheme)
  23850. +{
  23851. + return (((t_FmPcdKgScheme*)h_Scheme)->owners == 0)?FALSE:TRUE;
  23852. +}
  23853. +
  23854. +t_Error FmPcdKgCcGetSetParams(t_Handle h_FmPcd, t_Handle h_Scheme, uint32_t requiredAction, uint32_t value)
  23855. +{
  23856. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  23857. + uint8_t relativeSchemeId, physicalSchemeId;
  23858. + uint32_t tmpKgarReg, tmpReg32 = 0, intFlags;
  23859. + t_Error err;
  23860. + t_FmPcdKgScheme *p_Scheme = (t_FmPcdKgScheme*)h_Scheme;
  23861. +
  23862. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, 0);
  23863. + SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE, 0);
  23864. + SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, 0);
  23865. +
  23866. + /* Calling function locked all PCD modules, so no need to lock here */
  23867. +
  23868. + if (!FmPcdKgIsSchemeValidSw(h_Scheme))
  23869. + RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is Invalid"));
  23870. +
  23871. + if (p_FmPcd->h_Hc)
  23872. + {
  23873. + err = FmHcPcdKgCcGetSetParams(p_FmPcd->h_Hc, h_Scheme, requiredAction, value);
  23874. +
  23875. + UpdateRequiredActionFlag(h_Scheme,TRUE);
  23876. + FmPcdKgUpdateRequiredAction(h_Scheme,requiredAction);
  23877. + return err;
  23878. + }
  23879. +
  23880. + physicalSchemeId = p_Scheme->schemeId;
  23881. +
  23882. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId);
  23883. + if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
  23884. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  23885. +
  23886. + if (!p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].requiredActionFlag ||
  23887. + !(p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].requiredAction & requiredAction))
  23888. + {
  23889. + if (requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
  23890. + {
  23891. + switch (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextEngine)
  23892. + {
  23893. + case (e_FM_PCD_DONE):
  23894. + if (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].doneAction == e_FM_PCD_ENQ_FRAME)
  23895. + {
  23896. + tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  23897. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  23898. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23899. + tmpReg32 = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode);
  23900. + ASSERT_COND(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME));
  23901. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, tmpReg32 | NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA);
  23902. + /* call indirect command for scheme write */
  23903. + tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
  23904. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23905. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  23906. + }
  23907. + break;
  23908. + case (e_FM_PCD_PLCR):
  23909. + if (!p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].directPlcr ||
  23910. + (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].extractedOrs &&
  23911. + p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].bitOffsetInPlcrProfile) ||
  23912. + p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextRelativePlcrProfile)
  23913. + {
  23914. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("In this situation PP can not be with distribution and has to be shared"));
  23915. + }
  23916. + err = FmPcdPlcrCcGetSetParams(h_FmPcd, p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].relativeProfileId, requiredAction);
  23917. + if (err)
  23918. + {
  23919. + RETURN_ERROR(MAJOR, err, NO_MSG);
  23920. + }
  23921. + break;
  23922. + default:
  23923. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,("in this situation the next engine after scheme can be or PLCR or ENQ_FRAME"));
  23924. + }
  23925. + }
  23926. + if (requiredAction & UPDATE_KG_NIA_CC_WA)
  23927. + {
  23928. + if (p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId].nextEngine == e_FM_PCD_CC)
  23929. + {
  23930. + tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  23931. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  23932. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23933. + tmpReg32 = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode);
  23934. + ASSERT_COND(tmpReg32 & (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC));
  23935. + tmpReg32 &= ~NIA_FM_CTL_AC_CC;
  23936. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, tmpReg32 | NIA_FM_CTL_AC_PRE_CC);
  23937. + /* call indirect command for scheme write */
  23938. + tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
  23939. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23940. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  23941. + }
  23942. + }
  23943. + if (requiredAction & UPDATE_KG_OPT_MODE)
  23944. + {
  23945. + tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  23946. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  23947. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23948. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_om, value);
  23949. + /* call indirect command for scheme write */
  23950. + tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
  23951. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23952. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  23953. + }
  23954. + if (requiredAction & UPDATE_KG_NIA)
  23955. + {
  23956. + tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  23957. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  23958. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23959. + tmpReg32 = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode);
  23960. + tmpReg32 &= ~(NIA_ENG_MASK | NIA_AC_MASK);
  23961. + tmpReg32 |= value;
  23962. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, tmpReg32);
  23963. + /* call indirect command for scheme write */
  23964. + tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
  23965. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  23966. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  23967. + }
  23968. + }
  23969. +
  23970. + UpdateRequiredActionFlag(h_Scheme, TRUE);
  23971. + FmPcdKgUpdateRequiredAction(h_Scheme, requiredAction);
  23972. +
  23973. + return E_OK;
  23974. +}
  23975. +/*********************** End of inter-module routines ************************/
  23976. +
  23977. +
  23978. +/****************************************/
  23979. +/* API routines */
  23980. +/****************************************/
  23981. +
  23982. +t_Handle FM_PCD_KgSchemeSet(t_Handle h_FmPcd, t_FmPcdKgSchemeParams *p_SchemeParams)
  23983. +{
  23984. + t_FmPcd *p_FmPcd;
  23985. + struct fman_kg_scheme_regs schemeRegs;
  23986. + struct fman_kg_scheme_regs *p_MemRegs;
  23987. + uint8_t i;
  23988. + t_Error err = E_OK;
  23989. + uint32_t tmpKgarReg;
  23990. + uint32_t intFlags;
  23991. + uint8_t physicalSchemeId, relativeSchemeId = 0;
  23992. + t_FmPcdKgScheme *p_Scheme;
  23993. +
  23994. + if (p_SchemeParams->modify)
  23995. + {
  23996. + p_Scheme = (t_FmPcdKgScheme *)p_SchemeParams->id.h_Scheme;
  23997. + p_FmPcd = p_Scheme->h_FmPcd;
  23998. +
  23999. + SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, NULL);
  24000. + SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE, NULL);
  24001. +
  24002. + if (!FmPcdKgIsSchemeValidSw(p_Scheme))
  24003. + {
  24004. + REPORT_ERROR(MAJOR, E_ALREADY_EXISTS,
  24005. + ("Scheme is invalid"));
  24006. + return NULL;
  24007. + }
  24008. +
  24009. + if (!KgSchemeFlagTryLock(p_Scheme))
  24010. + {
  24011. + DBG(TRACE, ("Scheme Try Lock - BUSY"));
  24012. + /* Signal to caller BUSY condition */
  24013. + p_SchemeParams->id.h_Scheme = NULL;
  24014. + return NULL;
  24015. + }
  24016. + }
  24017. + else
  24018. + {
  24019. + p_FmPcd = (t_FmPcd*)h_FmPcd;
  24020. +
  24021. + SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, NULL);
  24022. + SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdKg, E_INVALID_HANDLE, NULL);
  24023. +
  24024. + relativeSchemeId = p_SchemeParams->id.relativeSchemeId;
  24025. + /* check that schemeId is in range */
  24026. + if (relativeSchemeId >= p_FmPcd->p_FmPcdKg->numOfSchemes)
  24027. + {
  24028. + REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, ("relative-scheme-id %d!", relativeSchemeId));
  24029. + return NULL;
  24030. + }
  24031. +
  24032. + p_Scheme = &p_FmPcd->p_FmPcdKg->schemes[relativeSchemeId];
  24033. + if (FmPcdKgIsSchemeValidSw(p_Scheme))
  24034. + {
  24035. + REPORT_ERROR(MAJOR, E_ALREADY_EXISTS,
  24036. + ("Scheme id (%d)!", relativeSchemeId));
  24037. + return NULL;
  24038. + }
  24039. + /* Clear all fields, scheme may have beed previously used */
  24040. + memset(p_Scheme, 0, sizeof(t_FmPcdKgScheme));
  24041. +
  24042. + p_Scheme->schemeId = p_FmPcd->p_FmPcdKg->schemesIds[relativeSchemeId];
  24043. + p_Scheme->h_FmPcd = p_FmPcd;
  24044. +
  24045. + p_Scheme->p_Lock = FmPcdAcquireLock(p_FmPcd);
  24046. + if (!p_Scheme->p_Lock)
  24047. + REPORT_ERROR(MAJOR, E_NOT_AVAILABLE, ("FM KG Scheme lock obj!"));
  24048. + }
  24049. +
  24050. + err = BuildSchemeRegs((t_Handle)p_Scheme, p_SchemeParams, &schemeRegs);
  24051. + if (err)
  24052. + {
  24053. + REPORT_ERROR(MAJOR, err, NO_MSG);
  24054. + if (p_SchemeParams->modify)
  24055. + KgSchemeFlagUnlock(p_Scheme);
  24056. + if (!p_SchemeParams->modify &&
  24057. + p_Scheme->p_Lock)
  24058. + FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
  24059. + return NULL;
  24060. + }
  24061. +
  24062. + if (p_FmPcd->h_Hc)
  24063. + {
  24064. + err = FmHcPcdKgSetScheme(p_FmPcd->h_Hc,
  24065. + (t_Handle)p_Scheme,
  24066. + &schemeRegs,
  24067. + p_SchemeParams->schemeCounter.update);
  24068. + if (p_SchemeParams->modify)
  24069. + KgSchemeFlagUnlock(p_Scheme);
  24070. + if (err)
  24071. + {
  24072. + if (!p_SchemeParams->modify &&
  24073. + p_Scheme->p_Lock)
  24074. + FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
  24075. + return NULL;
  24076. + }
  24077. + if (!p_SchemeParams->modify)
  24078. + ValidateSchemeSw(p_Scheme);
  24079. + return (t_Handle)p_Scheme;
  24080. + }
  24081. +
  24082. + physicalSchemeId = p_Scheme->schemeId;
  24083. +
  24084. + /* configure all 21 scheme registers */
  24085. + p_MemRegs = &p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs;
  24086. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  24087. + WRITE_UINT32(p_MemRegs->kgse_ppc, schemeRegs.kgse_ppc);
  24088. + WRITE_UINT32(p_MemRegs->kgse_ccbs, schemeRegs.kgse_ccbs);
  24089. + WRITE_UINT32(p_MemRegs->kgse_mode, schemeRegs.kgse_mode);
  24090. + WRITE_UINT32(p_MemRegs->kgse_mv, schemeRegs.kgse_mv);
  24091. + WRITE_UINT32(p_MemRegs->kgse_dv0, schemeRegs.kgse_dv0);
  24092. + WRITE_UINT32(p_MemRegs->kgse_dv1, schemeRegs.kgse_dv1);
  24093. + WRITE_UINT32(p_MemRegs->kgse_ekdv, schemeRegs.kgse_ekdv);
  24094. + WRITE_UINT32(p_MemRegs->kgse_ekfc, schemeRegs.kgse_ekfc);
  24095. + WRITE_UINT32(p_MemRegs->kgse_bmch, schemeRegs.kgse_bmch);
  24096. + WRITE_UINT32(p_MemRegs->kgse_bmcl, schemeRegs.kgse_bmcl);
  24097. + WRITE_UINT32(p_MemRegs->kgse_hc, schemeRegs.kgse_hc);
  24098. + WRITE_UINT32(p_MemRegs->kgse_spc, schemeRegs.kgse_spc);
  24099. + WRITE_UINT32(p_MemRegs->kgse_fqb, schemeRegs.kgse_fqb);
  24100. + WRITE_UINT32(p_MemRegs->kgse_om, schemeRegs.kgse_om);
  24101. + WRITE_UINT32(p_MemRegs->kgse_vsp, schemeRegs.kgse_vsp);
  24102. + for (i=0 ; i<FM_KG_NUM_OF_GENERIC_REGS ; i++)
  24103. + WRITE_UINT32(p_MemRegs->kgse_gec[i], schemeRegs.kgse_gec[i]);
  24104. +
  24105. + /* call indirect command for scheme write */
  24106. + tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, p_SchemeParams->schemeCounter.update);
  24107. +
  24108. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  24109. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  24110. +
  24111. + if (!p_SchemeParams->modify)
  24112. + ValidateSchemeSw(p_Scheme);
  24113. + else
  24114. + KgSchemeFlagUnlock(p_Scheme);
  24115. +
  24116. + return (t_Handle)p_Scheme;
  24117. +}
  24118. +
  24119. +t_Error FM_PCD_KgSchemeDelete(t_Handle h_Scheme)
  24120. +{
  24121. + t_FmPcd *p_FmPcd;
  24122. + uint8_t physicalSchemeId;
  24123. + uint32_t tmpKgarReg, intFlags;
  24124. + t_Error err = E_OK;
  24125. + t_FmPcdKgScheme *p_Scheme = (t_FmPcdKgScheme *)h_Scheme;
  24126. +
  24127. + SANITY_CHECK_RETURN_ERROR(h_Scheme, E_INVALID_HANDLE);
  24128. +
  24129. + p_FmPcd = (t_FmPcd*)(p_Scheme->h_FmPcd);
  24130. +
  24131. + UpdateRequiredActionFlag(h_Scheme, FALSE);
  24132. +
  24133. + /* check that no port is bound to this scheme */
  24134. + err = InvalidateSchemeSw(h_Scheme);
  24135. + if (err)
  24136. + RETURN_ERROR(MINOR, err, NO_MSG);
  24137. +
  24138. + if (p_FmPcd->h_Hc)
  24139. + {
  24140. + err = FmHcPcdKgDeleteScheme(p_FmPcd->h_Hc, h_Scheme);
  24141. + if (p_Scheme->p_Lock)
  24142. + FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
  24143. + return err;
  24144. + }
  24145. +
  24146. + physicalSchemeId = ((t_FmPcdKgScheme *)h_Scheme)->schemeId;
  24147. +
  24148. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  24149. + /* clear mode register, including enable bit */
  24150. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode, 0);
  24151. +
  24152. + /* call indirect command for scheme write */
  24153. + tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, FALSE);
  24154. +
  24155. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  24156. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  24157. +
  24158. + if (p_Scheme->p_Lock)
  24159. + FmPcdReleaseLock(p_FmPcd, p_Scheme->p_Lock);
  24160. +
  24161. + return E_OK;
  24162. +}
  24163. +
  24164. +uint32_t FM_PCD_KgSchemeGetCounter(t_Handle h_Scheme)
  24165. +{
  24166. + t_FmPcd *p_FmPcd;
  24167. + uint32_t tmpKgarReg, spc, intFlags;
  24168. + uint8_t physicalSchemeId;
  24169. +
  24170. + SANITY_CHECK_RETURN_VALUE(h_Scheme, E_INVALID_HANDLE, 0);
  24171. +
  24172. + p_FmPcd = (t_FmPcd*)(((t_FmPcdKgScheme *)h_Scheme)->h_FmPcd);
  24173. + if (p_FmPcd->h_Hc)
  24174. + return FmHcPcdKgGetSchemeCounter(p_FmPcd->h_Hc, h_Scheme);
  24175. +
  24176. + physicalSchemeId = ((t_FmPcdKgScheme *)h_Scheme)->schemeId;
  24177. +
  24178. + if (FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId) == FM_PCD_KG_NUM_OF_SCHEMES)
  24179. + REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  24180. +
  24181. + tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  24182. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  24183. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  24184. + if (!(GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode) & KG_SCH_MODE_EN))
  24185. + REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is Invalid"));
  24186. + spc = GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_spc);
  24187. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  24188. +
  24189. + return spc;
  24190. +}
  24191. +
  24192. +t_Error FM_PCD_KgSchemeSetCounter(t_Handle h_Scheme, uint32_t value)
  24193. +{
  24194. + t_FmPcd *p_FmPcd;
  24195. + uint32_t tmpKgarReg, intFlags;
  24196. + uint8_t physicalSchemeId;
  24197. +
  24198. + SANITY_CHECK_RETURN_VALUE(h_Scheme, E_INVALID_HANDLE, 0);
  24199. +
  24200. + p_FmPcd = (t_FmPcd*)(((t_FmPcdKgScheme *)h_Scheme)->h_FmPcd);
  24201. +
  24202. + if (!FmPcdKgIsSchemeValidSw(h_Scheme))
  24203. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Requested scheme is invalid."));
  24204. +
  24205. + if (p_FmPcd->h_Hc)
  24206. + return FmHcPcdKgSetSchemeCounter(p_FmPcd->h_Hc, h_Scheme, value);
  24207. +
  24208. + physicalSchemeId = ((t_FmPcdKgScheme *)h_Scheme)->schemeId;
  24209. + /* check that schemeId is in range */
  24210. + if (FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId) == FM_PCD_KG_NUM_OF_SCHEMES)
  24211. + REPORT_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  24212. +
  24213. + /* read specified scheme into scheme registers */
  24214. + tmpKgarReg = FmPcdKgBuildReadSchemeActionReg(physicalSchemeId);
  24215. + intFlags = KgHwLock(p_FmPcd->p_FmPcdKg);
  24216. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  24217. + if (!(GET_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_mode) & KG_SCH_MODE_EN))
  24218. + {
  24219. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  24220. + RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, ("Scheme is Invalid"));
  24221. + }
  24222. +
  24223. + /* change counter value */
  24224. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_IndirectAccessRegs->schemeRegs.kgse_spc, value);
  24225. +
  24226. + /* call indirect command for scheme write */
  24227. + tmpKgarReg = FmPcdKgBuildWriteSchemeActionReg(physicalSchemeId, TRUE);
  24228. +
  24229. + WriteKgarWait(p_FmPcd, tmpKgarReg);
  24230. + KgHwUnlock(p_FmPcd->p_FmPcdKg, intFlags);
  24231. +
  24232. + return E_OK;
  24233. +}
  24234. +
  24235. +t_Error FM_PCD_KgSetAdditionalDataAfterParsing(t_Handle h_FmPcd, uint8_t payloadOffset)
  24236. +{
  24237. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  24238. + struct fman_kg_regs *p_Regs;
  24239. +
  24240. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  24241. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_NULL_POINTER);
  24242. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_NULL_POINTER);
  24243. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs, E_NULL_POINTER);
  24244. +
  24245. + p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  24246. + if (!FmIsMaster(p_FmPcd->h_Fm))
  24247. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_KgSetAdditionalDataAfterParsing - guest mode!"));
  24248. +
  24249. + WRITE_UINT32(p_Regs->fmkg_fdor,payloadOffset);
  24250. +
  24251. + return E_OK;
  24252. +}
  24253. +
  24254. +t_Error FM_PCD_KgSetDfltValue(t_Handle h_FmPcd, uint8_t valueId, uint32_t value)
  24255. +{
  24256. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  24257. + struct fman_kg_regs *p_Regs;
  24258. +
  24259. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  24260. + SANITY_CHECK_RETURN_ERROR(((valueId == 0) || (valueId == 1)), E_INVALID_VALUE);
  24261. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_NULL_POINTER);
  24262. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg, E_NULL_POINTER);
  24263. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs, E_NULL_POINTER);
  24264. +
  24265. + p_Regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs;
  24266. +
  24267. + if (!FmIsMaster(p_FmPcd->h_Fm))
  24268. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_KgSetDfltValue - guest mode!"));
  24269. +
  24270. + if (valueId == 0)
  24271. + WRITE_UINT32(p_Regs->fmkg_gdv0r,value);
  24272. + else
  24273. + WRITE_UINT32(p_Regs->fmkg_gdv1r,value);
  24274. + return E_OK;
  24275. +}
  24276. --- /dev/null
  24277. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.h
  24278. @@ -0,0 +1,206 @@
  24279. +/*
  24280. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  24281. + *
  24282. + * Redistribution and use in source and binary forms, with or without
  24283. + * modification, are permitted provided that the following conditions are met:
  24284. + * * Redistributions of source code must retain the above copyright
  24285. + * notice, this list of conditions and the following disclaimer.
  24286. + * * Redistributions in binary form must reproduce the above copyright
  24287. + * notice, this list of conditions and the following disclaimer in the
  24288. + * documentation and/or other materials provided with the distribution.
  24289. + * * Neither the name of Freescale Semiconductor nor the
  24290. + * names of its contributors may be used to endorse or promote products
  24291. + * derived from this software without specific prior written permission.
  24292. + *
  24293. + *
  24294. + * ALTERNATIVELY, this software may be distributed under the terms of the
  24295. + * GNU General Public License ("GPL") as published by the Free Software
  24296. + * Foundation, either version 2 of that License or (at your option) any
  24297. + * later version.
  24298. + *
  24299. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24300. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  24301. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24302. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  24303. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24304. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  24305. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  24306. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24307. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24308. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24309. + */
  24310. +
  24311. +
  24312. +/******************************************************************************
  24313. + @File fm_kg.h
  24314. +
  24315. + @Description FM KG private header
  24316. +*//***************************************************************************/
  24317. +#ifndef __FM_KG_H
  24318. +#define __FM_KG_H
  24319. +
  24320. +#include "std_ext.h"
  24321. +
  24322. +/***********************************************************************/
  24323. +/* Keygen defines */
  24324. +/***********************************************************************/
  24325. +/* maskes */
  24326. +#if (DPAA_VERSION >= 11)
  24327. +#define KG_SCH_VSP_SHIFT_MASK 0x0003f000
  24328. +#define KG_SCH_OM_VSPE 0x00000001
  24329. +#define KG_SCH_VSP_NO_KSP_EN 0x80000000
  24330. +
  24331. +#define MAX_SP_SHIFT 23
  24332. +#define KG_SCH_VSP_MASK_SHIFT 12
  24333. +#define KG_SCH_VSP_SHIFT 24
  24334. +#endif /* (DPAA_VERSION >= 11) */
  24335. +
  24336. +typedef uint32_t t_KnownFieldsMasks;
  24337. +#define KG_SCH_KN_PORT_ID 0x80000000
  24338. +#define KG_SCH_KN_MACDST 0x40000000
  24339. +#define KG_SCH_KN_MACSRC 0x20000000
  24340. +#define KG_SCH_KN_TCI1 0x10000000
  24341. +#define KG_SCH_KN_TCI2 0x08000000
  24342. +#define KG_SCH_KN_ETYPE 0x04000000
  24343. +#define KG_SCH_KN_PPPSID 0x02000000
  24344. +#define KG_SCH_KN_PPPID 0x01000000
  24345. +#define KG_SCH_KN_MPLS1 0x00800000
  24346. +#define KG_SCH_KN_MPLS2 0x00400000
  24347. +#define KG_SCH_KN_MPLS_LAST 0x00200000
  24348. +#define KG_SCH_KN_IPSRC1 0x00100000
  24349. +#define KG_SCH_KN_IPDST1 0x00080000
  24350. +#define KG_SCH_KN_PTYPE1 0x00040000
  24351. +#define KG_SCH_KN_IPTOS_TC1 0x00020000
  24352. +#define KG_SCH_KN_IPV6FL1 0x00010000
  24353. +#define KG_SCH_KN_IPSRC2 0x00008000
  24354. +#define KG_SCH_KN_IPDST2 0x00004000
  24355. +#define KG_SCH_KN_PTYPE2 0x00002000
  24356. +#define KG_SCH_KN_IPTOS_TC2 0x00001000
  24357. +#define KG_SCH_KN_IPV6FL2 0x00000800
  24358. +#define KG_SCH_KN_GREPTYPE 0x00000400
  24359. +#define KG_SCH_KN_IPSEC_SPI 0x00000200
  24360. +#define KG_SCH_KN_IPSEC_NH 0x00000100
  24361. +#define KG_SCH_KN_IPPID 0x00000080
  24362. +#define KG_SCH_KN_L4PSRC 0x00000004
  24363. +#define KG_SCH_KN_L4PDST 0x00000002
  24364. +#define KG_SCH_KN_TFLG 0x00000001
  24365. +
  24366. +typedef uint8_t t_GenericCodes;
  24367. +#define KG_SCH_GEN_SHIM1 0x70
  24368. +#define KG_SCH_GEN_DEFAULT 0x10
  24369. +#define KG_SCH_GEN_PARSE_RESULT_N_FQID 0x20
  24370. +#define KG_SCH_GEN_START_OF_FRM 0x40
  24371. +#define KG_SCH_GEN_SHIM2 0x71
  24372. +#define KG_SCH_GEN_IP_PID_NO_V 0x72
  24373. +#define KG_SCH_GEN_ETH 0x03
  24374. +#define KG_SCH_GEN_ETH_NO_V 0x73
  24375. +#define KG_SCH_GEN_SNAP 0x04
  24376. +#define KG_SCH_GEN_SNAP_NO_V 0x74
  24377. +#define KG_SCH_GEN_VLAN1 0x05
  24378. +#define KG_SCH_GEN_VLAN1_NO_V 0x75
  24379. +#define KG_SCH_GEN_VLAN2 0x06
  24380. +#define KG_SCH_GEN_VLAN2_NO_V 0x76
  24381. +#define KG_SCH_GEN_ETH_TYPE 0x07
  24382. +#define KG_SCH_GEN_ETH_TYPE_NO_V 0x77
  24383. +#define KG_SCH_GEN_PPP 0x08
  24384. +#define KG_SCH_GEN_PPP_NO_V 0x78
  24385. +#define KG_SCH_GEN_MPLS1 0x09
  24386. +#define KG_SCH_GEN_MPLS2 0x19
  24387. +#define KG_SCH_GEN_MPLS3 0x29
  24388. +#define KG_SCH_GEN_MPLS1_NO_V 0x79
  24389. +#define KG_SCH_GEN_MPLS_LAST 0x0a
  24390. +#define KG_SCH_GEN_MPLS_LAST_NO_V 0x7a
  24391. +#define KG_SCH_GEN_IPV4 0x0b
  24392. +#define KG_SCH_GEN_IPV6 0x1b
  24393. +#define KG_SCH_GEN_L3_NO_V 0x7b
  24394. +#define KG_SCH_GEN_IPV4_TUNNELED 0x0c
  24395. +#define KG_SCH_GEN_IPV6_TUNNELED 0x1c
  24396. +#define KG_SCH_GEN_MIN_ENCAP 0x2c
  24397. +#define KG_SCH_GEN_IP2_NO_V 0x7c
  24398. +#define KG_SCH_GEN_GRE 0x0d
  24399. +#define KG_SCH_GEN_GRE_NO_V 0x7d
  24400. +#define KG_SCH_GEN_TCP 0x0e
  24401. +#define KG_SCH_GEN_UDP 0x1e
  24402. +#define KG_SCH_GEN_IPSEC_AH 0x2e
  24403. +#define KG_SCH_GEN_SCTP 0x3e
  24404. +#define KG_SCH_GEN_DCCP 0x4e
  24405. +#define KG_SCH_GEN_IPSEC_ESP 0x6e
  24406. +#define KG_SCH_GEN_L4_NO_V 0x7e
  24407. +#define KG_SCH_GEN_NEXTHDR 0x7f
  24408. +/* shifts */
  24409. +#define KG_SCH_PP_SHIFT_HIGH_SHIFT 27
  24410. +#define KG_SCH_PP_SHIFT_LOW_SHIFT 12
  24411. +#define KG_SCH_PP_MASK_SHIFT 16
  24412. +#define KG_SCH_MODE_CCOBASE_SHIFT 24
  24413. +#define KG_SCH_DEF_MAC_ADDR_SHIFT 30
  24414. +#define KG_SCH_DEF_TCI_SHIFT 28
  24415. +#define KG_SCH_DEF_ENET_TYPE_SHIFT 26
  24416. +#define KG_SCH_DEF_PPP_SESSION_ID_SHIFT 24
  24417. +#define KG_SCH_DEF_PPP_PROTOCOL_ID_SHIFT 22
  24418. +#define KG_SCH_DEF_MPLS_LABEL_SHIFT 20
  24419. +#define KG_SCH_DEF_IP_ADDR_SHIFT 18
  24420. +#define KG_SCH_DEF_PROTOCOL_TYPE_SHIFT 16
  24421. +#define KG_SCH_DEF_IP_TOS_TC_SHIFT 14
  24422. +#define KG_SCH_DEF_IPV6_FLOW_LABEL_SHIFT 12
  24423. +#define KG_SCH_DEF_IPSEC_SPI_SHIFT 10
  24424. +#define KG_SCH_DEF_L4_PORT_SHIFT 8
  24425. +#define KG_SCH_DEF_TCP_FLAG_SHIFT 6
  24426. +#define KG_SCH_HASH_CONFIG_SHIFT_SHIFT 24
  24427. +#define KG_SCH_GEN_MASK_SHIFT 16
  24428. +#define KG_SCH_GEN_HT_SHIFT 8
  24429. +#define KG_SCH_GEN_SIZE_SHIFT 24
  24430. +#define KG_SCH_GEN_DEF_SHIFT 29
  24431. +#define FM_PCD_KG_KGAR_NUM_SHIFT 16
  24432. +
  24433. +/* others */
  24434. +#define NUM_OF_SW_DEFAULTS 3
  24435. +#define MAX_PP_SHIFT 23
  24436. +#define MAX_KG_SCH_SIZE 16
  24437. +#define MASK_FOR_GENERIC_BASE_ID 0x20
  24438. +#define MAX_HASH_SHIFT 40
  24439. +#define MAX_KG_SCH_FQID_BIT_OFFSET 31
  24440. +#define MAX_KG_SCH_PP_BIT_OFFSET 15
  24441. +#define MAX_DIST_FQID_SHIFT 23
  24442. +
  24443. +#define GET_MASK_SEL_SHIFT(shift,i) \
  24444. +switch (i) { \
  24445. + case (0):shift = 26;break; \
  24446. + case (1):shift = 20;break; \
  24447. + case (2):shift = 10;break; \
  24448. + case (3):shift = 4;break; \
  24449. + default: \
  24450. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG); \
  24451. +}
  24452. +
  24453. +#define GET_MASK_OFFSET_SHIFT(shift,i) \
  24454. +switch (i) { \
  24455. + case (0):shift = 16;break; \
  24456. + case (1):shift = 0;break; \
  24457. + case (2):shift = 28;break; \
  24458. + case (3):shift = 24;break; \
  24459. + default: \
  24460. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG); \
  24461. +}
  24462. +
  24463. +#define GET_MASK_SHIFT(shift,i) \
  24464. +switch (i) { \
  24465. + case (0):shift = 24;break; \
  24466. + case (1):shift = 16;break; \
  24467. + case (2):shift = 8;break; \
  24468. + case (3):shift = 0;break; \
  24469. + default: \
  24470. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG); \
  24471. +}
  24472. +
  24473. +/***********************************************************************/
  24474. +/* Keygen defines */
  24475. +/***********************************************************************/
  24476. +
  24477. +#define KG_DOUBLE_MEANING_REGS_OFFSET 0x100
  24478. +#define NO_VALIDATION 0x70
  24479. +#define KG_ACTION_REG_TO 1024
  24480. +#define KG_MAX_PROFILE 255
  24481. +#define SCHEME_ALWAYS_DIRECT 0xFFFFFFFF
  24482. +
  24483. +
  24484. +#endif /* __FM_KG_H */
  24485. --- /dev/null
  24486. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.c
  24487. @@ -0,0 +1,5571 @@
  24488. +/*
  24489. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  24490. + *
  24491. + * Redistribution and use in source and binary forms, with or without
  24492. + * modification, are permitted provided that the following conditions are met:
  24493. + * * Redistributions of source code must retain the above copyright
  24494. + * notice, this list of conditions and the following disclaimer.
  24495. + * * Redistributions in binary form must reproduce the above copyright
  24496. + * notice, this list of conditions and the following disclaimer in the
  24497. + * documentation and/or other materials provided with the distribution.
  24498. + * * Neither the name of Freescale Semiconductor nor the
  24499. + * names of its contributors may be used to endorse or promote products
  24500. + * derived from this software without specific prior written permission.
  24501. + *
  24502. + *
  24503. + * ALTERNATIVELY, this software may be distributed under the terms of the
  24504. + * GNU General Public License ("GPL") as published by the Free Software
  24505. + * Foundation, either version 2 of that License or (at your option) any
  24506. + * later version.
  24507. + *
  24508. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24509. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  24510. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24511. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  24512. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24513. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  24514. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  24515. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24516. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24517. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24518. + */
  24519. +
  24520. +
  24521. +/******************************************************************************
  24522. + @File fm_manip.c
  24523. +
  24524. + @Description FM PCD manip ...
  24525. + *//***************************************************************************/
  24526. +#include "std_ext.h"
  24527. +#include "error_ext.h"
  24528. +#include "string_ext.h"
  24529. +#include "debug_ext.h"
  24530. +#include "fm_pcd_ext.h"
  24531. +#include "fm_port_ext.h"
  24532. +#include "fm_muram_ext.h"
  24533. +#include "memcpy_ext.h"
  24534. +
  24535. +#include "fm_common.h"
  24536. +#include "fm_hc.h"
  24537. +#include "fm_manip.h"
  24538. +
  24539. +/****************************************/
  24540. +/* static functions */
  24541. +/****************************************/
  24542. +static t_Handle GetManipInfo(t_FmPcdManip *p_Manip, e_ManipInfo manipInfo)
  24543. +{
  24544. + t_FmPcdManip *p_CurManip = p_Manip;
  24545. +
  24546. + if (!MANIP_IS_UNIFIED(p_Manip))
  24547. + p_CurManip = p_Manip;
  24548. + else
  24549. + {
  24550. + /* go to first unified */
  24551. + while (MANIP_IS_UNIFIED_NON_FIRST(p_CurManip))
  24552. + p_CurManip = p_CurManip->h_PrevManip;
  24553. + }
  24554. +
  24555. + switch (manipInfo)
  24556. + {
  24557. + case (e_MANIP_HMCT):
  24558. + return p_CurManip->p_Hmct;
  24559. + case (e_MANIP_HMTD):
  24560. + return p_CurManip->h_Ad;
  24561. + case (e_MANIP_HANDLER_TABLE_OWNER):
  24562. + return (t_Handle)p_CurManip;
  24563. + default:
  24564. + return NULL;
  24565. + }
  24566. +}
  24567. +
  24568. +static uint16_t GetHmctSize(t_FmPcdManip *p_Manip)
  24569. +{
  24570. + uint16_t size = 0;
  24571. + t_FmPcdManip *p_CurManip = p_Manip;
  24572. +
  24573. + if (!MANIP_IS_UNIFIED(p_Manip))
  24574. + return p_Manip->tableSize;
  24575. +
  24576. + /* accumulate sizes, starting with the first node */
  24577. + while (MANIP_IS_UNIFIED_NON_FIRST(p_CurManip))
  24578. + p_CurManip = p_CurManip->h_PrevManip;
  24579. +
  24580. + while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
  24581. + {
  24582. + size += p_CurManip->tableSize;
  24583. + p_CurManip = (t_FmPcdManip *)p_CurManip->h_NextManip;
  24584. + }
  24585. + size += p_CurManip->tableSize; /* add last size */
  24586. +
  24587. + return (size);
  24588. +}
  24589. +
  24590. +static uint16_t GetDataSize(t_FmPcdManip *p_Manip)
  24591. +{
  24592. + uint16_t size = 0;
  24593. + t_FmPcdManip *p_CurManip = p_Manip;
  24594. +
  24595. + if (!MANIP_IS_UNIFIED(p_Manip))
  24596. + return p_Manip->dataSize;
  24597. +
  24598. + /* accumulate sizes, starting with the first node */
  24599. + while (MANIP_IS_UNIFIED_NON_FIRST(p_CurManip))
  24600. + p_CurManip = p_CurManip->h_PrevManip;
  24601. +
  24602. + while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
  24603. + {
  24604. + size += p_CurManip->dataSize;
  24605. + p_CurManip = (t_FmPcdManip *)p_CurManip->h_NextManip;
  24606. + }
  24607. + size += p_CurManip->dataSize; /* add last size */
  24608. +
  24609. + return (size);
  24610. +}
  24611. +
  24612. +static t_Error CalculateTableSize(t_FmPcdManipParams *p_FmPcdManipParams,
  24613. + uint16_t *p_TableSize, uint8_t *p_DataSize)
  24614. +{
  24615. + uint8_t localDataSize, remain, tableSize = 0, dataSize = 0;
  24616. +
  24617. + if (p_FmPcdManipParams->u.hdr.rmv)
  24618. + {
  24619. + switch (p_FmPcdManipParams->u.hdr.rmvParams.type)
  24620. + {
  24621. + case (e_FM_PCD_MANIP_RMV_GENERIC):
  24622. + tableSize += HMCD_BASIC_SIZE;
  24623. + break;
  24624. + case (e_FM_PCD_MANIP_RMV_BY_HDR):
  24625. + switch (p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.type)
  24626. + {
  24627. + case (e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2):
  24628. +#if (DPAA_VERSION >= 11)
  24629. + case (e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP):
  24630. + case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START):
  24631. +#endif /* (DPAA_VERSION >= 11) */
  24632. + tableSize += HMCD_BASIC_SIZE;
  24633. + break;
  24634. + default:
  24635. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  24636. + ("Unknown byHdr.type"));
  24637. + }
  24638. + break;
  24639. + default:
  24640. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  24641. + ("Unknown rmvParams.type"));
  24642. + }
  24643. + }
  24644. +
  24645. + if (p_FmPcdManipParams->u.hdr.insrt)
  24646. + {
  24647. + switch (p_FmPcdManipParams->u.hdr.insrtParams.type)
  24648. + {
  24649. + case (e_FM_PCD_MANIP_INSRT_GENERIC):
  24650. + remain =
  24651. + (uint8_t)(p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size
  24652. + % 4);
  24653. + if (remain)
  24654. + localDataSize =
  24655. + (uint8_t)(p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size
  24656. + + 4 - remain);
  24657. + else
  24658. + localDataSize =
  24659. + p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size;
  24660. + tableSize += (uint8_t)(HMCD_BASIC_SIZE + localDataSize);
  24661. + break;
  24662. + case (e_FM_PCD_MANIP_INSRT_BY_HDR):
  24663. + {
  24664. + switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.type)
  24665. + {
  24666. +
  24667. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2):
  24668. + tableSize += HMCD_BASIC_SIZE + HMCD_PTR_SIZE;
  24669. + switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.specificL2)
  24670. + {
  24671. + case (e_FM_PCD_MANIP_HDR_INSRT_MPLS):
  24672. + case (e_FM_PCD_MANIP_HDR_INSRT_PPPOE):
  24673. + dataSize +=
  24674. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.size;
  24675. + break;
  24676. + default:
  24677. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  24678. + }
  24679. + break;
  24680. +#if (DPAA_VERSION >= 11)
  24681. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_IP):
  24682. + tableSize +=
  24683. + (HMCD_BASIC_SIZE + HMCD_PTR_SIZE
  24684. + + HMCD_PARAM_SIZE
  24685. + + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size);
  24686. + dataSize += 2;
  24687. + break;
  24688. +
  24689. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP):
  24690. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE):
  24691. + tableSize += (HMCD_BASIC_SIZE + HMCD_L4_HDR_SIZE);
  24692. +
  24693. + break;
  24694. +
  24695. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP):
  24696. + tableSize +=
  24697. + (HMCD_BASIC_SIZE
  24698. + + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size);
  24699. + break;
  24700. +#endif /* (DPAA_VERSION >= 11) */
  24701. + default:
  24702. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  24703. + ("Unknown byHdr.type"));
  24704. + }
  24705. + }
  24706. + break;
  24707. + default:
  24708. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  24709. + ("Unknown insrtParams.type"));
  24710. + }
  24711. + }
  24712. +
  24713. + if (p_FmPcdManipParams->u.hdr.fieldUpdate)
  24714. + {
  24715. + switch (p_FmPcdManipParams->u.hdr.fieldUpdateParams.type)
  24716. + {
  24717. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN):
  24718. + tableSize += HMCD_BASIC_SIZE;
  24719. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
  24720. + == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN)
  24721. + {
  24722. + tableSize += HMCD_PTR_SIZE;
  24723. + dataSize += DSCP_TO_VLAN_TABLE_SIZE;
  24724. + }
  24725. + break;
  24726. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4):
  24727. + tableSize += HMCD_BASIC_SIZE;
  24728. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  24729. + & HDR_MANIP_IPV4_ID)
  24730. + {
  24731. + tableSize += HMCD_PARAM_SIZE;
  24732. + dataSize += 2;
  24733. + }
  24734. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  24735. + & HDR_MANIP_IPV4_SRC)
  24736. + tableSize += HMCD_IPV4_ADDR_SIZE;
  24737. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  24738. + & HDR_MANIP_IPV4_DST)
  24739. + tableSize += HMCD_IPV4_ADDR_SIZE;
  24740. + break;
  24741. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6):
  24742. + tableSize += HMCD_BASIC_SIZE;
  24743. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  24744. + & HDR_MANIP_IPV6_SRC)
  24745. + tableSize += HMCD_IPV6_ADDR_SIZE;
  24746. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  24747. + & HDR_MANIP_IPV6_DST)
  24748. + tableSize += HMCD_IPV6_ADDR_SIZE;
  24749. + break;
  24750. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP):
  24751. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
  24752. + == HDR_MANIP_TCP_UDP_CHECKSUM)
  24753. + /* we implement this case with the update-checksum descriptor */
  24754. + tableSize += HMCD_BASIC_SIZE;
  24755. + else
  24756. + /* we implement this case with the TCP/UDP-update descriptor */
  24757. + tableSize += HMCD_BASIC_SIZE + HMCD_PARAM_SIZE;
  24758. + break;
  24759. + default:
  24760. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  24761. + ("Unknown fieldUpdateParams.type"));
  24762. + }
  24763. + }
  24764. +
  24765. + if (p_FmPcdManipParams->u.hdr.custom)
  24766. + {
  24767. + switch (p_FmPcdManipParams->u.hdr.customParams.type)
  24768. + {
  24769. + case (e_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE):
  24770. + {
  24771. + tableSize += HMCD_BASIC_SIZE + HMCD_PARAM_SIZE + HMCD_PARAM_SIZE;
  24772. + dataSize +=
  24773. + p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.hdrSize;
  24774. + if ((p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
  24775. + == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4)
  24776. + && (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.updateIpv4Id))
  24777. + dataSize += 2;
  24778. + }
  24779. + break;
  24780. + case (e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE):
  24781. + tableSize += HMCD_BASIC_SIZE + HMCD_PARAM_SIZE;
  24782. + break;
  24783. + default:
  24784. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  24785. + ("Unknown customParams.type"));
  24786. + }
  24787. + }
  24788. +
  24789. + *p_TableSize = tableSize;
  24790. + *p_DataSize = dataSize;
  24791. +
  24792. + return E_OK;
  24793. +}
  24794. +
  24795. +static t_Error GetPrOffsetByHeaderOrField(t_FmManipHdrInfo *p_HdrInfo,
  24796. + uint8_t *parseArrayOffset)
  24797. +{
  24798. + e_NetHeaderType hdr = p_HdrInfo->hdr;
  24799. + e_FmPcdHdrIndex hdrIndex = p_HdrInfo->hdrIndex;
  24800. + bool byField = p_HdrInfo->byField;
  24801. + t_FmPcdFields field;
  24802. +
  24803. + if (byField)
  24804. + field = p_HdrInfo->fullField;
  24805. +
  24806. + if (byField)
  24807. + {
  24808. + switch (hdr)
  24809. + {
  24810. + case (HEADER_TYPE_ETH):
  24811. + switch (field.eth)
  24812. + {
  24813. + case (NET_HEADER_FIELD_ETH_TYPE):
  24814. + *parseArrayOffset = CC_PC_PR_ETYPE_LAST_OFFSET;
  24815. + break;
  24816. + default:
  24817. + RETURN_ERROR(
  24818. + MAJOR,
  24819. + E_NOT_SUPPORTED,
  24820. + ("Header manipulation of the type Ethernet with this field not supported"));
  24821. + }
  24822. + break;
  24823. + case (HEADER_TYPE_VLAN):
  24824. + switch (field.vlan)
  24825. + {
  24826. + case (NET_HEADER_FIELD_VLAN_TCI):
  24827. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
  24828. + || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  24829. + *parseArrayOffset = CC_PC_PR_VLAN1_OFFSET;
  24830. + else
  24831. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  24832. + *parseArrayOffset = CC_PC_PR_VLAN2_OFFSET;
  24833. + break;
  24834. + default:
  24835. + RETURN_ERROR(
  24836. + MAJOR,
  24837. + E_NOT_SUPPORTED,
  24838. + ("Header manipulation of the type VLAN with this field not supported"));
  24839. + }
  24840. + break;
  24841. + default:
  24842. + RETURN_ERROR(
  24843. + MAJOR,
  24844. + E_NOT_SUPPORTED,
  24845. + ("Header manipulation of this header by field not supported"));
  24846. + }
  24847. + }
  24848. + else
  24849. + {
  24850. + switch (hdr)
  24851. + {
  24852. + case (HEADER_TYPE_ETH):
  24853. + *parseArrayOffset = (uint8_t)CC_PC_PR_ETH_OFFSET;
  24854. + break;
  24855. + case (HEADER_TYPE_USER_DEFINED_SHIM1):
  24856. + *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM1_OFFSET;
  24857. + break;
  24858. + case (HEADER_TYPE_USER_DEFINED_SHIM2):
  24859. + *parseArrayOffset = (uint8_t)CC_PC_PR_USER_DEFINED_SHIM2_OFFSET;
  24860. + break;
  24861. + case (HEADER_TYPE_LLC_SNAP):
  24862. + *parseArrayOffset = CC_PC_PR_USER_LLC_SNAP_OFFSET;
  24863. + break;
  24864. + case (HEADER_TYPE_PPPoE):
  24865. + *parseArrayOffset = CC_PC_PR_PPPOE_OFFSET;
  24866. + break;
  24867. + case (HEADER_TYPE_MPLS):
  24868. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
  24869. + || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  24870. + *parseArrayOffset = CC_PC_PR_MPLS1_OFFSET;
  24871. + else
  24872. + if (hdrIndex == e_FM_PCD_HDR_INDEX_LAST)
  24873. + *parseArrayOffset = CC_PC_PR_MPLS_LAST_OFFSET;
  24874. + break;
  24875. + case (HEADER_TYPE_IPv4):
  24876. + case (HEADER_TYPE_IPv6):
  24877. + if ((hdrIndex == e_FM_PCD_HDR_INDEX_NONE)
  24878. + || (hdrIndex == e_FM_PCD_HDR_INDEX_1))
  24879. + *parseArrayOffset = CC_PC_PR_IP1_OFFSET;
  24880. + else
  24881. + if (hdrIndex == e_FM_PCD_HDR_INDEX_2)
  24882. + *parseArrayOffset = CC_PC_PR_IP_LAST_OFFSET;
  24883. + break;
  24884. + case (HEADER_TYPE_MINENCAP):
  24885. + *parseArrayOffset = CC_PC_PR_MINENC_OFFSET;
  24886. + break;
  24887. + case (HEADER_TYPE_GRE):
  24888. + *parseArrayOffset = CC_PC_PR_GRE_OFFSET;
  24889. + break;
  24890. + case (HEADER_TYPE_TCP):
  24891. + case (HEADER_TYPE_UDP):
  24892. + case (HEADER_TYPE_IPSEC_AH):
  24893. + case (HEADER_TYPE_IPSEC_ESP):
  24894. + case (HEADER_TYPE_DCCP):
  24895. + case (HEADER_TYPE_SCTP):
  24896. + *parseArrayOffset = CC_PC_PR_L4_OFFSET;
  24897. + break;
  24898. + case (HEADER_TYPE_CAPWAP):
  24899. + case (HEADER_TYPE_CAPWAP_DTLS):
  24900. + *parseArrayOffset = CC_PC_PR_NEXT_HEADER_OFFSET;
  24901. + break;
  24902. + default:
  24903. + RETURN_ERROR(
  24904. + MAJOR,
  24905. + E_NOT_SUPPORTED,
  24906. + ("Header manipulation of this header is not supported"));
  24907. + }
  24908. + }
  24909. + return E_OK;
  24910. +}
  24911. +
  24912. +static t_Error BuildHmct(t_FmPcdManip *p_Manip,
  24913. + t_FmPcdManipParams *p_FmPcdManipParams,
  24914. + uint8_t *p_DestHmct, uint8_t *p_DestData, bool new)
  24915. +{
  24916. + uint32_t *p_TmpHmct = (uint32_t*)p_DestHmct, *p_LocalData;
  24917. + uint32_t tmpReg = 0, *p_Last = NULL, tmp_ipv6_addr;
  24918. + uint8_t remain, i, size = 0, origSize, *p_UsrData = NULL, *p_TmpData =
  24919. + p_DestData;
  24920. + t_Handle h_FmPcd = p_Manip->h_FmPcd;
  24921. + uint8_t j = 0;
  24922. +
  24923. + if (p_FmPcdManipParams->u.hdr.rmv)
  24924. + {
  24925. + if (p_FmPcdManipParams->u.hdr.rmvParams.type
  24926. + == e_FM_PCD_MANIP_RMV_GENERIC)
  24927. + {
  24928. + /* initialize HMCD */
  24929. + tmpReg = (uint32_t)(HMCD_OPCODE_GENERIC_RMV) << HMCD_OC_SHIFT;
  24930. + /* tmp, should be conditional */
  24931. + tmpReg |= p_FmPcdManipParams->u.hdr.rmvParams.u.generic.offset
  24932. + << HMCD_RMV_OFFSET_SHIFT;
  24933. + tmpReg |= p_FmPcdManipParams->u.hdr.rmvParams.u.generic.size
  24934. + << HMCD_RMV_SIZE_SHIFT;
  24935. + }
  24936. + else
  24937. + if (p_FmPcdManipParams->u.hdr.rmvParams.type
  24938. + == e_FM_PCD_MANIP_RMV_BY_HDR)
  24939. + {
  24940. + switch (p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.type)
  24941. + {
  24942. + case (e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2):
  24943. + {
  24944. + uint8_t hmcdOpt;
  24945. +
  24946. + /* initialize HMCD */
  24947. + tmpReg = (uint32_t)(HMCD_OPCODE_L2_RMV) << HMCD_OC_SHIFT;
  24948. +
  24949. + switch (p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.u.specificL2)
  24950. + {
  24951. + case (e_FM_PCD_MANIP_HDR_RMV_ETHERNET):
  24952. + hmcdOpt = HMCD_RMV_L2_ETHERNET;
  24953. + break;
  24954. + case (e_FM_PCD_MANIP_HDR_RMV_STACKED_QTAGS):
  24955. + hmcdOpt = HMCD_RMV_L2_STACKED_QTAGS;
  24956. + break;
  24957. + case (e_FM_PCD_MANIP_HDR_RMV_ETHERNET_AND_MPLS):
  24958. + hmcdOpt = HMCD_RMV_L2_ETHERNET_AND_MPLS;
  24959. + break;
  24960. + case (e_FM_PCD_MANIP_HDR_RMV_MPLS):
  24961. + hmcdOpt = HMCD_RMV_L2_MPLS;
  24962. + break;
  24963. + case (e_FM_PCD_MANIP_HDR_RMV_PPPOE):
  24964. + hmcdOpt = HMCD_RMV_L2_PPPOE;
  24965. + break;
  24966. + default:
  24967. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  24968. + }
  24969. + tmpReg |= hmcdOpt << HMCD_L2_MODE_SHIFT;
  24970. + break;
  24971. + }
  24972. +#if (DPAA_VERSION >= 11)
  24973. + case (e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP):
  24974. + tmpReg = (uint32_t)(HMCD_OPCODE_CAPWAP_RMV)
  24975. + << HMCD_OC_SHIFT;
  24976. + break;
  24977. + case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START):
  24978. + {
  24979. + uint8_t prsArrayOffset;
  24980. + t_Error err = E_OK;
  24981. +
  24982. + tmpReg = (uint32_t)(HMCD_OPCODE_RMV_TILL)
  24983. + << HMCD_OC_SHIFT;
  24984. +
  24985. + err =
  24986. + GetPrOffsetByHeaderOrField(
  24987. + &p_FmPcdManipParams->u.hdr.rmvParams.u.byHdr.u.hdrInfo,
  24988. + &prsArrayOffset);
  24989. + ASSERT_COND(!err);
  24990. + /* was previously checked */
  24991. +
  24992. + tmpReg |= ((uint32_t)prsArrayOffset << 16);
  24993. + }
  24994. + break;
  24995. +#endif /* (DPAA_VERSION >= 11) */
  24996. + default:
  24997. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  24998. + ("manip header remove by hdr type!"));
  24999. + }
  25000. + }
  25001. +
  25002. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25003. + /* save a pointer to the "last" indication word */
  25004. + p_Last = p_TmpHmct;
  25005. + /* advance to next command */
  25006. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25007. + }
  25008. +
  25009. + if (p_FmPcdManipParams->u.hdr.insrt)
  25010. + {
  25011. + if (p_FmPcdManipParams->u.hdr.insrtParams.type
  25012. + == e_FM_PCD_MANIP_INSRT_GENERIC)
  25013. + {
  25014. + /* initialize HMCD */
  25015. + if (p_FmPcdManipParams->u.hdr.insrtParams.u.generic.replace)
  25016. + tmpReg = (uint32_t)(HMCD_OPCODE_GENERIC_REPLACE)
  25017. + << HMCD_OC_SHIFT;
  25018. + else
  25019. + tmpReg = (uint32_t)(HMCD_OPCODE_GENERIC_INSRT) << HMCD_OC_SHIFT;
  25020. +
  25021. + tmpReg |= p_FmPcdManipParams->u.hdr.insrtParams.u.generic.offset
  25022. + << HMCD_INSRT_OFFSET_SHIFT;
  25023. + tmpReg |= p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size
  25024. + << HMCD_INSRT_SIZE_SHIFT;
  25025. +
  25026. + size = p_FmPcdManipParams->u.hdr.insrtParams.u.generic.size;
  25027. + p_UsrData = p_FmPcdManipParams->u.hdr.insrtParams.u.generic.p_Data;
  25028. +
  25029. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25030. + /* save a pointer to the "last" indication word */
  25031. + p_Last = p_TmpHmct;
  25032. +
  25033. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25034. +
  25035. + /* initialize data to be inserted */
  25036. + /* if size is not a multiple of 4, padd with 0's */
  25037. + origSize = size;
  25038. + remain = (uint8_t)(size % 4);
  25039. + if (remain)
  25040. + {
  25041. + size += (uint8_t)(4 - remain);
  25042. + p_LocalData = (uint32_t *)XX_Malloc(size);
  25043. + memset((uint8_t *)p_LocalData, 0, size);
  25044. + memcpy((uint8_t *)p_LocalData, p_UsrData, origSize);
  25045. + }
  25046. + else
  25047. + p_LocalData = (uint32_t*)p_UsrData;
  25048. +
  25049. + /* initialize data and advance pointer to next command */
  25050. + MemCpy8(p_TmpHmct, p_LocalData, size);
  25051. + p_TmpHmct += size / sizeof(uint32_t);
  25052. +
  25053. + if (remain)
  25054. + XX_Free(p_LocalData);
  25055. + }
  25056. +
  25057. + else
  25058. + if (p_FmPcdManipParams->u.hdr.insrtParams.type
  25059. + == e_FM_PCD_MANIP_INSRT_BY_HDR)
  25060. + {
  25061. + switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.type)
  25062. + {
  25063. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2):
  25064. + {
  25065. + uint8_t hmcdOpt;
  25066. +
  25067. + /* initialize HMCD */
  25068. + tmpReg = (uint32_t)(HMCD_OPCODE_L2_INSRT)
  25069. + << HMCD_OC_SHIFT;
  25070. +
  25071. + switch (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.specificL2)
  25072. + {
  25073. + case (e_FM_PCD_MANIP_HDR_INSRT_MPLS):
  25074. + if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.update)
  25075. + hmcdOpt = HMCD_INSRT_N_UPDATE_L2_MPLS;
  25076. + else
  25077. + hmcdOpt = HMCD_INSRT_L2_MPLS;
  25078. + break;
  25079. + case (e_FM_PCD_MANIP_HDR_INSRT_PPPOE):
  25080. + hmcdOpt = HMCD_INSRT_L2_PPPOE;
  25081. + break;
  25082. + default:
  25083. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
  25084. + }
  25085. + tmpReg |= hmcdOpt << HMCD_L2_MODE_SHIFT;
  25086. +
  25087. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25088. + /* save a pointer to the "last" indication word */
  25089. + p_Last = p_TmpHmct;
  25090. +
  25091. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25092. +
  25093. + /* set size and pointer of user's data */
  25094. + size =
  25095. + (uint8_t)p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.size;
  25096. +
  25097. + ASSERT_COND(p_TmpData);
  25098. + MemCpy8(
  25099. + p_TmpData,
  25100. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.specificL2Params.p_Data,
  25101. + size);
  25102. + tmpReg =
  25103. + (size << HMCD_INSRT_L2_SIZE_SHIFT)
  25104. + | (uint32_t)(XX_VirtToPhys(p_TmpData)
  25105. + - (((t_FmPcd*)h_FmPcd)->physicalMuramBase));
  25106. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25107. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25108. + p_TmpData += size;
  25109. + }
  25110. + break;
  25111. +#if (DPAA_VERSION >= 11)
  25112. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_IP):
  25113. + tmpReg = (uint32_t)(HMCD_OPCODE_IP_INSRT)
  25114. + << HMCD_OC_SHIFT;
  25115. + if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.calcL4Checksum)
  25116. + tmpReg |= HMCD_IP_L4_CS_CALC;
  25117. + if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.mappingMode
  25118. + == e_FM_PCD_MANIP_HDR_QOS_MAPPING_AS_IS)
  25119. + tmpReg |= HMCD_IP_OR_QOS;
  25120. + tmpReg |=
  25121. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.lastPidOffset
  25122. + & HMCD_IP_LAST_PID_MASK;
  25123. + tmpReg |=
  25124. + ((p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size
  25125. + << HMCD_IP_SIZE_SHIFT)
  25126. + & HMCD_IP_SIZE_MASK);
  25127. + if (p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.dontFragOverwrite)
  25128. + tmpReg |= HMCD_IP_DF_MODE;
  25129. +
  25130. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25131. +
  25132. + /* save a pointer to the "last" indication word */
  25133. + p_Last = p_TmpHmct;
  25134. +
  25135. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25136. +
  25137. + /* set IP id */
  25138. + ASSERT_COND(p_TmpData);
  25139. + WRITE_UINT16(
  25140. + *(uint16_t*)p_TmpData,
  25141. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.id);
  25142. + WRITE_UINT32(
  25143. + *p_TmpHmct,
  25144. + (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)));
  25145. + p_TmpData += 2;
  25146. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25147. +
  25148. + WRITE_UINT8(*p_TmpHmct, p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.lastDstOffset);
  25149. + p_TmpHmct += HMCD_PARAM_SIZE / 4;
  25150. +
  25151. + MemCpy8(
  25152. + p_TmpHmct,
  25153. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.p_Data,
  25154. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size);
  25155. + p_TmpHmct +=
  25156. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size
  25157. + / 4;
  25158. + break;
  25159. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE):
  25160. + tmpReg = HMCD_INSRT_UDP_LITE;
  25161. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP):
  25162. + tmpReg |= (uint32_t)(HMCD_OPCODE_UDP_INSRT)
  25163. + << HMCD_OC_SHIFT;
  25164. +
  25165. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25166. +
  25167. + /* save a pointer to the "last" indication word */
  25168. + p_Last = p_TmpHmct;
  25169. +
  25170. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25171. +
  25172. + MemCpy8(
  25173. + p_TmpHmct,
  25174. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.p_Data,
  25175. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size);
  25176. + p_TmpHmct +=
  25177. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
  25178. + / 4;
  25179. + break;
  25180. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP):
  25181. + tmpReg = (uint32_t)(HMCD_OPCODE_CAPWAP_INSRT)
  25182. + << HMCD_OC_SHIFT;
  25183. + tmpReg |= HMCD_CAPWAP_INSRT;
  25184. +
  25185. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25186. +
  25187. + /* save a pointer to the "last" indication word */
  25188. + p_Last = p_TmpHmct;
  25189. +
  25190. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25191. +
  25192. + MemCpy8(
  25193. + p_TmpHmct,
  25194. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.p_Data,
  25195. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size);
  25196. + p_TmpHmct +=
  25197. + p_FmPcdManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
  25198. + / 4;
  25199. + break;
  25200. +#endif /* (DPAA_VERSION >= 11) */
  25201. + default:
  25202. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  25203. + ("manip header insert by header type!"));
  25204. +
  25205. + }
  25206. + }
  25207. + }
  25208. +
  25209. + if (p_FmPcdManipParams->u.hdr.fieldUpdate)
  25210. + {
  25211. + switch (p_FmPcdManipParams->u.hdr.fieldUpdateParams.type)
  25212. + {
  25213. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN):
  25214. + /* set opcode */
  25215. + tmpReg = (uint32_t)(HMCD_OPCODE_VLAN_PRI_UPDATE)
  25216. + << HMCD_OC_SHIFT;
  25217. +
  25218. + /* set mode & table pointer */
  25219. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
  25220. + == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN)
  25221. + {
  25222. + /* set Mode */
  25223. + tmpReg |= (uint32_t)(HMCD_VLAN_PRI_UPDATE_DSCP_TO_VPRI)
  25224. + << HMCD_VLAN_PRI_REP_MODE_SHIFT;
  25225. + /* set VPRI default */
  25226. + tmpReg |=
  25227. + p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.vpriDefVal;
  25228. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25229. + /* save a pointer to the "last" indication word */
  25230. + p_Last = p_TmpHmct;
  25231. + /* write the table pointer into the Manip descriptor */
  25232. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25233. +
  25234. + tmpReg = 0;
  25235. + ASSERT_COND(p_TmpData);
  25236. + for (i = 0; i < HMCD_DSCP_VALUES; i++)
  25237. + {
  25238. + /* first we build from each 8 values a 32bit register */
  25239. + tmpReg |=
  25240. + (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.dscpToVpriTable[i])
  25241. + << (32 - 4 * (j + 1));
  25242. + j++;
  25243. + /* Than we write this register to the next table word
  25244. + * (i=7-->word 0, i=15-->word 1,... i=63-->word 7) */
  25245. + if ((i % 8) == 7)
  25246. + {
  25247. + WRITE_UINT32(*((uint32_t*)p_TmpData + (i+1)/8-1),
  25248. + tmpReg);
  25249. + tmpReg = 0;
  25250. + j = 0;
  25251. + }
  25252. + }
  25253. +
  25254. + WRITE_UINT32(
  25255. + *p_TmpHmct,
  25256. + (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)h_FmPcd)->physicalMuramBase)));
  25257. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25258. +
  25259. + p_TmpData += DSCP_TO_VLAN_TABLE_SIZE;
  25260. + }
  25261. + else
  25262. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
  25263. + == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI)
  25264. + {
  25265. + /* set Mode */
  25266. + /* line commented out as it has no-side-effect ('0' value). */
  25267. + /*tmpReg |= HMCD_VLAN_PRI_UPDATE << HMCD_VLAN_PRI_REP_MODE_SHIFT*/;
  25268. + /* set VPRI parameter */
  25269. + tmpReg |=
  25270. + p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.vlan.u.vpri;
  25271. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25272. + /* save a pointer to the "last" indication word */
  25273. + p_Last = p_TmpHmct;
  25274. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25275. + }
  25276. + break;
  25277. +
  25278. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4):
  25279. + /* set opcode */
  25280. + tmpReg = (uint32_t)(HMCD_OPCODE_IPV4_UPDATE) << HMCD_OC_SHIFT;
  25281. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25282. + & HDR_MANIP_IPV4_TTL)
  25283. + tmpReg |= HMCD_IPV4_UPDATE_TTL;
  25284. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25285. + & HDR_MANIP_IPV4_TOS)
  25286. + {
  25287. + tmpReg |= HMCD_IPV4_UPDATE_TOS;
  25288. + tmpReg |=
  25289. + p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.tos
  25290. + << HMCD_IPV4_UPDATE_TOS_SHIFT;
  25291. + }
  25292. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25293. + & HDR_MANIP_IPV4_ID)
  25294. + tmpReg |= HMCD_IPV4_UPDATE_ID;
  25295. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25296. + & HDR_MANIP_IPV4_SRC)
  25297. + tmpReg |= HMCD_IPV4_UPDATE_SRC;
  25298. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25299. + & HDR_MANIP_IPV4_DST)
  25300. + tmpReg |= HMCD_IPV4_UPDATE_DST;
  25301. + /* write the first 4 bytes of the descriptor */
  25302. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25303. + /* save a pointer to the "last" indication word */
  25304. + p_Last = p_TmpHmct;
  25305. +
  25306. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25307. +
  25308. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25309. + & HDR_MANIP_IPV4_ID)
  25310. + {
  25311. + ASSERT_COND(p_TmpData);
  25312. + WRITE_UINT16(
  25313. + *(uint16_t*)p_TmpData,
  25314. + p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.id);
  25315. + WRITE_UINT32(
  25316. + *p_TmpHmct,
  25317. + (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)));
  25318. + p_TmpData += 2;
  25319. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25320. + }
  25321. +
  25322. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25323. + & HDR_MANIP_IPV4_SRC)
  25324. + {
  25325. + WRITE_UINT32(
  25326. + *p_TmpHmct,
  25327. + p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.src);
  25328. + p_TmpHmct += HMCD_IPV4_ADDR_SIZE / 4;
  25329. + }
  25330. +
  25331. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.validUpdates
  25332. + & HDR_MANIP_IPV4_DST)
  25333. + {
  25334. + WRITE_UINT32(
  25335. + *p_TmpHmct,
  25336. + p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv4.dst);
  25337. + p_TmpHmct += HMCD_IPV4_ADDR_SIZE / 4;
  25338. + }
  25339. + break;
  25340. +
  25341. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6):
  25342. + /* set opcode */
  25343. + tmpReg = (uint32_t)(HMCD_OPCODE_IPV6_UPDATE) << HMCD_OC_SHIFT;
  25344. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
  25345. + & HDR_MANIP_IPV6_HL)
  25346. + tmpReg |= HMCD_IPV6_UPDATE_HL;
  25347. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
  25348. + & HDR_MANIP_IPV6_TC)
  25349. + {
  25350. + tmpReg |= HMCD_IPV6_UPDATE_TC;
  25351. + tmpReg |=
  25352. + p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.trafficClass
  25353. + << HMCD_IPV6_UPDATE_TC_SHIFT;
  25354. + }
  25355. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
  25356. + & HDR_MANIP_IPV6_SRC)
  25357. + tmpReg |= HMCD_IPV6_UPDATE_SRC;
  25358. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
  25359. + & HDR_MANIP_IPV6_DST)
  25360. + tmpReg |= HMCD_IPV6_UPDATE_DST;
  25361. + /* write the first 4 bytes of the descriptor */
  25362. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25363. + /* save a pointer to the "last" indication word */
  25364. + p_Last = p_TmpHmct;
  25365. +
  25366. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25367. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
  25368. + & HDR_MANIP_IPV6_SRC)
  25369. + {
  25370. + for (i = 0; i < NET_HEADER_FIELD_IPv6_ADDR_SIZE; i += 4)
  25371. + {
  25372. + memcpy(&tmp_ipv6_addr,
  25373. + &p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.src[i],
  25374. + sizeof(uint32_t));
  25375. + WRITE_UINT32(*p_TmpHmct, tmp_ipv6_addr);
  25376. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25377. + }
  25378. + }
  25379. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.validUpdates
  25380. + & HDR_MANIP_IPV6_DST)
  25381. + {
  25382. + for (i = 0; i < NET_HEADER_FIELD_IPv6_ADDR_SIZE; i += 4)
  25383. + {
  25384. + memcpy(&tmp_ipv6_addr,
  25385. + &p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.ipv6.dst[i],
  25386. + sizeof(uint32_t));
  25387. + WRITE_UINT32(*p_TmpHmct, tmp_ipv6_addr);
  25388. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25389. + }
  25390. + }
  25391. + break;
  25392. +
  25393. + case (e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP):
  25394. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
  25395. + == HDR_MANIP_TCP_UDP_CHECKSUM)
  25396. + {
  25397. + /* we implement this case with the update-checksum descriptor */
  25398. + /* set opcode */
  25399. + tmpReg = (uint32_t)(HMCD_OPCODE_TCP_UDP_CHECKSUM)
  25400. + << HMCD_OC_SHIFT;
  25401. + /* write the first 4 bytes of the descriptor */
  25402. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25403. + /* save a pointer to the "last" indication word */
  25404. + p_Last = p_TmpHmct;
  25405. +
  25406. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25407. + }
  25408. + else
  25409. + {
  25410. + /* we implement this case with the TCP/UDP update descriptor */
  25411. + /* set opcode */
  25412. + tmpReg = (uint32_t)(HMCD_OPCODE_TCP_UDP_UPDATE)
  25413. + << HMCD_OC_SHIFT;
  25414. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
  25415. + & HDR_MANIP_TCP_UDP_DST)
  25416. + tmpReg |= HMCD_TCP_UDP_UPDATE_DST;
  25417. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
  25418. + & HDR_MANIP_TCP_UDP_SRC)
  25419. + tmpReg |= HMCD_TCP_UDP_UPDATE_SRC;
  25420. + /* write the first 4 bytes of the descriptor */
  25421. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25422. + /* save a pointer to the "last" indication word */
  25423. + p_Last = p_TmpHmct;
  25424. +
  25425. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25426. +
  25427. + tmpReg = 0;
  25428. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
  25429. + & HDR_MANIP_TCP_UDP_SRC)
  25430. + tmpReg |=
  25431. + ((uint32_t)p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.src)
  25432. + << HMCD_TCP_UDP_UPDATE_SRC_SHIFT;
  25433. + if (p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.validUpdates
  25434. + & HDR_MANIP_TCP_UDP_DST)
  25435. + tmpReg |=
  25436. + ((uint32_t)p_FmPcdManipParams->u.hdr.fieldUpdateParams.u.tcpUdp.dst);
  25437. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25438. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25439. + }
  25440. + break;
  25441. +
  25442. + default:
  25443. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  25444. + ("Unknown fieldUpdateParams.type"));
  25445. + }
  25446. + }
  25447. +
  25448. + if (p_FmPcdManipParams->u.hdr.custom)
  25449. + {
  25450. + switch (p_FmPcdManipParams->u.hdr.customParams.type)
  25451. + {
  25452. + case (e_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE):
  25453. + /* set opcode */
  25454. + tmpReg = (uint32_t)(HMCD_OPCODE_REPLACE_IP) << HMCD_OC_SHIFT;
  25455. +
  25456. + if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.decTtlHl)
  25457. + tmpReg |= HMCD_IP_REPLACE_TTL_HL;
  25458. + if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
  25459. + == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV4_BY_IPV6)
  25460. + /* line commented out as it has no-side-effect ('0' value). */
  25461. + /*tmpReg |= HMCD_IP_REPLACE_REPLACE_IPV4*/;
  25462. + else
  25463. + if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
  25464. + == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4)
  25465. + {
  25466. + tmpReg |= HMCD_IP_REPLACE_REPLACE_IPV6;
  25467. + if (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.updateIpv4Id)
  25468. + tmpReg |= HMCD_IP_REPLACE_ID;
  25469. + }
  25470. + else
  25471. + RETURN_ERROR(
  25472. + MINOR,
  25473. + E_NOT_SUPPORTED,
  25474. + ("One flag out of HDR_MANIP_IP_REPLACE_IPV4, HDR_MANIP_IP_REPLACE_IPV6 - must be set."));
  25475. +
  25476. + /* write the first 4 bytes of the descriptor */
  25477. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25478. + /* save a pointer to the "last" indication word */
  25479. + p_Last = p_TmpHmct;
  25480. +
  25481. + p_TmpHmct += HMCD_BASIC_SIZE / 4;
  25482. +
  25483. + size =
  25484. + p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.hdrSize;
  25485. + ASSERT_COND(p_TmpData);
  25486. + MemCpy8(
  25487. + p_TmpData,
  25488. + p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.hdr,
  25489. + size);
  25490. + tmpReg = (uint32_t)(size << HMCD_IP_REPLACE_L3HDRSIZE_SHIFT);
  25491. + tmpReg |= (uint32_t)(XX_VirtToPhys(p_TmpData)
  25492. + - (((t_FmPcd*)h_FmPcd)->physicalMuramBase));
  25493. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25494. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25495. + p_TmpData += size;
  25496. +
  25497. + if ((p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.replaceType
  25498. + == e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4)
  25499. + && (p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.updateIpv4Id))
  25500. + {
  25501. + WRITE_UINT16(
  25502. + *(uint16_t*)p_TmpData,
  25503. + p_FmPcdManipParams->u.hdr.customParams.u.ipHdrReplace.id);
  25504. + WRITE_UINT32(
  25505. + *p_TmpHmct,
  25506. + (uint32_t)(XX_VirtToPhys(p_TmpData) - (((t_FmPcd*)h_FmPcd)->physicalMuramBase)));
  25507. + p_TmpData += 2;
  25508. + }
  25509. + p_TmpHmct += HMCD_PTR_SIZE / 4;
  25510. + break;
  25511. + case (e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE):
  25512. + /* set opcode */
  25513. + tmpReg = (uint32_t)(HMCD_OPCODE_GEN_FIELD_REPLACE) << HMCD_OC_SHIFT;
  25514. + tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.size << HMCD_GEN_FIELD_SIZE_SHIFT;
  25515. + tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.srcOffset << HMCD_GEN_FIELD_SRC_OFF_SHIFT;
  25516. + tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.dstOffset << HMCD_GEN_FIELD_DST_OFF_SHIFT;
  25517. + if (p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.mask)
  25518. + tmpReg |= HMCD_GEN_FIELD_MASK_EN;
  25519. +
  25520. + /* write the first 4 bytes of the descriptor */
  25521. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25522. + /* save a pointer to the "last" indication word */
  25523. + p_Last = p_TmpHmct;
  25524. +
  25525. + p_TmpHmct += HMCD_BASIC_SIZE/4;
  25526. +
  25527. + if (p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.mask)
  25528. + {
  25529. + tmpReg = p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.mask << HMCD_GEN_FIELD_MASK_SHIFT;
  25530. + tmpReg |= p_FmPcdManipParams->u.hdr.customParams.u.genFieldReplace.maskOffset << HMCD_GEN_FIELD_MASK_OFF_SHIFT;
  25531. + /* write the next 4 bytes of the descriptor */
  25532. + WRITE_UINT32(*p_TmpHmct, tmpReg);
  25533. + }
  25534. + p_TmpHmct += HMCD_PARAM_SIZE/4;
  25535. + break;
  25536. + default:
  25537. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  25538. + ("Unknown customParams.type"));
  25539. + }
  25540. + }
  25541. +
  25542. + /* If this node has a nextManip, and no parsing is required, the old table must be copied to the new table
  25543. + the old table and should be freed */
  25544. + if (p_FmPcdManipParams->h_NextManip
  25545. + && (p_Manip->nextManipType == e_FM_PCD_MANIP_HDR)
  25546. + && (MANIP_DONT_REPARSE(p_Manip)))
  25547. + {
  25548. + if (new)
  25549. + {
  25550. + /* If this is the first time this manip is created we need to free unused memory. If it
  25551. + * is a dynamic changes case, the memory used is either the CC shadow or the existing
  25552. + * table - no allocation, no free */
  25553. + MANIP_UPDATE_UNIFIED_POSITION(p_FmPcdManipParams->h_NextManip);
  25554. +
  25555. + p_Manip->unifiedPosition = e_MANIP_UNIFIED_FIRST;
  25556. + }
  25557. + }
  25558. + else
  25559. + {
  25560. + ASSERT_COND(p_Last);
  25561. + /* set the "last" indication on the last command of the current table */
  25562. + WRITE_UINT32(*p_Last, GET_UINT32(*p_Last) | HMCD_LAST);
  25563. + }
  25564. +
  25565. + return E_OK;
  25566. +}
  25567. +
  25568. +static t_Error CreateManipActionNew(t_FmPcdManip *p_Manip,
  25569. + t_FmPcdManipParams *p_FmPcdManipParams)
  25570. +{
  25571. + t_FmPcdManip *p_CurManip;
  25572. + t_Error err;
  25573. + uint32_t nextSize = 0, totalSize;
  25574. + uint16_t tmpReg;
  25575. + uint8_t *p_OldHmct, *p_TmpHmctPtr, *p_TmpDataPtr;
  25576. +
  25577. + /* set Manip structure */
  25578. +
  25579. + p_Manip->dontParseAfterManip =
  25580. + p_FmPcdManipParams->u.hdr.dontParseAfterManip;
  25581. +
  25582. + if (p_FmPcdManipParams->h_NextManip)
  25583. + { /* Next Header manipulation exists */
  25584. + p_Manip->nextManipType = MANIP_GET_TYPE(p_FmPcdManipParams->h_NextManip);
  25585. +
  25586. + if ((p_Manip->nextManipType == e_FM_PCD_MANIP_HDR) && p_Manip->dontParseAfterManip)
  25587. + nextSize = (uint32_t)(GetHmctSize(p_FmPcdManipParams->h_NextManip)
  25588. + + GetDataSize(p_FmPcdManipParams->h_NextManip));
  25589. + else /* either parsing is required or next manip is Frag; no table merging. */
  25590. + p_Manip->cascaded = TRUE;
  25591. + /* pass up the "cascaded" attribute. The whole chain is cascaded
  25592. + * if something is cascaded along the way. */
  25593. + if (MANIP_IS_CASCADED(p_FmPcdManipParams->h_NextManip))
  25594. + p_Manip->cascaded = TRUE;
  25595. + }
  25596. +
  25597. + /* Allocate new table */
  25598. + /* calculate table size according to manip parameters */
  25599. + err = CalculateTableSize(p_FmPcdManipParams, &p_Manip->tableSize,
  25600. + &p_Manip->dataSize);
  25601. + if (err)
  25602. + RETURN_ERROR(MINOR, err, NO_MSG);
  25603. +
  25604. + totalSize = (uint16_t)(p_Manip->tableSize + p_Manip->dataSize + nextSize);
  25605. +
  25606. + p_Manip->p_Hmct = (uint8_t*)FM_MURAM_AllocMem(
  25607. + ((t_FmPcd *)p_Manip->h_FmPcd)->h_FmMuram, totalSize, 4);
  25608. + if (!p_Manip->p_Hmct)
  25609. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc failed"));
  25610. +
  25611. + if (p_Manip->dataSize)
  25612. + p_Manip->p_Data =
  25613. + (uint8_t*)PTR_MOVE(p_Manip->p_Hmct, (p_Manip->tableSize + nextSize));
  25614. +
  25615. + /* update shadow size to allow runtime replacement of Header manipulation */
  25616. + /* The allocated shadow is divided as follows:
  25617. + 0 . . . 16 . . .
  25618. + --------------------------------
  25619. + | Shadow | Shadow HMTD |
  25620. + | HMTD | Match Table |
  25621. + | (16 bytes) | (maximal size) |
  25622. + --------------------------------
  25623. + */
  25624. +
  25625. + err = FmPcdUpdateCcShadow(p_Manip->h_FmPcd, (uint32_t)(totalSize + 16),
  25626. + (uint16_t)FM_PCD_CC_AD_TABLE_ALIGN);
  25627. + if (err != E_OK)
  25628. + {
  25629. + FM_MURAM_FreeMem(p_Manip->h_FmPcd, p_Manip->p_Hmct);
  25630. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  25631. + ("MURAM allocation for HdrManip node shadow"));
  25632. + }
  25633. +
  25634. + if (p_FmPcdManipParams->h_NextManip
  25635. + && (p_Manip->nextManipType == e_FM_PCD_MANIP_HDR)
  25636. + && (MANIP_DONT_REPARSE(p_Manip)))
  25637. + {
  25638. + p_OldHmct = (uint8_t *)GetManipInfo(p_FmPcdManipParams->h_NextManip,
  25639. + e_MANIP_HMCT);
  25640. + p_CurManip = p_FmPcdManipParams->h_NextManip;
  25641. + /* Run till the last Manip (which is the first to configure) */
  25642. + while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
  25643. + p_CurManip = p_CurManip->h_NextManip;
  25644. +
  25645. + while (p_CurManip)
  25646. + {
  25647. + /* If this is a unified table, point to the part of the table
  25648. + * which is the relative offset in HMCT.
  25649. + */
  25650. + p_TmpHmctPtr = (uint8_t*)PTR_MOVE(p_Manip->p_Hmct,
  25651. + (p_Manip->tableSize +
  25652. + (PTR_TO_UINT(p_CurManip->p_Hmct) -
  25653. + PTR_TO_UINT(p_OldHmct))));
  25654. + if (p_CurManip->p_Data)
  25655. + p_TmpDataPtr = (uint8_t*)PTR_MOVE(p_Manip->p_Hmct,
  25656. + (p_Manip->tableSize +
  25657. + (PTR_TO_UINT(p_CurManip->p_Data) -
  25658. + PTR_TO_UINT(p_OldHmct))));
  25659. + else
  25660. + p_TmpDataPtr = NULL;
  25661. +
  25662. + BuildHmct(p_CurManip, &p_CurManip->manipParams, p_TmpHmctPtr,
  25663. + p_TmpDataPtr, FALSE);
  25664. + /* update old manip table pointer */
  25665. + MANIP_SET_HMCT_PTR(p_CurManip, p_TmpHmctPtr);
  25666. + MANIP_SET_DATA_PTR(p_CurManip, p_TmpDataPtr);
  25667. +
  25668. + p_CurManip = p_CurManip->h_PrevManip;
  25669. + }
  25670. + /* We copied the HMCT to create a new large HMCT so we can free the old one */
  25671. + FM_MURAM_FreeMem(MANIP_GET_MURAM(p_FmPcdManipParams->h_NextManip),
  25672. + p_OldHmct);
  25673. + }
  25674. +
  25675. + /* Fill table */
  25676. + err = BuildHmct(p_Manip, p_FmPcdManipParams, p_Manip->p_Hmct,
  25677. + p_Manip->p_Data, TRUE);
  25678. + if (err)
  25679. + {
  25680. + FM_MURAM_FreeMem(p_Manip->h_FmPcd, p_Manip->p_Hmct);
  25681. + RETURN_ERROR(MINOR, err, NO_MSG);
  25682. + }
  25683. +
  25684. + /* Build HMTD (table descriptor) */
  25685. + tmpReg = HMTD_CFG_TYPE; /* NADEN = 0 */
  25686. +
  25687. + /* add parseAfterManip */
  25688. + if (!p_Manip->dontParseAfterManip)
  25689. + tmpReg |= HMTD_CFG_PRS_AFTER_HM;
  25690. +
  25691. + /* create cascade */
  25692. + /*if (p_FmPcdManipParams->h_NextManip
  25693. + && (!MANIP_DONT_REPARSE(p_Manip) || (p_Manip->nextManipType != e_FM_PCD_MANIP_HDR)))*/
  25694. + if (p_Manip->cascaded)
  25695. + {
  25696. + uint16_t nextAd;
  25697. + /* indicate that there's another HM table descriptor */
  25698. + tmpReg |= HMTD_CFG_NEXT_AD_EN;
  25699. + /* get address of next HMTD (table descriptor; h_Ad).
  25700. + * If the next HMTD was removed due to table unifing, get the address
  25701. + * of the "next next" as written in the h_Ad of the next h_Manip node.
  25702. + */
  25703. + if (p_Manip->unifiedPosition != e_MANIP_UNIFIED_FIRST)
  25704. + nextAd = (uint16_t)((uint32_t)(XX_VirtToPhys(MANIP_GET_HMTD_PTR(p_FmPcdManipParams->h_NextManip)) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)) >> 4);
  25705. + else
  25706. + nextAd = ((t_Hmtd *)((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad)->nextAdIdx;
  25707. +
  25708. + WRITE_UINT16(((t_Hmtd *)p_Manip->h_Ad)->nextAdIdx, nextAd);
  25709. + }
  25710. +
  25711. + WRITE_UINT16(((t_Hmtd *)p_Manip->h_Ad)->cfg, tmpReg);
  25712. + WRITE_UINT32(
  25713. + ((t_Hmtd *)p_Manip->h_Ad)->hmcdBasePtr,
  25714. + (uint32_t)(XX_VirtToPhys(p_Manip->p_Hmct) - (((t_FmPcd*)p_Manip->h_FmPcd)->physicalMuramBase)));
  25715. +
  25716. + WRITE_UINT8(((t_Hmtd *)p_Manip->h_Ad)->opCode, HMAN_OC);
  25717. +
  25718. + if (p_Manip->unifiedPosition == e_MANIP_UNIFIED_FIRST)
  25719. + {
  25720. + /* The HMTD of the next Manip is never going to be used */
  25721. + if (((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->muramAllocate)
  25722. + FM_MURAM_FreeMem(
  25723. + ((t_FmPcd *)((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_FmPcd)->h_FmMuram,
  25724. + ((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad);
  25725. + else
  25726. + XX_Free(((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad);
  25727. + ((t_FmPcdManip *)p_FmPcdManipParams->h_NextManip)->h_Ad = NULL;
  25728. + }
  25729. +
  25730. + return E_OK;
  25731. +}
  25732. +
  25733. +static t_Error CreateManipActionShadow(t_FmPcdManip *p_Manip,
  25734. + t_FmPcdManipParams *p_FmPcdManipParams)
  25735. +{
  25736. + uint8_t *p_WholeHmct, *p_TmpHmctPtr, newDataSize, *p_TmpDataPtr = NULL;
  25737. + uint16_t newSize;
  25738. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
  25739. + t_Error err;
  25740. + t_FmPcdManip *p_CurManip = p_Manip;
  25741. +
  25742. + err = CalculateTableSize(p_FmPcdManipParams, &newSize, &newDataSize);
  25743. + if (err)
  25744. + RETURN_ERROR(MINOR, err, NO_MSG);
  25745. +
  25746. + /* check coherency of new table parameters */
  25747. + if (newSize > p_Manip->tableSize)
  25748. + RETURN_ERROR(
  25749. + MINOR,
  25750. + E_INVALID_VALUE,
  25751. + ("New Hdr Manip configuration requires larger size than current one (command table)."));
  25752. + if (newDataSize > p_Manip->dataSize)
  25753. + RETURN_ERROR(
  25754. + MINOR,
  25755. + E_INVALID_VALUE,
  25756. + ("New Hdr Manip configuration requires larger size than current one (data)."));
  25757. + if (p_FmPcdManipParams->h_NextManip)
  25758. + RETURN_ERROR(
  25759. + MINOR, E_INVALID_VALUE,
  25760. + ("New Hdr Manip configuration can not contain h_NextManip."));
  25761. + if (MANIP_IS_UNIFIED(p_Manip) && (newSize != p_Manip->tableSize))
  25762. + RETURN_ERROR(
  25763. + MINOR,
  25764. + E_INVALID_VALUE,
  25765. + ("New Hdr Manip configuration in a chained manipulation requires different size than current one."));
  25766. + if (p_Manip->dontParseAfterManip
  25767. + != p_FmPcdManipParams->u.hdr.dontParseAfterManip)
  25768. + RETURN_ERROR(
  25769. + MINOR,
  25770. + E_INVALID_VALUE,
  25771. + ("New Hdr Manip configuration differs in dontParseAfterManip value."));
  25772. +
  25773. + p_Manip->tableSize = newSize;
  25774. + p_Manip->dataSize = newDataSize;
  25775. +
  25776. + /* Build the new table in the shadow */
  25777. + if (!MANIP_IS_UNIFIED(p_Manip))
  25778. + {
  25779. + p_TmpHmctPtr = (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow, 16);
  25780. + if (p_Manip->p_Data)
  25781. + p_TmpDataPtr =
  25782. + (uint8_t*)PTR_MOVE(p_TmpHmctPtr,
  25783. + (PTR_TO_UINT(p_Manip->p_Data) - PTR_TO_UINT(p_Manip->p_Hmct)));
  25784. +
  25785. + BuildHmct(p_Manip, p_FmPcdManipParams, p_TmpHmctPtr, p_Manip->p_Data,
  25786. + FALSE);
  25787. + }
  25788. + else
  25789. + {
  25790. + p_WholeHmct = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMCT);
  25791. + ASSERT_COND(p_WholeHmct);
  25792. +
  25793. + /* Run till the last Manip (which is the first to configure) */
  25794. + while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
  25795. + p_CurManip = p_CurManip->h_NextManip;
  25796. +
  25797. + while (p_CurManip)
  25798. + {
  25799. + /* If this is a non-head node in a unified table, point to the part of the shadow
  25800. + * which is the relative offset in HMCT.
  25801. + * else, point to the beginning of the
  25802. + * shadow table (we save 16 for the HMTD.
  25803. + */
  25804. + p_TmpHmctPtr =
  25805. + (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow,
  25806. + (16 + PTR_TO_UINT(p_CurManip->p_Hmct) - PTR_TO_UINT(p_WholeHmct)));
  25807. + if (p_CurManip->p_Data)
  25808. + p_TmpDataPtr =
  25809. + (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow,
  25810. + (16 + PTR_TO_UINT(p_CurManip->p_Data) - PTR_TO_UINT(p_WholeHmct)));
  25811. +
  25812. + BuildHmct(p_CurManip, &p_CurManip->manipParams, p_TmpHmctPtr,
  25813. + p_TmpDataPtr, FALSE);
  25814. + p_CurManip = p_CurManip->h_PrevManip;
  25815. + }
  25816. + }
  25817. +
  25818. + return E_OK;
  25819. +}
  25820. +
  25821. +static t_Error CreateManipActionBackToOrig(
  25822. + t_FmPcdManip *p_Manip, t_FmPcdManipParams *p_FmPcdManipParams)
  25823. +{
  25824. + uint8_t *p_WholeHmct = NULL, *p_TmpHmctPtr, *p_TmpDataPtr;
  25825. + t_FmPcdManip *p_CurManip = p_Manip;
  25826. +
  25827. + /* Build the new table in the shadow */
  25828. + if (!MANIP_IS_UNIFIED(p_Manip))
  25829. + BuildHmct(p_Manip, p_FmPcdManipParams, p_Manip->p_Hmct, p_Manip->p_Data,
  25830. + FALSE);
  25831. + else
  25832. + {
  25833. + p_WholeHmct = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMCT);
  25834. + ASSERT_COND(p_WholeHmct);
  25835. +
  25836. + /* Run till the last Manip (which is the first to configure) */
  25837. + while (MANIP_IS_UNIFIED_NON_LAST(p_CurManip))
  25838. + p_CurManip = p_CurManip->h_NextManip;
  25839. +
  25840. + while (p_CurManip)
  25841. + {
  25842. + /* If this is a unified table, point to the part of the table
  25843. + * which is the relative offset in HMCT.
  25844. + */
  25845. + p_TmpHmctPtr = p_CurManip->p_Hmct; /*- (uint32_t)p_WholeHmct*/
  25846. + p_TmpDataPtr = p_CurManip->p_Data; /*- (uint32_t)p_WholeHmct*/
  25847. +
  25848. + BuildHmct(p_CurManip, &p_CurManip->manipParams, p_TmpHmctPtr,
  25849. + p_TmpDataPtr, FALSE);
  25850. +
  25851. + p_CurManip = p_CurManip->h_PrevManip;
  25852. + }
  25853. + }
  25854. +
  25855. + return E_OK;
  25856. +}
  25857. +
  25858. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  25859. +static t_Error UpdateManipIc(t_Handle h_Manip, uint8_t icOffset)
  25860. +{
  25861. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  25862. + t_Handle p_Ad;
  25863. + uint32_t tmpReg32 = 0;
  25864. + SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
  25865. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
  25866. +
  25867. + switch (p_Manip->opcode)
  25868. + {
  25869. + case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
  25870. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  25871. + if (p_Manip->updateParams & INTERNAL_CONTEXT_OFFSET)
  25872. + {
  25873. + tmpReg32 =
  25874. + *(uint32_t *)&((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets;
  25875. + tmpReg32 |= (uint32_t)((uint32_t)icOffset << 16);
  25876. + *(uint32_t *)&((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets =
  25877. + tmpReg32;
  25878. + p_Manip->updateParams &= ~INTERNAL_CONTEXT_OFFSET;
  25879. + p_Manip->icOffset = icOffset;
  25880. + }
  25881. + else
  25882. + {
  25883. + if (p_Manip->icOffset != icOffset)
  25884. + RETURN_ERROR(
  25885. + MAJOR,
  25886. + E_INVALID_VALUE,
  25887. + ("this manipulation was updated previously by different value"););
  25888. + }
  25889. + break;
  25890. + case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
  25891. + if (p_Manip->h_Frag)
  25892. + {
  25893. + if (p_Manip->updateParams & INTERNAL_CONTEXT_OFFSET)
  25894. + {
  25895. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  25896. + tmpReg32 |= GET_UINT32(((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets);
  25897. + tmpReg32 |= (uint32_t)((uint32_t)icOffset << 16);
  25898. + WRITE_UINT32(((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets, tmpReg32);
  25899. + p_Manip->updateParams &= ~INTERNAL_CONTEXT_OFFSET;
  25900. + p_Manip->icOffset = icOffset;
  25901. + }
  25902. + else
  25903. + {
  25904. + if (p_Manip->icOffset != icOffset)
  25905. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("this manipulation was updated previousely by different value"););
  25906. + }
  25907. + }
  25908. + break;
  25909. + }
  25910. +
  25911. + return E_OK;
  25912. +}
  25913. +
  25914. +static t_Error UpdateInitMvIntFrameHeaderFromFrameToBufferPrefix(
  25915. + t_Handle h_FmPort, t_FmPcdManip *p_Manip, t_Handle h_Ad, bool validate)
  25916. +{
  25917. +
  25918. + t_AdOfTypeContLookup *p_Ad = (t_AdOfTypeContLookup *)h_Ad;
  25919. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  25920. + t_Error err;
  25921. + uint32_t tmpReg32;
  25922. +
  25923. + memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
  25924. +
  25925. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  25926. + SANITY_CHECK_RETURN_ERROR(
  25927. + (p_Manip->opcode & HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX),
  25928. + E_INVALID_STATE);
  25929. + SANITY_CHECK_RETURN_ERROR(!p_Manip->muramAllocate, E_INVALID_STATE);
  25930. +
  25931. + if (p_Manip->updateParams)
  25932. + {
  25933. + if ((!(p_Manip->updateParams & OFFSET_OF_PR))
  25934. + || (p_Manip->shadowUpdateParams & OFFSET_OF_PR))
  25935. + RETURN_ERROR(
  25936. + MAJOR, E_INVALID_STATE,
  25937. + ("in this stage parameters from Port has not be updated"));
  25938. +
  25939. + fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams;
  25940. + fmPortGetSetCcParams.setCcParams.type = UPDATE_PSO;
  25941. + fmPortGetSetCcParams.setCcParams.psoSize = 16;
  25942. +
  25943. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  25944. + if (err)
  25945. + RETURN_ERROR(MAJOR, err, NO_MSG);
  25946. + if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR)
  25947. + RETURN_ERROR(
  25948. + MAJOR, E_INVALID_STATE,
  25949. + ("Parser result offset wasn't configured previousely"));
  25950. +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
  25951. + ASSERT_COND(!(fmPortGetSetCcParams.getCcParams.prOffset % 16));
  25952. +#endif
  25953. + }
  25954. + else
  25955. + if (validate)
  25956. + {
  25957. + if ((!(p_Manip->shadowUpdateParams & OFFSET_OF_PR))
  25958. + || (p_Manip->updateParams & OFFSET_OF_PR))
  25959. + RETURN_ERROR(
  25960. + MAJOR, E_INVALID_STATE,
  25961. + ("in this stage parameters from Port has be updated"));
  25962. + fmPortGetSetCcParams.getCcParams.type = p_Manip->shadowUpdateParams;
  25963. + fmPortGetSetCcParams.setCcParams.type = UPDATE_PSO;
  25964. + fmPortGetSetCcParams.setCcParams.psoSize = 16;
  25965. +
  25966. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  25967. + if (err)
  25968. + RETURN_ERROR(MAJOR, err, NO_MSG);
  25969. + if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR)
  25970. + RETURN_ERROR(
  25971. + MAJOR, E_INVALID_STATE,
  25972. + ("Parser result offset wasn't configured previousely"));
  25973. +
  25974. + }
  25975. +
  25976. + ASSERT_COND(p_Ad);
  25977. +
  25978. + if (p_Manip->updateParams & OFFSET_OF_PR)
  25979. + {
  25980. + tmpReg32 = 0;
  25981. + tmpReg32 |= fmPortGetSetCcParams.getCcParams.prOffset;
  25982. + WRITE_UINT32(p_Ad->matchTblPtr,
  25983. + (GET_UINT32(p_Ad->matchTblPtr) | tmpReg32));
  25984. + p_Manip->updateParams &= ~OFFSET_OF_PR;
  25985. + p_Manip->shadowUpdateParams |= OFFSET_OF_PR;
  25986. + }
  25987. + else
  25988. + if (validate)
  25989. + {
  25990. + tmpReg32 = GET_UINT32(p_Ad->matchTblPtr);
  25991. + if ((uint8_t)tmpReg32 != fmPortGetSetCcParams.getCcParams.prOffset)
  25992. + RETURN_ERROR(
  25993. + MAJOR,
  25994. + E_INVALID_STATE,
  25995. + ("this manipulation was updated previousely by different value"););
  25996. + }
  25997. +
  25998. + return E_OK;
  25999. +}
  26000. +
  26001. +static t_Error UpdateModifyCapwapFragmenation(t_FmPcdManip *p_Manip, t_Handle h_Ad, bool validate,t_Handle h_FmTree)
  26002. +{
  26003. + t_AdOfTypeContLookup *p_Ad = (t_AdOfTypeContLookup *)h_Ad;
  26004. + t_FmPcdCcSavedManipParams *p_SavedManipParams = NULL;
  26005. + uint32_t tmpReg32 = 0;
  26006. +
  26007. + SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
  26008. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Frag,E_INVALID_HANDLE);
  26009. + SANITY_CHECK_RETURN_ERROR(p_Manip->frag,E_INVALID_HANDLE);
  26010. + SANITY_CHECK_RETURN_ERROR(((p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION) || (p_Manip->opcode == HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER)), E_INVALID_STATE);
  26011. +
  26012. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Frag;
  26013. +
  26014. + if (p_Manip->updateParams)
  26015. + {
  26016. +
  26017. + if ((!(p_Manip->updateParams & OFFSET_OF_DATA)) ||
  26018. + ((p_Manip->shadowUpdateParams & OFFSET_OF_DATA)))
  26019. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has not be updated"));
  26020. + p_SavedManipParams = FmPcdCcTreeGetSavedManipParams(h_FmTree);
  26021. + if (!p_SavedManipParams)
  26022. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("for this manipulation tree has to be configured previosely with this type"));
  26023. + p_Manip->capwapFragParams.dataOffset = p_SavedManipParams->capwapParams.dataOffset;
  26024. +
  26025. + tmpReg32 = GET_UINT32(p_Ad->pcAndOffsets);
  26026. + tmpReg32 |= ((uint32_t)p_Manip->capwapFragParams.dataOffset<< 16);
  26027. + WRITE_UINT32(p_Ad->pcAndOffsets,tmpReg32);
  26028. +
  26029. + p_Manip->updateParams &= ~OFFSET_OF_DATA;
  26030. + p_Manip->shadowUpdateParams |= OFFSET_OF_DATA;
  26031. + }
  26032. + else if (validate)
  26033. + {
  26034. +
  26035. + p_SavedManipParams = FmPcdCcTreeGetSavedManipParams(h_FmTree);
  26036. + if (!p_SavedManipParams)
  26037. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("for this manipulation tree has to be configured previosely with this type"));
  26038. + if (p_Manip->capwapFragParams.dataOffset != p_SavedManipParams->capwapParams.dataOffset)
  26039. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("this manipulation was updated previousely by different value"));
  26040. + }
  26041. +
  26042. + return E_OK;
  26043. +}
  26044. +
  26045. +static t_Error UpdateInitCapwapFragmentation(t_Handle h_FmPort,
  26046. + t_FmPcdManip *p_Manip,
  26047. + t_Handle h_Ad,
  26048. + bool validate,
  26049. + t_Handle h_FmTree)
  26050. +{
  26051. + t_AdOfTypeContLookup *p_Ad;
  26052. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  26053. + t_Error err;
  26054. + uint32_t tmpReg32 = 0;
  26055. + t_FmPcdCcSavedManipParams *p_SavedManipParams;
  26056. +
  26057. + UNUSED(h_Ad);
  26058. +
  26059. + SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
  26060. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Frag,E_INVALID_HANDLE);
  26061. + SANITY_CHECK_RETURN_ERROR(p_Manip->frag,E_INVALID_HANDLE);
  26062. + SANITY_CHECK_RETURN_ERROR(((p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION) ||
  26063. + (p_Manip->opcode == HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER)), E_INVALID_STATE);
  26064. +
  26065. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Frag;
  26066. +
  26067. + if (p_Manip->updateParams)
  26068. + {
  26069. + if ((!(p_Manip->updateParams & OFFSET_OF_DATA)) ||
  26070. + ((p_Manip->shadowUpdateParams & OFFSET_OF_DATA)))
  26071. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has not be updated"));
  26072. + fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams;
  26073. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN | UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY;
  26074. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
  26075. + /* For CAPWAP Rassembly used FMAN_CTRL2 hardcoded - so for fragmentation its better to use FMAN_CTRL1 */
  26076. + fmPortGetSetCcParams.setCcParams.orFmanCtrl = FPM_PORT_FM_CTL1;
  26077. +
  26078. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  26079. + if (err)
  26080. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26081. +
  26082. + if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
  26083. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Data offset wasn't configured previousely"));
  26084. +
  26085. + p_SavedManipParams = (t_FmPcdCcSavedManipParams *)XX_Malloc(sizeof(t_FmPcdCcSavedManipParams));
  26086. + p_SavedManipParams->capwapParams.dataOffset = fmPortGetSetCcParams.getCcParams.dataOffset;
  26087. +
  26088. +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
  26089. + ASSERT_COND(!(p_SavedManipParams->capwapParams.dataOffset % 16));
  26090. +#endif /* FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004 */
  26091. +
  26092. + FmPcdCcTreeSetSavedManipParams(h_FmTree, (t_Handle)p_SavedManipParams);
  26093. + }
  26094. + else if (validate)
  26095. + {
  26096. + if ((!(p_Manip->shadowUpdateParams & OFFSET_OF_DATA)) ||
  26097. + ((p_Manip->updateParams & OFFSET_OF_DATA)))
  26098. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has be updated"));
  26099. + fmPortGetSetCcParams.getCcParams.type = p_Manip->shadowUpdateParams;
  26100. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN | UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY;
  26101. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
  26102. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  26103. + if (err)
  26104. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26105. +
  26106. + if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
  26107. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Data offset wasn't configured previousely"));
  26108. + }
  26109. +
  26110. + if (p_Manip->updateParams)
  26111. + {
  26112. + tmpReg32 = GET_UINT32(p_Ad->pcAndOffsets);
  26113. + tmpReg32 |= ((uint32_t)fmPortGetSetCcParams.getCcParams.dataOffset<< 16);
  26114. + WRITE_UINT32(p_Ad->pcAndOffsets,tmpReg32);
  26115. +
  26116. + p_Manip->updateParams &= ~OFFSET_OF_DATA;
  26117. + p_Manip->shadowUpdateParams |= OFFSET_OF_DATA;
  26118. + p_Manip->capwapFragParams.dataOffset = fmPortGetSetCcParams.getCcParams.dataOffset;
  26119. + }
  26120. + else if (validate)
  26121. + {
  26122. + if (p_Manip->capwapFragParams.dataOffset != fmPortGetSetCcParams.getCcParams.dataOffset)
  26123. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("this manipulation was updated previousely by different value"));
  26124. + }
  26125. +
  26126. + return E_OK;
  26127. +}
  26128. +
  26129. +static t_Error UpdateInitCapwapReasm(t_Handle h_FmPcd,
  26130. + t_Handle h_FmPort,
  26131. + t_FmPcdManip *p_Manip,
  26132. + t_Handle h_Ad,
  26133. + bool validate)
  26134. +{
  26135. + t_CapwapReasmPram *p_ReassmTbl;
  26136. + t_Error err;
  26137. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  26138. + uint8_t i = 0;
  26139. + uint16_t size;
  26140. + uint32_t tmpReg32;
  26141. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  26142. + t_FmPcdCcCapwapReassmTimeoutParams ccCapwapReassmTimeoutParams;
  26143. +
  26144. + SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
  26145. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Frag,E_INVALID_HANDLE);
  26146. + SANITY_CHECK_RETURN_ERROR(!p_Manip->frag,E_INVALID_HANDLE);
  26147. + SANITY_CHECK_RETURN_ERROR((p_Manip->opcode == HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST), E_INVALID_STATE);
  26148. + SANITY_CHECK_RETURN_ERROR(h_FmPcd,E_INVALID_HANDLE);
  26149. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc,E_INVALID_HANDLE);
  26150. +
  26151. + if (p_Manip->h_FmPcd != h_FmPcd)
  26152. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  26153. + ("handler of PCD previously was initiated by different value"));
  26154. +
  26155. + UNUSED(h_Ad);
  26156. +
  26157. + memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
  26158. + p_ReassmTbl = (t_CapwapReasmPram *)p_Manip->h_Frag;
  26159. +
  26160. + if (p_Manip->updateParams)
  26161. + {
  26162. + if ((!(p_Manip->updateParams & NUM_OF_TASKS) &&
  26163. + !(p_Manip->updateParams & OFFSET_OF_DATA) &&
  26164. + !(p_Manip->updateParams & OFFSET_OF_PR) &&
  26165. + !(p_Manip->updateParams & HW_PORT_ID)) ||
  26166. + ((p_Manip->shadowUpdateParams & NUM_OF_TASKS) ||
  26167. + (p_Manip->shadowUpdateParams & OFFSET_OF_DATA) || (p_Manip->shadowUpdateParams & OFFSET_OF_PR) ||
  26168. + (p_Manip->shadowUpdateParams & HW_PORT_ID)))
  26169. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has not be updated"));
  26170. +
  26171. + fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams;
  26172. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN;
  26173. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
  26174. +
  26175. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  26176. + if (err)
  26177. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26178. +
  26179. + if (fmPortGetSetCcParams.getCcParams.type & NUM_OF_TASKS)
  26180. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Num of tasks wasn't configured previousely"));
  26181. + if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
  26182. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("offset of the data wasn't configured previousely"));
  26183. + if (fmPortGetSetCcParams.getCcParams.type & HW_PORT_ID)
  26184. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("hwPortId wasn't updated"));
  26185. +#ifdef FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
  26186. + ASSERT_COND((fmPortGetSetCcParams.getCcParams.dataOffset % 16) == 0);
  26187. +#endif /* FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004 */
  26188. + }
  26189. + else if (validate)
  26190. + {
  26191. + if ((!(p_Manip->shadowUpdateParams & NUM_OF_TASKS) &&
  26192. + !(p_Manip->shadowUpdateParams & OFFSET_OF_DATA) &&
  26193. + !(p_Manip->shadowUpdateParams & OFFSET_OF_PR) &&
  26194. + !(p_Manip->shadowUpdateParams & HW_PORT_ID)) &&
  26195. + ((p_Manip->updateParams & NUM_OF_TASKS) ||
  26196. + (p_Manip->updateParams & OFFSET_OF_DATA) || (p_Manip->updateParams & OFFSET_OF_PR) ||
  26197. + (p_Manip->updateParams & HW_PORT_ID)))
  26198. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("in this stage parameters from Port has be updated"));
  26199. +
  26200. + fmPortGetSetCcParams.getCcParams.type = p_Manip->shadowUpdateParams;
  26201. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN;
  26202. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
  26203. +
  26204. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  26205. + if (err)
  26206. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26207. +
  26208. + if (fmPortGetSetCcParams.getCcParams.type & NUM_OF_TASKS)
  26209. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("NumOfTasks wasn't configured previously"));
  26210. + if (fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_DATA)
  26211. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("offset of the data wasn't configured previously"));
  26212. + if (fmPortGetSetCcParams.getCcParams.type & HW_PORT_ID)
  26213. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("hwPortId wasn't updated"));
  26214. + }
  26215. +
  26216. + if (p_Manip->updateParams)
  26217. + {
  26218. + if (p_Manip->updateParams & NUM_OF_TASKS)
  26219. + {
  26220. + /*recommendation of Microcode team - (maxNumFramesInProcess * 2) */
  26221. + size = (uint16_t)(p_Manip->capwapFragParams.maxNumFramesInProcess*2 + fmPortGetSetCcParams.getCcParams.numOfTasks);
  26222. + if (size > 255)
  26223. + RETURN_ERROR(MAJOR,E_INVALID_VALUE, ("numOfOpenReassmEntries + numOfTasks per port can not be greater than 256"));
  26224. +
  26225. + p_Manip->capwapFragParams.numOfTasks = fmPortGetSetCcParams.getCcParams.numOfTasks;
  26226. +
  26227. + /*p_ReassmFrmDescrIndxPoolTbl*/
  26228. + p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl =
  26229. + (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  26230. + (uint32_t)(size + 1),
  26231. + 4);
  26232. + if (!p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl)
  26233. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP Reassembly frame buffer index pool table"));
  26234. +
  26235. + MemSet8(p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl, 0, (uint32_t)(size + 1));
  26236. +
  26237. + for ( i = 0; i < size; i++)
  26238. + WRITE_UINT8(*(uint8_t *)PTR_MOVE(p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl, i), (uint8_t)(i+1));
  26239. +
  26240. + tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl) - p_FmPcd->physicalMuramBase);
  26241. +
  26242. + WRITE_UINT32(p_ReassmTbl->reasmFrmDescIndexPoolTblPtr, tmpReg32);
  26243. +
  26244. + /*p_ReassmFrmDescrPoolTbl*/
  26245. + p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl =
  26246. + (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  26247. + (uint32_t)((size + 1) * FM_PCD_MANIP_CAPWAP_REASM_RFD_SIZE),
  26248. + 4);
  26249. +
  26250. + if (!p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl)
  26251. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP Reassembly frame buffer pool table"));
  26252. +
  26253. + MemSet8(p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl, 0, (uint32_t)((size +1)* FM_PCD_MANIP_CAPWAP_REASM_RFD_SIZE));
  26254. +
  26255. + tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl) - p_FmPcd->physicalMuramBase);
  26256. +
  26257. + WRITE_UINT32(p_ReassmTbl->reasmFrmDescPoolTblPtr, tmpReg32);
  26258. +
  26259. + /*p_TimeOutTbl*/
  26260. +
  26261. + p_Manip->capwapFragParams.p_TimeOutTbl =
  26262. + (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  26263. + (uint32_t)((size + 1)* FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_ENTRY_SIZE),
  26264. + 4);
  26265. +
  26266. + if (!p_Manip->capwapFragParams.p_TimeOutTbl)
  26267. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP Reassembly timeout table"));
  26268. +
  26269. + MemSet8(p_Manip->capwapFragParams.p_TimeOutTbl, 0, (uint16_t)((size + 1)*FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_ENTRY_SIZE));
  26270. +
  26271. + tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_TimeOutTbl) - p_FmPcd->physicalMuramBase);
  26272. + WRITE_UINT32(p_ReassmTbl->timeOutTblPtr, tmpReg32);
  26273. +
  26274. + p_Manip->updateParams &= ~NUM_OF_TASKS;
  26275. + p_Manip->shadowUpdateParams |= NUM_OF_TASKS;
  26276. + }
  26277. +
  26278. + if (p_Manip->updateParams & OFFSET_OF_DATA)
  26279. + {
  26280. + p_Manip->capwapFragParams.dataOffset = fmPortGetSetCcParams.getCcParams.dataOffset;
  26281. + tmpReg32 = GET_UINT32(p_ReassmTbl->mode);
  26282. + tmpReg32|= p_Manip->capwapFragParams.dataOffset;
  26283. + WRITE_UINT32(p_ReassmTbl->mode, tmpReg32);
  26284. + p_Manip->updateParams &= ~OFFSET_OF_DATA;
  26285. + p_Manip->shadowUpdateParams |= OFFSET_OF_DATA;
  26286. + }
  26287. +
  26288. + if (!(fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR))
  26289. + {
  26290. + p_Manip->capwapFragParams.prOffset = fmPortGetSetCcParams.getCcParams.prOffset;
  26291. +
  26292. + tmpReg32 = GET_UINT32(p_ReassmTbl->mode);
  26293. + tmpReg32|= FM_PCD_MANIP_CAPWAP_REASM_PR_COPY;
  26294. + WRITE_UINT32(p_ReassmTbl->mode, tmpReg32);
  26295. +
  26296. + tmpReg32 = GET_UINT32(p_ReassmTbl->intStatsTblPtr);
  26297. + tmpReg32 |= (uint32_t)p_Manip->capwapFragParams.prOffset << 24;
  26298. + WRITE_UINT32(p_ReassmTbl->intStatsTblPtr, tmpReg32);
  26299. + p_Manip->updateParams &= ~OFFSET_OF_PR;
  26300. + p_Manip->shadowUpdateParams |= OFFSET_OF_PR;
  26301. + }
  26302. + else
  26303. + {
  26304. + p_Manip->capwapFragParams.prOffset = 0xff;
  26305. + p_Manip->updateParams &= ~OFFSET_OF_PR;
  26306. + p_Manip->shadowUpdateParams |= OFFSET_OF_PR;
  26307. + }
  26308. +
  26309. + p_Manip->capwapFragParams.hwPortId = fmPortGetSetCcParams.getCcParams.hardwarePortId;
  26310. + p_Manip->updateParams &= ~HW_PORT_ID;
  26311. + p_Manip->shadowUpdateParams |= HW_PORT_ID;
  26312. +
  26313. + /*timeout hc */
  26314. + ccCapwapReassmTimeoutParams.fqidForTimeOutFrames = p_Manip->capwapFragParams.fqidForTimeOutFrames;
  26315. + ccCapwapReassmTimeoutParams.portIdAndCapwapReassmTbl = (uint32_t)p_Manip->capwapFragParams.hwPortId << 24;
  26316. + ccCapwapReassmTimeoutParams.portIdAndCapwapReassmTbl |= (uint32_t)((XX_VirtToPhys(p_ReassmTbl) - p_FmPcd->physicalMuramBase));
  26317. + ccCapwapReassmTimeoutParams.timeoutRequestTime = (((uint32_t)1<<p_Manip->capwapFragParams.bitFor1Micro) * p_Manip->capwapFragParams.timeoutRoutineRequestTime)/2;
  26318. + return FmHcPcdCcCapwapTimeoutReassm(p_FmPcd->h_Hc,&ccCapwapReassmTimeoutParams);
  26319. + }
  26320. +
  26321. + else if (validate)
  26322. + {
  26323. + if (fmPortGetSetCcParams.getCcParams.hardwarePortId != p_Manip->capwapFragParams.hwPortId)
  26324. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Reassembly manipulation previously was assigned to another port"));
  26325. + if (fmPortGetSetCcParams.getCcParams.numOfTasks != p_Manip->capwapFragParams.numOfTasks)
  26326. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfTasks for this manipulation previously was defined by another value "));
  26327. +
  26328. + if (!(fmPortGetSetCcParams.getCcParams.type & OFFSET_OF_PR))
  26329. + {
  26330. + if (p_Manip->capwapFragParams.prOffset != fmPortGetSetCcParams.getCcParams.prOffset)
  26331. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Parse result offset previously was defined by another value "));
  26332. + }
  26333. + else
  26334. + {
  26335. + if (p_Manip->capwapFragParams.prOffset != 0xff)
  26336. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Parse result offset previously was defined by another value "));
  26337. + }
  26338. + if (fmPortGetSetCcParams.getCcParams.dataOffset != p_Manip->capwapFragParams.dataOffset)
  26339. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Data offset previously was defined by another value "));
  26340. + }
  26341. +
  26342. + return E_OK;
  26343. +}
  26344. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  26345. +
  26346. +t_Error FmPcdRegisterReassmPort(t_Handle h_FmPcd, t_Handle h_ReasmCommonPramTbl)
  26347. +{
  26348. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  26349. + t_FmPcdCcReassmTimeoutParams ccReassmTimeoutParams = { 0 };
  26350. + t_Error err = E_OK;
  26351. + uint8_t result;
  26352. + uint32_t bitFor1Micro, tsbs, log2num;
  26353. +
  26354. + ASSERT_COND(p_FmPcd);
  26355. + ASSERT_COND(h_ReasmCommonPramTbl);
  26356. +
  26357. + bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
  26358. + if (bitFor1Micro == 0)
  26359. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
  26360. +
  26361. + bitFor1Micro = 32 - bitFor1Micro;
  26362. + LOG2(FM_PCD_MANIP_REASM_TIMEOUT_THREAD_THRESH, log2num);
  26363. + tsbs = bitFor1Micro - log2num;
  26364. +
  26365. + ccReassmTimeoutParams.iprcpt = (uint32_t)(XX_VirtToPhys(
  26366. + h_ReasmCommonPramTbl) - p_FmPcd->physicalMuramBase);
  26367. + ccReassmTimeoutParams.tsbs = (uint8_t)tsbs;
  26368. + ccReassmTimeoutParams.activate = TRUE;
  26369. + if ((err = FmHcPcdCcTimeoutReassm(p_FmPcd->h_Hc, &ccReassmTimeoutParams,
  26370. + &result)) != E_OK)
  26371. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26372. +
  26373. + switch (result)
  26374. + {
  26375. + case (0):
  26376. + return E_OK;
  26377. + case (1):
  26378. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("failed to allocate TNUM"));
  26379. + case (2):
  26380. + RETURN_ERROR(
  26381. + MAJOR, E_NO_MEMORY,
  26382. + ("failed to allocate internal buffer from the HC-Port"));
  26383. + case (3):
  26384. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  26385. + ("'Disable Timeout Task' with invalid IPRCPT"));
  26386. + case (4):
  26387. + RETURN_ERROR(MAJOR, E_FULL, ("too many timeout tasks"));
  26388. + case (5):
  26389. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("invalid sub command"));
  26390. + default:
  26391. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  26392. + }
  26393. + return E_OK;
  26394. +}
  26395. +
  26396. +static t_Error CreateReassCommonTable(t_FmPcdManip *p_Manip)
  26397. +{
  26398. + uint32_t tmpReg32 = 0, i, bitFor1Micro;
  26399. + uint64_t tmpReg64, size;
  26400. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
  26401. + t_Error err = E_OK;
  26402. +
  26403. + bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
  26404. + if (bitFor1Micro == 0)
  26405. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
  26406. +
  26407. + /* Allocation of the Reassembly Common Parameters table. This table is located in the
  26408. + MURAM. Its size is 64 bytes and its base address should be 8-byte aligned. */
  26409. + p_Manip->reassmParams.p_ReassCommonTbl =
  26410. + (t_ReassCommonTbl *)FM_MURAM_AllocMem(
  26411. + p_FmPcd->h_FmMuram,
  26412. + FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_SIZE,
  26413. + FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_ALIGN);
  26414. +
  26415. + if (!p_Manip->reassmParams.p_ReassCommonTbl)
  26416. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  26417. + ("MURAM alloc for Reassembly common parameters table"));
  26418. +
  26419. + MemSet8(p_Manip->reassmParams.p_ReassCommonTbl, 0,
  26420. + FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_SIZE);
  26421. +
  26422. + /* Setting the TimeOut Mode.*/
  26423. + tmpReg32 = 0;
  26424. + if (p_Manip->reassmParams.timeOutMode
  26425. + == e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES)
  26426. + tmpReg32 |= FM_PCD_MANIP_REASM_TIME_OUT_BETWEEN_FRAMES;
  26427. +
  26428. + /* Setting TimeOut FQID - Frames that time out are enqueued to this FQID.
  26429. + In order to cause TimeOut frames to be discarded, this queue should be configured accordingly*/
  26430. + tmpReg32 |= p_Manip->reassmParams.fqidForTimeOutFrames;
  26431. + WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->timeoutModeAndFqid,
  26432. + tmpReg32);
  26433. +
  26434. + /* Calculation the size of IP Reassembly Frame Descriptor - number of frames that are allowed to be reassembled simultaneously + 129.*/
  26435. + size = p_Manip->reassmParams.maxNumFramesInProcess + 129;
  26436. +
  26437. + /*Allocation of IP Reassembly Frame Descriptor Indexes Pool - This pool resides in the MURAM */
  26438. + p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr =
  26439. + PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  26440. + (uint32_t)(size * 2),
  26441. + 256));
  26442. + if (!p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr)
  26443. + RETURN_ERROR(
  26444. + MAJOR, E_NO_MEMORY,
  26445. + ("MURAM alloc for Reassembly frame descriptor indexes pool"));
  26446. +
  26447. + MemSet8(UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr),
  26448. + 0, (uint32_t)(size * 2));
  26449. +
  26450. + /* The entries in IP Reassembly Frame Descriptor Indexes Pool contains indexes starting with 1 up to
  26451. + the maximum number of frames that are allowed to be reassembled simultaneously + 128.
  26452. + The last entry in this pool must contain the index zero*/
  26453. + for (i = 0; i < (size - 1); i++)
  26454. + WRITE_UINT16(
  26455. + *(uint16_t *)PTR_MOVE(UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr), (i<<1)),
  26456. + (uint16_t)(i+1));
  26457. +
  26458. + /* Sets the IP Reassembly Frame Descriptor Indexes Pool offset from MURAM */
  26459. + tmpReg32 = (uint32_t)(XX_VirtToPhys(
  26460. + UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr))
  26461. + - p_FmPcd->physicalMuramBase);
  26462. + WRITE_UINT32(
  26463. + p_Manip->reassmParams.p_ReassCommonTbl->reassFrmDescIndexPoolTblPtr,
  26464. + tmpReg32);
  26465. +
  26466. + /* Allocation of the Reassembly Frame Descriptors Pool - This pool resides in external memory.
  26467. + The number of entries in this pool should be equal to the number of entries in IP Reassembly Frame Descriptor Indexes Pool.*/
  26468. + p_Manip->reassmParams.reassFrmDescrPoolTblAddr =
  26469. + PTR_TO_UINT(XX_MallocSmart((uint32_t)(size * 64), p_Manip->reassmParams.dataMemId, 64));
  26470. +
  26471. + if (!p_Manip->reassmParams.reassFrmDescrPoolTblAddr)
  26472. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation FAILED"));
  26473. +
  26474. + MemSet8(UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrPoolTblAddr), 0,
  26475. + (uint32_t)(size * 64));
  26476. +
  26477. + /* Sets the Reassembly Frame Descriptors Pool and liodn offset*/
  26478. + tmpReg64 = (uint64_t)(XX_VirtToPhys(
  26479. + UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrPoolTblAddr)));
  26480. + tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
  26481. + & FM_PCD_MANIP_REASM_LIODN_MASK)
  26482. + << (uint64_t)FM_PCD_MANIP_REASM_LIODN_SHIFT);
  26483. + tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
  26484. + & FM_PCD_MANIP_REASM_ELIODN_MASK)
  26485. + << (uint64_t)FM_PCD_MANIP_REASM_ELIODN_SHIFT);
  26486. + WRITE_UINT32(
  26487. + p_Manip->reassmParams.p_ReassCommonTbl->liodnAndReassFrmDescPoolPtrHi,
  26488. + (uint32_t)(tmpReg64 >> 32));
  26489. + WRITE_UINT32(
  26490. + p_Manip->reassmParams.p_ReassCommonTbl->reassFrmDescPoolPtrLow,
  26491. + (uint32_t)tmpReg64);
  26492. +
  26493. + /*Allocation of the TimeOut table - This table resides in the MURAM.
  26494. + The number of entries in this table is identical to the number of entries in the Reassembly Frame Descriptors Pool*/
  26495. + p_Manip->reassmParams.timeOutTblAddr =
  26496. + PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram, (uint32_t)(size * 8),8));
  26497. +
  26498. + if (!p_Manip->reassmParams.timeOutTblAddr)
  26499. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  26500. + ("MURAM alloc for Reassembly timeout table"));
  26501. +
  26502. + MemSet8(UINT_TO_PTR(p_Manip->reassmParams.timeOutTblAddr), 0,
  26503. + (uint16_t)(size * 8));
  26504. +
  26505. + /* Sets the TimeOut table offset from MURAM */
  26506. + tmpReg32 = (uint32_t)(XX_VirtToPhys(
  26507. + UINT_TO_PTR(p_Manip->reassmParams.timeOutTblAddr))
  26508. + - p_FmPcd->physicalMuramBase);
  26509. + WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->timeOutTblPtr,
  26510. + tmpReg32);
  26511. +
  26512. + /* Sets the Expiration Delay */
  26513. + tmpReg32 = 0;
  26514. + tmpReg32 |= (((uint32_t)(1 << bitFor1Micro))
  26515. + * p_Manip->reassmParams.timeoutThresholdForReassmProcess);
  26516. + WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->expirationDelay,
  26517. + tmpReg32);
  26518. +
  26519. + err = FmPcdRegisterReassmPort(p_FmPcd,
  26520. + p_Manip->reassmParams.p_ReassCommonTbl);
  26521. + if (err != E_OK)
  26522. + {
  26523. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  26524. + p_Manip->reassmParams.p_ReassCommonTbl);
  26525. + RETURN_ERROR(MAJOR, err, ("port registration"));
  26526. + }
  26527. +
  26528. + return err;
  26529. +}
  26530. +
  26531. +static t_Error CreateReassTable(t_FmPcdManip *p_Manip, e_NetHeaderType hdr)
  26532. +{
  26533. + t_FmPcd *p_FmPcd = p_Manip->h_FmPcd;
  26534. + uint32_t tmpReg32, autoLearnHashTblSize;
  26535. + uint32_t numOfWays, setSize, setSizeCode, keySize;
  26536. + uint32_t waySize, numOfSets, numOfEntries;
  26537. + uint64_t tmpReg64;
  26538. + uint16_t minFragSize;
  26539. + uint16_t maxReassemSize;
  26540. + uintptr_t *p_AutoLearnHashTblAddr, *p_AutoLearnSetLockTblAddr;
  26541. + t_ReassTbl **p_ReassTbl;
  26542. +
  26543. + switch (hdr)
  26544. + {
  26545. + case HEADER_TYPE_IPv4:
  26546. + p_ReassTbl = &p_Manip->reassmParams.ip.p_Ipv4ReassTbl;
  26547. + p_AutoLearnHashTblAddr =
  26548. + &p_Manip->reassmParams.ip.ipv4AutoLearnHashTblAddr;
  26549. + p_AutoLearnSetLockTblAddr =
  26550. + &p_Manip->reassmParams.ip.ipv4AutoLearnSetLockTblAddr;
  26551. + minFragSize = p_Manip->reassmParams.ip.minFragSize[0];
  26552. + maxReassemSize = 0;
  26553. + numOfWays = p_Manip->reassmParams.ip.numOfFramesPerHashEntry[0];
  26554. + keySize = 4 + 4 + 1 + 2; /* 3-tuple + IP-Id */
  26555. + break;
  26556. + case HEADER_TYPE_IPv6:
  26557. + p_ReassTbl = &p_Manip->reassmParams.ip.p_Ipv6ReassTbl;
  26558. + p_AutoLearnHashTblAddr =
  26559. + &p_Manip->reassmParams.ip.ipv6AutoLearnHashTblAddr;
  26560. + p_AutoLearnSetLockTblAddr =
  26561. + &p_Manip->reassmParams.ip.ipv6AutoLearnSetLockTblAddr;
  26562. + minFragSize = p_Manip->reassmParams.ip.minFragSize[1];
  26563. + maxReassemSize = 0;
  26564. + numOfWays = p_Manip->reassmParams.ip.numOfFramesPerHashEntry[1];
  26565. + keySize = 16 + 16 + 4; /* 2-tuple + IP-Id */
  26566. + if (numOfWays > e_FM_PCD_MANIP_SIX_WAYS_HASH)
  26567. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("num of ways"));
  26568. + break;
  26569. + case HEADER_TYPE_CAPWAP:
  26570. + p_ReassTbl = &p_Manip->reassmParams.capwap.p_ReassTbl;
  26571. + p_AutoLearnHashTblAddr =
  26572. + &p_Manip->reassmParams.capwap.autoLearnHashTblAddr;
  26573. + p_AutoLearnSetLockTblAddr =
  26574. + &p_Manip->reassmParams.capwap.autoLearnSetLockTblAddr;
  26575. + minFragSize = 0;
  26576. + maxReassemSize = p_Manip->reassmParams.capwap.maxRessembledsSize;
  26577. + numOfWays = p_Manip->reassmParams.capwap.numOfFramesPerHashEntry;
  26578. + keySize = 4;
  26579. + break;
  26580. + default:
  26581. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("header type"));
  26582. + }
  26583. + keySize += 2; /* 2 bytes reserved for RFDIndex */
  26584. +#if (DPAA_VERSION >= 11)
  26585. + keySize += 2; /* 2 bytes reserved */
  26586. +#endif /* (DPAA_VERSION >= 11) */
  26587. + waySize = ROUND_UP(keySize, 8);
  26588. +
  26589. + /* Allocates the Reassembly Parameters Table - This table is located in the MURAM.*/
  26590. + *p_ReassTbl = (t_ReassTbl *)FM_MURAM_AllocMem(
  26591. + p_FmPcd->h_FmMuram, FM_PCD_MANIP_REASM_TABLE_SIZE,
  26592. + FM_PCD_MANIP_REASM_TABLE_ALIGN);
  26593. + if (!*p_ReassTbl)
  26594. + RETURN_ERROR( MAJOR, E_NO_MEMORY,
  26595. + ("MURAM alloc for Reassembly specific parameters table"));
  26596. + memset(*p_ReassTbl, 0, sizeof(t_ReassTbl));
  26597. +
  26598. + /* Sets the Reassembly common Parameters table offset from MURAM in the Reassembly Table descriptor*/
  26599. + tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->reassmParams.p_ReassCommonTbl)
  26600. + - p_FmPcd->physicalMuramBase);
  26601. + WRITE_UINT32((*p_ReassTbl)->reassCommonPrmTblPtr, tmpReg32);
  26602. +
  26603. + /* Calculate set size (set size is rounded-up to next power of 2) */
  26604. + NEXT_POWER_OF_2(numOfWays * waySize, setSize);
  26605. +
  26606. + /* Get set size code */
  26607. + LOG2(setSize, setSizeCode);
  26608. +
  26609. + /* Sets ways number and set size code */
  26610. + WRITE_UINT16((*p_ReassTbl)->waysNumAndSetSize,
  26611. + (uint16_t)((numOfWays << 8) | setSizeCode));
  26612. +
  26613. + /* It is recommended that the total number of entries in this table
  26614. + (number of sets * number of ways) will be twice the number of frames that
  26615. + are expected to be reassembled simultaneously.*/
  26616. + numOfEntries = (uint32_t)(p_Manip->reassmParams.maxNumFramesInProcess * 2);
  26617. +
  26618. + /* sets number calculation - number of entries = number of sets * number of ways */
  26619. + numOfSets = numOfEntries / numOfWays;
  26620. +
  26621. + /* Sets AutoLearnHashKeyMask*/
  26622. + NEXT_POWER_OF_2(numOfSets, numOfSets);
  26623. +
  26624. + WRITE_UINT16((*p_ReassTbl)->autoLearnHashKeyMask,
  26625. + (uint16_t)(numOfSets - 1));
  26626. +
  26627. + /* Allocation of Reassembly Automatic Learning Hash Table - This table resides in external memory.
  26628. + The size of this table is determined by the number of sets and the set size.
  26629. + Table size = set size * number of sets
  26630. + This table base address should be aligned to SetSize.*/
  26631. + autoLearnHashTblSize = numOfSets * setSize;
  26632. +
  26633. + *p_AutoLearnHashTblAddr =
  26634. + PTR_TO_UINT(XX_MallocSmart(autoLearnHashTblSize, p_Manip->reassmParams.dataMemId, setSize));
  26635. + if (!*p_AutoLearnHashTblAddr)
  26636. + {
  26637. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, *p_ReassTbl);
  26638. + *p_ReassTbl = NULL;
  26639. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation FAILED"));
  26640. + }
  26641. + MemSet8(UINT_TO_PTR(*p_AutoLearnHashTblAddr), 0, autoLearnHashTblSize);
  26642. +
  26643. + /* Sets the Reassembly Automatic Learning Hash Table and liodn offset */
  26644. + tmpReg64 = ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
  26645. + & FM_PCD_MANIP_REASM_LIODN_MASK)
  26646. + << (uint64_t)FM_PCD_MANIP_REASM_LIODN_SHIFT);
  26647. + tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
  26648. + & FM_PCD_MANIP_REASM_ELIODN_MASK)
  26649. + << (uint64_t)FM_PCD_MANIP_REASM_ELIODN_SHIFT);
  26650. + tmpReg64 |= XX_VirtToPhys(UINT_TO_PTR(*p_AutoLearnHashTblAddr));
  26651. + WRITE_UINT32( (*p_ReassTbl)->liodnAlAndAutoLearnHashTblPtrHi,
  26652. + (uint32_t)(tmpReg64 >> 32));
  26653. + WRITE_UINT32((*p_ReassTbl)->autoLearnHashTblPtrLow, (uint32_t)tmpReg64);
  26654. +
  26655. + /* Allocation of the Set Lock table - This table resides in external memory
  26656. + The size of this table is (number of sets in the Reassembly Automatic Learning Hash table)*4 bytes.
  26657. + This table resides in external memory and its base address should be 4-byte aligned */
  26658. + *p_AutoLearnSetLockTblAddr =
  26659. + PTR_TO_UINT(XX_MallocSmart((uint32_t)(numOfSets * 4), p_Manip->reassmParams.dataMemId, 4));
  26660. + if (!*p_AutoLearnSetLockTblAddr)
  26661. + {
  26662. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, *p_ReassTbl);
  26663. + *p_ReassTbl = NULL;
  26664. + XX_FreeSmart(UINT_TO_PTR(*p_AutoLearnHashTblAddr));
  26665. + *p_AutoLearnHashTblAddr = 0;
  26666. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation FAILED"));
  26667. + }
  26668. + MemSet8(UINT_TO_PTR(*p_AutoLearnSetLockTblAddr), 0, (numOfSets * 4));
  26669. +
  26670. + /* sets Set Lock table pointer and liodn offset*/
  26671. + tmpReg64 = ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
  26672. + & FM_PCD_MANIP_REASM_LIODN_MASK)
  26673. + << (uint64_t)FM_PCD_MANIP_REASM_LIODN_SHIFT);
  26674. + tmpReg64 |= ((uint64_t)(p_Manip->reassmParams.dataLiodnOffset
  26675. + & FM_PCD_MANIP_REASM_ELIODN_MASK)
  26676. + << (uint64_t)FM_PCD_MANIP_REASM_ELIODN_SHIFT);
  26677. + tmpReg64 |= XX_VirtToPhys(UINT_TO_PTR(*p_AutoLearnSetLockTblAddr));
  26678. + WRITE_UINT32( (*p_ReassTbl)->liodnSlAndAutoLearnSetLockTblPtrHi,
  26679. + (uint32_t)(tmpReg64 >> 32));
  26680. + WRITE_UINT32((*p_ReassTbl)->autoLearnSetLockTblPtrLow, (uint32_t)tmpReg64);
  26681. +
  26682. + /* Sets user's requested minimum fragment size (in Bytes) for First/Middle fragment */
  26683. + WRITE_UINT16((*p_ReassTbl)->minFragSize, minFragSize);
  26684. +
  26685. + WRITE_UINT16((*p_ReassTbl)->maxReassemblySize, maxReassemSize);
  26686. +
  26687. + return E_OK;
  26688. +}
  26689. +
  26690. +static t_Error UpdateInitReasm(t_Handle h_FmPcd, t_Handle h_PcdParams,
  26691. + t_Handle h_FmPort, t_FmPcdManip *p_Manip,
  26692. + t_Handle h_Ad, bool validate)
  26693. +{
  26694. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  26695. + uint32_t tmpReg32;
  26696. + t_Error err;
  26697. + t_FmPortPcdParams *p_PcdParams = (t_FmPortPcdParams *)h_PcdParams;
  26698. +#if (DPAA_VERSION >= 11)
  26699. + t_FmPcdCtrlParamsPage *p_ParamsPage;
  26700. +#endif /* (DPAA_VERSION >= 11) */
  26701. +
  26702. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  26703. + SANITY_CHECK_RETURN_ERROR(!p_Manip->frag, E_INVALID_HANDLE);
  26704. + SANITY_CHECK_RETURN_ERROR(
  26705. + (p_Manip->opcode == HMAN_OC_IP_REASSEMBLY) || (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY),
  26706. + E_INVALID_STATE);
  26707. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  26708. + SANITY_CHECK_RETURN_ERROR(!p_Manip->updateParams || h_PcdParams,
  26709. + E_INVALID_HANDLE);
  26710. +
  26711. + UNUSED(h_Ad);
  26712. +
  26713. + if (!p_Manip->updateParams)
  26714. + return E_OK;
  26715. +
  26716. + if (p_Manip->h_FmPcd != h_FmPcd)
  26717. + RETURN_ERROR(
  26718. + MAJOR, E_INVALID_STATE,
  26719. + ("handler of PCD previously was initiated by different value"));
  26720. +
  26721. + if (p_Manip->updateParams)
  26722. + {
  26723. + if ((!(p_Manip->updateParams
  26724. + & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK)))
  26725. + || ((p_Manip->shadowUpdateParams
  26726. + & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK))))
  26727. + RETURN_ERROR(
  26728. + MAJOR, E_INVALID_STATE,
  26729. + ("in this stage parameters from Port has not be updated"));
  26730. +
  26731. + fmPortGetSetCcParams.setCcParams.type = 0;
  26732. + if (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY)
  26733. + {
  26734. + fmPortGetSetCcParams.setCcParams.type |= UPDATE_OFP_DPTE;
  26735. + fmPortGetSetCcParams.setCcParams.ofpDpde = 0xF;
  26736. + }
  26737. + fmPortGetSetCcParams.getCcParams.type = p_Manip->updateParams | FM_REV;
  26738. + if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
  26739. + != E_OK)
  26740. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26741. + if (fmPortGetSetCcParams.getCcParams.type
  26742. + & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK | FM_REV))
  26743. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  26744. + ("offset of the data wasn't configured previously"));
  26745. + if (p_Manip->updateParams
  26746. + & (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK))
  26747. + {
  26748. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  26749. + uint8_t *p_Ptr, i, totalNumOfTnums;
  26750. +
  26751. + totalNumOfTnums =
  26752. + (uint8_t)(fmPortGetSetCcParams.getCcParams.numOfTasks
  26753. + + fmPortGetSetCcParams.getCcParams.numOfExtraTasks);
  26754. +
  26755. + p_Manip->reassmParams.internalBufferPoolAddr =
  26756. + PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  26757. + (uint32_t)(totalNumOfTnums * BMI_FIFO_UNITS),
  26758. + BMI_FIFO_UNITS));
  26759. + if (!p_Manip->reassmParams.internalBufferPoolAddr)
  26760. + RETURN_ERROR(
  26761. + MAJOR, E_NO_MEMORY,
  26762. + ("MURAM alloc for Reassembly internal buffers pool"));
  26763. + MemSet8(
  26764. + UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolAddr),
  26765. + 0, (uint32_t)(totalNumOfTnums * BMI_FIFO_UNITS));
  26766. +
  26767. + p_Manip->reassmParams.internalBufferPoolManagementIndexAddr =
  26768. + PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  26769. + (uint32_t)(5 + totalNumOfTnums),
  26770. + 4));
  26771. + if (!p_Manip->reassmParams.internalBufferPoolManagementIndexAddr)
  26772. + RETURN_ERROR(
  26773. + MAJOR,
  26774. + E_NO_MEMORY,
  26775. + ("MURAM alloc for Reassembly internal buffers management"));
  26776. +
  26777. + p_Ptr =
  26778. + (uint8_t*)UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolManagementIndexAddr);
  26779. + WRITE_UINT32(
  26780. + *(uint32_t*)p_Ptr,
  26781. + (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolAddr)) - p_FmPcd->physicalMuramBase));
  26782. + for (i = 0, p_Ptr += 4; i < totalNumOfTnums; i++, p_Ptr++)
  26783. + WRITE_UINT8(*p_Ptr, i);
  26784. + WRITE_UINT8(*p_Ptr, 0xFF);
  26785. +
  26786. + tmpReg32 =
  26787. + (4 << FM_PCD_MANIP_REASM_COMMON_INT_BUFFER_IDX_SHIFT)
  26788. + | ((uint32_t)(XX_VirtToPhys(
  26789. + UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolManagementIndexAddr))
  26790. + - p_FmPcd->physicalMuramBase));
  26791. + WRITE_UINT32(
  26792. + p_Manip->reassmParams.p_ReassCommonTbl->internalBufferManagement,
  26793. + tmpReg32);
  26794. +
  26795. + p_Manip->updateParams &= ~(NUM_OF_TASKS | NUM_OF_EXTRA_TASKS
  26796. + | DISCARD_MASK);
  26797. + p_Manip->shadowUpdateParams |= (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS
  26798. + | DISCARD_MASK);
  26799. + }
  26800. + }
  26801. +
  26802. + if (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY)
  26803. + {
  26804. + if (p_Manip->reassmParams.capwap.h_Scheme)
  26805. + {
  26806. + p_PcdParams->p_KgParams->h_Schemes[p_PcdParams->p_KgParams->numOfSchemes] =
  26807. + p_Manip->reassmParams.capwap.h_Scheme;
  26808. + p_PcdParams->p_KgParams->numOfSchemes++;
  26809. + }
  26810. +
  26811. + }
  26812. + else
  26813. + {
  26814. + if (p_Manip->reassmParams.ip.h_Ipv4Scheme)
  26815. + {
  26816. + p_PcdParams->p_KgParams->h_Schemes[p_PcdParams->p_KgParams->numOfSchemes] =
  26817. + p_Manip->reassmParams.ip.h_Ipv4Scheme;
  26818. + p_PcdParams->p_KgParams->numOfSchemes++;
  26819. + }
  26820. + if (p_Manip->reassmParams.ip.h_Ipv6Scheme)
  26821. + {
  26822. + p_PcdParams->p_KgParams->h_Schemes[p_PcdParams->p_KgParams->numOfSchemes] =
  26823. + p_Manip->reassmParams.ip.h_Ipv6Scheme;
  26824. + p_PcdParams->p_KgParams->numOfSchemes++;
  26825. + }
  26826. +#if (DPAA_VERSION >= 11)
  26827. + if (fmPortGetSetCcParams.getCcParams.revInfo.majorRev >= 6)
  26828. + {
  26829. + if ((err = FmPortSetGprFunc(h_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
  26830. + (void**)&p_ParamsPage)) != E_OK)
  26831. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26832. +
  26833. + tmpReg32 = NIA_ENG_KG;
  26834. + if (p_Manip->reassmParams.ip.h_Ipv4Scheme)
  26835. + {
  26836. + tmpReg32 |= NIA_KG_DIRECT;
  26837. + tmpReg32 |= NIA_KG_CC_EN;
  26838. + tmpReg32 |= FmPcdKgGetSchemeId(
  26839. + p_Manip->reassmParams.ip.h_Ipv4Scheme);
  26840. + WRITE_UINT32(p_ParamsPage->iprIpv4Nia, tmpReg32);
  26841. + }
  26842. + if (p_Manip->reassmParams.ip.h_Ipv6Scheme)
  26843. + {
  26844. + tmpReg32 &= ~NIA_AC_MASK;
  26845. + tmpReg32 |= NIA_KG_DIRECT;
  26846. + tmpReg32 |= NIA_KG_CC_EN;
  26847. + tmpReg32 |= FmPcdKgGetSchemeId(
  26848. + p_Manip->reassmParams.ip.h_Ipv6Scheme);
  26849. + WRITE_UINT32(p_ParamsPage->iprIpv6Nia, tmpReg32);
  26850. + }
  26851. + }
  26852. +#else
  26853. + if (fmPortGetSetCcParams.getCcParams.revInfo.majorRev < 6)
  26854. + {
  26855. + WRITE_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->discardMask,
  26856. + fmPortGetSetCcParams.getCcParams.discardMask);
  26857. + }
  26858. +#endif /* (DPAA_VERSION >= 11) */
  26859. + }
  26860. + return E_OK;
  26861. +}
  26862. +
  26863. +#if (DPAA_VERSION == 10)
  26864. +static t_Error FmPcdFragHcScratchPoolFill(t_Handle h_FmPcd, uint8_t scratchBpid)
  26865. +{
  26866. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  26867. + t_FmPcdCcFragScratchPoolCmdParams fmPcdCcFragScratchPoolCmdParams;
  26868. + t_Error err;
  26869. +
  26870. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  26871. +
  26872. + memset(&fmPcdCcFragScratchPoolCmdParams, 0, sizeof(t_FmPcdCcFragScratchPoolCmdParams));
  26873. +
  26874. + fmPcdCcFragScratchPoolCmdParams.numOfBuffers = NUM_OF_SCRATCH_POOL_BUFFERS;
  26875. + fmPcdCcFragScratchPoolCmdParams.bufferPoolId = scratchBpid;
  26876. + if ((err = FmHcPcdCcIpFragScratchPollCmd(p_FmPcd->h_Hc, TRUE, &fmPcdCcFragScratchPoolCmdParams)) != E_OK)
  26877. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26878. +
  26879. + if (fmPcdCcFragScratchPoolCmdParams.numOfBuffers != 0)
  26880. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Fill scratch pool failed,"
  26881. + "Failed to release %d buffers to the BM (missing FBPRs)",
  26882. + fmPcdCcFragScratchPoolCmdParams.numOfBuffers));
  26883. +
  26884. + return E_OK;
  26885. +}
  26886. +
  26887. +static t_Error FmPcdFragHcScratchPoolEmpty(t_Handle h_FmPcd, uint8_t scratchBpid)
  26888. +{
  26889. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  26890. + t_FmPcdCcFragScratchPoolCmdParams fmPcdCcFragScratchPoolCmdParams;
  26891. + t_Error err;
  26892. +
  26893. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  26894. +
  26895. + memset(&fmPcdCcFragScratchPoolCmdParams, 0, sizeof(t_FmPcdCcFragScratchPoolCmdParams));
  26896. +
  26897. + fmPcdCcFragScratchPoolCmdParams.bufferPoolId = scratchBpid;
  26898. + if ((err = FmHcPcdCcIpFragScratchPollCmd(p_FmPcd->h_Hc, FALSE, &fmPcdCcFragScratchPoolCmdParams)) != E_OK)
  26899. + RETURN_ERROR(MAJOR, err, NO_MSG);
  26900. +
  26901. + return E_OK;
  26902. +}
  26903. +#endif /* (DPAA_VERSION == 10) */
  26904. +
  26905. +static void ReleaseManipHandler(t_FmPcdManip *p_Manip, t_FmPcd *p_FmPcd)
  26906. +{
  26907. + if (p_Manip->h_Ad)
  26908. + {
  26909. + if (p_Manip->muramAllocate)
  26910. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->h_Ad);
  26911. + else
  26912. + XX_Free(p_Manip->h_Ad);
  26913. + p_Manip->h_Ad = NULL;
  26914. + }
  26915. + if (p_Manip->p_Template)
  26916. + {
  26917. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->p_Template);
  26918. + p_Manip->p_Template = NULL;
  26919. + }
  26920. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  26921. + if (p_Manip->h_Frag)
  26922. + {
  26923. + if (p_Manip->capwapFragParams.p_AutoLearnHashTbl)
  26924. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  26925. + p_Manip->capwapFragParams.p_AutoLearnHashTbl);
  26926. + if (p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl)
  26927. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  26928. + p_Manip->capwapFragParams.p_ReassmFrmDescrPoolTbl);
  26929. + if (p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl)
  26930. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  26931. + p_Manip->capwapFragParams.p_ReassmFrmDescrIndxPoolTbl);
  26932. + if (p_Manip->capwapFragParams.p_TimeOutTbl)
  26933. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  26934. + p_Manip->capwapFragParams.p_TimeOutTbl);
  26935. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->h_Frag);
  26936. +
  26937. + }
  26938. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  26939. + if (p_Manip->frag)
  26940. + {
  26941. + if (p_Manip->fragParams.p_Frag)
  26942. + {
  26943. +#if (DPAA_VERSION == 10)
  26944. + FmPcdFragHcScratchPoolEmpty((t_Handle)p_FmPcd, p_Manip->fragParams.scratchBpid);
  26945. +#endif /* (DPAA_VERSION == 10) */
  26946. +
  26947. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->fragParams.p_Frag);
  26948. + }
  26949. + }
  26950. + else
  26951. + if (p_Manip->reassm)
  26952. + {
  26953. + FmPcdUnregisterReassmPort(p_FmPcd,
  26954. + p_Manip->reassmParams.p_ReassCommonTbl);
  26955. +
  26956. + if (p_Manip->reassmParams.timeOutTblAddr)
  26957. + FM_MURAM_FreeMem(
  26958. + p_FmPcd->h_FmMuram,
  26959. + UINT_TO_PTR(p_Manip->reassmParams.timeOutTblAddr));
  26960. + if (p_Manip->reassmParams.reassFrmDescrPoolTblAddr)
  26961. + XX_FreeSmart(
  26962. + UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrPoolTblAddr));
  26963. + if (p_Manip->reassmParams.p_ReassCommonTbl)
  26964. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  26965. + p_Manip->reassmParams.p_ReassCommonTbl);
  26966. + if (p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr)
  26967. + FM_MURAM_FreeMem(
  26968. + p_FmPcd->h_FmMuram,
  26969. + UINT_TO_PTR(p_Manip->reassmParams.reassFrmDescrIndxPoolTblAddr));
  26970. + if (p_Manip->reassmParams.internalBufferPoolManagementIndexAddr)
  26971. + FM_MURAM_FreeMem(
  26972. + p_FmPcd->h_FmMuram,
  26973. + UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolManagementIndexAddr));
  26974. + if (p_Manip->reassmParams.internalBufferPoolAddr)
  26975. + FM_MURAM_FreeMem(
  26976. + p_FmPcd->h_FmMuram,
  26977. + UINT_TO_PTR(p_Manip->reassmParams.internalBufferPoolAddr));
  26978. + if (p_Manip->reassmParams.hdr == HEADER_TYPE_CAPWAP)
  26979. + {
  26980. +
  26981. + }
  26982. + else
  26983. + {
  26984. + if (p_Manip->reassmParams.ip.ipv4AutoLearnHashTblAddr)
  26985. + XX_FreeSmart(
  26986. + UINT_TO_PTR(p_Manip->reassmParams.ip.ipv4AutoLearnHashTblAddr));
  26987. + if (p_Manip->reassmParams.ip.ipv6AutoLearnHashTblAddr)
  26988. + XX_FreeSmart(
  26989. + UINT_TO_PTR(p_Manip->reassmParams.ip.ipv6AutoLearnHashTblAddr));
  26990. + if (p_Manip->reassmParams.ip.ipv4AutoLearnSetLockTblAddr)
  26991. + XX_FreeSmart(
  26992. + UINT_TO_PTR(p_Manip->reassmParams.ip.ipv4AutoLearnSetLockTblAddr));
  26993. + if (p_Manip->reassmParams.ip.ipv6AutoLearnSetLockTblAddr)
  26994. + XX_FreeSmart(
  26995. + UINT_TO_PTR(p_Manip->reassmParams.ip.ipv6AutoLearnSetLockTblAddr));
  26996. + if (p_Manip->reassmParams.ip.p_Ipv4ReassTbl)
  26997. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  26998. + p_Manip->reassmParams.ip.p_Ipv4ReassTbl);
  26999. + if (p_Manip->reassmParams.ip.p_Ipv6ReassTbl)
  27000. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram,
  27001. + p_Manip->reassmParams.ip.p_Ipv6ReassTbl);
  27002. + if (p_Manip->reassmParams.ip.h_Ipv6Ad)
  27003. + XX_FreeSmart(p_Manip->reassmParams.ip.h_Ipv6Ad);
  27004. + if (p_Manip->reassmParams.ip.h_Ipv4Ad)
  27005. + XX_FreeSmart(p_Manip->reassmParams.ip.h_Ipv4Ad);
  27006. + }
  27007. + }
  27008. +
  27009. + if (p_Manip->p_StatsTbl)
  27010. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->p_StatsTbl);
  27011. +}
  27012. +
  27013. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  27014. +static t_Error CheckManipParamsAndSetType(t_FmPcdManip *p_Manip, t_FmPcdManipParams *p_ManipParams)
  27015. +{
  27016. + if (p_ManipParams->u.hdr.rmv)
  27017. + {
  27018. + switch (p_ManipParams->u.hdr.rmvParams.type)
  27019. + {
  27020. + case (e_FM_PCD_MANIP_RMV_BY_HDR):
  27021. + switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.type)
  27022. + {
  27023. + case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START) :
  27024. + if (p_ManipParams->u.hdr.rmvParams.u.byHdr.u.fromStartByHdr.include)
  27025. + {
  27026. + switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.u.fromStartByHdr.hdrInfo.hdr)
  27027. + {
  27028. + case (HEADER_TYPE_CAPWAP_DTLS) :
  27029. + p_Manip->opcode = HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST;
  27030. + p_Manip->muramAllocate = TRUE;
  27031. + if (p_ManipParams->u.hdr.insrt)
  27032. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for CAPWAP_DTLS_HDR remove can not be insrt manipualtion after"));
  27033. + if (p_ManipParams->fragOrReasm)
  27034. + {
  27035. + if (!p_ManipParams->fragOrReasmParams.frag)
  27036. + {
  27037. + switch (p_ManipParams->fragOrReasmParams.hdr)
  27038. + {
  27039. + case (HEADER_TYPE_CAPWAP):
  27040. + p_Manip->opcode = HMAN_OC_CAPWAP_REASSEMBLY;
  27041. + break;
  27042. + default:
  27043. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("unsupported header for Reassembly"));
  27044. + }
  27045. + }
  27046. + else
  27047. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for this type of manipulation frag can not be TRUE"));
  27048. + }
  27049. + break;
  27050. + default:
  27051. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("non valid net header of remove location"));
  27052. + }
  27053. + }
  27054. + else
  27055. + {
  27056. + switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.u.fromStartByHdr.hdrInfo.hdr)
  27057. + {
  27058. + case (HEADER_TYPE_CAPWAP_DTLS) :
  27059. + case (HEADER_TYPE_CAPWAP) :
  27060. + if (p_ManipParams->fragOrReasm || p_ManipParams->u.hdr.insrt)
  27061. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for the type of remove e_FM_PCD_MANIP_RMV_FROM_START_OF_FRAME_TILL_CAPWAP can not be insert or fragOrReasm TRUE"));
  27062. + p_Manip->opcode = HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR;
  27063. + p_Manip->muramAllocate = TRUE;
  27064. + p_ManipParams->u.hdr.insrt = TRUE; //internal frame header
  27065. + break;
  27066. + default :
  27067. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid type of remove manipulation"));
  27068. + }
  27069. + }
  27070. + break;
  27071. + default :
  27072. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid type of remove manipulation"));
  27073. + }
  27074. + break;
  27075. + default:
  27076. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid type of remove manipulation"));
  27077. + }
  27078. + }
  27079. + else if (p_ManipParams->u.hdr.insrt)
  27080. + {
  27081. + switch (p_ManipParams->u.hdr.insrtParams.type)
  27082. + {
  27083. + case (e_FM_PCD_MANIP_INSRT_BY_TEMPLATE) :
  27084. +
  27085. + p_Manip->opcode = HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER;
  27086. + p_Manip->muramAllocate = FALSE;
  27087. + if (p_ManipParams->fragOrReasm)
  27088. + {
  27089. + if (p_ManipParams->fragOrReasmParams.frag)
  27090. + {
  27091. + switch (p_ManipParams->fragOrReasmParams.hdr)
  27092. + {
  27093. + case (HEADER_TYPE_CAPWAP):
  27094. + p_Manip->opcode = HMAN_OC_CAPWAP_FRAGMENTATION;
  27095. + break;
  27096. + default:
  27097. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid header for fragmentation"));
  27098. + }
  27099. + }
  27100. + else
  27101. + RETURN_ERROR(MAJOR, E_INVALID_STATE,("can not reach this point"));
  27102. + }
  27103. + break;
  27104. +
  27105. + default:
  27106. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("for only isert manipulation unsupported type"));
  27107. + }
  27108. + }
  27109. + else if (p_ManipParams->fragOrReasm)
  27110. + {
  27111. + if (p_ManipParams->fragOrReasmParams.frag)
  27112. + {
  27113. + switch (p_ManipParams->fragOrReasmParams.hdr)
  27114. + {
  27115. + case (HEADER_TYPE_CAPWAP):
  27116. + p_Manip->opcode = HMAN_OC_CAPWAP_FRAGMENTATION;
  27117. + p_Manip->muramAllocate = FALSE;
  27118. + break;
  27119. + default:
  27120. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported header for fragmentation"));
  27121. + }
  27122. + }
  27123. + else
  27124. + {
  27125. + switch (p_ManipParams->fragOrReasmParams.hdr)
  27126. + {
  27127. + case (HEADER_TYPE_CAPWAP):
  27128. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Reassembly has to be with additional operation - rmv = TRUE, type of remove - e_FM_PCD_MANIP_RMV_FROM_START_OF_FRAME_INCLUDE_SPECIFIC_LOCATION,type = e_FM_PCD_MANIP_LOC_BY_HDR, hdr = HEADER_TYPE_CAPWAP_DTLS"));
  27129. + default:
  27130. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported header for reassembly"));
  27131. + }
  27132. + }
  27133. +
  27134. + }
  27135. + else
  27136. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("User didn't ask for any manipulation"));
  27137. +
  27138. + p_Manip->insrt = p_ManipParams->u.hdr.insrt;
  27139. + p_Manip->rmv = p_ManipParams->u.hdr.rmv;
  27140. +
  27141. + return E_OK;
  27142. +}
  27143. +
  27144. +#else /* not (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  27145. +static t_Error CheckManipParamsAndSetType(t_FmPcdManip *p_Manip,
  27146. + t_FmPcdManipParams *p_ManipParams)
  27147. +{
  27148. + switch (p_ManipParams->type)
  27149. + {
  27150. + case e_FM_PCD_MANIP_HDR:
  27151. + /* Check that next-manip is not already used */
  27152. + if (p_ManipParams->h_NextManip)
  27153. + {
  27154. + if (!MANIP_IS_FIRST(p_ManipParams->h_NextManip))
  27155. + RETURN_ERROR(
  27156. + MAJOR, E_INVALID_STATE,
  27157. + ("h_NextManip is already a part of another chain"));
  27158. + if ((MANIP_GET_TYPE(p_ManipParams->h_NextManip)
  27159. + != e_FM_PCD_MANIP_HDR) &&
  27160. + (MANIP_GET_TYPE(p_ManipParams->h_NextManip)
  27161. + != e_FM_PCD_MANIP_FRAG))
  27162. + RETURN_ERROR(
  27163. + MAJOR,
  27164. + E_NOT_SUPPORTED,
  27165. + ("For a Header Manipulation node - no support of h_NextManip of type other than Header Manipulation or Fragmentation."));
  27166. + }
  27167. +
  27168. + if (p_ManipParams->u.hdr.rmv)
  27169. + {
  27170. + switch (p_ManipParams->u.hdr.rmvParams.type)
  27171. + {
  27172. + case (e_FM_PCD_MANIP_RMV_BY_HDR):
  27173. + switch (p_ManipParams->u.hdr.rmvParams.u.byHdr.type)
  27174. + {
  27175. + case (e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2):
  27176. + break;
  27177. +#if (DPAA_VERSION >= 11)
  27178. + case (e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP):
  27179. + break;
  27180. + case (e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START):
  27181. + {
  27182. + t_Error err;
  27183. + uint8_t prsArrayOffset;
  27184. +
  27185. + err =
  27186. + GetPrOffsetByHeaderOrField(
  27187. + &p_ManipParams->u.hdr.rmvParams.u.byHdr.u.hdrInfo,
  27188. + &prsArrayOffset);
  27189. + if (err)
  27190. + RETURN_ERROR(MAJOR, err, NO_MSG);
  27191. + break;
  27192. + }
  27193. +#endif /* (DPAA_VERSION >= 11) */
  27194. + default:
  27195. + RETURN_ERROR(
  27196. + MAJOR,
  27197. + E_INVALID_STATE,
  27198. + ("invalid type of remove manipulation"));
  27199. + }
  27200. + break;
  27201. + case (e_FM_PCD_MANIP_RMV_GENERIC):
  27202. + break;
  27203. + default:
  27204. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  27205. + ("invalid type of remove manipulation"));
  27206. + }
  27207. + p_Manip->opcode = HMAN_OC;
  27208. + p_Manip->muramAllocate = TRUE;
  27209. + p_Manip->rmv = TRUE;
  27210. + }
  27211. + else
  27212. + if (p_ManipParams->u.hdr.insrt)
  27213. + {
  27214. + switch (p_ManipParams->u.hdr.insrtParams.type)
  27215. + {
  27216. + case (e_FM_PCD_MANIP_INSRT_BY_HDR):
  27217. + {
  27218. + switch (p_ManipParams->u.hdr.insrtParams.u.byHdr.type)
  27219. + {
  27220. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2):
  27221. + /* nothing to check */
  27222. + break;
  27223. +#if (DPAA_VERSION >= 11)
  27224. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_IP):
  27225. + if (p_ManipParams->u.hdr.insrtParams.u.byHdr.u.ipParams.insrt.size
  27226. + % 4)
  27227. + RETURN_ERROR(
  27228. + MAJOR,
  27229. + E_INVALID_VALUE,
  27230. + ("IP inserted header must be of size which is a multiple of four bytes"));
  27231. + break;
  27232. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP):
  27233. + if (p_ManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
  27234. + % 4)
  27235. + RETURN_ERROR(
  27236. + MAJOR,
  27237. + E_INVALID_VALUE,
  27238. + ("CAPWAP inserted header must be of size which is a multiple of four bytes"));
  27239. + break;
  27240. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP):
  27241. + case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE):
  27242. + if (p_ManipParams->u.hdr.insrtParams.u.byHdr.u.insrt.size
  27243. + != 8)
  27244. + RETURN_ERROR(
  27245. + MAJOR,
  27246. + E_INVALID_VALUE,
  27247. + ("Inserted header must be of size 8"));
  27248. + break;
  27249. +#endif /* (DPAA_VERSION >= 11) */
  27250. + default:
  27251. + RETURN_ERROR(
  27252. + MAJOR,
  27253. + E_INVALID_STATE,
  27254. + ("unsupported insert by header type"));
  27255. + }
  27256. + }
  27257. + case (e_FM_PCD_MANIP_INSRT_GENERIC):
  27258. + break;
  27259. + default:
  27260. + RETURN_ERROR(
  27261. + MAJOR,
  27262. + E_INVALID_STATE,
  27263. + ("for only insert manipulation unsupported type"));
  27264. + }
  27265. + p_Manip->opcode = HMAN_OC;
  27266. + p_Manip->muramAllocate = TRUE;
  27267. + p_Manip->insrt = TRUE;
  27268. + }
  27269. + else
  27270. + if (p_ManipParams->u.hdr.fieldUpdate)
  27271. + {
  27272. + /* Check parameters */
  27273. + if (p_ManipParams->u.hdr.fieldUpdateParams.type
  27274. + == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN)
  27275. + {
  27276. + if ((p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
  27277. + == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI)
  27278. + && (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.u.vpri
  27279. + > 7))
  27280. + RETURN_ERROR(
  27281. + MAJOR, E_INVALID_VALUE,
  27282. + ("vpri should get values of 0-7 "));
  27283. + if (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.updateType
  27284. + == e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN)
  27285. + {
  27286. + int i;
  27287. +
  27288. + if (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.vpriDefVal
  27289. + > 7)
  27290. + RETURN_ERROR(
  27291. + MAJOR,
  27292. + E_INVALID_VALUE,
  27293. + ("vpriDefVal should get values of 0-7 "));
  27294. + for (i = 0; i < FM_PCD_MANIP_DSCP_TO_VLAN_TRANS;
  27295. + i++)
  27296. + if (p_ManipParams->u.hdr.fieldUpdateParams.u.vlan.u.dscpToVpri.dscpToVpriTable[i]
  27297. + & 0xf0)
  27298. + RETURN_ERROR(
  27299. + MAJOR,
  27300. + E_INVALID_VALUE,
  27301. + ("dscpToVpriTabl value out of range (0-15)"));
  27302. + }
  27303. +
  27304. + }
  27305. +
  27306. + p_Manip->opcode = HMAN_OC;
  27307. + p_Manip->muramAllocate = TRUE;
  27308. + p_Manip->fieldUpdate = TRUE;
  27309. + }
  27310. + else
  27311. + if (p_ManipParams->u.hdr.custom)
  27312. + {
  27313. + if (p_ManipParams->u.hdr.customParams.type == e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE)
  27314. + {
  27315. +
  27316. + if ((p_ManipParams->u.hdr.customParams.u.genFieldReplace.size == 0) ||
  27317. + (p_ManipParams->u.hdr.customParams.u.genFieldReplace.size > 8))
  27318. + RETURN_ERROR(
  27319. + MAJOR, E_INVALID_VALUE,
  27320. + ("size should get values of 1-8 "));
  27321. +
  27322. + if (p_ManipParams->u.hdr.customParams.u.genFieldReplace.srcOffset > 7)
  27323. + RETURN_ERROR(
  27324. + MAJOR, E_INVALID_VALUE,
  27325. + ("srcOffset should be <= 7"));
  27326. +
  27327. + if ((p_ManipParams->u.hdr.customParams.u.genFieldReplace.srcOffset +
  27328. + p_ManipParams->u.hdr.customParams.u.genFieldReplace.size) > 8)
  27329. + RETURN_ERROR(
  27330. + MAJOR, E_INVALID_VALUE,
  27331. + ("(srcOffset + size) should be <= 8"));
  27332. +
  27333. + if ((p_ManipParams->u.hdr.customParams.u.genFieldReplace.dstOffset +
  27334. + p_ManipParams->u.hdr.customParams.u.genFieldReplace.size) > 256)
  27335. + RETURN_ERROR(
  27336. + MAJOR, E_INVALID_VALUE,
  27337. + ("(dstOffset + size) should be <= 256"));
  27338. +
  27339. + }
  27340. +
  27341. + p_Manip->opcode = HMAN_OC;
  27342. + p_Manip->muramAllocate = TRUE;
  27343. + p_Manip->custom = TRUE;
  27344. + }
  27345. + break;
  27346. + case e_FM_PCD_MANIP_REASSEM:
  27347. + if (p_ManipParams->h_NextManip)
  27348. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  27349. + ("next manip with reassembly"));
  27350. + switch (p_ManipParams->u.reassem.hdr)
  27351. + {
  27352. + case (HEADER_TYPE_IPv4):
  27353. + p_Manip->reassmParams.hdr = HEADER_TYPE_IPv4;
  27354. + p_Manip->opcode = HMAN_OC_IP_REASSEMBLY;
  27355. + break;
  27356. + case (HEADER_TYPE_IPv6):
  27357. + p_Manip->reassmParams.hdr = HEADER_TYPE_IPv6;
  27358. + p_Manip->opcode = HMAN_OC_IP_REASSEMBLY;
  27359. + break;
  27360. +#if (DPAA_VERSION >= 11)
  27361. + case (HEADER_TYPE_CAPWAP):
  27362. + p_Manip->reassmParams.hdr = HEADER_TYPE_CAPWAP;
  27363. + p_Manip->opcode = HMAN_OC_CAPWAP_REASSEMBLY;
  27364. + break;
  27365. +#endif /* (DPAA_VERSION >= 11) */
  27366. + default:
  27367. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  27368. + ("header for reassembly"));
  27369. + }
  27370. + break;
  27371. + case e_FM_PCD_MANIP_FRAG:
  27372. + if (p_ManipParams->h_NextManip)
  27373. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  27374. + ("next manip with fragmentation"));
  27375. + switch (p_ManipParams->u.frag.hdr)
  27376. + {
  27377. + case (HEADER_TYPE_IPv4):
  27378. + case (HEADER_TYPE_IPv6):
  27379. + p_Manip->opcode = HMAN_OC_IP_FRAGMENTATION;
  27380. + break;
  27381. +#if (DPAA_VERSION >= 11)
  27382. + case (HEADER_TYPE_CAPWAP):
  27383. + p_Manip->opcode = HMAN_OC_CAPWAP_FRAGMENTATION;
  27384. + break;
  27385. +#endif /* (DPAA_VERSION >= 11) */
  27386. + default:
  27387. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  27388. + ("header for fragmentation"));
  27389. + }
  27390. + p_Manip->muramAllocate = TRUE;
  27391. + break;
  27392. + case e_FM_PCD_MANIP_SPECIAL_OFFLOAD:
  27393. + switch (p_ManipParams->u.specialOffload.type)
  27394. + {
  27395. + case (e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC):
  27396. + p_Manip->opcode = HMAN_OC_IPSEC_MANIP;
  27397. + p_Manip->muramAllocate = TRUE;
  27398. + break;
  27399. +#if (DPAA_VERSION >= 11)
  27400. + case (e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP):
  27401. + p_Manip->opcode = HMAN_OC_CAPWAP_MANIP;
  27402. + p_Manip->muramAllocate = TRUE;
  27403. + break;
  27404. +#endif /* (DPAA_VERSION >= 11) */
  27405. + default:
  27406. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  27407. + ("special offload type"));
  27408. + }
  27409. + break;
  27410. + default:
  27411. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("manip type"));
  27412. + }
  27413. +
  27414. + return E_OK;
  27415. +}
  27416. +#endif /* not (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  27417. +
  27418. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  27419. +
  27420. +static t_Error UpdateIndxStats(t_Handle h_FmPcd,
  27421. + t_Handle h_FmPort,
  27422. + t_FmPcdManip *p_Manip)
  27423. +{
  27424. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  27425. + uint32_t tmpReg32 = 0;
  27426. + t_AdOfTypeContLookup *p_Ad;
  27427. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  27428. + t_Error err;
  27429. +
  27430. + SANITY_CHECK_RETURN_ERROR(p_Manip,E_INVALID_HANDLE);
  27431. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
  27432. +
  27433. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  27434. + if (p_Manip->h_FmPcd != h_FmPcd)
  27435. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  27436. + ("handler of PCD previously was initiated by different value"));
  27437. +
  27438. + memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
  27439. +
  27440. + if (!p_Manip->p_StatsTbl)
  27441. + {
  27442. +
  27443. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNDN;
  27444. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_CC;
  27445. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  27446. + if (err)
  27447. + RETURN_ERROR(MAJOR, err, NO_MSG);
  27448. +
  27449. + tmpReg32 = GET_UINT32(p_Ad->ccAdBase);
  27450. +
  27451. + p_Manip->p_StatsTbl =
  27452. + (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  27453. + (uint32_t)p_Manip->owner * FM_PCD_MANIP_INDEXED_STATS_ENTRY_SIZE,
  27454. + 4);
  27455. + if (!p_Manip->p_StatsTbl)
  27456. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for Manipulation indexed statistics table"));
  27457. +
  27458. + MemSet8(p_Manip->p_StatsTbl, 0, (uint32_t)(p_Manip->owner * 4));
  27459. +
  27460. + tmpReg32 |= (uint32_t)(XX_VirtToPhys(p_Manip->p_StatsTbl) - p_FmPcd->physicalMuramBase);
  27461. +
  27462. + if (p_Manip->cnia)
  27463. + tmpReg32 |= FM_PCD_MANIP_INDEXED_STATS_CNIA;
  27464. +
  27465. + tmpReg32 |= FM_PCD_MANIP_INDEXED_STATS_DPD;
  27466. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  27467. + }
  27468. + else
  27469. + {
  27470. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNDN;
  27471. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_CC;
  27472. + err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams);
  27473. + if (err)
  27474. + RETURN_ERROR(MAJOR, err, NO_MSG);
  27475. + }
  27476. +
  27477. + return E_OK;
  27478. +}
  27479. +
  27480. +static t_Error RmvHdrTillSpecLocNOrInsrtIntFrmHdr(t_FmPcdManipHdrRmvParams *p_ManipParams, t_FmPcdManip *p_Manip)
  27481. +{
  27482. + t_AdOfTypeContLookup *p_Ad;
  27483. + uint32_t tmpReg32 = 0;
  27484. + uint8_t prsArrayOffset = 0;
  27485. + t_Error err;
  27486. +
  27487. + SANITY_CHECK_RETURN_ERROR(p_Manip,E_NULL_POINTER);
  27488. + SANITY_CHECK_RETURN_ERROR(p_ManipParams,E_NULL_POINTER);
  27489. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
  27490. +
  27491. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  27492. + if (p_Manip->rmv)
  27493. + {
  27494. + err = GetPrOffsetByHeaderOrField(&p_ManipParams->u.byHdr.u.fromStartByHdr.hdrInfo, &prsArrayOffset);
  27495. + if (err)
  27496. + RETURN_ERROR(MAJOR, err, NO_MSG);
  27497. +
  27498. + tmpReg32 |= (uint32_t)prsArrayOffset << 24;
  27499. + tmpReg32 |= HMAN_RMV_HDR;
  27500. + }
  27501. +
  27502. + if (p_Manip->insrt)
  27503. + tmpReg32 |= HMAN_INSRT_INT_FRM_HDR;
  27504. +
  27505. + tmpReg32 |= (uint32_t)HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR;
  27506. +
  27507. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  27508. +
  27509. + tmpReg32 = 0;
  27510. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  27511. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  27512. +
  27513. + return E_OK;
  27514. +}
  27515. +
  27516. +static t_Error MvIntFrameHeaderFromFrameToBufferPrefix(t_FmPcdManip *p_Manip,
  27517. + bool caamUsed)
  27518. +{
  27519. + t_AdOfTypeContLookup *p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  27520. + uint32_t tmpReg32 = 0;
  27521. +
  27522. + SANITY_CHECK_RETURN_ERROR(p_Ad, E_INVALID_HANDLE);
  27523. +
  27524. + p_Manip->updateParams |= OFFSET_OF_PR | INTERNAL_CONTEXT_OFFSET;
  27525. +
  27526. + tmpReg32 = 0;
  27527. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  27528. + *(uint32_t *)&p_Ad->ccAdBase = tmpReg32;
  27529. +
  27530. + tmpReg32 = 0;
  27531. + tmpReg32 |= HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX;
  27532. + tmpReg32 |= (uint32_t)0x16 << 16;
  27533. + *(uint32_t *)&p_Ad->pcAndOffsets = tmpReg32;
  27534. +
  27535. + if (caamUsed)
  27536. + *(uint32_t *)&p_Ad->gmask = 0xf0000000;
  27537. +
  27538. + return E_OK;
  27539. +}
  27540. +
  27541. +static t_Error CapwapRmvDtlsHdr(t_FmPcd *p_FmPcd, t_FmPcdManip *p_Manip)
  27542. +{
  27543. + t_AdOfTypeContLookup *p_Ad;
  27544. + uint32_t tmpReg32 = 0;
  27545. + t_Error err = E_OK;
  27546. +
  27547. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
  27548. +
  27549. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  27550. +
  27551. + tmpReg32 = 0;
  27552. + tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST;
  27553. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  27554. +
  27555. + tmpReg32 = 0;
  27556. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  27557. +
  27558. +
  27559. + if (p_Manip->h_Frag)
  27560. + {
  27561. + p_Manip->updateParams |= INTERNAL_CONTEXT_OFFSET;
  27562. + tmpReg32 |= (uint32_t)(XX_VirtToPhys(p_Manip->h_Frag) - (p_FmPcd->physicalMuramBase));
  27563. + }
  27564. +
  27565. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  27566. +
  27567. + return err;
  27568. +}
  27569. +
  27570. +static t_Error CapwapReassembly(t_CapwapReassemblyParams *p_ManipParams,
  27571. + t_FmPcdManip *p_Manip,
  27572. + t_FmPcd *p_FmPcd,
  27573. + uint8_t poolId)
  27574. +{
  27575. + t_Handle p_Table;
  27576. + uint32_t tmpReg32 = 0;
  27577. + int i = 0;
  27578. + uint8_t log2Num;
  27579. + uint8_t numOfSets;
  27580. + uint32_t j = 0;
  27581. + uint32_t bitFor1Micro;
  27582. +
  27583. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
  27584. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  27585. +
  27586. + if (!p_FmPcd->h_Hc)
  27587. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,("hc port has to be initialized in this mode"));
  27588. + if (!POWER_OF_2(p_ManipParams->timeoutRoutineRequestTime))
  27589. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("timeoutRoutineRequestTime has to be power of 2"));
  27590. + if (!POWER_OF_2(p_ManipParams->maxNumFramesInProcess))
  27591. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,("maxNumFramesInProcess has to be power of 2"));
  27592. + if (!p_ManipParams->timeoutRoutineRequestTime && p_ManipParams->timeoutThresholdForReassmProcess)
  27593. + DBG(WARNING, ("if timeoutRoutineRequestTime 0, timeoutThresholdForReassmProcess is uselessly"));
  27594. + if (p_ManipParams->numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH)
  27595. + {
  27596. + if ((p_ManipParams->maxNumFramesInProcess < 4) ||
  27597. + (p_ManipParams->maxNumFramesInProcess > 512))
  27598. + RETURN_ERROR(MAJOR,E_INVALID_VALUE, ("In the case of numOfFramesPerHashEntry = e_FM_PCD_MANIP_EIGHT_WAYS_HASH maxNumFramesInProcess has to be in the range 4-512"));
  27599. + }
  27600. + else
  27601. + {
  27602. + if ((p_ManipParams->maxNumFramesInProcess < 8) ||
  27603. + (p_ManipParams->maxNumFramesInProcess > 2048))
  27604. + RETURN_ERROR(MAJOR,E_INVALID_VALUE, ("In the case of numOfFramesPerHashEntry = e_FM_PCD_MANIP_FOUR_WAYS_HASH maxNumFramesInProcess has to be in the range 8-2048"));
  27605. + }
  27606. +
  27607. + bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
  27608. + if (bitFor1Micro == 0)
  27609. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
  27610. +
  27611. + p_Manip->updateParams |= (NUM_OF_TASKS | OFFSET_OF_PR | OFFSET_OF_DATA | HW_PORT_ID);
  27612. +
  27613. + p_Manip->h_Frag = (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  27614. + FM_PCD_MANIP_CAPWAP_REASM_TABLE_SIZE,
  27615. + FM_PCD_MANIP_CAPWAP_REASM_TABLE_ALIGN);
  27616. + if (!p_Manip->h_Frag)
  27617. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc CAPWAP reassembly parameters table"));
  27618. +
  27619. + MemSet8(p_Manip->h_Frag, 0, FM_PCD_MANIP_CAPWAP_REASM_TABLE_SIZE);
  27620. +
  27621. + p_Table = (t_CapwapReasmPram *)p_Manip->h_Frag;
  27622. +
  27623. + p_Manip->capwapFragParams.p_AutoLearnHashTbl =
  27624. + (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  27625. + (uint32_t)(p_ManipParams->maxNumFramesInProcess * 2 * FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE),
  27626. + FM_PCD_MANIP_CAPWAP_REASM_TABLE_ALIGN);
  27627. +
  27628. + if (!p_Manip->capwapFragParams.p_AutoLearnHashTbl)
  27629. + RETURN_ERROR(MAJOR, E_NO_MEMORY,("MURAM alloc for CAPWAP automatic learning hash table"));
  27630. +
  27631. + MemSet8(p_Manip->capwapFragParams.p_AutoLearnHashTbl, 0, (uint32_t)(p_ManipParams->maxNumFramesInProcess * 2 * FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE));
  27632. +
  27633. + tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->capwapFragParams.p_AutoLearnHashTbl) - p_FmPcd->physicalMuramBase);
  27634. +
  27635. + WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->autoLearnHashTblPtr, tmpReg32);
  27636. +
  27637. + tmpReg32 = 0;
  27638. + if (p_ManipParams->timeOutMode == e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES)
  27639. + tmpReg32 |= FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_BETWEEN_FRAMES;
  27640. + if (p_ManipParams->haltOnDuplicationFrag)
  27641. + tmpReg32 |= FM_PCD_MANIP_CAPWAP_REASM_HALT_ON_DUPLICATE_FRAG;
  27642. + if (p_ManipParams->numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH)
  27643. + {
  27644. + i = 8;
  27645. + tmpReg32 |= FM_PCD_MANIP_CAPWAP_REASM_AUTOMATIC_LEARNIN_HASH_8_WAYS;
  27646. + }
  27647. + else
  27648. + i = 4;
  27649. +
  27650. + numOfSets = (uint8_t)((p_ManipParams->maxNumFramesInProcess * 2) / i);
  27651. + LOG2(numOfSets, log2Num);
  27652. + tmpReg32 |= (uint32_t)(log2Num - 1) << 24;
  27653. +
  27654. + WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->mode, tmpReg32);
  27655. +
  27656. + for (j=0; j<p_ManipParams->maxNumFramesInProcess*2; j++)
  27657. + if (((j / i) % 2)== 0)
  27658. + WRITE_UINT32(*(uint32_t *)PTR_MOVE(p_Manip->capwapFragParams.p_AutoLearnHashTbl, j * FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE), 0x80000000);
  27659. +
  27660. + tmpReg32 = 0x00008000;
  27661. + tmpReg32 |= (uint32_t)poolId << 16;
  27662. + WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->bufferPoolIdAndRisc1SetIndexes, tmpReg32);
  27663. + WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->risc23SetIndexes, 0x80008000);
  27664. + WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->risc4SetIndexesAndExtendedStatsTblPtr, 0x80000000);
  27665. +
  27666. + p_Manip->capwapFragParams.maxNumFramesInProcess = p_ManipParams->maxNumFramesInProcess;
  27667. +
  27668. + p_Manip->capwapFragParams.sgBpid = poolId;
  27669. +
  27670. + p_Manip->capwapFragParams.fqidForTimeOutFrames = p_ManipParams->fqidForTimeOutFrames;
  27671. + p_Manip->capwapFragParams.timeoutRoutineRequestTime = p_ManipParams->timeoutRoutineRequestTime;
  27672. + p_Manip->capwapFragParams.bitFor1Micro = bitFor1Micro;
  27673. +
  27674. + tmpReg32 = 0;
  27675. + tmpReg32 |= (((uint32_t)1<<p_Manip->capwapFragParams.bitFor1Micro) * p_ManipParams->timeoutThresholdForReassmProcess);
  27676. + WRITE_UINT32(((t_CapwapReasmPram *)p_Table)->expirationDelay, tmpReg32);
  27677. +
  27678. + return E_OK;
  27679. +}
  27680. +
  27681. +static t_Error CapwapFragmentation(t_CapwapFragmentationParams *p_ManipParams,
  27682. + t_FmPcdManip *p_Manip,
  27683. + t_FmPcd *p_FmPcd,
  27684. + uint8_t poolId)
  27685. +{
  27686. + t_AdOfTypeContLookup *p_Ad;
  27687. + uint32_t tmpReg32 = 0;
  27688. +
  27689. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
  27690. +
  27691. + p_Manip->updateParams |= OFFSET_OF_DATA;
  27692. +
  27693. + p_Manip->frag = TRUE;
  27694. +
  27695. + p_Manip->h_Frag = (t_Handle)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  27696. + FM_PCD_CC_AD_ENTRY_SIZE,
  27697. + FM_PCD_CC_AD_TABLE_ALIGN);
  27698. + if (!p_Manip->h_Frag)
  27699. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for CAPWAP fragmentation table descriptor"));
  27700. +
  27701. + MemSet8(p_Manip->h_Frag, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  27702. +
  27703. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Frag;
  27704. +
  27705. + tmpReg32 = 0;
  27706. + tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_FRAGMENTATION;
  27707. +
  27708. + if (p_ManipParams->headerOptionsCompr)
  27709. + tmpReg32 |= FM_PCD_MANIP_CAPWAP_FRAG_COMPR_OPTION_FIELD_EN;
  27710. + tmpReg32 |= ((uint32_t)poolId << 8);
  27711. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  27712. +
  27713. + tmpReg32 = 0;
  27714. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  27715. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  27716. +
  27717. + p_Manip->sizeForFragmentation = p_ManipParams->sizeForFragmentation;
  27718. + p_Manip->capwapFragParams.sgBpid = poolId;
  27719. +
  27720. + return E_OK;
  27721. +}
  27722. +
  27723. +static t_Error IndxStats(t_FmPcdStatsParams *p_StatsParams,t_FmPcdManip *p_Manip,t_FmPcd *p_FmPcd)
  27724. +{
  27725. + t_AdOfTypeContLookup *p_Ad;
  27726. + uint32_t tmpReg32 = 0;
  27727. +
  27728. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
  27729. +
  27730. + UNUSED(p_FmPcd);
  27731. +
  27732. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  27733. +
  27734. + tmpReg32 = 0;
  27735. + tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_INDEXED_STATS;
  27736. + if (p_StatsParams->type == e_FM_PCD_STATS_PER_FLOWID)
  27737. + tmpReg32 |= (uint32_t)0x16 << 16;
  27738. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  27739. +
  27740. + tmpReg32 = 0;
  27741. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  27742. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  27743. +
  27744. + return E_OK;
  27745. +}
  27746. +
  27747. +static t_Error InsrtHdrByTempl(t_FmPcdManipHdrInsrtParams *p_ManipParams, t_FmPcdManip *p_Manip, t_FmPcd *p_FmPcd)
  27748. +{
  27749. + t_FmPcdManipHdrInsrtByTemplateParams *p_InsrtByTemplate = &p_ManipParams->u.byTemplate;
  27750. + uint8_t tmpReg8 = 0xff;
  27751. + t_AdOfTypeContLookup *p_Ad;
  27752. + bool ipModify = FALSE;
  27753. + uint32_t tmpReg32 = 0, tmpRegNia = 0;
  27754. + uint16_t tmpReg16 = 0;
  27755. + t_Error err = E_OK;
  27756. + uint8_t extraAddedBytes = 0, blockSize = 0, extraAddedBytesAlignedToBlockSize = 0, log2Num = 0;
  27757. + uint8_t *p_Template = NULL;
  27758. +
  27759. + SANITY_CHECK_RETURN_ERROR(p_ManipParams,E_NULL_POINTER);
  27760. + SANITY_CHECK_RETURN_ERROR(p_Manip,E_NULL_POINTER);
  27761. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad,E_INVALID_HANDLE);
  27762. + SANITY_CHECK_RETURN_ERROR(p_FmPcd,E_NULL_POINTER);
  27763. +
  27764. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  27765. + if (p_Manip->insrt)
  27766. + {
  27767. + if ((!p_InsrtByTemplate->size && p_InsrtByTemplate->modifyOuterIp) ||
  27768. + (!p_InsrtByTemplate->size && p_InsrtByTemplate->modifyOuterVlan))
  27769. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : asking for header template modifications with no template for insertion (template size)"));
  27770. +
  27771. + if (p_InsrtByTemplate->size && p_InsrtByTemplate->modifyOuterIp && (p_InsrtByTemplate->size <= p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset))
  27772. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : size of template < ipOuterOffset"));
  27773. +
  27774. + if (p_InsrtByTemplate->size > 128)
  27775. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Size of header template for insertion can not be more than 128"));
  27776. +
  27777. + if (p_InsrtByTemplate->size)
  27778. + {
  27779. + p_Manip->p_Template = (uint8_t *)FM_MURAM_AllocMem(p_FmPcd->h_FmMuram,
  27780. + p_InsrtByTemplate->size,
  27781. + FM_PCD_CC_AD_TABLE_ALIGN);
  27782. + if(!p_Manip->p_Template)
  27783. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Memory allocation in MURAM FAILED"));
  27784. +
  27785. + tmpReg32 = (uint32_t)(XX_VirtToPhys(p_Manip->p_Template) - (p_FmPcd->physicalMuramBase));
  27786. + tmpReg32 |= (uint32_t)p_InsrtByTemplate->size << 24;
  27787. + *(uint32_t *)&p_Ad->matchTblPtr = tmpReg32;
  27788. + }
  27789. +
  27790. + tmpReg32 = 0;
  27791. +
  27792. + p_Template = (uint8_t *)XX_Malloc(p_InsrtByTemplate->size * sizeof(uint8_t));
  27793. +
  27794. + if (!p_Template)
  27795. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("XX_Malloc allocation FAILED"));
  27796. +
  27797. + memcpy(p_Template, p_InsrtByTemplate->hdrTemplate, p_InsrtByTemplate->size * sizeof(uint8_t));
  27798. +
  27799. + if (p_InsrtByTemplate->modifyOuterIp)
  27800. + {
  27801. + ipModify = TRUE;
  27802. +
  27803. + tmpReg8 = (uint8_t)p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset];
  27804. +
  27805. + if((tmpReg8 & 0xf0) == 0x40)
  27806. + tmpReg8 = 4;
  27807. + else if((tmpReg8 & 0xf0) == 0x60)
  27808. + tmpReg8 = 6;
  27809. + else
  27810. + tmpReg8 = 0xff;
  27811. +
  27812. + if (tmpReg8 != 0xff)
  27813. + {
  27814. + if(p_InsrtByTemplate->modifyOuterIpParams.dscpEcn & 0xff00)
  27815. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : IPV4 present in header template, dscpEcn has to be only 1 byte"));
  27816. + if(p_InsrtByTemplate->modifyOuterIpParams.recalculateLength)
  27817. + {
  27818. +
  27819. + if((p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedAlignedToBlockSize + p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedNotAlignedToBlockSize) > 255)
  27820. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("extra Byte added can not be more than 256 bytes"));
  27821. + extraAddedBytes = (uint8_t) (p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedAlignedToBlockSize + p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedNotAlignedToBlockSize);
  27822. + blockSize = p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.blockSize;
  27823. + extraAddedBytesAlignedToBlockSize = p_InsrtByTemplate->modifyOuterIpParams.recalculateLengthParams.extraBytesAddedAlignedToBlockSize;
  27824. + /*IP header template - IP totalLength -
  27825. + (1 byte) extraByteForIp = headerTemplateSize - ipOffset + insertedBytesAfterThisStage ,
  27826. + in the case of SEC insertedBytesAfterThisStage - SEC trailer (21/31) + header(13)
  27827. + second byte - extraByteForIp = headerTemplate - ipOffset + insertedBytesAfterThisStage*/
  27828. + }
  27829. + if (blockSize)
  27830. + {
  27831. + if (!POWER_OF_2(blockSize))
  27832. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("inputFrmPaddingUpToBlockSize has to be power of 2"));
  27833. + }
  27834. +
  27835. + }
  27836. + if (tmpReg8 == 4)
  27837. + {
  27838. + if ((IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP + p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset) > p_InsrtByTemplate->size)
  27839. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : IP present in header template, user asked for IP modifications but ipOffset + ipTotalLengthFieldOffset in header template bigger than template size"));
  27840. +
  27841. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_DSCECN_FIELD_OFFSET_FROM_IP] = (uint8_t)p_InsrtByTemplate->modifyOuterIpParams.dscpEcn;
  27842. +
  27843. + if (blockSize)
  27844. + blockSize -= 1;
  27845. +
  27846. + if ((p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes) > 255)
  27847. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes has to be less than 255"));
  27848. +
  27849. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_TOTALLENGTH_FIELD_OFFSET_FROM_IP + 1] = blockSize; // IPV6 - in AD instead of SEQ IND
  27850. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_TOTALLENGTH_FIELD_OFFSET_FROM_IP] = (uint8_t)(p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes);// for IPV6 decrement additional 40 bytes of IPV6 heade size
  27851. +
  27852. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_ID_FIELD_OFFSET_FROM_IP] = 0x00;
  27853. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_ID_FIELD_OFFSET_FROM_IP + 1] = extraAddedBytesAlignedToBlockSize;
  27854. +
  27855. + /*IP header template - relevant only for ipv4 CheckSum = 0*/
  27856. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP] = 0x00;
  27857. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP + 1] = 0x00;
  27858. +
  27859. + /*UDP checksum has to be 0*/
  27860. + if (p_InsrtByTemplate->modifyOuterIpParams.udpPresent)
  27861. + {
  27862. + if ((p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + UDP_CHECKSUM_FIELD_SIZE) > p_InsrtByTemplate->size)
  27863. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : UDP present according to user but (UDP offset + UDP header size) < size of header template"));
  27864. +
  27865. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP ] = 0x00;
  27866. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + 1] = 0x00;
  27867. +
  27868. + }
  27869. +
  27870. + if (p_InsrtByTemplate->modifyOuterIpParams.ipIdentGenId > 7)
  27871. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("ipIdentGenId has to be one out of 8 sequence number generators (0 - 7) for IP identification field"));
  27872. +
  27873. + tmpRegNia |= (uint32_t)p_InsrtByTemplate->modifyOuterIpParams.ipIdentGenId<<24;
  27874. + }
  27875. + else if (tmpReg8 == 6)
  27876. + {
  27877. + /*TODO - add check for maximum value of blockSize;*/
  27878. + if (blockSize)
  27879. + LOG2(blockSize, log2Num);
  27880. + tmpRegNia |= (uint32_t)log2Num << 24;
  27881. +
  27882. + // for IPV6 decrement additional 40 bytes of IPV6 heade size - because IPV6 header size is not included in payloadLength
  27883. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv6_PAYLOAD_LENGTH_OFFSET_FROM_IP] = (uint8_t)(p_InsrtByTemplate->size - p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + extraAddedBytes - 40);
  27884. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv6_PAYLOAD_LENGTH_OFFSET_FROM_IP + 1] = extraAddedBytesAlignedToBlockSize;
  27885. + if (p_InsrtByTemplate->modifyOuterIpParams.udpPresent)
  27886. + {
  27887. + if ((p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + UDP_CHECKSUM_FIELD_SIZE) > p_InsrtByTemplate->size)
  27888. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inconsistent parameters : UDP present according to user but (UDP offset + UDP header size) < size of header template"));
  27889. + if (p_Template[p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset + IPv6_NEXT_HEADER_OFFSET_FROM_IP] != 0x88)
  27890. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("OUr suppport is only IPv6/UDPLite"));
  27891. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_LENGTH_FIELD_OFFSET_FROM_UDP] = 0x00;
  27892. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_LENGTH_FIELD_OFFSET_FROM_UDP + 1] = 0x08;
  27893. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP] = 0x00;
  27894. + p_Template[p_InsrtByTemplate->modifyOuterIpParams.udpOffset + UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP + 1] = 0x00;
  27895. + }
  27896. + }
  27897. + else
  27898. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("IP version supported only IPV4"));
  27899. + }
  27900. +
  27901. + tmpReg32 = tmpReg16 = tmpReg8 = 0;
  27902. + /*TODO - check it*/
  27903. + if (p_InsrtByTemplate->modifyOuterVlan)
  27904. + {
  27905. + if (p_InsrtByTemplate->modifyOuterVlanParams.vpri & ~0x07)
  27906. + RETURN_ERROR(MAJOR, E_INVALID_STATE,("Inconsistent parameters : user asked for VLAN modifications but VPRI more than 3 bits"));
  27907. +
  27908. + memcpy(&tmpReg16, &p_Template[VLAN_TAG_FIELD_OFFSET_FROM_ETH], 2*(sizeof(uint8_t)));
  27909. + if ((tmpReg16 != 0x9100) && (tmpReg16!= 0x9200) && (tmpReg16 != 0x8100))
  27910. + RETURN_ERROR(MAJOR, E_INVALID_STATE,("Inconsistent parameters : user asked for VLAN modifications but Tag Protocol identifier is not VLAN "));
  27911. +
  27912. + memcpy(&tmpReg8, &p_Template[14],1*(sizeof(uint8_t)));
  27913. + tmpReg8 &= 0x1f;
  27914. + tmpReg8 |= (uint8_t)(p_InsrtByTemplate->modifyOuterVlanParams.vpri << 5);
  27915. +
  27916. + p_Template[14] = tmpReg8;
  27917. + }
  27918. +
  27919. + MemCpy8(p_Manip->p_Template, p_Template, p_InsrtByTemplate->size);
  27920. +
  27921. + XX_Free(p_Template);
  27922. + }
  27923. +
  27924. + tmpReg32 = 0;
  27925. + if (p_Manip->h_Frag)
  27926. + {
  27927. + tmpRegNia |= (uint32_t)(XX_VirtToPhys(p_Manip->h_Frag) - (p_FmPcd->physicalMuramBase));
  27928. + tmpReg32 |= (uint32_t)p_Manip->sizeForFragmentation << 16;
  27929. + }
  27930. + else
  27931. + tmpReg32 = 0xffff0000;
  27932. +
  27933. + if (ipModify)
  27934. + tmpReg32 |= (uint32_t)p_InsrtByTemplate->modifyOuterIpParams.ipOuterOffset << 8;
  27935. + else
  27936. + tmpReg32 |= (uint32_t)0x0000ff00;
  27937. +
  27938. + tmpReg32 |= (uint32_t)HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER;
  27939. + *(uint32_t *)&p_Ad->pcAndOffsets = tmpReg32;
  27940. +
  27941. + tmpRegNia |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  27942. + *(uint32_t *)&p_Ad->ccAdBase = tmpRegNia;
  27943. +
  27944. + return err;
  27945. +}
  27946. +
  27947. +static t_Error CheckStatsParamsAndSetType(t_FmPcdManip *p_Manip, t_FmPcdStatsParams *p_StatsParams)
  27948. +{
  27949. +
  27950. + switch (p_StatsParams->type)
  27951. + {
  27952. + case (e_FM_PCD_STATS_PER_FLOWID):
  27953. + p_Manip->opcode = HMAN_OC_CAPWAP_INDEXED_STATS;
  27954. + p_Manip->muramAllocate = TRUE;
  27955. + break;
  27956. + default:
  27957. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported statistics type"));
  27958. + }
  27959. +
  27960. + return E_OK;
  27961. +}
  27962. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  27963. +
  27964. +static t_Error FillReassmManipParams(t_FmPcdManip *p_Manip, e_NetHeaderType hdr)
  27965. +{
  27966. + t_AdOfTypeContLookup *p_Ad;
  27967. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
  27968. + uint32_t tmpReg32;
  27969. + t_Error err = E_OK;
  27970. +
  27971. + /* Creates the Reassembly Parameters table. It contains parameters that are specific to either the IPv4 reassembly
  27972. + function or to the IPv6 reassembly function. If both IPv4 reassembly and IPv6 reassembly are required, then
  27973. + two separate IP Reassembly Parameter tables are required.*/
  27974. + if ((err = CreateReassTable(p_Manip, hdr)) != E_OK)
  27975. + RETURN_ERROR(MAJOR, err, NO_MSG);
  27976. +
  27977. + /* Sets the first Ad register (ccAdBase) - Action Descriptor Type and Pointer to the Reassembly Parameters Table offset from MURAM*/
  27978. + tmpReg32 = 0;
  27979. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  27980. +
  27981. + /* Gets the required Action descriptor table pointer */
  27982. + switch (hdr)
  27983. + {
  27984. + case HEADER_TYPE_IPv4:
  27985. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->reassmParams.ip.h_Ipv4Ad;
  27986. + tmpReg32 |= (uint32_t)(XX_VirtToPhys(
  27987. + p_Manip->reassmParams.ip.p_Ipv4ReassTbl)
  27988. + - (p_FmPcd->physicalMuramBase));
  27989. + break;
  27990. + case HEADER_TYPE_IPv6:
  27991. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->reassmParams.ip.h_Ipv6Ad;
  27992. + tmpReg32 |= (uint32_t)(XX_VirtToPhys(
  27993. + p_Manip->reassmParams.ip.p_Ipv6ReassTbl)
  27994. + - (p_FmPcd->physicalMuramBase));
  27995. + break;
  27996. + case HEADER_TYPE_CAPWAP:
  27997. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->reassmParams.capwap.h_Ad;
  27998. + tmpReg32 |= (uint32_t)(XX_VirtToPhys(
  27999. + p_Manip->reassmParams.capwap.p_ReassTbl)
  28000. + - (p_FmPcd->physicalMuramBase));
  28001. + break;
  28002. + default:
  28003. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("header type"));
  28004. + }
  28005. +
  28006. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  28007. +
  28008. + /* Sets the second Ad register (matchTblPtr) - Buffer pool ID (BPID for V2) and Scatter/Gather table offset*/
  28009. + /* mark the Scatter/Gather table offset to be set later on when the port will be known */
  28010. + p_Manip->updateParams = (NUM_OF_TASKS | NUM_OF_EXTRA_TASKS | DISCARD_MASK);
  28011. +
  28012. + if ((hdr == HEADER_TYPE_IPv6) || (hdr == HEADER_TYPE_IPv4))
  28013. + {
  28014. +#if (DPAA_VERSION == 10)
  28015. + tmpReg32 = (uint32_t)(p_Manip->reassmParams.sgBpid << 8);
  28016. + WRITE_UINT32(p_Ad->matchTblPtr, tmpReg32);
  28017. +#endif /* (DPAA_VERSION == 10) */
  28018. +#if (DPAA_VERSION >= 11)
  28019. + if (p_Manip->reassmParams.ip.nonConsistentSpFqid != 0)
  28020. + {
  28021. + tmpReg32 = FM_PCD_AD_NCSPFQIDM_MASK
  28022. + | (uint32_t)(p_Manip->reassmParams.ip.nonConsistentSpFqid);
  28023. + WRITE_UINT32(p_Ad->gmask, tmpReg32);
  28024. + }
  28025. +#endif /* (DPAA_VERSION >= 11) */
  28026. + /* Sets the third Ad register (pcAndOffsets)- IP Reassemble Operation Code*/
  28027. + tmpReg32 = 0;
  28028. + tmpReg32 |= (uint32_t)HMAN_OC_IP_REASSEMBLY;
  28029. + }
  28030. +#if (DPAA_VERSION >= 11)
  28031. + else
  28032. + if (hdr == HEADER_TYPE_CAPWAP)
  28033. + {
  28034. + tmpReg32 = 0;
  28035. + tmpReg32 |= (uint32_t)HMAN_OC_CAPWAP_REASSEMBLY;
  28036. + }
  28037. +#endif /* (DPAA_VERSION >= 11) */
  28038. +
  28039. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  28040. +
  28041. + p_Manip->reassm = TRUE;
  28042. +
  28043. + return E_OK;
  28044. +}
  28045. +
  28046. +static t_Error SetIpv4ReassmManip(t_FmPcdManip *p_Manip)
  28047. +{
  28048. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
  28049. +
  28050. + /* Allocation if IPv4 Action descriptor */
  28051. + p_Manip->reassmParams.ip.h_Ipv4Ad = (t_Handle)XX_MallocSmart(
  28052. + FM_PCD_CC_AD_ENTRY_SIZE, p_Manip->reassmParams.dataMemId,
  28053. + FM_PCD_CC_AD_TABLE_ALIGN);
  28054. + if (!p_Manip->reassmParams.ip.h_Ipv4Ad)
  28055. + {
  28056. + ReleaseManipHandler(p_Manip, p_FmPcd);
  28057. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  28058. + ("Allocation of IPv4 table descriptor"));
  28059. + }
  28060. +
  28061. + memset(p_Manip->reassmParams.ip.h_Ipv4Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  28062. +
  28063. + /* Fill reassembly manipulation parameter in the IP Reassembly Action Descriptor */
  28064. + return FillReassmManipParams(p_Manip, HEADER_TYPE_IPv4);
  28065. +}
  28066. +
  28067. +static t_Error SetIpv6ReassmManip(t_FmPcdManip *p_Manip)
  28068. +{
  28069. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
  28070. +
  28071. + /* Allocation if IPv6 Action descriptor */
  28072. + p_Manip->reassmParams.ip.h_Ipv6Ad = (t_Handle)XX_MallocSmart(
  28073. + FM_PCD_CC_AD_ENTRY_SIZE, p_Manip->reassmParams.dataMemId,
  28074. + FM_PCD_CC_AD_TABLE_ALIGN);
  28075. + if (!p_Manip->reassmParams.ip.h_Ipv6Ad)
  28076. + {
  28077. + ReleaseManipHandler(p_Manip, p_FmPcd);
  28078. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  28079. + ("Allocation of IPv6 table descriptor"));
  28080. + }
  28081. +
  28082. + memset(p_Manip->reassmParams.ip.h_Ipv6Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  28083. +
  28084. + /* Fill reassembly manipulation parameter in the IP Reassembly Action Descriptor */
  28085. + return FillReassmManipParams(p_Manip, HEADER_TYPE_IPv6);
  28086. +}
  28087. +
  28088. +static t_Error IpReassembly(t_FmPcdManipReassemParams *p_ManipReassmParams,
  28089. + t_FmPcdManip *p_Manip)
  28090. +{
  28091. + uint32_t maxSetNumber = 10000;
  28092. + t_FmPcdManipReassemIpParams reassmManipParams =
  28093. + p_ManipReassmParams->u.ipReassem;
  28094. + t_Error res;
  28095. +
  28096. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_FmPcd, E_INVALID_HANDLE);
  28097. + SANITY_CHECK_RETURN_ERROR(((t_FmPcd *)p_Manip->h_FmPcd)->h_Hc,
  28098. + E_INVALID_HANDLE);
  28099. +
  28100. + /* Check validation of user's parameter.*/
  28101. + if ((reassmManipParams.timeoutThresholdForReassmProcess < 1000)
  28102. + || (reassmManipParams.timeoutThresholdForReassmProcess > 8000000))
  28103. + RETURN_ERROR(
  28104. + MAJOR, E_INVALID_VALUE,
  28105. + ("timeoutThresholdForReassmProcess should be 1msec - 8sec"));
  28106. + /* It is recommended that the total number of entries in this table (number of sets * number of ways)
  28107. + will be twice the number of frames that are expected to be reassembled simultaneously.*/
  28108. + if (reassmManipParams.maxNumFramesInProcess
  28109. + > (reassmManipParams.maxNumFramesInProcess * maxSetNumber / 2))
  28110. + RETURN_ERROR(
  28111. + MAJOR,
  28112. + E_INVALID_VALUE,
  28113. + ("maxNumFramesInProcess has to be less than (maximun set number * number of ways / 2)"));
  28114. +
  28115. + if ((p_ManipReassmParams->hdr == HEADER_TYPE_IPv6)
  28116. + && (reassmManipParams.minFragSize[1] < 256))
  28117. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("minFragSize[1] must be >= 256"));
  28118. +
  28119. + /* Saves user's reassembly manipulation parameters */
  28120. + p_Manip->reassmParams.ip.relativeSchemeId[0] =
  28121. + reassmManipParams.relativeSchemeId[0];
  28122. + p_Manip->reassmParams.ip.relativeSchemeId[1] =
  28123. + reassmManipParams.relativeSchemeId[1];
  28124. + p_Manip->reassmParams.ip.numOfFramesPerHashEntry[0] =
  28125. + reassmManipParams.numOfFramesPerHashEntry[0];
  28126. + p_Manip->reassmParams.ip.numOfFramesPerHashEntry[1] =
  28127. + reassmManipParams.numOfFramesPerHashEntry[1];
  28128. + p_Manip->reassmParams.ip.minFragSize[0] = reassmManipParams.minFragSize[0];
  28129. + p_Manip->reassmParams.ip.minFragSize[1] = reassmManipParams.minFragSize[1];
  28130. + p_Manip->reassmParams.maxNumFramesInProcess =
  28131. + reassmManipParams.maxNumFramesInProcess;
  28132. + p_Manip->reassmParams.timeOutMode = reassmManipParams.timeOutMode;
  28133. + p_Manip->reassmParams.fqidForTimeOutFrames =
  28134. + reassmManipParams.fqidForTimeOutFrames;
  28135. + p_Manip->reassmParams.timeoutThresholdForReassmProcess =
  28136. + reassmManipParams.timeoutThresholdForReassmProcess;
  28137. + p_Manip->reassmParams.dataMemId = reassmManipParams.dataMemId;
  28138. + p_Manip->reassmParams.dataLiodnOffset = reassmManipParams.dataLiodnOffset;
  28139. +#if (DPAA_VERSION == 10)
  28140. + p_Manip->reassmParams.sgBpid = reassmManipParams.sgBpid;
  28141. +#endif /* (DPAA_VERSION == 10) */
  28142. +#if (DPAA_VERSION >= 11)
  28143. + if (reassmManipParams.nonConsistentSpFqid != 0)
  28144. + {
  28145. + p_Manip->reassmParams.ip.nonConsistentSpFqid =
  28146. + reassmManipParams.nonConsistentSpFqid;
  28147. + }
  28148. +#endif /* (DPAA_VERSION >= 11) */
  28149. +
  28150. + /* Creates and initializes the IP Reassembly common parameter table */
  28151. + CreateReassCommonTable(p_Manip);
  28152. +
  28153. + /* Creation of IPv4 reassembly manipulation */
  28154. + if ((p_Manip->reassmParams.hdr == HEADER_TYPE_IPv6)
  28155. + || (p_Manip->reassmParams.hdr == HEADER_TYPE_IPv4))
  28156. + {
  28157. + res = SetIpv4ReassmManip(p_Manip);
  28158. + if (res != E_OK)
  28159. + return res;
  28160. + }
  28161. +
  28162. + /* Creation of IPv6 reassembly manipulation */
  28163. + if (p_Manip->reassmParams.hdr == HEADER_TYPE_IPv6)
  28164. + {
  28165. + res = SetIpv6ReassmManip(p_Manip);
  28166. + if (res != E_OK)
  28167. + return res;
  28168. + }
  28169. +
  28170. + return E_OK;
  28171. +}
  28172. +
  28173. +static void setIpReassmSchemeParams(t_FmPcd* p_FmPcd,
  28174. + t_FmPcdKgSchemeParams *p_Scheme,
  28175. + t_Handle h_CcTree, bool ipv4,
  28176. + uint8_t groupId)
  28177. +{
  28178. + uint32_t j;
  28179. + uint8_t res;
  28180. +
  28181. + /* Configures scheme's network environment parameters */
  28182. + p_Scheme->netEnvParams.numOfDistinctionUnits = 2;
  28183. + if (ipv4)
  28184. + res = FmPcdNetEnvGetUnitId(
  28185. + p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
  28186. + HEADER_TYPE_IPv4, FALSE, 0);
  28187. + else
  28188. + res = FmPcdNetEnvGetUnitId(
  28189. + p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
  28190. + HEADER_TYPE_IPv6, FALSE, 0);
  28191. + ASSERT_COND(res != FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  28192. + p_Scheme->netEnvParams.unitIds[0] = res;
  28193. +
  28194. + res = FmPcdNetEnvGetUnitId(
  28195. + p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
  28196. + HEADER_TYPE_USER_DEFINED_SHIM2, FALSE, 0);
  28197. + ASSERT_COND(res != FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  28198. + p_Scheme->netEnvParams.unitIds[1] = res;
  28199. +
  28200. + /* Configures scheme's next engine parameters*/
  28201. + p_Scheme->nextEngine = e_FM_PCD_CC;
  28202. + p_Scheme->kgNextEngineParams.cc.h_CcTree = h_CcTree;
  28203. + p_Scheme->kgNextEngineParams.cc.grpId = groupId;
  28204. + p_Scheme->useHash = TRUE;
  28205. +
  28206. + /* Configures scheme's key*/
  28207. + if (ipv4 == TRUE)
  28208. + {
  28209. + p_Scheme->keyExtractAndHashParams.numOfUsedExtracts = 4;
  28210. + p_Scheme->keyExtractAndHashParams.extractArray[0].type =
  28211. + e_FM_PCD_EXTRACT_BY_HDR;
  28212. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.type =
  28213. + e_FM_PCD_EXTRACT_FULL_FIELD;
  28214. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.hdr =
  28215. + HEADER_TYPE_IPv4;
  28216. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.extractByHdrType.fullField.ipv4 =
  28217. + NET_HEADER_FIELD_IPv4_DST_IP;
  28218. + p_Scheme->keyExtractAndHashParams.extractArray[1].type =
  28219. + e_FM_PCD_EXTRACT_BY_HDR;
  28220. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.type =
  28221. + e_FM_PCD_EXTRACT_FULL_FIELD;
  28222. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.hdr =
  28223. + HEADER_TYPE_IPv4;
  28224. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.extractByHdrType.fullField.ipv4 =
  28225. + NET_HEADER_FIELD_IPv4_SRC_IP;
  28226. + p_Scheme->keyExtractAndHashParams.extractArray[2].type =
  28227. + e_FM_PCD_EXTRACT_BY_HDR;
  28228. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.type =
  28229. + e_FM_PCD_EXTRACT_FULL_FIELD;
  28230. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.hdr =
  28231. + HEADER_TYPE_IPv4;
  28232. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.extractByHdrType.fullField.ipv4 =
  28233. + NET_HEADER_FIELD_IPv4_PROTO;
  28234. + p_Scheme->keyExtractAndHashParams.extractArray[3].type =
  28235. + e_FM_PCD_EXTRACT_BY_HDR;
  28236. + p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.hdr =
  28237. + HEADER_TYPE_IPv4;
  28238. + p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.type =
  28239. + e_FM_PCD_EXTRACT_FROM_HDR;
  28240. + p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.ignoreProtocolValidation =
  28241. + FALSE;
  28242. + p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.extractByHdrType.fromHdr.size =
  28243. + 2;
  28244. + p_Scheme->keyExtractAndHashParams.extractArray[3].extractByHdr.extractByHdrType.fromHdr.offset =
  28245. + 4;
  28246. + }
  28247. + else /* IPv6 */
  28248. + {
  28249. + p_Scheme->keyExtractAndHashParams.numOfUsedExtracts = 3;
  28250. + p_Scheme->keyExtractAndHashParams.extractArray[0].type =
  28251. + e_FM_PCD_EXTRACT_BY_HDR;
  28252. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.type =
  28253. + e_FM_PCD_EXTRACT_FULL_FIELD;
  28254. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.hdr =
  28255. + HEADER_TYPE_IPv6;
  28256. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractByHdr.extractByHdrType.fullField.ipv6 =
  28257. + NET_HEADER_FIELD_IPv6_DST_IP;
  28258. + p_Scheme->keyExtractAndHashParams.extractArray[1].type =
  28259. + e_FM_PCD_EXTRACT_BY_HDR;
  28260. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.type =
  28261. + e_FM_PCD_EXTRACT_FULL_FIELD;
  28262. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.hdr =
  28263. + HEADER_TYPE_IPv6;
  28264. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractByHdr.extractByHdrType.fullField.ipv6 =
  28265. + NET_HEADER_FIELD_IPv6_SRC_IP;
  28266. + p_Scheme->keyExtractAndHashParams.extractArray[2].type =
  28267. + e_FM_PCD_EXTRACT_BY_HDR;
  28268. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.hdr =
  28269. + HEADER_TYPE_USER_DEFINED_SHIM2;
  28270. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.type =
  28271. + e_FM_PCD_EXTRACT_FROM_HDR;
  28272. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.extractByHdrType.fromHdr.size =
  28273. + 4;
  28274. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.extractByHdrType.fromHdr.offset =
  28275. + 4;
  28276. + p_Scheme->keyExtractAndHashParams.extractArray[2].extractByHdr.ignoreProtocolValidation =
  28277. + TRUE;
  28278. + }
  28279. +
  28280. + p_Scheme->keyExtractAndHashParams.privateDflt0 = 0x01020304;
  28281. + p_Scheme->keyExtractAndHashParams.privateDflt1 = 0x11121314;
  28282. + p_Scheme->keyExtractAndHashParams.numOfUsedDflts =
  28283. + FM_PCD_KG_NUM_OF_DEFAULT_GROUPS;
  28284. + for (j = 0; j < FM_PCD_KG_NUM_OF_DEFAULT_GROUPS; j++)
  28285. + {
  28286. + p_Scheme->keyExtractAndHashParams.dflts[j].type =
  28287. + (e_FmPcdKgKnownFieldsDfltTypes)j; /* all types */
  28288. + p_Scheme->keyExtractAndHashParams.dflts[j].dfltSelect =
  28289. + e_FM_PCD_KG_DFLT_GBL_0;
  28290. + }
  28291. +}
  28292. +
  28293. +static t_Error IpReassemblyStats(t_FmPcdManip *p_Manip,
  28294. + t_FmPcdManipReassemIpStats *p_Stats)
  28295. +{
  28296. + ASSERT_COND(p_Manip);
  28297. + ASSERT_COND(p_Stats);
  28298. + ASSERT_COND(p_Manip->reassmParams.p_ReassCommonTbl);
  28299. +
  28300. + p_Stats->timeout =
  28301. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalTimeOutCounter);
  28302. + p_Stats->rfdPoolBusy =
  28303. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalRfdPoolBusyCounter);
  28304. + p_Stats->internalBufferBusy =
  28305. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalInternalBufferBusy);
  28306. + p_Stats->externalBufferBusy =
  28307. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalExternalBufferBusy);
  28308. + p_Stats->sgFragments =
  28309. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalSgFragmentCounter);
  28310. + p_Stats->dmaSemaphoreDepletion =
  28311. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalDmaSemaphoreDepletionCounter);
  28312. +#if (DPAA_VERSION >= 11)
  28313. + p_Stats->nonConsistentSp =
  28314. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalNCSPCounter);
  28315. +#endif /* (DPAA_VERSION >= 11) */
  28316. +
  28317. + if (p_Manip->reassmParams.ip.p_Ipv4ReassTbl)
  28318. + {
  28319. + p_Stats->specificHdrStatistics[0].successfullyReassembled =
  28320. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalSuccessfullyReasmFramesCounter);
  28321. + p_Stats->specificHdrStatistics[0].validFragments =
  28322. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalValidFragmentCounter);
  28323. + p_Stats->specificHdrStatistics[0].processedFragments =
  28324. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalProcessedFragCounter);
  28325. + p_Stats->specificHdrStatistics[0].malformedFragments =
  28326. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalMalformdFragCounter);
  28327. + p_Stats->specificHdrStatistics[0].autoLearnBusy =
  28328. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalSetBusyCounter);
  28329. + p_Stats->specificHdrStatistics[0].discardedFragments =
  28330. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalDiscardedFragsCounter);
  28331. + p_Stats->specificHdrStatistics[0].moreThan16Fragments =
  28332. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv4ReassTbl->totalMoreThan16FramesCounter);
  28333. + }
  28334. + if (p_Manip->reassmParams.ip.p_Ipv6ReassTbl)
  28335. + {
  28336. + p_Stats->specificHdrStatistics[1].successfullyReassembled =
  28337. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalSuccessfullyReasmFramesCounter);
  28338. + p_Stats->specificHdrStatistics[1].validFragments =
  28339. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalValidFragmentCounter);
  28340. + p_Stats->specificHdrStatistics[1].processedFragments =
  28341. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalProcessedFragCounter);
  28342. + p_Stats->specificHdrStatistics[1].malformedFragments =
  28343. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalMalformdFragCounter);
  28344. + p_Stats->specificHdrStatistics[1].autoLearnBusy =
  28345. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalSetBusyCounter);
  28346. + p_Stats->specificHdrStatistics[1].discardedFragments =
  28347. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalDiscardedFragsCounter);
  28348. + p_Stats->specificHdrStatistics[1].moreThan16Fragments =
  28349. + GET_UINT32(p_Manip->reassmParams.ip.p_Ipv6ReassTbl->totalMoreThan16FramesCounter);
  28350. + }
  28351. + return E_OK;
  28352. +}
  28353. +
  28354. +static t_Error IpFragmentationStats(t_FmPcdManip *p_Manip,
  28355. + t_FmPcdManipFragIpStats *p_Stats)
  28356. +{
  28357. + t_AdOfTypeContLookup *p_Ad;
  28358. +
  28359. + ASSERT_COND(p_Manip);
  28360. + ASSERT_COND(p_Stats);
  28361. + ASSERT_COND(p_Manip->h_Ad);
  28362. + ASSERT_COND(p_Manip->fragParams.p_Frag);
  28363. +
  28364. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  28365. +
  28366. + p_Stats->totalFrames = GET_UINT32(p_Ad->gmask);
  28367. + p_Stats->fragmentedFrames = GET_UINT32(p_Manip->fragParams.p_Frag->ccAdBase)
  28368. + & 0x00ffffff;
  28369. + p_Stats->generatedFragments =
  28370. + GET_UINT32(p_Manip->fragParams.p_Frag->matchTblPtr);
  28371. +
  28372. + return E_OK;
  28373. +}
  28374. +
  28375. +static t_Error IpFragmentation(t_FmPcdManipFragIpParams *p_ManipParams,
  28376. + t_FmPcdManip *p_Manip)
  28377. +{
  28378. + uint32_t pcAndOffsetsReg = 0, ccAdBaseReg = 0, gmaskReg = 0;
  28379. + t_FmPcd *p_FmPcd;
  28380. +#if (DPAA_VERSION == 10)
  28381. + t_Error err = E_OK;
  28382. +#endif /* (DPAA_VERSION == 10) */
  28383. +
  28384. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
  28385. + SANITY_CHECK_RETURN_ERROR(p_ManipParams->sizeForFragmentation != 0xFFFF,
  28386. + E_INVALID_VALUE);
  28387. +
  28388. + p_FmPcd = p_Manip->h_FmPcd;
  28389. + /* Allocation of fragmentation Action Descriptor */
  28390. + p_Manip->fragParams.p_Frag = (t_AdOfTypeContLookup *)FM_MURAM_AllocMem(
  28391. + p_FmPcd->h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE,
  28392. + FM_PCD_CC_AD_TABLE_ALIGN);
  28393. + if (!p_Manip->fragParams.p_Frag)
  28394. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  28395. + ("MURAM alloc for Fragmentation table descriptor"));
  28396. + MemSet8(p_Manip->fragParams.p_Frag, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  28397. +
  28398. + /* Prepare the third Ad register (pcAndOffsets)- OperationCode */
  28399. + pcAndOffsetsReg = (uint32_t)HMAN_OC_IP_FRAGMENTATION;
  28400. +
  28401. + /* Prepare the first Ad register (ccAdBase) - Don't frag action and Action descriptor type*/
  28402. + ccAdBaseReg = FM_PCD_AD_CONT_LOOKUP_TYPE;
  28403. + ccAdBaseReg |= (p_ManipParams->dontFragAction
  28404. + << FM_PCD_MANIP_IP_FRAG_DF_SHIFT);
  28405. +
  28406. +
  28407. + /* Set Scatter/Gather BPid */
  28408. + if (p_ManipParams->sgBpidEn)
  28409. + {
  28410. + ccAdBaseReg |= FM_PCD_MANIP_IP_FRAG_SG_BDID_EN;
  28411. + pcAndOffsetsReg |= ((p_ManipParams->sgBpid
  28412. + << FM_PCD_MANIP_IP_FRAG_SG_BDID_SHIFT)
  28413. + & FM_PCD_MANIP_IP_FRAG_SG_BDID_MASK);
  28414. + }
  28415. +
  28416. + /* Prepare the first Ad register (gmask) - scratch buffer pool id and Pointer to fragment ID */
  28417. + gmaskReg = (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_FmPcd->ipv6FrameIdAddr))
  28418. + - p_FmPcd->physicalMuramBase);
  28419. +#if (DPAA_VERSION == 10)
  28420. + gmaskReg |= p_ManipParams->scratchBpid << FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID;
  28421. +#else
  28422. + gmaskReg |= (0xFF) << FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID;
  28423. +#endif /* (DPAA_VERSION == 10) */
  28424. +
  28425. + /* Set all Ad registers */
  28426. + WRITE_UINT32(p_Manip->fragParams.p_Frag->pcAndOffsets, pcAndOffsetsReg);
  28427. + WRITE_UINT32(p_Manip->fragParams.p_Frag->ccAdBase, ccAdBaseReg);
  28428. + WRITE_UINT32(p_Manip->fragParams.p_Frag->gmask, gmaskReg);
  28429. +
  28430. + /* Saves user's fragmentation manipulation parameters */
  28431. + p_Manip->frag = TRUE;
  28432. + p_Manip->sizeForFragmentation = p_ManipParams->sizeForFragmentation;
  28433. +
  28434. +#if (DPAA_VERSION == 10)
  28435. + p_Manip->fragParams.scratchBpid = p_ManipParams->scratchBpid;
  28436. +
  28437. + /* scratch buffer pool initialization */
  28438. + if ((err = FmPcdFragHcScratchPoolFill((t_Handle)p_FmPcd, p_ManipParams->scratchBpid)) != E_OK)
  28439. + {
  28440. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, p_Manip->fragParams.p_Frag);
  28441. + p_Manip->fragParams.p_Frag = NULL;
  28442. + RETURN_ERROR(MAJOR, err, NO_MSG);
  28443. + }
  28444. +#endif /* (DPAA_VERSION == 10) */
  28445. +
  28446. + return E_OK;
  28447. +}
  28448. +
  28449. +static t_Error IPManip(t_FmPcdManip *p_Manip)
  28450. +{
  28451. + t_Error err = E_OK;
  28452. + t_FmPcd *p_FmPcd;
  28453. + t_AdOfTypeContLookup *p_Ad;
  28454. + uint32_t tmpReg32 = 0, tmpRegNia = 0;
  28455. +
  28456. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  28457. + p_FmPcd = p_Manip->h_FmPcd;
  28458. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  28459. +
  28460. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  28461. +
  28462. + tmpReg32 = FM_PCD_MANIP_IP_NO_FRAGMENTATION;
  28463. + if (p_Manip->frag == TRUE)
  28464. + {
  28465. + tmpRegNia = (uint32_t)(XX_VirtToPhys(p_Manip->fragParams.p_Frag)
  28466. + - (p_FmPcd->physicalMuramBase));
  28467. + tmpReg32 = (uint32_t)p_Manip->sizeForFragmentation
  28468. + << FM_PCD_MANIP_IP_MTU_SHIFT;
  28469. + }
  28470. +
  28471. + tmpRegNia |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  28472. + tmpReg32 |= HMAN_OC_IP_MANIP;
  28473. +
  28474. +#if (DPAA_VERSION >= 11)
  28475. + tmpRegNia |= FM_PCD_MANIP_IP_CNIA;
  28476. +#endif /* (DPAA_VERSION >= 11) */
  28477. +
  28478. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  28479. + WRITE_UINT32(p_Ad->ccAdBase, tmpRegNia);
  28480. + WRITE_UINT32(p_Ad->gmask, 0);
  28481. + /* Total frame counter - MUST be initialized to zero.*/
  28482. +
  28483. + return err;
  28484. +}
  28485. +
  28486. +static t_Error UpdateInitIpFrag(t_Handle h_FmPcd, t_Handle h_PcdParams,
  28487. + t_Handle h_FmPort, t_FmPcdManip *p_Manip,
  28488. + t_Handle h_Ad, bool validate)
  28489. +{
  28490. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  28491. + t_Error err;
  28492. +
  28493. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  28494. + SANITY_CHECK_RETURN_ERROR((p_Manip->opcode == HMAN_OC_IP_FRAGMENTATION),
  28495. + E_INVALID_STATE);
  28496. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  28497. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  28498. +
  28499. + UNUSED(h_FmPcd);
  28500. + UNUSED(h_Ad);
  28501. + UNUSED(h_PcdParams);
  28502. + UNUSED(validate);
  28503. + UNUSED(p_Manip);
  28504. +
  28505. + fmPortGetSetCcParams.setCcParams.type = 0;
  28506. + fmPortGetSetCcParams.getCcParams.type = MANIP_EXTRA_SPACE;
  28507. + if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams)) != E_OK)
  28508. + RETURN_ERROR(MAJOR, err, NO_MSG);
  28509. +
  28510. + if (!fmPortGetSetCcParams.getCcParams.internalBufferOffset)
  28511. + DBG(WARNING, ("manipExtraSpace must be larger than '0'"));
  28512. +
  28513. + return E_OK;
  28514. +}
  28515. +
  28516. +static t_Error IPSecManip(t_FmPcdManipParams *p_ManipParams,
  28517. + t_FmPcdManip *p_Manip)
  28518. +{
  28519. + t_AdOfTypeContLookup *p_Ad;
  28520. + t_FmPcdManipSpecialOffloadIPSecParams *p_IPSecParams;
  28521. + t_Error err = E_OK;
  28522. + uint32_t tmpReg32 = 0;
  28523. + uint32_t power;
  28524. +
  28525. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  28526. + SANITY_CHECK_RETURN_ERROR(p_ManipParams, E_INVALID_HANDLE);
  28527. +
  28528. + p_IPSecParams = &p_ManipParams->u.specialOffload.u.ipsec;
  28529. +
  28530. + SANITY_CHECK_RETURN_ERROR(
  28531. + !p_IPSecParams->variableIpHdrLen || p_IPSecParams->decryption,
  28532. + E_INVALID_VALUE);
  28533. + SANITY_CHECK_RETURN_ERROR(
  28534. + !p_IPSecParams->variableIpVersion || !p_IPSecParams->decryption,
  28535. + E_INVALID_VALUE);
  28536. + SANITY_CHECK_RETURN_ERROR(
  28537. + !p_IPSecParams->variableIpVersion || p_IPSecParams->outerIPHdrLen,
  28538. + E_INVALID_VALUE);
  28539. + SANITY_CHECK_RETURN_ERROR(
  28540. + !p_IPSecParams->arwSize || p_IPSecParams->arwAddr,
  28541. + E_INVALID_VALUE);
  28542. + SANITY_CHECK_RETURN_ERROR(
  28543. + !p_IPSecParams->arwSize || p_IPSecParams->decryption,
  28544. + E_INVALID_VALUE);
  28545. + SANITY_CHECK_RETURN_ERROR((p_IPSecParams->arwSize % 16) == 0, E_INVALID_VALUE);
  28546. +
  28547. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  28548. +
  28549. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  28550. + tmpReg32 |= (p_IPSecParams->decryption) ? FM_PCD_MANIP_IPSEC_DEC : 0;
  28551. + tmpReg32 |= (p_IPSecParams->ecnCopy) ? FM_PCD_MANIP_IPSEC_ECN_EN : 0;
  28552. + tmpReg32 |= (p_IPSecParams->dscpCopy) ? FM_PCD_MANIP_IPSEC_DSCP_EN : 0;
  28553. + tmpReg32 |=
  28554. + (p_IPSecParams->variableIpHdrLen) ? FM_PCD_MANIP_IPSEC_VIPL_EN : 0;
  28555. + tmpReg32 |=
  28556. + (p_IPSecParams->variableIpVersion) ? FM_PCD_MANIP_IPSEC_VIPV_EN : 0;
  28557. + if (p_IPSecParams->arwSize)
  28558. + tmpReg32 |= (uint32_t)((XX_VirtToPhys(UINT_TO_PTR(p_IPSecParams->arwAddr))-FM_MM_MURAM)
  28559. + & (FM_MURAM_SIZE-1));
  28560. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  28561. +
  28562. + tmpReg32 = 0;
  28563. + if (p_IPSecParams->arwSize) {
  28564. + NEXT_POWER_OF_2((p_IPSecParams->arwSize + 32), power);
  28565. + LOG2(power, power);
  28566. + tmpReg32 = (p_IPSecParams->arwSize | (power - 5)) << FM_PCD_MANIP_IPSEC_ARW_SIZE_SHIFT;
  28567. + }
  28568. +
  28569. + if (p_ManipParams->h_NextManip)
  28570. + tmpReg32 |=
  28571. + (uint32_t)(XX_VirtToPhys(((t_FmPcdManip *)p_ManipParams->h_NextManip)->h_Ad)-
  28572. + (((t_FmPcd *)p_Manip->h_FmPcd)->physicalMuramBase)) >> 4;
  28573. + WRITE_UINT32(p_Ad->matchTblPtr, tmpReg32);
  28574. +
  28575. + tmpReg32 = HMAN_OC_IPSEC_MANIP;
  28576. + tmpReg32 |= p_IPSecParams->outerIPHdrLen
  28577. + << FM_PCD_MANIP_IPSEC_IP_HDR_LEN_SHIFT;
  28578. + if (p_ManipParams->h_NextManip)
  28579. + tmpReg32 |= FM_PCD_MANIP_IPSEC_NADEN;
  28580. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  28581. +
  28582. + return err;
  28583. +}
  28584. +
  28585. +static t_Error SetCapwapReassmManip(t_FmPcdManip *p_Manip)
  28586. +{
  28587. + t_FmPcd *p_FmPcd = (t_FmPcd *)p_Manip->h_FmPcd;
  28588. +
  28589. + /* Allocation if CAPWAP Action descriptor */
  28590. + p_Manip->reassmParams.capwap.h_Ad = (t_Handle)XX_MallocSmart(
  28591. + FM_PCD_CC_AD_ENTRY_SIZE, p_Manip->reassmParams.dataMemId,
  28592. + FM_PCD_CC_AD_TABLE_ALIGN);
  28593. + if (!p_Manip->reassmParams.capwap.h_Ad)
  28594. + {
  28595. + ReleaseManipHandler(p_Manip, p_FmPcd);
  28596. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  28597. + ("Allocation of CAPWAP table descriptor"));
  28598. + }
  28599. +
  28600. + memset(p_Manip->reassmParams.capwap.h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  28601. +
  28602. + /* Fill reassembly manipulation parameter in the Reassembly Action Descriptor */
  28603. + return FillReassmManipParams(p_Manip, HEADER_TYPE_CAPWAP);
  28604. +}
  28605. +
  28606. +static void setCapwapReassmSchemeParams(t_FmPcd* p_FmPcd,
  28607. + t_FmPcdKgSchemeParams *p_Scheme,
  28608. + t_Handle h_CcTree, uint8_t groupId)
  28609. +{
  28610. + uint8_t res;
  28611. +
  28612. + /* Configures scheme's network environment parameters */
  28613. + p_Scheme->netEnvParams.numOfDistinctionUnits = 1;
  28614. + res = FmPcdNetEnvGetUnitId(
  28615. + p_FmPcd, FmPcdGetNetEnvId(p_Scheme->netEnvParams.h_NetEnv),
  28616. + HEADER_TYPE_USER_DEFINED_SHIM2, FALSE, 0);
  28617. + ASSERT_COND(res != FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  28618. + p_Scheme->netEnvParams.unitIds[0] = res;
  28619. +
  28620. + /* Configures scheme's next engine parameters*/
  28621. + p_Scheme->nextEngine = e_FM_PCD_CC;
  28622. + p_Scheme->kgNextEngineParams.cc.h_CcTree = h_CcTree;
  28623. + p_Scheme->kgNextEngineParams.cc.grpId = groupId;
  28624. + p_Scheme->useHash = TRUE;
  28625. +
  28626. + /* Configures scheme's key*/
  28627. + p_Scheme->keyExtractAndHashParams.numOfUsedExtracts = 2;
  28628. + p_Scheme->keyExtractAndHashParams.extractArray[0].type =
  28629. + e_FM_PCD_EXTRACT_NON_HDR;
  28630. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.src =
  28631. + e_FM_PCD_EXTRACT_FROM_PARSE_RESULT;
  28632. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.action =
  28633. + e_FM_PCD_ACTION_NONE;
  28634. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.offset = 20;
  28635. + p_Scheme->keyExtractAndHashParams.extractArray[0].extractNonHdr.size = 4;
  28636. + p_Scheme->keyExtractAndHashParams.extractArray[1].type =
  28637. + e_FM_PCD_EXTRACT_NON_HDR;
  28638. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.src =
  28639. + e_FM_PCD_EXTRACT_FROM_DFLT_VALUE;
  28640. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.action =
  28641. + e_FM_PCD_ACTION_NONE;
  28642. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.offset = 0;
  28643. + p_Scheme->keyExtractAndHashParams.extractArray[1].extractNonHdr.size = 1;
  28644. +
  28645. + p_Scheme->keyExtractAndHashParams.privateDflt0 = 0x0;
  28646. + p_Scheme->keyExtractAndHashParams.privateDflt1 = 0x0;
  28647. + p_Scheme->keyExtractAndHashParams.numOfUsedDflts = 1;
  28648. + p_Scheme->keyExtractAndHashParams.dflts[0].type = e_FM_PCD_KG_GENERIC_NOT_FROM_DATA;
  28649. + p_Scheme->keyExtractAndHashParams.dflts[0].dfltSelect = e_FM_PCD_KG_DFLT_PRIVATE_0;
  28650. +}
  28651. +
  28652. +#if (DPAA_VERSION >= 11)
  28653. +static t_Error CapwapReassemblyStats(t_FmPcdManip *p_Manip,
  28654. + t_FmPcdManipReassemCapwapStats *p_Stats)
  28655. +{
  28656. + ASSERT_COND(p_Manip);
  28657. + ASSERT_COND(p_Stats);
  28658. + ASSERT_COND(p_Manip->reassmParams.p_ReassCommonTbl);
  28659. +
  28660. + p_Stats->timeout =
  28661. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalTimeOutCounter);
  28662. + p_Stats->rfdPoolBusy =
  28663. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalRfdPoolBusyCounter);
  28664. + p_Stats->internalBufferBusy =
  28665. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalInternalBufferBusy);
  28666. + p_Stats->externalBufferBusy =
  28667. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalExternalBufferBusy);
  28668. + p_Stats->sgFragments =
  28669. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalSgFragmentCounter);
  28670. + p_Stats->dmaSemaphoreDepletion =
  28671. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalDmaSemaphoreDepletionCounter);
  28672. + p_Stats->exceedMaxReassemblyFrameLen =
  28673. + GET_UINT32(p_Manip->reassmParams.p_ReassCommonTbl->totalNCSPCounter);
  28674. +
  28675. + p_Stats->successfullyReassembled =
  28676. + GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalSuccessfullyReasmFramesCounter);
  28677. + p_Stats->validFragments =
  28678. + GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalValidFragmentCounter);
  28679. + p_Stats->processedFragments =
  28680. + GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalProcessedFragCounter);
  28681. + p_Stats->malformedFragments =
  28682. + GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalMalformdFragCounter);
  28683. + p_Stats->autoLearnBusy =
  28684. + GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalSetBusyCounter);
  28685. + p_Stats->discardedFragments =
  28686. + GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalDiscardedFragsCounter);
  28687. + p_Stats->moreThan16Fragments =
  28688. + GET_UINT32(p_Manip->reassmParams.capwap.p_ReassTbl->totalMoreThan16FramesCounter);
  28689. +
  28690. + return E_OK;
  28691. +}
  28692. +
  28693. +static t_Error CapwapFragmentationStats(t_FmPcdManip *p_Manip,
  28694. + t_FmPcdManipFragCapwapStats *p_Stats)
  28695. +{
  28696. + t_AdOfTypeContLookup *p_Ad;
  28697. +
  28698. + ASSERT_COND(p_Manip);
  28699. + ASSERT_COND(p_Stats);
  28700. + ASSERT_COND(p_Manip->h_Ad);
  28701. + ASSERT_COND(p_Manip->fragParams.p_Frag);
  28702. +
  28703. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  28704. +
  28705. + p_Stats->totalFrames = GET_UINT32(p_Ad->gmask);
  28706. +
  28707. + return E_OK;
  28708. +}
  28709. +
  28710. +static t_Error CapwapReassembly(t_FmPcdManipReassemParams *p_ManipReassmParams,
  28711. + t_FmPcdManip *p_Manip)
  28712. +{
  28713. + uint32_t maxSetNumber = 10000;
  28714. + t_FmPcdManipReassemCapwapParams reassmManipParams =
  28715. + p_ManipReassmParams->u.capwapReassem;
  28716. + t_Error res;
  28717. +
  28718. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_FmPcd, E_INVALID_HANDLE);
  28719. + SANITY_CHECK_RETURN_ERROR(((t_FmPcd *)p_Manip->h_FmPcd)->h_Hc,
  28720. + E_INVALID_HANDLE);
  28721. +
  28722. + /* Check validation of user's parameter.*/
  28723. + if ((reassmManipParams.timeoutThresholdForReassmProcess < 1000)
  28724. + || (reassmManipParams.timeoutThresholdForReassmProcess > 8000000))
  28725. + RETURN_ERROR(
  28726. + MAJOR, E_INVALID_VALUE,
  28727. + ("timeoutThresholdForReassmProcess should be 1msec - 8sec"));
  28728. + /* It is recommended that the total number of entries in this table (number of sets * number of ways)
  28729. + will be twice the number of frames that are expected to be reassembled simultaneously.*/
  28730. + if (reassmManipParams.maxNumFramesInProcess
  28731. + > (reassmManipParams.maxNumFramesInProcess * maxSetNumber / 2))
  28732. + RETURN_ERROR(
  28733. + MAJOR,
  28734. + E_INVALID_VALUE,
  28735. + ("maxNumFramesInProcess has to be less than (maximun set number * number of ways / 2)"));
  28736. +
  28737. + /* Saves user's reassembly manipulation parameters */
  28738. + p_Manip->reassmParams.capwap.relativeSchemeId =
  28739. + reassmManipParams.relativeSchemeId;
  28740. + p_Manip->reassmParams.capwap.numOfFramesPerHashEntry =
  28741. + reassmManipParams.numOfFramesPerHashEntry;
  28742. + p_Manip->reassmParams.capwap.maxRessembledsSize =
  28743. + reassmManipParams.maxReassembledFrameLength;
  28744. + p_Manip->reassmParams.maxNumFramesInProcess =
  28745. + reassmManipParams.maxNumFramesInProcess;
  28746. + p_Manip->reassmParams.timeOutMode = reassmManipParams.timeOutMode;
  28747. + p_Manip->reassmParams.fqidForTimeOutFrames =
  28748. + reassmManipParams.fqidForTimeOutFrames;
  28749. + p_Manip->reassmParams.timeoutThresholdForReassmProcess =
  28750. + reassmManipParams.timeoutThresholdForReassmProcess;
  28751. + p_Manip->reassmParams.dataMemId = reassmManipParams.dataMemId;
  28752. + p_Manip->reassmParams.dataLiodnOffset = reassmManipParams.dataLiodnOffset;
  28753. +
  28754. + /* Creates and initializes the Reassembly common parameter table */
  28755. + CreateReassCommonTable(p_Manip);
  28756. +
  28757. + res = SetCapwapReassmManip(p_Manip);
  28758. + if (res != E_OK)
  28759. + return res;
  28760. +
  28761. + return E_OK;
  28762. +}
  28763. +
  28764. +static t_Error CapwapFragmentation(t_FmPcdManipFragCapwapParams *p_ManipParams,
  28765. + t_FmPcdManip *p_Manip)
  28766. +{
  28767. + t_FmPcd *p_FmPcd;
  28768. + t_AdOfTypeContLookup *p_Ad;
  28769. + uint32_t pcAndOffsetsReg = 0, ccAdBaseReg = 0, gmaskReg = 0;
  28770. + uint32_t tmpReg32 = 0, tmpRegNia = 0;
  28771. +
  28772. + SANITY_CHECK_RETURN_ERROR(p_Manip->h_Ad, E_INVALID_HANDLE);
  28773. + SANITY_CHECK_RETURN_ERROR(p_ManipParams->sizeForFragmentation != 0xFFFF,
  28774. + E_INVALID_VALUE);
  28775. + p_FmPcd = p_Manip->h_FmPcd;
  28776. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  28777. +
  28778. + /* Allocation of fragmentation Action Descriptor */
  28779. + p_Manip->fragParams.p_Frag = (t_AdOfTypeContLookup *)FM_MURAM_AllocMem(
  28780. + p_FmPcd->h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE,
  28781. + FM_PCD_CC_AD_TABLE_ALIGN);
  28782. + if (!p_Manip->fragParams.p_Frag)
  28783. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  28784. + ("MURAM alloc for Fragmentation table descriptor"));
  28785. + MemSet8(p_Manip->fragParams.p_Frag, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  28786. +
  28787. + /* Prepare the third Ad register (pcAndOffsets)- OperationCode */
  28788. + pcAndOffsetsReg = (uint32_t)HMAN_OC_CAPWAP_FRAGMENTATION;
  28789. +
  28790. + /* Prepare the first Ad register (ccAdBase) - Don't frag action and Action descriptor type*/
  28791. + ccAdBaseReg = FM_PCD_AD_CONT_LOOKUP_TYPE;
  28792. + ccAdBaseReg |=
  28793. + (p_ManipParams->compressModeEn) ? FM_PCD_MANIP_CAPWAP_FRAG_COMPRESS_EN :
  28794. + 0;
  28795. +
  28796. + /* Set Scatter/Gather BPid */
  28797. + if (p_ManipParams->sgBpidEn)
  28798. + {
  28799. + ccAdBaseReg |= FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_EN;
  28800. + pcAndOffsetsReg |= ((p_ManipParams->sgBpid
  28801. + << FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_SHIFT)
  28802. + & FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_MASK);
  28803. + }
  28804. +
  28805. + /* Prepare the first Ad register (gmask) - scratch buffer pool id and Pointer to fragment ID */
  28806. + gmaskReg = (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_FmPcd->capwapFrameIdAddr))
  28807. + - p_FmPcd->physicalMuramBase);
  28808. + gmaskReg |= (0xFF) << FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID;
  28809. +
  28810. + /* Set all Ad registers */
  28811. + WRITE_UINT32(p_Manip->fragParams.p_Frag->pcAndOffsets, pcAndOffsetsReg);
  28812. + WRITE_UINT32(p_Manip->fragParams.p_Frag->ccAdBase, ccAdBaseReg);
  28813. + WRITE_UINT32(p_Manip->fragParams.p_Frag->gmask, gmaskReg);
  28814. +
  28815. + /* Saves user's fragmentation manipulation parameters */
  28816. + p_Manip->frag = TRUE;
  28817. + p_Manip->sizeForFragmentation = p_ManipParams->sizeForFragmentation;
  28818. +
  28819. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  28820. +
  28821. + tmpRegNia = (uint32_t)(XX_VirtToPhys(p_Manip->fragParams.p_Frag)
  28822. + - (p_FmPcd->physicalMuramBase));
  28823. + tmpReg32 = (uint32_t)p_Manip->sizeForFragmentation
  28824. + << FM_PCD_MANIP_CAPWAP_FRAG_CHECK_MTU_SHIFT;
  28825. +
  28826. + tmpRegNia |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  28827. + tmpReg32 |= HMAN_OC_CAPWAP_FRAG_CHECK;
  28828. +
  28829. + tmpRegNia |= FM_PCD_MANIP_CAPWAP_FRAG_CHECK_CNIA;
  28830. +
  28831. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  28832. + WRITE_UINT32(p_Ad->ccAdBase, tmpRegNia);
  28833. + WRITE_UINT32(p_Ad->gmask, 0);
  28834. + /* Total frame counter - MUST be initialized to zero.*/
  28835. +
  28836. + return E_OK;
  28837. +}
  28838. +
  28839. +static t_Error UpdateInitCapwapFrag(t_Handle h_FmPcd, t_Handle h_PcdParams,
  28840. + t_Handle h_FmPort, t_FmPcdManip *p_Manip,
  28841. + t_Handle h_Ad, bool validate)
  28842. +{
  28843. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  28844. + t_Error err;
  28845. +
  28846. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  28847. + SANITY_CHECK_RETURN_ERROR((p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION),
  28848. + E_INVALID_STATE);
  28849. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  28850. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  28851. +
  28852. + UNUSED(h_FmPcd);
  28853. + UNUSED(h_Ad);
  28854. + UNUSED(h_PcdParams);
  28855. + UNUSED(validate);
  28856. + UNUSED(p_Manip);
  28857. +
  28858. + fmPortGetSetCcParams.setCcParams.type = 0;
  28859. + fmPortGetSetCcParams.getCcParams.type = MANIP_EXTRA_SPACE;
  28860. + if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams)) != E_OK)
  28861. + RETURN_ERROR(MAJOR, err, NO_MSG);
  28862. +
  28863. + if (!fmPortGetSetCcParams.getCcParams.internalBufferOffset)
  28864. + DBG(WARNING, ("manipExtraSpace must be larger than '0'"));
  28865. +
  28866. + return E_OK;
  28867. +}
  28868. +
  28869. +static t_Error CapwapManip(t_FmPcdManipParams *p_ManipParams,
  28870. + t_FmPcdManip *p_Manip)
  28871. +{
  28872. + t_AdOfTypeContLookup *p_Ad;
  28873. + t_FmPcdManipSpecialOffloadCapwapParams *p_Params;
  28874. + t_Error err = E_OK;
  28875. + uint32_t tmpReg32 = 0;
  28876. +
  28877. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  28878. + SANITY_CHECK_RETURN_ERROR(p_ManipParams, E_INVALID_HANDLE);
  28879. +
  28880. + p_Params = &p_ManipParams->u.specialOffload.u.capwap;
  28881. +
  28882. + p_Ad = (t_AdOfTypeContLookup *)p_Manip->h_Ad;
  28883. + tmpReg32 |= FM_PCD_AD_CONT_LOOKUP_TYPE;
  28884. + tmpReg32 |= (p_Params->dtls) ? FM_PCD_MANIP_CAPWAP_DTLS : 0;
  28885. + /* TODO - add 'qosSrc' */
  28886. + WRITE_UINT32(p_Ad->ccAdBase, tmpReg32);
  28887. +
  28888. + tmpReg32 = HMAN_OC_CAPWAP_MANIP;
  28889. + if (p_ManipParams->h_NextManip)
  28890. + {
  28891. + WRITE_UINT32(
  28892. + p_Ad->matchTblPtr,
  28893. + (uint32_t)(XX_VirtToPhys(((t_FmPcdManip *)p_ManipParams->h_NextManip)->h_Ad)- (((t_FmPcd *)p_Manip->h_FmPcd)->physicalMuramBase)) >> 4);
  28894. +
  28895. + tmpReg32 |= FM_PCD_MANIP_CAPWAP_NADEN;
  28896. + }
  28897. +
  28898. + WRITE_UINT32(p_Ad->pcAndOffsets, tmpReg32);
  28899. +
  28900. + return err;
  28901. +}
  28902. +#endif /* (DPAA_VERSION >= 11) */
  28903. +
  28904. +static t_Handle ManipOrStatsSetNode(t_Handle h_FmPcd, t_Handle *p_Params,
  28905. + bool stats)
  28906. +{
  28907. + t_FmPcdManip *p_Manip;
  28908. + t_Error err;
  28909. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  28910. +
  28911. + p_Manip = (t_FmPcdManip*)XX_Malloc(sizeof(t_FmPcdManip));
  28912. + if (!p_Manip)
  28913. + {
  28914. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
  28915. + return NULL;
  28916. + }
  28917. + memset(p_Manip, 0, sizeof(t_FmPcdManip));
  28918. +
  28919. + p_Manip->type = ((t_FmPcdManipParams *)p_Params)->type;
  28920. + memcpy((uint8_t*)&p_Manip->manipParams, p_Params,
  28921. + sizeof(p_Manip->manipParams));
  28922. +
  28923. + if (!stats)
  28924. + err = CheckManipParamsAndSetType(p_Manip,
  28925. + (t_FmPcdManipParams *)p_Params);
  28926. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  28927. + else
  28928. + err = CheckStatsParamsAndSetType(p_Manip, (t_FmPcdStatsParams *)p_Params);
  28929. +#else /* not (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  28930. + else
  28931. + {
  28932. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Statistics node!"));
  28933. + XX_Free(p_Manip);
  28934. + return NULL;
  28935. + }
  28936. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  28937. + if (err)
  28938. + {
  28939. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Invalid header manipulation type"));
  28940. + XX_Free(p_Manip);
  28941. + return NULL;
  28942. + }
  28943. +
  28944. + if ((p_Manip->opcode != HMAN_OC_IP_REASSEMBLY) && (p_Manip->opcode != HMAN_OC_CAPWAP_REASSEMBLY))
  28945. + {
  28946. + /* In Case of reassembly manipulation the reassembly action descriptor will
  28947. + be defines later on */
  28948. + if (p_Manip->muramAllocate)
  28949. + {
  28950. + p_Manip->h_Ad = (t_Handle)FM_MURAM_AllocMem(
  28951. + p_FmPcd->h_FmMuram, FM_PCD_CC_AD_ENTRY_SIZE,
  28952. + FM_PCD_CC_AD_TABLE_ALIGN);
  28953. + if (!p_Manip->h_Ad)
  28954. + {
  28955. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for Manipulation action descriptor"));
  28956. + ReleaseManipHandler(p_Manip, p_FmPcd);
  28957. + XX_Free(p_Manip);
  28958. + return NULL;
  28959. + }
  28960. +
  28961. + MemSet8(p_Manip->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  28962. + }
  28963. + else
  28964. + {
  28965. + p_Manip->h_Ad = (t_Handle)XX_Malloc(
  28966. + FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
  28967. + if (!p_Manip->h_Ad)
  28968. + {
  28969. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Allocation of Manipulation action descriptor"));
  28970. + ReleaseManipHandler(p_Manip, p_FmPcd);
  28971. + XX_Free(p_Manip);
  28972. + return NULL;
  28973. + }
  28974. +
  28975. + memset(p_Manip->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
  28976. + }
  28977. + }
  28978. +
  28979. + p_Manip->h_FmPcd = h_FmPcd;
  28980. +
  28981. + return p_Manip;
  28982. +}
  28983. +
  28984. +static void UpdateAdPtrOfNodesWhichPointsOnCrntMdfManip(
  28985. + t_FmPcdManip *p_CrntMdfManip, t_List *h_NodesLst)
  28986. +{
  28987. + t_CcNodeInformation *p_CcNodeInformation;
  28988. + t_FmPcdCcNode *p_NodePtrOnCurrentMdfManip = NULL;
  28989. + t_List *p_Pos;
  28990. + int i = 0;
  28991. + t_Handle p_AdTablePtOnCrntCurrentMdfNode/*, p_AdTableNewModified*/;
  28992. + t_CcNodeInformation ccNodeInfo;
  28993. +
  28994. + LIST_FOR_EACH(p_Pos, &p_CrntMdfManip->nodesLst)
  28995. + {
  28996. + p_CcNodeInformation = CC_NODE_F_OBJECT(p_Pos);
  28997. + p_NodePtrOnCurrentMdfManip =
  28998. + (t_FmPcdCcNode *)p_CcNodeInformation->h_CcNode;
  28999. +
  29000. + ASSERT_COND(p_NodePtrOnCurrentMdfManip);
  29001. +
  29002. + /* Search in the previous node which exact index points on this current modified node for getting AD */
  29003. + for (i = 0; i < p_NodePtrOnCurrentMdfManip->numOfKeys + 1; i++)
  29004. + {
  29005. + if (p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].nextEngineParams.nextEngine
  29006. + == e_FM_PCD_CC)
  29007. + {
  29008. + if (p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].nextEngineParams.h_Manip
  29009. + == (t_Handle)p_CrntMdfManip)
  29010. + {
  29011. + if (p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].p_StatsObj)
  29012. + p_AdTablePtOnCrntCurrentMdfNode =
  29013. + p_NodePtrOnCurrentMdfManip->keyAndNextEngineParams[i].p_StatsObj->h_StatsAd;
  29014. + else
  29015. + p_AdTablePtOnCrntCurrentMdfNode =
  29016. + PTR_MOVE(p_NodePtrOnCurrentMdfManip->h_AdTable, i*FM_PCD_CC_AD_ENTRY_SIZE);
  29017. +
  29018. + memset(&ccNodeInfo, 0, sizeof(t_CcNodeInformation));
  29019. + ccNodeInfo.h_CcNode = p_AdTablePtOnCrntCurrentMdfNode;
  29020. + EnqueueNodeInfoToRelevantLst(h_NodesLst, &ccNodeInfo, NULL);
  29021. + }
  29022. + }
  29023. + }
  29024. +
  29025. + ASSERT_COND(i != p_NodePtrOnCurrentMdfManip->numOfKeys);
  29026. + }
  29027. +}
  29028. +
  29029. +static void BuildHmtd(uint8_t *p_Dest, uint8_t *p_Src, uint8_t *p_Hmcd,
  29030. + t_FmPcd *p_FmPcd)
  29031. +{
  29032. + t_Error err;
  29033. +
  29034. + /* Copy the HMTD */
  29035. + MemCpy8(p_Dest, (uint8_t*)p_Src, 16);
  29036. + /* Replace the HMCT table pointer */
  29037. + WRITE_UINT32(
  29038. + ((t_Hmtd *)p_Dest)->hmcdBasePtr,
  29039. + (uint32_t)(XX_VirtToPhys(p_Hmcd) - ((t_FmPcd*)p_FmPcd)->physicalMuramBase));
  29040. + /* Call Host Command to replace HMTD by a new HMTD */
  29041. + err = FmHcPcdCcDoDynamicChange(
  29042. + p_FmPcd->h_Hc,
  29043. + (uint32_t)(XX_VirtToPhys(p_Src) - p_FmPcd->physicalMuramBase),
  29044. + (uint32_t)(XX_VirtToPhys(p_Dest) - p_FmPcd->physicalMuramBase));
  29045. + if (err)
  29046. + REPORT_ERROR(MINOR, err, ("Failed in dynamic manip change, continued to the rest of the owners."));
  29047. +}
  29048. +
  29049. +static t_Error FmPcdManipInitUpdate(t_Handle h_FmPcd, t_Handle h_PcdParams,
  29050. + t_Handle h_FmPort, t_Handle h_Manip,
  29051. + t_Handle h_Ad, bool validate, int level,
  29052. + t_Handle h_FmTree)
  29053. +{
  29054. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29055. + t_Error err = E_OK;
  29056. +
  29057. + SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
  29058. +
  29059. + UNUSED(level);
  29060. + UNUSED(h_FmTree);
  29061. +
  29062. + switch (p_Manip->opcode)
  29063. + {
  29064. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29065. + case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
  29066. + err = UpdateInitMvIntFrameHeaderFromFrameToBufferPrefix(h_FmPort,
  29067. + p_Manip,
  29068. + h_Ad,
  29069. + validate);
  29070. + break;
  29071. + case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
  29072. + if (!p_Manip->h_Frag)
  29073. + break;
  29074. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  29075. + err = UpdateInitCapwapFragmentation(h_FmPort, p_Manip, h_Ad, validate, h_FmTree);
  29076. + break;
  29077. + case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
  29078. + if (p_Manip->h_Frag)
  29079. + err = UpdateInitCapwapReasm(h_FmPcd, h_FmPort, p_Manip, h_Ad, validate);
  29080. + break;
  29081. + case (HMAN_OC_CAPWAP_INDEXED_STATS):
  29082. + err = UpdateIndxStats(h_FmPcd, h_FmPort, p_Manip);
  29083. + break;
  29084. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29085. + case (HMAN_OC_IP_REASSEMBLY):
  29086. + err = UpdateInitReasm(h_FmPcd, h_PcdParams, h_FmPort, p_Manip, h_Ad,
  29087. + validate);
  29088. + break;
  29089. + case (HMAN_OC_IP_FRAGMENTATION):
  29090. + err = UpdateInitIpFrag(h_FmPcd, h_PcdParams, h_FmPort, p_Manip,
  29091. + h_Ad, validate);
  29092. + break;
  29093. +#if (DPAA_VERSION >= 11)
  29094. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  29095. + err = UpdateInitCapwapFrag(h_FmPcd, h_PcdParams, h_FmPort, p_Manip,
  29096. + h_Ad, validate);
  29097. + break;
  29098. + case (HMAN_OC_CAPWAP_REASSEMBLY):
  29099. + err = UpdateInitReasm(h_FmPcd, h_PcdParams, h_FmPort, p_Manip, h_Ad,
  29100. + validate);
  29101. + break;
  29102. +#endif /* (DPAA_VERSION >= 11) */
  29103. + default:
  29104. + return E_OK;
  29105. + }
  29106. +
  29107. + return err;
  29108. +}
  29109. +
  29110. +static t_Error FmPcdManipModifyUpdate(t_Handle h_Manip, t_Handle h_Ad,
  29111. + bool validate, int level,
  29112. + t_Handle h_FmTree)
  29113. +{
  29114. +
  29115. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29116. + t_Error err = E_OK;
  29117. +
  29118. + UNUSED(level);
  29119. +
  29120. + switch (p_Manip->opcode)
  29121. + {
  29122. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29123. + case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
  29124. + RETURN_ERROR(
  29125. + MAJOR,
  29126. + E_INVALID_STATE,
  29127. + ("modify node with this type of manipulation is not suppported"));
  29128. + case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
  29129. +
  29130. + if (p_Manip->h_Frag)
  29131. + {
  29132. + if (!(p_Manip->shadowUpdateParams & NUM_OF_TASKS)
  29133. + && !(p_Manip->shadowUpdateParams & OFFSET_OF_DATA)
  29134. + && !(p_Manip->shadowUpdateParams & OFFSET_OF_PR))
  29135. + RETURN_ERROR(
  29136. + MAJOR,
  29137. + E_INVALID_STATE,
  29138. + ("modify node with this type of manipulation requires manipulation be updated previously in SetPcd function"));
  29139. + }
  29140. + break;
  29141. + case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
  29142. + if (p_Manip->h_Frag)
  29143. + err = UpdateModifyCapwapFragmenation(p_Manip, h_Ad, validate, h_FmTree);
  29144. + break;
  29145. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29146. + default:
  29147. + return E_OK;
  29148. + }
  29149. +
  29150. + return err;
  29151. +}
  29152. +
  29153. +/*****************************************************************************/
  29154. +/* Inter-module API routines */
  29155. +/*****************************************************************************/
  29156. +
  29157. +t_Error FmPcdManipUpdate(t_Handle h_FmPcd, t_Handle h_PcdParams,
  29158. + t_Handle h_FmPort, t_Handle h_Manip, t_Handle h_Ad,
  29159. + bool validate, int level, t_Handle h_FmTree,
  29160. + bool modify)
  29161. +{
  29162. + t_Error err;
  29163. +
  29164. + if (!modify)
  29165. + err = FmPcdManipInitUpdate(h_FmPcd, h_PcdParams, h_FmPort, h_Manip,
  29166. + h_Ad, validate, level, h_FmTree);
  29167. + else
  29168. + err = FmPcdManipModifyUpdate(h_Manip, h_Ad, validate, level, h_FmTree);
  29169. +
  29170. + return err;
  29171. +}
  29172. +
  29173. +void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add)
  29174. +{
  29175. +
  29176. + uint32_t intFlags;
  29177. +
  29178. + intFlags = XX_LockIntrSpinlock(((t_FmPcdManip *)h_Manip)->h_Spinlock);
  29179. + if (add)
  29180. + ((t_FmPcdManip *)h_Manip)->owner++;
  29181. + else
  29182. + {
  29183. + ASSERT_COND(((t_FmPcdManip *)h_Manip)->owner);
  29184. + ((t_FmPcdManip *)h_Manip)->owner--;
  29185. + }
  29186. + XX_UnlockIntrSpinlock(((t_FmPcdManip *)h_Manip)->h_Spinlock, intFlags);
  29187. +}
  29188. +
  29189. +t_List *FmPcdManipGetNodeLstPointedOnThisManip(t_Handle h_Manip)
  29190. +{
  29191. + ASSERT_COND(h_Manip);
  29192. + return &((t_FmPcdManip *)h_Manip)->nodesLst;
  29193. +}
  29194. +
  29195. +t_List *FmPcdManipGetSpinlock(t_Handle h_Manip)
  29196. +{
  29197. + ASSERT_COND(h_Manip);
  29198. + return ((t_FmPcdManip *)h_Manip)->h_Spinlock;
  29199. +}
  29200. +
  29201. +t_Error FmPcdManipCheckParamsForCcNextEngine(
  29202. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
  29203. + uint32_t *requiredAction)
  29204. +{
  29205. + t_FmPcdManip *p_Manip;
  29206. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29207. + t_Error err = E_OK;
  29208. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))*/
  29209. + bool pointFromCc = TRUE;
  29210. +
  29211. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams, E_NULL_POINTER);
  29212. + SANITY_CHECK_RETURN_ERROR(p_FmPcdCcNextEngineParams->h_Manip,
  29213. + E_NULL_POINTER);
  29214. +
  29215. + p_Manip = (t_FmPcdManip *)(p_FmPcdCcNextEngineParams->h_Manip);
  29216. + *requiredAction = 0;
  29217. +
  29218. + while (p_Manip)
  29219. + {
  29220. + switch (p_Manip->opcode)
  29221. + {
  29222. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29223. + case (HMAN_OC_CAPWAP_INDEXED_STATS):
  29224. + if (p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_DONE)
  29225. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("For this type of header manipulation has to be nextEngine e_FM_PCD_DONE"));
  29226. + if (p_FmPcdCcNextEngineParams->params.enqueueParams.overrideFqid)
  29227. + p_Manip->cnia = TRUE;
  29228. + case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
  29229. + *requiredAction = UPDATE_NIA_ENQ_WITHOUT_DMA;
  29230. + case (HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR):
  29231. + p_Manip->ownerTmp++;
  29232. + break;
  29233. + case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
  29234. + if ((p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_DONE)
  29235. + && !p_FmPcdCcNextEngineParams->params.enqueueParams.overrideFqid)
  29236. + RETURN_ERROR(
  29237. + MAJOR,
  29238. + E_INVALID_STATE,
  29239. + ("For this type of header manipulation has to be nextEngine e_FM_PCD_DONE with fqidForCtrlFlow FALSE"));
  29240. + p_Manip->ownerTmp++;
  29241. + break;
  29242. + case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
  29243. + if ((p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_CC)
  29244. + && (FmPcdCcGetParseCode(p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode)
  29245. + != CC_PC_GENERIC_IC_HASH_INDEXED))
  29246. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("For this type of header manipulation next engine has to be CC and action = e_FM_PCD_ACTION_INDEXED_LOOKUP"));
  29247. + err = UpdateManipIc(p_FmPcdCcNextEngineParams->h_Manip,
  29248. + FmPcdCcGetOffset(p_FmPcdCcNextEngineParams->params.ccParams.h_CcNode));
  29249. + if (err)
  29250. + RETURN_ERROR(MAJOR, err, NO_MSG);
  29251. + *requiredAction = UPDATE_NIA_ENQ_WITHOUT_DMA;
  29252. + break;
  29253. + #endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29254. + case (HMAN_OC_IP_FRAGMENTATION):
  29255. + case (HMAN_OC_IP_REASSEMBLY):
  29256. +#if (DPAA_VERSION >= 11)
  29257. + case (HMAN_OC_CAPWAP_REASSEMBLY):
  29258. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  29259. +#endif /* (DPAA_VERSION >= 11) */
  29260. + if (p_FmPcdCcNextEngineParams->nextEngine != e_FM_PCD_DONE)
  29261. + RETURN_ERROR(
  29262. + MAJOR,
  29263. + E_INVALID_STATE,
  29264. + ("For this type of header manipulation has to be nextEngine e_FM_PCD_DONE"));
  29265. + p_Manip->ownerTmp++;
  29266. + break;
  29267. + case (HMAN_OC_IPSEC_MANIP):
  29268. +#if (DPAA_VERSION >= 11)
  29269. + case (HMAN_OC_CAPWAP_MANIP):
  29270. +#endif /* (DPAA_VERSION >= 11) */
  29271. + p_Manip->ownerTmp++;
  29272. + break;
  29273. + case (HMAN_OC):
  29274. + if ((p_FmPcdCcNextEngineParams->nextEngine == e_FM_PCD_CC)
  29275. + && MANIP_IS_CASCADED(p_Manip))
  29276. + RETURN_ERROR(
  29277. + MINOR,
  29278. + E_INVALID_STATE,
  29279. + ("Can't have a cascaded manipulation when and Next Engine is CC"));
  29280. + if (!MANIP_IS_FIRST(p_Manip) && pointFromCc)
  29281. + RETURN_ERROR(
  29282. + MAJOR,
  29283. + E_INVALID_STATE,
  29284. + ("h_Manip is already used and may not be shared (no sharing of non-head manip nodes)"));
  29285. + break;
  29286. + default:
  29287. + RETURN_ERROR(
  29288. + MAJOR, E_INVALID_STATE,
  29289. + ("invalid type of header manipulation for this state"));
  29290. + }
  29291. + p_Manip = p_Manip->h_NextManip;
  29292. + pointFromCc = FALSE;
  29293. + }
  29294. + return E_OK;
  29295. +}
  29296. +
  29297. +
  29298. +t_Error FmPcdManipCheckParamsWithCcNodeParams(t_Handle h_Manip,
  29299. + t_Handle h_FmPcdCcNode)
  29300. +{
  29301. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29302. + t_Error err = E_OK;
  29303. +
  29304. + SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
  29305. + SANITY_CHECK_RETURN_ERROR(h_FmPcdCcNode, E_INVALID_HANDLE);
  29306. +
  29307. + switch (p_Manip->opcode)
  29308. + {
  29309. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29310. + case (HMAN_OC_CAPWAP_INDEXED_STATS):
  29311. + if (p_Manip->ownerTmp != FmPcdCcGetNumOfKeys(h_FmPcdCcNode))
  29312. + RETURN_ERROR(
  29313. + MAJOR,
  29314. + E_INVALID_VALUE,
  29315. + ("The manipulation of the type statistics flowId if exist has to be pointed by all numOfKeys"));
  29316. + break;
  29317. + case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
  29318. + if (p_Manip->h_Frag)
  29319. + {
  29320. + if (p_Manip->ownerTmp != FmPcdCcGetNumOfKeys(h_FmPcdCcNode))
  29321. + RETURN_ERROR(
  29322. + MAJOR,
  29323. + E_INVALID_VALUE,
  29324. + ("The manipulation of the type remove DTLS if exist has to be pointed by all numOfKeys"));
  29325. + err = UpdateManipIc(h_Manip, FmPcdCcGetOffset(h_FmPcdCcNode));
  29326. + if (err)
  29327. + RETURN_ERROR(MAJOR, err, NO_MSG);
  29328. + }
  29329. + break;
  29330. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29331. + default:
  29332. + break;
  29333. + }
  29334. +
  29335. + return err;
  29336. +}
  29337. +
  29338. +void FmPcdManipUpdateAdResultForCc(
  29339. + t_Handle h_Manip, t_FmPcdCcNextEngineParams *p_CcNextEngineParams,
  29340. + t_Handle p_Ad, t_Handle *p_AdNewPtr)
  29341. +{
  29342. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29343. +
  29344. + /* This routine creates a Manip AD and can return in "p_AdNewPtr"
  29345. + * either the new descriptor or NULL if it writes the Manip AD into p_AD (into the match table) */
  29346. +
  29347. + ASSERT_COND(p_Manip);
  29348. + ASSERT_COND(p_CcNextEngineParams);
  29349. + ASSERT_COND(p_Ad);
  29350. + ASSERT_COND(p_AdNewPtr);
  29351. +
  29352. + FmPcdManipUpdateOwner(h_Manip, TRUE);
  29353. +
  29354. + /* According to "type", either build & initialize a new AD (p_AdNew) or initialize
  29355. + * p_Ad ( the AD in the match table) and set p_AdNew = NULL. */
  29356. + switch (p_Manip->opcode)
  29357. + {
  29358. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29359. + case (HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR):
  29360. + case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
  29361. + case (HMAN_OC_CAPWAP_INDEXED_STATS):
  29362. + *p_AdNewPtr = p_Manip->h_Ad;
  29363. + break;
  29364. + case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
  29365. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  29366. + WRITE_UINT32(((t_AdOfTypeResult *)p_Ad)->fqid,
  29367. + ((t_AdOfTypeResult *)(p_Manip->h_Ad))->fqid);
  29368. + WRITE_UINT32(((t_AdOfTypeResult *)p_Ad)->plcrProfile,
  29369. + ((t_AdOfTypeResult *)(p_Manip->h_Ad))->plcrProfile);
  29370. + WRITE_UINT32(((t_AdOfTypeResult *)p_Ad)->nia,
  29371. + ((t_AdOfTypeResult *)(p_Manip->h_Ad))->nia);
  29372. + *p_AdNewPtr = NULL;
  29373. + break;
  29374. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29375. + case (HMAN_OC_IPSEC_MANIP):
  29376. +#if (DPAA_VERSION >= 11)
  29377. + case (HMAN_OC_CAPWAP_MANIP):
  29378. +#endif /* (DPAA_VERSION >= 11) */
  29379. + *p_AdNewPtr = p_Manip->h_Ad;
  29380. + break;
  29381. + case (HMAN_OC_IP_FRAGMENTATION):
  29382. +#if (DPAA_VERSION >= 11)
  29383. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  29384. +#endif /* (DPAA_VERSION >= 11) */
  29385. + if ((p_CcNextEngineParams->nextEngine == e_FM_PCD_DONE)
  29386. + && (!p_CcNextEngineParams->params.enqueueParams.overrideFqid))
  29387. + {
  29388. + memcpy((uint8_t *)p_Ad, (uint8_t *)p_Manip->h_Ad,
  29389. + sizeof(t_AdOfTypeContLookup));
  29390. +#if (DPAA_VERSION >= 11)
  29391. + WRITE_UINT32(
  29392. + ((t_AdOfTypeContLookup *)p_Ad)->ccAdBase,
  29393. + GET_UINT32(((t_AdOfTypeContLookup *)p_Ad)->ccAdBase) & ~FM_PCD_MANIP_IP_CNIA);
  29394. +#endif /* (DPAA_VERSION >= 11) */
  29395. + *p_AdNewPtr = NULL;
  29396. + }
  29397. + else
  29398. + *p_AdNewPtr = p_Manip->h_Ad;
  29399. + break;
  29400. + case (HMAN_OC_IP_REASSEMBLY):
  29401. + if (FmPcdManipIpReassmIsIpv6Hdr(p_Manip))
  29402. + {
  29403. + if (!p_Manip->reassmParams.ip.ipv6Assigned)
  29404. + {
  29405. + *p_AdNewPtr = p_Manip->reassmParams.ip.h_Ipv6Ad;
  29406. + p_Manip->reassmParams.ip.ipv6Assigned = TRUE;
  29407. + FmPcdManipUpdateOwner(h_Manip, FALSE);
  29408. + }
  29409. + else
  29410. + {
  29411. + *p_AdNewPtr = p_Manip->reassmParams.ip.h_Ipv4Ad;
  29412. + p_Manip->reassmParams.ip.ipv6Assigned = FALSE;
  29413. + }
  29414. + }
  29415. + else
  29416. + *p_AdNewPtr = p_Manip->reassmParams.ip.h_Ipv4Ad;
  29417. + memcpy((uint8_t *)p_Ad, (uint8_t *)*p_AdNewPtr,
  29418. + sizeof(t_AdOfTypeContLookup));
  29419. + *p_AdNewPtr = NULL;
  29420. + break;
  29421. +#if (DPAA_VERSION >= 11)
  29422. + case (HMAN_OC_CAPWAP_REASSEMBLY):
  29423. + *p_AdNewPtr = p_Manip->reassmParams.capwap.h_Ad;
  29424. + memcpy((uint8_t *)p_Ad, (uint8_t *)*p_AdNewPtr,
  29425. + sizeof(t_AdOfTypeContLookup));
  29426. + *p_AdNewPtr = NULL;
  29427. + break;
  29428. +#endif /* (DPAA_VERSION >= 11) */
  29429. + case (HMAN_OC):
  29430. + /* Allocate and initialize HMTD */
  29431. + *p_AdNewPtr = p_Manip->h_Ad;
  29432. + break;
  29433. + default:
  29434. + break;
  29435. + }
  29436. +}
  29437. +
  29438. +void FmPcdManipUpdateAdContLookupForCc(t_Handle h_Manip, t_Handle p_Ad,
  29439. + t_Handle *p_AdNewPtr,
  29440. + uint32_t adTableOffset)
  29441. +{
  29442. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29443. +
  29444. + /* This routine creates a Manip AD and can return in "p_AdNewPtr"
  29445. + * either the new descriptor or NULL if it writes the Manip AD into p_AD (into the match table) */
  29446. + ASSERT_COND(p_Manip);
  29447. +
  29448. + FmPcdManipUpdateOwner(h_Manip, TRUE);
  29449. +
  29450. + switch (p_Manip->opcode)
  29451. + {
  29452. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29453. + case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
  29454. + WRITE_UINT32(((t_AdOfTypeContLookup *)p_Ad)->ccAdBase,
  29455. + ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->ccAdBase);
  29456. + WRITE_UINT32(
  29457. + ((t_AdOfTypeContLookup *)p_Ad)->matchTblPtr,
  29458. + ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->matchTblPtr);
  29459. + WRITE_UINT32(
  29460. + ((t_AdOfTypeContLookup *)p_Ad)->pcAndOffsets,
  29461. + ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->pcAndOffsets);
  29462. + WRITE_UINT32(((t_AdOfTypeContLookup *)p_Ad)->gmask,
  29463. + ((t_AdOfTypeContLookup *)(p_Manip->h_Ad))->gmask);
  29464. + WRITE_UINT32(
  29465. + ((t_AdOfTypeContLookup *)p_Ad)->ccAdBase,
  29466. + (GET_UINT32(((t_AdOfTypeContLookup *)p_Ad)->ccAdBase) | adTableOffset));
  29467. + *p_AdNewPtr = NULL;
  29468. + break;
  29469. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29470. + case (HMAN_OC):
  29471. + /* Initialize HMTD within the match table*/
  29472. + MemSet8(p_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  29473. + /* copy the existing HMTD *//* ask Alla - memcpy??? */
  29474. + memcpy((uint8_t*)p_Ad, p_Manip->h_Ad, sizeof(t_Hmtd));
  29475. + /* update NADEN to be "1"*/
  29476. + WRITE_UINT16(
  29477. + ((t_Hmtd *)p_Ad)->cfg,
  29478. + (uint16_t)(GET_UINT16(((t_Hmtd *)p_Ad)->cfg) | HMTD_CFG_NEXT_AD_EN));
  29479. + /* update next action descriptor */
  29480. + WRITE_UINT16(((t_Hmtd *)p_Ad)->nextAdIdx,
  29481. + (uint16_t)(adTableOffset >> 4));
  29482. + /* mark that Manip's HMTD is not used */
  29483. + *p_AdNewPtr = NULL;
  29484. + break;
  29485. +
  29486. + default:
  29487. + break;
  29488. + }
  29489. +}
  29490. +
  29491. +t_Error FmPcdManipBuildIpReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv,
  29492. + t_Handle h_CcTree, t_Handle h_Manip,
  29493. + bool isIpv4, uint8_t groupId)
  29494. +{
  29495. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29496. + t_FmPcdKgSchemeParams *p_SchemeParams = NULL;
  29497. + t_Handle h_Scheme;
  29498. +
  29499. + ASSERT_COND(p_FmPcd);
  29500. + ASSERT_COND(h_NetEnv);
  29501. + ASSERT_COND(p_Manip);
  29502. +
  29503. + /* scheme was already build, no need to check for IPv6 */
  29504. + if (p_Manip->reassmParams.ip.h_Ipv4Scheme)
  29505. + return E_OK;
  29506. +
  29507. + if (isIpv4) {
  29508. + h_Scheme = FmPcdKgGetSchemeHandle(p_FmPcd, p_Manip->reassmParams.ip.relativeSchemeId[0]);
  29509. + if (h_Scheme) {
  29510. + /* scheme was found */
  29511. + p_Manip->reassmParams.ip.h_Ipv4Scheme = h_Scheme;
  29512. + return E_OK;
  29513. + }
  29514. + } else {
  29515. + h_Scheme = FmPcdKgGetSchemeHandle(p_FmPcd, p_Manip->reassmParams.ip.relativeSchemeId[1]);
  29516. + if (h_Scheme) {
  29517. + /* scheme was found */
  29518. + p_Manip->reassmParams.ip.h_Ipv6Scheme = h_Scheme;
  29519. + return E_OK;
  29520. + }
  29521. + }
  29522. +
  29523. + p_SchemeParams = XX_Malloc(sizeof(t_FmPcdKgSchemeParams));
  29524. + if (!p_SchemeParams)
  29525. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  29526. + ("Memory allocation failed for scheme"));
  29527. +
  29528. + /* Configures the IPv4 or IPv6 scheme*/
  29529. + memset(p_SchemeParams, 0, sizeof(t_FmPcdKgSchemeParams));
  29530. + p_SchemeParams->netEnvParams.h_NetEnv = h_NetEnv;
  29531. + p_SchemeParams->id.relativeSchemeId = (uint8_t)(
  29532. + (isIpv4 == TRUE) ? p_Manip->reassmParams.ip.relativeSchemeId[0] :
  29533. + p_Manip->reassmParams.ip.relativeSchemeId[1]);
  29534. + p_SchemeParams->schemeCounter.update = TRUE;
  29535. +#if (DPAA_VERSION >= 11)
  29536. + p_SchemeParams->alwaysDirect = TRUE;
  29537. + p_SchemeParams->bypassFqidGeneration = TRUE;
  29538. +#else
  29539. + p_SchemeParams->keyExtractAndHashParams.hashDistributionNumOfFqids = 1;
  29540. + p_SchemeParams->baseFqid = 0xFFFFFF; /*TODO- baseFqid*/
  29541. +#endif /* (DPAA_VERSION >= 11) */
  29542. +
  29543. + setIpReassmSchemeParams(p_FmPcd, p_SchemeParams, h_CcTree, isIpv4, groupId);
  29544. +
  29545. + /* Sets the new scheme */
  29546. + if (isIpv4)
  29547. + p_Manip->reassmParams.ip.h_Ipv4Scheme = FM_PCD_KgSchemeSet(
  29548. + p_FmPcd, p_SchemeParams);
  29549. + else
  29550. + p_Manip->reassmParams.ip.h_Ipv6Scheme = FM_PCD_KgSchemeSet(
  29551. + p_FmPcd, p_SchemeParams);
  29552. +
  29553. + XX_Free(p_SchemeParams);
  29554. +
  29555. + return E_OK;
  29556. +}
  29557. +
  29558. +t_Error FmPcdManipDeleteIpReassmSchemes(t_Handle h_Manip)
  29559. +{
  29560. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29561. +
  29562. + ASSERT_COND(p_Manip);
  29563. +
  29564. + if ((p_Manip->reassmParams.ip.h_Ipv4Scheme) &&
  29565. + !FmPcdKgIsSchemeHasOwners(p_Manip->reassmParams.ip.h_Ipv4Scheme))
  29566. + FM_PCD_KgSchemeDelete(p_Manip->reassmParams.ip.h_Ipv4Scheme);
  29567. +
  29568. + if ((p_Manip->reassmParams.ip.h_Ipv6Scheme) &&
  29569. + !FmPcdKgIsSchemeHasOwners(p_Manip->reassmParams.ip.h_Ipv6Scheme))
  29570. + FM_PCD_KgSchemeDelete(p_Manip->reassmParams.ip.h_Ipv6Scheme);
  29571. +
  29572. + return E_OK;
  29573. +}
  29574. +
  29575. +bool FmPcdManipIpReassmIsIpv6Hdr(t_Handle h_Manip)
  29576. +{
  29577. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29578. +
  29579. + ASSERT_COND(p_Manip);
  29580. +
  29581. + return (p_Manip->reassmParams.hdr == HEADER_TYPE_IPv6);
  29582. +}
  29583. +
  29584. +t_Error FmPcdManipBuildCapwapReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv,
  29585. + t_Handle h_CcTree, t_Handle h_Manip,
  29586. + uint8_t groupId)
  29587. +{
  29588. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29589. + t_FmPcdKgSchemeParams *p_SchemeParams = NULL;
  29590. +
  29591. + ASSERT_COND(p_FmPcd);
  29592. + ASSERT_COND(h_NetEnv);
  29593. + ASSERT_COND(p_Manip);
  29594. +
  29595. + /* scheme was already build, no need to check for IPv6 */
  29596. + if (p_Manip->reassmParams.capwap.h_Scheme)
  29597. + return E_OK;
  29598. +
  29599. + p_SchemeParams = XX_Malloc(sizeof(t_FmPcdKgSchemeParams));
  29600. + if (!p_SchemeParams)
  29601. + RETURN_ERROR(MAJOR, E_NO_MEMORY,
  29602. + ("Memory allocation failed for scheme"));
  29603. +
  29604. + memset(p_SchemeParams, 0, sizeof(t_FmPcdKgSchemeParams));
  29605. + p_SchemeParams->netEnvParams.h_NetEnv = h_NetEnv;
  29606. + p_SchemeParams->id.relativeSchemeId =
  29607. + (uint8_t)p_Manip->reassmParams.capwap.relativeSchemeId;
  29608. + p_SchemeParams->schemeCounter.update = TRUE;
  29609. + p_SchemeParams->bypassFqidGeneration = TRUE;
  29610. +
  29611. + setCapwapReassmSchemeParams(p_FmPcd, p_SchemeParams, h_CcTree, groupId);
  29612. +
  29613. + p_Manip->reassmParams.capwap.h_Scheme = FM_PCD_KgSchemeSet(p_FmPcd,
  29614. + p_SchemeParams);
  29615. +
  29616. + XX_Free(p_SchemeParams);
  29617. +
  29618. + return E_OK;
  29619. +}
  29620. +
  29621. +t_Error FmPcdManipDeleteCapwapReassmSchemes(t_Handle h_Manip)
  29622. +{
  29623. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29624. +
  29625. + ASSERT_COND(p_Manip);
  29626. +
  29627. + if (p_Manip->reassmParams.capwap.h_Scheme)
  29628. + FM_PCD_KgSchemeDelete(p_Manip->reassmParams.capwap.h_Scheme);
  29629. +
  29630. + return E_OK;
  29631. +}
  29632. +
  29633. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29634. +t_Handle FmPcdManipApplSpecificBuild(void)
  29635. +{
  29636. + t_FmPcdManip *p_Manip;
  29637. +
  29638. + p_Manip = (t_FmPcdManip*)XX_Malloc(sizeof(t_FmPcdManip));
  29639. + if (!p_Manip)
  29640. + {
  29641. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
  29642. + return NULL;
  29643. + }
  29644. + memset(p_Manip, 0, sizeof(t_FmPcdManip));
  29645. +
  29646. + p_Manip->opcode = HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX;
  29647. + p_Manip->muramAllocate = FALSE;
  29648. +
  29649. + p_Manip->h_Ad = (t_Handle)XX_Malloc(FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
  29650. + if (!p_Manip->h_Ad)
  29651. + {
  29652. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Allocation of Manipulation action descriptor"));
  29653. + XX_Free(p_Manip);
  29654. + return NULL;
  29655. + }
  29656. +
  29657. + memset(p_Manip->h_Ad, 0, FM_PCD_CC_AD_ENTRY_SIZE * sizeof(uint8_t));
  29658. +
  29659. + /*treatFdStatusFieldsAsErrors = TRUE hardcoded - assumption its always come after CAAM*/
  29660. + /*Application specific = type of flowId index, move internal frame header from data to IC,
  29661. + SEC errors check*/
  29662. + if (MvIntFrameHeaderFromFrameToBufferPrefix(p_Manip, TRUE)!= E_OK)
  29663. + {
  29664. + XX_Free(p_Manip->h_Ad);
  29665. + XX_Free(p_Manip);
  29666. + return NULL;
  29667. + }
  29668. + return p_Manip;
  29669. +}
  29670. +
  29671. +bool FmPcdManipIsCapwapApplSpecific(t_Handle h_Manip)
  29672. +{
  29673. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip;
  29674. + ASSERT_COND(h_Manip);
  29675. +
  29676. + return (bool)((p_Manip->opcode == HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST) ? TRUE : FALSE);
  29677. +}
  29678. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29679. +/*********************** End of inter-module routines ************************/
  29680. +
  29681. +/****************************************/
  29682. +/* API Init unit functions */
  29683. +/****************************************/
  29684. +
  29685. +t_Handle FM_PCD_ManipNodeSet(t_Handle h_FmPcd,
  29686. + t_FmPcdManipParams *p_ManipParams)
  29687. +{
  29688. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  29689. + t_FmPcdManip *p_Manip;
  29690. + t_Error err;
  29691. +
  29692. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
  29693. + SANITY_CHECK_RETURN_VALUE(p_ManipParams, E_INVALID_HANDLE, NULL);
  29694. +
  29695. + p_Manip = ManipOrStatsSetNode(h_FmPcd, (t_Handle)p_ManipParams, FALSE);
  29696. + if (!p_Manip)
  29697. + return NULL;
  29698. +
  29699. + if (((p_Manip->opcode == HMAN_OC_IP_REASSEMBLY)
  29700. + || (p_Manip->opcode == HMAN_OC_IP_FRAGMENTATION)
  29701. + || (p_Manip->opcode == HMAN_OC)
  29702. + || (p_Manip->opcode == HMAN_OC_IPSEC_MANIP)
  29703. +#if (DPAA_VERSION >= 11)
  29704. + || (p_Manip->opcode == HMAN_OC_CAPWAP_MANIP)
  29705. + || (p_Manip->opcode == HMAN_OC_CAPWAP_FRAGMENTATION)
  29706. + || (p_Manip->opcode == HMAN_OC_CAPWAP_REASSEMBLY)
  29707. +#endif /* (DPAA_VERSION >= 11) */
  29708. + ) && (!FmPcdIsAdvancedOffloadSupported(p_FmPcd)))
  29709. + {
  29710. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Advanced-offload must be enabled"));
  29711. + XX_Free(p_Manip);
  29712. + return NULL;
  29713. + }
  29714. + p_Manip->h_Spinlock = XX_InitSpinlock();
  29715. + if (!p_Manip->h_Spinlock)
  29716. + {
  29717. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
  29718. + ReleaseManipHandler(p_Manip, p_FmPcd);
  29719. + XX_Free(p_Manip);
  29720. + return NULL;
  29721. + }INIT_LIST(&p_Manip->nodesLst);
  29722. +
  29723. + switch (p_Manip->opcode)
  29724. + {
  29725. + case (HMAN_OC_IP_REASSEMBLY):
  29726. + /* IpReassembly */
  29727. + err = IpReassembly(&p_ManipParams->u.reassem, p_Manip);
  29728. + break;
  29729. + case (HMAN_OC_IP_FRAGMENTATION):
  29730. + /* IpFragmentation */
  29731. + err = IpFragmentation(&p_ManipParams->u.frag.u.ipFrag, p_Manip);
  29732. + if (err)
  29733. + break;
  29734. + err = IPManip(p_Manip);
  29735. + break;
  29736. + case (HMAN_OC_IPSEC_MANIP):
  29737. + err = IPSecManip(p_ManipParams, p_Manip);
  29738. + break;
  29739. +#if (DPAA_VERSION >= 11)
  29740. + case (HMAN_OC_CAPWAP_REASSEMBLY):
  29741. + /* CapwapReassembly */
  29742. + err = CapwapReassembly(&p_ManipParams->u.reassem, p_Manip);
  29743. + break;
  29744. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  29745. + /* CapwapFragmentation */
  29746. + err = CapwapFragmentation(&p_ManipParams->u.frag.u.capwapFrag,
  29747. + p_Manip);
  29748. + break;
  29749. + case (HMAN_OC_CAPWAP_MANIP):
  29750. + err = CapwapManip(p_ManipParams, p_Manip);
  29751. + break;
  29752. +#endif /* (DPAA_VERSION >= 11) */
  29753. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  29754. + case (HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR):
  29755. + /* HmanType1 */
  29756. + err = RmvHdrTillSpecLocNOrInsrtIntFrmHdr(&p_ManipParams->u.hdr.rmvParams, p_Manip);
  29757. + break;
  29758. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  29759. + err = CapwapFragmentation(&p_ManipParams->fragOrReasmParams.u.capwapFragParams,
  29760. + p_Manip,
  29761. + p_FmPcd,
  29762. + p_ManipParams->fragOrReasmParams.sgBpid);
  29763. + if (err)
  29764. + {
  29765. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
  29766. + ReleaseManipHandler(p_Manip, p_FmPcd);
  29767. + XX_Free(p_Manip);
  29768. + return NULL;
  29769. + }
  29770. + if (p_Manip->insrt)
  29771. + p_Manip->opcode = HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER;
  29772. + case (HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER):
  29773. + /* HmanType2 + if user asked only for fragmentation still need to allocate HmanType2 */
  29774. + err = InsrtHdrByTempl(&p_ManipParams->u.hdr.insrtParams, p_Manip, p_FmPcd);
  29775. + break;
  29776. + case (HMAN_OC_CAPWAP_REASSEMBLY):
  29777. + err = CapwapReassembly(&p_ManipParams->fragOrReasmParams.u.capwapReasmParams,
  29778. + p_Manip,
  29779. + p_FmPcd,
  29780. + p_ManipParams->fragOrReasmParams.sgBpid);
  29781. + if (err)
  29782. + {
  29783. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
  29784. + ReleaseManipHandler(p_Manip, p_FmPcd);
  29785. + XX_Free(p_Manip);
  29786. + return NULL;
  29787. + }
  29788. + if (p_Manip->rmv)
  29789. + p_Manip->opcode = HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST;
  29790. + case (HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST):
  29791. + /*CAPWAP decapsulation + if user asked only for reassembly still need to allocate CAPWAP decapsulation*/
  29792. + err = CapwapRmvDtlsHdr(p_FmPcd, p_Manip);
  29793. + break;
  29794. + case (HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX):
  29795. + /*Application Specific type 1*/
  29796. + err = MvIntFrameHeaderFromFrameToBufferPrefix(p_Manip, TRUE);
  29797. + break;
  29798. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  29799. + case (HMAN_OC):
  29800. + /* New Manip */
  29801. + err = CreateManipActionNew(p_Manip, p_ManipParams);
  29802. + break;
  29803. + default:
  29804. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED HEADER MANIPULATION TYPE"));
  29805. + ReleaseManipHandler(p_Manip, p_FmPcd);
  29806. + XX_Free(p_Manip);
  29807. + return NULL;
  29808. + }
  29809. +
  29810. + if (err)
  29811. + {
  29812. + REPORT_ERROR(MAJOR, err, NO_MSG);
  29813. + ReleaseManipHandler(p_Manip, p_FmPcd);
  29814. + XX_Free(p_Manip);
  29815. + return NULL;
  29816. + }
  29817. +
  29818. + if (p_ManipParams->h_NextManip)
  29819. + {
  29820. + /* in the check routine we've verified that h_NextManip has no owners
  29821. + * and that only supported types are allowed. */
  29822. + p_Manip->h_NextManip = p_ManipParams->h_NextManip;
  29823. + /* save a "prev" pointer in h_NextManip */
  29824. + MANIP_SET_PREV(p_Manip->h_NextManip, p_Manip);
  29825. + FmPcdManipUpdateOwner(p_Manip->h_NextManip, TRUE);
  29826. + }
  29827. +
  29828. + return p_Manip;
  29829. +}
  29830. +
  29831. +t_Error FM_PCD_ManipNodeReplace(t_Handle h_Manip,
  29832. + t_FmPcdManipParams *p_ManipParams)
  29833. +{
  29834. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_Manip, *p_FirstManip;
  29835. + t_FmPcd *p_FmPcd = (t_FmPcd *)(p_Manip->h_FmPcd);
  29836. + t_Error err;
  29837. + uint8_t *p_WholeHmct = NULL, *p_ShadowHmct = NULL, *p_Hmtd = NULL;
  29838. + t_List lstOfNodeshichPointsOnCrntMdfManip, *p_Pos;
  29839. + t_CcNodeInformation *p_CcNodeInfo;
  29840. + SANITY_CHECK_RETURN_ERROR(h_Manip, E_INVALID_HANDLE);
  29841. + SANITY_CHECK_RETURN_ERROR(p_ManipParams, E_INVALID_HANDLE);
  29842. +
  29843. + INIT_LIST(&lstOfNodeshichPointsOnCrntMdfManip);
  29844. +
  29845. + if ((p_ManipParams->type != e_FM_PCD_MANIP_HDR)
  29846. + || (p_Manip->type != e_FM_PCD_MANIP_HDR))
  29847. + RETURN_ERROR(
  29848. + MINOR,
  29849. + E_NOT_SUPPORTED,
  29850. + ("FM_PCD_ManipNodeReplace Functionality supported only for Header Manipulation."));
  29851. +
  29852. + ASSERT_COND(p_Manip->opcode == HMAN_OC);
  29853. + ASSERT_COND(p_Manip->manipParams.h_NextManip == p_Manip->h_NextManip);
  29854. + memcpy((uint8_t*)&p_Manip->manipParams, p_ManipParams,
  29855. + sizeof(p_Manip->manipParams));
  29856. + p_Manip->manipParams.h_NextManip = p_Manip->h_NextManip;
  29857. +
  29858. + /* The replacement of the HdrManip depends on the node type.*/
  29859. + /*
  29860. + * (1) If this is an independent node, all its owners should be updated.
  29861. + *
  29862. + * (2) If it is the head of a cascaded chain (it does not have a "prev" but
  29863. + * it has a "next" and it has a "cascaded" indication), the next
  29864. + * node remains unchanged, and the behavior is as in (1).
  29865. + *
  29866. + * (3) If it is not the head, but a part of a cascaded chain, in can be
  29867. + * also replaced as a regular node with just one owner.
  29868. + *
  29869. + * (4) If it is a part of a chain implemented as a unified table, the
  29870. + * whole table is replaced and the owners of the head node must be updated.
  29871. + *
  29872. + */
  29873. + /* lock shadow */
  29874. + if (!p_FmPcd->p_CcShadow)
  29875. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("CC Shadow not allocated"));
  29876. +
  29877. + if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  29878. + return ERROR_CODE(E_BUSY);
  29879. +
  29880. + /* this routine creates a new manip action in the CC Shadow. */
  29881. + err = CreateManipActionShadow(p_Manip, p_ManipParams);
  29882. + if (err)
  29883. + RETURN_ERROR(MINOR, err, NO_MSG);
  29884. +
  29885. + /* If the owners list is empty (these are NOT the "owners" counter, but pointers from CC)
  29886. + * replace only HMTD and no lcok is required. Otherwise
  29887. + * lock the whole PCD
  29888. + * In case 4 MANIP_IS_UNIFIED_NON_FIRST(p_Manip) - Use the head node instead. */
  29889. + if (!FmPcdLockTryLockAll(p_FmPcd))
  29890. + {
  29891. + DBG(TRACE, ("FmPcdLockTryLockAll failed"));
  29892. + return ERROR_CODE(E_BUSY);
  29893. + }
  29894. +
  29895. + p_ShadowHmct = (uint8_t*)PTR_MOVE(p_FmPcd->p_CcShadow, 16);
  29896. +
  29897. + p_FirstManip = (t_FmPcdManip*)GetManipInfo(p_Manip,
  29898. + e_MANIP_HANDLER_TABLE_OWNER);
  29899. + ASSERT_COND(p_FirstManip);
  29900. +
  29901. + if (!LIST_IsEmpty(&p_FirstManip->nodesLst))
  29902. + UpdateAdPtrOfNodesWhichPointsOnCrntMdfManip(
  29903. + p_FirstManip, &lstOfNodeshichPointsOnCrntMdfManip);
  29904. +
  29905. + p_Hmtd = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMTD);
  29906. + ASSERT_COND(p_Hmtd);
  29907. + BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_Hmtd, p_ShadowHmct,
  29908. + ((t_FmPcd*)(p_Manip->h_FmPcd)));
  29909. +
  29910. + LIST_FOR_EACH(p_Pos, &lstOfNodeshichPointsOnCrntMdfManip)
  29911. + {
  29912. + p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
  29913. + BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_CcNodeInfo->h_CcNode,
  29914. + p_ShadowHmct, ((t_FmPcd*)(p_Manip->h_FmPcd)));
  29915. + }
  29916. +
  29917. + p_WholeHmct = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMCT);
  29918. + ASSERT_COND(p_WholeHmct);
  29919. +
  29920. + /* re-build the HMCT n the original location */
  29921. + err = CreateManipActionBackToOrig(p_Manip, p_ManipParams);
  29922. + if (err)
  29923. + {
  29924. + RELEASE_LOCK(p_FmPcd->shadowLock);
  29925. + RETURN_ERROR(MINOR, err, NO_MSG);
  29926. + }
  29927. +
  29928. + p_Hmtd = (uint8_t *)GetManipInfo(p_Manip, e_MANIP_HMTD);
  29929. + ASSERT_COND(p_Hmtd);
  29930. + BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_Hmtd, p_WholeHmct,
  29931. + ((t_FmPcd*)p_Manip->h_FmPcd));
  29932. +
  29933. + /* If LIST > 0, create a list of p_Ad's that point to the HMCT. Join also t_HMTD to this list.
  29934. + * For each p_Hmct (from list+fixed):
  29935. + * call Host Command to replace HMTD by a new one */LIST_FOR_EACH(p_Pos, &lstOfNodeshichPointsOnCrntMdfManip)
  29936. + {
  29937. + p_CcNodeInfo = CC_NODE_F_OBJECT(p_Pos);
  29938. + BuildHmtd(p_FmPcd->p_CcShadow, (uint8_t *)p_CcNodeInfo->h_CcNode,
  29939. + p_WholeHmct, ((t_FmPcd*)(p_Manip->h_FmPcd)));
  29940. + }
  29941. +
  29942. +
  29943. + ReleaseLst(&lstOfNodeshichPointsOnCrntMdfManip);
  29944. +
  29945. + FmPcdLockUnlockAll(p_FmPcd);
  29946. +
  29947. + /* unlock shadow */
  29948. + RELEASE_LOCK(p_FmPcd->shadowLock);
  29949. +
  29950. + return E_OK;
  29951. +}
  29952. +
  29953. +t_Error FM_PCD_ManipNodeDelete(t_Handle h_ManipNode)
  29954. +{
  29955. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_ManipNode;
  29956. +
  29957. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  29958. +
  29959. + if (p_Manip->owner)
  29960. + RETURN_ERROR(
  29961. + MAJOR,
  29962. + E_INVALID_STATE,
  29963. + ("This manipulation node not be removed because this node is occupied, first - unbind this node "));
  29964. +
  29965. + if (p_Manip->h_NextManip)
  29966. + {
  29967. + MANIP_SET_PREV(p_Manip->h_NextManip, NULL);
  29968. + FmPcdManipUpdateOwner(p_Manip->h_NextManip, FALSE);
  29969. + }
  29970. +
  29971. + if (p_Manip->p_Hmct
  29972. + && (MANIP_IS_UNIFIED_FIRST(p_Manip) || !MANIP_IS_UNIFIED(p_Manip)))
  29973. + FM_MURAM_FreeMem(((t_FmPcd *)p_Manip->h_FmPcd)->h_FmMuram,
  29974. + p_Manip->p_Hmct);
  29975. +
  29976. + if (p_Manip->h_Spinlock)
  29977. + {
  29978. + XX_FreeSpinlock(p_Manip->h_Spinlock);
  29979. + p_Manip->h_Spinlock = NULL;
  29980. + }
  29981. +
  29982. + ReleaseManipHandler(p_Manip, p_Manip->h_FmPcd);
  29983. +
  29984. + XX_Free(h_ManipNode);
  29985. +
  29986. + return E_OK;
  29987. +}
  29988. +
  29989. +t_Error FM_PCD_ManipGetStatistics(t_Handle h_ManipNode,
  29990. + t_FmPcdManipStats *p_FmPcdManipStats)
  29991. +{
  29992. + t_FmPcdManip *p_Manip = (t_FmPcdManip *)h_ManipNode;
  29993. +
  29994. + SANITY_CHECK_RETURN_ERROR(p_Manip, E_INVALID_HANDLE);
  29995. + SANITY_CHECK_RETURN_ERROR(p_FmPcdManipStats, E_NULL_POINTER);
  29996. +
  29997. + switch (p_Manip->opcode)
  29998. + {
  29999. + case (HMAN_OC_IP_REASSEMBLY):
  30000. + return IpReassemblyStats(p_Manip,
  30001. + &p_FmPcdManipStats->u.reassem.u.ipReassem);
  30002. + case (HMAN_OC_IP_FRAGMENTATION):
  30003. + return IpFragmentationStats(p_Manip,
  30004. + &p_FmPcdManipStats->u.frag.u.ipFrag);
  30005. +#if (DPAA_VERSION >= 11)
  30006. + case (HMAN_OC_CAPWAP_REASSEMBLY):
  30007. + return CapwapReassemblyStats(
  30008. + p_Manip, &p_FmPcdManipStats->u.reassem.u.capwapReassem);
  30009. + case (HMAN_OC_CAPWAP_FRAGMENTATION):
  30010. + return CapwapFragmentationStats(
  30011. + p_Manip, &p_FmPcdManipStats->u.frag.u.capwapFrag);
  30012. +#endif /* (DPAA_VERSION >= 11) */
  30013. + default:
  30014. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  30015. + ("no statistics to this type of manip"));
  30016. + }
  30017. +
  30018. + return E_OK;
  30019. +}
  30020. +
  30021. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  30022. +t_Handle FM_PCD_StatisticsSetNode(t_Handle h_FmPcd, t_FmPcdStatsParams *p_StatsParams)
  30023. +{
  30024. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  30025. + t_FmPcdManip *p_Manip;
  30026. + t_Error err;
  30027. +
  30028. + SANITY_CHECK_RETURN_VALUE(h_FmPcd,E_INVALID_HANDLE,NULL);
  30029. + SANITY_CHECK_RETURN_VALUE(p_StatsParams,E_INVALID_HANDLE,NULL);
  30030. +
  30031. + p_Manip = ManipOrStatsSetNode(h_FmPcd, (t_Handle)p_StatsParams, TRUE);
  30032. + if (!p_Manip)
  30033. + return NULL;
  30034. +
  30035. + switch (p_Manip->opcode)
  30036. + {
  30037. + case (HMAN_OC_CAPWAP_INDEXED_STATS):
  30038. + /* Indexed statistics */
  30039. + err = IndxStats(p_StatsParams, p_Manip, p_FmPcd);
  30040. + break;
  30041. + default:
  30042. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("UNSUPPORTED Statistics type"));
  30043. + ReleaseManipHandler(p_Manip, p_FmPcd);
  30044. + XX_Free(p_Manip);
  30045. + return NULL;
  30046. + }
  30047. +
  30048. + if (err)
  30049. + {
  30050. + REPORT_ERROR(MAJOR, err, NO_MSG);
  30051. + ReleaseManipHandler(p_Manip, p_FmPcd);
  30052. + XX_Free(p_Manip);
  30053. + return NULL;
  30054. + }
  30055. +
  30056. + return p_Manip;
  30057. +}
  30058. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  30059. --- /dev/null
  30060. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.h
  30061. @@ -0,0 +1,555 @@
  30062. +/*
  30063. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  30064. + *
  30065. + * Redistribution and use in source and binary forms, with or without
  30066. + * modification, are permitted provided that the following conditions are met:
  30067. + * * Redistributions of source code must retain the above copyright
  30068. + * notice, this list of conditions and the following disclaimer.
  30069. + * * Redistributions in binary form must reproduce the above copyright
  30070. + * notice, this list of conditions and the following disclaimer in the
  30071. + * documentation and/or other materials provided with the distribution.
  30072. + * * Neither the name of Freescale Semiconductor nor the
  30073. + * names of its contributors may be used to endorse or promote products
  30074. + * derived from this software without specific prior written permission.
  30075. + *
  30076. + *
  30077. + * ALTERNATIVELY, this software may be distributed under the terms of the
  30078. + * GNU General Public License ("GPL") as published by the Free Software
  30079. + * Foundation, either version 2 of that License or (at your option) any
  30080. + * later version.
  30081. + *
  30082. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  30083. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  30084. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  30085. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  30086. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  30087. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30088. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30089. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30090. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  30091. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30092. + */
  30093. +
  30094. +
  30095. +/******************************************************************************
  30096. + @File fm_manip.h
  30097. +
  30098. + @Description FM PCD manip...
  30099. +*//***************************************************************************/
  30100. +#ifndef __FM_MANIP_H
  30101. +#define __FM_MANIP_H
  30102. +
  30103. +#include "std_ext.h"
  30104. +#include "error_ext.h"
  30105. +#include "list_ext.h"
  30106. +
  30107. +#include "fm_cc.h"
  30108. +
  30109. +
  30110. +/***********************************************************************/
  30111. +/* Header manipulations defines */
  30112. +/***********************************************************************/
  30113. +
  30114. +#define NUM_OF_SCRATCH_POOL_BUFFERS 1000 /*TODO - Change it!!*/
  30115. +
  30116. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  30117. +#define HMAN_OC_RMV_N_OR_INSRT_INT_FRM_HDR 0x2e
  30118. +#define HMAN_OC_INSRT_HDR_BY_TEMPL_N_OR_FRAG_AFTER 0x31
  30119. +#define HMAN_OC_MV_INT_FRAME_HDR_FROM_FRM_TO_BUFFER_PREFFIX 0x2f
  30120. +#define HMAN_OC_CAPWAP_RMV_DTLS_IF_EXIST 0x30
  30121. +#define HMAN_OC_CAPWAP_REASSEMBLY 0x11 /* dummy */
  30122. +#define HMAN_OC_CAPWAP_INDEXED_STATS 0x32 /* dummy */
  30123. +#define HMAN_OC_CAPWAP_FRAGMENTATION 0x33
  30124. +#else
  30125. +#define HMAN_OC_CAPWAP_MANIP 0x2F
  30126. +#define HMAN_OC_CAPWAP_FRAG_CHECK 0x2E
  30127. +#define HMAN_OC_CAPWAP_FRAGMENTATION 0x33
  30128. +#define HMAN_OC_CAPWAP_REASSEMBLY 0x30
  30129. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  30130. +#define HMAN_OC_IP_MANIP 0x34
  30131. +#define HMAN_OC_IP_FRAGMENTATION 0x74
  30132. +#define HMAN_OC_IP_REASSEMBLY 0xB4
  30133. +#define HMAN_OC_IPSEC_MANIP 0xF4
  30134. +#define HMAN_OC 0x35
  30135. +
  30136. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  30137. +#define HMAN_RMV_HDR 0x80000000
  30138. +#define HMAN_INSRT_INT_FRM_HDR 0x40000000
  30139. +
  30140. +#define UDP_CHECKSUM_FIELD_OFFSET_FROM_UDP 6
  30141. +#define UDP_CHECKSUM_FIELD_SIZE 2
  30142. +#define UDP_LENGTH_FIELD_OFFSET_FROM_UDP 4
  30143. +
  30144. +#define IPv4_DSCECN_FIELD_OFFSET_FROM_IP 1
  30145. +#define IPv4_TOTALLENGTH_FIELD_OFFSET_FROM_IP 2
  30146. +#define IPv4_HDRCHECKSUM_FIELD_OFFSET_FROM_IP 10
  30147. +#define VLAN_TAG_FIELD_OFFSET_FROM_ETH 12
  30148. +#define IPv4_ID_FIELD_OFFSET_FROM_IP 4
  30149. +
  30150. +#define IPv6_PAYLOAD_LENGTH_OFFSET_FROM_IP 4
  30151. +#define IPv6_NEXT_HEADER_OFFSET_FROM_IP 6
  30152. +
  30153. +#define FM_PCD_MANIP_CAPWAP_REASM_TABLE_SIZE 0x80
  30154. +#define FM_PCD_MANIP_CAPWAP_REASM_TABLE_ALIGN 8
  30155. +#define FM_PCD_MANIP_CAPWAP_REASM_RFD_SIZE 32
  30156. +#define FM_PCD_MANIP_CAPWAP_REASM_AUTO_LEARNING_HASH_ENTRY_SIZE 4
  30157. +#define FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_ENTRY_SIZE 8
  30158. +
  30159. +
  30160. +#define FM_PCD_MANIP_CAPWAP_REASM_TIME_OUT_BETWEEN_FRAMES 0x40000000
  30161. +#define FM_PCD_MANIP_CAPWAP_REASM_HALT_ON_DUPLICATE_FRAG 0x10000000
  30162. +#define FM_PCD_MANIP_CAPWAP_REASM_AUTOMATIC_LEARNIN_HASH_8_WAYS 0x08000000
  30163. +#define FM_PCD_MANIP_CAPWAP_REASM_PR_COPY 0x00800000
  30164. +
  30165. +#define FM_PCD_MANIP_CAPWAP_FRAG_COMPR_OPTION_FIELD_EN 0x80000000
  30166. +
  30167. +#define FM_PCD_MANIP_INDEXED_STATS_ENTRY_SIZE 4
  30168. +#define FM_PCD_MANIP_INDEXED_STATS_CNIA 0x20000000
  30169. +#define FM_PCD_MANIP_INDEXED_STATS_DPD 0x10000000
  30170. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  30171. +
  30172. +#if (DPAA_VERSION >= 11)
  30173. +#define FM_PCD_MANIP_CAPWAP_DTLS 0x00040000
  30174. +#define FM_PCD_MANIP_CAPWAP_NADEN 0x20000000
  30175. +
  30176. +#define FM_PCD_MANIP_CAPWAP_FRAG_CHECK_MTU_SHIFT 16
  30177. +#define FM_PCD_MANIP_CAPWAP_FRAG_CHECK_NO_FRAGMENTATION 0xFFFF0000
  30178. +#define FM_PCD_MANIP_CAPWAP_FRAG_CHECK_CNIA 0x20000000
  30179. +
  30180. +#define FM_PCD_MANIP_CAPWAP_FRAG_COMPRESS_EN 0x04000000
  30181. +#define FM_PCD_MANIP_CAPWAP_FRAG_SCRATCH_BPID 24
  30182. +#define FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_EN 0x08000000
  30183. +#define FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_MASK 0xFF000000
  30184. +#define FM_PCD_MANIP_CAPWAP_FRAG_SG_BDID_SHIFT 24
  30185. +#endif /* (DPAA_VERSION >= 11) */
  30186. +
  30187. +#define FM_PCD_MANIP_REASM_TABLE_SIZE 0x40
  30188. +#define FM_PCD_MANIP_REASM_TABLE_ALIGN 8
  30189. +
  30190. +#define FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_SIZE 64
  30191. +#define FM_PCD_MANIP_REASM_COMMON_PARAM_TABLE_ALIGN 8
  30192. +#define FM_PCD_MANIP_REASM_TIME_OUT_BETWEEN_FRAMES 0x80000000
  30193. +#define FM_PCD_MANIP_REASM_COUPLING_ENABLE 0x40000000
  30194. +#define FM_PCD_MANIP_REASM_COUPLING_MASK 0xFF000000
  30195. +#define FM_PCD_MANIP_REASM_COUPLING_SHIFT 24
  30196. +#define FM_PCD_MANIP_REASM_LIODN_MASK 0x0000003F
  30197. +#define FM_PCD_MANIP_REASM_LIODN_SHIFT 56
  30198. +#define FM_PCD_MANIP_REASM_ELIODN_MASK 0x000003c0
  30199. +#define FM_PCD_MANIP_REASM_ELIODN_SHIFT 38
  30200. +#define FM_PCD_MANIP_REASM_COMMON_INT_BUFFER_IDX_MASK 0x000000FF
  30201. +#define FM_PCD_MANIP_REASM_COMMON_INT_BUFFER_IDX_SHIFT 24
  30202. +#define FM_PCD_MANIP_REASM_TIMEOUT_THREAD_THRESH 1024
  30203. +
  30204. +#define FM_PCD_MANIP_IP_MTU_SHIFT 16
  30205. +#define FM_PCD_MANIP_IP_NO_FRAGMENTATION 0xFFFF0000
  30206. +#define FM_PCD_MANIP_IP_CNIA 0x20000000
  30207. +
  30208. +#define FM_PCD_MANIP_IP_FRAG_DF_SHIFT 28
  30209. +#define FM_PCD_MANIP_IP_FRAG_SCRATCH_BPID 24
  30210. +#define FM_PCD_MANIP_IP_FRAG_SG_BDID_EN 0x08000000
  30211. +#define FM_PCD_MANIP_IP_FRAG_SG_BDID_MASK 0xFF000000
  30212. +#define FM_PCD_MANIP_IP_FRAG_SG_BDID_SHIFT 24
  30213. +
  30214. +#define FM_PCD_MANIP_IPSEC_DEC 0x10000000
  30215. +#define FM_PCD_MANIP_IPSEC_VIPV_EN 0x08000000
  30216. +#define FM_PCD_MANIP_IPSEC_ECN_EN 0x04000000
  30217. +#define FM_PCD_MANIP_IPSEC_DSCP_EN 0x02000000
  30218. +#define FM_PCD_MANIP_IPSEC_VIPL_EN 0x01000000
  30219. +#define FM_PCD_MANIP_IPSEC_NADEN 0x20000000
  30220. +
  30221. +#define FM_PCD_MANIP_IPSEC_IP_HDR_LEN_MASK 0x00FF0000
  30222. +#define FM_PCD_MANIP_IPSEC_IP_HDR_LEN_SHIFT 16
  30223. +
  30224. +#define FM_PCD_MANIP_IPSEC_ARW_SIZE_MASK 0xFFFF0000
  30225. +#define FM_PCD_MANIP_IPSEC_ARW_SIZE_SHIFT 16
  30226. +
  30227. +#define e_FM_MANIP_IP_INDX 1
  30228. +
  30229. +#define HMCD_OPCODE_GENERIC_RMV 0x01
  30230. +#define HMCD_OPCODE_GENERIC_INSRT 0x02
  30231. +#define HMCD_OPCODE_GENERIC_REPLACE 0x05
  30232. +#define HMCD_OPCODE_L2_RMV 0x08
  30233. +#define HMCD_OPCODE_L2_INSRT 0x09
  30234. +#define HMCD_OPCODE_VLAN_PRI_UPDATE 0x0B
  30235. +#define HMCD_OPCODE_IPV4_UPDATE 0x0C
  30236. +#define HMCD_OPCODE_IPV6_UPDATE 0x10
  30237. +#define HMCD_OPCODE_TCP_UDP_UPDATE 0x0E
  30238. +#define HMCD_OPCODE_TCP_UDP_CHECKSUM 0x14
  30239. +#define HMCD_OPCODE_REPLACE_IP 0x12
  30240. +#define HMCD_OPCODE_RMV_TILL 0x15
  30241. +#define HMCD_OPCODE_UDP_INSRT 0x16
  30242. +#define HMCD_OPCODE_IP_INSRT 0x17
  30243. +#define HMCD_OPCODE_CAPWAP_RMV 0x18
  30244. +#define HMCD_OPCODE_CAPWAP_INSRT 0x18
  30245. +#define HMCD_OPCODE_GEN_FIELD_REPLACE 0x19
  30246. +
  30247. +#define HMCD_LAST 0x00800000
  30248. +
  30249. +#define HMCD_DSCP_VALUES 64
  30250. +
  30251. +#define HMCD_BASIC_SIZE 4
  30252. +#define HMCD_PTR_SIZE 4
  30253. +#define HMCD_PARAM_SIZE 4
  30254. +#define HMCD_IPV4_ADDR_SIZE 4
  30255. +#define HMCD_IPV6_ADDR_SIZE 0x10
  30256. +#define HMCD_L4_HDR_SIZE 8
  30257. +
  30258. +#define HMCD_CAPWAP_INSRT 0x00010000
  30259. +#define HMCD_INSRT_UDP_LITE 0x00010000
  30260. +#define HMCD_IP_ID_MASK 0x0000FFFF
  30261. +#define HMCD_IP_SIZE_MASK 0x0000FF00
  30262. +#define HMCD_IP_SIZE_SHIFT 8
  30263. +#define HMCD_IP_LAST_PID_MASK 0x000000FF
  30264. +#define HMCD_IP_OR_QOS 0x00010000
  30265. +#define HMCD_IP_L4_CS_CALC 0x00040000
  30266. +#define HMCD_IP_DF_MODE 0x00400000
  30267. +
  30268. +
  30269. +#define HMCD_OC_SHIFT 24
  30270. +
  30271. +#define HMCD_RMV_OFFSET_SHIFT 0
  30272. +#define HMCD_RMV_SIZE_SHIFT 8
  30273. +
  30274. +#define HMCD_INSRT_OFFSET_SHIFT 0
  30275. +#define HMCD_INSRT_SIZE_SHIFT 8
  30276. +
  30277. +#define HMTD_CFG_TYPE 0x4000
  30278. +#define HMTD_CFG_EXT_HMCT 0x0080
  30279. +#define HMTD_CFG_PRS_AFTER_HM 0x0040
  30280. +#define HMTD_CFG_NEXT_AD_EN 0x0020
  30281. +
  30282. +#define HMCD_RMV_L2_ETHERNET 0
  30283. +#define HMCD_RMV_L2_STACKED_QTAGS 1
  30284. +#define HMCD_RMV_L2_ETHERNET_AND_MPLS 2
  30285. +#define HMCD_RMV_L2_MPLS 3
  30286. +#define HMCD_RMV_L2_PPPOE 4
  30287. +
  30288. +#define HMCD_INSRT_L2_MPLS 0
  30289. +#define HMCD_INSRT_N_UPDATE_L2_MPLS 1
  30290. +#define HMCD_INSRT_L2_PPPOE 2
  30291. +#define HMCD_INSRT_L2_SIZE_SHIFT 24
  30292. +
  30293. +#define HMCD_L2_MODE_SHIFT 16
  30294. +
  30295. +#define HMCD_VLAN_PRI_REP_MODE_SHIFT 16
  30296. +#define HMCD_VLAN_PRI_UPDATE 0
  30297. +#define HMCD_VLAN_PRI_UPDATE_DSCP_TO_VPRI 1
  30298. +
  30299. +#define HMCD_IPV4_UPDATE_TTL 0x00000001
  30300. +#define HMCD_IPV4_UPDATE_TOS 0x00000002
  30301. +#define HMCD_IPV4_UPDATE_DST 0x00000020
  30302. +#define HMCD_IPV4_UPDATE_SRC 0x00000040
  30303. +#define HMCD_IPV4_UPDATE_ID 0x00000080
  30304. +#define HMCD_IPV4_UPDATE_TOS_SHIFT 8
  30305. +
  30306. +#define HMCD_IPV6_UPDATE_HL 0x00000001
  30307. +#define HMCD_IPV6_UPDATE_TC 0x00000002
  30308. +#define HMCD_IPV6_UPDATE_DST 0x00000040
  30309. +#define HMCD_IPV6_UPDATE_SRC 0x00000080
  30310. +#define HMCD_IPV6_UPDATE_TC_SHIFT 8
  30311. +
  30312. +#define HMCD_TCP_UDP_UPDATE_DST 0x00004000
  30313. +#define HMCD_TCP_UDP_UPDATE_SRC 0x00008000
  30314. +#define HMCD_TCP_UDP_UPDATE_SRC_SHIFT 16
  30315. +
  30316. +#define HMCD_IP_REPLACE_REPLACE_IPV4 0x00000000
  30317. +#define HMCD_IP_REPLACE_REPLACE_IPV6 0x00010000
  30318. +#define HMCD_IP_REPLACE_TTL_HL 0x00200000
  30319. +#define HMCD_IP_REPLACE_ID 0x00400000
  30320. +
  30321. +#define HMCD_IP_REPLACE_L3HDRSIZE_SHIFT 24
  30322. +
  30323. +#define HMCD_GEN_FIELD_SIZE_SHIFT 16
  30324. +#define HMCD_GEN_FIELD_SRC_OFF_SHIFT 8
  30325. +#define HMCD_GEN_FIELD_DST_OFF_SHIFT 0
  30326. +#define HMCD_GEN_FIELD_MASK_EN 0x00400000
  30327. +
  30328. +#define HMCD_GEN_FIELD_MASK_OFF_SHIFT 16
  30329. +#define HMCD_GEN_FIELD_MASK_SHIFT 24
  30330. +
  30331. +#define DSCP_TO_VLAN_TABLE_SIZE 32
  30332. +
  30333. +#define MANIP_GET_HMCT_SIZE(h_Manip) (((t_FmPcdManip *)h_Manip)->tableSize)
  30334. +#define MANIP_GET_DATA_SIZE(h_Manip) (((t_FmPcdManip *)h_Manip)->dataSize)
  30335. +
  30336. +#define MANIP_GET_HMCT_PTR(h_Manip) (((t_FmPcdManip *)h_Manip)->p_Hmct)
  30337. +#define MANIP_GET_DATA_PTR(h_Manip) (((t_FmPcdManip *)h_Manip)->p_Data)
  30338. +
  30339. +#define MANIP_SET_HMCT_PTR(h_Manip, h_NewPtr) (((t_FmPcdManip *)h_Manip)->p_Hmct = h_NewPtr)
  30340. +#define MANIP_SET_DATA_PTR(h_Manip, h_NewPtr) (((t_FmPcdManip *)h_Manip)->p_Data = h_NewPtr)
  30341. +
  30342. +#define MANIP_GET_HMTD_PTR(h_Manip) (((t_FmPcdManip *)h_Manip)->h_Ad)
  30343. +#define MANIP_DONT_REPARSE(h_Manip) (((t_FmPcdManip *)h_Manip)->dontParseAfterManip)
  30344. +#define MANIP_SET_PREV(h_Manip, h_Prev) (((t_FmPcdManip *)h_Manip)->h_PrevManip = h_Prev)
  30345. +#define MANIP_GET_OWNERS(h_Manip) (((t_FmPcdManip *)h_Manip)->owner)
  30346. +#define MANIP_GET_TYPE(h_Manip) (((t_FmPcdManip *)h_Manip)->type)
  30347. +#define MANIP_SET_UNIFIED_TBL_PTR_INDICATION(h_Manip) (((t_FmPcdManip *)h_Manip)->unifiedTablePtr = TRUE)
  30348. +#define MANIP_GET_MURAM(h_Manip) (((t_FmPcd *)((t_FmPcdManip *)h_Manip)->h_FmPcd)->h_FmMuram)
  30349. +#define MANIP_FREE_HMTD(h_Manip) \
  30350. + {if (((t_FmPcdManip *)h_Manip)->muramAllocate) \
  30351. + FM_MURAM_FreeMem(((t_FmPcd *)((t_FmPcdManip *)h_Manip)->h_FmPcd)->h_FmMuram, ((t_FmPcdManip *)h_Manip)->h_Ad);\
  30352. + else \
  30353. + XX_Free(((t_FmPcdManip *)h_Manip)->h_Ad); \
  30354. + ((t_FmPcdManip *)h_Manip)->h_Ad = NULL; \
  30355. + }
  30356. +/* position regarding Manip SW structure */
  30357. +#define MANIP_IS_FIRST(h_Manip) (!(((t_FmPcdManip *)h_Manip)->h_PrevManip))
  30358. +#define MANIP_IS_CASCADED(h_Manip) (((t_FmPcdManip *)h_Manip)->cascaded)
  30359. +#define MANIP_IS_UNIFIED(h_Manip) (!(((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_NONE))
  30360. +#define MANIP_IS_UNIFIED_NON_FIRST(h_Manip) ((((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_MID) || \
  30361. + (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_LAST))
  30362. +#define MANIP_IS_UNIFIED_NON_LAST(h_Manip) ((((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_FIRST) ||\
  30363. + (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_MID))
  30364. +#define MANIP_IS_UNIFIED_FIRST(h_Manip) (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_FIRST)
  30365. +#define MANIP_IS_UNIFIED_LAST(h_Manip) (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_LAST)
  30366. +
  30367. +#define MANIP_UPDATE_UNIFIED_POSITION(h_Manip) (((t_FmPcdManip *)h_Manip)->unifiedPosition = \
  30368. + (((t_FmPcdManip *)h_Manip)->unifiedPosition == e_MANIP_UNIFIED_NONE)? \
  30369. + e_MANIP_UNIFIED_LAST : e_MANIP_UNIFIED_MID)
  30370. +
  30371. +typedef enum e_ManipUnifiedPosition {
  30372. + e_MANIP_UNIFIED_NONE = 0,
  30373. + e_MANIP_UNIFIED_FIRST,
  30374. + e_MANIP_UNIFIED_MID,
  30375. + e_MANIP_UNIFIED_LAST
  30376. +} e_ManipUnifiedPosition;
  30377. +
  30378. +typedef enum e_ManipInfo {
  30379. + e_MANIP_HMTD,
  30380. + e_MANIP_HMCT,
  30381. + e_MANIP_HANDLER_TABLE_OWNER
  30382. +}e_ManipInfo;
  30383. +/***********************************************************************/
  30384. +/* Memory map */
  30385. +/***********************************************************************/
  30386. +#if defined(__MWERKS__) && !defined(__GNUC__)
  30387. +#pragma pack(push,1)
  30388. +#endif /* defined(__MWERKS__) && ... */
  30389. +
  30390. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  30391. +typedef struct t_CapwapReasmPram {
  30392. + volatile uint32_t mode;
  30393. + volatile uint32_t autoLearnHashTblPtr;
  30394. + volatile uint32_t intStatsTblPtr;
  30395. + volatile uint32_t reasmFrmDescPoolTblPtr;
  30396. + volatile uint32_t reasmFrmDescIndexPoolTblPtr;
  30397. + volatile uint32_t timeOutTblPtr;
  30398. + volatile uint32_t bufferPoolIdAndRisc1SetIndexes;
  30399. + volatile uint32_t risc23SetIndexes;
  30400. + volatile uint32_t risc4SetIndexesAndExtendedStatsTblPtr;
  30401. + volatile uint32_t extendedStatsTblPtr;
  30402. + volatile uint32_t expirationDelay;
  30403. + volatile uint32_t totalProcessedFragCounter;
  30404. + volatile uint32_t totalUnsuccessfulReasmFramesCounter;
  30405. + volatile uint32_t totalDuplicatedFragCounter;
  30406. + volatile uint32_t totalMalformdFragCounter;
  30407. + volatile uint32_t totalTimeOutCounter;
  30408. + volatile uint32_t totalSetBusyCounter;
  30409. + volatile uint32_t totalRfdPoolBusyCounter;
  30410. + volatile uint32_t totalDiscardedFragsCounter;
  30411. + volatile uint32_t totalMoreThan16FramesCounter;
  30412. + volatile uint32_t internalBufferBusy;
  30413. + volatile uint32_t externalBufferBusy;
  30414. + volatile uint32_t reserved1[4];
  30415. +} t_CapwapReasmPram;
  30416. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  30417. +
  30418. +typedef _Packed struct t_ReassTbl {
  30419. + volatile uint16_t waysNumAndSetSize;
  30420. + volatile uint16_t autoLearnHashKeyMask;
  30421. + volatile uint32_t reassCommonPrmTblPtr;
  30422. + volatile uint32_t liodnAlAndAutoLearnHashTblPtrHi;
  30423. + volatile uint32_t autoLearnHashTblPtrLow;
  30424. + volatile uint32_t liodnSlAndAutoLearnSetLockTblPtrHi;
  30425. + volatile uint32_t autoLearnSetLockTblPtrLow;
  30426. + volatile uint16_t minFragSize; /* Not relevant for CAPWAP*/
  30427. + volatile uint16_t maxReassemblySize; /* Only relevant for CAPWAP*/
  30428. + volatile uint32_t totalSuccessfullyReasmFramesCounter;
  30429. + volatile uint32_t totalValidFragmentCounter;
  30430. + volatile uint32_t totalProcessedFragCounter;
  30431. + volatile uint32_t totalMalformdFragCounter;
  30432. + volatile uint32_t totalSetBusyCounter;
  30433. + volatile uint32_t totalDiscardedFragsCounter;
  30434. + volatile uint32_t totalMoreThan16FramesCounter;
  30435. + volatile uint32_t reserved2[2];
  30436. +} _PackedType t_ReassTbl;
  30437. +
  30438. +typedef struct t_ReassCommonTbl {
  30439. + volatile uint32_t timeoutModeAndFqid;
  30440. + volatile uint32_t reassFrmDescIndexPoolTblPtr;
  30441. + volatile uint32_t liodnAndReassFrmDescPoolPtrHi;
  30442. + volatile uint32_t reassFrmDescPoolPtrLow;
  30443. + volatile uint32_t timeOutTblPtr;
  30444. + volatile uint32_t expirationDelay;
  30445. + volatile uint32_t internalBufferManagement;
  30446. + volatile uint32_t reserved2;
  30447. + volatile uint32_t totalTimeOutCounter;
  30448. + volatile uint32_t totalRfdPoolBusyCounter;
  30449. + volatile uint32_t totalInternalBufferBusy;
  30450. + volatile uint32_t totalExternalBufferBusy;
  30451. + volatile uint32_t totalSgFragmentCounter;
  30452. + volatile uint32_t totalDmaSemaphoreDepletionCounter;
  30453. + volatile uint32_t totalNCSPCounter;
  30454. + volatile uint32_t discardMask;
  30455. +} t_ReassCommonTbl;
  30456. +
  30457. +typedef _Packed struct t_Hmtd {
  30458. + volatile uint16_t cfg;
  30459. + volatile uint8_t eliodnOffset;
  30460. + volatile uint8_t extHmcdBasePtrHi;
  30461. + volatile uint32_t hmcdBasePtr;
  30462. + volatile uint16_t nextAdIdx;
  30463. + volatile uint8_t res1;
  30464. + volatile uint8_t opCode;
  30465. + volatile uint32_t res2;
  30466. +} _PackedType t_Hmtd;
  30467. +
  30468. +#if defined(__MWERKS__) && !defined(__GNUC__)
  30469. +#pragma pack(pop)
  30470. +#endif /* defined(__MWERKS__) && ... */
  30471. +
  30472. +
  30473. +/***********************************************************************/
  30474. +/* Driver's internal structures */
  30475. +/***********************************************************************/
  30476. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  30477. +typedef struct
  30478. +{
  30479. + t_Handle p_AutoLearnHashTbl;
  30480. + t_Handle p_ReassmFrmDescrPoolTbl;
  30481. + t_Handle p_ReassmFrmDescrIndxPoolTbl;
  30482. + t_Handle p_TimeOutTbl;
  30483. + uint16_t maxNumFramesInProcess;
  30484. + uint8_t numOfTasks;
  30485. + //uint8_t poolId;
  30486. + uint8_t prOffset;
  30487. + uint16_t dataOffset;
  30488. + uint8_t sgBpid;
  30489. + uint8_t hwPortId;
  30490. + uint32_t fqidForTimeOutFrames;
  30491. + uint32_t timeoutRoutineRequestTime;
  30492. + uint32_t bitFor1Micro;
  30493. +} t_CapwapFragParams;
  30494. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  30495. +
  30496. +typedef struct
  30497. +{
  30498. + t_AdOfTypeContLookup *p_Frag;
  30499. +#if (DPAA_VERSION == 10)
  30500. + uint8_t scratchBpid;
  30501. +#endif /* (DPAA_VERSION == 10) */
  30502. +} t_FragParams;
  30503. +
  30504. +typedef struct t_ReassmParams
  30505. +{
  30506. + e_NetHeaderType hdr; /* Header selection */
  30507. + t_ReassCommonTbl *p_ReassCommonTbl;
  30508. + uintptr_t reassFrmDescrIndxPoolTblAddr;
  30509. + uintptr_t reassFrmDescrPoolTblAddr;
  30510. + uintptr_t timeOutTblAddr;
  30511. + uintptr_t internalBufferPoolManagementIndexAddr;
  30512. + uintptr_t internalBufferPoolAddr;
  30513. + uint32_t maxNumFramesInProcess;
  30514. + uint8_t sgBpid;
  30515. + uint8_t dataMemId;
  30516. + uint16_t dataLiodnOffset;
  30517. + uint32_t fqidForTimeOutFrames;
  30518. + e_FmPcdManipReassemTimeOutMode timeOutMode;
  30519. + uint32_t timeoutThresholdForReassmProcess;
  30520. + union {
  30521. + struct {
  30522. + t_Handle h_Ipv4Ad;
  30523. + t_Handle h_Ipv6Ad;
  30524. + bool ipv6Assigned;
  30525. + t_ReassTbl *p_Ipv4ReassTbl;
  30526. + t_ReassTbl *p_Ipv6ReassTbl;
  30527. + uintptr_t ipv4AutoLearnHashTblAddr;
  30528. + uintptr_t ipv6AutoLearnHashTblAddr;
  30529. + uintptr_t ipv4AutoLearnSetLockTblAddr;
  30530. + uintptr_t ipv6AutoLearnSetLockTblAddr;
  30531. + uint16_t minFragSize[2];
  30532. + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry[2];
  30533. + uint8_t relativeSchemeId[2];
  30534. + t_Handle h_Ipv4Scheme;
  30535. + t_Handle h_Ipv6Scheme;
  30536. + uint32_t nonConsistentSpFqid;
  30537. + } ip;
  30538. + struct {
  30539. + t_Handle h_Ad;
  30540. + t_ReassTbl *p_ReassTbl;
  30541. + uintptr_t autoLearnHashTblAddr;
  30542. + uintptr_t autoLearnSetLockTblAddr;
  30543. + uint16_t maxRessembledsSize;
  30544. + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry;
  30545. + uint8_t relativeSchemeId;
  30546. + t_Handle h_Scheme;
  30547. + } capwap;
  30548. + };
  30549. +} t_ReassmParams;
  30550. +
  30551. +typedef struct{
  30552. + e_FmPcdManipType type;
  30553. + t_FmPcdManipParams manipParams;
  30554. + bool muramAllocate;
  30555. + t_Handle h_Ad;
  30556. + uint32_t opcode;
  30557. + bool rmv;
  30558. + bool insrt;
  30559. + t_Handle h_NextManip;
  30560. + t_Handle h_PrevManip;
  30561. + e_FmPcdManipType nextManipType;
  30562. + /* HdrManip parameters*/
  30563. + uint8_t *p_Hmct;
  30564. + uint8_t *p_Data;
  30565. + bool dontParseAfterManip;
  30566. + bool fieldUpdate;
  30567. + bool custom;
  30568. + uint16_t tableSize;
  30569. + uint8_t dataSize;
  30570. + bool cascaded;
  30571. + e_ManipUnifiedPosition unifiedPosition;
  30572. + /* end HdrManip */
  30573. + uint8_t *p_Template;
  30574. + uint16_t owner;
  30575. + uint32_t updateParams;
  30576. + uint32_t shadowUpdateParams;
  30577. + bool frag;
  30578. + bool reassm;
  30579. + uint16_t sizeForFragmentation;
  30580. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  30581. + t_Handle h_Frag;
  30582. + t_CapwapFragParams capwapFragParams;
  30583. +#endif /* (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10)) */
  30584. + union {
  30585. + t_ReassmParams reassmParams;
  30586. + t_FragParams fragParams;
  30587. + };
  30588. + uint8_t icOffset;
  30589. + uint16_t ownerTmp;
  30590. + bool cnia;
  30591. + t_Handle p_StatsTbl;
  30592. + t_Handle h_FmPcd;
  30593. + t_List nodesLst;
  30594. + t_Handle h_Spinlock;
  30595. +} t_FmPcdManip;
  30596. +
  30597. +typedef struct t_FmPcdCcSavedManipParams
  30598. +{
  30599. + union
  30600. + {
  30601. + struct
  30602. + {
  30603. + uint16_t dataOffset;
  30604. + //uint8_t poolId;
  30605. + }capwapParams;
  30606. + struct
  30607. + {
  30608. + uint16_t dataOffset;
  30609. + uint8_t poolId;
  30610. + }ipParams;
  30611. + };
  30612. +
  30613. +} t_FmPcdCcSavedManipParams;
  30614. +
  30615. +
  30616. +#endif /* __FM_MANIP_H */
  30617. --- /dev/null
  30618. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.c
  30619. @@ -0,0 +1,2094 @@
  30620. +/*
  30621. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  30622. + *
  30623. + * Redistribution and use in source and binary forms, with or without
  30624. + * modification, are permitted provided that the following conditions are met:
  30625. + * * Redistributions of source code must retain the above copyright
  30626. + * notice, this list of conditions and the following disclaimer.
  30627. + * * Redistributions in binary form must reproduce the above copyright
  30628. + * notice, this list of conditions and the following disclaimer in the
  30629. + * documentation and/or other materials provided with the distribution.
  30630. + * * Neither the name of Freescale Semiconductor nor the
  30631. + * names of its contributors may be used to endorse or promote products
  30632. + * derived from this software without specific prior written permission.
  30633. + *
  30634. + *
  30635. + * ALTERNATIVELY, this software may be distributed under the terms of the
  30636. + * GNU General Public License ("GPL") as published by the Free Software
  30637. + * Foundation, either version 2 of that License or (at your option) any
  30638. + * later version.
  30639. + *
  30640. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  30641. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  30642. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  30643. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  30644. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  30645. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30646. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30647. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30648. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  30649. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30650. + */
  30651. +
  30652. +
  30653. +/******************************************************************************
  30654. + @File fm_pcd.c
  30655. +
  30656. + @Description FM PCD ...
  30657. +*//***************************************************************************/
  30658. +#include "std_ext.h"
  30659. +#include "error_ext.h"
  30660. +#include "string_ext.h"
  30661. +#include "xx_ext.h"
  30662. +#include "sprint_ext.h"
  30663. +#include "debug_ext.h"
  30664. +#include "net_ext.h"
  30665. +#include "fm_ext.h"
  30666. +#include "fm_pcd_ext.h"
  30667. +
  30668. +#include "fm_common.h"
  30669. +#include "fm_pcd.h"
  30670. +#include "fm_pcd_ipc.h"
  30671. +#include "fm_hc.h"
  30672. +#include "fm_muram_ext.h"
  30673. +
  30674. +
  30675. +/****************************************/
  30676. +/* static functions */
  30677. +/****************************************/
  30678. +
  30679. +static t_Error CheckFmPcdParameters(t_FmPcd *p_FmPcd)
  30680. +{
  30681. + if (!p_FmPcd->h_Fm)
  30682. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("h_Fm has to be initialized"));
  30683. +
  30684. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  30685. + {
  30686. + if (p_FmPcd->p_FmPcdKg && !p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs)
  30687. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Something WRONG"));
  30688. +
  30689. + if (p_FmPcd->p_FmPcdPlcr && !p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs)
  30690. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Something WRONG"));
  30691. +
  30692. + if (!p_FmPcd->f_Exception)
  30693. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("f_FmPcdExceptions has to be initialized"));
  30694. +
  30695. + if ((!p_FmPcd->f_FmPcdIndexedException) && (p_FmPcd->p_FmPcdPlcr || p_FmPcd->p_FmPcdKg))
  30696. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("f_FmPcdIndexedException has to be initialized"));
  30697. +
  30698. + if (p_FmPcd->p_FmPcdDriverParam->prsMaxParseCycleLimit > PRS_MAX_CYCLE_LIMIT)
  30699. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("prsMaxParseCycleLimit has to be less than 8191"));
  30700. + }
  30701. +
  30702. + return E_OK;
  30703. +}
  30704. +
  30705. +static volatile bool blockingFlag = FALSE;
  30706. +static void IpcMsgCompletionCB(t_Handle h_FmPcd,
  30707. + uint8_t *p_Msg,
  30708. + uint8_t *p_Reply,
  30709. + uint32_t replyLength,
  30710. + t_Error status)
  30711. +{
  30712. + UNUSED(h_FmPcd);UNUSED(p_Msg);UNUSED(p_Reply);UNUSED(replyLength);UNUSED(status);
  30713. + blockingFlag = FALSE;
  30714. +}
  30715. +
  30716. +static t_Error IpcMsgHandlerCB(t_Handle h_FmPcd,
  30717. + uint8_t *p_Msg,
  30718. + uint32_t msgLength,
  30719. + uint8_t *p_Reply,
  30720. + uint32_t *p_ReplyLength)
  30721. +{
  30722. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  30723. + t_Error err = E_OK;
  30724. + t_FmPcdIpcMsg *p_IpcMsg = (t_FmPcdIpcMsg*)p_Msg;
  30725. + t_FmPcdIpcReply *p_IpcReply = (t_FmPcdIpcReply*)p_Reply;
  30726. +
  30727. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  30728. + SANITY_CHECK_RETURN_ERROR((msgLength >= sizeof(uint32_t)), E_INVALID_VALUE);
  30729. +
  30730. +#ifdef DISABLE_SANITY_CHECKS
  30731. + UNUSED(msgLength);
  30732. +#endif /* DISABLE_SANITY_CHECKS */
  30733. +
  30734. + ASSERT_COND(p_Msg);
  30735. +
  30736. + memset(p_IpcReply, 0, (sizeof(uint8_t) * FM_PCD_MAX_REPLY_SIZE));
  30737. + *p_ReplyLength = 0;
  30738. +
  30739. + switch (p_IpcMsg->msgId)
  30740. + {
  30741. + case (FM_PCD_MASTER_IS_ALIVE):
  30742. + *(uint8_t*)(p_IpcReply->replyBody) = 1;
  30743. + p_IpcReply->error = E_OK;
  30744. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
  30745. + break;
  30746. + case (FM_PCD_MASTER_IS_ENABLED):
  30747. + /* count partitions registrations */
  30748. + if (p_FmPcd->enabled)
  30749. + p_FmPcd->numOfEnabledGuestPartitionsPcds++;
  30750. + *(uint8_t*)(p_IpcReply->replyBody) = (uint8_t)p_FmPcd->enabled;
  30751. + p_IpcReply->error = E_OK;
  30752. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
  30753. + break;
  30754. + case (FM_PCD_GUEST_DISABLE):
  30755. + if (p_FmPcd->numOfEnabledGuestPartitionsPcds)
  30756. + {
  30757. + p_FmPcd->numOfEnabledGuestPartitionsPcds--;
  30758. + p_IpcReply->error = E_OK;
  30759. + }
  30760. + else
  30761. + {
  30762. + REPORT_ERROR(MINOR, E_INVALID_STATE,("Trying to disable an unregistered partition"));
  30763. + p_IpcReply->error = E_INVALID_STATE;
  30764. + }
  30765. + *p_ReplyLength = sizeof(uint32_t);
  30766. + break;
  30767. + case (FM_PCD_GET_COUNTER):
  30768. + {
  30769. + e_FmPcdCounters inCounter;
  30770. + uint32_t outCounter;
  30771. +
  30772. + memcpy((uint8_t*)&inCounter, p_IpcMsg->msgBody, sizeof(uint32_t));
  30773. + outCounter = FM_PCD_GetCounter(h_FmPcd, inCounter);
  30774. + memcpy(p_IpcReply->replyBody, (uint8_t*)&outCounter, sizeof(uint32_t));
  30775. + p_IpcReply->error = E_OK;
  30776. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
  30777. + break;
  30778. + }
  30779. + case (FM_PCD_ALLOC_KG_SCHEMES):
  30780. + {
  30781. + t_FmPcdIpcKgSchemesParams ipcSchemesParams;
  30782. +
  30783. + memcpy((uint8_t*)&ipcSchemesParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgSchemesParams));
  30784. + err = FmPcdKgAllocSchemes(h_FmPcd,
  30785. + ipcSchemesParams.numOfSchemes,
  30786. + ipcSchemesParams.guestId,
  30787. + p_IpcReply->replyBody);
  30788. + p_IpcReply->error = err;
  30789. + *p_ReplyLength = sizeof(uint32_t) + ipcSchemesParams.numOfSchemes*sizeof(uint8_t);
  30790. + break;
  30791. + }
  30792. + case (FM_PCD_FREE_KG_SCHEMES):
  30793. + {
  30794. + t_FmPcdIpcKgSchemesParams ipcSchemesParams;
  30795. +
  30796. + memcpy((uint8_t*)&ipcSchemesParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgSchemesParams));
  30797. + err = FmPcdKgFreeSchemes(h_FmPcd,
  30798. + ipcSchemesParams.numOfSchemes,
  30799. + ipcSchemesParams.guestId,
  30800. + ipcSchemesParams.schemesIds);
  30801. + p_IpcReply->error = err;
  30802. + *p_ReplyLength = sizeof(uint32_t);
  30803. + break;
  30804. + }
  30805. + case (FM_PCD_ALLOC_KG_CLSPLAN):
  30806. + {
  30807. + t_FmPcdIpcKgClsPlanParams ipcKgClsPlanParams;
  30808. +
  30809. + memcpy((uint8_t*)&ipcKgClsPlanParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgClsPlanParams));
  30810. + err = KgAllocClsPlanEntries(h_FmPcd,
  30811. + ipcKgClsPlanParams.numOfClsPlanEntries,
  30812. + ipcKgClsPlanParams.guestId,
  30813. + p_IpcReply->replyBody);
  30814. + p_IpcReply->error = err;
  30815. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
  30816. + break;
  30817. + }
  30818. + case (FM_PCD_FREE_KG_CLSPLAN):
  30819. + {
  30820. + t_FmPcdIpcKgClsPlanParams ipcKgClsPlanParams;
  30821. +
  30822. + memcpy((uint8_t*)&ipcKgClsPlanParams, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcKgClsPlanParams));
  30823. + KgFreeClsPlanEntries(h_FmPcd,
  30824. + ipcKgClsPlanParams.numOfClsPlanEntries,
  30825. + ipcKgClsPlanParams.guestId,
  30826. + ipcKgClsPlanParams.clsPlanBase);
  30827. + *p_ReplyLength = sizeof(uint32_t);
  30828. + break;
  30829. + }
  30830. + case (FM_PCD_ALLOC_PROFILES):
  30831. + {
  30832. + t_FmIpcResourceAllocParams ipcAllocParams;
  30833. + uint16_t base;
  30834. + memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
  30835. + base = PlcrAllocProfilesForPartition(h_FmPcd,
  30836. + ipcAllocParams.base,
  30837. + ipcAllocParams.num,
  30838. + ipcAllocParams.guestId);
  30839. + memcpy(p_IpcReply->replyBody, (uint16_t*)&base, sizeof(uint16_t));
  30840. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint16_t);
  30841. + break;
  30842. + }
  30843. + case (FM_PCD_FREE_PROFILES):
  30844. + {
  30845. + t_FmIpcResourceAllocParams ipcAllocParams;
  30846. + memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
  30847. + PlcrFreeProfilesForPartition(h_FmPcd,
  30848. + ipcAllocParams.base,
  30849. + ipcAllocParams.num,
  30850. + ipcAllocParams.guestId);
  30851. + break;
  30852. + }
  30853. + case (FM_PCD_SET_PORT_PROFILES):
  30854. + {
  30855. + t_FmIpcResourceAllocParams ipcAllocParams;
  30856. + memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
  30857. + PlcrSetPortProfiles(h_FmPcd,
  30858. + ipcAllocParams.guestId,
  30859. + ipcAllocParams.num,
  30860. + ipcAllocParams.base);
  30861. + break;
  30862. + }
  30863. + case (FM_PCD_CLEAR_PORT_PROFILES):
  30864. + {
  30865. + t_FmIpcResourceAllocParams ipcAllocParams;
  30866. + memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
  30867. + PlcrClearPortProfiles(h_FmPcd,
  30868. + ipcAllocParams.guestId);
  30869. + break;
  30870. + }
  30871. + case (FM_PCD_GET_SW_PRS_OFFSET):
  30872. + {
  30873. + t_FmPcdIpcSwPrsLable ipcSwPrsLable;
  30874. + uint32_t swPrsOffset;
  30875. +
  30876. + memcpy((uint8_t*)&ipcSwPrsLable, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcSwPrsLable));
  30877. + swPrsOffset =
  30878. + FmPcdGetSwPrsOffset(h_FmPcd,
  30879. + (e_NetHeaderType)ipcSwPrsLable.enumHdr,
  30880. + ipcSwPrsLable.indexPerHdr);
  30881. + memcpy(p_IpcReply->replyBody, (uint8_t*)&swPrsOffset, sizeof(uint32_t));
  30882. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
  30883. + break;
  30884. + }
  30885. + case (FM_PCD_PRS_INC_PORT_STATS):
  30886. + {
  30887. + t_FmPcdIpcPrsIncludePort ipcPrsIncludePort;
  30888. +
  30889. + memcpy((uint8_t*)&ipcPrsIncludePort, p_IpcMsg->msgBody, sizeof(t_FmPcdIpcPrsIncludePort));
  30890. + PrsIncludePortInStatistics(h_FmPcd,
  30891. + ipcPrsIncludePort.hardwarePortId,
  30892. + ipcPrsIncludePort.include);
  30893. + break;
  30894. + }
  30895. + default:
  30896. + *p_ReplyLength = 0;
  30897. + RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("command not found!!!"));
  30898. + }
  30899. + return E_OK;
  30900. +}
  30901. +
  30902. +static uint32_t NetEnvLock(t_Handle h_NetEnv)
  30903. +{
  30904. + ASSERT_COND(h_NetEnv);
  30905. + return XX_LockIntrSpinlock(((t_FmPcdNetEnv*)h_NetEnv)->h_Spinlock);
  30906. +}
  30907. +
  30908. +static void NetEnvUnlock(t_Handle h_NetEnv, uint32_t intFlags)
  30909. +{
  30910. + ASSERT_COND(h_NetEnv);
  30911. + XX_UnlockIntrSpinlock(((t_FmPcdNetEnv*)h_NetEnv)->h_Spinlock, intFlags);
  30912. +}
  30913. +
  30914. +static void EnqueueLockToFreeLst(t_FmPcd *p_FmPcd, t_FmPcdLock *p_Lock)
  30915. +{
  30916. + uint32_t intFlags;
  30917. +
  30918. + intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
  30919. + LIST_AddToTail(&p_Lock->node, &p_FmPcd->freeLocksLst);
  30920. + XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
  30921. +}
  30922. +
  30923. +static t_FmPcdLock * DequeueLockFromFreeLst(t_FmPcd *p_FmPcd)
  30924. +{
  30925. + t_FmPcdLock *p_Lock = NULL;
  30926. + uint32_t intFlags;
  30927. +
  30928. + intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
  30929. + if (!LIST_IsEmpty(&p_FmPcd->freeLocksLst))
  30930. + {
  30931. + p_Lock = FM_PCD_LOCK_OBJ(p_FmPcd->freeLocksLst.p_Next);
  30932. + LIST_DelAndInit(&p_Lock->node);
  30933. + }
  30934. + XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
  30935. +
  30936. + return p_Lock;
  30937. +}
  30938. +
  30939. +static void EnqueueLockToAcquiredLst(t_FmPcd *p_FmPcd, t_FmPcdLock *p_Lock)
  30940. +{
  30941. + uint32_t intFlags;
  30942. +
  30943. + intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
  30944. + LIST_AddToTail(&p_Lock->node, &p_FmPcd->acquiredLocksLst);
  30945. + XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
  30946. +}
  30947. +
  30948. +static t_Error FillFreeLocksLst(t_FmPcd *p_FmPcd)
  30949. +{
  30950. + t_FmPcdLock *p_Lock;
  30951. + int i;
  30952. +
  30953. + for (i=0; i<10; i++)
  30954. + {
  30955. + p_Lock = (t_FmPcdLock *)XX_Malloc(sizeof(t_FmPcdLock));
  30956. + if (!p_Lock)
  30957. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("FM-PCD lock obj!"));
  30958. + memset(p_Lock, 0, sizeof(t_FmPcdLock));
  30959. + INIT_LIST(&p_Lock->node);
  30960. + p_Lock->h_Spinlock = XX_InitSpinlock();
  30961. + if (!p_Lock->h_Spinlock)
  30962. + {
  30963. + XX_Free(p_Lock);
  30964. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("FM-PCD spinlock obj!"));
  30965. + }
  30966. + EnqueueLockToFreeLst(p_FmPcd, p_Lock);
  30967. + }
  30968. +
  30969. + return E_OK;
  30970. +}
  30971. +
  30972. +static void ReleaseFreeLocksLst(t_FmPcd *p_FmPcd)
  30973. +{
  30974. + t_FmPcdLock *p_Lock;
  30975. +
  30976. + p_Lock = DequeueLockFromFreeLst(p_FmPcd);
  30977. + while (p_Lock)
  30978. + {
  30979. + XX_FreeSpinlock(p_Lock->h_Spinlock);
  30980. + XX_Free(p_Lock);
  30981. + p_Lock = DequeueLockFromFreeLst(p_FmPcd);
  30982. + }
  30983. +}
  30984. +
  30985. +
  30986. +
  30987. +/*****************************************************************************/
  30988. +/* Inter-module API routines */
  30989. +/*****************************************************************************/
  30990. +
  30991. +void FmPcdSetClsPlanGrpId(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint8_t clsPlanGrpId)
  30992. +{
  30993. + ASSERT_COND(p_FmPcd);
  30994. + p_FmPcd->netEnvs[netEnvId].clsPlanGrpId = clsPlanGrpId;
  30995. +}
  30996. +
  30997. +t_Error PcdGetClsPlanGrpParams(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_GrpParams)
  30998. +{
  30999. + uint8_t netEnvId = p_GrpParams->netEnvId;
  31000. + int i, k, j;
  31001. +
  31002. + ASSERT_COND(p_FmPcd);
  31003. + if (p_FmPcd->netEnvs[netEnvId].clsPlanGrpId != ILLEGAL_CLS_PLAN)
  31004. + {
  31005. + p_GrpParams->grpExists = TRUE;
  31006. + p_GrpParams->clsPlanGrpId = p_FmPcd->netEnvs[netEnvId].clsPlanGrpId;
  31007. + return E_OK;
  31008. + }
  31009. +
  31010. + for (i=0; ((i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
  31011. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE)); i++)
  31012. + {
  31013. + for (k=0; ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
  31014. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE)); k++)
  31015. + {
  31016. + /* if an option exists, add it to the opts list */
  31017. + if (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt)
  31018. + {
  31019. + /* check if this option already exists, add if it doesn't */
  31020. + for (j = 0;j<p_GrpParams->numOfOptions;j++)
  31021. + {
  31022. + if (p_GrpParams->options[j] == p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt)
  31023. + break;
  31024. + }
  31025. + p_GrpParams->optVectors[j] |= p_FmPcd->netEnvs[netEnvId].unitsVectors[i];
  31026. + if (j == p_GrpParams->numOfOptions)
  31027. + {
  31028. + p_GrpParams->options[p_GrpParams->numOfOptions] = p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt;
  31029. + p_GrpParams->numOfOptions++;
  31030. + }
  31031. + }
  31032. + }
  31033. + }
  31034. +
  31035. + if (p_GrpParams->numOfOptions == 0)
  31036. + {
  31037. + if (p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId != ILLEGAL_CLS_PLAN)
  31038. + {
  31039. + p_GrpParams->grpExists = TRUE;
  31040. + p_GrpParams->clsPlanGrpId = p_FmPcd->p_FmPcdKg->emptyClsPlanGrpId;
  31041. + }
  31042. + }
  31043. +
  31044. + return E_OK;
  31045. +
  31046. +}
  31047. +
  31048. +t_Error PcdGetVectorForOpt(t_FmPcd *p_FmPcd, uint8_t netEnvId, protocolOpt_t opt, uint32_t *p_Vector)
  31049. +{
  31050. + uint8_t j,k;
  31051. +
  31052. + *p_Vector = 0;
  31053. +
  31054. + ASSERT_COND(p_FmPcd);
  31055. + for (j=0; ((j < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
  31056. + (p_FmPcd->netEnvs[netEnvId].units[j].hdrs[0].hdr != HEADER_TYPE_NONE)); j++)
  31057. + {
  31058. + for (k=0; ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
  31059. + (p_FmPcd->netEnvs[netEnvId].units[j].hdrs[k].hdr != HEADER_TYPE_NONE)); k++)
  31060. + {
  31061. + if (p_FmPcd->netEnvs[netEnvId].units[j].hdrs[k].opt == opt)
  31062. + *p_Vector |= p_FmPcd->netEnvs[netEnvId].unitsVectors[j];
  31063. + }
  31064. + }
  31065. +
  31066. + if (!*p_Vector)
  31067. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Requested option was not defined for this Network Environment Characteristics module"));
  31068. + else
  31069. + return E_OK;
  31070. +}
  31071. +
  31072. +t_Error PcdGetUnitsVector(t_FmPcd *p_FmPcd, t_NetEnvParams *p_Params)
  31073. +{
  31074. + int i;
  31075. +
  31076. + ASSERT_COND(p_FmPcd);
  31077. + ASSERT_COND(p_Params->netEnvId < FM_MAX_NUM_OF_PORTS);
  31078. +
  31079. + p_Params->vector = 0;
  31080. + for (i=0; i<p_Params->numOfDistinctionUnits ;i++)
  31081. + {
  31082. + if (p_FmPcd->netEnvs[p_Params->netEnvId].units[p_Params->unitIds[i]].hdrs[0].hdr == HEADER_TYPE_NONE)
  31083. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Requested unit was not defined for this Network Environment Characteristics module"));
  31084. + ASSERT_COND(p_FmPcd->netEnvs[p_Params->netEnvId].unitsVectors[p_Params->unitIds[i]]);
  31085. + p_Params->vector |= p_FmPcd->netEnvs[p_Params->netEnvId].unitsVectors[p_Params->unitIds[i]];
  31086. + }
  31087. +
  31088. + return E_OK;
  31089. +}
  31090. +
  31091. +bool PcdNetEnvIsUnitWithoutOpts(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint32_t unitVector)
  31092. +{
  31093. + int i=0, k;
  31094. +
  31095. + ASSERT_COND(p_FmPcd);
  31096. + /* check whether a given unit may be used by non-clsPlan users. */
  31097. + /* first, recognize the unit by its vector */
  31098. + while (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE)
  31099. + {
  31100. + if (p_FmPcd->netEnvs[netEnvId].unitsVectors[i] == unitVector)
  31101. + {
  31102. + for (k=0;
  31103. + ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
  31104. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE));
  31105. + k++)
  31106. + /* check that no option exists */
  31107. + if ((protocolOpt_t)p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt)
  31108. + return FALSE;
  31109. + break;
  31110. + }
  31111. + i++;
  31112. + }
  31113. + /* assert that a unit was found to mach the vector */
  31114. + ASSERT_COND(p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE);
  31115. +
  31116. + return TRUE;
  31117. +}
  31118. +bool FmPcdNetEnvIsHdrExist(t_Handle h_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr)
  31119. +{
  31120. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31121. + int i, k;
  31122. +
  31123. + ASSERT_COND(p_FmPcd);
  31124. +
  31125. + for (i=0; ((i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
  31126. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE)); i++)
  31127. + {
  31128. + for (k=0; ((k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
  31129. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE)); k++)
  31130. + if (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr == hdr)
  31131. + return TRUE;
  31132. + }
  31133. + for (i=0; ((i < FM_PCD_MAX_NUM_OF_ALIAS_HDRS) &&
  31134. + (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr != HEADER_TYPE_NONE)); i++)
  31135. + {
  31136. + if (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr == hdr)
  31137. + return TRUE;
  31138. + }
  31139. +
  31140. + return FALSE;
  31141. +}
  31142. +
  31143. +uint8_t FmPcdNetEnvGetUnitId(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr, bool interchangeable, protocolOpt_t opt)
  31144. +{
  31145. + uint8_t i, k;
  31146. +
  31147. + ASSERT_COND(p_FmPcd);
  31148. +
  31149. + if (interchangeable)
  31150. + {
  31151. + for (i=0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
  31152. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
  31153. + {
  31154. + for (k=0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS) &&
  31155. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
  31156. + {
  31157. + if ((p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].hdr == hdr) &&
  31158. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[k].opt == opt))
  31159. +
  31160. + return i;
  31161. + }
  31162. + }
  31163. + }
  31164. + else
  31165. + {
  31166. + for (i=0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS) &&
  31167. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
  31168. + if ((p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].hdr == hdr) &&
  31169. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[0].opt == opt) &&
  31170. + (p_FmPcd->netEnvs[netEnvId].units[i].hdrs[1].hdr == HEADER_TYPE_NONE))
  31171. + return i;
  31172. +
  31173. + for (i=0; (i < FM_PCD_MAX_NUM_OF_ALIAS_HDRS) &&
  31174. + (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr != HEADER_TYPE_NONE); i++)
  31175. + if ((p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr == hdr) &&
  31176. + (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].opt == opt))
  31177. + return p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].aliasHdr;
  31178. + }
  31179. +
  31180. + return FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS;
  31181. +}
  31182. +
  31183. +t_Error FmPcdUnregisterReassmPort(t_Handle h_FmPcd, t_Handle h_ReasmCommonPramTbl)
  31184. +{
  31185. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31186. + t_FmPcdCcReassmTimeoutParams ccReassmTimeoutParams = {0};
  31187. + uint8_t result;
  31188. + t_Error err = E_OK;
  31189. +
  31190. + ASSERT_COND(p_FmPcd);
  31191. + ASSERT_COND(h_ReasmCommonPramTbl);
  31192. +
  31193. + ccReassmTimeoutParams.iprcpt = (uint32_t)(XX_VirtToPhys(h_ReasmCommonPramTbl) - p_FmPcd->physicalMuramBase);
  31194. + ccReassmTimeoutParams.activate = FALSE; /*Disable Timeout Task*/
  31195. +
  31196. + if ((err = FmHcPcdCcTimeoutReassm(p_FmPcd->h_Hc, &ccReassmTimeoutParams, &result)) != E_OK)
  31197. + RETURN_ERROR(MAJOR, err, NO_MSG);
  31198. +
  31199. + switch (result)
  31200. + {
  31201. + case (0):
  31202. + return E_OK;
  31203. + case (1):
  31204. + RETURN_ERROR(MAJOR, E_INVALID_STATE, (""));
  31205. + case (2):
  31206. + RETURN_ERROR(MAJOR, E_INVALID_STATE, (""));
  31207. + case (3):
  31208. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("Disable Timeout Task with invalid IPRCPT"));
  31209. + default:
  31210. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  31211. + }
  31212. +
  31213. + return E_OK;
  31214. +}
  31215. +
  31216. +e_NetHeaderType FmPcdGetAliasHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr)
  31217. +{
  31218. + int i;
  31219. +
  31220. + ASSERT_COND(p_FmPcd);
  31221. + ASSERT_COND(netEnvId < FM_MAX_NUM_OF_PORTS);
  31222. +
  31223. + for (i=0; (i < FM_PCD_MAX_NUM_OF_ALIAS_HDRS)
  31224. + && (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr != HEADER_TYPE_NONE); i++)
  31225. + {
  31226. + if (p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].hdr == hdr)
  31227. + return p_FmPcd->netEnvs[netEnvId].aliasHdrs[i].aliasHdr;
  31228. + }
  31229. +
  31230. + return HEADER_TYPE_NONE;
  31231. +}
  31232. +
  31233. +void FmPcdPortRegister(t_Handle h_FmPcd, t_Handle h_FmPort, uint8_t hardwarePortId)
  31234. +{
  31235. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31236. + uint16_t swPortIndex = 0;
  31237. +
  31238. + ASSERT_COND(h_FmPcd);
  31239. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  31240. + p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].h_FmPort = h_FmPort;
  31241. +}
  31242. +
  31243. +uint32_t FmPcdGetLcv(t_Handle h_FmPcd, uint32_t netEnvId, uint8_t hdrNum)
  31244. +{
  31245. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31246. +
  31247. + ASSERT_COND(h_FmPcd);
  31248. + return p_FmPcd->netEnvs[netEnvId].lcvs[hdrNum];
  31249. +}
  31250. +
  31251. +uint32_t FmPcdGetMacsecLcv(t_Handle h_FmPcd, uint32_t netEnvId)
  31252. +{
  31253. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31254. +
  31255. + ASSERT_COND(h_FmPcd);
  31256. + return p_FmPcd->netEnvs[netEnvId].macsecVector;
  31257. +}
  31258. +
  31259. +uint8_t FmPcdGetNetEnvId(t_Handle h_NetEnv)
  31260. +{
  31261. + return ((t_FmPcdNetEnv*)h_NetEnv)->netEnvId;
  31262. +}
  31263. +
  31264. +void FmPcdIncNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId)
  31265. +{
  31266. + uint32_t intFlags;
  31267. +
  31268. + ASSERT_COND(h_FmPcd);
  31269. +
  31270. + intFlags = NetEnvLock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId]);
  31271. + ((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId].owners++;
  31272. + NetEnvUnlock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId], intFlags);
  31273. +}
  31274. +
  31275. +void FmPcdDecNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId)
  31276. +{
  31277. + uint32_t intFlags;
  31278. +
  31279. + ASSERT_COND(h_FmPcd);
  31280. + ASSERT_COND(((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId].owners);
  31281. +
  31282. + intFlags = NetEnvLock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId]);
  31283. + ((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId].owners--;
  31284. + NetEnvUnlock(&((t_FmPcd*)h_FmPcd)->netEnvs[netEnvId], intFlags);
  31285. +}
  31286. +
  31287. +uint32_t FmPcdLock(t_Handle h_FmPcd)
  31288. +{
  31289. + ASSERT_COND(h_FmPcd);
  31290. + return XX_LockIntrSpinlock(((t_FmPcd*)h_FmPcd)->h_Spinlock);
  31291. +}
  31292. +
  31293. +void FmPcdUnlock(t_Handle h_FmPcd, uint32_t intFlags)
  31294. +{
  31295. + ASSERT_COND(h_FmPcd);
  31296. + XX_UnlockIntrSpinlock(((t_FmPcd*)h_FmPcd)->h_Spinlock, intFlags);
  31297. +}
  31298. +
  31299. +t_FmPcdLock * FmPcdAcquireLock(t_Handle h_FmPcd)
  31300. +{
  31301. + t_FmPcdLock *p_Lock;
  31302. + ASSERT_COND(h_FmPcd);
  31303. + p_Lock = DequeueLockFromFreeLst((t_FmPcd*)h_FmPcd);
  31304. + if (!p_Lock)
  31305. + {
  31306. + FillFreeLocksLst(h_FmPcd);
  31307. + p_Lock = DequeueLockFromFreeLst((t_FmPcd*)h_FmPcd);
  31308. + }
  31309. +
  31310. + if (p_Lock)
  31311. + EnqueueLockToAcquiredLst((t_FmPcd*)h_FmPcd, p_Lock);
  31312. + return p_Lock;
  31313. +}
  31314. +
  31315. +void FmPcdReleaseLock(t_Handle h_FmPcd, t_FmPcdLock *p_Lock)
  31316. +{
  31317. + uint32_t intFlags;
  31318. + ASSERT_COND(h_FmPcd);
  31319. + intFlags = FmPcdLock(h_FmPcd);
  31320. + LIST_DelAndInit(&p_Lock->node);
  31321. + FmPcdUnlock(h_FmPcd, intFlags);
  31322. + EnqueueLockToFreeLst((t_FmPcd*)h_FmPcd, p_Lock);
  31323. +}
  31324. +
  31325. +bool FmPcdLockTryLockAll(t_Handle h_FmPcd)
  31326. +{
  31327. + uint32_t intFlags;
  31328. + t_List *p_Pos, *p_SavedPos=NULL;
  31329. +
  31330. + ASSERT_COND(h_FmPcd);
  31331. + intFlags = FmPcdLock(h_FmPcd);
  31332. + LIST_FOR_EACH(p_Pos, &((t_FmPcd*)h_FmPcd)->acquiredLocksLst)
  31333. + {
  31334. + t_FmPcdLock *p_Lock = FM_PCD_LOCK_OBJ(p_Pos);
  31335. + if (!FmPcdLockTryLock(p_Lock))
  31336. + {
  31337. + p_SavedPos = p_Pos;
  31338. + break;
  31339. + }
  31340. + }
  31341. + if (p_SavedPos)
  31342. + {
  31343. + LIST_FOR_EACH(p_Pos, &((t_FmPcd*)h_FmPcd)->acquiredLocksLst)
  31344. + {
  31345. + t_FmPcdLock *p_Lock = FM_PCD_LOCK_OBJ(p_Pos);
  31346. + if (p_Pos == p_SavedPos)
  31347. + break;
  31348. + FmPcdLockUnlock(p_Lock);
  31349. + }
  31350. + }
  31351. + FmPcdUnlock(h_FmPcd, intFlags);
  31352. +
  31353. + CORE_MemoryBarrier();
  31354. +
  31355. + if (p_SavedPos)
  31356. + return FALSE;
  31357. +
  31358. + return TRUE;
  31359. +}
  31360. +
  31361. +void FmPcdLockUnlockAll(t_Handle h_FmPcd)
  31362. +{
  31363. + uint32_t intFlags;
  31364. + t_List *p_Pos;
  31365. +
  31366. + ASSERT_COND(h_FmPcd);
  31367. + intFlags = FmPcdLock(h_FmPcd);
  31368. + LIST_FOR_EACH(p_Pos, &((t_FmPcd*)h_FmPcd)->acquiredLocksLst)
  31369. + {
  31370. + t_FmPcdLock *p_Lock = FM_PCD_LOCK_OBJ(p_Pos);
  31371. + p_Lock->flag = FALSE;
  31372. + }
  31373. + FmPcdUnlock(h_FmPcd, intFlags);
  31374. +
  31375. + CORE_MemoryBarrier();
  31376. +}
  31377. +
  31378. +t_Error FmPcdHcSync(t_Handle h_FmPcd)
  31379. +{
  31380. + ASSERT_COND(h_FmPcd);
  31381. + ASSERT_COND(((t_FmPcd*)h_FmPcd)->h_Hc);
  31382. +
  31383. + return FmHcPcdSync(((t_FmPcd*)h_FmPcd)->h_Hc);
  31384. +}
  31385. +
  31386. +t_Handle FmPcdGetHcHandle(t_Handle h_FmPcd)
  31387. +{
  31388. + ASSERT_COND(h_FmPcd);
  31389. + return ((t_FmPcd*)h_FmPcd)->h_Hc;
  31390. +}
  31391. +
  31392. +bool FmPcdIsAdvancedOffloadSupported(t_Handle h_FmPcd)
  31393. +{
  31394. + ASSERT_COND(h_FmPcd);
  31395. + return ((t_FmPcd*)h_FmPcd)->advancedOffloadSupport;
  31396. +}
  31397. +/*********************** End of inter-module routines ************************/
  31398. +
  31399. +
  31400. +/****************************************/
  31401. +/* API Init unit functions */
  31402. +/****************************************/
  31403. +
  31404. +t_Handle FM_PCD_Config(t_FmPcdParams *p_FmPcdParams)
  31405. +{
  31406. + t_FmPcd *p_FmPcd = NULL;
  31407. + t_FmPhysAddr physicalMuramBase;
  31408. + uint8_t i;
  31409. +
  31410. + SANITY_CHECK_RETURN_VALUE(p_FmPcdParams, E_INVALID_HANDLE,NULL);
  31411. +
  31412. + p_FmPcd = (t_FmPcd *) XX_Malloc(sizeof(t_FmPcd));
  31413. + if (!p_FmPcd)
  31414. + {
  31415. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD"));
  31416. + return NULL;
  31417. + }
  31418. + memset(p_FmPcd, 0, sizeof(t_FmPcd));
  31419. +
  31420. + p_FmPcd->p_FmPcdDriverParam = (t_FmPcdDriverParam *) XX_Malloc(sizeof(t_FmPcdDriverParam));
  31421. + if (!p_FmPcd->p_FmPcdDriverParam)
  31422. + {
  31423. + XX_Free(p_FmPcd);
  31424. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Driver Param"));
  31425. + return NULL;
  31426. + }
  31427. + memset(p_FmPcd->p_FmPcdDriverParam, 0, sizeof(t_FmPcdDriverParam));
  31428. +
  31429. + p_FmPcd->h_Fm = p_FmPcdParams->h_Fm;
  31430. + p_FmPcd->guestId = FmGetGuestId(p_FmPcd->h_Fm);
  31431. + p_FmPcd->h_FmMuram = FmGetMuramHandle(p_FmPcd->h_Fm);
  31432. + if (p_FmPcd->h_FmMuram)
  31433. + {
  31434. + FmGetPhysicalMuramBase(p_FmPcdParams->h_Fm, &physicalMuramBase);
  31435. + p_FmPcd->physicalMuramBase = (uint64_t)((uint64_t)(&physicalMuramBase)->low | ((uint64_t)(&physicalMuramBase)->high << 32));
  31436. + }
  31437. +
  31438. + for (i = 0; i<FM_MAX_NUM_OF_PORTS; i++)
  31439. + p_FmPcd->netEnvs[i].clsPlanGrpId = ILLEGAL_CLS_PLAN;
  31440. +
  31441. + if (p_FmPcdParams->useHostCommand)
  31442. + {
  31443. + t_FmHcParams hcParams;
  31444. +
  31445. + memset(&hcParams, 0, sizeof(hcParams));
  31446. + hcParams.h_Fm = p_FmPcd->h_Fm;
  31447. + hcParams.h_FmPcd = (t_Handle)p_FmPcd;
  31448. + memcpy((uint8_t*)&hcParams.params, (uint8_t*)&p_FmPcdParams->hc, sizeof(t_FmPcdHcParams));
  31449. + p_FmPcd->h_Hc = FmHcConfigAndInit(&hcParams);
  31450. + if (!p_FmPcd->h_Hc)
  31451. + {
  31452. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD HC"));
  31453. + FM_PCD_Free(p_FmPcd);
  31454. + return NULL;
  31455. + }
  31456. + }
  31457. + else if (p_FmPcd->guestId != NCSW_MASTER_ID)
  31458. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("No Host Command defined for a guest partition."));
  31459. +
  31460. + if (p_FmPcdParams->kgSupport)
  31461. + {
  31462. + p_FmPcd->p_FmPcdKg = (t_FmPcdKg *)KgConfig(p_FmPcd, p_FmPcdParams);
  31463. + if (!p_FmPcd->p_FmPcdKg)
  31464. + {
  31465. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Keygen"));
  31466. + FM_PCD_Free(p_FmPcd);
  31467. + return NULL;
  31468. + }
  31469. + }
  31470. +
  31471. + if (p_FmPcdParams->plcrSupport)
  31472. + {
  31473. + p_FmPcd->p_FmPcdPlcr = (t_FmPcdPlcr *)PlcrConfig(p_FmPcd, p_FmPcdParams);
  31474. + if (!p_FmPcd->p_FmPcdPlcr)
  31475. + {
  31476. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Policer"));
  31477. + FM_PCD_Free(p_FmPcd);
  31478. + return NULL;
  31479. + }
  31480. + }
  31481. +
  31482. + if (p_FmPcdParams->prsSupport)
  31483. + {
  31484. + p_FmPcd->p_FmPcdPrs = (t_FmPcdPrs *)PrsConfig(p_FmPcd, p_FmPcdParams);
  31485. + if (!p_FmPcd->p_FmPcdPrs)
  31486. + {
  31487. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD Parser"));
  31488. + FM_PCD_Free(p_FmPcd);
  31489. + return NULL;
  31490. + }
  31491. + }
  31492. +
  31493. + p_FmPcd->h_Spinlock = XX_InitSpinlock();
  31494. + if (!p_FmPcd->h_Spinlock)
  31495. + {
  31496. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD spinlock"));
  31497. + FM_PCD_Free(p_FmPcd);
  31498. + return NULL;
  31499. + }
  31500. + INIT_LIST(&p_FmPcd->freeLocksLst);
  31501. + INIT_LIST(&p_FmPcd->acquiredLocksLst);
  31502. +
  31503. + p_FmPcd->numOfEnabledGuestPartitionsPcds = 0;
  31504. +
  31505. + p_FmPcd->f_Exception = p_FmPcdParams->f_Exception;
  31506. + p_FmPcd->f_FmPcdIndexedException = p_FmPcdParams->f_ExceptionId;
  31507. + p_FmPcd->h_App = p_FmPcdParams->h_App;
  31508. +
  31509. + p_FmPcd->p_CcShadow = NULL;
  31510. + p_FmPcd->ccShadowSize = 0;
  31511. + p_FmPcd->ccShadowAlign = 0;
  31512. +
  31513. + p_FmPcd->h_ShadowSpinlock = XX_InitSpinlock();
  31514. + if (!p_FmPcd->h_ShadowSpinlock)
  31515. + {
  31516. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM PCD shadow spinlock"));
  31517. + FM_PCD_Free(p_FmPcd);
  31518. + return NULL;
  31519. + }
  31520. +
  31521. + return p_FmPcd;
  31522. +}
  31523. +
  31524. +t_Error FM_PCD_Init(t_Handle h_FmPcd)
  31525. +{
  31526. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31527. + t_Error err = E_OK;
  31528. + t_FmPcdIpcMsg msg;
  31529. +
  31530. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  31531. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
  31532. +
  31533. + FM_GetRevision(p_FmPcd->h_Fm, &p_FmPcd->fmRevInfo);
  31534. +
  31535. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  31536. + {
  31537. + memset(p_FmPcd->fmPcdIpcHandlerModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
  31538. + if (Sprint (p_FmPcd->fmPcdIpcHandlerModuleName, "FM_PCD_%d_%d", FmGetId(p_FmPcd->h_Fm), NCSW_MASTER_ID) != 10)
  31539. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  31540. + memset(p_FmPcd->fmPcdModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
  31541. + if (Sprint (p_FmPcd->fmPcdModuleName, "FM_PCD_%d_%d",FmGetId(p_FmPcd->h_Fm), p_FmPcd->guestId) != (p_FmPcd->guestId<10 ? 10:11))
  31542. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  31543. +
  31544. + p_FmPcd->h_IpcSession = XX_IpcInitSession(p_FmPcd->fmPcdIpcHandlerModuleName, p_FmPcd->fmPcdModuleName);
  31545. + if (p_FmPcd->h_IpcSession)
  31546. + {
  31547. + t_FmPcdIpcReply reply;
  31548. + uint32_t replyLength;
  31549. + uint8_t isMasterAlive = 0;
  31550. +
  31551. + memset(&msg, 0, sizeof(msg));
  31552. + memset(&reply, 0, sizeof(reply));
  31553. + msg.msgId = FM_PCD_MASTER_IS_ALIVE;
  31554. + msg.msgBody[0] = p_FmPcd->guestId;
  31555. + blockingFlag = TRUE;
  31556. +
  31557. + do
  31558. + {
  31559. + replyLength = sizeof(uint32_t) + sizeof(isMasterAlive);
  31560. + if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  31561. + (uint8_t*)&msg,
  31562. + sizeof(msg.msgId)+sizeof(p_FmPcd->guestId),
  31563. + (uint8_t*)&reply,
  31564. + &replyLength,
  31565. + IpcMsgCompletionCB,
  31566. + h_FmPcd)) != E_OK)
  31567. + REPORT_ERROR(MAJOR, err, NO_MSG);
  31568. + while (blockingFlag) ;
  31569. + if (replyLength != (sizeof(uint32_t) + sizeof(isMasterAlive)))
  31570. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  31571. + isMasterAlive = *(uint8_t*)(reply.replyBody);
  31572. + } while (!isMasterAlive);
  31573. + }
  31574. + }
  31575. +
  31576. + CHECK_INIT_PARAMETERS(p_FmPcd, CheckFmPcdParameters);
  31577. +
  31578. + if (p_FmPcd->p_FmPcdKg)
  31579. + {
  31580. + err = KgInit(p_FmPcd);
  31581. + if (err)
  31582. + RETURN_ERROR(MAJOR, err, NO_MSG);
  31583. + }
  31584. +
  31585. + if (p_FmPcd->p_FmPcdPlcr)
  31586. + {
  31587. + err = PlcrInit(p_FmPcd);
  31588. + if (err)
  31589. + RETURN_ERROR(MAJOR, err, NO_MSG);
  31590. + }
  31591. +
  31592. + if (p_FmPcd->p_FmPcdPrs)
  31593. + {
  31594. + err = PrsInit(p_FmPcd);
  31595. + if (err)
  31596. + RETURN_ERROR(MAJOR, err, NO_MSG);
  31597. + }
  31598. +
  31599. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  31600. + {
  31601. + /* register to inter-core messaging mechanism */
  31602. + memset(p_FmPcd->fmPcdModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
  31603. + if (Sprint (p_FmPcd->fmPcdModuleName, "FM_PCD_%d_%d",FmGetId(p_FmPcd->h_Fm),NCSW_MASTER_ID) != 10)
  31604. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  31605. + err = XX_IpcRegisterMsgHandler(p_FmPcd->fmPcdModuleName, IpcMsgHandlerCB, p_FmPcd, FM_PCD_MAX_REPLY_SIZE);
  31606. + if (err)
  31607. + RETURN_ERROR(MAJOR, err, NO_MSG);
  31608. + }
  31609. +
  31610. + /* IPv6 Frame-Id used for fragmentation */
  31611. + p_FmPcd->ipv6FrameIdAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram, 4, 4));
  31612. + if (!p_FmPcd->ipv6FrameIdAddr)
  31613. + {
  31614. + FM_PCD_Free(p_FmPcd);
  31615. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for IPv6 Frame-Id"));
  31616. + }
  31617. + IOMemSet32(UINT_TO_PTR(p_FmPcd->ipv6FrameIdAddr), 0, 4);
  31618. +
  31619. + /* CAPWAP Frame-Id used for fragmentation */
  31620. + p_FmPcd->capwapFrameIdAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_FmPcd->h_FmMuram, 2, 4));
  31621. + if (!p_FmPcd->capwapFrameIdAddr)
  31622. + {
  31623. + FM_PCD_Free(p_FmPcd);
  31624. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM allocation for CAPWAP Frame-Id"));
  31625. + }
  31626. + IOMemSet32(UINT_TO_PTR(p_FmPcd->capwapFrameIdAddr), 0, 2);
  31627. +
  31628. + XX_Free(p_FmPcd->p_FmPcdDriverParam);
  31629. + p_FmPcd->p_FmPcdDriverParam = NULL;
  31630. +
  31631. + FmRegisterPcd(p_FmPcd->h_Fm, p_FmPcd);
  31632. +
  31633. + return E_OK;
  31634. +}
  31635. +
  31636. +t_Error FM_PCD_Free(t_Handle h_FmPcd)
  31637. +{
  31638. + t_FmPcd *p_FmPcd =(t_FmPcd *)h_FmPcd;
  31639. + t_Error err = E_OK;
  31640. +
  31641. + if (p_FmPcd->ipv6FrameIdAddr)
  31642. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, UINT_TO_PTR(p_FmPcd->ipv6FrameIdAddr));
  31643. +
  31644. + if (p_FmPcd->capwapFrameIdAddr)
  31645. + FM_MURAM_FreeMem(p_FmPcd->h_FmMuram, UINT_TO_PTR(p_FmPcd->capwapFrameIdAddr));
  31646. +
  31647. + if (p_FmPcd->enabled)
  31648. + FM_PCD_Disable(p_FmPcd);
  31649. +
  31650. + if (p_FmPcd->p_FmPcdDriverParam)
  31651. + {
  31652. + XX_Free(p_FmPcd->p_FmPcdDriverParam);
  31653. + p_FmPcd->p_FmPcdDriverParam = NULL;
  31654. + }
  31655. +
  31656. + if (p_FmPcd->p_FmPcdKg)
  31657. + {
  31658. + if ((err = KgFree(p_FmPcd)) != E_OK)
  31659. + RETURN_ERROR(MINOR, err, NO_MSG);
  31660. + XX_Free(p_FmPcd->p_FmPcdKg);
  31661. + p_FmPcd->p_FmPcdKg = NULL;
  31662. + }
  31663. +
  31664. + if (p_FmPcd->p_FmPcdPlcr)
  31665. + {
  31666. + PlcrFree(p_FmPcd);
  31667. + XX_Free(p_FmPcd->p_FmPcdPlcr);
  31668. + p_FmPcd->p_FmPcdPlcr = NULL;
  31669. + }
  31670. +
  31671. + if (p_FmPcd->p_FmPcdPrs)
  31672. + {
  31673. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  31674. + PrsFree(p_FmPcd);
  31675. + XX_Free(p_FmPcd->p_FmPcdPrs);
  31676. + p_FmPcd->p_FmPcdPrs = NULL;
  31677. + }
  31678. +
  31679. + if (p_FmPcd->h_Hc)
  31680. + {
  31681. + FmHcFree(p_FmPcd->h_Hc);
  31682. + p_FmPcd->h_Hc = NULL;
  31683. + }
  31684. +
  31685. + XX_IpcUnregisterMsgHandler(p_FmPcd->fmPcdModuleName);
  31686. +
  31687. + FmUnregisterPcd(p_FmPcd->h_Fm);
  31688. +
  31689. + ReleaseFreeLocksLst(p_FmPcd);
  31690. +
  31691. + if (p_FmPcd->h_Spinlock)
  31692. + XX_FreeSpinlock(p_FmPcd->h_Spinlock);
  31693. +
  31694. + if (p_FmPcd->h_ShadowSpinlock)
  31695. + XX_FreeSpinlock(p_FmPcd->h_ShadowSpinlock);
  31696. +
  31697. + XX_Free(p_FmPcd);
  31698. +
  31699. + return E_OK;
  31700. +}
  31701. +
  31702. +t_Error FM_PCD_ConfigException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable)
  31703. +{
  31704. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31705. + uint32_t bitMask = 0;
  31706. +
  31707. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  31708. +
  31709. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  31710. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ConfigException - guest mode!"));
  31711. +
  31712. + GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception);
  31713. + if (bitMask)
  31714. + {
  31715. + if (enable)
  31716. + p_FmPcd->exceptions |= bitMask;
  31717. + else
  31718. + p_FmPcd->exceptions &= ~bitMask;
  31719. + }
  31720. + else
  31721. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  31722. +
  31723. + return E_OK;
  31724. +}
  31725. +
  31726. +t_Error FM_PCD_ConfigHcFramesDataMemory(t_Handle h_FmPcd, uint8_t memId)
  31727. +{
  31728. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31729. +
  31730. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  31731. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->h_Hc, E_INVALID_HANDLE);
  31732. +
  31733. + return FmHcSetFramesDataMemory(p_FmPcd->h_Hc, memId);
  31734. +}
  31735. +
  31736. +t_Error FM_PCD_Enable(t_Handle h_FmPcd)
  31737. +{
  31738. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31739. + t_Error err = E_OK;
  31740. +
  31741. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  31742. +
  31743. + if (p_FmPcd->enabled)
  31744. + return E_OK;
  31745. +
  31746. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  31747. + p_FmPcd->h_IpcSession)
  31748. + {
  31749. + uint8_t enabled;
  31750. + t_FmPcdIpcMsg msg;
  31751. + t_FmPcdIpcReply reply;
  31752. + uint32_t replyLength;
  31753. +
  31754. + memset(&reply, 0, sizeof(reply));
  31755. + memset(&msg, 0, sizeof(msg));
  31756. + msg.msgId = FM_PCD_MASTER_IS_ENABLED;
  31757. + replyLength = sizeof(uint32_t) + sizeof(enabled);
  31758. + if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  31759. + (uint8_t*)&msg,
  31760. + sizeof(msg.msgId),
  31761. + (uint8_t*)&reply,
  31762. + &replyLength,
  31763. + NULL,
  31764. + NULL)) != E_OK)
  31765. + RETURN_ERROR(MAJOR, err, NO_MSG);
  31766. + if (replyLength != sizeof(uint32_t) + sizeof(enabled))
  31767. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  31768. + p_FmPcd->enabled = (bool)!!(*(uint8_t*)(reply.replyBody));
  31769. + if (!p_FmPcd->enabled)
  31770. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-PCD master should be enabled first!"));
  31771. +
  31772. + return E_OK;
  31773. + }
  31774. + else if (p_FmPcd->guestId != NCSW_MASTER_ID)
  31775. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  31776. + ("running in guest-mode without IPC!"));
  31777. +
  31778. + if (p_FmPcd->p_FmPcdKg)
  31779. + KgEnable(p_FmPcd);
  31780. +
  31781. + if (p_FmPcd->p_FmPcdPlcr)
  31782. + PlcrEnable(p_FmPcd);
  31783. +
  31784. + if (p_FmPcd->p_FmPcdPrs)
  31785. + PrsEnable(p_FmPcd);
  31786. +
  31787. + p_FmPcd->enabled = TRUE;
  31788. +
  31789. + return E_OK;
  31790. +}
  31791. +
  31792. +t_Error FM_PCD_Disable(t_Handle h_FmPcd)
  31793. +{
  31794. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31795. + t_Error err = E_OK;
  31796. +
  31797. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  31798. +
  31799. + if (!p_FmPcd->enabled)
  31800. + return E_OK;
  31801. +
  31802. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  31803. + p_FmPcd->h_IpcSession)
  31804. + {
  31805. + t_FmPcdIpcMsg msg;
  31806. + t_FmPcdIpcReply reply;
  31807. + uint32_t replyLength;
  31808. +
  31809. + memset(&reply, 0, sizeof(reply));
  31810. + memset(&msg, 0, sizeof(msg));
  31811. + msg.msgId = FM_PCD_GUEST_DISABLE;
  31812. + replyLength = sizeof(uint32_t);
  31813. + if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  31814. + (uint8_t*)&msg,
  31815. + sizeof(msg.msgId),
  31816. + (uint8_t*)&reply,
  31817. + &replyLength,
  31818. + NULL,
  31819. + NULL)) != E_OK)
  31820. + RETURN_ERROR(MAJOR, err, NO_MSG);
  31821. + if (replyLength != sizeof(uint32_t))
  31822. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  31823. + if (reply.error == E_OK)
  31824. + p_FmPcd->enabled = FALSE;
  31825. +
  31826. + return (t_Error)(reply.error);
  31827. + }
  31828. + else if (p_FmPcd->guestId != NCSW_MASTER_ID)
  31829. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  31830. + ("running in guest-mode without IPC!"));
  31831. +
  31832. + if (p_FmPcd->numOfEnabledGuestPartitionsPcds != 0)
  31833. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  31834. + ("Trying to disable a master partition PCD while"
  31835. + "guest partitions are still enabled!"));
  31836. +
  31837. + if (p_FmPcd->p_FmPcdKg)
  31838. + KgDisable(p_FmPcd);
  31839. +
  31840. + if (p_FmPcd->p_FmPcdPlcr)
  31841. + PlcrDisable(p_FmPcd);
  31842. +
  31843. + if (p_FmPcd->p_FmPcdPrs)
  31844. + PrsDisable(p_FmPcd);
  31845. +
  31846. + p_FmPcd->enabled = FALSE;
  31847. +
  31848. + return E_OK;
  31849. +}
  31850. +
  31851. +t_Handle FM_PCD_NetEnvCharacteristicsSet(t_Handle h_FmPcd, t_FmPcdNetEnvParams *p_NetEnvParams)
  31852. +{
  31853. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  31854. + uint32_t intFlags, specialUnits = 0;
  31855. + uint8_t bitId = 0;
  31856. + uint8_t i, j, k;
  31857. + uint8_t netEnvCurrId;
  31858. + uint8_t ipsecAhUnit = 0,ipsecEspUnit = 0;
  31859. + bool ipsecAhExists = FALSE, ipsecEspExists = FALSE, shim1Selected = FALSE;
  31860. + uint8_t hdrNum;
  31861. + t_FmPcdNetEnvParams *p_ModifiedNetEnvParams;
  31862. +
  31863. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_STATE, NULL);
  31864. + SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, NULL);
  31865. + SANITY_CHECK_RETURN_VALUE(p_NetEnvParams, E_NULL_POINTER, NULL);
  31866. +
  31867. + intFlags = FmPcdLock(p_FmPcd);
  31868. +
  31869. + /* find a new netEnv */
  31870. + for (i = 0; i < FM_MAX_NUM_OF_PORTS; i++)
  31871. + if (!p_FmPcd->netEnvs[i].used)
  31872. + break;
  31873. +
  31874. + if (i== FM_MAX_NUM_OF_PORTS)
  31875. + {
  31876. + REPORT_ERROR(MAJOR, E_FULL,("No more than %d netEnv's allowed.", FM_MAX_NUM_OF_PORTS));
  31877. + FmPcdUnlock(p_FmPcd, intFlags);
  31878. + return NULL;
  31879. + }
  31880. +
  31881. + p_FmPcd->netEnvs[i].used = TRUE;
  31882. + FmPcdUnlock(p_FmPcd, intFlags);
  31883. +
  31884. + /* As anyone doesn't have handle of this netEnv yet, no need
  31885. + to protect it with spinlocks */
  31886. +
  31887. + p_ModifiedNetEnvParams = (t_FmPcdNetEnvParams *)XX_Malloc(sizeof(t_FmPcdNetEnvParams));
  31888. + if (!p_ModifiedNetEnvParams)
  31889. + {
  31890. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FmPcdNetEnvParams"));
  31891. + return NULL;
  31892. + }
  31893. +
  31894. + memcpy(p_ModifiedNetEnvParams, p_NetEnvParams, sizeof(t_FmPcdNetEnvParams));
  31895. + p_NetEnvParams = p_ModifiedNetEnvParams;
  31896. +
  31897. + netEnvCurrId = (uint8_t)i;
  31898. +
  31899. + /* clear from previous use */
  31900. + memset(&p_FmPcd->netEnvs[netEnvCurrId].units, 0, FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS * sizeof(t_FmPcdIntDistinctionUnit));
  31901. + memset(&p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs, 0, FM_PCD_MAX_NUM_OF_ALIAS_HDRS * sizeof(t_FmPcdNetEnvAliases));
  31902. + memcpy(&p_FmPcd->netEnvs[netEnvCurrId].units, p_NetEnvParams->units, p_NetEnvParams->numOfDistinctionUnits*sizeof(t_FmPcdIntDistinctionUnit));
  31903. +
  31904. + p_FmPcd->netEnvs[netEnvCurrId].netEnvId = netEnvCurrId;
  31905. + p_FmPcd->netEnvs[netEnvCurrId].h_FmPcd = p_FmPcd;
  31906. +
  31907. + p_FmPcd->netEnvs[netEnvCurrId].clsPlanGrpId = ILLEGAL_CLS_PLAN;
  31908. +
  31909. + /* check that header with opt is not interchanged with the same header */
  31910. + for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  31911. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
  31912. + {
  31913. + for (k = 0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
  31914. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
  31915. + {
  31916. + /* if an option exists, check that other headers are not the same header
  31917. + without option */
  31918. + if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt)
  31919. + {
  31920. + for (j = 0; (j < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
  31921. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[j].hdr != HEADER_TYPE_NONE); j++)
  31922. + {
  31923. + if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[j].hdr == p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr) &&
  31924. + !p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[j].opt)
  31925. + {
  31926. + REPORT_ERROR(MINOR, E_FULL,
  31927. + ("Illegal unit - header with opt may not be interchangeable with the same header without opt"));
  31928. + XX_Free(p_ModifiedNetEnvParams);
  31929. + return NULL;
  31930. + }
  31931. + }
  31932. + }
  31933. + }
  31934. + }
  31935. +
  31936. + /* Specific headers checking */
  31937. + for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  31938. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
  31939. + {
  31940. + for (k = 0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
  31941. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
  31942. + {
  31943. + /* Some headers pairs may not be defined on different units as the parser
  31944. + doesn't distinguish */
  31945. + /* IPSEC_AH and IPSEC_SPI can't be 2 units, */
  31946. + /* check that header with opt is not interchanged with the same header */
  31947. + if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPSEC_AH)
  31948. + {
  31949. + if (ipsecEspExists && (ipsecEspUnit != i))
  31950. + {
  31951. + REPORT_ERROR(MINOR, E_INVALID_STATE, ("HEADER_TYPE_IPSEC_AH and HEADER_TYPE_IPSEC_ESP may not be defined in separate units"));
  31952. + XX_Free(p_ModifiedNetEnvParams);
  31953. + return NULL;
  31954. + }
  31955. + else
  31956. + {
  31957. + ipsecAhUnit = i;
  31958. + ipsecAhExists = TRUE;
  31959. + }
  31960. + }
  31961. + if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPSEC_ESP)
  31962. + {
  31963. + if (ipsecAhExists && (ipsecAhUnit != i))
  31964. + {
  31965. + REPORT_ERROR(MINOR, E_INVALID_STATE, ("HEADER_TYPE_IPSEC_AH and HEADER_TYPE_IPSEC_ESP may not be defined in separate units"));
  31966. + XX_Free(p_ModifiedNetEnvParams);
  31967. + return NULL;
  31968. + }
  31969. + else
  31970. + {
  31971. + ipsecEspUnit = i;
  31972. + ipsecEspExists = TRUE;
  31973. + }
  31974. + }
  31975. + /* ENCAP_ESP */
  31976. + if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_UDP_ENCAP_ESP)
  31977. + {
  31978. + /* IPSec UDP encapsulation is currently set to use SHIM1 */
  31979. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_UDP_ENCAP_ESP;
  31980. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM1;
  31981. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM1;
  31982. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
  31983. + }
  31984. +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  31985. + /* UDP_LITE */
  31986. + if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_UDP_LITE)
  31987. + {
  31988. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_UDP_LITE;
  31989. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_UDP;
  31990. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_UDP;
  31991. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
  31992. + }
  31993. +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  31994. +
  31995. + /* IP FRAG */
  31996. + if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPv4) &&
  31997. + (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt == IPV4_FRAG_1))
  31998. + {
  31999. + /* If IPv4+Frag, we need to set 2 units - SHIM 2 and IPv4. We first set SHIM2, and than check if
  32000. + * IPv4 exists. If so we don't need to set an extra unit
  32001. + * We consider as "having IPv4" any IPv4 without interchangable headers
  32002. + * but including any options. */
  32003. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_IPv4;
  32004. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].opt = IPV4_FRAG_1;
  32005. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM2;
  32006. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM2;
  32007. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
  32008. +
  32009. + /* check if IPv4 header exists by itself */
  32010. + if (FmPcdNetEnvGetUnitId(p_FmPcd, netEnvCurrId, HEADER_TYPE_IPv4, FALSE, 0) == FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  32011. + {
  32012. + p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits].hdrs[0].hdr = HEADER_TYPE_IPv4;
  32013. + p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits++].hdrs[0].opt = 0;
  32014. + }
  32015. + }
  32016. + if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_IPv6) &&
  32017. + (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt == IPV6_FRAG_1))
  32018. + {
  32019. + /* If IPv6+Frag, we need to set 2 units - SHIM 2 and IPv6. We first set SHIM2, and than check if
  32020. + * IPv4 exists. If so we don't need to set an extra unit
  32021. + * We consider as "having IPv6" any IPv6 without interchangable headers
  32022. + * but including any options. */
  32023. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_IPv6;
  32024. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].opt = IPV6_FRAG_1;
  32025. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM2;
  32026. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM2;
  32027. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
  32028. +
  32029. + /* check if IPv6 header exists by itself */
  32030. + if (FmPcdNetEnvGetUnitId(p_FmPcd, netEnvCurrId, HEADER_TYPE_IPv6, FALSE, 0) == FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  32031. + {
  32032. + p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits].hdrs[0].hdr = HEADER_TYPE_IPv6;
  32033. + p_FmPcd->netEnvs[netEnvCurrId].units[p_NetEnvParams->numOfDistinctionUnits++].hdrs[0].opt = 0;
  32034. + }
  32035. + }
  32036. +#if (DPAA_VERSION >= 11)
  32037. + /* CAPWAP FRAG */
  32038. + if ((p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr == HEADER_TYPE_CAPWAP) &&
  32039. + (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt == CAPWAP_FRAG_1))
  32040. + {
  32041. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].hdr = HEADER_TYPE_CAPWAP;
  32042. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits].opt = CAPWAP_FRAG_1;
  32043. + p_FmPcd->netEnvs[netEnvCurrId].aliasHdrs[specialUnits++].aliasHdr = HEADER_TYPE_USER_DEFINED_SHIM2;
  32044. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr = HEADER_TYPE_USER_DEFINED_SHIM2;
  32045. + p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].opt = 0;
  32046. + }
  32047. +#endif /* (DPAA_VERSION >= 11) */
  32048. + }
  32049. + }
  32050. +
  32051. + /* if private header (shim), check that no other headers specified */
  32052. + for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  32053. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
  32054. + {
  32055. + if (IS_PRIVATE_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
  32056. + if (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[1].hdr != HEADER_TYPE_NONE)
  32057. + {
  32058. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("SHIM header may not be interchanged with other headers"));
  32059. + XX_Free(p_ModifiedNetEnvParams);
  32060. + return NULL;
  32061. + }
  32062. + }
  32063. +
  32064. + for (i = 0; i < p_NetEnvParams->numOfDistinctionUnits; i++)
  32065. + {
  32066. + if (IS_PRIVATE_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
  32067. + switch (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr)
  32068. + {
  32069. + case (HEADER_TYPE_USER_DEFINED_SHIM1):
  32070. + if (shim1Selected)
  32071. + {
  32072. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("SHIM header cannot be selected with UDP_IPSEC_ESP"));
  32073. + XX_Free(p_ModifiedNetEnvParams);
  32074. + return NULL;
  32075. + }
  32076. + shim1Selected = TRUE;
  32077. + p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i] = 0x00000001;
  32078. + break;
  32079. + case (HEADER_TYPE_USER_DEFINED_SHIM2):
  32080. + p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i] = 0x00000002;
  32081. + break;
  32082. + default:
  32083. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Requested SHIM not supported"));
  32084. + }
  32085. + else
  32086. + {
  32087. + p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i] = (uint32_t)(0x80000000 >> bitId++);
  32088. +
  32089. + if (IS_SPECIAL_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
  32090. + p_FmPcd->netEnvs[netEnvCurrId].macsecVector = p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i];
  32091. + }
  32092. + }
  32093. +
  32094. + /* define a set of hardware parser LCV's according to the defined netenv */
  32095. +
  32096. + /* set an array of LCV's for each header in the netEnv */
  32097. + for (i = 0; (i < FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  32098. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr != HEADER_TYPE_NONE); i++)
  32099. + {
  32100. + /* private headers have no LCV in the hard parser */
  32101. + if (!IS_PRIVATE_HEADER(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[0].hdr))
  32102. + {
  32103. + for (k = 0; (k < FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
  32104. + && (p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr != HEADER_TYPE_NONE); k++)
  32105. + {
  32106. + hdrNum = GetPrsHdrNum(p_FmPcd->netEnvs[netEnvCurrId].units[i].hdrs[k].hdr);
  32107. + if ((hdrNum == ILLEGAL_HDR_NUM) || (hdrNum == NO_HDR_NUM))
  32108. + {
  32109. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, NO_MSG);
  32110. + XX_Free(p_ModifiedNetEnvParams);
  32111. + return NULL;
  32112. + }
  32113. + p_FmPcd->netEnvs[netEnvCurrId].lcvs[hdrNum] |= p_FmPcd->netEnvs[netEnvCurrId].unitsVectors[i];
  32114. + }
  32115. + }
  32116. + }
  32117. + XX_Free(p_ModifiedNetEnvParams);
  32118. +
  32119. + p_FmPcd->netEnvs[netEnvCurrId].h_Spinlock = XX_InitSpinlock();
  32120. + if (!p_FmPcd->netEnvs[netEnvCurrId].h_Spinlock)
  32121. + {
  32122. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Pcd NetEnv spinlock"));
  32123. + return NULL;
  32124. + }
  32125. + return &p_FmPcd->netEnvs[netEnvCurrId];
  32126. +}
  32127. +
  32128. +t_Error FM_PCD_NetEnvCharacteristicsDelete(t_Handle h_NetEnv)
  32129. +{
  32130. + t_FmPcdNetEnv *p_NetEnv = (t_FmPcdNetEnv*)h_NetEnv;
  32131. + t_FmPcd *p_FmPcd = p_NetEnv->h_FmPcd;
  32132. + uint32_t intFlags;
  32133. + uint8_t netEnvId = p_NetEnv->netEnvId;
  32134. +
  32135. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_STATE);
  32136. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
  32137. +
  32138. + /* check that no port is bound to this netEnv */
  32139. + if (p_FmPcd->netEnvs[netEnvId].owners)
  32140. + {
  32141. + RETURN_ERROR(MINOR, E_INVALID_STATE,
  32142. + ("Trying to delete a netEnv that has ports/schemes/trees/clsPlanGrps bound to"));
  32143. + }
  32144. +
  32145. + intFlags = FmPcdLock(p_FmPcd);
  32146. +
  32147. + p_FmPcd->netEnvs[netEnvId].used = FALSE;
  32148. + p_FmPcd->netEnvs[netEnvId].clsPlanGrpId = ILLEGAL_CLS_PLAN;
  32149. +
  32150. + memset(p_FmPcd->netEnvs[netEnvId].units, 0, sizeof(t_FmPcdIntDistinctionUnit)*FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  32151. + memset(p_FmPcd->netEnvs[netEnvId].unitsVectors, 0, sizeof(uint32_t)*FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  32152. + memset(p_FmPcd->netEnvs[netEnvId].lcvs, 0, sizeof(uint32_t)*FM_PCD_PRS_NUM_OF_HDRS);
  32153. +
  32154. + if (p_FmPcd->netEnvs[netEnvId].h_Spinlock)
  32155. + XX_FreeSpinlock(p_FmPcd->netEnvs[netEnvId].h_Spinlock);
  32156. +
  32157. + FmPcdUnlock(p_FmPcd, intFlags);
  32158. + return E_OK;
  32159. +}
  32160. +
  32161. +void FM_PCD_HcTxConf(t_Handle h_FmPcd, t_DpaaFD *p_Fd)
  32162. +{
  32163. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  32164. +
  32165. + SANITY_CHECK_RETURN(h_FmPcd, E_INVALID_STATE);
  32166. +
  32167. + FmHcTxConf(p_FmPcd->h_Hc, p_Fd);
  32168. +}
  32169. +
  32170. +t_Error FM_PCD_SetAdvancedOffloadSupport(t_Handle h_FmPcd)
  32171. +{
  32172. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  32173. + t_FmCtrlCodeRevisionInfo revInfo;
  32174. + t_Error err;
  32175. +
  32176. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  32177. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
  32178. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->enabled, E_INVALID_STATE);
  32179. +
  32180. + if ((err = FM_GetFmanCtrlCodeRevision(p_FmPcd->h_Fm, &revInfo)) != E_OK)
  32181. + {
  32182. + DBG(WARNING, ("FM in guest-mode without IPC, can't validate firmware revision."));
  32183. + revInfo.packageRev = IP_OFFLOAD_PACKAGE_NUMBER;
  32184. + }
  32185. + if (!IS_OFFLOAD_PACKAGE(revInfo.packageRev))
  32186. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Fman ctrl code package"));
  32187. +
  32188. + if (!p_FmPcd->h_Hc)
  32189. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("HC must be initialized in this mode"));
  32190. +
  32191. + p_FmPcd->advancedOffloadSupport = TRUE;
  32192. +
  32193. + return E_OK;
  32194. +}
  32195. +
  32196. +uint32_t FM_PCD_GetCounter(t_Handle h_FmPcd, e_FmPcdCounters counter)
  32197. +{
  32198. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  32199. + uint32_t outCounter = 0;
  32200. + t_Error err;
  32201. +
  32202. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, 0);
  32203. + SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, 0);
  32204. +
  32205. + switch (counter)
  32206. + {
  32207. + case (e_FM_PCD_KG_COUNTERS_TOTAL):
  32208. + if (!p_FmPcd->p_FmPcdKg)
  32209. + {
  32210. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("KeyGen is not activated"));
  32211. + return 0;
  32212. + }
  32213. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  32214. + !p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs &&
  32215. + !p_FmPcd->h_IpcSession)
  32216. + {
  32217. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  32218. + ("running in guest-mode without neither IPC nor mapped register!"));
  32219. + return 0;
  32220. + }
  32221. + break;
  32222. +
  32223. + case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
  32224. + case (e_FM_PCD_PLCR_COUNTERS_RED):
  32225. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
  32226. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
  32227. + case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
  32228. + case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
  32229. + if (!p_FmPcd->p_FmPcdPlcr)
  32230. + {
  32231. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Policer is not activated"));
  32232. + return 0;
  32233. + }
  32234. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  32235. + !p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs &&
  32236. + !p_FmPcd->h_IpcSession)
  32237. + {
  32238. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  32239. + ("running in \"guest-mode\" without neither IPC nor mapped register!"));
  32240. + return 0;
  32241. + }
  32242. +
  32243. + /* check that counters are enabled */
  32244. + if (p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs &&
  32245. + !(GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr) & FM_PCD_PLCR_GCR_STEN))
  32246. + {
  32247. + REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter was not enabled"));
  32248. + return 0;
  32249. + }
  32250. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs ||
  32251. + ((p_FmPcd->guestId != NCSW_MASTER_ID) && p_FmPcd->h_IpcSession));
  32252. + break;
  32253. +
  32254. + case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
  32255. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
  32256. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
  32257. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
  32258. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
  32259. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
  32260. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
  32261. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
  32262. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
  32263. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
  32264. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
  32265. + case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
  32266. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
  32267. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
  32268. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
  32269. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
  32270. + case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
  32271. + if (!p_FmPcd->p_FmPcdPrs)
  32272. + {
  32273. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Parser is not activated"));
  32274. + return 0;
  32275. + }
  32276. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  32277. + !p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs &&
  32278. + !p_FmPcd->h_IpcSession)
  32279. + {
  32280. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  32281. + ("running in guest-mode without neither IPC nor mapped register!"));
  32282. + return 0;
  32283. + }
  32284. + break;
  32285. + default:
  32286. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Unsupported type of counter"));
  32287. + return 0;
  32288. + }
  32289. +
  32290. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  32291. + p_FmPcd->h_IpcSession)
  32292. + {
  32293. + t_FmPcdIpcMsg msg;
  32294. + t_FmPcdIpcReply reply;
  32295. + uint32_t replyLength;
  32296. +
  32297. + memset(&msg, 0, sizeof(msg));
  32298. + memset(&reply, 0, sizeof(reply));
  32299. + msg.msgId = FM_PCD_GET_COUNTER;
  32300. + memcpy(msg.msgBody, (uint8_t *)&counter, sizeof(uint32_t));
  32301. + replyLength = sizeof(uint32_t) + sizeof(uint32_t);
  32302. + if ((err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  32303. + (uint8_t*)&msg,
  32304. + sizeof(msg.msgId) +sizeof(uint32_t),
  32305. + (uint8_t*)&reply,
  32306. + &replyLength,
  32307. + NULL,
  32308. + NULL)) != E_OK)
  32309. + RETURN_ERROR(MAJOR, err, NO_MSG);
  32310. + if (replyLength != sizeof(uint32_t) + sizeof(uint32_t))
  32311. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  32312. +
  32313. + memcpy((uint8_t*)&outCounter, reply.replyBody, sizeof(uint32_t));
  32314. + return outCounter;
  32315. + }
  32316. +
  32317. + switch (counter)
  32318. + {
  32319. + /* Parser statistics */
  32320. + case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
  32321. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pds);
  32322. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
  32323. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rrs);
  32324. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
  32325. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rrs);
  32326. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
  32327. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rrs);
  32328. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
  32329. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srrs);
  32330. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
  32331. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rres);
  32332. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
  32333. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rres);
  32334. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
  32335. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rres);
  32336. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
  32337. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srres);
  32338. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
  32339. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spcs);
  32340. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
  32341. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spscs);
  32342. + case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
  32343. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_hxscs);
  32344. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
  32345. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrcs);
  32346. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
  32347. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrscs);
  32348. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
  32349. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwcs);
  32350. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
  32351. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwscs);
  32352. + case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
  32353. + return GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_fcscs);
  32354. + case (e_FM_PCD_KG_COUNTERS_TOTAL):
  32355. + return GET_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_tpc);
  32356. +
  32357. + /* Policer statistics */
  32358. + case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
  32359. + return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ypcnt);
  32360. + case (e_FM_PCD_PLCR_COUNTERS_RED):
  32361. + return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rpcnt);
  32362. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
  32363. + return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rrpcnt);
  32364. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
  32365. + return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rypcnt);
  32366. + case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
  32367. + return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_tpcnt);
  32368. + case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
  32369. + return GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_flmcnt);
  32370. + }
  32371. + return 0;
  32372. +}
  32373. +
  32374. +t_Error FM_PCD_SetException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable)
  32375. +{
  32376. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  32377. + uint32_t bitMask = 0, tmpReg;
  32378. +
  32379. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  32380. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
  32381. +
  32382. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  32383. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_SetException - guest mode!"));
  32384. +
  32385. + GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception);
  32386. +
  32387. + if (bitMask)
  32388. + {
  32389. + if (enable)
  32390. + p_FmPcd->exceptions |= bitMask;
  32391. + else
  32392. + p_FmPcd->exceptions &= ~bitMask;
  32393. +
  32394. + switch (exception)
  32395. + {
  32396. + case (e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC):
  32397. + case (e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW):
  32398. + if (!p_FmPcd->p_FmPcdKg)
  32399. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - keygen is not working"));
  32400. + break;
  32401. + case (e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC):
  32402. + case (e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR):
  32403. + case (e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE):
  32404. + case (e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE):
  32405. + if (!p_FmPcd->p_FmPcdPlcr)
  32406. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - policer is not working"));
  32407. + break;
  32408. + case (e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC):
  32409. + case (e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC):
  32410. + if (!p_FmPcd->p_FmPcdPrs)
  32411. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - parser is not working"));
  32412. + break;
  32413. + }
  32414. +
  32415. + switch (exception)
  32416. + {
  32417. + case (e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC):
  32418. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer);
  32419. + if (enable)
  32420. + tmpReg |= FM_EX_KG_DOUBLE_ECC;
  32421. + else
  32422. + tmpReg &= ~FM_EX_KG_DOUBLE_ECC;
  32423. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer, tmpReg);
  32424. + break;
  32425. + case (e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW):
  32426. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer);
  32427. + if (enable)
  32428. + tmpReg |= FM_EX_KG_KEYSIZE_OVERFLOW;
  32429. + else
  32430. + tmpReg &= ~FM_EX_KG_KEYSIZE_OVERFLOW;
  32431. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_eeer, tmpReg);
  32432. + break;
  32433. + case (e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC):
  32434. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_perer);
  32435. + if (enable)
  32436. + tmpReg |= FM_PCD_PRS_DOUBLE_ECC;
  32437. + else
  32438. + tmpReg &= ~FM_PCD_PRS_DOUBLE_ECC;
  32439. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_perer, tmpReg);
  32440. + break;
  32441. + case (e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC):
  32442. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pever);
  32443. + if (enable)
  32444. + tmpReg |= FM_PCD_PRS_SINGLE_ECC;
  32445. + else
  32446. + tmpReg &= ~FM_PCD_PRS_SINGLE_ECC;
  32447. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pever, tmpReg);
  32448. + break;
  32449. + case (e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC):
  32450. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier);
  32451. + if (enable)
  32452. + tmpReg |= FM_PCD_PLCR_DOUBLE_ECC;
  32453. + else
  32454. + tmpReg &= ~FM_PCD_PLCR_DOUBLE_ECC;
  32455. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier, tmpReg);
  32456. + break;
  32457. + case (e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR):
  32458. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier);
  32459. + if (enable)
  32460. + tmpReg |= FM_PCD_PLCR_INIT_ENTRY_ERROR;
  32461. + else
  32462. + tmpReg &= ~FM_PCD_PLCR_INIT_ENTRY_ERROR;
  32463. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier, tmpReg);
  32464. + break;
  32465. + case (e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE):
  32466. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier);
  32467. + if (enable)
  32468. + tmpReg |= FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE;
  32469. + else
  32470. + tmpReg &= ~FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE;
  32471. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier, tmpReg);
  32472. + break;
  32473. + case (e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE):
  32474. + tmpReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier);
  32475. + if (enable)
  32476. + tmpReg |= FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE;
  32477. + else
  32478. + tmpReg &= ~FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE;
  32479. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier, tmpReg);
  32480. + break;
  32481. + }
  32482. + /* for ECC exceptions driver automatically enables ECC mechanism, if disabled.
  32483. + Driver may disable them automatically, depending on driver's status */
  32484. + if (enable && ((exception == e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC) |
  32485. + (exception == e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC) |
  32486. + (exception == e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC) |
  32487. + (exception == e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC)))
  32488. + FmEnableRamsEcc(p_FmPcd->h_Fm);
  32489. + if (!enable && ((exception == e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC) |
  32490. + (exception == e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC) |
  32491. + (exception == e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC) |
  32492. + (exception == e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC)))
  32493. + FmDisableRamsEcc(p_FmPcd->h_Fm);
  32494. + }
  32495. +
  32496. + return E_OK;
  32497. +}
  32498. +
  32499. +t_Error FM_PCD_ForceIntr (t_Handle h_FmPcd, e_FmPcdExceptions exception)
  32500. +{
  32501. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  32502. +
  32503. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  32504. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
  32505. +
  32506. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  32507. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ForceIntr - guest mode!"));
  32508. +
  32509. + switch (exception)
  32510. + {
  32511. + case (e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC):
  32512. + case (e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW):
  32513. + if (!p_FmPcd->p_FmPcdKg)
  32514. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - keygen is not working"));
  32515. + break;
  32516. + case (e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC):
  32517. + case (e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR):
  32518. + case (e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE):
  32519. + case (e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE):
  32520. + if (!p_FmPcd->p_FmPcdPlcr)
  32521. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt - policer is not working"));
  32522. + break;
  32523. + case (e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC):
  32524. + case (e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC):
  32525. + if (!p_FmPcd->p_FmPcdPrs)
  32526. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Can't ask for this interrupt -parsrer is not working"));
  32527. + break;
  32528. + default:
  32529. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid interrupt requested"));
  32530. + }
  32531. + switch (exception)
  32532. + {
  32533. + case e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC:
  32534. + if (!(p_FmPcd->exceptions & FM_PCD_EX_PRS_DOUBLE_ECC))
  32535. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32536. + break;
  32537. + case e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC:
  32538. + if (!(p_FmPcd->exceptions & FM_PCD_EX_PRS_SINGLE_ECC))
  32539. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32540. + break;
  32541. + case e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC:
  32542. + if (!(p_FmPcd->exceptions & FM_EX_KG_DOUBLE_ECC))
  32543. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32544. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_feer, FM_EX_KG_DOUBLE_ECC);
  32545. + break;
  32546. + case e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW:
  32547. + if (!(p_FmPcd->exceptions & FM_EX_KG_KEYSIZE_OVERFLOW))
  32548. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32549. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_feer, FM_EX_KG_KEYSIZE_OVERFLOW);
  32550. + break;
  32551. + case e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC:
  32552. + if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_DOUBLE_ECC))
  32553. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32554. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr, FM_PCD_PLCR_DOUBLE_ECC);
  32555. + break;
  32556. + case e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR:
  32557. + if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_INIT_ENTRY_ERROR))
  32558. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32559. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr, FM_PCD_PLCR_INIT_ENTRY_ERROR);
  32560. + break;
  32561. + case e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE:
  32562. + if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE))
  32563. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32564. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr, FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE);
  32565. + break;
  32566. + case e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE:
  32567. + if (!(p_FmPcd->exceptions & FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE))
  32568. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  32569. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr, FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE);
  32570. + break;
  32571. + }
  32572. +
  32573. + return E_OK;
  32574. +}
  32575. +
  32576. +
  32577. +t_Error FM_PCD_ModifyCounter(t_Handle h_FmPcd, e_FmPcdCounters counter, uint32_t value)
  32578. +{
  32579. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  32580. +
  32581. + SANITY_CHECK_RETURN_ERROR(h_FmPcd, E_INVALID_HANDLE);
  32582. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
  32583. +
  32584. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  32585. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ModifyCounter - guest mode!"));
  32586. +
  32587. + switch (counter)
  32588. + {
  32589. + case (e_FM_PCD_KG_COUNTERS_TOTAL):
  32590. + if (!p_FmPcd->p_FmPcdKg)
  32591. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Invalid counters - KeyGen is not working"));
  32592. + break;
  32593. + case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
  32594. + case (e_FM_PCD_PLCR_COUNTERS_RED):
  32595. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
  32596. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
  32597. + case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
  32598. + case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
  32599. + if (!p_FmPcd->p_FmPcdPlcr)
  32600. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Invalid counters - Policer is not working"));
  32601. + if (!(GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr) & FM_PCD_PLCR_GCR_STEN))
  32602. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Requested counter was not enabled"));
  32603. + break;
  32604. + case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
  32605. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
  32606. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
  32607. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
  32608. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
  32609. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
  32610. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
  32611. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
  32612. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
  32613. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
  32614. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
  32615. + case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
  32616. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
  32617. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
  32618. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
  32619. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
  32620. + case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
  32621. + if (!p_FmPcd->p_FmPcdPrs)
  32622. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Unsupported type of counter"));
  32623. + break;
  32624. + default:
  32625. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Unsupported type of counter"));
  32626. + }
  32627. + switch (counter)
  32628. + {
  32629. + case (e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH):
  32630. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_pds, value);
  32631. + break;
  32632. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED):
  32633. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rrs, value);
  32634. + break;
  32635. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED):
  32636. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rrs, value);
  32637. + break;
  32638. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED):
  32639. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rrs, value);
  32640. + break;
  32641. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED):
  32642. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srrs, value);
  32643. + break;
  32644. + case (e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR):
  32645. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l2rres, value);
  32646. + break;
  32647. + case (e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR):
  32648. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l3rres, value);
  32649. + break;
  32650. + case (e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR):
  32651. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_l4rres, value);
  32652. + break;
  32653. + case (e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR):
  32654. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_srres, value);
  32655. + break;
  32656. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES):
  32657. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spcs, value);
  32658. + break;
  32659. + case (e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES):
  32660. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_spscs, value);
  32661. + break;
  32662. + case (e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES):
  32663. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_hxscs, value);
  32664. + break;
  32665. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES):
  32666. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrcs, value);
  32667. + break;
  32668. + case (e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES):
  32669. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mrscs, value);
  32670. + break;
  32671. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES):
  32672. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwcs, value);
  32673. + break;
  32674. + case (e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES):
  32675. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_mwscs, value);
  32676. + break;
  32677. + case (e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES):
  32678. + WRITE_UINT32(p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs->fmpr_fcscs, value);
  32679. + break;
  32680. + case (e_FM_PCD_KG_COUNTERS_TOTAL):
  32681. + WRITE_UINT32(p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs->fmkg_tpc,value);
  32682. + break;
  32683. +
  32684. + /*Policer counters*/
  32685. + case (e_FM_PCD_PLCR_COUNTERS_YELLOW):
  32686. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ypcnt, value);
  32687. + break;
  32688. + case (e_FM_PCD_PLCR_COUNTERS_RED):
  32689. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rpcnt, value);
  32690. + break;
  32691. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED):
  32692. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rrpcnt, value);
  32693. + break;
  32694. + case (e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW):
  32695. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_rypcnt, value);
  32696. + break;
  32697. + case (e_FM_PCD_PLCR_COUNTERS_TOTAL):
  32698. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_tpcnt, value);
  32699. + break;
  32700. + case (e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH):
  32701. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_flmcnt, value);
  32702. + break;
  32703. + }
  32704. +
  32705. + return E_OK;
  32706. +}
  32707. +
  32708. +t_Handle FM_PCD_GetHcPort(t_Handle h_FmPcd)
  32709. +{
  32710. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  32711. + return FmHcGetPort(p_FmPcd->h_Hc);
  32712. +}
  32713. +
  32714. --- /dev/null
  32715. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd.h
  32716. @@ -0,0 +1,543 @@
  32717. +/*
  32718. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  32719. + *
  32720. + * Redistribution and use in source and binary forms, with or without
  32721. + * modification, are permitted provided that the following conditions are met:
  32722. + * * Redistributions of source code must retain the above copyright
  32723. + * notice, this list of conditions and the following disclaimer.
  32724. + * * Redistributions in binary form must reproduce the above copyright
  32725. + * notice, this list of conditions and the following disclaimer in the
  32726. + * documentation and/or other materials provided with the distribution.
  32727. + * * Neither the name of Freescale Semiconductor nor the
  32728. + * names of its contributors may be used to endorse or promote products
  32729. + * derived from this software without specific prior written permission.
  32730. + *
  32731. + *
  32732. + * ALTERNATIVELY, this software may be distributed under the terms of the
  32733. + * GNU General Public License ("GPL") as published by the Free Software
  32734. + * Foundation, either version 2 of that License or (at your option) any
  32735. + * later version.
  32736. + *
  32737. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  32738. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  32739. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32740. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  32741. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  32742. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  32743. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  32744. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32745. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32746. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32747. + */
  32748. +
  32749. +
  32750. +/******************************************************************************
  32751. + @File fm_pcd.h
  32752. +
  32753. + @Description FM PCD ...
  32754. +*//***************************************************************************/
  32755. +#ifndef __FM_PCD_H
  32756. +#define __FM_PCD_H
  32757. +
  32758. +#include "std_ext.h"
  32759. +#include "error_ext.h"
  32760. +#include "list_ext.h"
  32761. +#include "fm_pcd_ext.h"
  32762. +#include "fm_common.h"
  32763. +#include "fsl_fman_prs.h"
  32764. +#include "fsl_fman_kg.h"
  32765. +
  32766. +#define __ERR_MODULE__ MODULE_FM_PCD
  32767. +
  32768. +
  32769. +/****************************/
  32770. +/* Defaults */
  32771. +/****************************/
  32772. +#define DEFAULT_plcrAutoRefresh FALSE
  32773. +#define DEFAULT_fmPcdKgErrorExceptions (FM_EX_KG_DOUBLE_ECC | FM_EX_KG_KEYSIZE_OVERFLOW)
  32774. +#define DEFAULT_fmPcdPlcrErrorExceptions (FM_PCD_EX_PLCR_DOUBLE_ECC | FM_PCD_EX_PLCR_INIT_ENTRY_ERROR)
  32775. +#define DEFAULT_fmPcdPlcrExceptions 0
  32776. +#define DEFAULT_fmPcdPrsErrorExceptions (FM_PCD_EX_PRS_DOUBLE_ECC)
  32777. +
  32778. +#define DEFAULT_fmPcdPrsExceptions FM_PCD_EX_PRS_SINGLE_ECC
  32779. +#define DEFAULT_numOfUsedProfilesPerWindow 16
  32780. +#define DEFAULT_numOfSharedPlcrProfiles 4
  32781. +
  32782. +/****************************/
  32783. +/* Network defines */
  32784. +/****************************/
  32785. +#define UDP_HEADER_SIZE 8
  32786. +
  32787. +#define ESP_SPI_OFFSET 0
  32788. +#define ESP_SPI_SIZE 4
  32789. +#define ESP_SEQ_NUM_OFFSET ESP_SPI_SIZE
  32790. +#define ESP_SEQ_NUM_SIZE 4
  32791. +
  32792. +/****************************/
  32793. +/* General defines */
  32794. +/****************************/
  32795. +#define ILLEGAL_CLS_PLAN 0xff
  32796. +#define ILLEGAL_NETENV 0xff
  32797. +
  32798. +#define FM_PCD_MAX_NUM_OF_ALIAS_HDRS 3
  32799. +
  32800. +/****************************/
  32801. +/* Error defines */
  32802. +/****************************/
  32803. +
  32804. +#define FM_PCD_EX_PLCR_DOUBLE_ECC 0x20000000
  32805. +#define FM_PCD_EX_PLCR_INIT_ENTRY_ERROR 0x10000000
  32806. +#define FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE 0x08000000
  32807. +#define FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE 0x04000000
  32808. +
  32809. +#define GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception) \
  32810. +switch (exception){ \
  32811. + case e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC: \
  32812. + bitMask = FM_EX_KG_DOUBLE_ECC; break; \
  32813. + case e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC: \
  32814. + bitMask = FM_PCD_EX_PLCR_DOUBLE_ECC; break; \
  32815. + case e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW: \
  32816. + bitMask = FM_EX_KG_KEYSIZE_OVERFLOW; break; \
  32817. + case e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR: \
  32818. + bitMask = FM_PCD_EX_PLCR_INIT_ENTRY_ERROR; break; \
  32819. + case e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE: \
  32820. + bitMask = FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE; break; \
  32821. + case e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE: \
  32822. + bitMask = FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE; break; \
  32823. + case e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC: \
  32824. + bitMask = FM_PCD_EX_PRS_DOUBLE_ECC; break; \
  32825. + case e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC: \
  32826. + bitMask = FM_PCD_EX_PRS_SINGLE_ECC; break; \
  32827. + default: bitMask = 0;break;}
  32828. +
  32829. +/***********************************************************************/
  32830. +/* Policer defines */
  32831. +/***********************************************************************/
  32832. +#define FM_PCD_PLCR_GCR_STEN 0x40000000
  32833. +#define FM_PCD_PLCR_DOUBLE_ECC 0x80000000
  32834. +#define FM_PCD_PLCR_INIT_ENTRY_ERROR 0x40000000
  32835. +#define FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE 0x80000000
  32836. +#define FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE 0x40000000
  32837. +
  32838. +/***********************************************************************/
  32839. +/* Memory map */
  32840. +/***********************************************************************/
  32841. +#if defined(__MWERKS__) && !defined(__GNUC__)
  32842. +#pragma pack(push,1)
  32843. +#endif /* defined(__MWERKS__) && ... */
  32844. +
  32845. +
  32846. +typedef struct {
  32847. +/* General Configuration and Status Registers */
  32848. + volatile uint32_t fmpl_gcr; /* 0x000 FMPL_GCR - FM Policer General Configuration */
  32849. + volatile uint32_t fmpl_gsr; /* 0x004 FMPL_GSR - FM Policer Global Status Register */
  32850. + volatile uint32_t fmpl_evr; /* 0x008 FMPL_EVR - FM Policer Event Register */
  32851. + volatile uint32_t fmpl_ier; /* 0x00C FMPL_IER - FM Policer Interrupt Enable Register */
  32852. + volatile uint32_t fmpl_ifr; /* 0x010 FMPL_IFR - FM Policer Interrupt Force Register */
  32853. + volatile uint32_t fmpl_eevr; /* 0x014 FMPL_EEVR - FM Policer Error Event Register */
  32854. + volatile uint32_t fmpl_eier; /* 0x018 FMPL_EIER - FM Policer Error Interrupt Enable Register */
  32855. + volatile uint32_t fmpl_eifr; /* 0x01C FMPL_EIFR - FM Policer Error Interrupt Force Register */
  32856. +/* Global Statistic Counters */
  32857. + volatile uint32_t fmpl_rpcnt; /* 0x020 FMPL_RPC - FM Policer RED Packets Counter */
  32858. + volatile uint32_t fmpl_ypcnt; /* 0x024 FMPL_YPC - FM Policer YELLOW Packets Counter */
  32859. + volatile uint32_t fmpl_rrpcnt; /* 0x028 FMPL_RRPC - FM Policer Recolored RED Packet Counter */
  32860. + volatile uint32_t fmpl_rypcnt; /* 0x02C FMPL_RYPC - FM Policer Recolored YELLOW Packet Counter */
  32861. + volatile uint32_t fmpl_tpcnt; /* 0x030 FMPL_TPC - FM Policer Total Packet Counter */
  32862. + volatile uint32_t fmpl_flmcnt; /* 0x034 FMPL_FLMC - FM Policer Frame Length Mismatch Counter */
  32863. + volatile uint32_t fmpl_res0[21]; /* 0x038 - 0x08B Reserved */
  32864. +/* Profile RAM Access Registers */
  32865. + volatile uint32_t fmpl_par; /* 0x08C FMPL_PAR - FM Policer Profile Action Register*/
  32866. + t_FmPcdPlcrProfileRegs profileRegs;
  32867. +/* Error Capture Registers */
  32868. + volatile uint32_t fmpl_serc; /* 0x100 FMPL_SERC - FM Policer Soft Error Capture */
  32869. + volatile uint32_t fmpl_upcr; /* 0x104 FMPL_UPCR - FM Policer Uninitialized Profile Capture Register */
  32870. + volatile uint32_t fmpl_res2; /* 0x108 Reserved */
  32871. +/* Debug Registers */
  32872. + volatile uint32_t fmpl_res3[61]; /* 0x10C-0x200 Reserved Debug*/
  32873. +/* Profile Selection Mapping Registers Per Port-ID (n=1-11, 16) */
  32874. + volatile uint32_t fmpl_dpmr; /* 0x200 FMPL_DPMR - FM Policer Default Mapping Register */
  32875. + volatile uint32_t fmpl_pmr[63]; /*+default 0x204-0x2FF FMPL_PMR1 - FMPL_PMR63, - FM Policer Profile Mapping Registers.
  32876. + (for port-ID 1-11, only for supported Port-ID registers) */
  32877. +} t_FmPcdPlcrRegs;
  32878. +
  32879. +#if defined(__MWERKS__) && !defined(__GNUC__)
  32880. +#pragma pack(pop)
  32881. +#endif /* defined(__MWERKS__) && ... */
  32882. +
  32883. +
  32884. +/***********************************************************************/
  32885. +/* Driver's internal structures */
  32886. +/***********************************************************************/
  32887. +
  32888. +typedef struct {
  32889. + bool known;
  32890. + uint8_t id;
  32891. +} t_FmPcdKgSchemesExtractsEntry;
  32892. +
  32893. +typedef struct {
  32894. + t_FmPcdKgSchemesExtractsEntry extractsArray[FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
  32895. +} t_FmPcdKgSchemesExtracts;
  32896. +
  32897. +typedef struct {
  32898. + t_Handle h_Manip;
  32899. + bool keepRes;
  32900. + e_FmPcdEngine nextEngine;
  32901. + uint8_t parseCode;
  32902. +} t_FmPcdInfoForManip;
  32903. +
  32904. +/**************************************************************************//**
  32905. + @Description A structure of parameters to communicate
  32906. + between the port and PCD regarding the KG scheme.
  32907. +*//***************************************************************************/
  32908. +typedef struct {
  32909. + uint8_t netEnvId; /* in */
  32910. + uint8_t numOfDistinctionUnits; /* in */
  32911. + uint8_t unitIds[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /* in */
  32912. + uint32_t vector; /* out */
  32913. +} t_NetEnvParams;
  32914. +
  32915. +typedef struct {
  32916. + bool allocated;
  32917. + uint8_t ownerId; /* guestId for KG in multi-partition only.
  32918. + portId for PLCR in any environment */
  32919. +} t_FmPcdAllocMng;
  32920. +
  32921. +typedef struct {
  32922. + volatile bool lock;
  32923. + bool used;
  32924. + uint8_t owners;
  32925. + uint8_t netEnvId;
  32926. + uint8_t guestId;
  32927. + uint8_t baseEntry;
  32928. + uint16_t sizeOfGrp;
  32929. + protocolOpt_t optArray[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
  32930. +} t_FmPcdKgClsPlanGrp;
  32931. +
  32932. +typedef struct {
  32933. + t_Handle h_FmPcd;
  32934. + uint8_t schemeId;
  32935. + t_FmPcdLock *p_Lock;
  32936. + bool valid;
  32937. + uint8_t netEnvId;
  32938. + uint8_t owners;
  32939. + uint32_t matchVector;
  32940. + uint32_t ccUnits;
  32941. + bool nextRelativePlcrProfile;
  32942. + uint16_t relativeProfileId;
  32943. + uint16_t numOfProfiles;
  32944. + t_FmPcdKgKeyOrder orderedArray;
  32945. + e_FmPcdEngine nextEngine;
  32946. + e_FmPcdDoneAction doneAction;
  32947. + bool requiredActionFlag;
  32948. + uint32_t requiredAction;
  32949. + bool extractedOrs;
  32950. + uint8_t bitOffsetInPlcrProfile;
  32951. + bool directPlcr;
  32952. +#if (DPAA_VERSION >= 11)
  32953. + bool vspe;
  32954. +#endif
  32955. +} t_FmPcdKgScheme;
  32956. +
  32957. +typedef union {
  32958. + struct fman_kg_scheme_regs schemeRegs;
  32959. + struct fman_kg_pe_regs portRegs;
  32960. + struct fman_kg_cp_regs clsPlanRegs;
  32961. +} u_FmPcdKgIndirectAccessRegs;
  32962. +
  32963. +typedef struct {
  32964. + struct fman_kg_regs *p_FmPcdKgRegs;
  32965. + uint32_t schemeExceptionsBitMask;
  32966. + uint8_t numOfSchemes;
  32967. + t_Handle h_HwSpinlock;
  32968. + uint8_t schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];
  32969. + t_FmPcdKgScheme schemes[FM_PCD_KG_NUM_OF_SCHEMES];
  32970. + t_FmPcdKgClsPlanGrp clsPlanGrps[FM_MAX_NUM_OF_PORTS];
  32971. + uint8_t emptyClsPlanGrpId;
  32972. + t_FmPcdAllocMng schemesMng[FM_PCD_KG_NUM_OF_SCHEMES]; /* only for MASTER ! */
  32973. + t_FmPcdAllocMng clsPlanBlocksMng[FM_PCD_MAX_NUM_OF_CLS_PLANS/CLS_PLAN_NUM_PER_GRP];
  32974. + u_FmPcdKgIndirectAccessRegs *p_IndirectAccessRegs;
  32975. +} t_FmPcdKg;
  32976. +
  32977. +typedef struct {
  32978. + uint16_t profilesBase;
  32979. + uint16_t numOfProfiles;
  32980. + t_Handle h_FmPort;
  32981. +} t_FmPcdPlcrMapParam;
  32982. +
  32983. +typedef struct {
  32984. + uint16_t absoluteProfileId;
  32985. + t_Handle h_FmPcd;
  32986. + bool valid;
  32987. + t_FmPcdLock *p_Lock;
  32988. + t_FmPcdAllocMng profilesMng;
  32989. + bool requiredActionFlag;
  32990. + uint32_t requiredAction;
  32991. + e_FmPcdEngine nextEngineOnGreen; /**< Green next engine type */
  32992. + u_FmPcdPlcrNextEngineParams paramsOnGreen; /**< Green next engine params */
  32993. +
  32994. + e_FmPcdEngine nextEngineOnYellow; /**< Yellow next engine type */
  32995. + u_FmPcdPlcrNextEngineParams paramsOnYellow; /**< Yellow next engine params */
  32996. +
  32997. + e_FmPcdEngine nextEngineOnRed; /**< Red next engine type */
  32998. + u_FmPcdPlcrNextEngineParams paramsOnRed; /**< Red next engine params */
  32999. +} t_FmPcdPlcrProfile;
  33000. +
  33001. +typedef struct {
  33002. + t_FmPcdPlcrRegs *p_FmPcdPlcrRegs;
  33003. + uint16_t partPlcrProfilesBase;
  33004. + uint16_t partNumOfPlcrProfiles;
  33005. + t_FmPcdPlcrProfile profiles[FM_PCD_PLCR_NUM_ENTRIES];
  33006. + uint16_t numOfSharedProfiles;
  33007. + uint16_t sharedProfilesIds[FM_PCD_PLCR_NUM_ENTRIES];
  33008. + t_FmPcdPlcrMapParam portsMapping[FM_MAX_NUM_OF_PORTS];
  33009. + t_Handle h_HwSpinlock;
  33010. + t_Handle h_SwSpinlock;
  33011. +} t_FmPcdPlcr;
  33012. +
  33013. +typedef struct {
  33014. + uint32_t *p_SwPrsCode;
  33015. + uint32_t *p_CurrSwPrs;
  33016. + uint8_t currLabel;
  33017. + struct fman_prs_regs *p_FmPcdPrsRegs;
  33018. + t_FmPcdPrsLabelParams labelsTable[FM_PCD_PRS_NUM_OF_LABELS];
  33019. + uint32_t fmPcdPrsPortIdStatistics;
  33020. +} t_FmPcdPrs;
  33021. +
  33022. +typedef struct {
  33023. + struct {
  33024. + e_NetHeaderType hdr;
  33025. + protocolOpt_t opt; /* only one option !! */
  33026. + } hdrs[FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];
  33027. +} t_FmPcdIntDistinctionUnit;
  33028. +
  33029. +typedef struct {
  33030. + e_NetHeaderType hdr;
  33031. + protocolOpt_t opt; /* only one option !! */
  33032. + e_NetHeaderType aliasHdr;
  33033. +} t_FmPcdNetEnvAliases;
  33034. +
  33035. +typedef struct {
  33036. + uint8_t netEnvId;
  33037. + t_Handle h_FmPcd;
  33038. + t_Handle h_Spinlock;
  33039. + bool used;
  33040. + uint8_t owners;
  33041. + uint8_t clsPlanGrpId;
  33042. + t_FmPcdIntDistinctionUnit units[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
  33043. + uint32_t unitsVectors[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
  33044. + uint32_t lcvs[FM_PCD_PRS_NUM_OF_HDRS];
  33045. + uint32_t macsecVector;
  33046. + t_FmPcdNetEnvAliases aliasHdrs[FM_PCD_MAX_NUM_OF_ALIAS_HDRS];
  33047. +} t_FmPcdNetEnv;
  33048. +
  33049. +typedef struct {
  33050. + struct fman_prs_cfg dfltCfg;
  33051. + bool plcrAutoRefresh;
  33052. + uint16_t prsMaxParseCycleLimit;
  33053. +} t_FmPcdDriverParam;
  33054. +
  33055. +typedef struct {
  33056. + t_Handle h_Fm;
  33057. + t_Handle h_FmMuram;
  33058. + t_FmRevisionInfo fmRevInfo;
  33059. +
  33060. + uint64_t physicalMuramBase;
  33061. +
  33062. + t_Handle h_Spinlock;
  33063. + t_List freeLocksLst;
  33064. + t_List acquiredLocksLst;
  33065. +
  33066. + t_Handle h_IpcSession; /* relevant for guest only */
  33067. + bool enabled;
  33068. + uint8_t guestId; /**< Guest Partition Id */
  33069. + uint8_t numOfEnabledGuestPartitionsPcds;
  33070. + char fmPcdModuleName[MODULE_NAME_SIZE];
  33071. + char fmPcdIpcHandlerModuleName[MODULE_NAME_SIZE]; /* relevant for guest only - this is the master's name */
  33072. + t_FmPcdNetEnv netEnvs[FM_MAX_NUM_OF_PORTS];
  33073. + t_FmPcdKg *p_FmPcdKg;
  33074. + t_FmPcdPlcr *p_FmPcdPlcr;
  33075. + t_FmPcdPrs *p_FmPcdPrs;
  33076. +
  33077. + void *p_CcShadow; /**< CC MURAM shadow */
  33078. + uint32_t ccShadowSize;
  33079. + uint32_t ccShadowAlign;
  33080. + volatile bool shadowLock;
  33081. + t_Handle h_ShadowSpinlock;
  33082. +
  33083. + t_Handle h_Hc;
  33084. +
  33085. + uint32_t exceptions;
  33086. + t_FmPcdExceptionCallback *f_Exception;
  33087. + t_FmPcdIdExceptionCallback *f_FmPcdIndexedException;
  33088. + t_Handle h_App;
  33089. + uintptr_t ipv6FrameIdAddr;
  33090. + uintptr_t capwapFrameIdAddr;
  33091. + bool advancedOffloadSupport;
  33092. +
  33093. + t_FmPcdDriverParam *p_FmPcdDriverParam;
  33094. +} t_FmPcd;
  33095. +
  33096. +#if (DPAA_VERSION >= 11)
  33097. +typedef uint8_t t_FmPcdFrmReplicUpdateType;
  33098. +#define FRM_REPLIC_UPDATE_COUNTER 0x01
  33099. +#define FRM_REPLIC_UPDATE_INFO 0x02
  33100. +#endif /* (DPAA_VERSION >= 11) */
  33101. +/***********************************************************************/
  33102. +/* PCD internal routines */
  33103. +/***********************************************************************/
  33104. +
  33105. +t_Error PcdGetVectorForOpt(t_FmPcd *p_FmPcd, uint8_t netEnvId, protocolOpt_t opt, uint32_t *p_Vector);
  33106. +t_Error PcdGetUnitsVector(t_FmPcd *p_FmPcd, t_NetEnvParams *p_Params);
  33107. +bool PcdNetEnvIsUnitWithoutOpts(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint32_t unitVector);
  33108. +t_Error PcdGetClsPlanGrpParams(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_GrpParams);
  33109. +void FmPcdSetClsPlanGrpId(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint8_t clsPlanGrpId);
  33110. +e_NetHeaderType FmPcdGetAliasHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
  33111. +uint8_t FmPcdNetEnvGetUnitIdForSingleHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
  33112. +uint8_t FmPcdNetEnvGetUnitId(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr, bool interchangeable, protocolOpt_t opt);
  33113. +
  33114. +t_Error FmPcdManipBuildIpReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, bool isIpv4, uint8_t groupId);
  33115. +t_Error FmPcdManipDeleteIpReassmSchemes(t_Handle h_Manip);
  33116. +t_Error FmPcdManipBuildCapwapReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, uint8_t groupId);
  33117. +t_Error FmPcdManipDeleteCapwapReassmSchemes(t_Handle h_Manip);
  33118. +bool FmPcdManipIpReassmIsIpv6Hdr(t_Handle h_Manip);
  33119. +
  33120. +t_Handle KgConfig( t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);
  33121. +t_Error KgInit(t_FmPcd *p_FmPcd);
  33122. +t_Error KgFree(t_FmPcd *p_FmPcd);
  33123. +void KgSetClsPlan(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanSet *p_Set);
  33124. +bool KgIsSchemeAlwaysDirect(t_Handle h_FmPcd, uint8_t schemeId);
  33125. +void KgEnable(t_FmPcd *p_FmPcd);
  33126. +void KgDisable(t_FmPcd *p_FmPcd);
  33127. +t_Error KgAllocClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t *p_First);
  33128. +void KgFreeClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t base);
  33129. +
  33130. +/* only for MULTI partittion */
  33131. +t_Error FmPcdKgAllocSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);
  33132. +t_Error FmPcdKgFreeSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);
  33133. +/* only for SINGLE partittion */
  33134. +t_Error KgBindPortToSchemes(t_Handle h_FmPcd , uint8_t hardwarePortId, uint32_t spReg);
  33135. +
  33136. +t_FmPcdLock *FmPcdAcquireLock(t_Handle h_FmPcd);
  33137. +void FmPcdReleaseLock(t_Handle h_FmPcd, t_FmPcdLock *p_Lock);
  33138. +
  33139. +t_Handle PlcrConfig(t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);
  33140. +t_Error PlcrInit(t_FmPcd *p_FmPcd);
  33141. +t_Error PlcrFree(t_FmPcd *p_FmPcd);
  33142. +void PlcrEnable(t_FmPcd *p_FmPcd);
  33143. +void PlcrDisable(t_FmPcd *p_FmPcd);
  33144. +uint16_t PlcrAllocProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);
  33145. +void PlcrFreeProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);
  33146. +t_Error PlcrSetPortProfiles(t_FmPcd *p_FmPcd,
  33147. + uint8_t hardwarePortId,
  33148. + uint16_t numOfProfiles,
  33149. + uint16_t base);
  33150. +t_Error PlcrClearPortProfiles(t_FmPcd *p_FmPcd, uint8_t hardwarePortId);
  33151. +
  33152. +t_Handle PrsConfig(t_FmPcd *p_FmPcd,t_FmPcdParams *p_FmPcdParams);
  33153. +t_Error PrsInit(t_FmPcd *p_FmPcd);
  33154. +void PrsEnable(t_FmPcd *p_FmPcd);
  33155. +void PrsDisable(t_FmPcd *p_FmPcd);
  33156. +void PrsFree(t_FmPcd *p_FmPcd );
  33157. +t_Error PrsIncludePortInStatistics(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, bool include);
  33158. +
  33159. +t_Error FmPcdCcGetGrpParams(t_Handle treeId, uint8_t grpId, uint32_t *p_GrpBits, uint8_t *p_GrpBase);
  33160. +uint8_t FmPcdCcGetOffset(t_Handle h_CcNode);
  33161. +uint8_t FmPcdCcGetParseCode(t_Handle h_CcNode);
  33162. +uint16_t FmPcdCcGetNumOfKeys(t_Handle h_CcNode);
  33163. +t_Error ValidateNextEngineParams(t_Handle h_FmPcd, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams, e_FmPcdCcStatsMode supportedStatsMode);
  33164. +
  33165. +void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);
  33166. +t_Error FmPcdManipCheckParamsForCcNextEngine(t_FmPcdCcNextEngineParams *p_InfoForManip, uint32_t *requiredAction);
  33167. +void FmPcdManipUpdateAdResultForCc(t_Handle h_Manip,
  33168. + t_FmPcdCcNextEngineParams *p_CcNextEngineParams,
  33169. + t_Handle p_Ad,
  33170. + t_Handle *p_AdNewPtr);
  33171. +void FmPcdManipUpdateAdContLookupForCc(t_Handle h_Manip, t_Handle p_Ad, t_Handle *p_AdNew, uint32_t adTableOffset);
  33172. +void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);
  33173. +t_Error FmPcdManipCheckParamsWithCcNodeParams(t_Handle h_Manip, t_Handle h_FmPcdCcNode);
  33174. +#ifdef FM_CAPWAP_SUPPORT
  33175. +t_Handle FmPcdManipApplSpecificBuild(void);
  33176. +bool FmPcdManipIsCapwapApplSpecific(t_Handle h_Manip);
  33177. +#endif /* FM_CAPWAP_SUPPORT */
  33178. +#if (DPAA_VERSION >= 11)
  33179. +void * FrmReplicGroupGetSourceTableDescriptor(t_Handle h_ReplicGroup);
  33180. +void FrmReplicGroupUpdateOwner(t_Handle h_ReplicGroup, bool add);
  33181. +void FrmReplicGroupUpdateAd(t_Handle h_ReplicGroup, void *p_Ad, t_Handle *h_AdNew);
  33182. +
  33183. +void FmPcdCcGetAdTablesThatPointOnReplicGroup(t_Handle h_Node,
  33184. + t_Handle h_ReplicGroup,
  33185. + t_List *p_AdTables,
  33186. + uint32_t *p_NumOfAdTables);
  33187. +#endif /* (DPAA_VERSION >= 11) */
  33188. +
  33189. +void EnqueueNodeInfoToRelevantLst(t_List *p_List, t_CcNodeInformation *p_CcInfo, t_Handle h_Spinlock);
  33190. +void DequeueNodeInfoFromRelevantLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);
  33191. +t_CcNodeInformation* FindNodeInfoInReleventLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);
  33192. +t_List *FmPcdManipGetSpinlock(t_Handle h_Manip);
  33193. +t_List *FmPcdManipGetNodeLstPointedOnThisManip(t_Handle h_Manip);
  33194. +
  33195. +typedef struct
  33196. +{
  33197. + t_Handle h_StatsAd;
  33198. + t_Handle h_StatsCounters;
  33199. +#if (DPAA_VERSION >= 11)
  33200. + t_Handle h_StatsFLRs;
  33201. +#endif /* (DPAA_VERSION >= 11) */
  33202. +} t_FmPcdCcStatsParams;
  33203. +
  33204. +void NextStepAd(t_Handle h_Ad,
  33205. + t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,
  33206. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,
  33207. + t_FmPcd *p_FmPcd);
  33208. +void ReleaseLst(t_List *p_List);
  33209. +
  33210. +static __inline__ t_Handle FmPcdGetMuramHandle(t_Handle h_FmPcd)
  33211. +{
  33212. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  33213. + ASSERT_COND(p_FmPcd);
  33214. + return p_FmPcd->h_FmMuram;
  33215. +}
  33216. +
  33217. +static __inline__ uint64_t FmPcdGetMuramPhysBase(t_Handle h_FmPcd)
  33218. +{
  33219. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  33220. + ASSERT_COND(p_FmPcd);
  33221. + return p_FmPcd->physicalMuramBase;
  33222. +}
  33223. +
  33224. +static __inline__ uint32_t FmPcdLockSpinlock(t_FmPcdLock *p_Lock)
  33225. +{
  33226. + ASSERT_COND(p_Lock);
  33227. + return XX_LockIntrSpinlock(p_Lock->h_Spinlock);
  33228. +}
  33229. +
  33230. +static __inline__ void FmPcdUnlockSpinlock(t_FmPcdLock *p_Lock, uint32_t flags)
  33231. +{
  33232. + ASSERT_COND(p_Lock);
  33233. + XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, flags);
  33234. +}
  33235. +
  33236. +static __inline__ bool FmPcdLockTryLock(t_FmPcdLock *p_Lock)
  33237. +{
  33238. + uint32_t intFlags;
  33239. +
  33240. + ASSERT_COND(p_Lock);
  33241. + intFlags = XX_LockIntrSpinlock(p_Lock->h_Spinlock);
  33242. + if (p_Lock->flag)
  33243. + {
  33244. + XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);
  33245. + return FALSE;
  33246. + }
  33247. + p_Lock->flag = TRUE;
  33248. + XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);
  33249. + return TRUE;
  33250. +}
  33251. +
  33252. +static __inline__ void FmPcdLockUnlock(t_FmPcdLock *p_Lock)
  33253. +{
  33254. + ASSERT_COND(p_Lock);
  33255. + p_Lock->flag = FALSE;
  33256. +}
  33257. +
  33258. +
  33259. +#endif /* __FM_PCD_H */
  33260. --- /dev/null
  33261. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_pcd_ipc.h
  33262. @@ -0,0 +1,280 @@
  33263. +/*
  33264. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  33265. + *
  33266. + * Redistribution and use in source and binary forms, with or without
  33267. + * modification, are permitted provided that the following conditions are met:
  33268. + * * Redistributions of source code must retain the above copyright
  33269. + * notice, this list of conditions and the following disclaimer.
  33270. + * * Redistributions in binary form must reproduce the above copyright
  33271. + * notice, this list of conditions and the following disclaimer in the
  33272. + * documentation and/or other materials provided with the distribution.
  33273. + * * Neither the name of Freescale Semiconductor nor the
  33274. + * names of its contributors may be used to endorse or promote products
  33275. + * derived from this software without specific prior written permission.
  33276. + *
  33277. + *
  33278. + * ALTERNATIVELY, this software may be distributed under the terms of the
  33279. + * GNU General Public License ("GPL") as published by the Free Software
  33280. + * Foundation, either version 2 of that License or (at your option) any
  33281. + * later version.
  33282. + *
  33283. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  33284. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  33285. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33286. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  33287. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  33288. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  33289. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  33290. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33291. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33292. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33293. + */
  33294. +
  33295. +
  33296. +/**************************************************************************//**
  33297. + @File fm_pcd_ipc.h
  33298. +
  33299. + @Description FM PCD Inter-Partition prototypes, structures and definitions.
  33300. +*//***************************************************************************/
  33301. +#ifndef __FM_PCD_IPC_H
  33302. +#define __FM_PCD_IPC_H
  33303. +
  33304. +#include "std_ext.h"
  33305. +
  33306. +
  33307. +/**************************************************************************//**
  33308. + @Group FM_grp Frame Manager API
  33309. +
  33310. + @Description FM API functions, definitions and enums
  33311. +
  33312. + @{
  33313. +*//***************************************************************************/
  33314. +
  33315. +
  33316. +#if defined(__MWERKS__) && !defined(__GNUC__)
  33317. +#pragma pack(push,1)
  33318. +#endif /* defined(__MWERKS__) && ... */
  33319. +
  33320. +/**************************************************************************//**
  33321. + @Description Structure for getting a sw parser address according to a label
  33322. + Fields commented 'IN' are passed by the port module to be used
  33323. + by the FM module.
  33324. + Fields commented 'OUT' will be filled by FM before returning to port.
  33325. +*//***************************************************************************/
  33326. +typedef _Packed struct t_FmPcdIpcSwPrsLable
  33327. +{
  33328. + uint32_t enumHdr; /**< IN. The existence of this header will invoke
  33329. + the sw parser code. */
  33330. + uint8_t indexPerHdr; /**< IN. Normally 0, if more than one sw parser
  33331. + attachments for the same header, use this
  33332. +
  33333. + index to distinguish between them. */
  33334. +} _PackedType t_FmPcdIpcSwPrsLable;
  33335. +
  33336. +/**************************************************************************//**
  33337. + @Description Structure for port-PCD communication.
  33338. + Fields commented 'IN' are passed by the port module to be used
  33339. + by the FM module.
  33340. + Fields commented 'OUT' will be filled by FM before returning to port.
  33341. + Some fields are optional (depending on configuration) and
  33342. + will be analized by the port and FM modules accordingly.
  33343. +*//***************************************************************************/
  33344. +
  33345. +typedef struct t_FmPcdIpcKgSchemesParams
  33346. +{
  33347. + uint8_t guestId;
  33348. + uint8_t numOfSchemes;
  33349. + uint8_t schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];
  33350. +} _PackedType t_FmPcdIpcKgSchemesParams;
  33351. +
  33352. +typedef struct t_FmPcdIpcKgClsPlanParams
  33353. +{
  33354. + uint8_t guestId;
  33355. + uint16_t numOfClsPlanEntries;
  33356. + uint8_t clsPlanBase;
  33357. +} _PackedType t_FmPcdIpcKgClsPlanParams;
  33358. +
  33359. +typedef _Packed struct t_FmPcdIpcPrsIncludePort
  33360. +{
  33361. + uint8_t hardwarePortId;
  33362. + bool include;
  33363. +} _PackedType t_FmPcdIpcPrsIncludePort;
  33364. +
  33365. +
  33366. +#define FM_PCD_MAX_REPLY_SIZE 16
  33367. +#define FM_PCD_MAX_MSG_SIZE 36
  33368. +#define FM_PCD_MAX_REPLY_BODY_SIZE 36
  33369. +
  33370. +typedef _Packed struct {
  33371. + uint32_t msgId;
  33372. + uint8_t msgBody[FM_PCD_MAX_MSG_SIZE];
  33373. +} _PackedType t_FmPcdIpcMsg;
  33374. +
  33375. +typedef _Packed struct t_FmPcdIpcReply {
  33376. + uint32_t error;
  33377. + uint8_t replyBody[FM_PCD_MAX_REPLY_BODY_SIZE];
  33378. +} _PackedType t_FmPcdIpcReply;
  33379. +
  33380. +typedef _Packed struct t_FmIpcResourceAllocParams {
  33381. + uint8_t guestId;
  33382. + uint16_t base;
  33383. + uint16_t num;
  33384. +}_PackedType t_FmIpcResourceAllocParams;
  33385. +
  33386. +#if defined(__MWERKS__) && !defined(__GNUC__)
  33387. +#pragma pack(pop)
  33388. +#endif /* defined(__MWERKS__) && ... */
  33389. +
  33390. +
  33391. +
  33392. +/**************************************************************************//**
  33393. + @Function FM_PCD_ALLOC_KG_SCHEMES
  33394. +
  33395. + @Description Used by FM PCD front-end in order to allocate KG resources
  33396. +
  33397. + @Param[in/out] t_FmPcdIpcKgAllocParams Pointer
  33398. +*//***************************************************************************/
  33399. +#define FM_PCD_ALLOC_KG_SCHEMES 3
  33400. +
  33401. +/**************************************************************************//**
  33402. + @Function FM_PCD_FREE_KG_SCHEMES
  33403. +
  33404. + @Description Used by FM PCD front-end in order to Free KG resources
  33405. +
  33406. + @Param[in/out] t_FmPcdIpcKgSchemesParams Pointer
  33407. +*//***************************************************************************/
  33408. +#define FM_PCD_FREE_KG_SCHEMES 4
  33409. +
  33410. +/**************************************************************************//**
  33411. + @Function FM_PCD_ALLOC_PROFILES
  33412. +
  33413. + @Description Used by FM PCD front-end in order to allocate Policer profiles
  33414. +
  33415. + @Param[in/out] t_FmIpcResourceAllocParams Pointer
  33416. +*//***************************************************************************/
  33417. +#define FM_PCD_ALLOC_PROFILES 5
  33418. +
  33419. +/**************************************************************************//**
  33420. + @Function FM_PCD_FREE_PROFILES
  33421. +
  33422. + @Description Used by FM PCD front-end in order to Free Policer profiles
  33423. +
  33424. + @Param[in/out] t_FmIpcResourceAllocParams Pointer
  33425. +*//***************************************************************************/
  33426. +#define FM_PCD_FREE_PROFILES 6
  33427. +
  33428. +/**************************************************************************//**
  33429. + @Function FM_PCD_SET_PORT_PROFILES
  33430. +
  33431. + @Description Used by FM PCD front-end in order to allocate Policer profiles
  33432. + for specific port
  33433. +
  33434. + @Param[in/out] t_FmIpcResourceAllocParams Pointer
  33435. +*//***************************************************************************/
  33436. +#define FM_PCD_SET_PORT_PROFILES 7
  33437. +
  33438. +/**************************************************************************//**
  33439. + @Function FM_PCD_CLEAR_PORT_PROFILES
  33440. +
  33441. + @Description Used by FM PCD front-end in order to allocate Policer profiles
  33442. + for specific port
  33443. +
  33444. + @Param[in/out] t_FmIpcResourceAllocParams Pointer
  33445. +*//***************************************************************************/
  33446. +#define FM_PCD_CLEAR_PORT_PROFILES 8
  33447. +
  33448. +/**************************************************************************//**
  33449. + @Function FM_PCD_GET_PHYS_MURAM_BASE
  33450. +
  33451. + @Description Used by FM PCD front-end in order to get MURAM base address
  33452. +
  33453. + @Param[in/out] t_FmPcdIcPhysAddr Pointer
  33454. +*//***************************************************************************/
  33455. +#define FM_PCD_GET_PHYS_MURAM_BASE 9
  33456. +
  33457. +/**************************************************************************//**
  33458. + @Function FM_PCD_GET_SW_PRS_OFFSET
  33459. +
  33460. + @Description Used by FM front-end to get the SW parser offset of the start of
  33461. + code relevant to a given label.
  33462. +
  33463. + @Param[in/out] t_FmPcdIpcSwPrsLable Pointer
  33464. +*//***************************************************************************/
  33465. +#define FM_PCD_GET_SW_PRS_OFFSET 10
  33466. +
  33467. +/**************************************************************************//**
  33468. + @Function FM_PCD_MASTER_IS_ENABLED
  33469. +
  33470. + @Description Used by FM front-end in order to verify
  33471. + PCD enablement.
  33472. +
  33473. + @Param[in] bool Pointer
  33474. +*//***************************************************************************/
  33475. +#define FM_PCD_MASTER_IS_ENABLED 15
  33476. +
  33477. +/**************************************************************************//**
  33478. + @Function FM_PCD_GUEST_DISABLE
  33479. +
  33480. + @Description Used by FM front-end to inform back-end when
  33481. + front-end PCD is disabled
  33482. +
  33483. + @Param[in] None
  33484. +*//***************************************************************************/
  33485. +#define FM_PCD_GUEST_DISABLE 16
  33486. +
  33487. +/**************************************************************************//**
  33488. + @Function FM_PCD_FREE_KG_CLSPLAN
  33489. +
  33490. + @Description Used by FM PCD front-end in order to Free KG classification plan entries
  33491. +
  33492. + @Param[in/out] t_FmPcdIpcKgClsPlanParams Pointer
  33493. +*//***************************************************************************/
  33494. +#define FM_PCD_FREE_KG_CLSPLAN 22
  33495. +
  33496. +/**************************************************************************//**
  33497. + @Function FM_PCD_ALLOC_KG_CLSPLAN
  33498. +
  33499. + @Description Used by FM PCD front-end in order to allocate KG classification plan entries
  33500. +
  33501. + @Param[in/out] t_FmPcdIpcKgClsPlanParams Pointer
  33502. +*//***************************************************************************/
  33503. +#define FM_PCD_ALLOC_KG_CLSPLAN 23
  33504. +
  33505. +/**************************************************************************//**
  33506. + @Function FM_PCD_MASTER_IS_ALIVE
  33507. +
  33508. + @Description Used by FM front-end to check that back-end exists
  33509. +
  33510. + @Param[in] None
  33511. +*//***************************************************************************/
  33512. +#define FM_PCD_MASTER_IS_ALIVE 24
  33513. +
  33514. +/**************************************************************************//**
  33515. + @Function FM_PCD_GET_COUNTER
  33516. +
  33517. + @Description Used by FM front-end to read PCD counters
  33518. +
  33519. + @Param[in/out] t_FmPcdIpcGetCounter Pointer
  33520. +*//***************************************************************************/
  33521. +#define FM_PCD_GET_COUNTER 25
  33522. +
  33523. +/**************************************************************************//**
  33524. + @Function FM_PCD_PRS_INC_PORT_STATS
  33525. +
  33526. + @Description Used by FM front-end to set/clear statistics for port
  33527. +
  33528. + @Param[in/out] t_FmPcdIpcPrsIncludePort Pointer
  33529. +*//***************************************************************************/
  33530. +#define FM_PCD_PRS_INC_PORT_STATS 26
  33531. +
  33532. +#if (DPAA_VERSION >= 11)
  33533. +/* TODO - doc */
  33534. +#define FM_PCD_ALLOC_SP 27
  33535. +#endif /* (DPAA_VERSION >= 11) */
  33536. +
  33537. +
  33538. +/** @} */ /* end of FM_PCD_IPC_grp group */
  33539. +/** @} */ /* end of FM_grp group */
  33540. +
  33541. +
  33542. +#endif /* __FM_PCD_IPC_H */
  33543. --- /dev/null
  33544. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.c
  33545. @@ -0,0 +1,1846 @@
  33546. +/*
  33547. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  33548. + *
  33549. + * Redistribution and use in source and binary forms, with or without
  33550. + * modification, are permitted provided that the following conditions are met:
  33551. + * * Redistributions of source code must retain the above copyright
  33552. + * notice, this list of conditions and the following disclaimer.
  33553. + * * Redistributions in binary form must reproduce the above copyright
  33554. + * notice, this list of conditions and the following disclaimer in the
  33555. + * documentation and/or other materials provided with the distribution.
  33556. + * * Neither the name of Freescale Semiconductor nor the
  33557. + * names of its contributors may be used to endorse or promote products
  33558. + * derived from this software without specific prior written permission.
  33559. + *
  33560. + *
  33561. + * ALTERNATIVELY, this software may be distributed under the terms of the
  33562. + * GNU General Public License ("GPL") as published by the Free Software
  33563. + * Foundation, either version 2 of that License or (at your option) any
  33564. + * later version.
  33565. + *
  33566. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  33567. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  33568. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33569. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  33570. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  33571. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  33572. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  33573. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33574. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33575. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33576. + */
  33577. +
  33578. +
  33579. +/******************************************************************************
  33580. + @File fm_plcr.c
  33581. +
  33582. + @Description FM PCD POLICER...
  33583. +*//***************************************************************************/
  33584. +#include "std_ext.h"
  33585. +#include "error_ext.h"
  33586. +#include "string_ext.h"
  33587. +#include "debug_ext.h"
  33588. +#include "net_ext.h"
  33589. +#include "fm_ext.h"
  33590. +
  33591. +#include "fm_common.h"
  33592. +#include "fm_pcd.h"
  33593. +#include "fm_hc.h"
  33594. +#include "fm_pcd_ipc.h"
  33595. +#include "fm_plcr.h"
  33596. +
  33597. +
  33598. +/****************************************/
  33599. +/* static functions */
  33600. +/****************************************/
  33601. +
  33602. +static uint32_t PlcrProfileLock(t_Handle h_Profile)
  33603. +{
  33604. + ASSERT_COND(h_Profile);
  33605. + return FmPcdLockSpinlock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock);
  33606. +}
  33607. +
  33608. +static void PlcrProfileUnlock(t_Handle h_Profile, uint32_t intFlags)
  33609. +{
  33610. + ASSERT_COND(h_Profile);
  33611. + FmPcdUnlockSpinlock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock, intFlags);
  33612. +}
  33613. +
  33614. +static bool PlcrProfileFlagTryLock(t_Handle h_Profile)
  33615. +{
  33616. + ASSERT_COND(h_Profile);
  33617. + return FmPcdLockTryLock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock);
  33618. +}
  33619. +
  33620. +static void PlcrProfileFlagUnlock(t_Handle h_Profile)
  33621. +{
  33622. + ASSERT_COND(h_Profile);
  33623. + FmPcdLockUnlock(((t_FmPcdPlcrProfile *)h_Profile)->p_Lock);
  33624. +}
  33625. +
  33626. +static uint32_t PlcrHwLock(t_Handle h_FmPcdPlcr)
  33627. +{
  33628. + ASSERT_COND(h_FmPcdPlcr);
  33629. + return XX_LockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_HwSpinlock);
  33630. +}
  33631. +
  33632. +static void PlcrHwUnlock(t_Handle h_FmPcdPlcr, uint32_t intFlags)
  33633. +{
  33634. + ASSERT_COND(h_FmPcdPlcr);
  33635. + XX_UnlockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_HwSpinlock, intFlags);
  33636. +}
  33637. +
  33638. +static uint32_t PlcrSwLock(t_Handle h_FmPcdPlcr)
  33639. +{
  33640. + ASSERT_COND(h_FmPcdPlcr);
  33641. + return XX_LockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_SwSpinlock);
  33642. +}
  33643. +
  33644. +static void PlcrSwUnlock(t_Handle h_FmPcdPlcr, uint32_t intFlags)
  33645. +{
  33646. + ASSERT_COND(h_FmPcdPlcr);
  33647. + XX_UnlockIntrSpinlock(((t_FmPcdPlcr*)h_FmPcdPlcr)->h_SwSpinlock, intFlags);
  33648. +}
  33649. +
  33650. +static bool IsProfileShared(t_Handle h_FmPcd, uint16_t absoluteProfileId)
  33651. +{
  33652. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  33653. + uint16_t i;
  33654. +
  33655. + SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, FALSE);
  33656. +
  33657. + for (i=0;i<p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles;i++)
  33658. + if (p_FmPcd->p_FmPcdPlcr->sharedProfilesIds[i] == absoluteProfileId)
  33659. + return TRUE;
  33660. + return FALSE;
  33661. +}
  33662. +
  33663. +static t_Error SetProfileNia(t_FmPcd *p_FmPcd, e_FmPcdEngine nextEngine, u_FmPcdPlcrNextEngineParams *p_NextEngineParams, uint32_t *nextAction)
  33664. +{
  33665. + uint32_t nia;
  33666. + uint16_t absoluteProfileId;
  33667. + uint8_t relativeSchemeId, physicalSchemeId;
  33668. +
  33669. + nia = FM_PCD_PLCR_NIA_VALID;
  33670. +
  33671. + switch (nextEngine)
  33672. + {
  33673. + case e_FM_PCD_DONE :
  33674. + switch (p_NextEngineParams->action)
  33675. + {
  33676. + case e_FM_PCD_DROP_FRAME :
  33677. + nia |= GET_NIA_BMI_AC_DISCARD_FRAME(p_FmPcd);
  33678. + break;
  33679. + case e_FM_PCD_ENQ_FRAME:
  33680. + nia |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
  33681. + break;
  33682. + default:
  33683. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  33684. + }
  33685. + break;
  33686. + case e_FM_PCD_KG:
  33687. + physicalSchemeId = FmPcdKgGetSchemeId(p_NextEngineParams->h_DirectScheme);
  33688. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPcd, physicalSchemeId);
  33689. + if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
  33690. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, NO_MSG);
  33691. + if (!FmPcdKgIsSchemeValidSw(p_NextEngineParams->h_DirectScheme))
  33692. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid direct scheme."));
  33693. + if (!KgIsSchemeAlwaysDirect(p_FmPcd, relativeSchemeId))
  33694. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Policer Profile may point only to a scheme that is always direct."));
  33695. + nia |= NIA_ENG_KG | NIA_KG_DIRECT | physicalSchemeId;
  33696. + break;
  33697. + case e_FM_PCD_PLCR:
  33698. + absoluteProfileId = ((t_FmPcdPlcrProfile *)p_NextEngineParams->h_Profile)->absoluteProfileId;
  33699. + if (!IsProfileShared(p_FmPcd, absoluteProfileId))
  33700. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next profile must be a shared profile"));
  33701. + if (!FmPcdPlcrIsProfileValid(p_FmPcd, absoluteProfileId))
  33702. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid profile "));
  33703. + nia |= NIA_ENG_PLCR | NIA_PLCR_ABSOLUTE | absoluteProfileId;
  33704. + break;
  33705. + default:
  33706. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  33707. + }
  33708. +
  33709. + *nextAction = nia;
  33710. +
  33711. + return E_OK;
  33712. +}
  33713. +
  33714. +static uint32_t CalcFPP(uint32_t fpp)
  33715. +{
  33716. + if (fpp > 15)
  33717. + return 15 - (0x1f - fpp);
  33718. + else
  33719. + return 16 + fpp;
  33720. +}
  33721. +
  33722. +static void GetInfoRateReg(e_FmPcdPlcrRateMode rateMode,
  33723. + uint32_t rate,
  33724. + uint64_t tsuInTenthNano,
  33725. + uint32_t fppShift,
  33726. + uint64_t *p_Integer,
  33727. + uint64_t *p_Fraction)
  33728. +{
  33729. + uint64_t tmp, div;
  33730. +
  33731. + if (rateMode == e_FM_PCD_PLCR_BYTE_MODE)
  33732. + {
  33733. + /* now we calculate the initial integer for the bigger rate */
  33734. + /* from Kbps to Bytes/TSU */
  33735. + tmp = (uint64_t)rate;
  33736. + tmp *= 1000; /* kb --> b */
  33737. + tmp *= tsuInTenthNano; /* bps --> bpTsu(in 10nano) */
  33738. +
  33739. + div = 1000000000; /* nano */
  33740. + div *= 10; /* 10 nano */
  33741. + div *= 8; /* bit to byte */
  33742. + }
  33743. + else
  33744. + {
  33745. + /* now we calculate the initial integer for the bigger rate */
  33746. + /* from Kbps to Bytes/TSU */
  33747. + tmp = (uint64_t)rate;
  33748. + tmp *= tsuInTenthNano; /* bps --> bpTsu(in 10nano) */
  33749. +
  33750. + div = 1000000000; /* nano */
  33751. + div *= 10; /* 10 nano */
  33752. + }
  33753. + *p_Integer = (tmp<<fppShift)/div;
  33754. +
  33755. + /* for calculating the fraction, we will recalculate cir and deduct the integer.
  33756. + * For precision, we will multiply by 2^16. we do not divid back, since we write
  33757. + * this value as fraction - see spec.
  33758. + */
  33759. + *p_Fraction = (((tmp<<fppShift)<<16) - ((*p_Integer<<16)*div))/div;
  33760. +}
  33761. +
  33762. +/* .......... */
  33763. +
  33764. +static void CalcRates(uint32_t bitFor1Micro,
  33765. + t_FmPcdPlcrNonPassthroughAlgParams *p_NonPassthroughAlgParam,
  33766. + uint32_t *cir,
  33767. + uint32_t *cbs,
  33768. + uint32_t *pir_eir,
  33769. + uint32_t *pbs_ebs,
  33770. + uint32_t *fpp)
  33771. +{
  33772. + uint64_t integer, fraction;
  33773. + uint32_t temp, tsuInTenthNanos;
  33774. + uint8_t fppShift=0;
  33775. +
  33776. + /* we want the tsu to count 10 nano for better precision normally tsu is 3.9 nano, now we will get 39 */
  33777. + tsuInTenthNanos = (uint32_t)(1000*10/(1 << bitFor1Micro));
  33778. +
  33779. + /* we choose the faster rate to calibrate fpp */
  33780. + /* The meaning of this step:
  33781. + * when fppShift is 0 it means all TS bits are treated as integer and TSU is the TS LSB count.
  33782. + * In this configuration we calculate the integer and fraction that represent the higher infoRate
  33783. + * When this is done, we can tell where we have "spare" unused bits and optimize the division of TS
  33784. + * into "integer" and "fraction" where the logic is - as many bits as possible for integer at
  33785. + * high rate, as many bits as possible for fraction at low rate.
  33786. + */
  33787. + if (p_NonPassthroughAlgParam->committedInfoRate > p_NonPassthroughAlgParam->peakOrExcessInfoRate)
  33788. + GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->committedInfoRate, tsuInTenthNanos, 0, &integer, &fraction);
  33789. + else
  33790. + GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->peakOrExcessInfoRate, tsuInTenthNanos, 0, &integer, &fraction);
  33791. +
  33792. + /* we shift integer, as in cir/pir it is represented by the MSB 16 bits, and
  33793. + * the LSB bits are for the fraction */
  33794. + temp = (uint32_t)((integer<<16) & 0x00000000FFFFFFFF);
  33795. + /* temp is effected by the rate. For low rates it may be as low as 0, and then we'll
  33796. + * take max FP = 31.
  33797. + * For high rates it will never exceed the 32 bit reg (after the 16 shift), as it is
  33798. + * limited by the 10G physical port.
  33799. + */
  33800. + if (temp != 0)
  33801. + {
  33802. + /* In this case, the largest rate integer is non 0, if it does not occupy all (high) 16
  33803. + * bits of the PIR_EIR we can use this fact and enlarge it to occupy all 16 bits.
  33804. + * The logic is to have as many bits for integer in the higher rates, but if we have "0"s
  33805. + * in the integer part of the cir/pir register, than these bits are wasted. So we want
  33806. + * to use these bits for the fraction. in this way we will have for fraction - the number
  33807. + * of "0" bits and the rest - for integer.
  33808. + * In other words: For each bit we shift it in PIR_EIR, we move the FP in the TS
  33809. + * one bit to the left - preserving the relationship and achieving more bits
  33810. + * for integer in the TS.
  33811. + */
  33812. +
  33813. + /* count zeroes left of the higher used bit (in order to shift the value such that
  33814. + * unused bits may be used for fraction).
  33815. + */
  33816. + while ((temp & 0x80000000) == 0)
  33817. + {
  33818. + temp = temp << 1;
  33819. + fppShift++;
  33820. + }
  33821. + if (fppShift > 15)
  33822. + {
  33823. + REPORT_ERROR(MAJOR, E_INVALID_SELECTION, ("timeStampPeriod to Information rate ratio is too small"));
  33824. + return;
  33825. + }
  33826. + }
  33827. + else
  33828. + {
  33829. + temp = (uint32_t)fraction; /* fraction will alyas be smaller than 2^16 */
  33830. + if (!temp)
  33831. + /* integer and fraction are 0, we set FP to its max val */
  33832. + fppShift = 31;
  33833. + else
  33834. + {
  33835. + /* integer was 0 but fraction is not. FP is 16 for the fraction,
  33836. + * + all left zeroes of the fraction. */
  33837. + fppShift=16;
  33838. + /* count zeroes left of the higher used bit (in order to shift the value such that
  33839. + * unused bits may be used for fraction).
  33840. + */
  33841. + while ((temp & 0x8000) == 0)
  33842. + {
  33843. + temp = temp << 1;
  33844. + fppShift++;
  33845. + }
  33846. + }
  33847. + }
  33848. +
  33849. + /*
  33850. + * This means that the FM TS register will now be used so that 'fppShift' bits are for
  33851. + * fraction and the rest for integer */
  33852. + /* now we re-calculate cir and pir_eir with the calculated FP */
  33853. + GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->committedInfoRate, tsuInTenthNanos, fppShift, &integer, &fraction);
  33854. + *cir = (uint32_t)(integer << 16 | (fraction & 0xFFFF));
  33855. + GetInfoRateReg(p_NonPassthroughAlgParam->rateMode, p_NonPassthroughAlgParam->peakOrExcessInfoRate, tsuInTenthNanos, fppShift, &integer, &fraction);
  33856. + *pir_eir = (uint32_t)(integer << 16 | (fraction & 0xFFFF));
  33857. +
  33858. + *cbs = p_NonPassthroughAlgParam->committedBurstSize;
  33859. + *pbs_ebs = p_NonPassthroughAlgParam->peakOrExcessBurstSize;
  33860. +
  33861. + /* convert FP as it should be written to reg.
  33862. + * 0-15 --> 16-31
  33863. + * 16-31 --> 0-15
  33864. + */
  33865. + *fpp = CalcFPP(fppShift);
  33866. +}
  33867. +
  33868. +static void WritePar(t_FmPcd *p_FmPcd, uint32_t par)
  33869. +{
  33870. + t_FmPcdPlcrRegs *p_FmPcdPlcrRegs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  33871. +
  33872. + ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
  33873. + WRITE_UINT32(p_FmPcdPlcrRegs->fmpl_par, par);
  33874. +
  33875. + while (GET_UINT32(p_FmPcdPlcrRegs->fmpl_par) & FM_PCD_PLCR_PAR_GO) ;
  33876. +}
  33877. +
  33878. +static t_Error BuildProfileRegs(t_FmPcd *p_FmPcd,
  33879. + t_FmPcdPlcrProfileParams *p_ProfileParams,
  33880. + t_FmPcdPlcrProfileRegs *p_PlcrRegs)
  33881. +{
  33882. + t_Error err = E_OK;
  33883. + uint32_t pemode, gnia, ynia, rnia, bitFor1Micro;
  33884. +
  33885. + ASSERT_COND(p_FmPcd);
  33886. +
  33887. + bitFor1Micro = FmGetTimeStampScale(p_FmPcd->h_Fm);
  33888. + if (bitFor1Micro == 0)
  33889. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Timestamp scale"));
  33890. +
  33891. +/* Set G, Y, R Nia */
  33892. + err = SetProfileNia(p_FmPcd, p_ProfileParams->nextEngineOnGreen, &(p_ProfileParams->paramsOnGreen), &gnia);
  33893. + if (err)
  33894. + RETURN_ERROR(MAJOR, err, NO_MSG);
  33895. + err = SetProfileNia(p_FmPcd, p_ProfileParams->nextEngineOnYellow, &(p_ProfileParams->paramsOnYellow), &ynia);
  33896. + if (err)
  33897. + RETURN_ERROR(MAJOR, err, NO_MSG);
  33898. + err = SetProfileNia(p_FmPcd, p_ProfileParams->nextEngineOnRed, &(p_ProfileParams->paramsOnRed), &rnia);
  33899. + if (err)
  33900. + RETURN_ERROR(MAJOR, err, NO_MSG);
  33901. +
  33902. +/* Mode fmpl_pemode */
  33903. + pemode = FM_PCD_PLCR_PEMODE_PI;
  33904. +
  33905. + switch (p_ProfileParams->algSelection)
  33906. + {
  33907. + case e_FM_PCD_PLCR_PASS_THROUGH:
  33908. + p_PlcrRegs->fmpl_pecir = 0;
  33909. + p_PlcrRegs->fmpl_pecbs = 0;
  33910. + p_PlcrRegs->fmpl_pepepir_eir = 0;
  33911. + p_PlcrRegs->fmpl_pepbs_ebs = 0;
  33912. + p_PlcrRegs->fmpl_pelts = 0;
  33913. + p_PlcrRegs->fmpl_pects = 0;
  33914. + p_PlcrRegs->fmpl_pepts_ets = 0;
  33915. + pemode &= ~FM_PCD_PLCR_PEMODE_ALG_MASK;
  33916. + switch (p_ProfileParams->colorMode)
  33917. + {
  33918. + case e_FM_PCD_PLCR_COLOR_BLIND:
  33919. + pemode |= FM_PCD_PLCR_PEMODE_CBLND;
  33920. + switch (p_ProfileParams->color.dfltColor)
  33921. + {
  33922. + case e_FM_PCD_PLCR_GREEN:
  33923. + pemode &= ~FM_PCD_PLCR_PEMODE_DEFC_MASK;
  33924. + break;
  33925. + case e_FM_PCD_PLCR_YELLOW:
  33926. + pemode |= FM_PCD_PLCR_PEMODE_DEFC_Y;
  33927. + break;
  33928. + case e_FM_PCD_PLCR_RED:
  33929. + pemode |= FM_PCD_PLCR_PEMODE_DEFC_R;
  33930. + break;
  33931. + case e_FM_PCD_PLCR_OVERRIDE:
  33932. + pemode |= FM_PCD_PLCR_PEMODE_DEFC_OVERRIDE;
  33933. + break;
  33934. + default:
  33935. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  33936. + }
  33937. +
  33938. + break;
  33939. + case e_FM_PCD_PLCR_COLOR_AWARE:
  33940. + pemode &= ~FM_PCD_PLCR_PEMODE_CBLND;
  33941. + break;
  33942. + default:
  33943. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  33944. + }
  33945. + break;
  33946. +
  33947. + case e_FM_PCD_PLCR_RFC_2698:
  33948. + /* Select algorithm MODE[ALG] = "01" */
  33949. + pemode |= FM_PCD_PLCR_PEMODE_ALG_RFC2698;
  33950. + if (p_ProfileParams->nonPassthroughAlgParams.committedInfoRate > p_ProfileParams->nonPassthroughAlgParams.peakOrExcessInfoRate)
  33951. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("in RFC2698 Peak rate must be equal or larger than committedInfoRate."));
  33952. + goto cont_rfc;
  33953. + case e_FM_PCD_PLCR_RFC_4115:
  33954. + /* Select algorithm MODE[ALG] = "10" */
  33955. + pemode |= FM_PCD_PLCR_PEMODE_ALG_RFC4115;
  33956. +cont_rfc:
  33957. + /* Select Color-Blind / Color-Aware operation (MODE[CBLND]) */
  33958. + switch (p_ProfileParams->colorMode)
  33959. + {
  33960. + case e_FM_PCD_PLCR_COLOR_BLIND:
  33961. + pemode |= FM_PCD_PLCR_PEMODE_CBLND;
  33962. + break;
  33963. + case e_FM_PCD_PLCR_COLOR_AWARE:
  33964. + pemode &= ~FM_PCD_PLCR_PEMODE_CBLND;
  33965. + /*In color aware more select override color interpretation (MODE[OVCLR]) */
  33966. + switch (p_ProfileParams->color.override)
  33967. + {
  33968. + case e_FM_PCD_PLCR_GREEN:
  33969. + pemode &= ~FM_PCD_PLCR_PEMODE_OVCLR_MASK;
  33970. + break;
  33971. + case e_FM_PCD_PLCR_YELLOW:
  33972. + pemode |= FM_PCD_PLCR_PEMODE_OVCLR_Y;
  33973. + break;
  33974. + case e_FM_PCD_PLCR_RED:
  33975. + pemode |= FM_PCD_PLCR_PEMODE_OVCLR_R;
  33976. + break;
  33977. + case e_FM_PCD_PLCR_OVERRIDE:
  33978. + pemode |= FM_PCD_PLCR_PEMODE_OVCLR_G_NC;
  33979. + break;
  33980. + default:
  33981. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  33982. + }
  33983. + break;
  33984. + default:
  33985. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  33986. + }
  33987. + /* Select Measurement Unit Mode to BYTE or PACKET (MODE[PKT]) */
  33988. + switch (p_ProfileParams->nonPassthroughAlgParams.rateMode)
  33989. + {
  33990. + case e_FM_PCD_PLCR_BYTE_MODE :
  33991. + pemode &= ~FM_PCD_PLCR_PEMODE_PKT;
  33992. + switch (p_ProfileParams->nonPassthroughAlgParams.byteModeParams.frameLengthSelection)
  33993. + {
  33994. + case e_FM_PCD_PLCR_L2_FRM_LEN:
  33995. + pemode |= FM_PCD_PLCR_PEMODE_FLS_L2;
  33996. + break;
  33997. + case e_FM_PCD_PLCR_L3_FRM_LEN:
  33998. + pemode |= FM_PCD_PLCR_PEMODE_FLS_L3;
  33999. + break;
  34000. + case e_FM_PCD_PLCR_L4_FRM_LEN:
  34001. + pemode |= FM_PCD_PLCR_PEMODE_FLS_L4;
  34002. + break;
  34003. + case e_FM_PCD_PLCR_FULL_FRM_LEN:
  34004. + pemode |= FM_PCD_PLCR_PEMODE_FLS_FULL;
  34005. + break;
  34006. + default:
  34007. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  34008. + }
  34009. + switch (p_ProfileParams->nonPassthroughAlgParams.byteModeParams.rollBackFrameSelection)
  34010. + {
  34011. + case e_FM_PCD_PLCR_ROLLBACK_L2_FRM_LEN:
  34012. + pemode &= ~FM_PCD_PLCR_PEMODE_RBFLS;
  34013. + break;
  34014. + case e_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN:
  34015. + pemode |= FM_PCD_PLCR_PEMODE_RBFLS;
  34016. + break;
  34017. + default:
  34018. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  34019. + }
  34020. + break;
  34021. + case e_FM_PCD_PLCR_PACKET_MODE :
  34022. + pemode |= FM_PCD_PLCR_PEMODE_PKT;
  34023. + break;
  34024. + default:
  34025. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  34026. + }
  34027. + /* Select timeStamp floating point position (MODE[FPP]) to fit the actual traffic rates. For PACKET
  34028. + mode with low traffic rates move the fixed point to the left to increase fraction accuracy. For BYTE
  34029. + mode with high traffic rates move the fixed point to the right to increase integer accuracy. */
  34030. +
  34031. + /* Configure Traffic Parameters*/
  34032. + {
  34033. + uint32_t cir=0, cbs=0, pir_eir=0, pbs_ebs=0, fpp=0;
  34034. +
  34035. + CalcRates(bitFor1Micro, &p_ProfileParams->nonPassthroughAlgParams, &cir, &cbs, &pir_eir, &pbs_ebs, &fpp);
  34036. +
  34037. + /* Set Committed Information Rate (CIR) */
  34038. + p_PlcrRegs->fmpl_pecir = cir;
  34039. + /* Set Committed Burst Size (CBS). */
  34040. + p_PlcrRegs->fmpl_pecbs = cbs;
  34041. + /* Set Peak Information Rate (PIR_EIR used as PIR) */
  34042. + p_PlcrRegs->fmpl_pepepir_eir = pir_eir;
  34043. + /* Set Peak Burst Size (PBS_EBS used as PBS) */
  34044. + p_PlcrRegs->fmpl_pepbs_ebs = pbs_ebs;
  34045. +
  34046. + /* Initialize the Metering Buckets to be full (write them with 0xFFFFFFFF. */
  34047. + /* Peak Rate Token Bucket Size (PTS_ETS used as PTS) */
  34048. + p_PlcrRegs->fmpl_pepts_ets = 0xFFFFFFFF;
  34049. + /* Committed Rate Token Bucket Size (CTS) */
  34050. + p_PlcrRegs->fmpl_pects = 0xFFFFFFFF;
  34051. +
  34052. + /* Set the FPP based on calculation */
  34053. + pemode |= (fpp << FM_PCD_PLCR_PEMODE_FPP_SHIFT);
  34054. + }
  34055. + break; /* FM_PCD_PLCR_PEMODE_ALG_RFC2698 , FM_PCD_PLCR_PEMODE_ALG_RFC4115 */
  34056. + default:
  34057. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  34058. + }
  34059. +
  34060. + p_PlcrRegs->fmpl_pemode = pemode;
  34061. +
  34062. + p_PlcrRegs->fmpl_pegnia = gnia;
  34063. + p_PlcrRegs->fmpl_peynia = ynia;
  34064. + p_PlcrRegs->fmpl_pernia = rnia;
  34065. +
  34066. + /* Zero Counters */
  34067. + p_PlcrRegs->fmpl_pegpc = 0;
  34068. + p_PlcrRegs->fmpl_peypc = 0;
  34069. + p_PlcrRegs->fmpl_perpc = 0;
  34070. + p_PlcrRegs->fmpl_perypc = 0;
  34071. + p_PlcrRegs->fmpl_perrpc = 0;
  34072. +
  34073. + return E_OK;
  34074. +}
  34075. +
  34076. +static t_Error AllocSharedProfiles(t_FmPcd *p_FmPcd, uint16_t numOfProfiles, uint16_t *profilesIds)
  34077. +{
  34078. + uint32_t profilesFound;
  34079. + uint16_t i, k=0;
  34080. + uint32_t intFlags;
  34081. +
  34082. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  34083. +
  34084. + if (!numOfProfiles)
  34085. + return E_OK;
  34086. +
  34087. + if (numOfProfiles>FM_PCD_PLCR_NUM_ENTRIES)
  34088. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("numProfiles is too big."));
  34089. +
  34090. + intFlags = PlcrSwLock(p_FmPcd->p_FmPcdPlcr);
  34091. + /* Find numOfProfiles free profiles (may be spread) */
  34092. + profilesFound = 0;
  34093. + for (i=0;i<FM_PCD_PLCR_NUM_ENTRIES; i++)
  34094. + if (!p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated)
  34095. + {
  34096. + profilesFound++;
  34097. + profilesIds[k] = i;
  34098. + k++;
  34099. + if (profilesFound == numOfProfiles)
  34100. + break;
  34101. + }
  34102. +
  34103. + if (profilesFound != numOfProfiles)
  34104. + {
  34105. + PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  34106. + RETURN_ERROR(MAJOR, E_INVALID_STATE,NO_MSG);
  34107. + }
  34108. +
  34109. + for (i = 0;i<k;i++)
  34110. + {
  34111. + p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.allocated = TRUE;
  34112. + p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.ownerId = 0;
  34113. + }
  34114. + PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  34115. +
  34116. + return E_OK;
  34117. +}
  34118. +
  34119. +static void FreeSharedProfiles(t_FmPcd *p_FmPcd, uint16_t numOfProfiles, uint16_t *profilesIds)
  34120. +{
  34121. + uint16_t i;
  34122. +
  34123. + SANITY_CHECK_RETURN(p_FmPcd, E_INVALID_HANDLE);
  34124. +
  34125. + ASSERT_COND(numOfProfiles);
  34126. +
  34127. + for (i=0; i < numOfProfiles; i++)
  34128. + {
  34129. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.allocated);
  34130. + p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.allocated = FALSE;
  34131. + p_FmPcd->p_FmPcdPlcr->profiles[profilesIds[i]].profilesMng.ownerId = p_FmPcd->guestId;
  34132. + }
  34133. +}
  34134. +
  34135. +static void UpdateRequiredActionFlag(t_Handle h_FmPcd, uint16_t absoluteProfileId, bool set)
  34136. +{
  34137. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34138. +
  34139. + /* this routine is protected by calling routine */
  34140. +
  34141. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
  34142. +
  34143. + if (set)
  34144. + p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredActionFlag = TRUE;
  34145. + else
  34146. + {
  34147. + p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredAction = 0;
  34148. + p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredActionFlag = FALSE;
  34149. + }
  34150. +}
  34151. +
  34152. +/*********************************************/
  34153. +/*............Policer Exception..............*/
  34154. +/*********************************************/
  34155. +static void EventsCB(t_Handle h_FmPcd)
  34156. +{
  34157. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  34158. + uint32_t event, mask, force;
  34159. +
  34160. + ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
  34161. + event = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_evr);
  34162. + mask = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ier);
  34163. +
  34164. + event &= mask;
  34165. +
  34166. + /* clear the forced events */
  34167. + force = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr);
  34168. + if (force & event)
  34169. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_ifr, force & ~event);
  34170. +
  34171. +
  34172. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_evr, event);
  34173. +
  34174. + if (event & FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE)
  34175. + p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE);
  34176. + if (event & FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE)
  34177. + p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE);
  34178. +}
  34179. +
  34180. +/* ..... */
  34181. +
  34182. +static void ErrorExceptionsCB(t_Handle h_FmPcd)
  34183. +{
  34184. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  34185. + uint32_t event, force, captureReg, mask;
  34186. +
  34187. + ASSERT_COND(FmIsMaster(p_FmPcd->h_Fm));
  34188. + event = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eevr);
  34189. + mask = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eier);
  34190. +
  34191. + event &= mask;
  34192. +
  34193. + /* clear the forced events */
  34194. + force = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr);
  34195. + if (force & event)
  34196. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eifr, force & ~event);
  34197. +
  34198. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_eevr, event);
  34199. +
  34200. + if (event & FM_PCD_PLCR_DOUBLE_ECC)
  34201. + p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC);
  34202. + if (event & FM_PCD_PLCR_INIT_ENTRY_ERROR)
  34203. + {
  34204. + captureReg = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_upcr);
  34205. + /*ASSERT_COND(captureReg & PLCR_ERR_UNINIT_CAP);
  34206. + p_UnInitCapt->profileNum = (uint8_t)(captureReg & PLCR_ERR_UNINIT_NUM_MASK);
  34207. + p_UnInitCapt->portId = (uint8_t)((captureReg & PLCR_ERR_UNINIT_PID_MASK) >>PLCR_ERR_UNINIT_PID_SHIFT) ;
  34208. + p_UnInitCapt->absolute = (bool)(captureReg & PLCR_ERR_UNINIT_ABSOLUTE_MASK);*/
  34209. + p_FmPcd->f_FmPcdIndexedException(p_FmPcd->h_App,e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR,(uint16_t)(captureReg & PLCR_ERR_UNINIT_NUM_MASK));
  34210. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_upcr, PLCR_ERR_UNINIT_CAP);
  34211. + }
  34212. +}
  34213. +
  34214. +
  34215. +/*****************************************************************************/
  34216. +/* Inter-module API routines */
  34217. +/*****************************************************************************/
  34218. +
  34219. +t_Handle PlcrConfig(t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams)
  34220. +{
  34221. + t_FmPcdPlcr *p_FmPcdPlcr;
  34222. + uint16_t i=0;
  34223. +
  34224. + UNUSED(p_FmPcd);
  34225. + UNUSED(p_FmPcdParams);
  34226. +
  34227. + p_FmPcdPlcr = (t_FmPcdPlcr *) XX_Malloc(sizeof(t_FmPcdPlcr));
  34228. + if (!p_FmPcdPlcr)
  34229. + {
  34230. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Policer structure allocation FAILED"));
  34231. + return NULL;
  34232. + }
  34233. + memset(p_FmPcdPlcr, 0, sizeof(t_FmPcdPlcr));
  34234. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  34235. + {
  34236. + p_FmPcdPlcr->p_FmPcdPlcrRegs = (t_FmPcdPlcrRegs *)UINT_TO_PTR(FmGetPcdPlcrBaseAddr(p_FmPcdParams->h_Fm));
  34237. + p_FmPcd->p_FmPcdDriverParam->plcrAutoRefresh = DEFAULT_plcrAutoRefresh;
  34238. + p_FmPcd->exceptions |= (DEFAULT_fmPcdPlcrExceptions | DEFAULT_fmPcdPlcrErrorExceptions);
  34239. + }
  34240. +
  34241. + p_FmPcdPlcr->numOfSharedProfiles = DEFAULT_numOfSharedPlcrProfiles;
  34242. +
  34243. + p_FmPcdPlcr->partPlcrProfilesBase = p_FmPcdParams->partPlcrProfilesBase;
  34244. + p_FmPcdPlcr->partNumOfPlcrProfiles = p_FmPcdParams->partNumOfPlcrProfiles;
  34245. + /* for backward compatabilty. if no policer profile, will set automatically to the max */
  34246. + if ((p_FmPcd->guestId == NCSW_MASTER_ID) &&
  34247. + (p_FmPcdPlcr->partNumOfPlcrProfiles == 0))
  34248. + p_FmPcdPlcr->partNumOfPlcrProfiles = FM_PCD_PLCR_NUM_ENTRIES;
  34249. +
  34250. + for (i=0; i<FM_PCD_PLCR_NUM_ENTRIES; i++)
  34251. + p_FmPcdPlcr->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
  34252. +
  34253. + return p_FmPcdPlcr;
  34254. +}
  34255. +
  34256. +t_Error PlcrInit(t_FmPcd *p_FmPcd)
  34257. +{
  34258. + t_FmPcdDriverParam *p_Param = p_FmPcd->p_FmPcdDriverParam;
  34259. + t_FmPcdPlcr *p_FmPcdPlcr = p_FmPcd->p_FmPcdPlcr;
  34260. + t_FmPcdPlcrRegs *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  34261. + t_Error err = E_OK;
  34262. + uint32_t tmpReg32 = 0;
  34263. + uint16_t base;
  34264. +
  34265. + if ((p_FmPcdPlcr->partPlcrProfilesBase + p_FmPcdPlcr->partNumOfPlcrProfiles) > FM_PCD_PLCR_NUM_ENTRIES)
  34266. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("partPlcrProfilesBase+partNumOfPlcrProfiles out of range!!!"));
  34267. +
  34268. + p_FmPcdPlcr->h_HwSpinlock = XX_InitSpinlock();
  34269. + if (!p_FmPcdPlcr->h_HwSpinlock)
  34270. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM Policer HW spinlock"));
  34271. +
  34272. + p_FmPcdPlcr->h_SwSpinlock = XX_InitSpinlock();
  34273. + if (!p_FmPcdPlcr->h_SwSpinlock)
  34274. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("FM Policer SW spinlock"));
  34275. +
  34276. + base = PlcrAllocProfilesForPartition(p_FmPcd,
  34277. + p_FmPcdPlcr->partPlcrProfilesBase,
  34278. + p_FmPcdPlcr->partNumOfPlcrProfiles,
  34279. + p_FmPcd->guestId);
  34280. + if (base == (uint16_t)ILLEGAL_BASE)
  34281. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  34282. +
  34283. + if (p_FmPcdPlcr->numOfSharedProfiles)
  34284. + {
  34285. + err = AllocSharedProfiles(p_FmPcd,
  34286. + p_FmPcdPlcr->numOfSharedProfiles,
  34287. + p_FmPcdPlcr->sharedProfilesIds);
  34288. + if (err)
  34289. + RETURN_ERROR(MAJOR, err,NO_MSG);
  34290. + }
  34291. +
  34292. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  34293. + return E_OK;
  34294. +
  34295. + /**********************FMPL_GCR******************/
  34296. + tmpReg32 = 0;
  34297. + tmpReg32 |= FM_PCD_PLCR_GCR_STEN;
  34298. + if (p_Param->plcrAutoRefresh)
  34299. + tmpReg32 |= FM_PCD_PLCR_GCR_DAR;
  34300. + tmpReg32 |= GET_NIA_BMI_AC_ENQ_FRAME(p_FmPcd);
  34301. +
  34302. + WRITE_UINT32(p_Regs->fmpl_gcr, tmpReg32);
  34303. + /**********************FMPL_GCR******************/
  34304. +
  34305. + /**********************FMPL_EEVR******************/
  34306. + WRITE_UINT32(p_Regs->fmpl_eevr, (FM_PCD_PLCR_DOUBLE_ECC | FM_PCD_PLCR_INIT_ENTRY_ERROR));
  34307. + /**********************FMPL_EEVR******************/
  34308. + /**********************FMPL_EIER******************/
  34309. + tmpReg32 = 0;
  34310. + if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_DOUBLE_ECC)
  34311. + {
  34312. + FmEnableRamsEcc(p_FmPcd->h_Fm);
  34313. + tmpReg32 |= FM_PCD_PLCR_DOUBLE_ECC;
  34314. + }
  34315. + if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_INIT_ENTRY_ERROR)
  34316. + tmpReg32 |= FM_PCD_PLCR_INIT_ENTRY_ERROR;
  34317. + WRITE_UINT32(p_Regs->fmpl_eier, tmpReg32);
  34318. + /**********************FMPL_EIER******************/
  34319. +
  34320. + /**********************FMPL_EVR******************/
  34321. + WRITE_UINT32(p_Regs->fmpl_evr, (FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE | FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE));
  34322. + /**********************FMPL_EVR******************/
  34323. + /**********************FMPL_IER******************/
  34324. + tmpReg32 = 0;
  34325. + if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE)
  34326. + tmpReg32 |= FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE;
  34327. + if (p_FmPcd->exceptions & FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE)
  34328. + tmpReg32 |= FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE;
  34329. + WRITE_UINT32(p_Regs->fmpl_ier, tmpReg32);
  34330. + /**********************FMPL_IER******************/
  34331. +
  34332. + /* register even if no interrupts enabled, to allow future enablement */
  34333. + FmRegisterIntr(p_FmPcd->h_Fm,
  34334. + e_FM_MOD_PLCR,
  34335. + 0,
  34336. + e_FM_INTR_TYPE_ERR,
  34337. + ErrorExceptionsCB,
  34338. + p_FmPcd);
  34339. + FmRegisterIntr(p_FmPcd->h_Fm,
  34340. + e_FM_MOD_PLCR,
  34341. + 0,
  34342. + e_FM_INTR_TYPE_NORMAL,
  34343. + EventsCB,
  34344. + p_FmPcd);
  34345. +
  34346. + /* driver initializes one DFLT profile at the last entry*/
  34347. + /**********************FMPL_DPMR******************/
  34348. + tmpReg32 = 0;
  34349. + WRITE_UINT32(p_Regs->fmpl_dpmr, tmpReg32);
  34350. + p_FmPcd->p_FmPcdPlcr->profiles[0].profilesMng.allocated = TRUE;
  34351. +
  34352. + return E_OK;
  34353. +}
  34354. +
  34355. +t_Error PlcrFree(t_FmPcd *p_FmPcd)
  34356. +{
  34357. + FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PLCR, 0, e_FM_INTR_TYPE_ERR);
  34358. + FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PLCR, 0, e_FM_INTR_TYPE_NORMAL);
  34359. +
  34360. + if (p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles)
  34361. + FreeSharedProfiles(p_FmPcd,
  34362. + p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles,
  34363. + p_FmPcd->p_FmPcdPlcr->sharedProfilesIds);
  34364. +
  34365. + if (p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles)
  34366. + PlcrFreeProfilesForPartition(p_FmPcd,
  34367. + p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase,
  34368. + p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles,
  34369. + p_FmPcd->guestId);
  34370. +
  34371. + if (p_FmPcd->p_FmPcdPlcr->h_SwSpinlock)
  34372. + XX_FreeSpinlock(p_FmPcd->p_FmPcdPlcr->h_SwSpinlock);
  34373. +
  34374. + if (p_FmPcd->p_FmPcdPlcr->h_HwSpinlock)
  34375. + XX_FreeSpinlock(p_FmPcd->p_FmPcdPlcr->h_HwSpinlock);
  34376. +
  34377. + return E_OK;
  34378. +}
  34379. +
  34380. +void PlcrEnable(t_FmPcd *p_FmPcd)
  34381. +{
  34382. + t_FmPcdPlcrRegs *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  34383. +
  34384. + WRITE_UINT32(p_Regs->fmpl_gcr, GET_UINT32(p_Regs->fmpl_gcr) | FM_PCD_PLCR_GCR_EN);
  34385. +}
  34386. +
  34387. +void PlcrDisable(t_FmPcd *p_FmPcd)
  34388. +{
  34389. + t_FmPcdPlcrRegs *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  34390. +
  34391. + WRITE_UINT32(p_Regs->fmpl_gcr, GET_UINT32(p_Regs->fmpl_gcr) & ~FM_PCD_PLCR_GCR_EN);
  34392. +}
  34393. +
  34394. +uint16_t PlcrAllocProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId)
  34395. +{
  34396. + uint32_t intFlags;
  34397. + uint16_t profilesFound = 0;
  34398. + int i = 0;
  34399. +
  34400. + ASSERT_COND(p_FmPcd);
  34401. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr);
  34402. +
  34403. + if (!numOfProfiles)
  34404. + return 0;
  34405. +
  34406. + if ((numOfProfiles > FM_PCD_PLCR_NUM_ENTRIES) ||
  34407. + (base + numOfProfiles > FM_PCD_PLCR_NUM_ENTRIES))
  34408. + return (uint16_t)ILLEGAL_BASE;
  34409. +
  34410. + if (p_FmPcd->h_IpcSession)
  34411. + {
  34412. + t_FmIpcResourceAllocParams ipcAllocParams;
  34413. + t_FmPcdIpcMsg msg;
  34414. + t_FmPcdIpcReply reply;
  34415. + t_Error err;
  34416. + uint32_t replyLength;
  34417. +
  34418. + memset(&msg, 0, sizeof(msg));
  34419. + memset(&reply, 0, sizeof(reply));
  34420. + memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
  34421. + ipcAllocParams.guestId = p_FmPcd->guestId;
  34422. + ipcAllocParams.num = p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles;
  34423. + ipcAllocParams.base = p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase;
  34424. + msg.msgId = FM_PCD_ALLOC_PROFILES;
  34425. + memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
  34426. + replyLength = sizeof(uint32_t) + sizeof(uint16_t);
  34427. + err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  34428. + (uint8_t*)&msg,
  34429. + sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
  34430. + (uint8_t*)&reply,
  34431. + &replyLength,
  34432. + NULL,
  34433. + NULL);
  34434. + if ((err != E_OK) ||
  34435. + (replyLength != (sizeof(uint32_t) + sizeof(uint16_t))))
  34436. + {
  34437. + REPORT_ERROR(MAJOR, err, NO_MSG);
  34438. + return (uint16_t)ILLEGAL_BASE;
  34439. + }
  34440. + else
  34441. + memcpy((uint8_t*)&p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase, reply.replyBody, sizeof(uint16_t));
  34442. + if (p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase == (uint16_t)ILLEGAL_BASE)
  34443. + {
  34444. + REPORT_ERROR(MAJOR, err, NO_MSG);
  34445. + return (uint16_t)ILLEGAL_BASE;
  34446. + }
  34447. + }
  34448. + else if (p_FmPcd->guestId != NCSW_MASTER_ID)
  34449. + {
  34450. + DBG(WARNING, ("FM Guest mode, without IPC - can't validate Policer-profiles range!"));
  34451. + return (uint16_t)ILLEGAL_BASE;
  34452. + }
  34453. +
  34454. + intFlags = XX_LockIntrSpinlock(p_FmPcd->h_Spinlock);
  34455. + for (i=base; i<(base+numOfProfiles); i++)
  34456. + if (p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId == (uint8_t)ILLEGAL_BASE)
  34457. + profilesFound++;
  34458. + else
  34459. + break;
  34460. +
  34461. + if (profilesFound == numOfProfiles)
  34462. + for (i=base; i<(base+numOfProfiles); i++)
  34463. + p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = guestId;
  34464. + else
  34465. + {
  34466. + XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
  34467. + return (uint16_t)ILLEGAL_BASE;
  34468. + }
  34469. + XX_UnlockIntrSpinlock(p_FmPcd->h_Spinlock, intFlags);
  34470. +
  34471. + return base;
  34472. +}
  34473. +
  34474. +void PlcrFreeProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId)
  34475. +{
  34476. + int i = 0;
  34477. +
  34478. + ASSERT_COND(p_FmPcd);
  34479. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr);
  34480. +
  34481. + if (p_FmPcd->h_IpcSession)
  34482. + {
  34483. + t_FmIpcResourceAllocParams ipcAllocParams;
  34484. + t_FmPcdIpcMsg msg;
  34485. + t_Error err;
  34486. +
  34487. + memset(&msg, 0, sizeof(msg));
  34488. + memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
  34489. + ipcAllocParams.guestId = p_FmPcd->guestId;
  34490. + ipcAllocParams.num = p_FmPcd->p_FmPcdPlcr->partNumOfPlcrProfiles;
  34491. + ipcAllocParams.base = p_FmPcd->p_FmPcdPlcr->partPlcrProfilesBase;
  34492. + msg.msgId = FM_PCD_FREE_PROFILES;
  34493. + memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
  34494. + err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  34495. + (uint8_t*)&msg,
  34496. + sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
  34497. + NULL,
  34498. + NULL,
  34499. + NULL,
  34500. + NULL);
  34501. + if (err != E_OK)
  34502. + REPORT_ERROR(MAJOR, err, NO_MSG);
  34503. + return;
  34504. + }
  34505. + else if (p_FmPcd->guestId != NCSW_MASTER_ID)
  34506. + {
  34507. + DBG(WARNING, ("FM Guest mode, without IPC - can't validate Policer-profiles range!"));
  34508. + return;
  34509. + }
  34510. +
  34511. + for (i=base; i<(base+numOfProfiles); i++)
  34512. + {
  34513. + if (p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId == guestId)
  34514. + p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
  34515. + else
  34516. + DBG(WARNING, ("Request for freeing storage profile window which wasn't allocated to this partition"));
  34517. + }
  34518. +}
  34519. +
  34520. +t_Error PlcrSetPortProfiles(t_FmPcd *p_FmPcd,
  34521. + uint8_t hardwarePortId,
  34522. + uint16_t numOfProfiles,
  34523. + uint16_t base)
  34524. +{
  34525. + t_FmPcdPlcrRegs *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  34526. + uint32_t log2Num, tmpReg32;
  34527. +
  34528. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  34529. + !p_Regs &&
  34530. + p_FmPcd->h_IpcSession)
  34531. + {
  34532. + t_FmIpcResourceAllocParams ipcAllocParams;
  34533. + t_FmPcdIpcMsg msg;
  34534. + t_Error err;
  34535. +
  34536. + memset(&msg, 0, sizeof(msg));
  34537. + memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
  34538. + ipcAllocParams.guestId = hardwarePortId;
  34539. + ipcAllocParams.num = numOfProfiles;
  34540. + ipcAllocParams.base = base;
  34541. + msg.msgId = FM_PCD_SET_PORT_PROFILES;
  34542. + memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
  34543. + err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  34544. + (uint8_t*)&msg,
  34545. + sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
  34546. + NULL,
  34547. + NULL,
  34548. + NULL,
  34549. + NULL);
  34550. + if (err != E_OK)
  34551. + RETURN_ERROR(MAJOR, err, NO_MSG);
  34552. + return E_OK;
  34553. + }
  34554. + else if (!p_Regs)
  34555. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  34556. + ("Either IPC or 'baseAddress' is required!"));
  34557. +
  34558. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  34559. +
  34560. + if (GET_UINT32(p_Regs->fmpl_pmr[hardwarePortId-1]) & FM_PCD_PLCR_PMR_V)
  34561. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  34562. + ("The requesting port has already an allocated profiles window."));
  34563. +
  34564. + /**********************FMPL_PMRx******************/
  34565. + LOG2((uint64_t)numOfProfiles, log2Num);
  34566. + tmpReg32 = base;
  34567. + tmpReg32 |= log2Num << 16;
  34568. + tmpReg32 |= FM_PCD_PLCR_PMR_V;
  34569. + WRITE_UINT32(p_Regs->fmpl_pmr[hardwarePortId-1], tmpReg32);
  34570. +
  34571. + return E_OK;
  34572. +}
  34573. +
  34574. +t_Error PlcrClearPortProfiles(t_FmPcd *p_FmPcd, uint8_t hardwarePortId)
  34575. +{
  34576. + t_FmPcdPlcrRegs *p_Regs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  34577. +
  34578. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  34579. + !p_Regs &&
  34580. + p_FmPcd->h_IpcSession)
  34581. + {
  34582. + t_FmIpcResourceAllocParams ipcAllocParams;
  34583. + t_FmPcdIpcMsg msg;
  34584. + t_Error err;
  34585. +
  34586. + memset(&msg, 0, sizeof(msg));
  34587. + memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
  34588. + ipcAllocParams.guestId = hardwarePortId;
  34589. + msg.msgId = FM_PCD_CLEAR_PORT_PROFILES;
  34590. + memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
  34591. + err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  34592. + (uint8_t*)&msg,
  34593. + sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
  34594. + NULL,
  34595. + NULL,
  34596. + NULL,
  34597. + NULL);
  34598. + if (err != E_OK)
  34599. + RETURN_ERROR(MAJOR, err, NO_MSG);
  34600. + return E_OK;
  34601. + }
  34602. + else if (!p_Regs)
  34603. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  34604. + ("Either IPC or 'baseAddress' is required!"));
  34605. +
  34606. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  34607. + WRITE_UINT32(p_Regs->fmpl_pmr[hardwarePortId-1], 0);
  34608. +
  34609. + return E_OK;
  34610. +}
  34611. +
  34612. +t_Error FmPcdPlcrAllocProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId, uint16_t numOfProfiles)
  34613. +{
  34614. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34615. + t_Error err = E_OK;
  34616. + uint32_t profilesFound;
  34617. + uint32_t intFlags;
  34618. + uint16_t i, first, swPortIndex = 0;
  34619. +
  34620. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  34621. +
  34622. + if (!numOfProfiles)
  34623. + return E_OK;
  34624. +
  34625. + ASSERT_COND(hardwarePortId);
  34626. +
  34627. + if (numOfProfiles>FM_PCD_PLCR_NUM_ENTRIES)
  34628. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("numProfiles is too big."));
  34629. +
  34630. + if (!POWER_OF_2(numOfProfiles))
  34631. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numProfiles must be a power of 2."));
  34632. +
  34633. + first = 0;
  34634. + profilesFound = 0;
  34635. + intFlags = PlcrSwLock(p_FmPcd->p_FmPcdPlcr);
  34636. +
  34637. + for (i=0; i<FM_PCD_PLCR_NUM_ENTRIES; )
  34638. + {
  34639. + if (!p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated)
  34640. + {
  34641. + profilesFound++;
  34642. + i++;
  34643. + if (profilesFound == numOfProfiles)
  34644. + break;
  34645. + }
  34646. + else
  34647. + {
  34648. + profilesFound = 0;
  34649. + /* advance i to the next aligned address */
  34650. + i = first = (uint16_t)(first + numOfProfiles);
  34651. + }
  34652. + }
  34653. +
  34654. + if (profilesFound == numOfProfiles)
  34655. + {
  34656. + for (i=first; i<first + numOfProfiles; i++)
  34657. + {
  34658. + p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated = TRUE;
  34659. + p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = hardwarePortId;
  34660. + }
  34661. + }
  34662. + else
  34663. + {
  34664. + PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  34665. + RETURN_ERROR(MINOR, E_FULL, ("No profiles."));
  34666. + }
  34667. + PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  34668. +
  34669. + err = PlcrSetPortProfiles(p_FmPcd, hardwarePortId, numOfProfiles, first);
  34670. + if (err)
  34671. + {
  34672. + RETURN_ERROR(MAJOR, err, NO_MSG);
  34673. + }
  34674. +
  34675. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  34676. +
  34677. + p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles = numOfProfiles;
  34678. + p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase = first;
  34679. +
  34680. + return E_OK;
  34681. +}
  34682. +
  34683. +t_Error FmPcdPlcrFreeProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId)
  34684. +{
  34685. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34686. + t_Error err = E_OK;
  34687. + uint32_t intFlags;
  34688. + uint16_t i, swPortIndex = 0;
  34689. +
  34690. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  34691. +
  34692. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  34693. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
  34694. +
  34695. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  34696. +
  34697. + err = PlcrClearPortProfiles(p_FmPcd, hardwarePortId);
  34698. + if (err)
  34699. + RETURN_ERROR(MAJOR, err,NO_MSG);
  34700. +
  34701. + intFlags = PlcrSwLock(p_FmPcd->p_FmPcdPlcr);
  34702. + for (i=p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase;
  34703. + i<(p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase +
  34704. + p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles);
  34705. + i++)
  34706. + {
  34707. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId == hardwarePortId);
  34708. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated);
  34709. +
  34710. + p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.allocated = FALSE;
  34711. + p_FmPcd->p_FmPcdPlcr->profiles[i].profilesMng.ownerId = p_FmPcd->guestId;
  34712. + }
  34713. + PlcrSwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  34714. +
  34715. + p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles = 0;
  34716. + p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase = 0;
  34717. +
  34718. + return E_OK;
  34719. +}
  34720. +
  34721. +t_Error FmPcdPlcrCcGetSetParams(t_Handle h_FmPcd, uint16_t profileIndx ,uint32_t requiredAction)
  34722. +{
  34723. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  34724. + t_FmPcdPlcr *p_FmPcdPlcr = p_FmPcd->p_FmPcdPlcr;
  34725. + t_FmPcdPlcrRegs *p_FmPcdPlcrRegs = p_FmPcdPlcr->p_FmPcdPlcrRegs;
  34726. + uint32_t tmpReg32, intFlags;
  34727. + t_Error err;
  34728. +
  34729. + /* Calling function locked all PCD modules, so no need to lock here */
  34730. +
  34731. + if (profileIndx >= FM_PCD_PLCR_NUM_ENTRIES)
  34732. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,("Policer profile out of range"));
  34733. +
  34734. + if (!FmPcdPlcrIsProfileValid(p_FmPcd, profileIndx))
  34735. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,("Policer profile is not valid"));
  34736. +
  34737. + /*intFlags = PlcrProfileLock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx]);*/
  34738. +
  34739. + if (p_FmPcd->h_Hc)
  34740. + {
  34741. + err = FmHcPcdPlcrCcGetSetParams(p_FmPcd->h_Hc, profileIndx, requiredAction);
  34742. +
  34743. + UpdateRequiredActionFlag(p_FmPcd, profileIndx, TRUE);
  34744. + FmPcdPlcrUpdateRequiredAction(p_FmPcd, profileIndx, requiredAction);
  34745. +
  34746. + /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
  34747. + return err;
  34748. + }
  34749. +
  34750. + /* lock the HW because once we read the registers we don't want them to be changed
  34751. + * by another access. (We can copy to a tmp location and release the lock!) */
  34752. +
  34753. + intFlags = PlcrHwLock(p_FmPcdPlcr);
  34754. + WritePar(p_FmPcd, FmPcdPlcrBuildReadPlcrActionReg(profileIndx));
  34755. +
  34756. + if (!p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].requiredActionFlag ||
  34757. + !(p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].requiredAction & requiredAction))
  34758. + {
  34759. + if (requiredAction & UPDATE_NIA_ENQ_WITHOUT_DMA)
  34760. + {
  34761. + if ((p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].nextEngineOnGreen!= e_FM_PCD_DONE) ||
  34762. + (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].nextEngineOnYellow!= e_FM_PCD_DONE) ||
  34763. + (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].nextEngineOnRed!= e_FM_PCD_DONE))
  34764. + {
  34765. + PlcrHwUnlock(p_FmPcdPlcr, intFlags);
  34766. + /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
  34767. + RETURN_ERROR (MAJOR, E_OK, ("In this case the next engine can be e_FM_PCD_DONE"));
  34768. + }
  34769. +
  34770. + if (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].paramsOnGreen.action == e_FM_PCD_ENQ_FRAME)
  34771. + {
  34772. + tmpReg32 = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegnia);
  34773. + if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  34774. + {
  34775. + PlcrHwUnlock(p_FmPcdPlcr, intFlags);
  34776. + /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
  34777. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  34778. + }
  34779. + tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  34780. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegnia, tmpReg32);
  34781. + tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
  34782. + tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEGNIA;
  34783. + WritePar(p_FmPcd, tmpReg32);
  34784. + }
  34785. +
  34786. + if (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].paramsOnYellow.action == e_FM_PCD_ENQ_FRAME)
  34787. + {
  34788. + tmpReg32 = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peynia);
  34789. + if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  34790. + {
  34791. + PlcrHwUnlock(p_FmPcdPlcr, intFlags);
  34792. + /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
  34793. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  34794. + }
  34795. + tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  34796. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peynia, tmpReg32);
  34797. + tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
  34798. + tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEYNIA;
  34799. + WritePar(p_FmPcd, tmpReg32);
  34800. + PlcrHwUnlock(p_FmPcdPlcr, intFlags);
  34801. + }
  34802. +
  34803. + if (p_FmPcd->p_FmPcdPlcr->profiles[profileIndx].paramsOnRed.action == e_FM_PCD_ENQ_FRAME)
  34804. + {
  34805. + tmpReg32 = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pernia);
  34806. + if (!(tmpReg32 & (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)))
  34807. + {
  34808. + PlcrHwUnlock(p_FmPcdPlcr, intFlags);
  34809. + /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
  34810. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Next engine of this policer profile has to be assigned to FM_PCD_DONE"));
  34811. + }
  34812. + tmpReg32 |= NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA;
  34813. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pernia, tmpReg32);
  34814. + tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
  34815. + tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PERNIA;
  34816. + WritePar(p_FmPcd, tmpReg32);
  34817. +
  34818. + }
  34819. + }
  34820. + }
  34821. + PlcrHwUnlock(p_FmPcdPlcr, intFlags);
  34822. +
  34823. + UpdateRequiredActionFlag(p_FmPcd, profileIndx, TRUE);
  34824. + FmPcdPlcrUpdateRequiredAction(p_FmPcd, profileIndx, requiredAction);
  34825. +
  34826. + /*PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[profileIndx], intFlags);*/
  34827. +
  34828. + return E_OK;
  34829. +}
  34830. +
  34831. +uint32_t FmPcdPlcrGetRequiredActionFlag(t_Handle h_FmPcd, uint16_t absoluteProfileId)
  34832. +{
  34833. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34834. +
  34835. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
  34836. +
  34837. + return p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredActionFlag;
  34838. +}
  34839. +
  34840. +uint32_t FmPcdPlcrGetRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId)
  34841. +{
  34842. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34843. +
  34844. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
  34845. +
  34846. + return p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredAction;
  34847. +}
  34848. +
  34849. +bool FmPcdPlcrIsProfileValid(t_Handle h_FmPcd, uint16_t absoluteProfileId)
  34850. +{
  34851. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34852. + t_FmPcdPlcr *p_FmPcdPlcr = p_FmPcd->p_FmPcdPlcr;
  34853. +
  34854. + ASSERT_COND(absoluteProfileId < FM_PCD_PLCR_NUM_ENTRIES);
  34855. +
  34856. + return p_FmPcdPlcr->profiles[absoluteProfileId].valid;
  34857. +}
  34858. +
  34859. +void FmPcdPlcrValidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId)
  34860. +{
  34861. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34862. + uint32_t intFlags;
  34863. +
  34864. + ASSERT_COND(!p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
  34865. +
  34866. + intFlags = PlcrProfileLock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId]);
  34867. + p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid = TRUE;
  34868. + PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId], intFlags);
  34869. +}
  34870. +
  34871. +void FmPcdPlcrInvalidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId)
  34872. +{
  34873. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34874. + uint32_t intFlags;
  34875. +
  34876. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
  34877. +
  34878. + intFlags = PlcrProfileLock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId]);
  34879. + p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid = FALSE;
  34880. + PlcrProfileUnlock(&p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId], intFlags);
  34881. +}
  34882. +
  34883. +uint16_t FmPcdPlcrProfileGetAbsoluteId(t_Handle h_Profile)
  34884. +{
  34885. + return ((t_FmPcdPlcrProfile*)h_Profile)->absoluteProfileId;
  34886. +}
  34887. +
  34888. +t_Error FmPcdPlcrGetAbsoluteIdByProfileParams(t_Handle h_FmPcd,
  34889. + e_FmPcdProfileTypeSelection profileType,
  34890. + t_Handle h_FmPort,
  34891. + uint16_t relativeProfile,
  34892. + uint16_t *p_AbsoluteId)
  34893. +{
  34894. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  34895. + t_FmPcdPlcr *p_FmPcdPlcr = p_FmPcd->p_FmPcdPlcr;
  34896. + uint8_t i;
  34897. +
  34898. + switch (profileType)
  34899. + {
  34900. + case e_FM_PCD_PLCR_PORT_PRIVATE:
  34901. + /* get port PCD id from port handle */
  34902. + for (i=0;i<FM_MAX_NUM_OF_PORTS;i++)
  34903. + if (p_FmPcd->p_FmPcdPlcr->portsMapping[i].h_FmPort == h_FmPort)
  34904. + break;
  34905. + if (i == FM_MAX_NUM_OF_PORTS)
  34906. + RETURN_ERROR(MAJOR, E_INVALID_STATE , ("Invalid port handle."));
  34907. +
  34908. + if (!p_FmPcd->p_FmPcdPlcr->portsMapping[i].numOfProfiles)
  34909. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION , ("Port has no allocated profiles"));
  34910. + if (relativeProfile >= p_FmPcd->p_FmPcdPlcr->portsMapping[i].numOfProfiles)
  34911. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION , ("Profile id is out of range"));
  34912. + *p_AbsoluteId = (uint16_t)(p_FmPcd->p_FmPcdPlcr->portsMapping[i].profilesBase + relativeProfile);
  34913. + break;
  34914. + case e_FM_PCD_PLCR_SHARED:
  34915. + if (relativeProfile >= p_FmPcdPlcr->numOfSharedProfiles)
  34916. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION , ("Profile id is out of range"));
  34917. + *p_AbsoluteId = (uint16_t)(p_FmPcdPlcr->sharedProfilesIds[relativeProfile]);
  34918. + break;
  34919. + default:
  34920. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Invalid policer profile type"));
  34921. + }
  34922. +
  34923. + return E_OK;
  34924. +}
  34925. +
  34926. +uint16_t FmPcdPlcrGetPortProfilesBase(t_Handle h_FmPcd, uint8_t hardwarePortId)
  34927. +{
  34928. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  34929. + uint16_t swPortIndex = 0;
  34930. +
  34931. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  34932. +
  34933. + return p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].profilesBase;
  34934. +}
  34935. +
  34936. +uint16_t FmPcdPlcrGetPortNumOfProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId)
  34937. +{
  34938. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  34939. + uint16_t swPortIndex = 0;
  34940. +
  34941. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  34942. +
  34943. + return p_FmPcd->p_FmPcdPlcr->portsMapping[swPortIndex].numOfProfiles;
  34944. +
  34945. +}
  34946. +uint32_t FmPcdPlcrBuildWritePlcrActionReg(uint16_t absoluteProfileId)
  34947. +{
  34948. + return (uint32_t)(FM_PCD_PLCR_PAR_GO |
  34949. + ((uint32_t)absoluteProfileId << FM_PCD_PLCR_PAR_PNUM_SHIFT));
  34950. +}
  34951. +
  34952. +uint32_t FmPcdPlcrBuildWritePlcrActionRegs(uint16_t absoluteProfileId)
  34953. +{
  34954. + return (uint32_t)(FM_PCD_PLCR_PAR_GO |
  34955. + ((uint32_t)absoluteProfileId << FM_PCD_PLCR_PAR_PNUM_SHIFT) |
  34956. + FM_PCD_PLCR_PAR_PWSEL_MASK);
  34957. +}
  34958. +
  34959. +bool FmPcdPlcrHwProfileIsValid(uint32_t profileModeReg)
  34960. +{
  34961. +
  34962. + if (profileModeReg & FM_PCD_PLCR_PEMODE_PI)
  34963. + return TRUE;
  34964. + else
  34965. + return FALSE;
  34966. +}
  34967. +
  34968. +uint32_t FmPcdPlcrBuildReadPlcrActionReg(uint16_t absoluteProfileId)
  34969. +{
  34970. + return (uint32_t)(FM_PCD_PLCR_PAR_GO |
  34971. + FM_PCD_PLCR_PAR_R |
  34972. + ((uint32_t)absoluteProfileId << FM_PCD_PLCR_PAR_PNUM_SHIFT) |
  34973. + FM_PCD_PLCR_PAR_PWSEL_MASK);
  34974. +}
  34975. +
  34976. +uint32_t FmPcdPlcrBuildCounterProfileReg(e_FmPcdPlcrProfileCounters counter)
  34977. +{
  34978. + switch (counter)
  34979. + {
  34980. + case (e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER):
  34981. + return FM_PCD_PLCR_PAR_PWSEL_PEGPC;
  34982. + case (e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER):
  34983. + return FM_PCD_PLCR_PAR_PWSEL_PEYPC;
  34984. + case (e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER) :
  34985. + return FM_PCD_PLCR_PAR_PWSEL_PERPC;
  34986. + case (e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER) :
  34987. + return FM_PCD_PLCR_PAR_PWSEL_PERYPC;
  34988. + case (e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER) :
  34989. + return FM_PCD_PLCR_PAR_PWSEL_PERRPC;
  34990. + default:
  34991. + REPORT_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  34992. + return 0;
  34993. + }
  34994. +}
  34995. +
  34996. +uint32_t FmPcdPlcrBuildNiaProfileReg(bool green, bool yellow, bool red)
  34997. +{
  34998. +
  34999. + uint32_t tmpReg32 = 0;
  35000. +
  35001. + if (green)
  35002. + tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEGNIA;
  35003. + if (yellow)
  35004. + tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PEYNIA;
  35005. + if (red)
  35006. + tmpReg32 |= FM_PCD_PLCR_PAR_PWSEL_PERNIA;
  35007. +
  35008. + return tmpReg32;
  35009. +}
  35010. +
  35011. +void FmPcdPlcrUpdateRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId, uint32_t requiredAction)
  35012. +{
  35013. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  35014. +
  35015. + /* this routine is protected by calling routine */
  35016. +
  35017. + ASSERT_COND(p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].valid);
  35018. +
  35019. + p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId].requiredAction |= requiredAction;
  35020. +}
  35021. +
  35022. +/*********************** End of inter-module routines ************************/
  35023. +
  35024. +
  35025. +/**************************************************/
  35026. +/*............Policer API.........................*/
  35027. +/**************************************************/
  35028. +
  35029. +t_Error FM_PCD_ConfigPlcrAutoRefreshMode(t_Handle h_FmPcd, bool enable)
  35030. +{
  35031. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  35032. +
  35033. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35034. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
  35035. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE);
  35036. +
  35037. + if (!FmIsMaster(p_FmPcd->h_Fm))
  35038. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ConfigPlcrAutoRefreshMode - guest mode!"));
  35039. +
  35040. + p_FmPcd->p_FmPcdDriverParam->plcrAutoRefresh = enable;
  35041. +
  35042. + return E_OK;
  35043. +}
  35044. +
  35045. +t_Error FM_PCD_ConfigPlcrNumOfSharedProfiles(t_Handle h_FmPcd, uint16_t numOfSharedPlcrProfiles)
  35046. +{
  35047. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  35048. +
  35049. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35050. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
  35051. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE);
  35052. +
  35053. + p_FmPcd->p_FmPcdPlcr->numOfSharedProfiles = numOfSharedPlcrProfiles;
  35054. +
  35055. + return E_OK;
  35056. +}
  35057. +
  35058. +t_Error FM_PCD_SetPlcrStatistics(t_Handle h_FmPcd, bool enable)
  35059. +{
  35060. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  35061. + uint32_t tmpReg32;
  35062. +
  35063. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35064. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
  35065. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE);
  35066. +
  35067. + if (!FmIsMaster(p_FmPcd->h_Fm))
  35068. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_SetPlcrStatistics - guest mode!"));
  35069. +
  35070. + tmpReg32 = GET_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr);
  35071. + if (enable)
  35072. + tmpReg32 |= FM_PCD_PLCR_GCR_STEN;
  35073. + else
  35074. + tmpReg32 &= ~FM_PCD_PLCR_GCR_STEN;
  35075. +
  35076. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_gcr, tmpReg32);
  35077. + return E_OK;
  35078. +}
  35079. +
  35080. +t_Handle FM_PCD_PlcrProfileSet(t_Handle h_FmPcd,
  35081. + t_FmPcdPlcrProfileParams *p_ProfileParams)
  35082. +{
  35083. + t_FmPcd *p_FmPcd;
  35084. + t_FmPcdPlcrRegs *p_FmPcdPlcrRegs;
  35085. + t_FmPcdPlcrProfileRegs plcrProfileReg;
  35086. + uint32_t intFlags;
  35087. + uint16_t absoluteProfileId;
  35088. + t_Error err = E_OK;
  35089. + uint32_t tmpReg32;
  35090. + t_FmPcdPlcrProfile *p_Profile;
  35091. +
  35092. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
  35093. +
  35094. + if (p_ProfileParams->modify)
  35095. + {
  35096. + p_Profile = (t_FmPcdPlcrProfile *)p_ProfileParams->id.h_Profile;
  35097. + p_FmPcd = p_Profile->h_FmPcd;
  35098. + absoluteProfileId = p_Profile->absoluteProfileId;
  35099. + if (absoluteProfileId >= FM_PCD_PLCR_NUM_ENTRIES)
  35100. + {
  35101. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("profileId too Big "));
  35102. + return NULL;
  35103. + }
  35104. +
  35105. + SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE, NULL);
  35106. +
  35107. + /* Try lock profile using flag */
  35108. + if (!PlcrProfileFlagTryLock(p_Profile))
  35109. + {
  35110. + DBG(TRACE, ("Profile Try Lock - BUSY"));
  35111. + /* Signal to caller BUSY condition */
  35112. + p_ProfileParams->id.h_Profile = NULL;
  35113. + return NULL;
  35114. + }
  35115. + }
  35116. + else
  35117. + {
  35118. + p_FmPcd = (t_FmPcd*)h_FmPcd;
  35119. +
  35120. + SANITY_CHECK_RETURN_VALUE(p_FmPcd->p_FmPcdPlcr, E_INVALID_HANDLE, NULL);
  35121. +
  35122. + /* SMP: needs to be protected only if another core now changes the windows */
  35123. + err = FmPcdPlcrGetAbsoluteIdByProfileParams(h_FmPcd,
  35124. + p_ProfileParams->id.newParams.profileType,
  35125. + p_ProfileParams->id.newParams.h_FmPort,
  35126. + p_ProfileParams->id.newParams.relativeProfileId,
  35127. + &absoluteProfileId);
  35128. + if (err)
  35129. + {
  35130. + REPORT_ERROR(MAJOR, err, NO_MSG);
  35131. + return NULL;
  35132. + }
  35133. +
  35134. + if (absoluteProfileId >= FM_PCD_PLCR_NUM_ENTRIES)
  35135. + {
  35136. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("profileId too Big "));
  35137. + return NULL;
  35138. + }
  35139. +
  35140. + if (FmPcdPlcrIsProfileValid(p_FmPcd, absoluteProfileId))
  35141. + {
  35142. + REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("Policer Profile is already used"));
  35143. + return NULL;
  35144. + }
  35145. +
  35146. + /* initialize profile struct */
  35147. + p_Profile = &p_FmPcd->p_FmPcdPlcr->profiles[absoluteProfileId];
  35148. +
  35149. + p_Profile->h_FmPcd = p_FmPcd;
  35150. + p_Profile->absoluteProfileId = absoluteProfileId;
  35151. +
  35152. + p_Profile->p_Lock = FmPcdAcquireLock(p_FmPcd);
  35153. + if (!p_Profile->p_Lock)
  35154. + REPORT_ERROR(MAJOR, E_NOT_AVAILABLE, ("FM Policer Profile lock obj!"));
  35155. + }
  35156. +
  35157. + SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE, NULL);
  35158. +
  35159. + p_Profile->nextEngineOnGreen = p_ProfileParams->nextEngineOnGreen;
  35160. + memcpy(&p_Profile->paramsOnGreen, &(p_ProfileParams->paramsOnGreen), sizeof(u_FmPcdPlcrNextEngineParams));
  35161. +
  35162. + p_Profile->nextEngineOnYellow = p_ProfileParams->nextEngineOnYellow;
  35163. + memcpy(&p_Profile->paramsOnYellow, &(p_ProfileParams->paramsOnYellow), sizeof(u_FmPcdPlcrNextEngineParams));
  35164. +
  35165. + p_Profile->nextEngineOnRed = p_ProfileParams->nextEngineOnRed;
  35166. + memcpy(&p_Profile->paramsOnRed, &(p_ProfileParams->paramsOnRed), sizeof(u_FmPcdPlcrNextEngineParams));
  35167. +
  35168. + memset(&plcrProfileReg, 0, sizeof(t_FmPcdPlcrProfileRegs));
  35169. +
  35170. + /* build the policer profile registers */
  35171. + err = BuildProfileRegs(h_FmPcd, p_ProfileParams, &plcrProfileReg);
  35172. + if (err)
  35173. + {
  35174. + REPORT_ERROR(MAJOR, err, NO_MSG);
  35175. + if (p_ProfileParams->modify)
  35176. + /* unlock */
  35177. + PlcrProfileFlagUnlock(p_Profile);
  35178. + if (!p_ProfileParams->modify &&
  35179. + p_Profile->p_Lock)
  35180. + /* release allocated Profile lock */
  35181. + FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
  35182. + return NULL;
  35183. + }
  35184. +
  35185. + if (p_FmPcd->h_Hc)
  35186. + {
  35187. + err = FmHcPcdPlcrSetProfile(p_FmPcd->h_Hc, (t_Handle)p_Profile, &plcrProfileReg);
  35188. + if (p_ProfileParams->modify)
  35189. + PlcrProfileFlagUnlock(p_Profile);
  35190. + if (err)
  35191. + {
  35192. + /* release the allocated scheme lock */
  35193. + if (!p_ProfileParams->modify &&
  35194. + p_Profile->p_Lock)
  35195. + FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
  35196. +
  35197. + return NULL;
  35198. + }
  35199. + if (!p_ProfileParams->modify)
  35200. + FmPcdPlcrValidateProfileSw(p_FmPcd,absoluteProfileId);
  35201. + return (t_Handle)p_Profile;
  35202. + }
  35203. +
  35204. + p_FmPcdPlcrRegs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  35205. + SANITY_CHECK_RETURN_VALUE(p_FmPcdPlcrRegs, E_INVALID_HANDLE, NULL);
  35206. +
  35207. + intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
  35208. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pemode , plcrProfileReg.fmpl_pemode);
  35209. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegnia , plcrProfileReg.fmpl_pegnia);
  35210. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peynia , plcrProfileReg.fmpl_peynia);
  35211. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pernia , plcrProfileReg.fmpl_pernia);
  35212. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pecir , plcrProfileReg.fmpl_pecir);
  35213. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pecbs , plcrProfileReg.fmpl_pecbs);
  35214. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pepepir_eir,plcrProfileReg.fmpl_pepepir_eir);
  35215. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pepbs_ebs,plcrProfileReg.fmpl_pepbs_ebs);
  35216. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pelts , plcrProfileReg.fmpl_pelts);
  35217. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pects , plcrProfileReg.fmpl_pects);
  35218. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pepts_ets,plcrProfileReg.fmpl_pepts_ets);
  35219. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegpc , plcrProfileReg.fmpl_pegpc);
  35220. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peypc , plcrProfileReg.fmpl_peypc);
  35221. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perpc , plcrProfileReg.fmpl_perpc);
  35222. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perypc , plcrProfileReg.fmpl_perypc);
  35223. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perrpc , plcrProfileReg.fmpl_perrpc);
  35224. +
  35225. + tmpReg32 = FmPcdPlcrBuildWritePlcrActionRegs(absoluteProfileId);
  35226. + WritePar(p_FmPcd, tmpReg32);
  35227. +
  35228. + PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  35229. +
  35230. + if (!p_ProfileParams->modify)
  35231. + FmPcdPlcrValidateProfileSw(p_FmPcd,absoluteProfileId);
  35232. + else
  35233. + PlcrProfileFlagUnlock(p_Profile);
  35234. +
  35235. + return (t_Handle)p_Profile;
  35236. +}
  35237. +
  35238. +t_Error FM_PCD_PlcrProfileDelete(t_Handle h_Profile)
  35239. +{
  35240. + t_FmPcdPlcrProfile *p_Profile = (t_FmPcdPlcrProfile*)h_Profile;
  35241. + t_FmPcd *p_FmPcd;
  35242. + uint16_t profileIndx;
  35243. + uint32_t tmpReg32, intFlags;
  35244. + t_Error err;
  35245. +
  35246. + SANITY_CHECK_RETURN_ERROR(p_Profile, E_INVALID_HANDLE);
  35247. + p_FmPcd = p_Profile->h_FmPcd;
  35248. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35249. +
  35250. + profileIndx = p_Profile->absoluteProfileId;
  35251. +
  35252. + UpdateRequiredActionFlag(p_FmPcd, profileIndx, FALSE);
  35253. +
  35254. + FmPcdPlcrInvalidateProfileSw(p_FmPcd,profileIndx);
  35255. +
  35256. + if (p_FmPcd->h_Hc)
  35257. + {
  35258. + err = FmHcPcdPlcrDeleteProfile(p_FmPcd->h_Hc, h_Profile);
  35259. + if (p_Profile->p_Lock)
  35260. + /* release allocated Profile lock */
  35261. + FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
  35262. +
  35263. + return err;
  35264. + }
  35265. +
  35266. + intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
  35267. + WRITE_UINT32(p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->profileRegs.fmpl_pemode, ~FM_PCD_PLCR_PEMODE_PI);
  35268. +
  35269. + tmpReg32 = FmPcdPlcrBuildWritePlcrActionRegs(profileIndx);
  35270. + WritePar(p_FmPcd, tmpReg32);
  35271. + PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  35272. +
  35273. +
  35274. + if (p_Profile->p_Lock)
  35275. + /* release allocated Profile lock */
  35276. + FmPcdReleaseLock(p_FmPcd, p_Profile->p_Lock);
  35277. +
  35278. + /* we do not memset profile as all its fields are being re-initialized at "set",
  35279. + * plus its allocation information is still valid. */
  35280. + return E_OK;
  35281. +}
  35282. +
  35283. +/***************************************************/
  35284. +/*............Policer Profile Counter..............*/
  35285. +/***************************************************/
  35286. +uint32_t FM_PCD_PlcrProfileGetCounter(t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter)
  35287. +{
  35288. + t_FmPcdPlcrProfile *p_Profile = (t_FmPcdPlcrProfile*)h_Profile;
  35289. + t_FmPcd *p_FmPcd;
  35290. + uint16_t profileIndx;
  35291. + uint32_t intFlags, counterVal = 0;
  35292. + t_FmPcdPlcrRegs *p_FmPcdPlcrRegs;
  35293. +
  35294. + SANITY_CHECK_RETURN_ERROR(p_Profile, E_INVALID_HANDLE);
  35295. + p_FmPcd = p_Profile->h_FmPcd;
  35296. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35297. +
  35298. + if (p_FmPcd->h_Hc)
  35299. + return FmHcPcdPlcrGetProfileCounter(p_FmPcd->h_Hc, h_Profile, counter);
  35300. +
  35301. + p_FmPcdPlcrRegs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  35302. + SANITY_CHECK_RETURN_VALUE(p_FmPcdPlcrRegs, E_INVALID_HANDLE, 0);
  35303. +
  35304. + profileIndx = p_Profile->absoluteProfileId;
  35305. +
  35306. + if (profileIndx >= FM_PCD_PLCR_NUM_ENTRIES)
  35307. + {
  35308. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("profileId too Big "));
  35309. + return 0;
  35310. + }
  35311. + intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
  35312. + WritePar(p_FmPcd, FmPcdPlcrBuildReadPlcrActionReg(profileIndx));
  35313. +
  35314. + switch (counter)
  35315. + {
  35316. + case e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER:
  35317. + counterVal = (GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegpc));
  35318. + break;
  35319. + case e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER:
  35320. + counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peypc);
  35321. + break;
  35322. + case e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER:
  35323. + counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perpc);
  35324. + break;
  35325. + case e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER:
  35326. + counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perypc);
  35327. + break;
  35328. + case e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER:
  35329. + counterVal = GET_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perrpc);
  35330. + break;
  35331. + default:
  35332. + REPORT_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  35333. + break;
  35334. + }
  35335. + PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  35336. +
  35337. + return counterVal;
  35338. +}
  35339. +
  35340. +t_Error FM_PCD_PlcrProfileSetCounter(t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter, uint32_t value)
  35341. +{
  35342. + t_FmPcdPlcrProfile *p_Profile = (t_FmPcdPlcrProfile*)h_Profile;
  35343. + t_FmPcd *p_FmPcd;
  35344. + uint16_t profileIndx;
  35345. + uint32_t tmpReg32, intFlags;
  35346. + t_FmPcdPlcrRegs *p_FmPcdPlcrRegs;
  35347. +
  35348. + SANITY_CHECK_RETURN_ERROR(p_Profile, E_INVALID_HANDLE);
  35349. +
  35350. + p_FmPcd = p_Profile->h_FmPcd;
  35351. + profileIndx = p_Profile->absoluteProfileId;
  35352. +
  35353. + if (p_FmPcd->h_Hc)
  35354. + return FmHcPcdPlcrSetProfileCounter(p_FmPcd->h_Hc, h_Profile, counter, value);
  35355. +
  35356. + p_FmPcdPlcrRegs = p_FmPcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  35357. + SANITY_CHECK_RETURN_ERROR(p_FmPcdPlcrRegs, E_INVALID_HANDLE);
  35358. +
  35359. + intFlags = PlcrHwLock(p_FmPcd->p_FmPcdPlcr);
  35360. + switch (counter)
  35361. + {
  35362. + case e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER:
  35363. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_pegpc, value);
  35364. + break;
  35365. + case e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER:
  35366. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_peypc, value);
  35367. + break;
  35368. + case e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER:
  35369. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perpc, value);
  35370. + break;
  35371. + case e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER:
  35372. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perypc ,value);
  35373. + break;
  35374. + case e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER:
  35375. + WRITE_UINT32(p_FmPcdPlcrRegs->profileRegs.fmpl_perrpc ,value);
  35376. + break;
  35377. + default:
  35378. + PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  35379. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  35380. + }
  35381. +
  35382. + /* Activate the atomic write action by writing FMPL_PAR with: GO=1, RW=1, PSI=0, PNUM =
  35383. + * Profile Number, PWSEL=0xFFFF (select all words).
  35384. + */
  35385. + tmpReg32 = FmPcdPlcrBuildWritePlcrActionReg(profileIndx);
  35386. + tmpReg32 |= FmPcdPlcrBuildCounterProfileReg(counter);
  35387. + WritePar(p_FmPcd, tmpReg32);
  35388. + PlcrHwUnlock(p_FmPcd->p_FmPcdPlcr, intFlags);
  35389. +
  35390. + return E_OK;
  35391. +}
  35392. --- /dev/null
  35393. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_plcr.h
  35394. @@ -0,0 +1,165 @@
  35395. +/*
  35396. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  35397. + *
  35398. + * Redistribution and use in source and binary forms, with or without
  35399. + * modification, are permitted provided that the following conditions are met:
  35400. + * * Redistributions of source code must retain the above copyright
  35401. + * notice, this list of conditions and the following disclaimer.
  35402. + * * Redistributions in binary form must reproduce the above copyright
  35403. + * notice, this list of conditions and the following disclaimer in the
  35404. + * documentation and/or other materials provided with the distribution.
  35405. + * * Neither the name of Freescale Semiconductor nor the
  35406. + * names of its contributors may be used to endorse or promote products
  35407. + * derived from this software without specific prior written permission.
  35408. + *
  35409. + *
  35410. + * ALTERNATIVELY, this software may be distributed under the terms of the
  35411. + * GNU General Public License ("GPL") as published by the Free Software
  35412. + * Foundation, either version 2 of that License or (at your option) any
  35413. + * later version.
  35414. + *
  35415. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  35416. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  35417. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35418. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  35419. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  35420. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  35421. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  35422. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  35423. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  35424. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35425. + */
  35426. +
  35427. +
  35428. +/******************************************************************************
  35429. + @File fm_plcr.h
  35430. +
  35431. + @Description FM Policer private header
  35432. +*//***************************************************************************/
  35433. +#ifndef __FM_PLCR_H
  35434. +#define __FM_PLCR_H
  35435. +
  35436. +#include "std_ext.h"
  35437. +
  35438. +
  35439. +/***********************************************************************/
  35440. +/* Policer defines */
  35441. +/***********************************************************************/
  35442. +
  35443. +#define FM_PCD_PLCR_PAR_GO 0x80000000
  35444. +#define FM_PCD_PLCR_PAR_PWSEL_MASK 0x0000FFFF
  35445. +#define FM_PCD_PLCR_PAR_R 0x40000000
  35446. +
  35447. +/* shifts */
  35448. +#define FM_PCD_PLCR_PAR_PNUM_SHIFT 16
  35449. +
  35450. +/* masks */
  35451. +#define FM_PCD_PLCR_PEMODE_PI 0x80000000
  35452. +#define FM_PCD_PLCR_PEMODE_CBLND 0x40000000
  35453. +#define FM_PCD_PLCR_PEMODE_ALG_MASK 0x30000000
  35454. +#define FM_PCD_PLCR_PEMODE_ALG_RFC2698 0x10000000
  35455. +#define FM_PCD_PLCR_PEMODE_ALG_RFC4115 0x20000000
  35456. +#define FM_PCD_PLCR_PEMODE_DEFC_MASK 0x0C000000
  35457. +#define FM_PCD_PLCR_PEMODE_DEFC_Y 0x04000000
  35458. +#define FM_PCD_PLCR_PEMODE_DEFC_R 0x08000000
  35459. +#define FM_PCD_PLCR_PEMODE_DEFC_OVERRIDE 0x0C000000
  35460. +#define FM_PCD_PLCR_PEMODE_OVCLR_MASK 0x03000000
  35461. +#define FM_PCD_PLCR_PEMODE_OVCLR_Y 0x01000000
  35462. +#define FM_PCD_PLCR_PEMODE_OVCLR_R 0x02000000
  35463. +#define FM_PCD_PLCR_PEMODE_OVCLR_G_NC 0x03000000
  35464. +#define FM_PCD_PLCR_PEMODE_PKT 0x00800000
  35465. +#define FM_PCD_PLCR_PEMODE_FPP_MASK 0x001F0000
  35466. +#define FM_PCD_PLCR_PEMODE_FPP_SHIFT 16
  35467. +#define FM_PCD_PLCR_PEMODE_FLS_MASK 0x0000F000
  35468. +#define FM_PCD_PLCR_PEMODE_FLS_L2 0x00003000
  35469. +#define FM_PCD_PLCR_PEMODE_FLS_L3 0x0000B000
  35470. +#define FM_PCD_PLCR_PEMODE_FLS_L4 0x0000E000
  35471. +#define FM_PCD_PLCR_PEMODE_FLS_FULL 0x0000F000
  35472. +#define FM_PCD_PLCR_PEMODE_RBFLS 0x00000800
  35473. +#define FM_PCD_PLCR_PEMODE_TRA 0x00000004
  35474. +#define FM_PCD_PLCR_PEMODE_TRB 0x00000002
  35475. +#define FM_PCD_PLCR_PEMODE_TRC 0x00000001
  35476. +#define FM_PCD_PLCR_DOUBLE_ECC 0x80000000
  35477. +#define FM_PCD_PLCR_INIT_ENTRY_ERROR 0x40000000
  35478. +#define FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE 0x80000000
  35479. +#define FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE 0x40000000
  35480. +
  35481. +#define FM_PCD_PLCR_NIA_VALID 0x80000000
  35482. +
  35483. +#define FM_PCD_PLCR_GCR_EN 0x80000000
  35484. +#define FM_PCD_PLCR_GCR_STEN 0x40000000
  35485. +#define FM_PCD_PLCR_GCR_DAR 0x20000000
  35486. +#define FM_PCD_PLCR_GCR_DEFNIA 0x00FFFFFF
  35487. +#define FM_PCD_PLCR_NIA_ABS 0x00000100
  35488. +
  35489. +#define FM_PCD_PLCR_GSR_BSY 0x80000000
  35490. +#define FM_PCD_PLCR_GSR_DQS 0x60000000
  35491. +#define FM_PCD_PLCR_GSR_RPB 0x20000000
  35492. +#define FM_PCD_PLCR_GSR_FQS 0x0C000000
  35493. +#define FM_PCD_PLCR_GSR_LPALG 0x0000C000
  35494. +#define FM_PCD_PLCR_GSR_LPCA 0x00003000
  35495. +#define FM_PCD_PLCR_GSR_LPNUM 0x000000FF
  35496. +
  35497. +#define FM_PCD_PLCR_EVR_PSIC 0x80000000
  35498. +#define FM_PCD_PLCR_EVR_AAC 0x40000000
  35499. +
  35500. +#define FM_PCD_PLCR_PAR_PSI 0x20000000
  35501. +#define FM_PCD_PLCR_PAR_PNUM 0x00FF0000
  35502. +/* PWSEL Selctive select options */
  35503. +#define FM_PCD_PLCR_PAR_PWSEL_PEMODE 0x00008000 /* 0 */
  35504. +#define FM_PCD_PLCR_PAR_PWSEL_PEGNIA 0x00004000 /* 1 */
  35505. +#define FM_PCD_PLCR_PAR_PWSEL_PEYNIA 0x00002000 /* 2 */
  35506. +#define FM_PCD_PLCR_PAR_PWSEL_PERNIA 0x00001000 /* 3 */
  35507. +#define FM_PCD_PLCR_PAR_PWSEL_PECIR 0x00000800 /* 4 */
  35508. +#define FM_PCD_PLCR_PAR_PWSEL_PECBS 0x00000400 /* 5 */
  35509. +#define FM_PCD_PLCR_PAR_PWSEL_PEPIR_EIR 0x00000200 /* 6 */
  35510. +#define FM_PCD_PLCR_PAR_PWSEL_PEPBS_EBS 0x00000100 /* 7 */
  35511. +#define FM_PCD_PLCR_PAR_PWSEL_PELTS 0x00000080 /* 8 */
  35512. +#define FM_PCD_PLCR_PAR_PWSEL_PECTS 0x00000040 /* 9 */
  35513. +#define FM_PCD_PLCR_PAR_PWSEL_PEPTS_ETS 0x00000020 /* 10 */
  35514. +#define FM_PCD_PLCR_PAR_PWSEL_PEGPC 0x00000010 /* 11 */
  35515. +#define FM_PCD_PLCR_PAR_PWSEL_PEYPC 0x00000008 /* 12 */
  35516. +#define FM_PCD_PLCR_PAR_PWSEL_PERPC 0x00000004 /* 13 */
  35517. +#define FM_PCD_PLCR_PAR_PWSEL_PERYPC 0x00000002 /* 14 */
  35518. +#define FM_PCD_PLCR_PAR_PWSEL_PERRPC 0x00000001 /* 15 */
  35519. +
  35520. +#define FM_PCD_PLCR_PAR_PMR_BRN_1TO1 0x0000 /* - Full bit replacement. {PBNUM[0:N-1]
  35521. + 1-> 2^N specific locations. */
  35522. +#define FM_PCD_PLCR_PAR_PMR_BRN_2TO2 0x1 /* - {PBNUM[0:N-2],PNUM[N-1]}.
  35523. + 2-> 2^(N-1) base locations. */
  35524. +#define FM_PCD_PLCR_PAR_PMR_BRN_4TO4 0x2 /* - {PBNUM[0:N-3],PNUM[N-2:N-1]}.
  35525. + 4-> 2^(N-2) base locations. */
  35526. +#define FM_PCD_PLCR_PAR_PMR_BRN_8TO8 0x3 /* - {PBNUM[0:N-4],PNUM[N-3:N-1]}.
  35527. + 8->2^(N-3) base locations. */
  35528. +#define FM_PCD_PLCR_PAR_PMR_BRN_16TO16 0x4 /* - {PBNUM[0:N-5],PNUM[N-4:N-1]}.
  35529. + 16-> 2^(N-4) base locations. */
  35530. +#define FM_PCD_PLCR_PAR_PMR_BRN_32TO32 0x5 /* {PBNUM[0:N-6],PNUM[N-5:N-1]}.
  35531. + 32-> 2^(N-5) base locations. */
  35532. +#define FM_PCD_PLCR_PAR_PMR_BRN_64TO64 0x6 /* {PBNUM[0:N-7],PNUM[N-6:N-1]}.
  35533. + 64-> 2^(N-6) base locations. */
  35534. +#define FM_PCD_PLCR_PAR_PMR_BRN_128TO128 0x7 /* {PBNUM[0:N-8],PNUM[N-7:N-1]}.
  35535. + 128-> 2^(N-7) base locations. */
  35536. +#define FM_PCD_PLCR_PAR_PMR_BRN_256TO256 0x8 /* - No bit replacement for N=8. {PNUM[N-8:N-1]}.
  35537. + When N=8 this option maps all 256 profiles by the DISPATCH bus into one group. */
  35538. +
  35539. +#define FM_PCD_PLCR_PMR_V 0x80000000
  35540. +#define PLCR_ERR_ECC_CAP 0x80000000
  35541. +#define PLCR_ERR_ECC_TYPE_DOUBLE 0x40000000
  35542. +#define PLCR_ERR_ECC_PNUM_MASK 0x00000FF0
  35543. +#define PLCR_ERR_ECC_OFFSET_MASK 0x0000000F
  35544. +
  35545. +#define PLCR_ERR_UNINIT_CAP 0x80000000
  35546. +#define PLCR_ERR_UNINIT_NUM_MASK 0x000000FF
  35547. +#define PLCR_ERR_UNINIT_PID_MASK 0x003f0000
  35548. +#define PLCR_ERR_UNINIT_ABSOLUTE_MASK 0x00008000
  35549. +
  35550. +/* shifts */
  35551. +#define PLCR_ERR_ECC_PNUM_SHIFT 4
  35552. +#define PLCR_ERR_UNINIT_PID_SHIFT 16
  35553. +
  35554. +#define FM_PCD_PLCR_PMR_BRN_SHIFT 16
  35555. +
  35556. +#define PLCR_PORT_WINDOW_SIZE(hardwarePortId)
  35557. +
  35558. +
  35559. +#endif /* __FM_PLCR_H */
  35560. --- /dev/null
  35561. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.c
  35562. @@ -0,0 +1,422 @@
  35563. +/*
  35564. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  35565. + *
  35566. + * Redistribution and use in source and binary forms, with or without
  35567. + * modification, are permitted provided that the following conditions are met:
  35568. + * * Redistributions of source code must retain the above copyright
  35569. + * notice, this list of conditions and the following disclaimer.
  35570. + * * Redistributions in binary form must reproduce the above copyright
  35571. + * notice, this list of conditions and the following disclaimer in the
  35572. + * documentation and/or other materials provided with the distribution.
  35573. + * * Neither the name of Freescale Semiconductor nor the
  35574. + * names of its contributors may be used to endorse or promote products
  35575. + * derived from this software without specific prior written permission.
  35576. + *
  35577. + *
  35578. + * ALTERNATIVELY, this software may be distributed under the terms of the
  35579. + * GNU General Public License ("GPL") as published by the Free Software
  35580. + * Foundation, either version 2 of that License or (at your option) any
  35581. + * later version.
  35582. + *
  35583. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  35584. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  35585. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35586. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  35587. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  35588. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  35589. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  35590. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  35591. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  35592. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35593. + */
  35594. +
  35595. +
  35596. +/******************************************************************************
  35597. + @File fm_pcd.c
  35598. +
  35599. + @Description FM PCD ...
  35600. +*//***************************************************************************/
  35601. +#include "std_ext.h"
  35602. +#include "error_ext.h"
  35603. +#include "string_ext.h"
  35604. +#include "debug_ext.h"
  35605. +#include "net_ext.h"
  35606. +
  35607. +#include "fm_common.h"
  35608. +#include "fm_pcd.h"
  35609. +#include "fm_pcd_ipc.h"
  35610. +#include "fm_prs.h"
  35611. +#include "fsl_fman_prs.h"
  35612. +
  35613. +
  35614. +static void PcdPrsErrorException(t_Handle h_FmPcd)
  35615. +{
  35616. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  35617. + uint32_t event, ev_mask;
  35618. + struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35619. +
  35620. + ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
  35621. + ev_mask = fman_prs_get_err_ev_mask(PrsRegs);
  35622. +
  35623. + event = fman_prs_get_err_event(PrsRegs, ev_mask);
  35624. +
  35625. + fman_prs_ack_err_event(PrsRegs, event);
  35626. +
  35627. + DBG(TRACE, ("parser error - 0x%08x\n",event));
  35628. +
  35629. + if(event & FM_PCD_PRS_DOUBLE_ECC)
  35630. + p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC);
  35631. +}
  35632. +
  35633. +static void PcdPrsException(t_Handle h_FmPcd)
  35634. +{
  35635. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  35636. + uint32_t event, ev_mask;
  35637. + struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35638. +
  35639. + ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
  35640. + ev_mask = fman_prs_get_expt_ev_mask(PrsRegs);
  35641. + event = fman_prs_get_expt_event(PrsRegs, ev_mask);
  35642. +
  35643. + ASSERT_COND(event & FM_PCD_PRS_SINGLE_ECC);
  35644. +
  35645. + DBG(TRACE, ("parser event - 0x%08x\n",event));
  35646. +
  35647. + fman_prs_ack_expt_event(PrsRegs, event);
  35648. +
  35649. + p_FmPcd->f_Exception(p_FmPcd->h_App,e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC);
  35650. +}
  35651. +
  35652. +t_Handle PrsConfig(t_FmPcd *p_FmPcd,t_FmPcdParams *p_FmPcdParams)
  35653. +{
  35654. + t_FmPcdPrs *p_FmPcdPrs;
  35655. + uintptr_t baseAddr;
  35656. +
  35657. + UNUSED(p_FmPcd);
  35658. + UNUSED(p_FmPcdParams);
  35659. +
  35660. + p_FmPcdPrs = (t_FmPcdPrs *) XX_Malloc(sizeof(t_FmPcdPrs));
  35661. + if (!p_FmPcdPrs)
  35662. + {
  35663. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Parser structure allocation FAILED"));
  35664. + return NULL;
  35665. + }
  35666. + memset(p_FmPcdPrs, 0, sizeof(t_FmPcdPrs));
  35667. + fman_prs_defconfig(&p_FmPcd->p_FmPcdDriverParam->dfltCfg);
  35668. +
  35669. + if (p_FmPcd->guestId == NCSW_MASTER_ID)
  35670. + {
  35671. + baseAddr = FmGetPcdPrsBaseAddr(p_FmPcdParams->h_Fm);
  35672. + p_FmPcdPrs->p_SwPrsCode = (uint32_t *)UINT_TO_PTR(baseAddr);
  35673. + p_FmPcdPrs->p_FmPcdPrsRegs = (struct fman_prs_regs *)UINT_TO_PTR(baseAddr + PRS_REGS_OFFSET);
  35674. + }
  35675. +
  35676. + p_FmPcdPrs->fmPcdPrsPortIdStatistics = p_FmPcd->p_FmPcdDriverParam->dfltCfg.port_id_stat;
  35677. + p_FmPcd->p_FmPcdDriverParam->prsMaxParseCycleLimit = p_FmPcd->p_FmPcdDriverParam->dfltCfg.max_prs_cyc_lim;
  35678. + p_FmPcd->exceptions |= p_FmPcd->p_FmPcdDriverParam->dfltCfg.prs_exceptions;
  35679. +
  35680. + return p_FmPcdPrs;
  35681. +}
  35682. +
  35683. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  35684. + static uint8_t swPrsPatch[] = SW_PRS_UDP_LITE_PATCH;
  35685. +#else
  35686. + static uint8_t swPrsPatch[] = SW_PRS_OFFLOAD_PATCH;
  35687. +#endif /* FM_CAPWAP_SUPPORT */
  35688. +
  35689. +t_Error PrsInit(t_FmPcd *p_FmPcd)
  35690. +{
  35691. + t_FmPcdDriverParam *p_Param = p_FmPcd->p_FmPcdDriverParam;
  35692. + uint32_t *p_TmpCode;
  35693. + uint32_t *p_LoadTarget = (uint32_t *)PTR_MOVE(p_FmPcd->p_FmPcdPrs->p_SwPrsCode,
  35694. + FM_PCD_SW_PRS_SIZE-FM_PCD_PRS_SW_PATCHES_SIZE);
  35695. + struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35696. + uint32_t i;
  35697. +
  35698. + ASSERT_COND(sizeof(swPrsPatch) <= (FM_PCD_PRS_SW_PATCHES_SIZE-FM_PCD_PRS_SW_TAIL_SIZE));
  35699. +
  35700. + /* nothing to do in guest-partition */
  35701. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  35702. + return E_OK;
  35703. +
  35704. + p_TmpCode = (uint32_t *)XX_MallocSmart(ROUND_UP(sizeof(swPrsPatch),4), 0, sizeof(uint32_t));
  35705. + if (!p_TmpCode)
  35706. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Tmp Sw-Parser code allocation FAILED"));
  35707. + memset((uint8_t *)p_TmpCode, 0, ROUND_UP(sizeof(swPrsPatch),4));
  35708. + memcpy((uint8_t *)p_TmpCode, (uint8_t *)swPrsPatch, sizeof(swPrsPatch));
  35709. +
  35710. + fman_prs_init(PrsRegs, &p_Param->dfltCfg);
  35711. +
  35712. + /* register even if no interrupts enabled, to allow future enablement */
  35713. + FmRegisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_ERR, PcdPrsErrorException, p_FmPcd);
  35714. +
  35715. + /* register even if no interrupts enabled, to allow future enablement */
  35716. + FmRegisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_NORMAL, PcdPrsException, p_FmPcd);
  35717. +
  35718. + if(p_FmPcd->exceptions & FM_PCD_EX_PRS_SINGLE_ECC)
  35719. + FmEnableRamsEcc(p_FmPcd->h_Fm);
  35720. +
  35721. + if(p_FmPcd->exceptions & FM_PCD_EX_PRS_DOUBLE_ECC)
  35722. + FmEnableRamsEcc(p_FmPcd->h_Fm);
  35723. +
  35724. + /* load sw parser Ip-Frag patch */
  35725. + for (i=0; i<DIV_CEIL(sizeof(swPrsPatch), 4); i++)
  35726. + WRITE_UINT32(p_LoadTarget[i], GET_UINT32(p_TmpCode[i]));
  35727. +
  35728. + XX_FreeSmart(p_TmpCode);
  35729. +
  35730. + return E_OK;
  35731. +}
  35732. +
  35733. +void PrsFree(t_FmPcd *p_FmPcd)
  35734. +{
  35735. + ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
  35736. + FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_ERR);
  35737. + /* register even if no interrupts enabled, to allow future enablement */
  35738. + FmUnregisterIntr(p_FmPcd->h_Fm, e_FM_MOD_PRS, 0, e_FM_INTR_TYPE_NORMAL);
  35739. +}
  35740. +
  35741. +void PrsEnable(t_FmPcd *p_FmPcd)
  35742. +{
  35743. + struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35744. +
  35745. + ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
  35746. + fman_prs_enable(PrsRegs);
  35747. +}
  35748. +
  35749. +void PrsDisable(t_FmPcd *p_FmPcd)
  35750. +{
  35751. + struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35752. +
  35753. + ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
  35754. + fman_prs_disable(PrsRegs);
  35755. +}
  35756. +
  35757. +int PrsIsEnabled(t_FmPcd *p_FmPcd)
  35758. +{
  35759. + struct fman_prs_regs *PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35760. +
  35761. + ASSERT_COND(p_FmPcd->guestId == NCSW_MASTER_ID);
  35762. + return fman_prs_is_enabled(PrsRegs);
  35763. +}
  35764. +
  35765. +t_Error PrsIncludePortInStatistics(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, bool include)
  35766. +{
  35767. + struct fman_prs_regs *PrsRegs;
  35768. + uint32_t bitMask = 0;
  35769. + uint8_t prsPortId;
  35770. +
  35771. + SANITY_CHECK_RETURN_ERROR((hardwarePortId >=1 && hardwarePortId <= 16), E_INVALID_VALUE);
  35772. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35773. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPrs, E_INVALID_HANDLE);
  35774. +
  35775. + PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35776. +
  35777. + GET_FM_PCD_PRS_PORT_ID(prsPortId, hardwarePortId);
  35778. + GET_FM_PCD_INDEX_FLAG(bitMask, prsPortId);
  35779. +
  35780. + if (include)
  35781. + p_FmPcd->p_FmPcdPrs->fmPcdPrsPortIdStatistics |= bitMask;
  35782. + else
  35783. + p_FmPcd->p_FmPcdPrs->fmPcdPrsPortIdStatistics &= ~bitMask;
  35784. +
  35785. + fman_prs_set_stst_port_msk(PrsRegs,
  35786. + p_FmPcd->p_FmPcdPrs->fmPcdPrsPortIdStatistics);
  35787. +
  35788. + return E_OK;
  35789. +}
  35790. +
  35791. +t_Error FmPcdPrsIncludePortInStatistics(t_Handle h_FmPcd, uint8_t hardwarePortId, bool include)
  35792. +{
  35793. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  35794. + t_Error err;
  35795. +
  35796. + SANITY_CHECK_RETURN_ERROR((hardwarePortId >=1 && hardwarePortId <= 16), E_INVALID_VALUE);
  35797. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35798. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPrs, E_INVALID_HANDLE);
  35799. +
  35800. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  35801. + p_FmPcd->h_IpcSession)
  35802. + {
  35803. + t_FmPcdIpcPrsIncludePort prsIncludePortParams;
  35804. + t_FmPcdIpcMsg msg;
  35805. +
  35806. + prsIncludePortParams.hardwarePortId = hardwarePortId;
  35807. + prsIncludePortParams.include = include;
  35808. + memset(&msg, 0, sizeof(msg));
  35809. + msg.msgId = FM_PCD_PRS_INC_PORT_STATS;
  35810. + memcpy(msg.msgBody, &prsIncludePortParams, sizeof(prsIncludePortParams));
  35811. + err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  35812. + (uint8_t*)&msg,
  35813. + sizeof(msg.msgId) +sizeof(prsIncludePortParams),
  35814. + NULL,
  35815. + NULL,
  35816. + NULL,
  35817. + NULL);
  35818. + if (err != E_OK)
  35819. + RETURN_ERROR(MAJOR, err, NO_MSG);
  35820. + return E_OK;
  35821. + }
  35822. + else if (p_FmPcd->guestId != NCSW_MASTER_ID)
  35823. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  35824. + ("running in guest-mode without IPC!"));
  35825. +
  35826. + return PrsIncludePortInStatistics(p_FmPcd, hardwarePortId, include);
  35827. +}
  35828. +
  35829. +uint32_t FmPcdGetSwPrsOffset(t_Handle h_FmPcd, e_NetHeaderType hdr, uint8_t indexPerHdr)
  35830. +{
  35831. + t_FmPcd *p_FmPcd = (t_FmPcd *)h_FmPcd;
  35832. + t_FmPcdPrsLabelParams *p_Label;
  35833. + int i;
  35834. +
  35835. + SANITY_CHECK_RETURN_VALUE(p_FmPcd, E_INVALID_HANDLE, 0);
  35836. + SANITY_CHECK_RETURN_VALUE(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE, 0);
  35837. +
  35838. + if ((p_FmPcd->guestId != NCSW_MASTER_ID) &&
  35839. + p_FmPcd->h_IpcSession)
  35840. + {
  35841. + t_Error err = E_OK;
  35842. + t_FmPcdIpcSwPrsLable labelParams;
  35843. + t_FmPcdIpcMsg msg;
  35844. + uint32_t prsOffset = 0;
  35845. + t_FmPcdIpcReply reply;
  35846. + uint32_t replyLength;
  35847. +
  35848. + memset(&reply, 0, sizeof(reply));
  35849. + memset(&msg, 0, sizeof(msg));
  35850. + labelParams.enumHdr = (uint32_t)hdr;
  35851. + labelParams.indexPerHdr = indexPerHdr;
  35852. + msg.msgId = FM_PCD_GET_SW_PRS_OFFSET;
  35853. + memcpy(msg.msgBody, &labelParams, sizeof(labelParams));
  35854. + replyLength = sizeof(uint32_t) + sizeof(uint32_t);
  35855. + err = XX_IpcSendMessage(p_FmPcd->h_IpcSession,
  35856. + (uint8_t*)&msg,
  35857. + sizeof(msg.msgId) +sizeof(labelParams),
  35858. + (uint8_t*)&reply,
  35859. + &replyLength,
  35860. + NULL,
  35861. + NULL);
  35862. + if (err != E_OK)
  35863. + RETURN_ERROR(MAJOR, err, NO_MSG);
  35864. + if (replyLength != sizeof(uint32_t) + sizeof(uint32_t))
  35865. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  35866. +
  35867. + memcpy((uint8_t*)&prsOffset, reply.replyBody, sizeof(uint32_t));
  35868. + return prsOffset;
  35869. + }
  35870. + else if (p_FmPcd->guestId != NCSW_MASTER_ID)
  35871. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  35872. + ("running in guest-mode without IPC!"));
  35873. +
  35874. + ASSERT_COND(p_FmPcd->p_FmPcdPrs->currLabel < FM_PCD_PRS_NUM_OF_LABELS);
  35875. +
  35876. + for (i=0; i<p_FmPcd->p_FmPcdPrs->currLabel; i++)
  35877. + {
  35878. + p_Label = &p_FmPcd->p_FmPcdPrs->labelsTable[i];
  35879. +
  35880. + if ((hdr == p_Label->hdr) && (indexPerHdr == p_Label->indexPerHdr))
  35881. + return p_Label->instructionOffset;
  35882. + }
  35883. +
  35884. + REPORT_ERROR(MAJOR, E_NOT_FOUND, ("Sw Parser attachment Not found"));
  35885. + return (uint32_t)ILLEGAL_BASE;
  35886. +}
  35887. +
  35888. +void FM_PCD_SetPrsStatistics(t_Handle h_FmPcd, bool enable)
  35889. +{
  35890. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  35891. + struct fman_prs_regs *PrsRegs;
  35892. +
  35893. + SANITY_CHECK_RETURN(p_FmPcd, E_INVALID_HANDLE);
  35894. + SANITY_CHECK_RETURN(p_FmPcd->p_FmPcdPrs, E_INVALID_HANDLE);
  35895. +
  35896. + PrsRegs = (struct fman_prs_regs *)p_FmPcd->p_FmPcdPrs->p_FmPcdPrsRegs;
  35897. +
  35898. +
  35899. + if(p_FmPcd->guestId != NCSW_MASTER_ID)
  35900. + {
  35901. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_SetPrsStatistics - guest mode!"));
  35902. + return;
  35903. + }
  35904. +
  35905. + fman_prs_set_stst(PrsRegs, enable);
  35906. +}
  35907. +
  35908. +t_Error FM_PCD_PrsLoadSw(t_Handle h_FmPcd, t_FmPcdPrsSwParams *p_SwPrs)
  35909. +{
  35910. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  35911. + uint32_t *p_LoadTarget;
  35912. + uint32_t *p_TmpCode;
  35913. + int i;
  35914. +
  35915. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35916. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->p_FmPcdDriverParam, E_INVALID_STATE);
  35917. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdPrs, E_INVALID_STATE);
  35918. + SANITY_CHECK_RETURN_ERROR(p_SwPrs, E_INVALID_HANDLE);
  35919. + SANITY_CHECK_RETURN_ERROR(!p_FmPcd->enabled, E_INVALID_HANDLE);
  35920. +
  35921. + if (p_FmPcd->guestId != NCSW_MASTER_ID)
  35922. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM in guest-mode!"));
  35923. +
  35924. + if (!p_SwPrs->override)
  35925. + {
  35926. + if(p_FmPcd->p_FmPcdPrs->p_CurrSwPrs > p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4)
  35927. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("SW parser base must be larger than current loaded code"));
  35928. + }
  35929. + else
  35930. + p_FmPcd->p_FmPcdPrs->currLabel = 0;
  35931. +
  35932. + if (p_SwPrs->size > FM_PCD_SW_PRS_SIZE - FM_PCD_PRS_SW_TAIL_SIZE - p_SwPrs->base*2)
  35933. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_SwPrs->size may not be larger than MAX_SW_PRS_CODE_SIZE"));
  35934. +
  35935. + if (p_FmPcd->p_FmPcdPrs->currLabel + p_SwPrs->numOfLabels > FM_PCD_PRS_NUM_OF_LABELS)
  35936. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceeded number of labels allowed "));
  35937. +
  35938. + p_TmpCode = (uint32_t *)XX_MallocSmart(ROUND_UP(p_SwPrs->size,4), 0, sizeof(uint32_t));
  35939. + if (!p_TmpCode)
  35940. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Tmp Sw-Parser code allocation FAILED"));
  35941. + memset((uint8_t *)p_TmpCode, 0, ROUND_UP(p_SwPrs->size,4));
  35942. + memcpy((uint8_t *)p_TmpCode, p_SwPrs->p_Code, p_SwPrs->size);
  35943. +
  35944. + /* save sw parser labels */
  35945. + memcpy(&p_FmPcd->p_FmPcdPrs->labelsTable[p_FmPcd->p_FmPcdPrs->currLabel],
  35946. + p_SwPrs->labelsTable,
  35947. + p_SwPrs->numOfLabels*sizeof(t_FmPcdPrsLabelParams));
  35948. + p_FmPcd->p_FmPcdPrs->currLabel += p_SwPrs->numOfLabels;
  35949. +
  35950. + /* load sw parser code */
  35951. + p_LoadTarget = p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4;
  35952. +
  35953. + for(i=0; i<DIV_CEIL(p_SwPrs->size, 4); i++)
  35954. + WRITE_UINT32(p_LoadTarget[i], GET_UINT32(p_TmpCode[i]));
  35955. +
  35956. + p_FmPcd->p_FmPcdPrs->p_CurrSwPrs =
  35957. + p_FmPcd->p_FmPcdPrs->p_SwPrsCode + p_SwPrs->base*2/4 + ROUND_UP(p_SwPrs->size,4);
  35958. +
  35959. + /* copy data parameters */
  35960. + for (i=0;i<FM_PCD_PRS_NUM_OF_HDRS;i++)
  35961. + WRITE_UINT32(*(p_FmPcd->p_FmPcdPrs->p_SwPrsCode+PRS_SW_DATA/4+i), p_SwPrs->swPrsDataParams[i]);
  35962. +
  35963. + /* Clear last 4 bytes */
  35964. + WRITE_UINT32(*(p_FmPcd->p_FmPcdPrs->p_SwPrsCode+(PRS_SW_DATA-FM_PCD_PRS_SW_TAIL_SIZE)/4), 0);
  35965. +
  35966. + XX_FreeSmart(p_TmpCode);
  35967. +
  35968. + return E_OK;
  35969. +}
  35970. +
  35971. +t_Error FM_PCD_ConfigPrsMaxCycleLimit(t_Handle h_FmPcd,uint16_t value)
  35972. +{
  35973. + t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;
  35974. +
  35975. + SANITY_CHECK_RETURN_ERROR(p_FmPcd, E_INVALID_HANDLE);
  35976. + SANITY_CHECK_RETURN_ERROR(p_FmPcd->p_FmPcdDriverParam, E_INVALID_HANDLE);
  35977. +
  35978. + if(p_FmPcd->guestId != NCSW_MASTER_ID)
  35979. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM_PCD_ConfigPrsMaxCycleLimit - guest mode!"));
  35980. +
  35981. + p_FmPcd->p_FmPcdDriverParam->prsMaxParseCycleLimit = value;
  35982. +
  35983. + return E_OK;
  35984. +}
  35985. --- /dev/null
  35986. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_prs.h
  35987. @@ -0,0 +1,316 @@
  35988. +/*
  35989. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  35990. + *
  35991. + * Redistribution and use in source and binary forms, with or without
  35992. + * modification, are permitted provided that the following conditions are met:
  35993. + * * Redistributions of source code must retain the above copyright
  35994. + * notice, this list of conditions and the following disclaimer.
  35995. + * * Redistributions in binary form must reproduce the above copyright
  35996. + * notice, this list of conditions and the following disclaimer in the
  35997. + * documentation and/or other materials provided with the distribution.
  35998. + * * Neither the name of Freescale Semiconductor nor the
  35999. + * names of its contributors may be used to endorse or promote products
  36000. + * derived from this software without specific prior written permission.
  36001. + *
  36002. + *
  36003. + * ALTERNATIVELY, this software may be distributed under the terms of the
  36004. + * GNU General Public License ("GPL") as published by the Free Software
  36005. + * Foundation, either version 2 of that License or (at your option) any
  36006. + * later version.
  36007. + *
  36008. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  36009. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  36010. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  36011. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  36012. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  36013. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  36014. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  36015. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  36016. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  36017. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36018. + */
  36019. +
  36020. +
  36021. +/******************************************************************************
  36022. + @File fm_prs.h
  36023. +
  36024. + @Description FM Parser private header
  36025. + *//***************************************************************************/
  36026. +#ifndef __FM_PRS_H
  36027. +#define __FM_PRS_H
  36028. +
  36029. +#include "std_ext.h"
  36030. +
  36031. +/***********************************************************************/
  36032. +/* SW parser IP_FRAG patch */
  36033. +/***********************************************************************/
  36034. +
  36035. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  36036. +#define SW_PRS_UDP_LITE_PATCH \
  36037. +{\
  36038. + 0x31,0x52,0x00,0xDA,0xFC,0x00,0x00,0x00,0x00,0x00, \
  36039. + 0x00,0x00,0x50,0x2C,0x40,0x00,0x31,0x92,0x50,0x2C, \
  36040. + 0x00,0x88,0x18,0x2F,0x00,0x01,0x1B,0xFE,0x18,0x71, \
  36041. + 0x02,0x1F,0x00,0x08,0x00,0x83,0x02,0x1F,0x00,0x20, \
  36042. + 0x28,0x1B,0x00,0x05,0x29,0x1F,0x30,0xD0,0x60,0x4F, \
  36043. + 0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F,0x00,0x52, \
  36044. + 0x00,0x01,0x07,0x01,0x60,0x3B,0x00,0x00,0x30,0xD0, \
  36045. + 0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
  36046. + 0x40,0x4C,0x00,0x00,0x02,0x8F,0x00,0x00,0x30,0xF2, \
  36047. + 0x00,0x06,0x18,0x5D,0x00,0x00,0x9F,0xFF,0x30,0xF2, \
  36048. + 0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0,0x00,0x52, \
  36049. + 0x00,0x08,0x28,0x1A,0x60,0x37,0x00,0x00,0x30,0xF2, \
  36050. + 0x18,0x5D,0x06,0x00,0x29,0x1E,0x30,0xF2,0x2F,0x0E, \
  36051. + 0x30,0x72,0x00,0x00,0x9B,0x8F,0x00,0x06,0x2F,0x0E, \
  36052. + 0x32,0xF1,0x32,0xB0,0x00,0x4F,0x00,0x57,0x00,0x28, \
  36053. + 0x00,0x00,0x97,0x9E,0x00,0x4E,0x30,0x72,0x00,0x06, \
  36054. + 0x2F,0x0E,0x32,0xC1,0x32,0xF0,0x00,0x4A,0x00,0x80, \
  36055. + 0x00,0x02,0x00,0x00,0x97,0x9E,0x40,0x7E,0x00,0x08, \
  36056. + 0x08,0x16,0x00,0x54,0x00,0x01,0x1B,0xFE,0x00,0x00, \
  36057. + 0x9F,0x9E,0x40,0xB3,0x00,0x00,0x02,0x1F,0x00,0x08, \
  36058. + 0x28,0x1B,0x30,0x73,0x29,0x1F,0x30,0xD0,0x60,0x9F, \
  36059. + 0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F,0x00,0x52, \
  36060. + 0x00,0x01,0x07,0x01,0x60,0x8B,0x00,0x00,0x30,0xD0, \
  36061. + 0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
  36062. + 0x40,0x9C,0x00,0x00,0x02,0x8F,0x00,0x00,0x30,0xF2, \
  36063. + 0x00,0x06,0x18,0xAD,0x00,0x00,0x9F,0xFF,0x30,0xF2, \
  36064. + 0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0,0x00,0x52, \
  36065. + 0x00,0x08,0x28,0x1A,0x60,0x87,0x00,0x00,0x30,0xF2, \
  36066. + 0x18,0xAD,0x06,0x00,0x29,0x1E,0x30,0xF2,0x50,0xB3, \
  36067. + 0xFF,0xFF,0x18,0xB8,0x08,0x16,0x00,0x54,0x00,0x01, \
  36068. + 0x1B,0xFE,0x18,0xC5,0x32,0xF1,0x28,0x5D,0x32,0xF1, \
  36069. + 0x00,0x55,0x00,0x08,0x28,0x5F,0x00,0x00,0x8F,0x9F, \
  36070. + 0x29,0x33,0x08,0x16,0x00,0x49,0x00,0x01,0x1B,0xFF, \
  36071. + 0x00,0x01,0x1B,0xFF \
  36072. +}
  36073. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  36074. +
  36075. +#if (DPAA_VERSION == 10)
  36076. +/* Version: 106.1.9 */
  36077. +#define SW_PRS_OFFLOAD_PATCH \
  36078. +{ \
  36079. + 0x31,0x52,0x00,0xDA,0x0A,0x00,0x00,0x00,0x00,0x00, \
  36080. + 0x00,0x00,0x43,0x0A,0x00,0x00,0x00,0x01,0x1B,0xFE, \
  36081. + 0x00,0x00,0x99,0x00,0x53,0x13,0x00,0x00,0x00,0x00, \
  36082. + 0x9F,0x98,0x53,0x13,0x00,0x00,0x1B,0x23,0x33,0xF1, \
  36083. + 0x00,0xF9,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
  36084. + 0x28,0x7F,0x00,0x03,0x00,0x02,0x00,0x00,0x00,0x01, \
  36085. + 0x32,0xC1,0x32,0xF0,0x00,0x4A,0x00,0x80,0x1F,0xFF, \
  36086. + 0x00,0x01,0x1B,0xFE,0x31,0x52,0x00,0xDA,0x06,0x00, \
  36087. + 0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x2F,0x00,0x00, \
  36088. + 0x00,0x01,0x1B,0xFE,0x31,0x52,0x00,0xDA,0x00,0x40, \
  36089. + 0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x95,0x00,0x00, \
  36090. + 0x00,0x00,0x9B,0x8F,0x2F,0x0F,0x32,0xC1,0x00,0x55, \
  36091. + 0x00,0x28,0x28,0x43,0x30,0x7E,0x43,0x45,0x00,0x00, \
  36092. + 0x30,0x7E,0x43,0x45,0x00,0x3C,0x1B,0x5D,0x32,0x11, \
  36093. + 0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00,0x83,0x8F, \
  36094. + 0x2F,0x0F,0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F, \
  36095. + 0x00,0x55,0x00,0x01,0x00,0x81,0x32,0x11,0x00,0x00, \
  36096. + 0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04,0x00,0x4D, \
  36097. + 0x28,0x43,0x06,0x00,0x1B,0x3E,0x30,0x7E,0x53,0x79, \
  36098. + 0x00,0x2B,0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x81, \
  36099. + 0x00,0x00,0x87,0x8F,0x28,0x23,0x06,0x00,0x32,0x11, \
  36100. + 0x32,0xC0,0x00,0x4F,0x00,0x55,0x00,0x01,0x00,0x81, \
  36101. + 0x32,0x11,0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01, \
  36102. + 0x01,0x04,0x00,0x4D,0x28,0x43,0x06,0x00,0x00,0x01, \
  36103. + 0x1B,0xFE,0x00,0x00,0x9B,0x8E,0x53,0x90,0x00,0x00, \
  36104. + 0x06,0x29,0x00,0x00,0x83,0x8F,0x28,0x23,0x06,0x00, \
  36105. + 0x06,0x29,0x32,0xC1,0x00,0x55,0x00,0x28,0x00,0x00, \
  36106. + 0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04,0x00,0x4D, \
  36107. + 0x28,0x43,0x06,0x00,0x00,0x01,0x1B,0xFE,0x32,0xC1, \
  36108. + 0x00,0x55,0x00,0x28,0x28,0x43,0x1B,0xCF,0x00,0x00, \
  36109. + 0x9B,0x8F,0x2F,0x0F,0x32,0xC1,0x00,0x55,0x00,0x28, \
  36110. + 0x28,0x43,0x30,0x7E,0x43,0xBF,0x00,0x2C,0x32,0x11, \
  36111. + 0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00,0x87,0x8F, \
  36112. + 0x28,0x23,0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F, \
  36113. + 0x00,0x81,0x00,0x00,0x83,0x8F,0x2F,0x0F,0x06,0x00, \
  36114. + 0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x55,0x00,0x01, \
  36115. + 0x00,0x81,0x32,0x11,0x00,0x00,0x83,0x8E,0x00,0x50, \
  36116. + 0x00,0x01,0x01,0x04,0x00,0x4D,0x28,0x43,0x06,0x00, \
  36117. + 0x1B,0x9C,0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00, \
  36118. + 0x00,0x00,0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02, \
  36119. + 0x00,0x00,0x00,0x01,0x32,0xC1,0x32,0xF0,0x00,0x4A, \
  36120. + 0x00,0x80,0x1F,0xFF,0x00,0x01,0x1B,0xFE, \
  36121. +}
  36122. +
  36123. +#else
  36124. +#define SW_PRS_OFFLOAD_PATCH \
  36125. +{ \
  36126. + 0x31,0x52,0x00,0xDA,0x0E,0x4F,0x00,0x00,0x00,0x00, \
  36127. + 0x00,0x00,0x51,0x16,0x08,0x4B,0x31,0x53,0x00,0xFB, \
  36128. + 0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x29,0x2B, \
  36129. + 0x33,0xF1,0x00,0xFB,0x00,0xDF,0x00,0x00,0x00,0x00, \
  36130. + 0x00,0x00,0x28,0x7F,0x31,0x52,0x00,0xDA,0x0A,0x00, \
  36131. + 0x00,0x00,0x00,0x00,0x00,0x00,0x41,0x20,0x00,0x00, \
  36132. + 0x00,0x01,0x1B,0xFE,0x00,0x00,0x99,0x00,0x51,0x29, \
  36133. + 0x00,0x00,0x00,0x00,0x9F,0x98,0x51,0x29,0x00,0x00, \
  36134. + 0x19,0x44,0x09,0x5F,0x00,0x20,0x00,0x00,0x09,0x4F, \
  36135. + 0x00,0x20,0x00,0x00,0x34,0xB7,0x00,0xF9,0x00,0x00, \
  36136. + 0x01,0x00,0x00,0x00,0x00,0x00,0x2B,0x97,0x31,0xB3, \
  36137. + 0x29,0x8F,0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00, \
  36138. + 0x00,0x00,0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02, \
  36139. + 0x00,0x00,0x00,0x01,0x1B,0xFE,0x00,0x01,0x1B,0xFE, \
  36140. + 0x31,0x52,0x00,0xDA,0xFC,0x00,0x00,0x00,0x00,0x00, \
  36141. + 0x00,0x00,0x51,0x52,0x40,0x00,0x31,0x92,0x51,0x52, \
  36142. + 0x00,0x88,0x19,0x55,0x08,0x05,0x00,0x00,0x19,0x99, \
  36143. + 0x02,0x1F,0x00,0x08,0x00,0x83,0x02,0x1F,0x00,0x20, \
  36144. + 0x28,0x1B,0x00,0x05,0x29,0x1F,0x30,0xD0,0x61,0x75, \
  36145. + 0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F,0x00,0x52, \
  36146. + 0x00,0x01,0x07,0x01,0x61,0x61,0x00,0x00,0x30,0xD0, \
  36147. + 0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, \
  36148. + 0x41,0x72,0x00,0x00,0x02,0x8F,0x00,0x00,0x30,0xF2, \
  36149. + 0x00,0x06,0x19,0x83,0x00,0x00,0x9F,0xFF,0x30,0xF2, \
  36150. + 0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0,0x00,0x52, \
  36151. + 0x00,0x08,0x28,0x1A,0x61,0x5D,0x00,0x00,0x30,0xF2, \
  36152. + 0x19,0x83,0x06,0x00,0x29,0x1E,0x30,0xF2,0x29,0x0E, \
  36153. + 0x30,0x72,0x00,0x00,0x9B,0x8F,0x00,0x06,0x29,0x0E, \
  36154. + 0x32,0xF1,0x32,0xB0,0x00,0x4F,0x00,0x57,0x00,0x28, \
  36155. + 0x00,0x00,0x97,0x9E,0x00,0x4E,0x30,0x72,0x00,0x06, \
  36156. + 0x29,0x0E,0x08,0x05,0x00,0x01,0x31,0x52,0x00,0xDA, \
  36157. + 0x0E,0x4F,0x00,0x00,0x00,0x00,0x00,0x00,0x51,0xAF, \
  36158. + 0x04,0x4B,0x31,0x53,0x00,0xFB,0xFF,0xF0,0x00,0x00, \
  36159. + 0x00,0x00,0x00,0x00,0x29,0x2B,0x33,0xF1,0x00,0xFB, \
  36160. + 0x00,0xDF,0x00,0x00,0x00,0x00,0x00,0x00,0x28,0x7F, \
  36161. + 0x31,0x52,0x00,0xDA,0x06,0x00,0x00,0x00,0x00,0x00, \
  36162. + 0x00,0x00,0x41,0xB9,0x00,0x00,0x00,0x01,0x1B,0xFE, \
  36163. + 0x31,0x52,0x00,0xDA,0x00,0x40,0x00,0x00,0x00,0x00, \
  36164. + 0x00,0x00,0x42,0x06,0x00,0x00,0x00,0x00,0x9B,0x8F, \
  36165. + 0x28,0x01,0x32,0xC1,0x00,0x55,0x00,0x28,0x28,0x43, \
  36166. + 0x30,0x00,0x41,0xEB,0x00,0x2C,0x32,0x11,0x32,0xC0, \
  36167. + 0x00,0x4F,0x00,0x81,0x00,0x00,0x87,0x8F,0x28,0x23, \
  36168. + 0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x81, \
  36169. + 0x00,0x00,0x83,0x8F,0x28,0x01,0x06,0x00,0x32,0x11, \
  36170. + 0x32,0xC0,0x00,0x4F,0x00,0x55,0x00,0x01,0x00,0x81, \
  36171. + 0x32,0x11,0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01, \
  36172. + 0x01,0x04,0x00,0x4D,0x28,0x43,0x06,0x00,0x19,0xC8, \
  36173. + 0x09,0x5F,0x00,0x20,0x00,0x00,0x09,0x4F,0x00,0x20, \
  36174. + 0x00,0x00,0x34,0xB7,0x00,0xF9,0x00,0x00,0x01,0x00, \
  36175. + 0x00,0x00,0x00,0x00,0x2B,0x97,0x31,0xB3,0x29,0x8F, \
  36176. + 0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00,0x00,0x00, \
  36177. + 0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02,0x00,0x00, \
  36178. + 0x00,0x01,0x1B,0xFE,0x30,0x50,0x52,0x0B,0x00,0x00, \
  36179. + 0x00,0x01,0x1B,0xFE,0x32,0xF1,0x32,0xC0,0x00,0x4F, \
  36180. + 0x00,0x81,0x00,0x02,0x00,0x00,0x97,0x9E,0x42,0x18, \
  36181. + 0x00,0x08,0x08,0x16,0x00,0x54,0x00,0x01,0x1B,0xFE, \
  36182. + 0x00,0x00,0x9F,0x9E,0x42,0x4D,0x00,0x00,0x02,0x1F, \
  36183. + 0x00,0x08,0x28,0x1B,0x30,0x73,0x29,0x1F,0x30,0xD0, \
  36184. + 0x62,0x39,0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F, \
  36185. + 0x00,0x52,0x00,0x01,0x07,0x01,0x62,0x25,0x00,0x00, \
  36186. + 0x30,0xD0,0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00, \
  36187. + 0x00,0x00,0x42,0x36,0x00,0x00,0x02,0x8F,0x00,0x00, \
  36188. + 0x30,0xF2,0x00,0x06,0x1A,0x47,0x00,0x00,0x9F,0xFF, \
  36189. + 0x30,0xF2,0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0, \
  36190. + 0x00,0x52,0x00,0x08,0x28,0x1A,0x62,0x21,0x00,0x00, \
  36191. + 0x30,0xF2,0x1A,0x47,0x06,0x00,0x29,0x1E,0x30,0xF2, \
  36192. + 0x52,0x4D,0xFF,0xFF,0x1A,0x52,0x08,0x16,0x00,0x54, \
  36193. + 0x00,0x01,0x1B,0xFE,0x1A,0x5F,0x32,0xF1,0x28,0x5D, \
  36194. + 0x32,0xF1,0x00,0x55,0x00,0x08,0x28,0x5F,0x00,0x00, \
  36195. + 0x8F,0x9F,0x29,0x33,0x08,0x16,0x00,0x49,0x00,0x01, \
  36196. + 0x1B,0xFF,0x00,0x01,0x1B,0xFF,0x31,0x52,0x00,0xDA, \
  36197. + 0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x6D, \
  36198. + 0x40,0x00,0x31,0x92,0x52,0x6D,0x00,0x88,0x1A,0x70, \
  36199. + 0x08,0x05,0x00,0x00,0x1A,0xB4,0x02,0x1F,0x00,0x08, \
  36200. + 0x00,0x83,0x02,0x1F,0x00,0x20,0x28,0x1B,0x00,0x05, \
  36201. + 0x29,0x1F,0x30,0xD0,0x62,0x90,0x00,0x07,0x00,0x05, \
  36202. + 0x00,0x00,0xC3,0x8F,0x00,0x52,0x00,0x01,0x07,0x01, \
  36203. + 0x62,0x7C,0x00,0x00,0x30,0xD0,0x00,0xDA,0x00,0x01, \
  36204. + 0x00,0x00,0x00,0x00,0x00,0x00,0x42,0x8D,0x00,0x00, \
  36205. + 0x02,0x8F,0x00,0x00,0x30,0xF2,0x00,0x06,0x1A,0x9E, \
  36206. + 0x00,0x00,0x9F,0xFF,0x30,0xF2,0x00,0x06,0x29,0x1E, \
  36207. + 0x07,0x08,0x30,0xD0,0x00,0x52,0x00,0x08,0x28,0x1A, \
  36208. + 0x62,0x78,0x00,0x00,0x30,0xF2,0x1A,0x9E,0x06,0x00, \
  36209. + 0x29,0x1E,0x30,0xF2,0x29,0x0E,0x30,0x72,0x00,0x00, \
  36210. + 0x9B,0x8F,0x00,0x06,0x29,0x0E,0x32,0xF1,0x32,0xB0, \
  36211. + 0x00,0x4F,0x00,0x57,0x00,0x28,0x00,0x00,0x97,0x9E, \
  36212. + 0x00,0x4E,0x30,0x72,0x00,0x06,0x29,0x0E,0x08,0x05, \
  36213. + 0x00,0x01,0x31,0x52,0x00,0xDA,0x0E,0x4F,0x00,0x00, \
  36214. + 0x00,0x00,0x00,0x00,0x52,0xCA,0x04,0x4B,0x31,0x53, \
  36215. + 0x00,0xFB,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00, \
  36216. + 0x29,0x2B,0x33,0xF1,0x00,0xFB,0x00,0xDF,0x00,0x00, \
  36217. + 0x00,0x00,0x00,0x00,0x28,0x7F,0x31,0x52,0x00,0xDA, \
  36218. + 0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x42,0xD4, \
  36219. + 0x00,0x00,0x00,0x01,0x1B,0xFE,0x31,0x52,0x00,0xDA, \
  36220. + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x37, \
  36221. + 0x00,0x00,0x00,0x00,0x9B,0x8F,0x28,0x01,0x32,0xC1, \
  36222. + 0x00,0x55,0x00,0x28,0x28,0x43,0x30,0x00,0x42,0xEA, \
  36223. + 0x00,0x00,0x30,0x00,0x42,0xEA,0x00,0x3C,0x1B,0x02, \
  36224. + 0x32,0x11,0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00, \
  36225. + 0x83,0x8F,0x28,0x01,0x06,0x00,0x32,0x11,0x32,0xC0, \
  36226. + 0x00,0x4F,0x00,0x55,0x00,0x01,0x00,0x81,0x32,0x11, \
  36227. + 0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04, \
  36228. + 0x00,0x4D,0x28,0x43,0x06,0x00,0x1A,0xE3,0x30,0x00, \
  36229. + 0x43,0x20,0x00,0x2B,0x00,0x00,0x9B,0x8E,0x43,0x0E, \
  36230. + 0x00,0x00,0x32,0xC1,0x00,0x55,0x00,0x28,0x28,0x43, \
  36231. + 0x1B,0x1F,0x06,0x29,0x00,0x00,0x83,0x8F,0x28,0x23, \
  36232. + 0x06,0x00,0x06,0x29,0x32,0xC1,0x00,0x55,0x00,0x28, \
  36233. + 0x00,0x00,0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04, \
  36234. + 0x00,0x4D,0x28,0x43,0x06,0x00,0x1B,0x37,0x32,0x11, \
  36235. + 0x32,0xC0,0x00,0x4F,0x00,0x81,0x00,0x00,0x87,0x8F, \
  36236. + 0x28,0x23,0x06,0x00,0x32,0x11,0x32,0xC0,0x00,0x4F, \
  36237. + 0x00,0x55,0x00,0x01,0x00,0x81,0x32,0x11,0x00,0x00, \
  36238. + 0x83,0x8E,0x00,0x50,0x00,0x01,0x01,0x04,0x00,0x4D, \
  36239. + 0x28,0x43,0x06,0x00,0x30,0x50,0x53,0x3C,0x00,0x00, \
  36240. + 0x00,0x01,0x1B,0xFE,0x32,0xF1,0x32,0xC0,0x00,0x4F, \
  36241. + 0x00,0x81,0x00,0x02,0x00,0x00,0x97,0x9E,0x43,0x49, \
  36242. + 0x00,0x08,0x08,0x16,0x00,0x54,0x00,0x01,0x1B,0xFE, \
  36243. + 0x00,0x00,0x9F,0x9E,0x43,0x7E,0x00,0x00,0x02,0x1F, \
  36244. + 0x00,0x08,0x28,0x1B,0x30,0x73,0x29,0x1F,0x30,0xD0, \
  36245. + 0x63,0x6A,0x00,0x07,0x00,0x05,0x00,0x00,0xC3,0x8F, \
  36246. + 0x00,0x52,0x00,0x01,0x07,0x01,0x63,0x56,0x00,0x00, \
  36247. + 0x30,0xD0,0x00,0xDA,0x00,0x01,0x00,0x00,0x00,0x00, \
  36248. + 0x00,0x00,0x43,0x67,0x00,0x00,0x02,0x8F,0x00,0x00, \
  36249. + 0x30,0xF2,0x00,0x06,0x1B,0x78,0x00,0x00,0x9F,0xFF, \
  36250. + 0x30,0xF2,0x00,0x06,0x29,0x1E,0x07,0x08,0x30,0xD0, \
  36251. + 0x00,0x52,0x00,0x08,0x28,0x1A,0x63,0x52,0x00,0x00, \
  36252. + 0x30,0xF2,0x1B,0x78,0x06,0x00,0x29,0x1E,0x30,0xF2, \
  36253. + 0x53,0x7E,0xFF,0xFF,0x1B,0x83,0x08,0x16,0x00,0x54, \
  36254. + 0x00,0x01,0x1B,0xFE,0x1B,0x90,0x32,0xF1,0x28,0x5D, \
  36255. + 0x32,0xF1,0x00,0x55,0x00,0x08,0x28,0x5F,0x00,0x00, \
  36256. + 0x8F,0x9F,0x29,0x33,0x08,0x16,0x00,0x49,0x00,0x01, \
  36257. + 0x1B,0xFF,0x00,0x01,0x1B,0xFF,0x08,0x07,0x00,0x02, \
  36258. + 0x00,0x00,0x8D,0x80,0x53,0x9C,0x00,0x01,0x30,0x71, \
  36259. + 0x00,0x55,0x00,0x01,0x28,0x0F,0x00,0x00,0x8D,0x00, \
  36260. + 0x53,0xA4,0x00,0x01,0x30,0x71,0x00,0x55,0x00,0x01, \
  36261. + 0x28,0x0F,0x00,0x00,0x83,0x8E,0x53,0xB9,0x00,0x00, \
  36262. + 0x00,0x00,0x86,0x08,0x30,0x71,0x00,0x7B,0x03,0xB9, \
  36263. + 0x33,0xB4,0x00,0xDA,0xFF,0xFF,0x00,0x0F,0x00,0x00, \
  36264. + 0x00,0x00,0x00,0x00,0x86,0x09,0x01,0x03,0x00,0x7D, \
  36265. + 0x03,0xB9,0x1B,0xC8,0x33,0xD1,0x00,0xF9,0x00,0x10, \
  36266. + 0x00,0x00,0x00,0x00,0x00,0x00,0x28,0x7B,0x09,0x5F, \
  36267. + 0x00,0x1A,0x00,0x00,0x09,0x4F,0x00,0x1A,0x00,0x00, \
  36268. + 0x00,0x01,0x1B,0xFF,0x00,0x00,0x8C,0x00,0x53,0xF0, \
  36269. + 0x00,0x01,0x34,0xF5,0x00,0xFB,0xFF,0xFF,0x00,0x7F, \
  36270. + 0x00,0x00,0x00,0x00,0x2A,0x9F,0x00,0x00,0x93,0x8F, \
  36271. + 0x28,0x49,0x00,0x00,0x97,0x8F,0x28,0x4B,0x34,0x61, \
  36272. + 0x28,0x4D,0x34,0x71,0x28,0x4F,0x34,0xB7,0x00,0xF9, \
  36273. + 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x2B,0x97, \
  36274. + 0x33,0xF1,0x00,0xF9,0x00,0x01,0x00,0x00,0x00,0x00, \
  36275. + 0x00,0x00,0x28,0x7F,0x00,0x03,0x00,0x02,0x00,0x00, \
  36276. + 0x00,0x01,0x1B,0xFF,0x00,0x01,0x1B,0xFF, \
  36277. +}
  36278. +#endif /* (DPAA_VERSION == 10) */
  36279. +
  36280. +/****************************/
  36281. +/* Parser defines */
  36282. +/****************************/
  36283. +#define FM_PCD_PRS_SW_TAIL_SIZE 4 /**< Number of bytes that must be cleared at
  36284. + the end of the SW parser area */
  36285. +
  36286. +/* masks */
  36287. +#define PRS_ERR_CAP 0x80000000
  36288. +#define PRS_ERR_TYPE_DOUBLE 0x40000000
  36289. +#define PRS_ERR_SINGLE_ECC_CNT_MASK 0x00FF0000
  36290. +#define PRS_ERR_ADDR_MASK 0x000001FF
  36291. +
  36292. +/* others */
  36293. +#define PRS_MAX_CYCLE_LIMIT 8191
  36294. +#define PRS_SW_DATA 0x00000800
  36295. +#define PRS_REGS_OFFSET 0x00000840
  36296. +
  36297. +#define GET_FM_PCD_PRS_PORT_ID(prsPortId,hardwarePortId) \
  36298. + prsPortId = (uint8_t)(hardwarePortId & 0x0f)
  36299. +
  36300. +#define GET_FM_PCD_INDEX_FLAG(bitMask, prsPortId) \
  36301. + bitMask = 0x80000000>>prsPortId
  36302. +
  36303. +#endif /* __FM_PRS_H */
  36304. --- /dev/null
  36305. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.c
  36306. @@ -0,0 +1,984 @@
  36307. +/*
  36308. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  36309. + *
  36310. + * Redistribution and use in source and binary forms, with or without
  36311. + * modification, are permitted provided that the following conditions are met:
  36312. + * * Redistributions of source code must retain the above copyright
  36313. + * notice, this list of conditions and the following disclaimer.
  36314. + * * Redistributions in binary form must reproduce the above copyright
  36315. + * notice, this list of conditions and the following disclaimer in the
  36316. + * documentation and/or other materials provided with the distribution.
  36317. + * * Neither the name of Freescale Semiconductor nor the
  36318. + * names of its contributors may be used to endorse or promote products
  36319. + * derived from this software without specific prior written permission.
  36320. + *
  36321. + *
  36322. + * ALTERNATIVELY, this software may be distributed under the terms of the
  36323. + * GNU General Public License ("GPL") as published by the Free Software
  36324. + * Foundation, either version 2 of that License or (at your option) any
  36325. + * later version.
  36326. + *
  36327. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  36328. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  36329. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  36330. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  36331. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  36332. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  36333. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  36334. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  36335. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  36336. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36337. + */
  36338. +
  36339. +
  36340. +/******************************************************************************
  36341. + @File fm_replic.c
  36342. +
  36343. + @Description FM frame replicator
  36344. +*//***************************************************************************/
  36345. +#include "std_ext.h"
  36346. +#include "error_ext.h"
  36347. +#include "string_ext.h"
  36348. +#include "debug_ext.h"
  36349. +#include "fm_pcd_ext.h"
  36350. +#include "fm_muram_ext.h"
  36351. +#include "fm_common.h"
  36352. +#include "fm_hc.h"
  36353. +#include "fm_replic.h"
  36354. +#include "fm_cc.h"
  36355. +#include "list_ext.h"
  36356. +
  36357. +
  36358. +/****************************************/
  36359. +/* static functions */
  36360. +/****************************************/
  36361. +static uint8_t GetMemberPosition(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36362. + uint32_t memberIndex,
  36363. + bool isAddOperation)
  36364. +{
  36365. + uint8_t memberPosition;
  36366. + uint32_t lastMemberIndex;
  36367. +
  36368. + ASSERT_COND(p_ReplicGroup);
  36369. +
  36370. + /* the last member index is different between add and remove operation -
  36371. + in case of remove - this is exactly the last member index
  36372. + in case of add - this is the last member index + 1 - e.g.
  36373. + if we have 4 members, the index of the actual last member is 3(because the
  36374. + index starts from 0) therefore in order to add a new member as the last
  36375. + member we shall use memberIndex = 4 and not 3
  36376. + */
  36377. + if (isAddOperation)
  36378. + lastMemberIndex = p_ReplicGroup->numOfEntries;
  36379. + else
  36380. + lastMemberIndex = p_ReplicGroup->numOfEntries-1;
  36381. +
  36382. + /* last */
  36383. + if (memberIndex == lastMemberIndex)
  36384. + memberPosition = FRM_REPLIC_LAST_MEMBER_INDEX;
  36385. + else
  36386. + {
  36387. + /* first */
  36388. + if (memberIndex == 0)
  36389. + memberPosition = FRM_REPLIC_FIRST_MEMBER_INDEX;
  36390. + else
  36391. + {
  36392. + /* middle */
  36393. + ASSERT_COND(memberIndex < lastMemberIndex);
  36394. + memberPosition = FRM_REPLIC_MIDDLE_MEMBER_INDEX;
  36395. + }
  36396. + }
  36397. + return memberPosition;
  36398. +}
  36399. +
  36400. +static t_Error MemberCheckParams(t_Handle h_FmPcd,
  36401. + t_FmPcdCcNextEngineParams *p_MemberParams)
  36402. +{
  36403. + t_Error err;
  36404. +
  36405. +
  36406. + if ((p_MemberParams->nextEngine != e_FM_PCD_DONE) &&
  36407. + (p_MemberParams->nextEngine != e_FM_PCD_KG) &&
  36408. + (p_MemberParams->nextEngine != e_FM_PCD_PLCR))
  36409. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Next engine of a member should be MatchTable(cc) or Done or Policer"));
  36410. +
  36411. + /* check the regular parameters of the next engine */
  36412. + err = ValidateNextEngineParams(h_FmPcd, p_MemberParams, e_FM_PCD_CC_STATS_MODE_NONE);
  36413. + if (err)
  36414. + RETURN_ERROR(MAJOR, err, ("member next engine parameters"));
  36415. +
  36416. + return E_OK;
  36417. +}
  36418. +
  36419. +static t_Error CheckParams(t_Handle h_FmPcd,
  36420. + t_FmPcdFrmReplicGroupParams *p_ReplicGroupParam)
  36421. +{
  36422. + int i;
  36423. + t_Error err;
  36424. +
  36425. + /* check that max num of entries is at least 2 */
  36426. + if (!IN_RANGE(2, p_ReplicGroupParam->maxNumOfEntries, FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES))
  36427. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, ("maxNumOfEntries in the frame replicator parameters should be 2-%d",FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES));
  36428. +
  36429. + /* check that number of entries is greater than zero */
  36430. + if (!p_ReplicGroupParam->numOfEntries)
  36431. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOFEntries in the frame replicator group should be greater than zero"));
  36432. +
  36433. + /* check that max num of entries is equal or greater than number of entries */
  36434. + if (p_ReplicGroupParam->maxNumOfEntries < p_ReplicGroupParam->numOfEntries)
  36435. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("maxNumOfEntries should be equal or greater than numOfEntries"));
  36436. +
  36437. + for (i=0; i<p_ReplicGroupParam->numOfEntries; i++)
  36438. + {
  36439. + err = MemberCheckParams(h_FmPcd, &p_ReplicGroupParam->nextEngineParams[i]);
  36440. + if (err)
  36441. + RETURN_ERROR(MAJOR, err, ("member check parameters"));
  36442. + }
  36443. + return E_OK;
  36444. +}
  36445. +
  36446. +static t_FmPcdFrmReplicMember *GetAvailableMember(t_FmPcdFrmReplicGroup *p_ReplicGroup)
  36447. +{
  36448. + t_FmPcdFrmReplicMember *p_ReplicMember = NULL;
  36449. + t_List *p_Next;
  36450. +
  36451. + if (!LIST_IsEmpty(&p_ReplicGroup->availableMembersList))
  36452. + {
  36453. + p_Next = LIST_FIRST(&p_ReplicGroup->availableMembersList);
  36454. + p_ReplicMember = LIST_OBJECT(p_Next, t_FmPcdFrmReplicMember, node);
  36455. + ASSERT_COND(p_ReplicMember);
  36456. + LIST_DelAndInit(p_Next);
  36457. + }
  36458. + return p_ReplicMember;
  36459. +}
  36460. +
  36461. +static void PutAvailableMember(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36462. + t_FmPcdFrmReplicMember *p_ReplicMember)
  36463. +{
  36464. + LIST_AddToTail(&p_ReplicMember->node, &p_ReplicGroup->availableMembersList);
  36465. +}
  36466. +
  36467. +static void AddMemberToList(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36468. + t_FmPcdFrmReplicMember *p_CurrentMember,
  36469. + t_List *p_ListHead)
  36470. +{
  36471. + LIST_Add(&p_CurrentMember->node, p_ListHead);
  36472. +
  36473. + p_ReplicGroup->numOfEntries++;
  36474. +}
  36475. +
  36476. +static void RemoveMemberFromList(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36477. + t_FmPcdFrmReplicMember *p_CurrentMember)
  36478. +{
  36479. + ASSERT_COND(p_ReplicGroup->numOfEntries);
  36480. + LIST_DelAndInit(&p_CurrentMember->node);
  36481. + p_ReplicGroup->numOfEntries--;
  36482. +}
  36483. +
  36484. +static void LinkSourceToMember(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36485. + t_AdOfTypeContLookup *p_SourceTd,
  36486. + t_FmPcdFrmReplicMember *p_ReplicMember)
  36487. +{
  36488. + t_FmPcd *p_FmPcd;
  36489. +
  36490. + ASSERT_COND(p_SourceTd);
  36491. + ASSERT_COND(p_ReplicMember);
  36492. + ASSERT_COND(p_ReplicGroup);
  36493. + ASSERT_COND(p_ReplicGroup->h_FmPcd);
  36494. +
  36495. + /* Link the first member in the group to the source TD */
  36496. + p_FmPcd = p_ReplicGroup->h_FmPcd;
  36497. +
  36498. + WRITE_UINT32(p_SourceTd->matchTblPtr,
  36499. + (uint32_t)(XX_VirtToPhys(p_ReplicMember->p_MemberAd) -
  36500. + p_FmPcd->physicalMuramBase));
  36501. +}
  36502. +
  36503. +static void LinkMemberToMember(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36504. + t_FmPcdFrmReplicMember *p_CurrentMember,
  36505. + t_FmPcdFrmReplicMember *p_NextMember)
  36506. +{
  36507. + t_AdOfTypeResult *p_CurrReplicAd = (t_AdOfTypeResult*)p_CurrentMember->p_MemberAd;
  36508. + t_AdOfTypeResult *p_NextReplicAd = NULL;
  36509. + t_FmPcd *p_FmPcd;
  36510. + uint32_t offset = 0;
  36511. +
  36512. + /* Check if the next member exists or it's NULL (- means that this is the last member) */
  36513. + if (p_NextMember)
  36514. + {
  36515. + p_NextReplicAd = (t_AdOfTypeResult*)p_NextMember->p_MemberAd;
  36516. + p_FmPcd = p_ReplicGroup->h_FmPcd;
  36517. + offset = (XX_VirtToPhys(p_NextReplicAd) - (p_FmPcd->physicalMuramBase));
  36518. + offset = ((offset>>NEXT_FRM_REPLIC_ADDR_SHIFT)<< NEXT_FRM_REPLIC_MEMBER_INDEX_SHIFT);
  36519. + }
  36520. +
  36521. + /* link the current AD to point to the AD of the next member */
  36522. + WRITE_UINT32(p_CurrReplicAd->res, offset);
  36523. +}
  36524. +
  36525. +static t_Error ModifyDescriptor(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36526. + void *p_OldDescriptor,
  36527. + void *p_NewDescriptor)
  36528. +{
  36529. + t_Handle h_Hc;
  36530. + t_Error err;
  36531. + t_FmPcd *p_FmPcd;
  36532. +
  36533. + ASSERT_COND(p_ReplicGroup);
  36534. + ASSERT_COND(p_ReplicGroup->h_FmPcd);
  36535. + ASSERT_COND(p_OldDescriptor);
  36536. + ASSERT_COND(p_NewDescriptor);
  36537. +
  36538. + p_FmPcd = p_ReplicGroup->h_FmPcd;
  36539. + h_Hc = FmPcdGetHcHandle(p_FmPcd);
  36540. + if (!h_Hc)
  36541. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("Host command"));
  36542. +
  36543. + err = FmHcPcdCcDoDynamicChange(h_Hc,
  36544. + (uint32_t)(XX_VirtToPhys(p_OldDescriptor) - p_FmPcd->physicalMuramBase),
  36545. + (uint32_t)(XX_VirtToPhys(p_NewDescriptor) - p_FmPcd->physicalMuramBase));
  36546. + if (err)
  36547. + RETURN_ERROR(MAJOR, err, ("Dynamic change host command"));
  36548. +
  36549. + return E_OK;
  36550. +}
  36551. +
  36552. +static void FillReplicAdOfTypeResult(void *p_ReplicAd, bool last)
  36553. +{
  36554. + t_AdOfTypeResult *p_CurrReplicAd = (t_AdOfTypeResult*)p_ReplicAd;
  36555. + uint32_t tmp;
  36556. +
  36557. + tmp = GET_UINT32(p_CurrReplicAd->plcrProfile);
  36558. + if (last)
  36559. + /* clear the NL bit in case it's the last member in the group*/
  36560. + WRITE_UINT32(p_CurrReplicAd->plcrProfile,(tmp & ~FRM_REPLIC_NL_BIT));
  36561. + else
  36562. + /* set the NL bit in case it's not the last member in the group */
  36563. + WRITE_UINT32(p_CurrReplicAd->plcrProfile, (tmp |FRM_REPLIC_NL_BIT));
  36564. +
  36565. + /* set FR bit in the action descriptor */
  36566. + tmp = GET_UINT32(p_CurrReplicAd->nia);
  36567. + WRITE_UINT32(p_CurrReplicAd->nia,
  36568. + (tmp | FRM_REPLIC_FR_BIT | FM_PCD_AD_RESULT_EXTENDED_MODE ));
  36569. +}
  36570. +
  36571. +static void BuildSourceTd(void *p_Ad)
  36572. +{
  36573. + t_AdOfTypeContLookup *p_SourceTd;
  36574. +
  36575. + ASSERT_COND(p_Ad);
  36576. +
  36577. + p_SourceTd = (t_AdOfTypeContLookup *)p_Ad;
  36578. +
  36579. + IOMemSet32((uint8_t*)p_SourceTd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  36580. +
  36581. + /* initialize the source table descriptor */
  36582. + WRITE_UINT32(p_SourceTd->ccAdBase, FM_PCD_AD_CONT_LOOKUP_TYPE);
  36583. + WRITE_UINT32(p_SourceTd->pcAndOffsets, FRM_REPLIC_SOURCE_TD_OPCODE);
  36584. +}
  36585. +
  36586. +static t_Error BuildShadowAndModifyDescriptor(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36587. + t_FmPcdFrmReplicMember *p_NextMember,
  36588. + t_FmPcdFrmReplicMember *p_CurrentMember,
  36589. + bool sourceDescriptor,
  36590. + bool last)
  36591. +{
  36592. + t_FmPcd *p_FmPcd;
  36593. + t_FmPcdFrmReplicMember shadowMember;
  36594. + t_Error err;
  36595. +
  36596. + ASSERT_COND(p_ReplicGroup);
  36597. + ASSERT_COND(p_ReplicGroup->h_FmPcd);
  36598. +
  36599. + p_FmPcd = p_ReplicGroup->h_FmPcd;
  36600. + ASSERT_COND(p_FmPcd->p_CcShadow);
  36601. +
  36602. + if (!TRY_LOCK(p_FmPcd->h_ShadowSpinlock, &p_FmPcd->shadowLock))
  36603. + return ERROR_CODE(E_BUSY);
  36604. +
  36605. + if (sourceDescriptor)
  36606. + {
  36607. + BuildSourceTd(p_FmPcd->p_CcShadow);
  36608. + LinkSourceToMember(p_ReplicGroup, p_FmPcd->p_CcShadow, p_NextMember);
  36609. +
  36610. + /* Modify the source table descriptor according to the prepared shadow descriptor */
  36611. + err = ModifyDescriptor(p_ReplicGroup,
  36612. + p_ReplicGroup->p_SourceTd,
  36613. + p_FmPcd->p_CcShadow/* new prepared source td */);
  36614. +
  36615. + RELEASE_LOCK(p_FmPcd->shadowLock);
  36616. + if (err)
  36617. + RETURN_ERROR(MAJOR, err, ("Modify source Descriptor in BuildShadowAndModifyDescriptor"));
  36618. +
  36619. + }
  36620. + else
  36621. + {
  36622. + IO2IOCpy32(p_FmPcd->p_CcShadow,
  36623. + p_CurrentMember->p_MemberAd,
  36624. + FM_PCD_CC_AD_ENTRY_SIZE);
  36625. +
  36626. + /* update the last bit in the shadow ad */
  36627. + FillReplicAdOfTypeResult(p_FmPcd->p_CcShadow, last);
  36628. +
  36629. + shadowMember.p_MemberAd = p_FmPcd->p_CcShadow;
  36630. +
  36631. + /* update the next FR member index */
  36632. + LinkMemberToMember(p_ReplicGroup, &shadowMember, p_NextMember);
  36633. +
  36634. + /* Modify the next member according to the prepared shadow descriptor */
  36635. + err = ModifyDescriptor(p_ReplicGroup,
  36636. + p_CurrentMember->p_MemberAd,
  36637. + p_FmPcd->p_CcShadow);
  36638. +
  36639. + RELEASE_LOCK(p_FmPcd->shadowLock);
  36640. + if (err)
  36641. + RETURN_ERROR(MAJOR, err, ("Modify Descriptor in BuildShadowAndModifyDescriptor"));
  36642. + }
  36643. +
  36644. +
  36645. + return E_OK;
  36646. +}
  36647. +
  36648. +static t_FmPcdFrmReplicMember* GetMemberByIndex(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36649. + uint16_t memberIndex)
  36650. +{
  36651. + int i=0;
  36652. + t_List *p_Pos;
  36653. + t_FmPcdFrmReplicMember *p_Member = NULL;
  36654. +
  36655. + LIST_FOR_EACH(p_Pos, &p_ReplicGroup->membersList)
  36656. + {
  36657. + if (i == memberIndex)
  36658. + {
  36659. + p_Member = LIST_OBJECT(p_Pos, t_FmPcdFrmReplicMember, node);
  36660. + return p_Member;
  36661. + }
  36662. + i++;
  36663. + }
  36664. + return p_Member;
  36665. +}
  36666. +
  36667. +static t_Error AllocMember(t_FmPcdFrmReplicGroup *p_ReplicGroup)
  36668. +{
  36669. + t_FmPcdFrmReplicMember *p_CurrentMember;
  36670. + t_Handle h_Muram;
  36671. +
  36672. + ASSERT_COND(p_ReplicGroup);
  36673. +
  36674. + h_Muram = FmPcdGetMuramHandle(p_ReplicGroup->h_FmPcd);
  36675. + ASSERT_COND(h_Muram);
  36676. +
  36677. + /* Initialize an internal structure of a member to add to the available members list */
  36678. + p_CurrentMember = (t_FmPcdFrmReplicMember *)XX_Malloc(sizeof(t_FmPcdFrmReplicMember));
  36679. + if (!p_CurrentMember)
  36680. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Frame replicator member"));
  36681. +
  36682. + memset(p_CurrentMember, 0 ,sizeof(t_FmPcdFrmReplicMember));
  36683. +
  36684. + /* Allocate the member AD */
  36685. + p_CurrentMember->p_MemberAd =
  36686. + (t_AdOfTypeResult*)FM_MURAM_AllocMem(h_Muram,
  36687. + FM_PCD_CC_AD_ENTRY_SIZE,
  36688. + FM_PCD_CC_AD_TABLE_ALIGN);
  36689. + if (!p_CurrentMember->p_MemberAd)
  36690. + {
  36691. + XX_Free(p_CurrentMember);
  36692. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("member AD table"));
  36693. + }
  36694. + IOMemSet32((uint8_t*)p_CurrentMember->p_MemberAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  36695. +
  36696. + /* Add the new member to the available members list */
  36697. + LIST_AddToTail(&p_CurrentMember->node, &(p_ReplicGroup->availableMembersList));
  36698. +
  36699. + return E_OK;
  36700. +}
  36701. +
  36702. +static t_FmPcdFrmReplicMember* InitMember(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36703. + t_FmPcdCcNextEngineParams *p_MemberParams,
  36704. + bool last)
  36705. +{
  36706. + t_FmPcdFrmReplicMember *p_CurrentMember = NULL;
  36707. +
  36708. + ASSERT_COND(p_ReplicGroup);
  36709. +
  36710. + /* Get an available member from the internal members list */
  36711. + p_CurrentMember = GetAvailableMember(p_ReplicGroup);
  36712. + if (!p_CurrentMember)
  36713. + {
  36714. + REPORT_ERROR(MAJOR, E_NOT_FOUND, ("Available member"));
  36715. + return NULL;
  36716. + }
  36717. + p_CurrentMember->h_Manip = NULL;
  36718. +
  36719. + /* clear the Ad of the new member */
  36720. + IOMemSet32((uint8_t*)p_CurrentMember->p_MemberAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  36721. +
  36722. + INIT_LIST(&p_CurrentMember->node);
  36723. +
  36724. + /* Initialize the Ad of the member */
  36725. + NextStepAd(p_CurrentMember->p_MemberAd,
  36726. + NULL,
  36727. + p_MemberParams,
  36728. + p_ReplicGroup->h_FmPcd);
  36729. +
  36730. + /* save Manip handle (for free needs) */
  36731. + if (p_MemberParams->h_Manip)
  36732. + p_CurrentMember->h_Manip = p_MemberParams->h_Manip;
  36733. +
  36734. + /* Initialize the relevant frame replicator fields in the AD */
  36735. + FillReplicAdOfTypeResult(p_CurrentMember->p_MemberAd, last);
  36736. +
  36737. + return p_CurrentMember;
  36738. +}
  36739. +
  36740. +static void FreeMember(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36741. + t_FmPcdFrmReplicMember *p_Member)
  36742. +{
  36743. + /* Note: Can't free the member AD just returns the member to the available
  36744. + member list - therefore only memset the AD */
  36745. +
  36746. + /* zero the AD */
  36747. + IOMemSet32(p_Member->p_MemberAd, 0, FM_PCD_CC_AD_ENTRY_SIZE);
  36748. +
  36749. +
  36750. + /* return the member to the available members list */
  36751. + PutAvailableMember(p_ReplicGroup, p_Member);
  36752. +}
  36753. +
  36754. +static t_Error RemoveMember(t_FmPcdFrmReplicGroup *p_ReplicGroup,
  36755. + uint16_t memberIndex)
  36756. +{
  36757. + t_FmPcd *p_FmPcd = NULL;
  36758. + t_FmPcdFrmReplicMember *p_CurrentMember = NULL, *p_PreviousMember = NULL, *p_NextMember = NULL;
  36759. + t_Error err;
  36760. + uint8_t memberPosition;
  36761. +
  36762. + p_FmPcd = p_ReplicGroup->h_FmPcd;
  36763. + ASSERT_COND(p_FmPcd);
  36764. + UNUSED(p_FmPcd);
  36765. +
  36766. + p_CurrentMember = GetMemberByIndex(p_ReplicGroup, memberIndex);
  36767. + ASSERT_COND(p_CurrentMember);
  36768. +
  36769. + /* determine the member position in the group */
  36770. + memberPosition = GetMemberPosition(p_ReplicGroup,
  36771. + memberIndex,
  36772. + FALSE/*remove operation*/);
  36773. +
  36774. + switch (memberPosition)
  36775. + {
  36776. + case FRM_REPLIC_FIRST_MEMBER_INDEX:
  36777. + p_NextMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex+1));
  36778. + ASSERT_COND(p_NextMember);
  36779. +
  36780. + /* update the source td itself by using a host command */
  36781. + err = BuildShadowAndModifyDescriptor(p_ReplicGroup,
  36782. + p_NextMember,
  36783. + NULL,
  36784. + TRUE/*sourceDescriptor*/,
  36785. + FALSE/*last*/);
  36786. + break;
  36787. +
  36788. + case FRM_REPLIC_MIDDLE_MEMBER_INDEX:
  36789. + p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
  36790. + ASSERT_COND(p_PreviousMember);
  36791. +
  36792. + p_NextMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex+1));
  36793. + ASSERT_COND(p_NextMember);
  36794. +
  36795. + err = BuildShadowAndModifyDescriptor(p_ReplicGroup,
  36796. + p_NextMember,
  36797. + p_PreviousMember,
  36798. + FALSE/*sourceDescriptor*/,
  36799. + FALSE/*last*/);
  36800. +
  36801. + break;
  36802. +
  36803. + case FRM_REPLIC_LAST_MEMBER_INDEX:
  36804. + p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
  36805. + ASSERT_COND(p_PreviousMember);
  36806. +
  36807. + err = BuildShadowAndModifyDescriptor(p_ReplicGroup,
  36808. + NULL,
  36809. + p_PreviousMember,
  36810. + FALSE/*sourceDescriptor*/,
  36811. + TRUE/*last*/);
  36812. + break;
  36813. +
  36814. + default:
  36815. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("member position in remove member"));
  36816. + }
  36817. +
  36818. + if (err)
  36819. + RETURN_ERROR(MAJOR, err, NO_MSG);
  36820. +
  36821. + if (p_CurrentMember->h_Manip)
  36822. + {
  36823. + FmPcdManipUpdateOwner(p_CurrentMember->h_Manip, FALSE);
  36824. + p_CurrentMember->h_Manip = NULL;
  36825. + }
  36826. +
  36827. + /* remove the member from the driver internal members list */
  36828. + RemoveMemberFromList(p_ReplicGroup, p_CurrentMember);
  36829. +
  36830. + /* return the member to the available members list */
  36831. + FreeMember(p_ReplicGroup, p_CurrentMember);
  36832. +
  36833. + return E_OK;
  36834. +}
  36835. +
  36836. +static void DeleteGroup(t_FmPcdFrmReplicGroup *p_ReplicGroup)
  36837. +{
  36838. + int i, j;
  36839. + t_Handle h_Muram;
  36840. + t_FmPcdFrmReplicMember *p_Member, *p_CurrentMember;
  36841. +
  36842. + if (p_ReplicGroup)
  36843. + {
  36844. + ASSERT_COND(p_ReplicGroup->h_FmPcd);
  36845. + h_Muram = FmPcdGetMuramHandle(p_ReplicGroup->h_FmPcd);
  36846. + ASSERT_COND(h_Muram);
  36847. +
  36848. + /* free the source table descriptor */
  36849. + if (p_ReplicGroup->p_SourceTd)
  36850. + {
  36851. + FM_MURAM_FreeMem(h_Muram, p_ReplicGroup->p_SourceTd);
  36852. + p_ReplicGroup->p_SourceTd = NULL;
  36853. + }
  36854. +
  36855. + /* Remove all members from the members linked list (hw and sw) and
  36856. + return the members to the available members list */
  36857. + if (p_ReplicGroup->numOfEntries)
  36858. + {
  36859. + j = p_ReplicGroup->numOfEntries-1;
  36860. +
  36861. + /* manually removal of the member because there are no owners of
  36862. + this group */
  36863. + for (i=j; i>=0; i--)
  36864. + {
  36865. + p_CurrentMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)i/*memberIndex*/);
  36866. + ASSERT_COND(p_CurrentMember);
  36867. +
  36868. + if (p_CurrentMember->h_Manip)
  36869. + {
  36870. + FmPcdManipUpdateOwner(p_CurrentMember->h_Manip, FALSE);
  36871. + p_CurrentMember->h_Manip = NULL;
  36872. + }
  36873. +
  36874. + /* remove the member from the internal driver members list */
  36875. + RemoveMemberFromList(p_ReplicGroup, p_CurrentMember);
  36876. +
  36877. + /* return the member to the available members list */
  36878. + FreeMember(p_ReplicGroup, p_CurrentMember);
  36879. + }
  36880. + }
  36881. +
  36882. + /* Free members AD */
  36883. + for (i=0; i<p_ReplicGroup->maxNumOfEntries; i++)
  36884. + {
  36885. + p_Member = GetAvailableMember(p_ReplicGroup);
  36886. + ASSERT_COND(p_Member);
  36887. + if (p_Member->p_MemberAd)
  36888. + {
  36889. + FM_MURAM_FreeMem(h_Muram, p_Member->p_MemberAd);
  36890. + p_Member->p_MemberAd = NULL;
  36891. + }
  36892. + XX_Free(p_Member);
  36893. + }
  36894. +
  36895. + /* release the group lock */
  36896. + if (p_ReplicGroup->p_Lock)
  36897. + FmPcdReleaseLock(p_ReplicGroup->h_FmPcd, p_ReplicGroup->p_Lock);
  36898. +
  36899. + /* free the replicator group */
  36900. + XX_Free(p_ReplicGroup);
  36901. + }
  36902. +}
  36903. +
  36904. +
  36905. +/*****************************************************************************/
  36906. +/* Inter-module API routines */
  36907. +/*****************************************************************************/
  36908. +
  36909. +/* NOTE: the inter-module routines are locked by cc in case of using them */
  36910. +void * FrmReplicGroupGetSourceTableDescriptor(t_Handle h_ReplicGroup)
  36911. +{
  36912. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
  36913. + ASSERT_COND(p_ReplicGroup);
  36914. +
  36915. + return (p_ReplicGroup->p_SourceTd);
  36916. +}
  36917. +
  36918. +void FrmReplicGroupUpdateAd(t_Handle h_ReplicGroup,
  36919. + void *p_Ad,
  36920. + t_Handle *h_AdNew)
  36921. +{
  36922. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
  36923. + t_AdOfTypeResult *p_AdResult = (t_AdOfTypeResult*)p_Ad;
  36924. + t_FmPcd *p_FmPcd;
  36925. +
  36926. + ASSERT_COND(p_ReplicGroup);
  36927. + p_FmPcd = p_ReplicGroup->h_FmPcd;
  36928. +
  36929. + /* build a bypass ad */
  36930. + WRITE_UINT32(p_AdResult->fqid, FM_PCD_AD_BYPASS_TYPE |
  36931. + (uint32_t)((XX_VirtToPhys(p_ReplicGroup->p_SourceTd)) - p_FmPcd->physicalMuramBase));
  36932. +
  36933. + *h_AdNew = NULL;
  36934. +}
  36935. +
  36936. +void FrmReplicGroupUpdateOwner(t_Handle h_ReplicGroup,
  36937. + bool add)
  36938. +{
  36939. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
  36940. + ASSERT_COND(p_ReplicGroup);
  36941. +
  36942. + /* update the group owner counter */
  36943. + if (add)
  36944. + p_ReplicGroup->owners++;
  36945. + else
  36946. + {
  36947. + ASSERT_COND(p_ReplicGroup->owners);
  36948. + p_ReplicGroup->owners--;
  36949. + }
  36950. +}
  36951. +
  36952. +t_Error FrmReplicGroupTryLock(t_Handle h_ReplicGroup)
  36953. +{
  36954. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
  36955. +
  36956. + ASSERT_COND(h_ReplicGroup);
  36957. +
  36958. + if (FmPcdLockTryLock(p_ReplicGroup->p_Lock))
  36959. + return E_OK;
  36960. +
  36961. + return ERROR_CODE(E_BUSY);
  36962. +}
  36963. +
  36964. +void FrmReplicGroupUnlock(t_Handle h_ReplicGroup)
  36965. +{
  36966. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
  36967. +
  36968. + ASSERT_COND(h_ReplicGroup);
  36969. +
  36970. + FmPcdLockUnlock(p_ReplicGroup->p_Lock);
  36971. +}
  36972. +/*********************** End of inter-module routines ************************/
  36973. +
  36974. +
  36975. +/****************************************/
  36976. +/* API Init unit functions */
  36977. +/****************************************/
  36978. +t_Handle FM_PCD_FrmReplicSetGroup(t_Handle h_FmPcd,
  36979. + t_FmPcdFrmReplicGroupParams *p_ReplicGroupParam)
  36980. +{
  36981. + t_FmPcdFrmReplicGroup *p_ReplicGroup;
  36982. + t_FmPcdFrmReplicMember *p_CurrentMember, *p_NextMember = NULL;
  36983. + int i;
  36984. + t_Error err;
  36985. + bool last = FALSE;
  36986. + t_Handle h_Muram;
  36987. +
  36988. + SANITY_CHECK_RETURN_VALUE(h_FmPcd, E_INVALID_HANDLE, NULL);
  36989. + SANITY_CHECK_RETURN_VALUE(p_ReplicGroupParam, E_INVALID_HANDLE, NULL);
  36990. +
  36991. + if (!FmPcdIsAdvancedOffloadSupported(h_FmPcd))
  36992. + {
  36993. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Advanced-offload must be enabled"));
  36994. + return NULL;
  36995. + }
  36996. +
  36997. + err = CheckParams(h_FmPcd, p_ReplicGroupParam);
  36998. + if (err)
  36999. + {
  37000. + REPORT_ERROR(MAJOR, err, (NO_MSG));
  37001. + return NULL;
  37002. + }
  37003. +
  37004. + p_ReplicGroup = (t_FmPcdFrmReplicGroup*)XX_Malloc(sizeof(t_FmPcdFrmReplicGroup));
  37005. + if (!p_ReplicGroup)
  37006. + {
  37007. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("No memory"));
  37008. + return NULL;
  37009. + }
  37010. + memset(p_ReplicGroup, 0, sizeof(t_FmPcdFrmReplicGroup));
  37011. +
  37012. + /* initialize lists for internal driver use */
  37013. + INIT_LIST(&p_ReplicGroup->availableMembersList);
  37014. + INIT_LIST(&p_ReplicGroup->membersList);
  37015. +
  37016. + p_ReplicGroup->h_FmPcd = h_FmPcd;
  37017. +
  37018. + h_Muram = FmPcdGetMuramHandle(p_ReplicGroup->h_FmPcd);
  37019. + ASSERT_COND(h_Muram);
  37020. +
  37021. + /* initialize the group lock */
  37022. + p_ReplicGroup->p_Lock = FmPcdAcquireLock(p_ReplicGroup->h_FmPcd);
  37023. + if (!p_ReplicGroup->p_Lock)
  37024. + {
  37025. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("Replic group lock"));
  37026. + DeleteGroup(p_ReplicGroup);
  37027. + return NULL;
  37028. + }
  37029. +
  37030. + /* Allocate the frame replicator source table descriptor */
  37031. + p_ReplicGroup->p_SourceTd =
  37032. + (t_Handle)FM_MURAM_AllocMem(h_Muram,
  37033. + FM_PCD_CC_AD_ENTRY_SIZE,
  37034. + FM_PCD_CC_AD_TABLE_ALIGN);
  37035. + if (!p_ReplicGroup->p_SourceTd)
  37036. + {
  37037. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("frame replicator source table descriptor"));
  37038. + DeleteGroup(p_ReplicGroup);
  37039. + return NULL;
  37040. + }
  37041. +
  37042. + /* update the shadow size - required for the host commands */
  37043. + err = FmPcdUpdateCcShadow(p_ReplicGroup->h_FmPcd,
  37044. + FM_PCD_CC_AD_ENTRY_SIZE,
  37045. + FM_PCD_CC_AD_TABLE_ALIGN);
  37046. + if (err)
  37047. + {
  37048. + REPORT_ERROR(MAJOR, err, ("Update CC shadow"));
  37049. + DeleteGroup(p_ReplicGroup);
  37050. + return NULL;
  37051. + }
  37052. +
  37053. + p_ReplicGroup->maxNumOfEntries = p_ReplicGroupParam->maxNumOfEntries;
  37054. +
  37055. + /* Allocate the maximal number of members ADs and Statistics AD for the group
  37056. + It prevents allocation of Muram in run-time */
  37057. + for (i=0; i<p_ReplicGroup->maxNumOfEntries; i++)
  37058. + {
  37059. + err = AllocMember(p_ReplicGroup);
  37060. + if (err)
  37061. + {
  37062. + REPORT_ERROR(MAJOR, err, ("allocate a new member"));
  37063. + DeleteGroup(p_ReplicGroup);
  37064. + return NULL;
  37065. + }
  37066. + }
  37067. +
  37068. + /* Initialize the members linked lists:
  37069. + (hw - the one that is used by the FMan controller and
  37070. + sw - the one that is managed by the driver internally) */
  37071. + for (i=(p_ReplicGroupParam->numOfEntries-1); i>=0; i--)
  37072. + {
  37073. + /* check if this is the last member in the group */
  37074. + if (i == (p_ReplicGroupParam->numOfEntries-1))
  37075. + last = TRUE;
  37076. + else
  37077. + last = FALSE;
  37078. +
  37079. + /* Initialize a new member */
  37080. + p_CurrentMember = InitMember(p_ReplicGroup,
  37081. + &(p_ReplicGroupParam->nextEngineParams[i]),
  37082. + last);
  37083. + if (!p_CurrentMember)
  37084. + {
  37085. + REPORT_ERROR(MAJOR, E_INVALID_HANDLE, ("No available member"));
  37086. + DeleteGroup(p_ReplicGroup);
  37087. + return NULL;
  37088. + }
  37089. +
  37090. + /* Build the members group - link two consecutive members in the hw linked list */
  37091. + LinkMemberToMember(p_ReplicGroup, p_CurrentMember, p_NextMember);
  37092. +
  37093. + /* update the driver internal members list to be compatible to the hw members linked list */
  37094. + AddMemberToList(p_ReplicGroup, p_CurrentMember, &p_ReplicGroup->membersList);
  37095. +
  37096. + p_NextMember = p_CurrentMember;
  37097. + }
  37098. +
  37099. + /* initialize the source table descriptor */
  37100. + BuildSourceTd(p_ReplicGroup->p_SourceTd);
  37101. +
  37102. + /* link the source table descriptor to point to the first member in the group */
  37103. + LinkSourceToMember(p_ReplicGroup, p_ReplicGroup->p_SourceTd, p_NextMember);
  37104. +
  37105. + return p_ReplicGroup;
  37106. +}
  37107. +
  37108. +t_Error FM_PCD_FrmReplicDeleteGroup(t_Handle h_ReplicGroup)
  37109. +{
  37110. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup *)h_ReplicGroup;
  37111. +
  37112. + SANITY_CHECK_RETURN_ERROR(p_ReplicGroup, E_INVALID_HANDLE);
  37113. +
  37114. + if (p_ReplicGroup->owners)
  37115. + RETURN_ERROR(MAJOR,
  37116. + E_INVALID_STATE,
  37117. + ("the group has owners and can't be deleted"));
  37118. +
  37119. + DeleteGroup(p_ReplicGroup);
  37120. +
  37121. + return E_OK;
  37122. +}
  37123. +
  37124. +
  37125. +/*****************************************************************************/
  37126. +/* API Run-time Frame replicator Control unit functions */
  37127. +/*****************************************************************************/
  37128. +t_Error FM_PCD_FrmReplicAddMember(t_Handle h_ReplicGroup,
  37129. + uint16_t memberIndex,
  37130. + t_FmPcdCcNextEngineParams *p_MemberParams)
  37131. +{
  37132. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup*) h_ReplicGroup;
  37133. + t_FmPcdFrmReplicMember *p_NewMember, *p_CurrentMember = NULL, *p_PreviousMember = NULL;
  37134. + t_Error err;
  37135. + uint8_t memberPosition;
  37136. +
  37137. + SANITY_CHECK_RETURN_ERROR(p_ReplicGroup, E_INVALID_HANDLE);
  37138. + SANITY_CHECK_RETURN_ERROR(p_MemberParams, E_INVALID_HANDLE);
  37139. +
  37140. + /* group lock */
  37141. + err = FrmReplicGroupTryLock(p_ReplicGroup);
  37142. + if (GET_ERROR_TYPE(err) == E_BUSY)
  37143. + return ERROR_CODE(E_BUSY);
  37144. +
  37145. + if (memberIndex > p_ReplicGroup->numOfEntries)
  37146. + {
  37147. + /* unlock */
  37148. + FrmReplicGroupUnlock(p_ReplicGroup);
  37149. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
  37150. + ("memberIndex is greater than the members in the list"));
  37151. + }
  37152. +
  37153. + if (memberIndex >= p_ReplicGroup->maxNumOfEntries)
  37154. + {
  37155. + /* unlock */
  37156. + FrmReplicGroupUnlock(p_ReplicGroup);
  37157. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("memberIndex is greater than the allowed number of members in the group"));
  37158. + }
  37159. +
  37160. + if ((p_ReplicGroup->numOfEntries + 1) > FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES)
  37161. + {
  37162. + /* unlock */
  37163. + FrmReplicGroupUnlock(p_ReplicGroup);
  37164. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  37165. + ("numOfEntries with new entry can not be larger than %d\n",
  37166. + FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES));
  37167. + }
  37168. +
  37169. + err = MemberCheckParams(p_ReplicGroup->h_FmPcd, p_MemberParams);
  37170. + if (err)
  37171. + {
  37172. + /* unlock */
  37173. + FrmReplicGroupUnlock(p_ReplicGroup);
  37174. + RETURN_ERROR(MAJOR, err, ("member check parameters in add operation"));
  37175. + }
  37176. + /* determine the member position in the group */
  37177. + memberPosition = GetMemberPosition(p_ReplicGroup,
  37178. + memberIndex,
  37179. + TRUE/* add operation */);
  37180. +
  37181. + /* Initialize a new member */
  37182. + p_NewMember = InitMember(p_ReplicGroup,
  37183. + p_MemberParams,
  37184. + (memberPosition == FRM_REPLIC_LAST_MEMBER_INDEX ? TRUE : FALSE));
  37185. + if (!p_NewMember)
  37186. + {
  37187. + /* unlock */
  37188. + FrmReplicGroupUnlock(p_ReplicGroup);
  37189. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("No available member"));
  37190. + }
  37191. +
  37192. + switch (memberPosition)
  37193. + {
  37194. + case FRM_REPLIC_FIRST_MEMBER_INDEX:
  37195. + p_CurrentMember = GetMemberByIndex(p_ReplicGroup, memberIndex);
  37196. + ASSERT_COND(p_CurrentMember);
  37197. +
  37198. + LinkMemberToMember(p_ReplicGroup, p_NewMember, p_CurrentMember);
  37199. +
  37200. + /* update the internal group source TD */
  37201. + LinkSourceToMember(p_ReplicGroup,
  37202. + p_ReplicGroup->p_SourceTd,
  37203. + p_NewMember);
  37204. +
  37205. + /* add member to the internal sw member list */
  37206. + AddMemberToList(p_ReplicGroup,
  37207. + p_NewMember,
  37208. + &p_ReplicGroup->membersList);
  37209. + break;
  37210. +
  37211. + case FRM_REPLIC_MIDDLE_MEMBER_INDEX:
  37212. + p_CurrentMember = GetMemberByIndex(p_ReplicGroup, memberIndex);
  37213. + ASSERT_COND(p_CurrentMember);
  37214. +
  37215. + p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
  37216. + ASSERT_COND(p_PreviousMember);
  37217. +
  37218. + LinkMemberToMember(p_ReplicGroup, p_NewMember, p_CurrentMember);
  37219. + LinkMemberToMember(p_ReplicGroup, p_PreviousMember, p_NewMember);
  37220. +
  37221. + AddMemberToList(p_ReplicGroup, p_NewMember, &p_PreviousMember->node);
  37222. + break;
  37223. +
  37224. + case FRM_REPLIC_LAST_MEMBER_INDEX:
  37225. + p_PreviousMember = GetMemberByIndex(p_ReplicGroup, (uint16_t)(memberIndex-1));
  37226. + ASSERT_COND(p_PreviousMember);
  37227. +
  37228. + LinkMemberToMember(p_ReplicGroup, p_PreviousMember, p_NewMember);
  37229. + FillReplicAdOfTypeResult(p_PreviousMember->p_MemberAd, FALSE/*last*/);
  37230. +
  37231. + /* add the new member to the internal sw member list */
  37232. + AddMemberToList(p_ReplicGroup, p_NewMember, &p_PreviousMember->node);
  37233. + break;
  37234. +
  37235. + default:
  37236. + /* unlock */
  37237. + FrmReplicGroupUnlock(p_ReplicGroup);
  37238. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("member position in add member"));
  37239. +
  37240. + }
  37241. +
  37242. + /* unlock */
  37243. + FrmReplicGroupUnlock(p_ReplicGroup);
  37244. +
  37245. + return E_OK;
  37246. +}
  37247. +
  37248. +t_Error FM_PCD_FrmReplicRemoveMember(t_Handle h_ReplicGroup,
  37249. + uint16_t memberIndex)
  37250. +{
  37251. + t_FmPcdFrmReplicGroup *p_ReplicGroup = (t_FmPcdFrmReplicGroup*) h_ReplicGroup;
  37252. + t_Error err;
  37253. +
  37254. + SANITY_CHECK_RETURN_ERROR(p_ReplicGroup, E_INVALID_HANDLE);
  37255. +
  37256. + /* lock */
  37257. + err = FrmReplicGroupTryLock(p_ReplicGroup);
  37258. + if (GET_ERROR_TYPE(err) == E_BUSY)
  37259. + return ERROR_CODE(E_BUSY);
  37260. +
  37261. + if (memberIndex >= p_ReplicGroup->numOfEntries)
  37262. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("member index to remove"));
  37263. +
  37264. + /* Design decision: group must contain at least one member
  37265. + No possibility to remove the last member from the group */
  37266. + if (p_ReplicGroup->numOfEntries == 1)
  37267. + RETURN_ERROR(MAJOR, E_CONFLICT, ("Can't remove the last member. At least one member should be related to a group."));
  37268. +
  37269. + err = RemoveMember(p_ReplicGroup, memberIndex);
  37270. +
  37271. + /* unlock */
  37272. + FrmReplicGroupUnlock(p_ReplicGroup);
  37273. +
  37274. + switch (GET_ERROR_TYPE(err))
  37275. + {
  37276. + case E_OK:
  37277. + return E_OK;
  37278. +
  37279. + case E_BUSY:
  37280. + DBG(TRACE, ("E_BUSY error"));
  37281. + return ERROR_CODE(E_BUSY);
  37282. +
  37283. + default:
  37284. + RETURN_ERROR(MAJOR, err, NO_MSG);
  37285. + }
  37286. +}
  37287. +
  37288. +/*********************** End of API routines ************************/
  37289. +
  37290. +
  37291. --- /dev/null
  37292. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_replic.h
  37293. @@ -0,0 +1,101 @@
  37294. +/*
  37295. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  37296. + *
  37297. + * Redistribution and use in source and binary forms, with or without
  37298. + * modification, are permitted provided that the following conditions are met:
  37299. + * * Redistributions of source code must retain the above copyright
  37300. + * notice, this list of conditions and the following disclaimer.
  37301. + * * Redistributions in binary form must reproduce the above copyright
  37302. + * notice, this list of conditions and the following disclaimer in the
  37303. + * documentation and/or other materials provided with the distribution.
  37304. + * * Neither the name of Freescale Semiconductor nor the
  37305. + * names of its contributors may be used to endorse or promote products
  37306. + * derived from this software without specific prior written permission.
  37307. + *
  37308. + *
  37309. + * ALTERNATIVELY, this software may be distributed under the terms of the
  37310. + * GNU General Public License ("GPL") as published by the Free Software
  37311. + * Foundation, either version 2 of that License or (at your option) any
  37312. + * later version.
  37313. + *
  37314. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  37315. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  37316. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  37317. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  37318. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  37319. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  37320. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  37321. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37322. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  37323. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37324. + */
  37325. +
  37326. +
  37327. +/******************************************************************************
  37328. + @File fm_replic.h
  37329. +
  37330. + @Description FM frame replicator
  37331. +*//***************************************************************************/
  37332. +#ifndef __FM_REPLIC_H
  37333. +#define __FM_REPLIC_H
  37334. +
  37335. +#include "std_ext.h"
  37336. +#include "error_ext.h"
  37337. +
  37338. +
  37339. +#define FRM_REPLIC_SOURCE_TD_OPCODE 0x75
  37340. +#define NEXT_FRM_REPLIC_ADDR_SHIFT 4
  37341. +#define NEXT_FRM_REPLIC_MEMBER_INDEX_SHIFT 16
  37342. +#define FRM_REPLIC_FR_BIT 0x08000000
  37343. +#define FRM_REPLIC_NL_BIT 0x10000000
  37344. +#define FRM_REPLIC_INVALID_MEMBER_INDEX 0xffff
  37345. +#define FRM_REPLIC_FIRST_MEMBER_INDEX 0
  37346. +
  37347. +#define FRM_REPLIC_MIDDLE_MEMBER_INDEX 1
  37348. +#define FRM_REPLIC_LAST_MEMBER_INDEX 2
  37349. +
  37350. +#define SOURCE_TD_ITSELF_OPTION 0x01
  37351. +#define SOURCE_TD_COPY_OPTION 0x02
  37352. +#define SOURCE_TD_ITSELF_AND_COPY_OPTION SOURCE_TD_ITSELF_OPTION | SOURCE_TD_COPY_OPTION
  37353. +#define SOURCE_TD_NONE 0x04
  37354. +
  37355. +/*typedef enum e_SourceTdOption
  37356. +{
  37357. + e_SOURCE_TD_NONE = 0,
  37358. + e_SOURCE_TD_ITSELF_OPTION = 1,
  37359. + e_SOURCE_TD_COPY_OPTION = 2,
  37360. + e_SOURCE_TD_ITSELF_AND_COPY_OPTION = e_SOURCE_TD_ITSELF_OPTION | e_SOURCE_TD_COPY_OPTION
  37361. +} e_SourceTdOption;
  37362. +*/
  37363. +
  37364. +typedef struct
  37365. +{
  37366. + volatile uint32_t type;
  37367. + volatile uint32_t frGroupPointer;
  37368. + volatile uint32_t operationCode;
  37369. + volatile uint32_t reserved;
  37370. +} t_FrmReplicGroupSourceAd;
  37371. +
  37372. +typedef struct t_FmPcdFrmReplicMember
  37373. +{
  37374. + void *p_MemberAd; /**< pointer to the member AD */
  37375. + void *p_StatisticsAd;/**< pointer to the statistics AD of the member */
  37376. + t_Handle h_Manip; /**< manip handle - need for free routines */
  37377. + t_List node;
  37378. +} t_FmPcdFrmReplicMember;
  37379. +
  37380. +typedef struct t_FmPcdFrmReplicGroup
  37381. +{
  37382. + t_Handle h_FmPcd;
  37383. +
  37384. + uint8_t maxNumOfEntries;/**< maximal number of members in the group */
  37385. + uint8_t numOfEntries; /**< actual number of members in the group */
  37386. + uint16_t owners; /**< how many keys share this frame replicator group */
  37387. + void *p_SourceTd; /**< pointer to the frame replicator source table descriptor */
  37388. + t_List membersList; /**< the members list - should reflect the order of the members as in the hw linked list*/
  37389. + t_List availableMembersList;/**< list of all the available members in the group */
  37390. + t_FmPcdLock *p_Lock;
  37391. +} t_FmPcdFrmReplicGroup;
  37392. +
  37393. +
  37394. +#endif /* __FM_REPLIC_H */
  37395. --- /dev/null
  37396. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_kg.c
  37397. @@ -0,0 +1,888 @@
  37398. +/*
  37399. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  37400. + *
  37401. + * Redistribution and use in source and binary forms, with or without
  37402. + * modification, are permitted provided that the following conditions are met:
  37403. + * * Redistributions of source code must retain the above copyright
  37404. + * notice, this list of conditions and the following disclaimer.
  37405. + * * Redistributions in binary form must reproduce the above copyright
  37406. + * notice, this list of conditions and the following disclaimer in the
  37407. + * documentation and/or other materials provided with the distribution.
  37408. + * * Neither the name of Freescale Semiconductor nor the
  37409. + * names of its contributors may be used to endorse or promote products
  37410. + * derived from this software without specific prior written permission.
  37411. + *
  37412. + *
  37413. + * ALTERNATIVELY, this software may be distributed under the terms of the
  37414. + * GNU General Public License ("GPL") as published by the Free Software
  37415. + * Foundation, either version 2 of that License or (at your option) any
  37416. + * later version.
  37417. + *
  37418. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  37419. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  37420. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  37421. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  37422. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  37423. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  37424. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  37425. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37426. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  37427. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37428. + */
  37429. +
  37430. +#include "fsl_fman_kg.h"
  37431. +
  37432. +/****************************************/
  37433. +/* static functions */
  37434. +/****************************************/
  37435. +
  37436. +
  37437. +static uint32_t build_ar_bind_scheme(uint8_t hwport_id, bool write)
  37438. +{
  37439. + uint32_t rw;
  37440. +
  37441. + rw = write ? (uint32_t)FM_KG_KGAR_WRITE : (uint32_t)FM_KG_KGAR_READ;
  37442. +
  37443. + return (uint32_t)(FM_KG_KGAR_GO |
  37444. + rw |
  37445. + FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
  37446. + hwport_id |
  37447. + FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP);
  37448. +}
  37449. +
  37450. +static void clear_pe_all_scheme(struct fman_kg_regs *regs, uint8_t hwport_id)
  37451. +{
  37452. + uint32_t ar;
  37453. +
  37454. + fman_kg_write_sp(regs, 0xffffffff, 0);
  37455. +
  37456. + ar = build_ar_bind_scheme(hwport_id, TRUE);
  37457. + fman_kg_write_ar_wait(regs, ar);
  37458. +}
  37459. +
  37460. +static uint32_t build_ar_bind_cls_plan(uint8_t hwport_id, bool write)
  37461. +{
  37462. + uint32_t rw;
  37463. +
  37464. + rw = write ? (uint32_t)FM_KG_KGAR_WRITE : (uint32_t)FM_KG_KGAR_READ;
  37465. +
  37466. + return (uint32_t)(FM_KG_KGAR_GO |
  37467. + rw |
  37468. + FM_PCD_KG_KGAR_SEL_PORT_ENTRY |
  37469. + hwport_id |
  37470. + FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP);
  37471. +}
  37472. +
  37473. +static void clear_pe_all_cls_plan(struct fman_kg_regs *regs, uint8_t hwport_id)
  37474. +{
  37475. + uint32_t ar;
  37476. +
  37477. + fman_kg_write_cpp(regs, 0);
  37478. +
  37479. + ar = build_ar_bind_cls_plan(hwport_id, TRUE);
  37480. + fman_kg_write_ar_wait(regs, ar);
  37481. +}
  37482. +
  37483. +static uint8_t get_gen_ht_code(enum fman_kg_gen_extract_src src,
  37484. + bool no_validation,
  37485. + uint8_t *offset)
  37486. +{
  37487. + int code;
  37488. +
  37489. + switch (src) {
  37490. + case E_FMAN_KG_GEN_EXTRACT_ETH:
  37491. + code = no_validation ? 0x73 : 0x3;
  37492. + break;
  37493. +
  37494. + case E_FMAN_KG_GEN_EXTRACT_ETYPE:
  37495. + code = no_validation ? 0x77 : 0x7;
  37496. + break;
  37497. +
  37498. + case E_FMAN_KG_GEN_EXTRACT_SNAP:
  37499. + code = no_validation ? 0x74 : 0x4;
  37500. + break;
  37501. +
  37502. + case E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_1:
  37503. + code = no_validation ? 0x75 : 0x5;
  37504. + break;
  37505. +
  37506. + case E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_N:
  37507. + code = no_validation ? 0x76 : 0x6;
  37508. + break;
  37509. +
  37510. + case E_FMAN_KG_GEN_EXTRACT_PPPoE:
  37511. + code = no_validation ? 0x78 : 0x8;
  37512. + break;
  37513. +
  37514. + case E_FMAN_KG_GEN_EXTRACT_MPLS_1:
  37515. + code = no_validation ? 0x79 : 0x9;
  37516. + break;
  37517. +
  37518. + case E_FMAN_KG_GEN_EXTRACT_MPLS_2:
  37519. + code = no_validation ? FM_KG_SCH_GEN_HT_INVALID : 0x19;
  37520. + break;
  37521. +
  37522. + case E_FMAN_KG_GEN_EXTRACT_MPLS_3:
  37523. + code = no_validation ? FM_KG_SCH_GEN_HT_INVALID : 0x29;
  37524. + break;
  37525. +
  37526. + case E_FMAN_KG_GEN_EXTRACT_MPLS_N:
  37527. + code = no_validation ? 0x7a : 0xa;
  37528. + break;
  37529. +
  37530. + case E_FMAN_KG_GEN_EXTRACT_IPv4_1:
  37531. + code = no_validation ? 0x7b : 0xb;
  37532. + break;
  37533. +
  37534. + case E_FMAN_KG_GEN_EXTRACT_IPv6_1:
  37535. + code = no_validation ? 0x7b : 0x1b;
  37536. + break;
  37537. +
  37538. + case E_FMAN_KG_GEN_EXTRACT_IPv4_2:
  37539. + code = no_validation ? 0x7c : 0xc;
  37540. + break;
  37541. +
  37542. + case E_FMAN_KG_GEN_EXTRACT_IPv6_2:
  37543. + code = no_validation ? 0x7c : 0x1c;
  37544. + break;
  37545. +
  37546. + case E_FMAN_KG_GEN_EXTRACT_MINENCAP:
  37547. + code = no_validation ? 0x7c : 0x2c;
  37548. + break;
  37549. +
  37550. + case E_FMAN_KG_GEN_EXTRACT_IP_PID:
  37551. + code = no_validation ? 0x72 : 0x2;
  37552. + break;
  37553. +
  37554. + case E_FMAN_KG_GEN_EXTRACT_GRE:
  37555. + code = no_validation ? 0x7d : 0xd;
  37556. + break;
  37557. +
  37558. + case E_FMAN_KG_GEN_EXTRACT_TCP:
  37559. + code = no_validation ? 0x7e : 0xe;
  37560. + break;
  37561. +
  37562. + case E_FMAN_KG_GEN_EXTRACT_UDP:
  37563. + code = no_validation ? 0x7e : 0x1e;
  37564. + break;
  37565. +
  37566. + case E_FMAN_KG_GEN_EXTRACT_SCTP:
  37567. + code = no_validation ? 0x7e : 0x3e;
  37568. + break;
  37569. +
  37570. + case E_FMAN_KG_GEN_EXTRACT_DCCP:
  37571. + code = no_validation ? 0x7e : 0x4e;
  37572. + break;
  37573. +
  37574. + case E_FMAN_KG_GEN_EXTRACT_IPSEC_AH:
  37575. + code = no_validation ? 0x7e : 0x2e;
  37576. + break;
  37577. +
  37578. + case E_FMAN_KG_GEN_EXTRACT_IPSEC_ESP:
  37579. + code = no_validation ? 0x7e : 0x6e;
  37580. + break;
  37581. +
  37582. + case E_FMAN_KG_GEN_EXTRACT_SHIM_1:
  37583. + code = 0x70;
  37584. + break;
  37585. +
  37586. + case E_FMAN_KG_GEN_EXTRACT_SHIM_2:
  37587. + code = 0x71;
  37588. + break;
  37589. +
  37590. + case E_FMAN_KG_GEN_EXTRACT_FROM_DFLT:
  37591. + code = 0x10;
  37592. + break;
  37593. +
  37594. + case E_FMAN_KG_GEN_EXTRACT_FROM_FRAME_START:
  37595. + code = 0x40;
  37596. + break;
  37597. +
  37598. + case E_FMAN_KG_GEN_EXTRACT_FROM_PARSE_RESULT:
  37599. + code = 0x20;
  37600. + break;
  37601. +
  37602. + case E_FMAN_KG_GEN_EXTRACT_FROM_END_OF_PARSE:
  37603. + code = 0x7f;
  37604. + break;
  37605. +
  37606. + case E_FMAN_KG_GEN_EXTRACT_FROM_FQID:
  37607. + code = 0x20;
  37608. + *offset += 0x20;
  37609. + break;
  37610. +
  37611. + default:
  37612. + code = FM_KG_SCH_GEN_HT_INVALID;
  37613. + }
  37614. +
  37615. + return (uint8_t)code;
  37616. +}
  37617. +
  37618. +static uint32_t build_ar_scheme(uint8_t scheme,
  37619. + uint8_t hwport_id,
  37620. + bool update_counter,
  37621. + bool write)
  37622. +{
  37623. + uint32_t rw;
  37624. +
  37625. + rw = (uint32_t)(write ? FM_KG_KGAR_WRITE : FM_KG_KGAR_READ);
  37626. +
  37627. + return (uint32_t)(FM_KG_KGAR_GO |
  37628. + rw |
  37629. + FM_KG_KGAR_SEL_SCHEME_ENTRY |
  37630. + hwport_id |
  37631. + ((uint32_t)scheme << FM_KG_KGAR_NUM_SHIFT) |
  37632. + (update_counter ? FM_KG_KGAR_SCM_WSEL_UPDATE_CNT : 0));
  37633. +}
  37634. +
  37635. +static uint32_t build_ar_cls_plan(uint8_t grp,
  37636. + uint8_t entries_mask,
  37637. + uint8_t hwport_id,
  37638. + bool write)
  37639. +{
  37640. + uint32_t rw;
  37641. +
  37642. + rw = (uint32_t)(write ? FM_KG_KGAR_WRITE : FM_KG_KGAR_READ);
  37643. +
  37644. + return (uint32_t)(FM_KG_KGAR_GO |
  37645. + rw |
  37646. + FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
  37647. + hwport_id |
  37648. + ((uint32_t)grp << FM_KG_KGAR_NUM_SHIFT) |
  37649. + ((uint32_t)entries_mask << FM_KG_KGAR_WSEL_SHIFT));
  37650. +}
  37651. +
  37652. +int fman_kg_write_ar_wait(struct fman_kg_regs *regs, uint32_t fmkg_ar)
  37653. +{
  37654. + iowrite32be(fmkg_ar, &regs->fmkg_ar);
  37655. + /* Wait for GO to be idle and read error */
  37656. + while ((fmkg_ar = ioread32be(&regs->fmkg_ar)) & FM_KG_KGAR_GO) ;
  37657. + if (fmkg_ar & FM_PCD_KG_KGAR_ERR)
  37658. + return -EINVAL;
  37659. + return 0;
  37660. +}
  37661. +
  37662. +void fman_kg_write_sp(struct fman_kg_regs *regs, uint32_t sp, bool add)
  37663. +{
  37664. +
  37665. + struct fman_kg_pe_regs *kgpe_regs;
  37666. + uint32_t tmp;
  37667. +
  37668. + kgpe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
  37669. + tmp = ioread32be(&kgpe_regs->fmkg_pe_sp);
  37670. +
  37671. + if (add)
  37672. + tmp |= sp;
  37673. + else /* clear */
  37674. + tmp &= ~sp;
  37675. +
  37676. + iowrite32be(tmp, &kgpe_regs->fmkg_pe_sp);
  37677. +
  37678. +}
  37679. +
  37680. +void fman_kg_write_cpp(struct fman_kg_regs *regs, uint32_t cpp)
  37681. +{
  37682. + struct fman_kg_pe_regs *kgpe_regs;
  37683. +
  37684. + kgpe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
  37685. +
  37686. + iowrite32be(cpp, &kgpe_regs->fmkg_pe_cpp);
  37687. +}
  37688. +
  37689. +void fman_kg_get_event(struct fman_kg_regs *regs,
  37690. + uint32_t *event,
  37691. + uint32_t *scheme_idx)
  37692. +{
  37693. + uint32_t mask, force;
  37694. +
  37695. + *event = ioread32be(&regs->fmkg_eer);
  37696. + mask = ioread32be(&regs->fmkg_eeer);
  37697. + *scheme_idx = ioread32be(&regs->fmkg_seer);
  37698. + *scheme_idx &= ioread32be(&regs->fmkg_seeer);
  37699. +
  37700. + *event &= mask;
  37701. +
  37702. + /* clear the forced events */
  37703. + force = ioread32be(&regs->fmkg_feer);
  37704. + if (force & *event)
  37705. + iowrite32be(force & ~*event ,&regs->fmkg_feer);
  37706. +
  37707. + iowrite32be(*event, &regs->fmkg_eer);
  37708. + iowrite32be(*scheme_idx, &regs->fmkg_seer);
  37709. +}
  37710. +
  37711. +
  37712. +void fman_kg_init(struct fman_kg_regs *regs,
  37713. + uint32_t exceptions,
  37714. + uint32_t dflt_nia)
  37715. +{
  37716. + uint32_t tmp;
  37717. + int i;
  37718. +
  37719. + iowrite32be(FM_EX_KG_DOUBLE_ECC | FM_EX_KG_KEYSIZE_OVERFLOW,
  37720. + &regs->fmkg_eer);
  37721. +
  37722. + tmp = 0;
  37723. + if (exceptions & FM_EX_KG_DOUBLE_ECC)
  37724. + tmp |= FM_EX_KG_DOUBLE_ECC;
  37725. +
  37726. + if (exceptions & FM_EX_KG_KEYSIZE_OVERFLOW)
  37727. + tmp |= FM_EX_KG_KEYSIZE_OVERFLOW;
  37728. +
  37729. + iowrite32be(tmp, &regs->fmkg_eeer);
  37730. + iowrite32be(0, &regs->fmkg_fdor);
  37731. + iowrite32be(0, &regs->fmkg_gdv0r);
  37732. + iowrite32be(0, &regs->fmkg_gdv1r);
  37733. + iowrite32be(dflt_nia, &regs->fmkg_gcr);
  37734. +
  37735. + /* Clear binding between ports to schemes and classification plans
  37736. + * so that all ports are not bound to any scheme/classification plan */
  37737. + for (i = 0; i < FMAN_MAX_NUM_OF_HW_PORTS; i++) {
  37738. + clear_pe_all_scheme(regs, (uint8_t)i);
  37739. + clear_pe_all_cls_plan(regs, (uint8_t)i);
  37740. + }
  37741. +}
  37742. +
  37743. +void fman_kg_enable_scheme_interrupts(struct fman_kg_regs *regs)
  37744. +{
  37745. + /* enable and enable all scheme interrupts */
  37746. + iowrite32be(0xFFFFFFFF, &regs->fmkg_seer);
  37747. + iowrite32be(0xFFFFFFFF, &regs->fmkg_seeer);
  37748. +}
  37749. +
  37750. +void fman_kg_enable(struct fman_kg_regs *regs)
  37751. +{
  37752. + iowrite32be(ioread32be(&regs->fmkg_gcr) | FM_KG_KGGCR_EN,
  37753. + &regs->fmkg_gcr);
  37754. +}
  37755. +
  37756. +void fman_kg_disable(struct fman_kg_regs *regs)
  37757. +{
  37758. + iowrite32be(ioread32be(&regs->fmkg_gcr) & ~FM_KG_KGGCR_EN,
  37759. + &regs->fmkg_gcr);
  37760. +}
  37761. +
  37762. +void fman_kg_set_data_after_prs(struct fman_kg_regs *regs, uint8_t offset)
  37763. +{
  37764. + iowrite32be(offset, &regs->fmkg_fdor);
  37765. +}
  37766. +
  37767. +void fman_kg_set_dflt_val(struct fman_kg_regs *regs,
  37768. + uint8_t def_id,
  37769. + uint32_t val)
  37770. +{
  37771. + if(def_id == 0)
  37772. + iowrite32be(val, &regs->fmkg_gdv0r);
  37773. + else
  37774. + iowrite32be(val, &regs->fmkg_gdv1r);
  37775. +}
  37776. +
  37777. +
  37778. +void fman_kg_set_exception(struct fman_kg_regs *regs,
  37779. + uint32_t exception,
  37780. + bool enable)
  37781. +{
  37782. + uint32_t tmp;
  37783. +
  37784. + tmp = ioread32be(&regs->fmkg_eeer);
  37785. +
  37786. + if (enable) {
  37787. + tmp |= exception;
  37788. + } else {
  37789. + tmp &= ~exception;
  37790. + }
  37791. +
  37792. + iowrite32be(tmp, &regs->fmkg_eeer);
  37793. +}
  37794. +
  37795. +void fman_kg_get_exception(struct fman_kg_regs *regs,
  37796. + uint32_t *events,
  37797. + uint32_t *scheme_ids,
  37798. + bool clear)
  37799. +{
  37800. + uint32_t mask;
  37801. +
  37802. + *events = ioread32be(&regs->fmkg_eer);
  37803. + mask = ioread32be(&regs->fmkg_eeer);
  37804. + *events &= mask;
  37805. +
  37806. + *scheme_ids = 0;
  37807. +
  37808. + if (*events & FM_EX_KG_KEYSIZE_OVERFLOW) {
  37809. + *scheme_ids = ioread32be(&regs->fmkg_seer);
  37810. + mask = ioread32be(&regs->fmkg_seeer);
  37811. + *scheme_ids &= mask;
  37812. + }
  37813. +
  37814. + if (clear) {
  37815. + iowrite32be(*scheme_ids, &regs->fmkg_seer);
  37816. + iowrite32be(*events, &regs->fmkg_eer);
  37817. + }
  37818. +}
  37819. +
  37820. +void fman_kg_get_capture(struct fman_kg_regs *regs,
  37821. + struct fman_kg_ex_ecc_attr *ecc_attr,
  37822. + bool clear)
  37823. +{
  37824. + uint32_t tmp;
  37825. +
  37826. + tmp = ioread32be(&regs->fmkg_serc);
  37827. +
  37828. + if (tmp & KG_FMKG_SERC_CAP) {
  37829. + /* Captured data is valid */
  37830. + ecc_attr->valid = TRUE;
  37831. + ecc_attr->double_ecc =
  37832. + (bool)((tmp & KG_FMKG_SERC_CET) ? TRUE : FALSE);
  37833. + ecc_attr->single_ecc_count =
  37834. + (uint8_t)((tmp & KG_FMKG_SERC_CNT_MSK) >>
  37835. + KG_FMKG_SERC_CNT_SHIFT);
  37836. + ecc_attr->addr = (uint16_t)(tmp & KG_FMKG_SERC_ADDR_MSK);
  37837. +
  37838. + if (clear)
  37839. + iowrite32be(KG_FMKG_SERC_CAP, &regs->fmkg_serc);
  37840. + } else {
  37841. + /* No ECC error is captured */
  37842. + ecc_attr->valid = FALSE;
  37843. + }
  37844. +}
  37845. +
  37846. +int fman_kg_build_scheme(struct fman_kg_scheme_params *params,
  37847. + struct fman_kg_scheme_regs *scheme_regs)
  37848. +{
  37849. + struct fman_kg_extract_params *extract_params;
  37850. + struct fman_kg_gen_extract_params *gen_params;
  37851. + uint32_t tmp_reg, i, select, mask, fqb;
  37852. + uint8_t offset, shift, ht;
  37853. +
  37854. + /* Zero out all registers so no need to care about unused ones */
  37855. + memset(scheme_regs, 0, sizeof(struct fman_kg_scheme_regs));
  37856. +
  37857. + /* Mode register */
  37858. + tmp_reg = fm_kg_build_nia(params->next_engine,
  37859. + params->next_engine_action);
  37860. + if (tmp_reg == KG_NIA_INVALID) {
  37861. + return -EINVAL;
  37862. + }
  37863. +
  37864. + if (params->next_engine == E_FMAN_PCD_PLCR) {
  37865. + tmp_reg |= FMAN_KG_SCH_MODE_NIA_PLCR;
  37866. + }
  37867. + else if (params->next_engine == E_FMAN_PCD_CC) {
  37868. + tmp_reg |= (uint32_t)params->cc_params.base_offset <<
  37869. + FMAN_KG_SCH_MODE_CCOBASE_SHIFT;
  37870. + }
  37871. +
  37872. + tmp_reg |= FMAN_KG_SCH_MODE_EN;
  37873. + scheme_regs->kgse_mode = tmp_reg;
  37874. +
  37875. + /* Match vector */
  37876. + scheme_regs->kgse_mv = params->match_vector;
  37877. +
  37878. + extract_params = &params->extract_params;
  37879. +
  37880. + /* Scheme default values registers */
  37881. + scheme_regs->kgse_dv0 = extract_params->def_scheme_0;
  37882. + scheme_regs->kgse_dv1 = extract_params->def_scheme_1;
  37883. +
  37884. + /* Extract Known Fields Command register */
  37885. + scheme_regs->kgse_ekfc = extract_params->known_fields;
  37886. +
  37887. + /* Entry Extract Known Default Value register */
  37888. + tmp_reg = 0;
  37889. + tmp_reg |= extract_params->known_fields_def.mac_addr <<
  37890. + FMAN_KG_SCH_DEF_MAC_ADDR_SHIFT;
  37891. + tmp_reg |= extract_params->known_fields_def.vlan_tci <<
  37892. + FMAN_KG_SCH_DEF_VLAN_TCI_SHIFT;
  37893. + tmp_reg |= extract_params->known_fields_def.etype <<
  37894. + FMAN_KG_SCH_DEF_ETYPE_SHIFT;
  37895. + tmp_reg |= extract_params->known_fields_def.ppp_sid <<
  37896. + FMAN_KG_SCH_DEF_PPP_SID_SHIFT;
  37897. + tmp_reg |= extract_params->known_fields_def.ppp_pid <<
  37898. + FMAN_KG_SCH_DEF_PPP_PID_SHIFT;
  37899. + tmp_reg |= extract_params->known_fields_def.mpls <<
  37900. + FMAN_KG_SCH_DEF_MPLS_SHIFT;
  37901. + tmp_reg |= extract_params->known_fields_def.ip_addr <<
  37902. + FMAN_KG_SCH_DEF_IP_ADDR_SHIFT;
  37903. + tmp_reg |= extract_params->known_fields_def.ptype <<
  37904. + FMAN_KG_SCH_DEF_PTYPE_SHIFT;
  37905. + tmp_reg |= extract_params->known_fields_def.ip_tos_tc <<
  37906. + FMAN_KG_SCH_DEF_IP_TOS_TC_SHIFT;
  37907. + tmp_reg |= extract_params->known_fields_def.ipv6_fl <<
  37908. + FMAN_KG_SCH_DEF_IPv6_FL_SHIFT;
  37909. + tmp_reg |= extract_params->known_fields_def.ipsec_spi <<
  37910. + FMAN_KG_SCH_DEF_IPSEC_SPI_SHIFT;
  37911. + tmp_reg |= extract_params->known_fields_def.l4_port <<
  37912. + FMAN_KG_SCH_DEF_L4_PORT_SHIFT;
  37913. + tmp_reg |= extract_params->known_fields_def.tcp_flg <<
  37914. + FMAN_KG_SCH_DEF_TCP_FLG_SHIFT;
  37915. +
  37916. + scheme_regs->kgse_ekdv = tmp_reg;
  37917. +
  37918. + /* Generic extract registers */
  37919. + if (extract_params->gen_extract_num > FM_KG_NUM_OF_GENERIC_REGS) {
  37920. + return -EINVAL;
  37921. + }
  37922. +
  37923. + for (i = 0; i < extract_params->gen_extract_num; i++) {
  37924. + gen_params = extract_params->gen_extract + i;
  37925. +
  37926. + tmp_reg = FMAN_KG_SCH_GEN_VALID;
  37927. + tmp_reg |= (uint32_t)gen_params->def_val <<
  37928. + FMAN_KG_SCH_GEN_DEF_SHIFT;
  37929. +
  37930. + if (gen_params->type == E_FMAN_KG_HASH_EXTRACT) {
  37931. + if ((gen_params->extract > FMAN_KG_SCH_GEN_SIZE_MAX) ||
  37932. + (gen_params->extract == 0)) {
  37933. + return -EINVAL;
  37934. + }
  37935. + } else {
  37936. + tmp_reg |= FMAN_KG_SCH_GEN_OR;
  37937. + }
  37938. +
  37939. + tmp_reg |= (uint32_t)gen_params->extract <<
  37940. + FMAN_KG_SCH_GEN_SIZE_SHIFT;
  37941. + tmp_reg |= (uint32_t)gen_params->mask <<
  37942. + FMAN_KG_SCH_GEN_MASK_SHIFT;
  37943. +
  37944. + offset = gen_params->offset;
  37945. + ht = get_gen_ht_code(gen_params->src,
  37946. + gen_params->no_validation,
  37947. + &offset);
  37948. + tmp_reg |= (uint32_t)ht << FMAN_KG_SCH_GEN_HT_SHIFT;
  37949. + tmp_reg |= offset;
  37950. +
  37951. + scheme_regs->kgse_gec[i] = tmp_reg;
  37952. + }
  37953. +
  37954. + /* Masks registers */
  37955. + if (extract_params->masks_num > FM_KG_EXTRACT_MASKS_NUM) {
  37956. + return -EINVAL;
  37957. + }
  37958. +
  37959. + select = 0;
  37960. + mask = 0;
  37961. + fqb = 0;
  37962. + for (i = 0; i < extract_params->masks_num; i++) {
  37963. + /* MCSx fields */
  37964. + KG_GET_MASK_SEL_SHIFT(shift, i);
  37965. + if (extract_params->masks[i].is_known) {
  37966. + /* Mask known field */
  37967. + select |= extract_params->masks[i].field_or_gen_idx <<
  37968. + shift;
  37969. + } else {
  37970. + /* Mask generic extract */
  37971. + select |= (extract_params->masks[i].field_or_gen_idx +
  37972. + FM_KG_MASK_SEL_GEN_BASE) << shift;
  37973. + }
  37974. +
  37975. + /* MOx fields - spread between se_bmch and se_fqb registers */
  37976. + KG_GET_MASK_OFFSET_SHIFT(shift, i);
  37977. + if (i < 2) {
  37978. + select |= (uint32_t)extract_params->masks[i].offset <<
  37979. + shift;
  37980. + } else {
  37981. + fqb |= (uint32_t)extract_params->masks[i].offset <<
  37982. + shift;
  37983. + }
  37984. +
  37985. + /* BMx fields */
  37986. + KG_GET_MASK_SHIFT(shift, i);
  37987. + mask |= (uint32_t)extract_params->masks[i].mask << shift;
  37988. + }
  37989. +
  37990. + /* Finish with rest of BMx fileds -
  37991. + * don't mask bits for unused masks by setting
  37992. + * corresponding BMx field = 0xFF */
  37993. + for (i = extract_params->masks_num; i < FM_KG_EXTRACT_MASKS_NUM; i++) {
  37994. + KG_GET_MASK_SHIFT(shift, i);
  37995. + mask |= 0xFF << shift;
  37996. + }
  37997. +
  37998. + scheme_regs->kgse_bmch = select;
  37999. + scheme_regs->kgse_bmcl = mask;
  38000. +
  38001. + /* Finish with FQB register initialization.
  38002. + * Check fqid is 24-bit value. */
  38003. + if (params->base_fqid & ~0x00FFFFFF) {
  38004. + return -EINVAL;
  38005. + }
  38006. +
  38007. + fqb |= params->base_fqid;
  38008. + scheme_regs->kgse_fqb = fqb;
  38009. +
  38010. + /* Hash Configuration register */
  38011. + tmp_reg = 0;
  38012. + if (params->hash_params.use_hash) {
  38013. + /* Check hash mask is 24-bit value */
  38014. + if (params->hash_params.mask & ~0x00FFFFFF) {
  38015. + return -EINVAL;
  38016. + }
  38017. +
  38018. + /* Hash function produces 64-bit value, 24 bits of that
  38019. + * are used to generate fq_id and policer profile.
  38020. + * Thus, maximal shift is 40 bits to allow 24 bits out of 64.
  38021. + */
  38022. + if (params->hash_params.shift_r > FMAN_KG_SCH_HASH_HSHIFT_MAX) {
  38023. + return -EINVAL;
  38024. + }
  38025. +
  38026. + tmp_reg |= params->hash_params.mask;
  38027. + tmp_reg |= (uint32_t)params->hash_params.shift_r <<
  38028. + FMAN_KG_SCH_HASH_HSHIFT_SHIFT;
  38029. +
  38030. + if (params->hash_params.sym) {
  38031. + tmp_reg |= FMAN_KG_SCH_HASH_SYM;
  38032. + }
  38033. +
  38034. + }
  38035. +
  38036. + if (params->bypass_fqid_gen) {
  38037. + tmp_reg |= FMAN_KG_SCH_HASH_NO_FQID_GEN;
  38038. + }
  38039. +
  38040. + scheme_regs->kgse_hc = tmp_reg;
  38041. +
  38042. + /* Policer Profile register */
  38043. + if (params->policer_params.bypass_pp_gen) {
  38044. + tmp_reg = 0;
  38045. + } else {
  38046. + /* Lower 8 bits of 24-bits extracted from hash result
  38047. + * are used for policer profile generation.
  38048. + * That leaves maximum shift value = 23. */
  38049. + if (params->policer_params.shift > FMAN_KG_SCH_PP_SHIFT_MAX) {
  38050. + return -EINVAL;
  38051. + }
  38052. +
  38053. + tmp_reg = params->policer_params.base;
  38054. + tmp_reg |= ((uint32_t)params->policer_params.shift <<
  38055. + FMAN_KG_SCH_PP_SH_SHIFT) &
  38056. + FMAN_KG_SCH_PP_SH_MASK;
  38057. + tmp_reg |= ((uint32_t)params->policer_params.shift <<
  38058. + FMAN_KG_SCH_PP_SL_SHIFT) &
  38059. + FMAN_KG_SCH_PP_SL_MASK;
  38060. + tmp_reg |= (uint32_t)params->policer_params.mask <<
  38061. + FMAN_KG_SCH_PP_MASK_SHIFT;
  38062. + }
  38063. +
  38064. + scheme_regs->kgse_ppc = tmp_reg;
  38065. +
  38066. + /* Coarse Classification Bit Select register */
  38067. + if (params->next_engine == E_FMAN_PCD_CC) {
  38068. + scheme_regs->kgse_ccbs = params->cc_params.qlcv_bits_sel;
  38069. + }
  38070. +
  38071. + /* Packets Counter register */
  38072. + if (params->update_counter) {
  38073. + scheme_regs->kgse_spc = params->counter_value;
  38074. + }
  38075. +
  38076. + return 0;
  38077. +}
  38078. +
  38079. +int fman_kg_write_scheme(struct fman_kg_regs *regs,
  38080. + uint8_t scheme_id,
  38081. + uint8_t hwport_id,
  38082. + struct fman_kg_scheme_regs *scheme_regs,
  38083. + bool update_counter)
  38084. +{
  38085. + struct fman_kg_scheme_regs *kgse_regs;
  38086. + uint32_t tmp_reg;
  38087. + int err, i;
  38088. +
  38089. + /* Write indirect scheme registers */
  38090. + kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
  38091. +
  38092. + iowrite32be(scheme_regs->kgse_mode, &kgse_regs->kgse_mode);
  38093. + iowrite32be(scheme_regs->kgse_ekfc, &kgse_regs->kgse_ekfc);
  38094. + iowrite32be(scheme_regs->kgse_ekdv, &kgse_regs->kgse_ekdv);
  38095. + iowrite32be(scheme_regs->kgse_bmch, &kgse_regs->kgse_bmch);
  38096. + iowrite32be(scheme_regs->kgse_bmcl, &kgse_regs->kgse_bmcl);
  38097. + iowrite32be(scheme_regs->kgse_fqb, &kgse_regs->kgse_fqb);
  38098. + iowrite32be(scheme_regs->kgse_hc, &kgse_regs->kgse_hc);
  38099. + iowrite32be(scheme_regs->kgse_ppc, &kgse_regs->kgse_ppc);
  38100. + iowrite32be(scheme_regs->kgse_spc, &kgse_regs->kgse_spc);
  38101. + iowrite32be(scheme_regs->kgse_dv0, &kgse_regs->kgse_dv0);
  38102. + iowrite32be(scheme_regs->kgse_dv1, &kgse_regs->kgse_dv1);
  38103. + iowrite32be(scheme_regs->kgse_ccbs, &kgse_regs->kgse_ccbs);
  38104. + iowrite32be(scheme_regs->kgse_mv, &kgse_regs->kgse_mv);
  38105. +
  38106. + for (i = 0 ; i < FM_KG_NUM_OF_GENERIC_REGS ; i++)
  38107. + iowrite32be(scheme_regs->kgse_gec[i], &kgse_regs->kgse_gec[i]);
  38108. +
  38109. + /* Write AR (Action register) */
  38110. + tmp_reg = build_ar_scheme(scheme_id, hwport_id, update_counter, TRUE);
  38111. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38112. + return err;
  38113. +}
  38114. +
  38115. +int fman_kg_delete_scheme(struct fman_kg_regs *regs,
  38116. + uint8_t scheme_id,
  38117. + uint8_t hwport_id)
  38118. +{
  38119. + struct fman_kg_scheme_regs *kgse_regs;
  38120. + uint32_t tmp_reg;
  38121. + int err, i;
  38122. +
  38123. + kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
  38124. +
  38125. + /* Clear all registers including enable bit in mode register */
  38126. + for (i = 0; i < (sizeof(struct fman_kg_scheme_regs)) / 4; ++i) {
  38127. + iowrite32be(0, ((uint32_t *)kgse_regs + i));
  38128. + }
  38129. +
  38130. + /* Write AR (Action register) */
  38131. + tmp_reg = build_ar_scheme(scheme_id, hwport_id, FALSE, TRUE);
  38132. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38133. + return err;
  38134. +}
  38135. +
  38136. +int fman_kg_get_scheme_counter(struct fman_kg_regs *regs,
  38137. + uint8_t scheme_id,
  38138. + uint8_t hwport_id,
  38139. + uint32_t *counter)
  38140. +{
  38141. + struct fman_kg_scheme_regs *kgse_regs;
  38142. + uint32_t tmp_reg;
  38143. + int err;
  38144. +
  38145. + kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
  38146. +
  38147. + tmp_reg = build_ar_scheme(scheme_id, hwport_id, TRUE, FALSE);
  38148. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38149. +
  38150. + if (err != 0)
  38151. + return err;
  38152. +
  38153. + *counter = ioread32be(&kgse_regs->kgse_spc);
  38154. +
  38155. + return 0;
  38156. +}
  38157. +
  38158. +int fman_kg_set_scheme_counter(struct fman_kg_regs *regs,
  38159. + uint8_t scheme_id,
  38160. + uint8_t hwport_id,
  38161. + uint32_t counter)
  38162. +{
  38163. + struct fman_kg_scheme_regs *kgse_regs;
  38164. + uint32_t tmp_reg;
  38165. + int err;
  38166. +
  38167. + kgse_regs = (struct fman_kg_scheme_regs *)&(regs->fmkg_indirect[0]);
  38168. +
  38169. + tmp_reg = build_ar_scheme(scheme_id, hwport_id, TRUE, FALSE);
  38170. +
  38171. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38172. + if (err != 0)
  38173. + return err;
  38174. +
  38175. + /* Keygen indirect access memory contains all scheme_id registers
  38176. + * by now. Change only counter value. */
  38177. + iowrite32be(counter, &kgse_regs->kgse_spc);
  38178. +
  38179. + /* Write back scheme registers */
  38180. + tmp_reg = build_ar_scheme(scheme_id, hwport_id, TRUE, TRUE);
  38181. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38182. +
  38183. + return err;
  38184. +}
  38185. +
  38186. +uint32_t fman_kg_get_schemes_total_counter(struct fman_kg_regs *regs)
  38187. +{
  38188. + return ioread32be(&regs->fmkg_tpc);
  38189. +}
  38190. +
  38191. +int fman_kg_build_cls_plan(struct fman_kg_cls_plan_params *params,
  38192. + struct fman_kg_cp_regs *cls_plan_regs)
  38193. +{
  38194. + uint8_t entries_set, entry_bit;
  38195. + int i;
  38196. +
  38197. + /* Zero out all group's register */
  38198. + memset(cls_plan_regs, 0, sizeof(struct fman_kg_cp_regs));
  38199. +
  38200. + /* Go over all classification entries in params->entries_mask and
  38201. + * configure the corresponding cpe register */
  38202. + entries_set = params->entries_mask;
  38203. + for (i = 0; entries_set; i++) {
  38204. + entry_bit = (uint8_t)(0x80 >> i);
  38205. + if ((entry_bit & entries_set) == 0)
  38206. + continue;
  38207. + entries_set ^= entry_bit;
  38208. + cls_plan_regs->kgcpe[i] = params->mask_vector[i];
  38209. + }
  38210. +
  38211. + return 0;
  38212. +}
  38213. +
  38214. +int fman_kg_write_cls_plan(struct fman_kg_regs *regs,
  38215. + uint8_t grp_id,
  38216. + uint8_t entries_mask,
  38217. + uint8_t hwport_id,
  38218. + struct fman_kg_cp_regs *cls_plan_regs)
  38219. +{
  38220. + struct fman_kg_cp_regs *kgcpe_regs;
  38221. + uint32_t tmp_reg;
  38222. + int i, err;
  38223. +
  38224. + /* Check group index is valid and the group isn't empty */
  38225. + if (grp_id >= FM_KG_CLS_PLAN_GRPS_NUM)
  38226. + return -EINVAL;
  38227. +
  38228. + /* Write indirect classification plan registers */
  38229. + kgcpe_regs = (struct fman_kg_cp_regs *)&(regs->fmkg_indirect[0]);
  38230. +
  38231. + for (i = 0; i < FM_KG_NUM_CLS_PLAN_ENTR; i++) {
  38232. + iowrite32be(cls_plan_regs->kgcpe[i], &kgcpe_regs->kgcpe[i]);
  38233. + }
  38234. +
  38235. + tmp_reg = build_ar_cls_plan(grp_id, entries_mask, hwport_id, TRUE);
  38236. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38237. + return err;
  38238. +}
  38239. +
  38240. +int fman_kg_write_bind_schemes(struct fman_kg_regs *regs,
  38241. + uint8_t hwport_id,
  38242. + uint32_t schemes)
  38243. +{
  38244. + struct fman_kg_pe_regs *kg_pe_regs;
  38245. + uint32_t tmp_reg;
  38246. + int err;
  38247. +
  38248. + kg_pe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
  38249. +
  38250. + iowrite32be(schemes, &kg_pe_regs->fmkg_pe_sp);
  38251. +
  38252. + tmp_reg = build_ar_bind_scheme(hwport_id, TRUE);
  38253. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38254. + return err;
  38255. +}
  38256. +
  38257. +int fman_kg_build_bind_cls_plans(uint8_t grp_base,
  38258. + uint8_t grp_mask,
  38259. + uint32_t *bind_cls_plans)
  38260. +{
  38261. + /* Check grp_base and grp_mask are 5-bits values */
  38262. + if ((grp_base & ~0x0000001F) || (grp_mask & ~0x0000001F))
  38263. + return -EINVAL;
  38264. +
  38265. + *bind_cls_plans = (uint32_t) ((grp_mask << FMAN_KG_PE_CPP_MASK_SHIFT) | grp_base);
  38266. + return 0;
  38267. +}
  38268. +
  38269. +
  38270. +int fman_kg_write_bind_cls_plans(struct fman_kg_regs *regs,
  38271. + uint8_t hwport_id,
  38272. + uint32_t bind_cls_plans)
  38273. +{
  38274. + struct fman_kg_pe_regs *kg_pe_regs;
  38275. + uint32_t tmp_reg;
  38276. + int err;
  38277. +
  38278. + kg_pe_regs = (struct fman_kg_pe_regs *)&(regs->fmkg_indirect[0]);
  38279. +
  38280. + iowrite32be(bind_cls_plans, &kg_pe_regs->fmkg_pe_cpp);
  38281. +
  38282. + tmp_reg = build_ar_bind_cls_plan(hwport_id, TRUE);
  38283. + err = fman_kg_write_ar_wait(regs, tmp_reg);
  38284. + return err;
  38285. +}
  38286. --- /dev/null
  38287. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fman_prs.c
  38288. @@ -0,0 +1,129 @@
  38289. +/*
  38290. + * Copyright 2012 Freescale Semiconductor Inc.
  38291. + *
  38292. + * Redistribution and use in source and binary forms, with or without
  38293. + * modification, are permitted provided that the following conditions are met:
  38294. + * * Redistributions of source code must retain the above copyright
  38295. + * notice, this list of conditions and the following disclaimer.
  38296. + * * Redistributions in binary form must reproduce the above copyright
  38297. + * notice, this list of conditions and the following disclaimer in the
  38298. + * documentation and/or other materials provided with the distribution.
  38299. + * * Neither the name of Freescale Semiconductor nor the
  38300. + * names of its contributors may be used to endorse or promote products
  38301. + * derived from this software without specific prior written permission.
  38302. + *
  38303. + *
  38304. + * ALTERNATIVELY, this software may be distributed under the terms of the
  38305. + * GNU General Public License ("GPL") as published by the Free Software
  38306. + * Foundation, either version 2 of that License or (at your option) any
  38307. + * later version.
  38308. + *
  38309. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  38310. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  38311. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  38312. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  38313. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  38314. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  38315. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  38316. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38317. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  38318. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38319. + */
  38320. +
  38321. +#include "fsl_fman_prs.h"
  38322. +
  38323. +uint32_t fman_prs_get_err_event(struct fman_prs_regs *regs, uint32_t ev_mask)
  38324. +{
  38325. + return ioread32be(&regs->fmpr_perr) & ev_mask;
  38326. +}
  38327. +
  38328. +uint32_t fman_prs_get_err_ev_mask(struct fman_prs_regs *regs)
  38329. +{
  38330. + return ioread32be(&regs->fmpr_perer);
  38331. +}
  38332. +
  38333. +void fman_prs_ack_err_event(struct fman_prs_regs *regs, uint32_t event)
  38334. +{
  38335. + iowrite32be(event, &regs->fmpr_perr);
  38336. +}
  38337. +
  38338. +uint32_t fman_prs_get_expt_event(struct fman_prs_regs *regs, uint32_t ev_mask)
  38339. +{
  38340. + return ioread32be(&regs->fmpr_pevr) & ev_mask;
  38341. +}
  38342. +
  38343. +uint32_t fman_prs_get_expt_ev_mask(struct fman_prs_regs *regs)
  38344. +{
  38345. + return ioread32be(&regs->fmpr_pever);
  38346. +}
  38347. +
  38348. +void fman_prs_ack_expt_event(struct fman_prs_regs *regs, uint32_t event)
  38349. +{
  38350. + iowrite32be(event, &regs->fmpr_pevr);
  38351. +}
  38352. +
  38353. +void fman_prs_defconfig(struct fman_prs_cfg *cfg)
  38354. +{
  38355. + cfg->port_id_stat = 0;
  38356. + cfg->max_prs_cyc_lim = DEFAULT_MAX_PRS_CYC_LIM;
  38357. + cfg->prs_exceptions = 0x03000000;
  38358. +}
  38359. +
  38360. +int fman_prs_init(struct fman_prs_regs *regs, struct fman_prs_cfg *cfg)
  38361. +{
  38362. + uint32_t tmp;
  38363. +
  38364. + iowrite32be(cfg->max_prs_cyc_lim, &regs->fmpr_rpclim);
  38365. + iowrite32be((FM_PCD_PRS_SINGLE_ECC | FM_PCD_PRS_PORT_IDLE_STS),
  38366. + &regs->fmpr_pevr);
  38367. +
  38368. + if (cfg->prs_exceptions & FM_PCD_EX_PRS_SINGLE_ECC)
  38369. + iowrite32be(FM_PCD_PRS_SINGLE_ECC, &regs->fmpr_pever);
  38370. + else
  38371. + iowrite32be(0, &regs->fmpr_pever);
  38372. +
  38373. + iowrite32be(FM_PCD_PRS_DOUBLE_ECC, &regs->fmpr_perr);
  38374. +
  38375. + tmp = 0;
  38376. + if (cfg->prs_exceptions & FM_PCD_EX_PRS_DOUBLE_ECC)
  38377. + tmp |= FM_PCD_PRS_DOUBLE_ECC;
  38378. + iowrite32be(tmp, &regs->fmpr_perer);
  38379. +
  38380. + iowrite32be(cfg->port_id_stat, &regs->fmpr_ppsc);
  38381. +
  38382. + return 0;
  38383. +}
  38384. +
  38385. +void fman_prs_enable(struct fman_prs_regs *regs)
  38386. +{
  38387. + uint32_t tmp;
  38388. +
  38389. + tmp = ioread32be(&regs->fmpr_rpimac) | FM_PCD_PRS_RPIMAC_EN;
  38390. + iowrite32be(tmp, &regs->fmpr_rpimac);
  38391. +}
  38392. +
  38393. +void fman_prs_disable(struct fman_prs_regs *regs)
  38394. +{
  38395. + uint32_t tmp;
  38396. +
  38397. + tmp = ioread32be(&regs->fmpr_rpimac) & ~FM_PCD_PRS_RPIMAC_EN;
  38398. + iowrite32be(tmp, &regs->fmpr_rpimac);
  38399. +}
  38400. +
  38401. +int fman_prs_is_enabled(struct fman_prs_regs *regs)
  38402. +{
  38403. + return ioread32be(&regs->fmpr_rpimac) & FM_PCD_PRS_RPIMAC_EN;
  38404. +}
  38405. +
  38406. +void fman_prs_set_stst_port_msk(struct fman_prs_regs *regs, uint32_t pid_msk)
  38407. +{
  38408. + iowrite32be(pid_msk, &regs->fmpr_ppsc);
  38409. +}
  38410. +
  38411. +void fman_prs_set_stst(struct fman_prs_regs *regs, bool enable)
  38412. +{
  38413. + if (enable)
  38414. + iowrite32be(FM_PCD_PRS_PPSC_ALL_PORTS, &regs->fmpr_ppsc);
  38415. + else
  38416. + iowrite32be(0, &regs->fmpr_ppsc);
  38417. +}
  38418. --- /dev/null
  38419. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/Makefile
  38420. @@ -0,0 +1,15 @@
  38421. +#
  38422. +# Makefile for the Freescale Ethernet controllers
  38423. +#
  38424. +ccflags-y += -DVERSION=\"\"
  38425. +#
  38426. +#Include netcomm SW specific definitions
  38427. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  38428. +
  38429. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  38430. +
  38431. +ccflags-y += -I$(NCSW_FM_INC)
  38432. +
  38433. +obj-y += fsl-ncsw-Pcd.o
  38434. +
  38435. +fsl-ncsw-Pcd-objs := fm_port.o fm_port_im.o fman_port.o
  38436. --- /dev/null
  38437. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c
  38438. @@ -0,0 +1,6436 @@
  38439. +/*
  38440. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  38441. + *
  38442. + * Redistribution and use in source and binary forms, with or without
  38443. + * modification, are permitted provided that the following conditions are met:
  38444. + * * Redistributions of source code must retain the above copyright
  38445. + * notice, this list of conditions and the following disclaimer.
  38446. + * * Redistributions in binary form must reproduce the above copyright
  38447. + * notice, this list of conditions and the following disclaimer in the
  38448. + * documentation and/or other materials provided with the distribution.
  38449. + * * Neither the name of Freescale Semiconductor nor the
  38450. + * names of its contributors may be used to endorse or promote products
  38451. + * derived from this software without specific prior written permission.
  38452. + *
  38453. + *
  38454. + * ALTERNATIVELY, this software may be distributed under the terms of the
  38455. + * GNU General Public License ("GPL") as published by the Free Software
  38456. + * Foundation, either version 2 of that License or (at your option) any
  38457. + * later version.
  38458. + *
  38459. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  38460. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  38461. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  38462. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  38463. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  38464. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  38465. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  38466. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38467. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  38468. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38469. + */
  38470. +
  38471. +
  38472. +/******************************************************************************
  38473. + @File fm_port.c
  38474. +
  38475. + @Description FM driver routines implementation.
  38476. + *//***************************************************************************/
  38477. +#include "error_ext.h"
  38478. +#include "std_ext.h"
  38479. +#include "string_ext.h"
  38480. +#include "sprint_ext.h"
  38481. +#include "debug_ext.h"
  38482. +#include "fm_muram_ext.h"
  38483. +
  38484. +#include "fman_common.h"
  38485. +#include "fm_port.h"
  38486. +#include "fm_port_dsar.h"
  38487. +#include "common/general.h"
  38488. +
  38489. +/****************************************/
  38490. +/* static functions */
  38491. +/****************************************/
  38492. +static t_Error FmPortConfigAutoResForDeepSleepSupport1(t_FmPort *p_FmPort);
  38493. +
  38494. +static t_Error CheckInitParameters(t_FmPort *p_FmPort)
  38495. +{
  38496. + t_FmPortDriverParam *p_Params = p_FmPort->p_FmPortDriverParam;
  38497. + struct fman_port_cfg *p_DfltConfig = &p_Params->dfltCfg;
  38498. + t_Error ans = E_OK;
  38499. + uint32_t unusedMask;
  38500. +
  38501. + if (p_FmPort->imEn)
  38502. + {
  38503. + if (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  38504. + if (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
  38505. + > 2)
  38506. + RETURN_ERROR(
  38507. + MAJOR,
  38508. + E_INVALID_VALUE,
  38509. + ("fifoDeqPipelineDepth for IM 10G can't be larger than 2"));
  38510. +
  38511. + if ((ans = FmPortImCheckInitParameters(p_FmPort)) != E_OK)
  38512. + return ERROR_CODE(ans);
  38513. + }
  38514. + else
  38515. + {
  38516. + /****************************************/
  38517. + /* Rx only */
  38518. + /****************************************/
  38519. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  38520. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  38521. + {
  38522. + /* external buffer pools */
  38523. + if (!p_Params->extBufPools.numOfPoolsUsed)
  38524. + RETURN_ERROR(
  38525. + MAJOR,
  38526. + E_INVALID_VALUE,
  38527. + ("extBufPools.numOfPoolsUsed=0. At least one buffer pool must be defined"));
  38528. +
  38529. + if (FmSpCheckBufPoolsParams(&p_Params->extBufPools,
  38530. + p_Params->p_BackupBmPools,
  38531. + &p_Params->bufPoolDepletion) != E_OK)
  38532. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  38533. +
  38534. + /* Check that part of IC that needs copying is small enough to enter start margin */
  38535. + if (p_Params->intContext.size
  38536. + && (p_Params->intContext.size
  38537. + + p_Params->intContext.extBufOffset
  38538. + > p_Params->bufMargins.startMargins))
  38539. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  38540. + ("intContext.size is larger than start margins"));
  38541. +
  38542. + if ((p_Params->liodnOffset != (uint16_t)DPAA_LIODN_DONT_OVERRIDE)
  38543. + && (p_Params->liodnOffset & ~FM_LIODN_OFFSET_MASK))
  38544. + RETURN_ERROR(
  38545. + MAJOR,
  38546. + E_INVALID_VALUE,
  38547. + ("liodnOffset is larger than %d", FM_LIODN_OFFSET_MASK+1));
  38548. +
  38549. +#ifdef FM_NO_BACKUP_POOLS
  38550. + if ((p_FmPort->fmRevInfo.majorRev != 4) && (p_FmPort->fmRevInfo.majorRev < 6))
  38551. + if (p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
  38552. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("BackupBmPools"));
  38553. +#endif /* FM_NO_BACKUP_POOLS */
  38554. + }
  38555. +
  38556. + /****************************************/
  38557. + /* Non Rx ports */
  38558. + /****************************************/
  38559. + else
  38560. + {
  38561. + if (p_Params->deqSubPortal >= FM_MAX_NUM_OF_SUB_PORTALS)
  38562. + RETURN_ERROR(
  38563. + MAJOR,
  38564. + E_INVALID_VALUE,
  38565. + (" deqSubPortal has to be in the range of 0 - %d", FM_MAX_NUM_OF_SUB_PORTALS));
  38566. +
  38567. + /* to protect HW internal-context from overwrite */
  38568. + if ((p_Params->intContext.size)
  38569. + && (p_Params->intContext.intContextOffset
  38570. + < MIN_TX_INT_OFFSET))
  38571. + RETURN_ERROR(
  38572. + MAJOR,
  38573. + E_INVALID_VALUE,
  38574. + ("non-Rx intContext.intContextOffset can't be smaller than %d", MIN_TX_INT_OFFSET));
  38575. +
  38576. + if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
  38577. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
  38578. + /* in O/H DEFAULT_notSupported indicates that it is not supported and should not be checked */
  38579. + || (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
  38580. + != DEFAULT_notSupported))
  38581. + {
  38582. + /* Check that not larger than 8 */
  38583. + if ((!p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth)
  38584. + || (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
  38585. + > MAX_FIFO_PIPELINE_DEPTH))
  38586. + RETURN_ERROR(
  38587. + MAJOR,
  38588. + E_INVALID_VALUE,
  38589. + ("fifoDeqPipelineDepth can't be larger than %d", MAX_FIFO_PIPELINE_DEPTH));
  38590. + }
  38591. + }
  38592. +
  38593. + /****************************************/
  38594. + /* Rx Or Offline Parsing */
  38595. + /****************************************/
  38596. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  38597. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  38598. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  38599. + {
  38600. + if (!p_Params->dfltFqid)
  38601. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  38602. + ("dfltFqid must be between 1 and 2^24-1"));
  38603. +#if defined(FM_CAPWAP_SUPPORT) && defined(FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004)
  38604. + if (p_FmPort->p_FmPortDriverParam->bufferPrefixContent.manipExtraSpace % 16)
  38605. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufferPrefixContent.manipExtraSpace has to be devidable by 16"));
  38606. +#endif /* defined(FM_CAPWAP_SUPPORT) && ... */
  38607. + }
  38608. +
  38609. + /****************************************/
  38610. + /* All ports */
  38611. + /****************************************/
  38612. + /* common BMI registers values */
  38613. + /* Check that Queue Id is not larger than 2^24, and is not 0 */
  38614. + if ((p_Params->errFqid & ~0x00FFFFFF) || !p_Params->errFqid)
  38615. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  38616. + ("errFqid must be between 1 and 2^24-1"));
  38617. + if (p_Params->dfltFqid & ~0x00FFFFFF)
  38618. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  38619. + ("dfltFqid must be between 1 and 2^24-1"));
  38620. + }
  38621. +
  38622. + /****************************************/
  38623. + /* Rx only */
  38624. + /****************************************/
  38625. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  38626. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  38627. + {
  38628. + if (p_DfltConfig->rx_pri_elevation % BMI_FIFO_UNITS)
  38629. + RETURN_ERROR(
  38630. + MAJOR,
  38631. + E_INVALID_VALUE,
  38632. + ("rxFifoPriElevationLevel has to be divisible by %d", BMI_FIFO_UNITS));
  38633. + if ((p_DfltConfig->rx_pri_elevation < BMI_FIFO_UNITS)
  38634. + || (p_DfltConfig->rx_pri_elevation > MAX_PORT_FIFO_SIZE))
  38635. + RETURN_ERROR(
  38636. + MAJOR,
  38637. + E_INVALID_VALUE,
  38638. + ("rxFifoPriElevationLevel has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
  38639. + if (p_DfltConfig->rx_fifo_thr % BMI_FIFO_UNITS)
  38640. + RETURN_ERROR(
  38641. + MAJOR,
  38642. + E_INVALID_VALUE,
  38643. + ("rxFifoThreshold has to be divisible by %d", BMI_FIFO_UNITS));
  38644. + if ((p_DfltConfig->rx_fifo_thr < BMI_FIFO_UNITS)
  38645. + || (p_DfltConfig->rx_fifo_thr > MAX_PORT_FIFO_SIZE))
  38646. + RETURN_ERROR(
  38647. + MAJOR,
  38648. + E_INVALID_VALUE,
  38649. + ("rxFifoThreshold has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
  38650. +
  38651. + /* Check that not larger than 16 */
  38652. + if (p_DfltConfig->rx_cut_end_bytes > FRAME_END_DATA_SIZE)
  38653. + RETURN_ERROR(
  38654. + MAJOR,
  38655. + E_INVALID_VALUE,
  38656. + ("cutBytesFromEnd can't be larger than %d", FRAME_END_DATA_SIZE));
  38657. +
  38658. + if (FmSpCheckBufMargins(&p_Params->bufMargins) != E_OK)
  38659. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  38660. +
  38661. + /* extra FIFO size (allowed only to Rx ports) */
  38662. + if (p_Params->setSizeOfFifo
  38663. + && (p_FmPort->fifoBufs.extra % BMI_FIFO_UNITS))
  38664. + RETURN_ERROR(
  38665. + MAJOR,
  38666. + E_INVALID_VALUE,
  38667. + ("fifoBufs.extra has to be divisible by %d", BMI_FIFO_UNITS));
  38668. +
  38669. + if (p_Params->bufPoolDepletion.poolsGrpModeEnable
  38670. + && !p_Params->bufPoolDepletion.numOfPools)
  38671. + RETURN_ERROR(
  38672. + MAJOR,
  38673. + E_INVALID_VALUE,
  38674. + ("bufPoolDepletion.numOfPools can not be 0 when poolsGrpModeEnable=TRUE"));
  38675. +#ifdef FM_CSI_CFED_LIMIT
  38676. + if (p_FmPort->fmRevInfo.majorRev == 4)
  38677. + {
  38678. + /* Check that not larger than 16 */
  38679. + if (p_DfltConfig->rx_cut_end_bytes + p_DfltConfig->checksum_bytes_ignore > FRAME_END_DATA_SIZE)
  38680. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("cheksumLastBytesIgnore + cutBytesFromEnd can't be larger than %d", FRAME_END_DATA_SIZE));
  38681. + }
  38682. +#endif /* FM_CSI_CFED_LIMIT */
  38683. + }
  38684. +
  38685. + /****************************************/
  38686. + /* Non Rx ports */
  38687. + /****************************************/
  38688. + /* extra FIFO size (allowed only to Rx ports) */
  38689. + else
  38690. + if (p_FmPort->fifoBufs.extra)
  38691. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  38692. + (" No fifoBufs.extra for non Rx ports"));
  38693. +
  38694. + /****************************************/
  38695. + /* Tx only */
  38696. + /****************************************/
  38697. + if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
  38698. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G))
  38699. + {
  38700. + if (p_DfltConfig->tx_fifo_min_level % BMI_FIFO_UNITS)
  38701. + RETURN_ERROR(
  38702. + MAJOR,
  38703. + E_INVALID_VALUE,
  38704. + ("txFifoMinFillLevel has to be divisible by %d", BMI_FIFO_UNITS));
  38705. + if (p_DfltConfig->tx_fifo_min_level > (MAX_PORT_FIFO_SIZE - 256))
  38706. + RETURN_ERROR(
  38707. + MAJOR,
  38708. + E_INVALID_VALUE,
  38709. + ("txFifoMinFillLevel has to be in the range of 0 - %d", (MAX_PORT_FIFO_SIZE - 256)));
  38710. + if (p_DfltConfig->tx_fifo_low_comf_level % BMI_FIFO_UNITS)
  38711. + RETURN_ERROR(
  38712. + MAJOR,
  38713. + E_INVALID_VALUE,
  38714. + ("txFifoLowComfLevel has to be divisible by %d", BMI_FIFO_UNITS));
  38715. + if ((p_DfltConfig->tx_fifo_low_comf_level < BMI_FIFO_UNITS)
  38716. + || (p_DfltConfig->tx_fifo_low_comf_level > MAX_PORT_FIFO_SIZE))
  38717. + RETURN_ERROR(
  38718. + MAJOR,
  38719. + E_INVALID_VALUE,
  38720. + ("txFifoLowComfLevel has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
  38721. +
  38722. + if (p_FmPort->portType == e_FM_PORT_TYPE_TX)
  38723. + if (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
  38724. + > 2)
  38725. + RETURN_ERROR(
  38726. + MAJOR, E_INVALID_VALUE,
  38727. + ("fifoDeqPipelineDepth for 1G can't be larger than 2"));
  38728. + }
  38729. +
  38730. + /****************************************/
  38731. + /* Non Tx Ports */
  38732. + /****************************************/
  38733. + /* If discard override was selected , no frames may be discarded. */
  38734. + else
  38735. + if (p_DfltConfig->discard_override && p_Params->errorsToDiscard)
  38736. + RETURN_ERROR(
  38737. + MAJOR,
  38738. + E_CONFLICT,
  38739. + ("errorsToDiscard is not empty, but frmDiscardOverride selected (all discarded frames to be enqueued to error queue)."));
  38740. +
  38741. + /****************************************/
  38742. + /* Rx and Offline parsing */
  38743. + /****************************************/
  38744. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  38745. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  38746. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  38747. + {
  38748. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  38749. + unusedMask = BMI_STATUS_OP_MASK_UNUSED;
  38750. + else
  38751. + unusedMask = BMI_STATUS_RX_MASK_UNUSED;
  38752. +
  38753. + /* Check that no common bits with BMI_STATUS_MASK_UNUSED */
  38754. + if (p_Params->errorsToDiscard & unusedMask)
  38755. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
  38756. + ("errorsToDiscard contains undefined bits"));
  38757. + }
  38758. +
  38759. + /****************************************/
  38760. + /* Offline Ports */
  38761. + /****************************************/
  38762. +#ifdef FM_OP_OPEN_DMA_MIN_LIMIT
  38763. + if ((p_FmPort->fmRevInfo.majorRev >= 6)
  38764. + && (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  38765. + && p_Params->setNumOfOpenDmas
  38766. + && (p_FmPort->openDmas.num < MIN_NUM_OF_OP_DMAS))
  38767. + RETURN_ERROR(
  38768. + MAJOR,
  38769. + E_INVALID_VALUE,
  38770. + ("For Offline port, openDmas.num can't be smaller than %d", MIN_NUM_OF_OP_DMAS));
  38771. +#endif /* FM_OP_OPEN_DMA_MIN_LIMIT */
  38772. +
  38773. + /****************************************/
  38774. + /* Offline & HC Ports */
  38775. + /****************************************/
  38776. + if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  38777. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
  38778. + {
  38779. +#ifndef FM_FRAME_END_PARAMS_FOR_OP
  38780. + if ((p_FmPort->fmRevInfo.majorRev < 6) &&
  38781. + (p_FmPort->p_FmPortDriverParam->cheksumLastBytesIgnore != DEFAULT_notSupported))
  38782. + /* this is an indication that user called config for this mode which is not supported in this integration */
  38783. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("cheksumLastBytesIgnore is available for Rx & Tx ports only"));
  38784. +#endif /* !FM_FRAME_END_PARAMS_FOR_OP */
  38785. +
  38786. +#ifndef FM_DEQ_PIPELINE_PARAMS_FOR_OP
  38787. + if ((!((p_FmPort->fmRevInfo.majorRev == 4) ||
  38788. + (p_FmPort->fmRevInfo.majorRev >= 6))) &&
  38789. + (p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth != DEFAULT_notSupported))
  38790. + /* this is an indication that user called config for this mode which is not supported in this integration */
  38791. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("fifoDeqPipelineDepth is available for Tx ports only"));
  38792. +#endif /* !FM_DEQ_PIPELINE_PARAMS_FOR_OP */
  38793. + }
  38794. +
  38795. + /****************************************/
  38796. + /* All ports */
  38797. + /****************************************/
  38798. + /* Check that not larger than 16 */
  38799. + if ((p_Params->cheksumLastBytesIgnore > FRAME_END_DATA_SIZE)
  38800. + && ((p_Params->cheksumLastBytesIgnore != DEFAULT_notSupported)))
  38801. + RETURN_ERROR(
  38802. + MAJOR,
  38803. + E_INVALID_VALUE,
  38804. + ("cheksumLastBytesIgnore can't be larger than %d", FRAME_END_DATA_SIZE));
  38805. +
  38806. + if (FmSpCheckIntContextParams(&p_Params->intContext) != E_OK)
  38807. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  38808. +
  38809. + /* common BMI registers values */
  38810. + if (p_Params->setNumOfTasks
  38811. + && ((!p_FmPort->tasks.num)
  38812. + || (p_FmPort->tasks.num > MAX_NUM_OF_TASKS)))
  38813. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  38814. + ("tasks.num can't be larger than %d", MAX_NUM_OF_TASKS));
  38815. + if (p_Params->setNumOfTasks
  38816. + && (p_FmPort->tasks.extra > MAX_NUM_OF_EXTRA_TASKS))
  38817. + RETURN_ERROR(
  38818. + MAJOR,
  38819. + E_INVALID_VALUE,
  38820. + ("tasks.extra can't be larger than %d", MAX_NUM_OF_EXTRA_TASKS));
  38821. + if (p_Params->setNumOfOpenDmas
  38822. + && ((!p_FmPort->openDmas.num)
  38823. + || (p_FmPort->openDmas.num > MAX_NUM_OF_DMAS)))
  38824. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  38825. + ("openDmas.num can't be larger than %d", MAX_NUM_OF_DMAS));
  38826. + if (p_Params->setNumOfOpenDmas
  38827. + && (p_FmPort->openDmas.extra > MAX_NUM_OF_EXTRA_DMAS))
  38828. + RETURN_ERROR(
  38829. + MAJOR,
  38830. + E_INVALID_VALUE,
  38831. + ("openDmas.extra can't be larger than %d", MAX_NUM_OF_EXTRA_DMAS));
  38832. + if (p_Params->setSizeOfFifo
  38833. + && (!p_FmPort->fifoBufs.num
  38834. + || (p_FmPort->fifoBufs.num > MAX_PORT_FIFO_SIZE)))
  38835. + RETURN_ERROR(
  38836. + MAJOR,
  38837. + E_INVALID_VALUE,
  38838. + ("fifoBufs.num has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
  38839. + if (p_Params->setSizeOfFifo && (p_FmPort->fifoBufs.num % BMI_FIFO_UNITS))
  38840. + RETURN_ERROR(
  38841. + MAJOR, E_INVALID_VALUE,
  38842. + ("fifoBufs.num has to be divisible by %d", BMI_FIFO_UNITS));
  38843. +
  38844. +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  38845. + if (p_FmPort->fmRevInfo.majorRev == 4)
  38846. + if (p_FmPort->p_FmPortDriverParam->deqPrefetchOption != DEFAULT_notSupported)
  38847. + /* this is an indication that user called config for this mode which is not supported in this integration */
  38848. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("deqPrefetchOption"));
  38849. +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
  38850. +
  38851. + return E_OK;
  38852. +}
  38853. +
  38854. +static t_Error VerifySizeOfFifo(t_FmPort *p_FmPort)
  38855. +{
  38856. + uint32_t minFifoSizeRequired = 0, optFifoSizeForB2B = 0;
  38857. +
  38858. + /*************************/
  38859. + /* TX PORTS */
  38860. + /*************************/
  38861. + if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
  38862. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G))
  38863. + {
  38864. + minFifoSizeRequired =
  38865. + (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
  38866. + + (3 * BMI_FIFO_UNITS));
  38867. + if (!p_FmPort->imEn)
  38868. + minFifoSizeRequired +=
  38869. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
  38870. + * BMI_FIFO_UNITS;
  38871. +
  38872. + optFifoSizeForB2B = minFifoSizeRequired;
  38873. +
  38874. + /* Add some margin for back-to-back capability to improve performance,
  38875. + allows the hardware to pipeline new frame dma while the previous
  38876. + frame not yet transmitted. */
  38877. + if (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
  38878. + optFifoSizeForB2B += 3 * BMI_FIFO_UNITS;
  38879. + else
  38880. + optFifoSizeForB2B += 2 * BMI_FIFO_UNITS;
  38881. + }
  38882. +
  38883. + /*************************/
  38884. + /* RX IM PORTS */
  38885. + /*************************/
  38886. + else
  38887. + if (((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  38888. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  38889. + && p_FmPort->imEn)
  38890. + {
  38891. + optFifoSizeForB2B =
  38892. + minFifoSizeRequired =
  38893. + (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
  38894. + + (4 * BMI_FIFO_UNITS));
  38895. + }
  38896. +
  38897. + /*************************/
  38898. + /* RX non-IM PORTS */
  38899. + /*************************/
  38900. + else
  38901. + if (((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  38902. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  38903. + && !p_FmPort->imEn)
  38904. + {
  38905. + if (p_FmPort->fmRevInfo.majorRev == 4)
  38906. + {
  38907. + if (p_FmPort->rxPoolsParams.numOfPools == 1)
  38908. + minFifoSizeRequired = 8 * BMI_FIFO_UNITS;
  38909. + else
  38910. + minFifoSizeRequired =
  38911. + (uint32_t)(ROUND_UP(p_FmPort->rxPoolsParams.secondLargestBufSize, BMI_FIFO_UNITS)
  38912. + + (7 * BMI_FIFO_UNITS));
  38913. + }
  38914. + else
  38915. + {
  38916. +#if (DPAA_VERSION >= 11)
  38917. + minFifoSizeRequired =
  38918. + (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
  38919. + + (5 * BMI_FIFO_UNITS));
  38920. + /* 4 according to spec + 1 for FOF>0 */
  38921. +#else
  38922. + minFifoSizeRequired = (uint32_t)
  38923. + (ROUND_UP(MIN(p_FmPort->maxFrameLength, p_FmPort->rxPoolsParams.largestBufSize), BMI_FIFO_UNITS)
  38924. + + (7*BMI_FIFO_UNITS));
  38925. +#endif /* (DPAA_VERSION >= 11) */
  38926. + }
  38927. +
  38928. + optFifoSizeForB2B = minFifoSizeRequired;
  38929. +
  38930. + /* Add some margin for back-to-back capability to improve performance,
  38931. + allows the hardware to pipeline new frame dma while the previous
  38932. + frame not yet transmitted. */
  38933. + if (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  38934. + optFifoSizeForB2B += 8 * BMI_FIFO_UNITS;
  38935. + else
  38936. + optFifoSizeForB2B += 3 * BMI_FIFO_UNITS;
  38937. + }
  38938. +
  38939. + /* For O/H ports, check fifo size and update if necessary */
  38940. + else
  38941. + if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  38942. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
  38943. + {
  38944. +#if (DPAA_VERSION >= 11)
  38945. + optFifoSizeForB2B =
  38946. + minFifoSizeRequired =
  38947. + (uint32_t)(ROUND_UP(p_FmPort->maxFrameLength, BMI_FIFO_UNITS)
  38948. + + ((p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth
  38949. + + 5) * BMI_FIFO_UNITS));
  38950. + /* 4 according to spec + 1 for FOF>0 */
  38951. +#else
  38952. + optFifoSizeForB2B = minFifoSizeRequired = (uint32_t)((p_FmPort->tasks.num + 2) * BMI_FIFO_UNITS);
  38953. +#endif /* (DPAA_VERSION >= 11) */
  38954. + }
  38955. +
  38956. + ASSERT_COND(minFifoSizeRequired > 0);
  38957. + ASSERT_COND(optFifoSizeForB2B >= minFifoSizeRequired);
  38958. +
  38959. + /* Verify the size */
  38960. + if (p_FmPort->fifoBufs.num < minFifoSizeRequired)
  38961. + DBG(INFO,
  38962. + ("FIFO size is %d and should be enlarged to %d bytes",p_FmPort->fifoBufs.num, minFifoSizeRequired));
  38963. + else if (p_FmPort->fifoBufs.num < optFifoSizeForB2B)
  38964. + DBG(INFO,
  38965. + ("For back-to-back frames processing, FIFO size is %d and needs to enlarge to %d bytes", p_FmPort->fifoBufs.num, optFifoSizeForB2B));
  38966. +
  38967. + return E_OK;
  38968. +}
  38969. +
  38970. +static void FmPortDriverParamFree(t_FmPort *p_FmPort)
  38971. +{
  38972. + if (p_FmPort->p_FmPortDriverParam)
  38973. + {
  38974. + XX_Free(p_FmPort->p_FmPortDriverParam);
  38975. + p_FmPort->p_FmPortDriverParam = NULL;
  38976. + }
  38977. +}
  38978. +
  38979. +static t_Error SetExtBufferPools(t_FmPort *p_FmPort)
  38980. +{
  38981. + t_FmExtPools *p_ExtBufPools = &p_FmPort->p_FmPortDriverParam->extBufPools;
  38982. + t_FmBufPoolDepletion *p_BufPoolDepletion =
  38983. + &p_FmPort->p_FmPortDriverParam->bufPoolDepletion;
  38984. + uint8_t orderedArray[FM_PORT_MAX_NUM_OF_EXT_POOLS];
  38985. + uint16_t sizesArray[BM_MAX_NUM_OF_POOLS];
  38986. + int i = 0, j = 0, err;
  38987. + struct fman_port_bpools bpools;
  38988. +
  38989. + memset(&orderedArray, 0, sizeof(uint8_t) * FM_PORT_MAX_NUM_OF_EXT_POOLS);
  38990. + memset(&sizesArray, 0, sizeof(uint16_t) * BM_MAX_NUM_OF_POOLS);
  38991. + memcpy(&p_FmPort->extBufPools, p_ExtBufPools, sizeof(t_FmExtPools));
  38992. +
  38993. + FmSpSetBufPoolsInAscOrderOfBufSizes(p_ExtBufPools, orderedArray,
  38994. + sizesArray);
  38995. +
  38996. + /* Prepare flibs bpools structure */
  38997. + memset(&bpools, 0, sizeof(struct fman_port_bpools));
  38998. + bpools.count = p_ExtBufPools->numOfPoolsUsed;
  38999. + bpools.counters_enable = TRUE;
  39000. + for (i = 0; i < p_ExtBufPools->numOfPoolsUsed; i++)
  39001. + {
  39002. + bpools.bpool[i].bpid = orderedArray[i];
  39003. + bpools.bpool[i].size = sizesArray[orderedArray[i]];
  39004. + /* functionality available only for some derivatives (limited by config) */
  39005. + if (p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
  39006. + for (j = 0;
  39007. + j
  39008. + < p_FmPort->p_FmPortDriverParam->p_BackupBmPools->numOfBackupPools;
  39009. + j++)
  39010. + if (orderedArray[i]
  39011. + == p_FmPort->p_FmPortDriverParam->p_BackupBmPools->poolIds[j])
  39012. + {
  39013. + bpools.bpool[i].is_backup = TRUE;
  39014. + break;
  39015. + }
  39016. + }
  39017. +
  39018. + /* save pools parameters for later use */
  39019. + p_FmPort->rxPoolsParams.numOfPools = p_ExtBufPools->numOfPoolsUsed;
  39020. + p_FmPort->rxPoolsParams.largestBufSize =
  39021. + sizesArray[orderedArray[p_ExtBufPools->numOfPoolsUsed - 1]];
  39022. + p_FmPort->rxPoolsParams.secondLargestBufSize =
  39023. + sizesArray[orderedArray[p_ExtBufPools->numOfPoolsUsed - 2]];
  39024. +
  39025. + /* FMBM_RMPD reg. - pool depletion */
  39026. + if (p_BufPoolDepletion->poolsGrpModeEnable)
  39027. + {
  39028. + bpools.grp_bp_depleted_num = p_BufPoolDepletion->numOfPools;
  39029. + for (i = 0; i < BM_MAX_NUM_OF_POOLS; i++)
  39030. + {
  39031. + if (p_BufPoolDepletion->poolsToConsider[i])
  39032. + {
  39033. + for (j = 0; j < p_ExtBufPools->numOfPoolsUsed; j++)
  39034. + {
  39035. + if (i == orderedArray[j])
  39036. + {
  39037. + bpools.bpool[j].grp_bp_depleted = TRUE;
  39038. + break;
  39039. + }
  39040. + }
  39041. + }
  39042. + }
  39043. + }
  39044. +
  39045. + if (p_BufPoolDepletion->singlePoolModeEnable)
  39046. + {
  39047. + for (i = 0; i < BM_MAX_NUM_OF_POOLS; i++)
  39048. + {
  39049. + if (p_BufPoolDepletion->poolsToConsiderForSingleMode[i])
  39050. + {
  39051. + for (j = 0; j < p_ExtBufPools->numOfPoolsUsed; j++)
  39052. + {
  39053. + if (i == orderedArray[j])
  39054. + {
  39055. + bpools.bpool[j].single_bp_depleted = TRUE;
  39056. + break;
  39057. + }
  39058. + }
  39059. + }
  39060. + }
  39061. + }
  39062. +
  39063. +#if (DPAA_VERSION >= 11)
  39064. + /* fill QbbPEV */
  39065. + if (p_BufPoolDepletion->poolsGrpModeEnable
  39066. + || p_BufPoolDepletion->singlePoolModeEnable)
  39067. + {
  39068. + for (i = 0; i < FM_MAX_NUM_OF_PFC_PRIORITIES; i++)
  39069. + {
  39070. + if (p_BufPoolDepletion->pfcPrioritiesEn[i] == TRUE)
  39071. + {
  39072. + bpools.bpool[i].pfc_priorities_en = TRUE;
  39073. + }
  39074. + }
  39075. + }
  39076. +#endif /* (DPAA_VERSION >= 11) */
  39077. +
  39078. + /* Issue flibs function */
  39079. + err = fman_port_set_bpools(&p_FmPort->port, &bpools);
  39080. + if (err != 0)
  39081. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_bpools"));
  39082. +
  39083. + if (p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
  39084. + XX_Free(p_FmPort->p_FmPortDriverParam->p_BackupBmPools);
  39085. +
  39086. + return E_OK;
  39087. +}
  39088. +
  39089. +static t_Error ClearPerfCnts(t_FmPort *p_FmPort)
  39090. +{
  39091. + if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  39092. + FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_QUEUE_UTIL, 0);
  39093. + FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL, 0);
  39094. + FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL, 0);
  39095. + FM_PORT_ModifyCounter(p_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL, 0);
  39096. + return E_OK;
  39097. +}
  39098. +
  39099. +static t_Error InitLowLevelDriver(t_FmPort *p_FmPort)
  39100. +{
  39101. + t_FmPortDriverParam *p_DriverParams = p_FmPort->p_FmPortDriverParam;
  39102. + struct fman_port_params portParams;
  39103. + uint32_t tmpVal;
  39104. + t_Error err;
  39105. +
  39106. + /* Set up flibs parameters and issue init function */
  39107. +
  39108. + memset(&portParams, 0, sizeof(struct fman_port_params));
  39109. + portParams.discard_mask = p_DriverParams->errorsToDiscard;
  39110. + portParams.dflt_fqid = p_DriverParams->dfltFqid;
  39111. + portParams.err_fqid = p_DriverParams->errFqid;
  39112. + portParams.deq_sp = p_DriverParams->deqSubPortal;
  39113. + portParams.dont_release_buf = p_DriverParams->dontReleaseBuf;
  39114. + switch (p_FmPort->portType)
  39115. + {
  39116. + case (e_FM_PORT_TYPE_RX_10G):
  39117. + case (e_FM_PORT_TYPE_RX):
  39118. + portParams.err_mask = (RX_ERRS_TO_ENQ & ~portParams.discard_mask);
  39119. + if (!p_FmPort->imEn)
  39120. + {
  39121. + if (p_DriverParams->forwardReuseIntContext)
  39122. + p_DriverParams->dfltCfg.rx_fd_bits =
  39123. + (uint8_t)(BMI_PORT_RFNE_FRWD_RPD >> 24);
  39124. + }
  39125. + break;
  39126. +
  39127. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  39128. + portParams.err_mask = (OP_ERRS_TO_ENQ & ~portParams.discard_mask);
  39129. + break;
  39130. + break;
  39131. +
  39132. + default:
  39133. + break;
  39134. + }
  39135. +
  39136. + tmpVal =
  39137. + (uint32_t)(
  39138. + (p_FmPort->internalBufferOffset % OFFSET_UNITS) ? (p_FmPort->internalBufferOffset
  39139. + / OFFSET_UNITS + 1) :
  39140. + (p_FmPort->internalBufferOffset / OFFSET_UNITS));
  39141. + p_FmPort->internalBufferOffset = (uint8_t)(tmpVal * OFFSET_UNITS);
  39142. + p_DriverParams->dfltCfg.int_buf_start_margin =
  39143. + p_FmPort->internalBufferOffset;
  39144. +
  39145. + p_DriverParams->dfltCfg.ext_buf_start_margin =
  39146. + p_DriverParams->bufMargins.startMargins;
  39147. + p_DriverParams->dfltCfg.ext_buf_end_margin =
  39148. + p_DriverParams->bufMargins.endMargins;
  39149. +
  39150. + p_DriverParams->dfltCfg.ic_ext_offset =
  39151. + p_DriverParams->intContext.extBufOffset;
  39152. + p_DriverParams->dfltCfg.ic_int_offset =
  39153. + p_DriverParams->intContext.intContextOffset;
  39154. + p_DriverParams->dfltCfg.ic_size = p_DriverParams->intContext.size;
  39155. +
  39156. + p_DriverParams->dfltCfg.stats_counters_enable = TRUE;
  39157. + p_DriverParams->dfltCfg.perf_counters_enable = TRUE;
  39158. + p_DriverParams->dfltCfg.queue_counters_enable = TRUE;
  39159. +
  39160. + p_DriverParams->dfltCfg.perf_cnt_params.task_val =
  39161. + (uint8_t)p_FmPort->tasks.num;
  39162. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING ||
  39163. + p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)p_DriverParams->dfltCfg.perf_cnt_params.queue_val = 0;
  39164. + else
  39165. + p_DriverParams->dfltCfg.perf_cnt_params.queue_val = 1;
  39166. + p_DriverParams->dfltCfg.perf_cnt_params.dma_val =
  39167. + (uint8_t)p_FmPort->openDmas.num;
  39168. + p_DriverParams->dfltCfg.perf_cnt_params.fifo_val = p_FmPort->fifoBufs.num;
  39169. +
  39170. + if (0
  39171. + != fman_port_init(&p_FmPort->port, &p_DriverParams->dfltCfg,
  39172. + &portParams))
  39173. + RETURN_ERROR(MAJOR, E_NO_DEVICE, ("fman_port_init"));
  39174. +
  39175. + if (p_FmPort->imEn && ((err = FmPortImInit(p_FmPort)) != E_OK))
  39176. + RETURN_ERROR(MAJOR, err, NO_MSG);
  39177. + else
  39178. + {
  39179. + // from QMIInit
  39180. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  39181. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  39182. + {
  39183. + if (p_DriverParams->deqPrefetchOption == e_FM_PORT_DEQ_NO_PREFETCH)
  39184. + FmSetPortPreFetchConfiguration(p_FmPort->h_Fm, p_FmPort->portId,
  39185. + FALSE);
  39186. + else
  39187. + FmSetPortPreFetchConfiguration(p_FmPort->h_Fm, p_FmPort->portId,
  39188. + TRUE);
  39189. + }
  39190. + }
  39191. + /* The code bellow is a trick so the FM will not release the buffer
  39192. + to BM nor will try to enqueue the frame to QM */
  39193. + if (((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
  39194. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX)) && (!p_FmPort->imEn))
  39195. + {
  39196. + if (!p_DriverParams->dfltFqid && p_DriverParams->dontReleaseBuf)
  39197. + {
  39198. + /* override fmbm_tcfqid 0 with a false non-0 value. This will force FM to
  39199. + * act according to tfene. Otherwise, if fmbm_tcfqid is 0 the FM will release
  39200. + * buffers to BM regardless of fmbm_tfene
  39201. + */
  39202. + WRITE_UINT32(p_FmPort->port.bmi_regs->tx.fmbm_tcfqid, 0xFFFFFF);
  39203. + WRITE_UINT32(p_FmPort->port.bmi_regs->tx.fmbm_tfene,
  39204. + NIA_ENG_BMI | NIA_BMI_AC_TX_RELEASE);
  39205. + }
  39206. + }
  39207. +
  39208. + return E_OK;
  39209. +}
  39210. +
  39211. +static bool CheckRxBmiCounter(t_FmPort *p_FmPort, e_FmPortCounters counter)
  39212. +{
  39213. + UNUSED(p_FmPort);
  39214. +
  39215. + switch (counter)
  39216. + {
  39217. + case (e_FM_PORT_COUNTERS_CYCLE):
  39218. + case (e_FM_PORT_COUNTERS_TASK_UTIL):
  39219. + case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
  39220. + case (e_FM_PORT_COUNTERS_DMA_UTIL):
  39221. + case (e_FM_PORT_COUNTERS_FIFO_UTIL):
  39222. + case (e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION):
  39223. + case (e_FM_PORT_COUNTERS_FRAME):
  39224. + case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
  39225. + case (e_FM_PORT_COUNTERS_RX_BAD_FRAME):
  39226. + case (e_FM_PORT_COUNTERS_RX_LARGE_FRAME):
  39227. + case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
  39228. + case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
  39229. + case (e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD):
  39230. + case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
  39231. + case (e_FM_PORT_COUNTERS_PREPARE_TO_ENQUEUE_COUNTER):
  39232. + return TRUE;
  39233. + default:
  39234. + return FALSE;
  39235. + }
  39236. +}
  39237. +
  39238. +static bool CheckTxBmiCounter(t_FmPort *p_FmPort, e_FmPortCounters counter)
  39239. +{
  39240. + UNUSED(p_FmPort);
  39241. +
  39242. + switch (counter)
  39243. + {
  39244. + case (e_FM_PORT_COUNTERS_CYCLE):
  39245. + case (e_FM_PORT_COUNTERS_TASK_UTIL):
  39246. + case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
  39247. + case (e_FM_PORT_COUNTERS_DMA_UTIL):
  39248. + case (e_FM_PORT_COUNTERS_FIFO_UTIL):
  39249. + case (e_FM_PORT_COUNTERS_FRAME):
  39250. + case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
  39251. + case (e_FM_PORT_COUNTERS_LENGTH_ERR):
  39252. + case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
  39253. + case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
  39254. + return TRUE;
  39255. + default:
  39256. + return FALSE;
  39257. + }
  39258. +}
  39259. +
  39260. +static bool CheckOhBmiCounter(t_FmPort *p_FmPort, e_FmPortCounters counter)
  39261. +{
  39262. + switch (counter)
  39263. + {
  39264. + case (e_FM_PORT_COUNTERS_CYCLE):
  39265. + case (e_FM_PORT_COUNTERS_TASK_UTIL):
  39266. + case (e_FM_PORT_COUNTERS_DMA_UTIL):
  39267. + case (e_FM_PORT_COUNTERS_FIFO_UTIL):
  39268. + case (e_FM_PORT_COUNTERS_FRAME):
  39269. + case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
  39270. + case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
  39271. + case (e_FM_PORT_COUNTERS_WRED_DISCARD):
  39272. + case (e_FM_PORT_COUNTERS_LENGTH_ERR):
  39273. + case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
  39274. + case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
  39275. + return TRUE;
  39276. + case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
  39277. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
  39278. + return FALSE;
  39279. + else
  39280. + return TRUE;
  39281. + default:
  39282. + return FALSE;
  39283. + }
  39284. +}
  39285. +
  39286. +static t_Error BmiPortCheckAndGetCounterType(
  39287. + t_FmPort *p_FmPort, e_FmPortCounters counter,
  39288. + enum fman_port_stats_counters *p_StatsType,
  39289. + enum fman_port_perf_counters *p_PerfType, bool *p_IsStats)
  39290. +{
  39291. + volatile uint32_t *p_Reg;
  39292. + bool isValid;
  39293. +
  39294. + switch (p_FmPort->portType)
  39295. + {
  39296. + case (e_FM_PORT_TYPE_RX_10G):
  39297. + case (e_FM_PORT_TYPE_RX):
  39298. + p_Reg = &p_FmPort->port.bmi_regs->rx.fmbm_rstc;
  39299. + isValid = CheckRxBmiCounter(p_FmPort, counter);
  39300. + break;
  39301. + case (e_FM_PORT_TYPE_TX_10G):
  39302. + case (e_FM_PORT_TYPE_TX):
  39303. + p_Reg = &p_FmPort->port.bmi_regs->tx.fmbm_tstc;
  39304. + isValid = CheckTxBmiCounter(p_FmPort, counter);
  39305. + break;
  39306. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  39307. + case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
  39308. + p_Reg = &p_FmPort->port.bmi_regs->oh.fmbm_ostc;
  39309. + isValid = CheckOhBmiCounter(p_FmPort, counter);
  39310. + break;
  39311. + default:
  39312. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Unsupported port type"));
  39313. + }
  39314. +
  39315. + if (!isValid)
  39316. + RETURN_ERROR(MINOR, E_INVALID_STATE,
  39317. + ("Requested counter is not available for this port type"));
  39318. +
  39319. + /* check that counters are enabled */
  39320. + switch (counter)
  39321. + {
  39322. + case (e_FM_PORT_COUNTERS_CYCLE):
  39323. + case (e_FM_PORT_COUNTERS_TASK_UTIL):
  39324. + case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
  39325. + case (e_FM_PORT_COUNTERS_DMA_UTIL):
  39326. + case (e_FM_PORT_COUNTERS_FIFO_UTIL):
  39327. + case (e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION):
  39328. + /* performance counters - may be read when disabled */
  39329. + *p_IsStats = FALSE;
  39330. + break;
  39331. + case (e_FM_PORT_COUNTERS_FRAME):
  39332. + case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
  39333. + case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
  39334. + case (e_FM_PORT_COUNTERS_RX_BAD_FRAME):
  39335. + case (e_FM_PORT_COUNTERS_RX_LARGE_FRAME):
  39336. + case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
  39337. + case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
  39338. + case (e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD):
  39339. + case (e_FM_PORT_COUNTERS_LENGTH_ERR):
  39340. + case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
  39341. + case (e_FM_PORT_COUNTERS_WRED_DISCARD):
  39342. + *p_IsStats = TRUE;
  39343. + if (!(GET_UINT32(*p_Reg) & BMI_COUNTERS_EN))
  39344. + RETURN_ERROR(MINOR, E_INVALID_STATE,
  39345. + ("Requested counter was not enabled"));
  39346. + break;
  39347. + default:
  39348. + break;
  39349. + }
  39350. +
  39351. + /* Set counter */
  39352. + switch (counter)
  39353. + {
  39354. + case (e_FM_PORT_COUNTERS_CYCLE):
  39355. + *p_PerfType = E_FMAN_PORT_PERF_CNT_CYCLE;
  39356. + break;
  39357. + case (e_FM_PORT_COUNTERS_TASK_UTIL):
  39358. + *p_PerfType = E_FMAN_PORT_PERF_CNT_TASK_UTIL;
  39359. + break;
  39360. + case (e_FM_PORT_COUNTERS_QUEUE_UTIL):
  39361. + *p_PerfType = E_FMAN_PORT_PERF_CNT_QUEUE_UTIL;
  39362. + break;
  39363. + case (e_FM_PORT_COUNTERS_DMA_UTIL):
  39364. + *p_PerfType = E_FMAN_PORT_PERF_CNT_DMA_UTIL;
  39365. + break;
  39366. + case (e_FM_PORT_COUNTERS_FIFO_UTIL):
  39367. + *p_PerfType = E_FMAN_PORT_PERF_CNT_FIFO_UTIL;
  39368. + break;
  39369. + case (e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION):
  39370. + *p_PerfType = E_FMAN_PORT_PERF_CNT_RX_PAUSE;
  39371. + break;
  39372. + case (e_FM_PORT_COUNTERS_FRAME):
  39373. + *p_StatsType = E_FMAN_PORT_STATS_CNT_FRAME;
  39374. + break;
  39375. + case (e_FM_PORT_COUNTERS_DISCARD_FRAME):
  39376. + *p_StatsType = E_FMAN_PORT_STATS_CNT_DISCARD;
  39377. + break;
  39378. + case (e_FM_PORT_COUNTERS_DEALLOC_BUF):
  39379. + *p_StatsType = E_FMAN_PORT_STATS_CNT_DEALLOC_BUF;
  39380. + break;
  39381. + case (e_FM_PORT_COUNTERS_RX_BAD_FRAME):
  39382. + *p_StatsType = E_FMAN_PORT_STATS_CNT_RX_BAD_FRAME;
  39383. + break;
  39384. + case (e_FM_PORT_COUNTERS_RX_LARGE_FRAME):
  39385. + *p_StatsType = E_FMAN_PORT_STATS_CNT_RX_LARGE_FRAME;
  39386. + break;
  39387. + case (e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD):
  39388. + *p_StatsType = E_FMAN_PORT_STATS_CNT_RX_OUT_OF_BUF;
  39389. + break;
  39390. + case (e_FM_PORT_COUNTERS_RX_FILTER_FRAME):
  39391. + *p_StatsType = E_FMAN_PORT_STATS_CNT_FILTERED_FRAME;
  39392. + break;
  39393. + case (e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR):
  39394. + *p_StatsType = E_FMAN_PORT_STATS_CNT_DMA_ERR;
  39395. + break;
  39396. + case (e_FM_PORT_COUNTERS_WRED_DISCARD):
  39397. + *p_StatsType = E_FMAN_PORT_STATS_CNT_WRED_DISCARD;
  39398. + break;
  39399. + case (e_FM_PORT_COUNTERS_LENGTH_ERR):
  39400. + *p_StatsType = E_FMAN_PORT_STATS_CNT_LEN_ERR;
  39401. + break;
  39402. + case (e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT):
  39403. + *p_StatsType = E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT;
  39404. + break;
  39405. + default:
  39406. + break;
  39407. + }
  39408. +
  39409. + return E_OK;
  39410. +}
  39411. +
  39412. +static t_Error AdditionalPrsParams(t_FmPort *p_FmPort,
  39413. + t_FmPcdPrsAdditionalHdrParams *p_HdrParams,
  39414. + uint32_t *p_SoftSeqAttachReg)
  39415. +{
  39416. + uint8_t hdrNum, Ipv4HdrNum;
  39417. + u_FmPcdHdrPrsOpts *p_prsOpts;
  39418. + uint32_t tmpReg = *p_SoftSeqAttachReg, tmpPrsOffset;
  39419. +
  39420. + if (IS_PRIVATE_HEADER(p_HdrParams->hdr)
  39421. + || IS_SPECIAL_HEADER(p_HdrParams->hdr))
  39422. + RETURN_ERROR(
  39423. + MAJOR, E_NOT_SUPPORTED,
  39424. + ("No additional parameters for private or special headers."));
  39425. +
  39426. + if (p_HdrParams->errDisable)
  39427. + tmpReg |= PRS_HDR_ERROR_DIS;
  39428. +
  39429. + /* Set parser options */
  39430. + if (p_HdrParams->usePrsOpts)
  39431. + {
  39432. + p_prsOpts = &p_HdrParams->prsOpts;
  39433. + switch (p_HdrParams->hdr)
  39434. + {
  39435. + case (HEADER_TYPE_MPLS):
  39436. + if (p_prsOpts->mplsPrsOptions.labelInterpretationEnable)
  39437. + tmpReg |= PRS_HDR_MPLS_LBL_INTER_EN;
  39438. + hdrNum = GetPrsHdrNum(p_prsOpts->mplsPrsOptions.nextParse);
  39439. + if (hdrNum == ILLEGAL_HDR_NUM)
  39440. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  39441. + Ipv4HdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
  39442. + if (hdrNum < Ipv4HdrNum)
  39443. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  39444. + ("Header must be equal or higher than IPv4"));
  39445. + tmpReg |= ((uint32_t)hdrNum * PRS_HDR_ENTRY_SIZE)
  39446. + << PRS_HDR_MPLS_NEXT_HDR_SHIFT;
  39447. + break;
  39448. + case (HEADER_TYPE_PPPoE):
  39449. + if (p_prsOpts->pppoePrsOptions.enableMTUCheck)
  39450. + tmpReg |= PRS_HDR_PPPOE_MTU_CHECK_EN;
  39451. + break;
  39452. + case (HEADER_TYPE_IPv6):
  39453. + if (p_prsOpts->ipv6PrsOptions.routingHdrEnable)
  39454. + tmpReg |= PRS_HDR_IPV6_ROUTE_HDR_EN;
  39455. + break;
  39456. + case (HEADER_TYPE_TCP):
  39457. + if (p_prsOpts->tcpPrsOptions.padIgnoreChecksum)
  39458. + tmpReg |= PRS_HDR_TCP_PAD_REMOVAL;
  39459. + else
  39460. + tmpReg &= ~PRS_HDR_TCP_PAD_REMOVAL;
  39461. + break;
  39462. + case (HEADER_TYPE_UDP):
  39463. + if (p_prsOpts->udpPrsOptions.padIgnoreChecksum)
  39464. + tmpReg |= PRS_HDR_UDP_PAD_REMOVAL;
  39465. + else
  39466. + tmpReg &= ~PRS_HDR_UDP_PAD_REMOVAL;
  39467. + break;
  39468. + default:
  39469. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid header"));
  39470. + }
  39471. + }
  39472. +
  39473. + /* set software parsing (address is divided in 2 since parser uses 2 byte access. */
  39474. + if (p_HdrParams->swPrsEnable)
  39475. + {
  39476. + tmpPrsOffset = FmPcdGetSwPrsOffset(p_FmPort->h_FmPcd, p_HdrParams->hdr,
  39477. + p_HdrParams->indexPerHdr);
  39478. + if (tmpPrsOffset == ILLEGAL_BASE)
  39479. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  39480. + tmpReg |= (PRS_HDR_SW_PRS_EN | tmpPrsOffset);
  39481. + }
  39482. + *p_SoftSeqAttachReg = tmpReg;
  39483. +
  39484. + return E_OK;
  39485. +}
  39486. +
  39487. +static uint32_t GetPortSchemeBindParams(
  39488. + t_Handle h_FmPort, t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind)
  39489. +{
  39490. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  39491. + uint32_t walking1Mask = 0x80000000, tmp;
  39492. + uint8_t idx = 0;
  39493. +
  39494. + p_SchemeBind->netEnvId = p_FmPort->netEnvId;
  39495. + p_SchemeBind->hardwarePortId = p_FmPort->hardwarePortId;
  39496. + p_SchemeBind->useClsPlan = p_FmPort->useClsPlan;
  39497. + p_SchemeBind->numOfSchemes = 0;
  39498. + tmp = p_FmPort->schemesPerPortVector;
  39499. + if (tmp)
  39500. + {
  39501. + while (tmp)
  39502. + {
  39503. + if (tmp & walking1Mask)
  39504. + {
  39505. + p_SchemeBind->schemesIds[p_SchemeBind->numOfSchemes] = idx;
  39506. + p_SchemeBind->numOfSchemes++;
  39507. + tmp &= ~walking1Mask;
  39508. + }
  39509. + walking1Mask >>= 1;
  39510. + idx++;
  39511. + }
  39512. + }
  39513. +
  39514. + return tmp;
  39515. +}
  39516. +
  39517. +static void FmPortCheckNApplyMacsec(t_Handle h_FmPort)
  39518. +{
  39519. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  39520. + volatile uint32_t *p_BmiCfgReg = NULL;
  39521. + uint32_t macsecEn = BMI_PORT_CFG_EN_MACSEC;
  39522. + uint32_t lcv, walking1Mask = 0x80000000;
  39523. + uint8_t cnt = 0;
  39524. +
  39525. + ASSERT_COND(p_FmPort);
  39526. + ASSERT_COND(p_FmPort->h_FmPcd);
  39527. + ASSERT_COND(!p_FmPort->p_FmPortDriverParam);
  39528. +
  39529. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  39530. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  39531. + return;
  39532. +
  39533. + p_BmiCfgReg = &p_FmPort->port.bmi_regs->rx.fmbm_rcfg;
  39534. + /* get LCV for MACSEC */
  39535. + if ((lcv = FmPcdGetMacsecLcv(p_FmPort->h_FmPcd, p_FmPort->netEnvId))
  39536. + != 0)
  39537. + {
  39538. + while (!(lcv & walking1Mask))
  39539. + {
  39540. + cnt++;
  39541. + walking1Mask >>= 1;
  39542. + }
  39543. +
  39544. + macsecEn |= (uint32_t)cnt << BMI_PORT_CFG_MS_SEL_SHIFT;
  39545. + WRITE_UINT32(*p_BmiCfgReg, GET_UINT32(*p_BmiCfgReg) | macsecEn);
  39546. + }
  39547. +}
  39548. +
  39549. +static t_Error SetPcd(t_FmPort *p_FmPort, t_FmPortPcdParams *p_PcdParams)
  39550. +{
  39551. + t_Error err = E_OK;
  39552. + uint32_t tmpReg;
  39553. + volatile uint32_t *p_BmiNia = NULL;
  39554. + volatile uint32_t *p_BmiPrsNia = NULL;
  39555. + volatile uint32_t *p_BmiPrsStartOffset = NULL;
  39556. + volatile uint32_t *p_BmiInitPrsResult = NULL;
  39557. + volatile uint32_t *p_BmiCcBase = NULL;
  39558. + uint16_t hdrNum, L3HdrNum, greHdrNum;
  39559. + int i;
  39560. + bool isEmptyClsPlanGrp;
  39561. + uint32_t tmpHxs[FM_PCD_PRS_NUM_OF_HDRS];
  39562. + uint16_t absoluteProfileId;
  39563. + uint8_t physicalSchemeId;
  39564. + uint32_t ccTreePhysOffset;
  39565. + t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
  39566. + uint32_t initialSwPrs = 0;
  39567. +
  39568. + ASSERT_COND(p_FmPort);
  39569. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  39570. +
  39571. + if (p_FmPort->imEn)
  39572. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  39573. + ("available for non-independant mode ports only"));
  39574. +
  39575. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  39576. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  39577. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  39578. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  39579. + ("available for Rx and offline parsing ports only"));
  39580. +
  39581. + p_FmPort->netEnvId = FmPcdGetNetEnvId(p_PcdParams->h_NetEnv);
  39582. +
  39583. + p_FmPort->pcdEngines = 0;
  39584. +
  39585. + /* initialize p_FmPort->pcdEngines field in port's structure */
  39586. + switch (p_PcdParams->pcdSupport)
  39587. + {
  39588. + case (e_FM_PORT_PCD_SUPPORT_NONE):
  39589. + RETURN_ERROR(
  39590. + MAJOR,
  39591. + E_INVALID_STATE,
  39592. + ("No PCD configuration required if e_FM_PORT_PCD_SUPPORT_NONE selected"));
  39593. + case (e_FM_PORT_PCD_SUPPORT_PRS_ONLY):
  39594. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39595. + break;
  39596. + case (e_FM_PORT_PCD_SUPPORT_PLCR_ONLY):
  39597. + p_FmPort->pcdEngines |= FM_PCD_PLCR;
  39598. + break;
  39599. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR):
  39600. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39601. + p_FmPort->pcdEngines |= FM_PCD_PLCR;
  39602. + break;
  39603. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG):
  39604. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39605. + p_FmPort->pcdEngines |= FM_PCD_KG;
  39606. + break;
  39607. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC):
  39608. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39609. + p_FmPort->pcdEngines |= FM_PCD_CC;
  39610. + p_FmPort->pcdEngines |= FM_PCD_KG;
  39611. + break;
  39612. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR):
  39613. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39614. + p_FmPort->pcdEngines |= FM_PCD_KG;
  39615. + p_FmPort->pcdEngines |= FM_PCD_CC;
  39616. + p_FmPort->pcdEngines |= FM_PCD_PLCR;
  39617. + break;
  39618. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC):
  39619. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39620. + p_FmPort->pcdEngines |= FM_PCD_CC;
  39621. + break;
  39622. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR):
  39623. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39624. + p_FmPort->pcdEngines |= FM_PCD_CC;
  39625. + p_FmPort->pcdEngines |= FM_PCD_PLCR;
  39626. + break;
  39627. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR):
  39628. + p_FmPort->pcdEngines |= FM_PCD_PRS;
  39629. + p_FmPort->pcdEngines |= FM_PCD_KG;
  39630. + p_FmPort->pcdEngines |= FM_PCD_PLCR;
  39631. + break;
  39632. + case (e_FM_PORT_PCD_SUPPORT_CC_ONLY):
  39633. + p_FmPort->pcdEngines |= FM_PCD_CC;
  39634. + break;
  39635. +#ifdef FM_CAPWAP_SUPPORT
  39636. + case (e_FM_PORT_PCD_SUPPORT_CC_AND_KG):
  39637. + p_FmPort->pcdEngines |= FM_PCD_CC;
  39638. + p_FmPort->pcdEngines |= FM_PCD_KG;
  39639. + break;
  39640. + case (e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR):
  39641. + p_FmPort->pcdEngines |= FM_PCD_CC;
  39642. + p_FmPort->pcdEngines |= FM_PCD_KG;
  39643. + p_FmPort->pcdEngines |= FM_PCD_PLCR;
  39644. + break;
  39645. +#endif /* FM_CAPWAP_SUPPORT */
  39646. +
  39647. + default:
  39648. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("invalid pcdSupport"));
  39649. + }
  39650. +
  39651. + if ((p_FmPort->pcdEngines & FM_PCD_PRS)
  39652. + && (p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams
  39653. + > FM_PCD_PRS_NUM_OF_HDRS))
  39654. + RETURN_ERROR(
  39655. + MAJOR,
  39656. + E_INVALID_VALUE,
  39657. + ("Port parser numOfHdrsWithAdditionalParams may not exceed %d", FM_PCD_PRS_NUM_OF_HDRS));
  39658. +
  39659. + /* check that parameters exist for each and only each defined engine */
  39660. + if ((!!(p_FmPort->pcdEngines & FM_PCD_PRS) != !!p_PcdParams->p_PrsParams)
  39661. + || (!!(p_FmPort->pcdEngines & FM_PCD_KG)
  39662. + != !!p_PcdParams->p_KgParams)
  39663. + || (!!(p_FmPort->pcdEngines & FM_PCD_CC)
  39664. + != !!p_PcdParams->p_CcParams))
  39665. + RETURN_ERROR(
  39666. + MAJOR,
  39667. + E_INVALID_STATE,
  39668. + ("PCD initialization structure is not consistent with pcdSupport"));
  39669. +
  39670. + /* get PCD registers pointers */
  39671. + switch (p_FmPort->portType)
  39672. + {
  39673. + case (e_FM_PORT_TYPE_RX_10G):
  39674. + case (e_FM_PORT_TYPE_RX):
  39675. + p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
  39676. + p_BmiPrsNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfpne;
  39677. + p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->rx.fmbm_rpso;
  39678. + p_BmiInitPrsResult = &p_FmPort->port.bmi_regs->rx.fmbm_rprai[0];
  39679. + p_BmiCcBase = &p_FmPort->port.bmi_regs->rx.fmbm_rccb;
  39680. + break;
  39681. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  39682. + p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
  39683. + p_BmiPrsNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofpne;
  39684. + p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->oh.fmbm_opso;
  39685. + p_BmiInitPrsResult = &p_FmPort->port.bmi_regs->oh.fmbm_oprai[0];
  39686. + p_BmiCcBase = &p_FmPort->port.bmi_regs->oh.fmbm_occb;
  39687. + break;
  39688. + default:
  39689. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  39690. + }
  39691. +
  39692. + /* set PCD port parameter */
  39693. + if (p_FmPort->pcdEngines & FM_PCD_CC)
  39694. + {
  39695. + err = FmPcdCcBindTree(p_FmPort->h_FmPcd, p_PcdParams,
  39696. + p_PcdParams->p_CcParams->h_CcTree,
  39697. + &ccTreePhysOffset, p_FmPort);
  39698. + if (err)
  39699. + RETURN_ERROR(MAJOR, err, NO_MSG);
  39700. +
  39701. + WRITE_UINT32(*p_BmiCcBase, ccTreePhysOffset);
  39702. + p_FmPort->ccTreeId = p_PcdParams->p_CcParams->h_CcTree;
  39703. + }
  39704. +
  39705. + if (p_FmPort->pcdEngines & FM_PCD_KG)
  39706. + {
  39707. + if (p_PcdParams->p_KgParams->numOfSchemes == 0)
  39708. + RETURN_ERROR(
  39709. + MAJOR,
  39710. + E_INVALID_VALUE,
  39711. + ("For ports using Keygen, at least one scheme must be bound. "));
  39712. +
  39713. + err = FmPcdKgSetOrBindToClsPlanGrp(p_FmPort->h_FmPcd,
  39714. + p_FmPort->hardwarePortId,
  39715. + p_FmPort->netEnvId,
  39716. + p_FmPort->optArray,
  39717. + &p_FmPort->clsPlanGrpId,
  39718. + &isEmptyClsPlanGrp);
  39719. + if (err)
  39720. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  39721. + ("FmPcdKgSetOrBindToClsPlanGrp failed. "));
  39722. +
  39723. + p_FmPort->useClsPlan = !isEmptyClsPlanGrp;
  39724. +
  39725. + schemeBind.netEnvId = p_FmPort->netEnvId;
  39726. + schemeBind.hardwarePortId = p_FmPort->hardwarePortId;
  39727. + schemeBind.numOfSchemes = p_PcdParams->p_KgParams->numOfSchemes;
  39728. + schemeBind.useClsPlan = p_FmPort->useClsPlan;
  39729. +
  39730. + /* for each scheme */
  39731. + for (i = 0; i < p_PcdParams->p_KgParams->numOfSchemes; i++)
  39732. + {
  39733. + ASSERT_COND(p_PcdParams->p_KgParams->h_Schemes[i]);
  39734. + physicalSchemeId = FmPcdKgGetSchemeId(
  39735. + p_PcdParams->p_KgParams->h_Schemes[i]);
  39736. + schemeBind.schemesIds[i] = physicalSchemeId;
  39737. + /* build vector */
  39738. + p_FmPort->schemesPerPortVector |= 1
  39739. + << (31 - (uint32_t)physicalSchemeId);
  39740. +#if (DPAA_VERSION >= 11)
  39741. + /*because of the state that VSPE is defined per port - all PCD path should be according to this requirement
  39742. + if !VSPE - in port, for relevant scheme VSPE can not be set*/
  39743. + if (!p_FmPort->vspe
  39744. + && FmPcdKgGetVspe((p_PcdParams->p_KgParams->h_Schemes[i])))
  39745. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  39746. + ("VSPE is not at port level"));
  39747. +#endif /* (DPAA_VERSION >= 11) */
  39748. + }
  39749. +
  39750. + err = FmPcdKgBindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
  39751. + if (err)
  39752. + RETURN_ERROR(MAJOR, err, NO_MSG);
  39753. + }
  39754. +
  39755. + /***************************/
  39756. + /* configure NIA after BMI */
  39757. + /***************************/
  39758. + /* rfne may contain FDCS bits, so first we read them. */
  39759. + p_FmPort->savedBmiNia = GET_UINT32(*p_BmiNia) & BMI_RFNE_FDCS_MASK;
  39760. +
  39761. + /* If policer is used directly after BMI or PRS */
  39762. + if ((p_FmPort->pcdEngines & FM_PCD_PLCR)
  39763. + && ((p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_PLCR_ONLY)
  39764. + || (p_PcdParams->pcdSupport
  39765. + == e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR)))
  39766. + {
  39767. + if (!p_PcdParams->p_PlcrParams->h_Profile)
  39768. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  39769. + ("Profile should be initialized"));
  39770. +
  39771. + absoluteProfileId = (uint16_t)FmPcdPlcrProfileGetAbsoluteId(
  39772. + p_PcdParams->p_PlcrParams->h_Profile);
  39773. +
  39774. + if (!FmPcdPlcrIsProfileValid(p_FmPort->h_FmPcd, absoluteProfileId))
  39775. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  39776. + ("Private port profile not valid."));
  39777. +
  39778. + tmpReg = (uint32_t)(absoluteProfileId | NIA_PLCR_ABSOLUTE);
  39779. +
  39780. + if (p_FmPort->pcdEngines & FM_PCD_PRS) /* e_FM_PCD_SUPPORT_PRS_AND_PLCR */
  39781. + /* update BMI HPNIA */
  39782. + WRITE_UINT32(*p_BmiPrsNia, (uint32_t)(NIA_ENG_PLCR | tmpReg));
  39783. + else
  39784. + /* e_FM_PCD_SUPPORT_PLCR_ONLY */
  39785. + /* update BMI NIA */
  39786. + p_FmPort->savedBmiNia |= (uint32_t)(NIA_ENG_PLCR);
  39787. + }
  39788. +
  39789. + /* if CC is used directly after BMI */
  39790. + if ((p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_CC_ONLY)
  39791. +#ifdef FM_CAPWAP_SUPPORT
  39792. + || (p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_CC_AND_KG)
  39793. + || (p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR)
  39794. +#endif /* FM_CAPWAP_SUPPORT */
  39795. + )
  39796. + {
  39797. + if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  39798. + RETURN_ERROR(
  39799. + MAJOR,
  39800. + E_INVALID_OPERATION,
  39801. + ("e_FM_PORT_PCD_SUPPORT_CC_xx available for offline parsing ports only"));
  39802. + p_FmPort->savedBmiNia |= (uint32_t)(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC);
  39803. + /* check that prs start offset == RIM[FOF] */
  39804. + }
  39805. +
  39806. + if (p_FmPort->pcdEngines & FM_PCD_PRS)
  39807. + {
  39808. + ASSERT_COND(p_PcdParams->p_PrsParams);
  39809. +#if (DPAA_VERSION >= 11)
  39810. + if (p_PcdParams->p_PrsParams->firstPrsHdr == HEADER_TYPE_CAPWAP)
  39811. + hdrNum = OFFLOAD_SW_PATCH_CAPWAP_LABEL;
  39812. + else
  39813. + {
  39814. +#endif /* (DPAA_VERSION >= 11) */
  39815. + /* if PRS is used it is always first */
  39816. + hdrNum = GetPrsHdrNum(p_PcdParams->p_PrsParams->firstPrsHdr);
  39817. + if (hdrNum == ILLEGAL_HDR_NUM)
  39818. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unsupported header."));
  39819. +#if (DPAA_VERSION >= 11)
  39820. + }
  39821. +#endif /* (DPAA_VERSION >= 11) */
  39822. + p_FmPort->savedBmiNia |= (uint32_t)(NIA_ENG_PRS | (uint32_t)(hdrNum));
  39823. + /* set after parser NIA */
  39824. + tmpReg = 0;
  39825. + switch (p_PcdParams->pcdSupport)
  39826. + {
  39827. + case (e_FM_PORT_PCD_SUPPORT_PRS_ONLY):
  39828. + WRITE_UINT32(*p_BmiPrsNia,
  39829. + GET_NIA_BMI_AC_ENQ_FRAME(p_FmPort->h_FmPcd));
  39830. + break;
  39831. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC):
  39832. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR):
  39833. + tmpReg = NIA_KG_CC_EN;
  39834. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG):
  39835. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR):
  39836. + if (p_PcdParams->p_KgParams->directScheme)
  39837. + {
  39838. + physicalSchemeId = FmPcdKgGetSchemeId(
  39839. + p_PcdParams->p_KgParams->h_DirectScheme);
  39840. + /* check that this scheme was bound to this port */
  39841. + for (i = 0; i < p_PcdParams->p_KgParams->numOfSchemes; i++)
  39842. + if (p_PcdParams->p_KgParams->h_DirectScheme
  39843. + == p_PcdParams->p_KgParams->h_Schemes[i])
  39844. + break;
  39845. + if (i == p_PcdParams->p_KgParams->numOfSchemes)
  39846. + RETURN_ERROR(
  39847. + MAJOR,
  39848. + E_INVALID_VALUE,
  39849. + ("Direct scheme is not one of the port selected schemes."));
  39850. + tmpReg |= (uint32_t)(NIA_KG_DIRECT | physicalSchemeId);
  39851. + }
  39852. + WRITE_UINT32(*p_BmiPrsNia, NIA_ENG_KG | tmpReg);
  39853. + break;
  39854. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC):
  39855. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR):
  39856. + WRITE_UINT32(*p_BmiPrsNia,
  39857. + (uint32_t)(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_CC));
  39858. + break;
  39859. + case (e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR):
  39860. + break;
  39861. + default:
  39862. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid PCD support"));
  39863. + }
  39864. +
  39865. + /* set start parsing offset */
  39866. + WRITE_UINT32(*p_BmiPrsStartOffset,
  39867. + p_PcdParams->p_PrsParams->parsingOffset);
  39868. +
  39869. + /************************************/
  39870. + /* Parser port parameters */
  39871. + /************************************/
  39872. + /* stop before configuring */
  39873. + WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pcac, PRS_CAC_STOP);
  39874. + /* wait for parser to be in idle state */
  39875. + while (GET_UINT32(p_FmPort->p_FmPortPrsRegs->pcac) & PRS_CAC_ACTIVE)
  39876. + ;
  39877. +
  39878. + /* set soft seq attachment register */
  39879. + memset(tmpHxs, 0, FM_PCD_PRS_NUM_OF_HDRS * sizeof(uint32_t));
  39880. +
  39881. + /* set protocol options */
  39882. + for (i = 0; p_FmPort->optArray[i]; i++)
  39883. + switch (p_FmPort->optArray[i])
  39884. + {
  39885. + case (ETH_BROADCAST):
  39886. + hdrNum = GetPrsHdrNum(HEADER_TYPE_ETH);
  39887. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_ETH_BC_SHIFT;
  39888. + break;
  39889. + case (ETH_MULTICAST):
  39890. + hdrNum = GetPrsHdrNum(HEADER_TYPE_ETH);
  39891. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_ETH_MC_SHIFT;
  39892. + break;
  39893. + case (VLAN_STACKED):
  39894. + hdrNum = GetPrsHdrNum(HEADER_TYPE_VLAN);
  39895. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_VLAN_STACKED_SHIFT;
  39896. + break;
  39897. + case (MPLS_STACKED):
  39898. + hdrNum = GetPrsHdrNum(HEADER_TYPE_MPLS);
  39899. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_MPLS_STACKED_SHIFT;
  39900. + break;
  39901. + case (IPV4_BROADCAST_1):
  39902. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
  39903. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_1_BC_SHIFT;
  39904. + break;
  39905. + case (IPV4_MULTICAST_1):
  39906. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
  39907. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_1_MC_SHIFT;
  39908. + break;
  39909. + case (IPV4_UNICAST_2):
  39910. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
  39911. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_2_UC_SHIFT;
  39912. + break;
  39913. + case (IPV4_MULTICAST_BROADCAST_2):
  39914. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
  39915. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV4_2_MC_BC_SHIFT;
  39916. + break;
  39917. + case (IPV6_MULTICAST_1):
  39918. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  39919. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV6_1_MC_SHIFT;
  39920. + break;
  39921. + case (IPV6_UNICAST_2):
  39922. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  39923. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV6_2_UC_SHIFT;
  39924. + break;
  39925. + case (IPV6_MULTICAST_2):
  39926. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  39927. + tmpHxs[hdrNum] |= (i + 1) << PRS_HDR_IPV6_2_MC_SHIFT;
  39928. + break;
  39929. + }
  39930. +
  39931. + if (FmPcdNetEnvIsHdrExist(p_FmPort->h_FmPcd, p_FmPort->netEnvId,
  39932. + HEADER_TYPE_UDP_ENCAP_ESP))
  39933. + {
  39934. + if (p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams == FM_PCD_PRS_NUM_OF_HDRS)
  39935. + RETURN_ERROR(
  39936. + MINOR, E_INVALID_VALUE,
  39937. + ("If HEADER_TYPE_UDP_ENCAP_ESP is used, numOfHdrsWithAdditionalParams may be up to FM_PCD_PRS_NUM_OF_HDRS - 1"));
  39938. +
  39939. + p_PcdParams->p_PrsParams->additionalParams[p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams].hdr =
  39940. + HEADER_TYPE_UDP;
  39941. + p_PcdParams->p_PrsParams->additionalParams[p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams].swPrsEnable =
  39942. + TRUE;
  39943. + p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams++;
  39944. + }
  39945. +
  39946. + /* set MPLS default next header - HW reset workaround */
  39947. + hdrNum = GetPrsHdrNum(HEADER_TYPE_MPLS);
  39948. + tmpHxs[hdrNum] |= PRS_HDR_MPLS_LBL_INTER_EN;
  39949. + L3HdrNum = GetPrsHdrNum(HEADER_TYPE_USER_DEFINED_L3);
  39950. + tmpHxs[hdrNum] |= (uint32_t)L3HdrNum << PRS_HDR_MPLS_NEXT_HDR_SHIFT;
  39951. +
  39952. + /* for GRE, disable errors */
  39953. + greHdrNum = GetPrsHdrNum(HEADER_TYPE_GRE);
  39954. + tmpHxs[greHdrNum] |= PRS_HDR_ERROR_DIS;
  39955. +
  39956. + /* For UDP remove PAD from L4 checksum calculation */
  39957. + hdrNum = GetPrsHdrNum(HEADER_TYPE_UDP);
  39958. + tmpHxs[hdrNum] |= PRS_HDR_UDP_PAD_REMOVAL;
  39959. + /* For TCP remove PAD from L4 checksum calculation */
  39960. + hdrNum = GetPrsHdrNum(HEADER_TYPE_TCP);
  39961. + tmpHxs[hdrNum] |= PRS_HDR_TCP_PAD_REMOVAL;
  39962. +
  39963. + /* config additional params for specific headers */
  39964. + for (i = 0; i < p_PcdParams->p_PrsParams->numOfHdrsWithAdditionalParams;
  39965. + i++)
  39966. + {
  39967. + /* case for using sw parser as the initial NIA address, before
  39968. + * HW parsing
  39969. + */
  39970. + if ((p_PcdParams->p_PrsParams->additionalParams[i].hdr == HEADER_TYPE_NONE) &&
  39971. + p_PcdParams->p_PrsParams->additionalParams[i].swPrsEnable)
  39972. + {
  39973. + initialSwPrs = FmPcdGetSwPrsOffset(p_FmPort->h_FmPcd, HEADER_TYPE_NONE,
  39974. + p_PcdParams->p_PrsParams->additionalParams[i].indexPerHdr);
  39975. + if (initialSwPrs == ILLEGAL_BASE)
  39976. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  39977. +
  39978. + /* clear parser first HXS */
  39979. + p_FmPort->savedBmiNia &= ~BMI_RFNE_HXS_MASK; /* 0x000000FF */
  39980. + /* rewrite with soft parser start */
  39981. + p_FmPort->savedBmiNia |= initialSwPrs;
  39982. + continue;
  39983. + }
  39984. +
  39985. + hdrNum =
  39986. + GetPrsHdrNum(p_PcdParams->p_PrsParams->additionalParams[i].hdr);
  39987. + if (hdrNum == ILLEGAL_HDR_NUM)
  39988. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  39989. + if (hdrNum == NO_HDR_NUM)
  39990. + RETURN_ERROR(
  39991. + MAJOR, E_INVALID_VALUE,
  39992. + ("Private headers may not use additional parameters"));
  39993. +
  39994. + err = AdditionalPrsParams(
  39995. + p_FmPort, &p_PcdParams->p_PrsParams->additionalParams[i],
  39996. + &tmpHxs[hdrNum]);
  39997. + if (err)
  39998. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  39999. + }
  40000. +
  40001. + /* Check if ip-reassembly port - need to link sw-parser code */
  40002. + if (p_FmPort->h_IpReassemblyManip)
  40003. + {
  40004. + /* link to sw parser code for IP Frag - only if no other code is applied. */
  40005. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv4);
  40006. + if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
  40007. + tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv4_IPR_LABEL);
  40008. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  40009. + if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
  40010. + tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPR_LABEL);
  40011. + } else {
  40012. + if (FmPcdNetEnvIsHdrExist(p_FmPort->h_FmPcd, p_FmPort->netEnvId, HEADER_TYPE_UDP_LITE))
  40013. + {
  40014. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  40015. + if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
  40016. + tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPF_LABEL);
  40017. + } else if ((FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd)
  40018. + && (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)))
  40019. + {
  40020. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  40021. + if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
  40022. + tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPF_LABEL);
  40023. + }
  40024. + }
  40025. +
  40026. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  40027. + if (FmPcdNetEnvIsHdrExist(p_FmPort->h_FmPcd, p_FmPort->netEnvId,
  40028. + HEADER_TYPE_UDP_LITE))
  40029. + {
  40030. + /* link to sw parser code for udp lite - only if no other code is applied. */
  40031. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  40032. + if (!(tmpHxs[hdrNum] & PRS_HDR_SW_PRS_EN))
  40033. + tmpHxs[hdrNum] |= (PRS_HDR_SW_PRS_EN | UDP_LITE_SW_PATCH_LABEL);
  40034. + }
  40035. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  40036. + for (i = 0; i < FM_PCD_PRS_NUM_OF_HDRS; i++)
  40037. + {
  40038. + /* For all header set LCV as taken from netEnv*/
  40039. + WRITE_UINT32(
  40040. + p_FmPort->p_FmPortPrsRegs->hdrs[i].lcv,
  40041. + FmPcdGetLcv(p_FmPort->h_FmPcd, p_FmPort->netEnvId, (uint8_t)i));
  40042. + /* set HXS register according to default+Additional params+protocol options */
  40043. + WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->hdrs[i].softSeqAttach,
  40044. + tmpHxs[i]);
  40045. + }
  40046. +
  40047. + /* set tpid. */
  40048. + tmpReg = PRS_TPID_DFLT;
  40049. + if (p_PcdParams->p_PrsParams->setVlanTpid1)
  40050. + {
  40051. + tmpReg &= PRS_TPID2_MASK;
  40052. + tmpReg |= (uint32_t)p_PcdParams->p_PrsParams->vlanTpid1
  40053. + << PRS_PCTPID_SHIFT;
  40054. + }
  40055. + if (p_PcdParams->p_PrsParams->setVlanTpid2)
  40056. + {
  40057. + tmpReg &= PRS_TPID1_MASK;
  40058. + tmpReg |= (uint32_t)p_PcdParams->p_PrsParams->vlanTpid2;
  40059. + }WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pctpid, tmpReg);
  40060. +
  40061. + /* enable parser */
  40062. + WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pcac, 0);
  40063. +
  40064. + if (p_PcdParams->p_PrsParams->prsResultPrivateInfo)
  40065. + p_FmPort->privateInfo =
  40066. + p_PcdParams->p_PrsParams->prsResultPrivateInfo;
  40067. +
  40068. + } /* end parser */
  40069. + else {
  40070. + if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd)
  40071. + && (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  40072. + {
  40073. + hdrNum = GetPrsHdrNum(HEADER_TYPE_IPv6);
  40074. + WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->hdrs[hdrNum].softSeqAttach,
  40075. + (PRS_HDR_SW_PRS_EN | OFFLOAD_SW_PATCH_IPv6_IPF_LABEL));
  40076. + }
  40077. +
  40078. + WRITE_UINT32(*p_BmiPrsStartOffset, 0);
  40079. +
  40080. + p_FmPort->privateInfo = 0;
  40081. + }
  40082. +
  40083. + FmPortCheckNApplyMacsec(p_FmPort);
  40084. +
  40085. + WRITE_UINT32(
  40086. + *p_BmiPrsStartOffset,
  40087. + GET_UINT32(*p_BmiPrsStartOffset) + p_FmPort->internalBufferOffset);
  40088. +
  40089. + /* set initial parser result - used for all engines */
  40090. + for (i = 0; i < FM_PORT_PRS_RESULT_NUM_OF_WORDS; i++)
  40091. + {
  40092. + if (!i)
  40093. + WRITE_UINT32(
  40094. + *(p_BmiInitPrsResult),
  40095. + (uint32_t)(((uint32_t)p_FmPort->privateInfo << BMI_PR_PORTID_SHIFT) | BMI_PRS_RESULT_HIGH));
  40096. + else
  40097. + {
  40098. + if (i < FM_PORT_PRS_RESULT_NUM_OF_WORDS / 2)
  40099. + WRITE_UINT32(*(p_BmiInitPrsResult+i), BMI_PRS_RESULT_HIGH);
  40100. + else
  40101. + WRITE_UINT32(*(p_BmiInitPrsResult+i), BMI_PRS_RESULT_LOW);
  40102. + }
  40103. + }
  40104. +
  40105. + return E_OK;
  40106. +}
  40107. +
  40108. +static t_Error DeletePcd(t_FmPort *p_FmPort)
  40109. +{
  40110. + t_Error err = E_OK;
  40111. + volatile uint32_t *p_BmiNia = NULL;
  40112. + volatile uint32_t *p_BmiPrsStartOffset = NULL;
  40113. +
  40114. + ASSERT_COND(p_FmPort);
  40115. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  40116. +
  40117. + if (p_FmPort->imEn)
  40118. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  40119. + ("available for non-independant mode ports only"));
  40120. +
  40121. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  40122. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  40123. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  40124. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  40125. + ("available for Rx and offline parsing ports only"));
  40126. +
  40127. + if (!p_FmPort->pcdEngines)
  40128. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("called for non PCD port"));
  40129. +
  40130. + /* get PCD registers pointers */
  40131. + switch (p_FmPort->portType)
  40132. + {
  40133. + case (e_FM_PORT_TYPE_RX_10G):
  40134. + case (e_FM_PORT_TYPE_RX):
  40135. + p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
  40136. + p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->rx.fmbm_rpso;
  40137. + break;
  40138. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  40139. + p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
  40140. + p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->oh.fmbm_opso;
  40141. + break;
  40142. + default:
  40143. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  40144. + }
  40145. +
  40146. + if ((GET_UINT32(*p_BmiNia) & GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME())
  40147. + != GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME())
  40148. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  40149. + ("port has to be detached previousely"));
  40150. +
  40151. + WRITE_UINT32(*p_BmiPrsStartOffset, 0);
  40152. +
  40153. + /* "cut" PCD out of the port's flow - go to BMI */
  40154. + /* WRITE_UINT32(*p_BmiNia, (p_FmPort->savedBmiNia & BMI_RFNE_FDCS_MASK) | (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)); */
  40155. +
  40156. + if (p_FmPort->pcdEngines & FM_PCD_PRS)
  40157. + {
  40158. + /* stop parser */
  40159. + WRITE_UINT32(p_FmPort->p_FmPortPrsRegs->pcac, PRS_CAC_STOP);
  40160. + /* wait for parser to be in idle state */
  40161. + while (GET_UINT32(p_FmPort->p_FmPortPrsRegs->pcac) & PRS_CAC_ACTIVE)
  40162. + ;
  40163. + }
  40164. +
  40165. + if (p_FmPort->pcdEngines & FM_PCD_KG)
  40166. + {
  40167. + t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
  40168. +
  40169. + /* unbind all schemes */
  40170. + p_FmPort->schemesPerPortVector = GetPortSchemeBindParams(p_FmPort,
  40171. + &schemeBind);
  40172. +
  40173. + err = FmPcdKgUnbindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
  40174. + if (err)
  40175. + RETURN_ERROR(MAJOR, err, NO_MSG);
  40176. +
  40177. + err = FmPcdKgDeleteOrUnbindPortToClsPlanGrp(p_FmPort->h_FmPcd,
  40178. + p_FmPort->hardwarePortId,
  40179. + p_FmPort->clsPlanGrpId);
  40180. + if (err)
  40181. + RETURN_ERROR(MAJOR, err, NO_MSG);
  40182. + p_FmPort->useClsPlan = FALSE;
  40183. + }
  40184. +
  40185. + if (p_FmPort->pcdEngines & FM_PCD_CC)
  40186. + {
  40187. + /* unbind - we need to get the treeId too */
  40188. + err = FmPcdCcUnbindTree(p_FmPort->h_FmPcd, p_FmPort->ccTreeId);
  40189. + if (err)
  40190. + RETURN_ERROR(MAJOR, err, NO_MSG);
  40191. + }
  40192. +
  40193. + p_FmPort->pcdEngines = 0;
  40194. +
  40195. + return E_OK;
  40196. +}
  40197. +
  40198. +static t_Error AttachPCD(t_FmPort *p_FmPort)
  40199. +{
  40200. + volatile uint32_t *p_BmiNia = NULL;
  40201. +
  40202. + ASSERT_COND(p_FmPort);
  40203. +
  40204. + /* get PCD registers pointers */
  40205. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40206. + p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
  40207. + else
  40208. + p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
  40209. +
  40210. + /* check that current NIA is BMI to BMI */
  40211. + if ((GET_UINT32(*p_BmiNia) & ~BMI_RFNE_FDCS_MASK)
  40212. + != GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME())
  40213. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  40214. + ("may be called only for ports in BMI-to-BMI state."));
  40215. +
  40216. + if (p_FmPort->requiredAction & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY)
  40217. + if (FmSetNumOfRiscsPerPort(p_FmPort->h_Fm, p_FmPort->hardwarePortId, 1,
  40218. + p_FmPort->orFmanCtrl) != E_OK)
  40219. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  40220. +
  40221. + if (p_FmPort->requiredAction & UPDATE_NIA_CMNE)
  40222. + {
  40223. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40224. + WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ocmne,
  40225. + p_FmPort->savedBmiCmne);
  40226. + else
  40227. + WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rcmne,
  40228. + p_FmPort->savedBmiCmne);
  40229. + }
  40230. +
  40231. + if (p_FmPort->requiredAction & UPDATE_NIA_PNEN)
  40232. + WRITE_UINT32(p_FmPort->p_FmPortQmiRegs->fmqm_pnen,
  40233. + p_FmPort->savedQmiPnen);
  40234. +
  40235. + if (p_FmPort->requiredAction & UPDATE_NIA_FENE)
  40236. + {
  40237. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40238. + WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofene,
  40239. + p_FmPort->savedBmiFene);
  40240. + else
  40241. + WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfene,
  40242. + p_FmPort->savedBmiFene);
  40243. + }
  40244. +
  40245. + if (p_FmPort->requiredAction & UPDATE_NIA_FPNE)
  40246. + {
  40247. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40248. + WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofpne,
  40249. + p_FmPort->savedBmiFpne);
  40250. + else
  40251. + WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfpne,
  40252. + p_FmPort->savedBmiFpne);
  40253. + }
  40254. +
  40255. + if (p_FmPort->requiredAction & UPDATE_OFP_DPTE)
  40256. + {
  40257. + ASSERT_COND(p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING);
  40258. +
  40259. + WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofp,
  40260. + p_FmPort->savedBmiOfp);
  40261. + }
  40262. +
  40263. + WRITE_UINT32(*p_BmiNia, p_FmPort->savedBmiNia);
  40264. +
  40265. + if (p_FmPort->requiredAction & UPDATE_NIA_PNDN)
  40266. + {
  40267. + p_FmPort->origNonRxQmiRegsPndn =
  40268. + GET_UINT32(p_FmPort->port.qmi_regs->fmqm_pndn);
  40269. + WRITE_UINT32(p_FmPort->port.qmi_regs->fmqm_pndn,
  40270. + p_FmPort->savedNonRxQmiRegsPndn);
  40271. + }
  40272. +
  40273. + return E_OK;
  40274. +}
  40275. +
  40276. +static t_Error DetachPCD(t_FmPort *p_FmPort)
  40277. +{
  40278. + volatile uint32_t *p_BmiNia = NULL;
  40279. +
  40280. + ASSERT_COND(p_FmPort);
  40281. +
  40282. + /* get PCD registers pointers */
  40283. + if (p_FmPort->requiredAction & UPDATE_NIA_PNDN)
  40284. + WRITE_UINT32(p_FmPort->port.qmi_regs->fmqm_pndn,
  40285. + p_FmPort->origNonRxQmiRegsPndn);
  40286. +
  40287. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40288. + p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
  40289. + else
  40290. + p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
  40291. +
  40292. + WRITE_UINT32(
  40293. + *p_BmiNia,
  40294. + (p_FmPort->savedBmiNia & BMI_RFNE_FDCS_MASK) | GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME());
  40295. +
  40296. + if (FmPcdGetHcHandle(p_FmPort->h_FmPcd))
  40297. + FmPcdHcSync(p_FmPort->h_FmPcd);
  40298. +
  40299. + if (p_FmPort->requiredAction & UPDATE_NIA_FENE)
  40300. + {
  40301. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40302. + WRITE_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofene,
  40303. + NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR);
  40304. + else
  40305. + WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfene,
  40306. + NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR);
  40307. + }
  40308. +
  40309. + if (p_FmPort->requiredAction & UPDATE_NIA_PNEN)
  40310. + WRITE_UINT32(p_FmPort->port.qmi_regs->fmqm_pnen,
  40311. + NIA_ENG_BMI | NIA_BMI_AC_RELEASE);
  40312. +
  40313. + if (p_FmPort->requiredAction & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY)
  40314. + if (FmSetNumOfRiscsPerPort(p_FmPort->h_Fm, p_FmPort->hardwarePortId, 2,
  40315. + p_FmPort->orFmanCtrl) != E_OK)
  40316. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  40317. +
  40318. + p_FmPort->requiredAction = 0;
  40319. +
  40320. + return E_OK;
  40321. +}
  40322. +
  40323. +/*****************************************************************************/
  40324. +/* Inter-module API routines */
  40325. +/*****************************************************************************/
  40326. +void FmPortSetMacsecCmd(t_Handle h_FmPort, uint8_t dfltSci)
  40327. +{
  40328. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  40329. + volatile uint32_t *p_BmiCfgReg = NULL;
  40330. + uint32_t tmpReg;
  40331. +
  40332. + SANITY_CHECK_RETURN(p_FmPort, E_INVALID_HANDLE);
  40333. + SANITY_CHECK_RETURN(p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  40334. +
  40335. + if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
  40336. + && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
  40337. + {
  40338. + REPORT_ERROR(MAJOR, E_INVALID_OPERATION, ("The routine is relevant for Tx ports only"));
  40339. + return;
  40340. + }
  40341. +
  40342. + p_BmiCfgReg = &p_FmPort->port.bmi_regs->tx.fmbm_tfca;
  40343. + tmpReg = GET_UINT32(*p_BmiCfgReg) & ~BMI_CMD_ATTR_MACCMD_MASK;
  40344. + tmpReg |= BMI_CMD_ATTR_MACCMD_SECURED;
  40345. + tmpReg |= (((uint32_t)dfltSci << BMI_CMD_ATTR_MACCMD_SC_SHIFT)
  40346. + & BMI_CMD_ATTR_MACCMD_SC_MASK);
  40347. +
  40348. + WRITE_UINT32(*p_BmiCfgReg, tmpReg);
  40349. +}
  40350. +
  40351. +uint8_t FmPortGetNetEnvId(t_Handle h_FmPort)
  40352. +{
  40353. + return ((t_FmPort*)h_FmPort)->netEnvId;
  40354. +}
  40355. +
  40356. +uint8_t FmPortGetHardwarePortId(t_Handle h_FmPort)
  40357. +{
  40358. + return ((t_FmPort*)h_FmPort)->hardwarePortId;
  40359. +}
  40360. +
  40361. +uint32_t FmPortGetPcdEngines(t_Handle h_FmPort)
  40362. +{
  40363. + return ((t_FmPort*)h_FmPort)->pcdEngines;
  40364. +}
  40365. +
  40366. +#if (DPAA_VERSION >= 11)
  40367. +t_Error FmPortSetGprFunc(t_Handle h_FmPort, e_FmPortGprFuncType gprFunc,
  40368. + void **p_Value)
  40369. +{
  40370. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  40371. + uint32_t muramPageOffset;
  40372. +
  40373. + ASSERT_COND(p_FmPort);
  40374. + ASSERT_COND(p_Value);
  40375. +
  40376. + if (p_FmPort->gprFunc != e_FM_PORT_GPR_EMPTY)
  40377. + {
  40378. + if (p_FmPort->gprFunc != gprFunc)
  40379. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  40380. + ("gpr was assigned with different func"));
  40381. + }
  40382. + else
  40383. + {
  40384. + switch (gprFunc)
  40385. + {
  40386. + case (e_FM_PORT_GPR_MURAM_PAGE):
  40387. + p_FmPort->p_ParamsPage = FM_MURAM_AllocMem(p_FmPort->h_FmMuram,
  40388. + 256, 8);
  40389. + if (!p_FmPort->p_ParamsPage)
  40390. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for page"));
  40391. +
  40392. + IOMemSet32(p_FmPort->p_ParamsPage, 0, 256);
  40393. + muramPageOffset =
  40394. + (uint32_t)(XX_VirtToPhys(p_FmPort->p_ParamsPage)
  40395. + - p_FmPort->fmMuramPhysBaseAddr);
  40396. + switch (p_FmPort->portType)
  40397. + {
  40398. + case (e_FM_PORT_TYPE_RX_10G):
  40399. + case (e_FM_PORT_TYPE_RX):
  40400. + WRITE_UINT32(
  40401. + p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr,
  40402. + muramPageOffset);
  40403. + break;
  40404. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  40405. + WRITE_UINT32(
  40406. + p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ogpr,
  40407. + muramPageOffset);
  40408. + break;
  40409. + default:
  40410. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  40411. + ("Invalid port type"));
  40412. + }
  40413. + break;
  40414. + default:
  40415. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  40416. + }
  40417. + p_FmPort->gprFunc = gprFunc;
  40418. + }
  40419. +
  40420. + switch (p_FmPort->gprFunc)
  40421. + {
  40422. + case (e_FM_PORT_GPR_MURAM_PAGE):
  40423. + *p_Value = p_FmPort->p_ParamsPage;
  40424. + break;
  40425. + default:
  40426. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, NO_MSG);
  40427. + }
  40428. +
  40429. + return E_OK;
  40430. +}
  40431. +#endif /* (DPAA_VERSION >= 11) */
  40432. +
  40433. +t_Error FmPortGetSetCcParams(t_Handle h_FmPort,
  40434. + t_FmPortGetSetCcParams *p_CcParams)
  40435. +{
  40436. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  40437. + int tmpInt;
  40438. + volatile uint32_t *p_BmiPrsStartOffset = NULL;
  40439. +
  40440. + /* this function called from Cc for pass and receive parameters port params between CC and PORT*/
  40441. +
  40442. + if ((p_CcParams->getCcParams.type & OFFSET_OF_PR)
  40443. + && (p_FmPort->bufferOffsets.prsResultOffset != ILLEGAL_BASE))
  40444. + {
  40445. + p_CcParams->getCcParams.prOffset =
  40446. + (uint8_t)p_FmPort->bufferOffsets.prsResultOffset;
  40447. + p_CcParams->getCcParams.type &= ~OFFSET_OF_PR;
  40448. + }
  40449. + if (p_CcParams->getCcParams.type & HW_PORT_ID)
  40450. + {
  40451. + p_CcParams->getCcParams.hardwarePortId =
  40452. + (uint8_t)p_FmPort->hardwarePortId;
  40453. + p_CcParams->getCcParams.type &= ~HW_PORT_ID;
  40454. + }
  40455. + if ((p_CcParams->getCcParams.type & OFFSET_OF_DATA)
  40456. + && (p_FmPort->bufferOffsets.dataOffset != ILLEGAL_BASE))
  40457. + {
  40458. + p_CcParams->getCcParams.dataOffset =
  40459. + (uint16_t)p_FmPort->bufferOffsets.dataOffset;
  40460. + p_CcParams->getCcParams.type &= ~OFFSET_OF_DATA;
  40461. + }
  40462. + if (p_CcParams->getCcParams.type & NUM_OF_TASKS)
  40463. + {
  40464. + p_CcParams->getCcParams.numOfTasks = (uint8_t)p_FmPort->tasks.num;
  40465. + p_CcParams->getCcParams.type &= ~NUM_OF_TASKS;
  40466. + }
  40467. + if (p_CcParams->getCcParams.type & NUM_OF_EXTRA_TASKS)
  40468. + {
  40469. + p_CcParams->getCcParams.numOfExtraTasks =
  40470. + (uint8_t)p_FmPort->tasks.extra;
  40471. + p_CcParams->getCcParams.type &= ~NUM_OF_EXTRA_TASKS;
  40472. + }
  40473. + if (p_CcParams->getCcParams.type & FM_REV)
  40474. + {
  40475. + p_CcParams->getCcParams.revInfo.majorRev = p_FmPort->fmRevInfo.majorRev;
  40476. + p_CcParams->getCcParams.revInfo.minorRev = p_FmPort->fmRevInfo.minorRev;
  40477. + p_CcParams->getCcParams.type &= ~FM_REV;
  40478. + }
  40479. + if (p_CcParams->getCcParams.type & DISCARD_MASK)
  40480. + {
  40481. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40482. + p_CcParams->getCcParams.discardMask =
  40483. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm);
  40484. + else
  40485. + p_CcParams->getCcParams.discardMask =
  40486. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm);
  40487. + p_CcParams->getCcParams.type &= ~DISCARD_MASK;
  40488. + }
  40489. + if (p_CcParams->getCcParams.type & MANIP_EXTRA_SPACE)
  40490. + {
  40491. + p_CcParams->getCcParams.internalBufferOffset =
  40492. + p_FmPort->internalBufferOffset;
  40493. + p_CcParams->getCcParams.type &= ~MANIP_EXTRA_SPACE;
  40494. + }
  40495. + if (p_CcParams->getCcParams.type & GET_NIA_FPNE)
  40496. + {
  40497. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40498. + p_CcParams->getCcParams.nia =
  40499. + GET_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofpne);
  40500. + else
  40501. + p_CcParams->getCcParams.nia =
  40502. + GET_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rfpne);
  40503. + p_CcParams->getCcParams.type &= ~GET_NIA_FPNE;
  40504. + }
  40505. + if (p_CcParams->getCcParams.type & GET_NIA_PNDN)
  40506. + {
  40507. + if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40508. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  40509. + p_CcParams->getCcParams.nia =
  40510. + GET_UINT32(p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs.fmqm_pndn);
  40511. + p_CcParams->getCcParams.type &= ~GET_NIA_PNDN;
  40512. + }
  40513. +
  40514. + if ((p_CcParams->setCcParams.type & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY)
  40515. + && !(p_FmPort->requiredAction & UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY))
  40516. + {
  40517. + p_FmPort->requiredAction |= UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY;
  40518. + p_FmPort->orFmanCtrl = p_CcParams->setCcParams.orFmanCtrl;
  40519. + }
  40520. +
  40521. + if ((p_CcParams->setCcParams.type & UPDATE_NIA_PNEN)
  40522. + && !(p_FmPort->requiredAction & UPDATE_NIA_PNEN))
  40523. + {
  40524. + p_FmPort->savedQmiPnen = p_CcParams->setCcParams.nia;
  40525. + p_FmPort->requiredAction |= UPDATE_NIA_PNEN;
  40526. + }
  40527. + else
  40528. + if (p_CcParams->setCcParams.type & UPDATE_NIA_PNEN)
  40529. + {
  40530. + if (p_FmPort->savedQmiPnen != p_CcParams->setCcParams.nia)
  40531. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  40532. + ("PNEN was defined previously different"));
  40533. + }
  40534. +
  40535. + if ((p_CcParams->setCcParams.type & UPDATE_NIA_PNDN)
  40536. + && !(p_FmPort->requiredAction & UPDATE_NIA_PNDN))
  40537. + {
  40538. + p_FmPort->savedNonRxQmiRegsPndn = p_CcParams->setCcParams.nia;
  40539. + p_FmPort->requiredAction |= UPDATE_NIA_PNDN;
  40540. + }
  40541. + else
  40542. + if (p_CcParams->setCcParams.type & UPDATE_NIA_PNDN)
  40543. + {
  40544. + if (p_FmPort->savedNonRxQmiRegsPndn != p_CcParams->setCcParams.nia)
  40545. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  40546. + ("PNDN was defined previously different"));
  40547. + }
  40548. +
  40549. + if ((p_CcParams->setCcParams.type & UPDATE_NIA_FENE)
  40550. + && (p_CcParams->setCcParams.overwrite
  40551. + || !(p_FmPort->requiredAction & UPDATE_NIA_FENE)))
  40552. + {
  40553. + p_FmPort->savedBmiFene = p_CcParams->setCcParams.nia;
  40554. + p_FmPort->requiredAction |= UPDATE_NIA_FENE;
  40555. + }
  40556. + else
  40557. + if (p_CcParams->setCcParams.type & UPDATE_NIA_FENE)
  40558. + {
  40559. + if (p_FmPort->savedBmiFene != p_CcParams->setCcParams.nia)
  40560. + RETURN_ERROR( MAJOR, E_INVALID_STATE,
  40561. + ("xFENE was defined previously different"));
  40562. + }
  40563. +
  40564. + if ((p_CcParams->setCcParams.type & UPDATE_NIA_FPNE)
  40565. + && !(p_FmPort->requiredAction & UPDATE_NIA_FPNE))
  40566. + {
  40567. + p_FmPort->savedBmiFpne = p_CcParams->setCcParams.nia;
  40568. + p_FmPort->requiredAction |= UPDATE_NIA_FPNE;
  40569. + }
  40570. + else
  40571. + if (p_CcParams->setCcParams.type & UPDATE_NIA_FPNE)
  40572. + {
  40573. + if (p_FmPort->savedBmiFpne != p_CcParams->setCcParams.nia)
  40574. + RETURN_ERROR( MAJOR, E_INVALID_STATE,
  40575. + ("xFPNE was defined previously different"));
  40576. + }
  40577. +
  40578. + if ((p_CcParams->setCcParams.type & UPDATE_NIA_CMNE)
  40579. + && !(p_FmPort->requiredAction & UPDATE_NIA_CMNE))
  40580. + {
  40581. + p_FmPort->savedBmiCmne = p_CcParams->setCcParams.nia;
  40582. + p_FmPort->requiredAction |= UPDATE_NIA_CMNE;
  40583. + }
  40584. + else
  40585. + if (p_CcParams->setCcParams.type & UPDATE_NIA_CMNE)
  40586. + {
  40587. + if (p_FmPort->savedBmiCmne != p_CcParams->setCcParams.nia)
  40588. + RETURN_ERROR( MAJOR, E_INVALID_STATE,
  40589. + ("xCMNE was defined previously different"));
  40590. + }
  40591. +
  40592. + if ((p_CcParams->setCcParams.type & UPDATE_PSO)
  40593. + && !(p_FmPort->requiredAction & UPDATE_PSO))
  40594. + {
  40595. + /* get PCD registers pointers */
  40596. + switch (p_FmPort->portType)
  40597. + {
  40598. + case (e_FM_PORT_TYPE_RX_10G):
  40599. + case (e_FM_PORT_TYPE_RX):
  40600. + p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->rx.fmbm_rpso;
  40601. + break;
  40602. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  40603. + p_BmiPrsStartOffset = &p_FmPort->port.bmi_regs->oh.fmbm_opso;
  40604. + break;
  40605. + default:
  40606. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  40607. + }
  40608. +
  40609. + /* set start parsing offset */
  40610. + tmpInt = (int)GET_UINT32(*p_BmiPrsStartOffset)
  40611. + + p_CcParams->setCcParams.psoSize;
  40612. + if (tmpInt > 0)
  40613. + WRITE_UINT32(*p_BmiPrsStartOffset, (uint32_t)tmpInt);
  40614. +
  40615. + p_FmPort->requiredAction |= UPDATE_PSO;
  40616. + p_FmPort->savedPrsStartOffset = p_CcParams->setCcParams.psoSize;
  40617. + }
  40618. + else
  40619. + if (p_CcParams->setCcParams.type & UPDATE_PSO)
  40620. + {
  40621. + if (p_FmPort->savedPrsStartOffset
  40622. + != p_CcParams->setCcParams.psoSize)
  40623. + RETURN_ERROR(
  40624. + MAJOR,
  40625. + E_INVALID_STATE,
  40626. + ("parser start offset was defoned previousley different"));
  40627. + }
  40628. +
  40629. + if ((p_CcParams->setCcParams.type & UPDATE_OFP_DPTE)
  40630. + && !(p_FmPort->requiredAction & UPDATE_OFP_DPTE))
  40631. + {
  40632. + if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40633. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  40634. + p_FmPort->savedBmiOfp = GET_UINT32(p_FmPort->port.bmi_regs->oh.fmbm_ofp);
  40635. + p_FmPort->savedBmiOfp &= ~BMI_FIFO_PIPELINE_DEPTH_MASK;
  40636. + p_FmPort->savedBmiOfp |= p_CcParams->setCcParams.ofpDpde
  40637. + << BMI_FIFO_PIPELINE_DEPTH_SHIFT;
  40638. + p_FmPort->requiredAction |= UPDATE_OFP_DPTE;
  40639. + }
  40640. +
  40641. + return E_OK;
  40642. +}
  40643. +/*********************** End of inter-module routines ************************/
  40644. +
  40645. +/****************************************/
  40646. +/* API Init unit functions */
  40647. +/****************************************/
  40648. +
  40649. +t_Handle FM_PORT_Config(t_FmPortParams *p_FmPortParams)
  40650. +{
  40651. + t_FmPort *p_FmPort;
  40652. + uintptr_t baseAddr = p_FmPortParams->baseAddr;
  40653. + uint32_t tmpReg;
  40654. +
  40655. + /* Allocate FM structure */
  40656. + p_FmPort = (t_FmPort *)XX_Malloc(sizeof(t_FmPort));
  40657. + if (!p_FmPort)
  40658. + {
  40659. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Port driver structure"));
  40660. + return NULL;
  40661. + }
  40662. + memset(p_FmPort, 0, sizeof(t_FmPort));
  40663. +
  40664. + /* Allocate the FM driver's parameters structure */
  40665. + p_FmPort->p_FmPortDriverParam = (t_FmPortDriverParam *)XX_Malloc(
  40666. + sizeof(t_FmPortDriverParam));
  40667. + if (!p_FmPort->p_FmPortDriverParam)
  40668. + {
  40669. + XX_Free(p_FmPort);
  40670. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Port driver parameters"));
  40671. + return NULL;
  40672. + }
  40673. + memset(p_FmPort->p_FmPortDriverParam, 0, sizeof(t_FmPortDriverParam));
  40674. +
  40675. + /* Initialize FM port parameters which will be kept by the driver */
  40676. + p_FmPort->portType = p_FmPortParams->portType;
  40677. + p_FmPort->portId = p_FmPortParams->portId;
  40678. + p_FmPort->pcdEngines = FM_PCD_NONE;
  40679. + p_FmPort->f_Exception = p_FmPortParams->f_Exception;
  40680. + p_FmPort->h_App = p_FmPortParams->h_App;
  40681. + p_FmPort->h_Fm = p_FmPortParams->h_Fm;
  40682. +
  40683. + /* get FM revision */
  40684. + FM_GetRevision(p_FmPort->h_Fm, &p_FmPort->fmRevInfo);
  40685. +
  40686. + /* calculate global portId number */
  40687. + p_FmPort->hardwarePortId = SwPortIdToHwPortId(p_FmPort->portType,
  40688. + p_FmPortParams->portId,
  40689. + p_FmPort->fmRevInfo.majorRev,
  40690. + p_FmPort->fmRevInfo.minorRev);
  40691. +
  40692. + if (p_FmPort->fmRevInfo.majorRev >= 6)
  40693. + {
  40694. + if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
  40695. + && (p_FmPortParams->portId != FM_OH_PORT_ID))
  40696. + DBG(WARNING,
  40697. + ("Port ID %d is recommended for HC port. Overwriting HW defaults to be suitable for HC.",
  40698. + FM_OH_PORT_ID));
  40699. +
  40700. + if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40701. + && (p_FmPortParams->portId == FM_OH_PORT_ID))
  40702. + DBG(WARNING, ("Use non-zero portId for OP port due to insufficient resources on portId 0."));
  40703. + }
  40704. +
  40705. + /* Set up FM port parameters for initialization phase only */
  40706. +
  40707. + /* First, fill in flibs struct */
  40708. + fman_port_defconfig(&p_FmPort->p_FmPortDriverParam->dfltCfg,
  40709. + (enum fman_port_type)p_FmPort->portType);
  40710. + /* Overwrite some integration specific parameters */
  40711. + p_FmPort->p_FmPortDriverParam->dfltCfg.rx_pri_elevation =
  40712. + DEFAULT_PORT_rxFifoPriElevationLevel;
  40713. + p_FmPort->p_FmPortDriverParam->dfltCfg.rx_fifo_thr =
  40714. + DEFAULT_PORT_rxFifoThreshold;
  40715. +
  40716. +#if defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || defined(FM_ERROR_VSP_NO_MATCH_SW006)
  40717. + p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006675 = TRUE;
  40718. +#else
  40719. + p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006675 = FALSE;
  40720. +#endif
  40721. + if ((p_FmPort->fmRevInfo.majorRev == 6)
  40722. + && (p_FmPort->fmRevInfo.minorRev == 0))
  40723. + p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006320 = TRUE;
  40724. + else
  40725. + p_FmPort->p_FmPortDriverParam->dfltCfg.errata_A006320 = FALSE;
  40726. +
  40727. + /* Excessive Threshold register - exists for pre-FMv3 chips only */
  40728. + if (p_FmPort->fmRevInfo.majorRev < 6)
  40729. + {
  40730. +#ifdef FM_NO_RESTRICT_ON_ACCESS_RSRC
  40731. + p_FmPort->p_FmPortDriverParam->dfltCfg.excessive_threshold_register =
  40732. + TRUE;
  40733. +#endif
  40734. + p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_rebm_has_sgd = FALSE;
  40735. + p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_tfne_has_features = FALSE;
  40736. + }
  40737. + else
  40738. + {
  40739. + p_FmPort->p_FmPortDriverParam->dfltCfg.excessive_threshold_register =
  40740. + FALSE;
  40741. + p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_rebm_has_sgd = TRUE;
  40742. + p_FmPort->p_FmPortDriverParam->dfltCfg.fmbm_tfne_has_features = TRUE;
  40743. + }
  40744. + if (p_FmPort->fmRevInfo.majorRev == 4)
  40745. + p_FmPort->p_FmPortDriverParam->dfltCfg.qmi_deq_options_support = FALSE;
  40746. + else
  40747. + p_FmPort->p_FmPortDriverParam->dfltCfg.qmi_deq_options_support = TRUE;
  40748. +
  40749. + /* Continue with other parameters */
  40750. + p_FmPort->p_FmPortDriverParam->baseAddr = baseAddr;
  40751. + /* set memory map pointers */
  40752. + p_FmPort->p_FmPortQmiRegs =
  40753. + (t_FmPortQmiRegs *)UINT_TO_PTR(baseAddr + QMI_PORT_REGS_OFFSET);
  40754. + p_FmPort->p_FmPortBmiRegs =
  40755. + (u_FmPortBmiRegs *)UINT_TO_PTR(baseAddr + BMI_PORT_REGS_OFFSET);
  40756. + p_FmPort->p_FmPortPrsRegs =
  40757. + (t_FmPortPrsRegs *)UINT_TO_PTR(baseAddr + PRS_PORT_REGS_OFFSET);
  40758. +
  40759. + p_FmPort->p_FmPortDriverParam->bufferPrefixContent.privDataSize =
  40760. + DEFAULT_PORT_bufferPrefixContent_privDataSize;
  40761. + p_FmPort->p_FmPortDriverParam->bufferPrefixContent.passPrsResult =
  40762. + DEFAULT_PORT_bufferPrefixContent_passPrsResult;
  40763. + p_FmPort->p_FmPortDriverParam->bufferPrefixContent.passTimeStamp =
  40764. + DEFAULT_PORT_bufferPrefixContent_passTimeStamp;
  40765. + p_FmPort->p_FmPortDriverParam->bufferPrefixContent.passAllOtherPCDInfo =
  40766. + DEFAULT_PORT_bufferPrefixContent_passTimeStamp;
  40767. + p_FmPort->p_FmPortDriverParam->bufferPrefixContent.dataAlign =
  40768. + DEFAULT_PORT_bufferPrefixContent_dataAlign;
  40769. + /* p_FmPort->p_FmPortDriverParam->dmaSwapData = (e_FmDmaSwapOption)DEFAULT_PORT_dmaSwapData;
  40770. + p_FmPort->p_FmPortDriverParam->dmaIntContextCacheAttr = (e_FmDmaCacheOption)DEFAULT_PORT_dmaIntContextCacheAttr;
  40771. + p_FmPort->p_FmPortDriverParam->dmaHeaderCacheAttr = (e_FmDmaCacheOption)DEFAULT_PORT_dmaHeaderCacheAttr;
  40772. + p_FmPort->p_FmPortDriverParam->dmaScatterGatherCacheAttr = (e_FmDmaCacheOption)DEFAULT_PORT_dmaScatterGatherCacheAttr;
  40773. + p_FmPort->p_FmPortDriverParam->dmaWriteOptimize = DEFAULT_PORT_dmaWriteOptimize;
  40774. + */
  40775. + p_FmPort->p_FmPortDriverParam->liodnBase = p_FmPortParams->liodnBase;
  40776. + p_FmPort->p_FmPortDriverParam->cheksumLastBytesIgnore =
  40777. + DEFAULT_PORT_cheksumLastBytesIgnore;
  40778. +
  40779. + p_FmPort->maxFrameLength = DEFAULT_PORT_maxFrameLength;
  40780. + /* resource distribution. */
  40781. + p_FmPort->fifoBufs.num = DEFAULT_PORT_numOfFifoBufs(p_FmPort->portType)
  40782. + * BMI_FIFO_UNITS;
  40783. + p_FmPort->fifoBufs.extra = DEFAULT_PORT_extraNumOfFifoBufs
  40784. + * BMI_FIFO_UNITS;
  40785. + p_FmPort->openDmas.num = DEFAULT_PORT_numOfOpenDmas(p_FmPort->portType);
  40786. + p_FmPort->openDmas.extra =
  40787. + DEFAULT_PORT_extraNumOfOpenDmas(p_FmPort->portType);
  40788. + p_FmPort->tasks.num = DEFAULT_PORT_numOfTasks(p_FmPort->portType);
  40789. + p_FmPort->tasks.extra = DEFAULT_PORT_extraNumOfTasks(p_FmPort->portType);
  40790. +
  40791. +
  40792. +#ifdef FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
  40793. + if ((p_FmPort->fmRevInfo.majorRev == 6)
  40794. + && (p_FmPort->fmRevInfo.minorRev == 0)
  40795. + && ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  40796. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX)))
  40797. + {
  40798. + p_FmPort->openDmas.num = 16;
  40799. + p_FmPort->openDmas.extra = 0;
  40800. + }
  40801. +#endif /* FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981 */
  40802. +
  40803. + /* Port type specific initialization: */
  40804. + switch (p_FmPort->portType)
  40805. + {
  40806. + case (e_FM_PORT_TYPE_RX):
  40807. + case (e_FM_PORT_TYPE_RX_10G):
  40808. + /* Initialize FM port parameters for initialization phase only */
  40809. + p_FmPort->p_FmPortDriverParam->cutBytesFromEnd =
  40810. + DEFAULT_PORT_cutBytesFromEnd;
  40811. + p_FmPort->p_FmPortDriverParam->enBufPoolDepletion = FALSE;
  40812. + p_FmPort->p_FmPortDriverParam->frmDiscardOverride =
  40813. + DEFAULT_PORT_frmDiscardOverride;
  40814. +
  40815. + tmpReg =
  40816. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfp);
  40817. + p_FmPort->p_FmPortDriverParam->rxFifoPriElevationLevel =
  40818. + (((tmpReg & BMI_RX_FIFO_PRI_ELEVATION_MASK)
  40819. + >> BMI_RX_FIFO_PRI_ELEVATION_SHIFT) + 1)
  40820. + * BMI_FIFO_UNITS;
  40821. + p_FmPort->p_FmPortDriverParam->rxFifoThreshold = (((tmpReg
  40822. + & BMI_RX_FIFO_THRESHOLD_MASK)
  40823. + >> BMI_RX_FIFO_THRESHOLD_SHIFT) + 1) * BMI_FIFO_UNITS;
  40824. +
  40825. + p_FmPort->p_FmPortDriverParam->bufMargins.endMargins =
  40826. + DEFAULT_PORT_BufMargins_endMargins;
  40827. + p_FmPort->p_FmPortDriverParam->errorsToDiscard =
  40828. + DEFAULT_PORT_errorsToDiscard;
  40829. + p_FmPort->p_FmPortDriverParam->forwardReuseIntContext =
  40830. + DEFAULT_PORT_forwardIntContextReuse;
  40831. +#if (DPAA_VERSION >= 11)
  40832. + p_FmPort->p_FmPortDriverParam->noScatherGather =
  40833. + DEFAULT_PORT_noScatherGather;
  40834. +#endif /* (DPAA_VERSION >= 11) */
  40835. + break;
  40836. +
  40837. + case (e_FM_PORT_TYPE_TX):
  40838. + p_FmPort->p_FmPortDriverParam->dontReleaseBuf = FALSE;
  40839. +#ifdef FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127
  40840. + tmpReg = 0x00001013;
  40841. + WRITE_UINT32( p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tfp,
  40842. + tmpReg);
  40843. +#endif /* FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127 */
  40844. + case (e_FM_PORT_TYPE_TX_10G):
  40845. + tmpReg =
  40846. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tfp);
  40847. + p_FmPort->p_FmPortDriverParam->txFifoMinFillLevel = ((tmpReg
  40848. + & BMI_TX_FIFO_MIN_FILL_MASK)
  40849. + >> BMI_TX_FIFO_MIN_FILL_SHIFT) * BMI_FIFO_UNITS;
  40850. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
  40851. + (uint8_t)(((tmpReg & BMI_FIFO_PIPELINE_DEPTH_MASK)
  40852. + >> BMI_FIFO_PIPELINE_DEPTH_SHIFT) + 1);
  40853. + p_FmPort->p_FmPortDriverParam->txFifoLowComfLevel = (((tmpReg
  40854. + & BMI_TX_LOW_COMF_MASK) >> BMI_TX_LOW_COMF_SHIFT) + 1)
  40855. + * BMI_FIFO_UNITS;
  40856. +
  40857. + p_FmPort->p_FmPortDriverParam->deqType = DEFAULT_PORT_deqType;
  40858. + p_FmPort->p_FmPortDriverParam->deqPrefetchOption =
  40859. + DEFAULT_PORT_deqPrefetchOption;
  40860. + p_FmPort->p_FmPortDriverParam->deqHighPriority =
  40861. + (bool)((p_FmPort->portType == e_FM_PORT_TYPE_TX) ? DEFAULT_PORT_deqHighPriority_1G :
  40862. + DEFAULT_PORT_deqHighPriority_10G);
  40863. + p_FmPort->p_FmPortDriverParam->deqByteCnt =
  40864. + (uint16_t)(
  40865. + (p_FmPort->portType == e_FM_PORT_TYPE_TX) ? DEFAULT_PORT_deqByteCnt_1G :
  40866. + DEFAULT_PORT_deqByteCnt_10G);
  40867. + break;
  40868. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  40869. + p_FmPort->p_FmPortDriverParam->errorsToDiscard =
  40870. + DEFAULT_PORT_errorsToDiscard;
  40871. +#if (DPAA_VERSION >= 11)
  40872. + p_FmPort->p_FmPortDriverParam->noScatherGather =
  40873. + DEFAULT_PORT_noScatherGather;
  40874. +#endif /* (DPAA_VERSION >= 11) */
  40875. + case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
  40876. + p_FmPort->p_FmPortDriverParam->deqPrefetchOption =
  40877. + DEFAULT_PORT_deqPrefetchOption_HC;
  40878. + p_FmPort->p_FmPortDriverParam->deqHighPriority =
  40879. + DEFAULT_PORT_deqHighPriority_1G;
  40880. + p_FmPort->p_FmPortDriverParam->deqType = DEFAULT_PORT_deqType;
  40881. + p_FmPort->p_FmPortDriverParam->deqByteCnt =
  40882. + DEFAULT_PORT_deqByteCnt_1G;
  40883. +
  40884. + tmpReg =
  40885. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofp);
  40886. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
  40887. + (uint8_t)(((tmpReg & BMI_FIFO_PIPELINE_DEPTH_MASK)
  40888. + >> BMI_FIFO_PIPELINE_DEPTH_SHIFT) + 1);
  40889. + if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
  40890. + && (p_FmPortParams->portId != FM_OH_PORT_ID))
  40891. + {
  40892. + /* Overwrite HC defaults */
  40893. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
  40894. + DEFAULT_PORT_fifoDeqPipelineDepth_OH;
  40895. + }
  40896. +
  40897. +#ifndef FM_FRAME_END_PARAMS_FOR_OP
  40898. + if (p_FmPort->fmRevInfo.majorRev < 6)
  40899. + p_FmPort->p_FmPortDriverParam->cheksumLastBytesIgnore = DEFAULT_notSupported;
  40900. +#endif /* !FM_FRAME_END_PARAMS_FOR_OP */
  40901. +
  40902. +#ifndef FM_DEQ_PIPELINE_PARAMS_FOR_OP
  40903. + if (!((p_FmPort->fmRevInfo.majorRev == 4) ||
  40904. + (p_FmPort->fmRevInfo.majorRev >= 6)))
  40905. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth = DEFAULT_notSupported;
  40906. +#endif /* !FM_DEQ_PIPELINE_PARAMS_FOR_OP */
  40907. + break;
  40908. +
  40909. + default:
  40910. + XX_Free(p_FmPort->p_FmPortDriverParam);
  40911. + XX_Free(p_FmPort);
  40912. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  40913. + return NULL;
  40914. + }
  40915. +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  40916. + if (p_FmPort->fmRevInfo.majorRev == 4)
  40917. + p_FmPort->p_FmPortDriverParam->deqPrefetchOption = (e_FmPortDeqPrefetchOption)DEFAULT_notSupported;
  40918. +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
  40919. +
  40920. + p_FmPort->imEn = p_FmPortParams->independentModeEnable;
  40921. +
  40922. + if (p_FmPort->imEn)
  40923. + {
  40924. + if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
  40925. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G))
  40926. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
  40927. + DEFAULT_PORT_fifoDeqPipelineDepth_IM;
  40928. + FmPortConfigIM(p_FmPort, p_FmPortParams);
  40929. + }
  40930. + else
  40931. + {
  40932. + switch (p_FmPort->portType)
  40933. + {
  40934. + case (e_FM_PORT_TYPE_RX):
  40935. + case (e_FM_PORT_TYPE_RX_10G):
  40936. + /* Initialize FM port parameters for initialization phase only */
  40937. + memcpy(&p_FmPort->p_FmPortDriverParam->extBufPools,
  40938. + &p_FmPortParams->specificParams.rxParams.extBufPools,
  40939. + sizeof(t_FmExtPools));
  40940. + p_FmPort->p_FmPortDriverParam->errFqid =
  40941. + p_FmPortParams->specificParams.rxParams.errFqid;
  40942. + p_FmPort->p_FmPortDriverParam->dfltFqid =
  40943. + p_FmPortParams->specificParams.rxParams.dfltFqid;
  40944. + p_FmPort->p_FmPortDriverParam->liodnOffset =
  40945. + p_FmPortParams->specificParams.rxParams.liodnOffset;
  40946. + break;
  40947. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  40948. + case (e_FM_PORT_TYPE_TX):
  40949. + case (e_FM_PORT_TYPE_TX_10G):
  40950. + case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
  40951. + p_FmPort->p_FmPortDriverParam->errFqid =
  40952. + p_FmPortParams->specificParams.nonRxParams.errFqid;
  40953. + p_FmPort->p_FmPortDriverParam->deqSubPortal =
  40954. + (uint8_t)(p_FmPortParams->specificParams.nonRxParams.qmChannel
  40955. + & QMI_DEQ_CFG_SUBPORTAL_MASK);
  40956. + p_FmPort->p_FmPortDriverParam->dfltFqid =
  40957. + p_FmPortParams->specificParams.nonRxParams.dfltFqid;
  40958. + break;
  40959. + default:
  40960. + XX_Free(p_FmPort->p_FmPortDriverParam);
  40961. + XX_Free(p_FmPort);
  40962. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  40963. + return NULL;
  40964. + }
  40965. + }
  40966. +
  40967. + memset(p_FmPort->name, 0, (sizeof(char)) * MODULE_NAME_SIZE);
  40968. + if (Sprint(
  40969. + p_FmPort->name,
  40970. + "FM-%d-port-%s-%d",
  40971. + FmGetId(p_FmPort->h_Fm),
  40972. + ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING
  40973. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)) ? "OH" :
  40974. + (p_FmPort->portType == e_FM_PORT_TYPE_RX ? "1g-RX" :
  40975. + (p_FmPort->portType == e_FM_PORT_TYPE_TX ? "1g-TX" :
  40976. + (p_FmPort->portType
  40977. + == e_FM_PORT_TYPE_RX_10G ? "10g-RX" :
  40978. + "10g-TX")))),
  40979. + p_FmPort->portId) == 0)
  40980. + {
  40981. + XX_Free(p_FmPort->p_FmPortDriverParam);
  40982. + XX_Free(p_FmPort);
  40983. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  40984. + return NULL;
  40985. + }
  40986. +
  40987. + p_FmPort->h_Spinlock = XX_InitSpinlock();
  40988. + if (!p_FmPort->h_Spinlock)
  40989. + {
  40990. + XX_Free(p_FmPort->p_FmPortDriverParam);
  40991. + XX_Free(p_FmPort);
  40992. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  40993. + return NULL;
  40994. + }
  40995. +
  40996. + return p_FmPort;
  40997. +}
  40998. +
  40999. +t_FmPort *rx_port = 0;
  41000. +t_FmPort *tx_port = 0;
  41001. +
  41002. +/**************************************************************************//**
  41003. + @Function FM_PORT_Init
  41004. +
  41005. + @Description Initializes the FM module
  41006. +
  41007. + @Param[in] h_FmPort - FM module descriptor
  41008. +
  41009. + @Return E_OK on success; Error code otherwise.
  41010. + *//***************************************************************************/
  41011. +t_Error FM_PORT_Init(t_Handle h_FmPort)
  41012. +{
  41013. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41014. + t_FmPortDriverParam *p_DriverParams;
  41015. + t_Error errCode;
  41016. + t_FmInterModulePortInitParams fmParams;
  41017. + t_FmRevisionInfo revInfo;
  41018. +
  41019. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  41020. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41021. +
  41022. + errCode = FmSpBuildBufferStructure(
  41023. + &p_FmPort->p_FmPortDriverParam->intContext,
  41024. + &p_FmPort->p_FmPortDriverParam->bufferPrefixContent,
  41025. + &p_FmPort->p_FmPortDriverParam->bufMargins,
  41026. + &p_FmPort->bufferOffsets, &p_FmPort->internalBufferOffset);
  41027. + if (errCode != E_OK)
  41028. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  41029. +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
  41030. + if ((p_FmPort->p_FmPortDriverParam->bcbWorkaround) &&
  41031. + (p_FmPort->portType == e_FM_PORT_TYPE_RX))
  41032. + {
  41033. + p_FmPort->p_FmPortDriverParam->errorsToDiscard |= FM_PORT_FRM_ERR_PHYSICAL;
  41034. + if (!p_FmPort->fifoBufs.num)
  41035. + p_FmPort->fifoBufs.num = DEFAULT_PORT_numOfFifoBufs(p_FmPort->portType)*BMI_FIFO_UNITS;
  41036. + p_FmPort->fifoBufs.num += 4*KILOBYTE;
  41037. + }
  41038. +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
  41039. +
  41040. + CHECK_INIT_PARAMETERS(p_FmPort, CheckInitParameters);
  41041. +
  41042. + p_DriverParams = p_FmPort->p_FmPortDriverParam;
  41043. +
  41044. + /* Set up flibs port structure */
  41045. + memset(&p_FmPort->port, 0, sizeof(struct fman_port));
  41046. + p_FmPort->port.type = (enum fman_port_type)p_FmPort->portType;
  41047. + FM_GetRevision(p_FmPort->h_Fm, &revInfo);
  41048. + p_FmPort->port.fm_rev_maj = revInfo.majorRev;
  41049. + p_FmPort->port.fm_rev_min = revInfo.minorRev;
  41050. + p_FmPort->port.bmi_regs =
  41051. + (union fman_port_bmi_regs *)UINT_TO_PTR(p_DriverParams->baseAddr + BMI_PORT_REGS_OFFSET);
  41052. + p_FmPort->port.qmi_regs =
  41053. + (struct fman_port_qmi_regs *)UINT_TO_PTR(p_DriverParams->baseAddr + QMI_PORT_REGS_OFFSET);
  41054. + p_FmPort->port.ext_pools_num = (uint8_t)((revInfo.majorRev == 4) ? 4 : 8);
  41055. + p_FmPort->port.im_en = p_FmPort->imEn;
  41056. + p_FmPort->p_FmPortPrsRegs =
  41057. + (t_FmPortPrsRegs *)UINT_TO_PTR(p_DriverParams->baseAddr + PRS_PORT_REGS_OFFSET);
  41058. +
  41059. + if (((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  41060. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX)) && !p_FmPort->imEn)
  41061. + {
  41062. + /* Call the external Buffer routine which also checks fifo
  41063. + size and updates it if necessary */
  41064. + /* define external buffer pools and pool depletion*/
  41065. + errCode = SetExtBufferPools(p_FmPort);
  41066. + if (errCode)
  41067. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  41068. + /* check if the largest external buffer pool is large enough */
  41069. + if (p_DriverParams->bufMargins.startMargins + MIN_EXT_BUF_SIZE
  41070. + + p_DriverParams->bufMargins.endMargins
  41071. + > p_FmPort->rxPoolsParams.largestBufSize)
  41072. + RETURN_ERROR(
  41073. + MAJOR,
  41074. + E_INVALID_VALUE,
  41075. + ("bufMargins.startMargins (%d) + minimum buf size (64) + bufMargins.endMargins (%d) is larger than maximum external buffer size (%d)", p_DriverParams->bufMargins.startMargins, p_DriverParams->bufMargins.endMargins, p_FmPort->rxPoolsParams.largestBufSize));
  41076. + }
  41077. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  41078. + {
  41079. + {
  41080. +#ifdef FM_NO_OP_OBSERVED_POOLS
  41081. + t_FmRevisionInfo revInfo;
  41082. +
  41083. + FM_GetRevision(p_FmPort->h_Fm, &revInfo);
  41084. + if ((revInfo.majorRev == 4) && (p_DriverParams->enBufPoolDepletion))
  41085. +#endif /* FM_NO_OP_OBSERVED_POOLS */
  41086. + {
  41087. + /* define external buffer pools */
  41088. + errCode = SetExtBufferPools(p_FmPort);
  41089. + if (errCode)
  41090. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  41091. + }
  41092. + }
  41093. + }
  41094. +
  41095. + /************************************************************/
  41096. + /* Call FM module routine for communicating parameters */
  41097. + /************************************************************/
  41098. + memset(&fmParams, 0, sizeof(fmParams));
  41099. + fmParams.hardwarePortId = p_FmPort->hardwarePortId;
  41100. + fmParams.portType = (e_FmPortType)p_FmPort->portType;
  41101. + fmParams.numOfTasks = (uint8_t)p_FmPort->tasks.num;
  41102. + fmParams.numOfExtraTasks = (uint8_t)p_FmPort->tasks.extra;
  41103. + fmParams.numOfOpenDmas = (uint8_t)p_FmPort->openDmas.num;
  41104. + fmParams.numOfExtraOpenDmas = (uint8_t)p_FmPort->openDmas.extra;
  41105. +
  41106. + if (p_FmPort->fifoBufs.num)
  41107. + {
  41108. + errCode = VerifySizeOfFifo(p_FmPort);
  41109. + if (errCode != E_OK)
  41110. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  41111. + }
  41112. + fmParams.sizeOfFifo = p_FmPort->fifoBufs.num;
  41113. + fmParams.extraSizeOfFifo = p_FmPort->fifoBufs.extra;
  41114. + fmParams.independentMode = p_FmPort->imEn;
  41115. + fmParams.liodnOffset = p_DriverParams->liodnOffset;
  41116. + fmParams.liodnBase = p_DriverParams->liodnBase;
  41117. + fmParams.deqPipelineDepth =
  41118. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth;
  41119. + fmParams.maxFrameLength = p_FmPort->maxFrameLength;
  41120. +#ifndef FM_DEQ_PIPELINE_PARAMS_FOR_OP
  41121. + if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) ||
  41122. + (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
  41123. + {
  41124. + if (!((p_FmPort->fmRevInfo.majorRev == 4) ||
  41125. + (p_FmPort->fmRevInfo.majorRev >= 6)))
  41126. + /* HC ports do not have fifoDeqPipelineDepth, but it is needed only
  41127. + * for deq threshold calculation.
  41128. + */
  41129. + fmParams.deqPipelineDepth = 2;
  41130. + }
  41131. +#endif /* !FM_DEQ_PIPELINE_PARAMS_FOR_OP */
  41132. +
  41133. + errCode = FmGetSetPortParams(p_FmPort->h_Fm, &fmParams);
  41134. + if (errCode)
  41135. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  41136. +
  41137. + /* get params for use in init */
  41138. + p_FmPort->fmMuramPhysBaseAddr =
  41139. + (uint64_t)((uint64_t)(fmParams.fmMuramPhysBaseAddr.low)
  41140. + | ((uint64_t)(fmParams.fmMuramPhysBaseAddr.high) << 32));
  41141. + p_FmPort->h_FmMuram = FmGetMuramHandle(p_FmPort->h_Fm);
  41142. +
  41143. + errCode = InitLowLevelDriver(p_FmPort);
  41144. + if (errCode != E_OK)
  41145. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  41146. +
  41147. + FmPortDriverParamFree(p_FmPort);
  41148. +
  41149. +#if (DPAA_VERSION >= 11)
  41150. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  41151. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX)
  41152. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  41153. + {
  41154. + t_FmPcdCtrlParamsPage *p_ParamsPage;
  41155. +
  41156. + FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
  41157. + (void**)&p_ParamsPage);
  41158. + ASSERT_COND(p_ParamsPage);
  41159. +
  41160. + WRITE_UINT32(p_ParamsPage->misc, FM_CTL_PARAMS_PAGE_ALWAYS_ON);
  41161. +#ifdef FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
  41162. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  41163. + {
  41164. + WRITE_UINT32(
  41165. + p_ParamsPage->misc,
  41166. + (GET_UINT32(p_ParamsPage->misc) | FM_CTL_PARAMS_PAGE_OP_FIX_EN));
  41167. + WRITE_UINT32(
  41168. + p_ParamsPage->discardMask,
  41169. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm));
  41170. + }
  41171. +#endif /* FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675 */
  41172. +#ifdef FM_ERROR_VSP_NO_MATCH_SW006
  41173. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  41174. + WRITE_UINT32(
  41175. + p_ParamsPage->errorsDiscardMask,
  41176. + (GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm) | GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsem)));
  41177. + else
  41178. + WRITE_UINT32(
  41179. + p_ParamsPage->errorsDiscardMask,
  41180. + (GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm) | GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsem)));
  41181. +#endif /* FM_ERROR_VSP_NO_MATCH_SW006 */
  41182. + }
  41183. +#endif /* (DPAA_VERSION >= 11) */
  41184. +
  41185. + if (p_FmPort->deepSleepVars.autoResMaxSizes)
  41186. + FmPortConfigAutoResForDeepSleepSupport1(p_FmPort);
  41187. + return E_OK;
  41188. +}
  41189. +
  41190. +/**************************************************************************//**
  41191. + @Function FM_PORT_Free
  41192. +
  41193. + @Description Frees all resources that were assigned to FM module.
  41194. +
  41195. + Calling this routine invalidates the descriptor.
  41196. +
  41197. + @Param[in] h_FmPort - FM module descriptor
  41198. +
  41199. + @Return E_OK on success; Error code otherwise.
  41200. + *//***************************************************************************/
  41201. +t_Error FM_PORT_Free(t_Handle h_FmPort)
  41202. +{
  41203. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41204. + t_FmInterModulePortFreeParams fmParams;
  41205. +
  41206. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41207. +
  41208. + if (p_FmPort->pcdEngines)
  41209. + RETURN_ERROR(
  41210. + MAJOR,
  41211. + E_INVALID_STATE,
  41212. + ("Trying to free a port with PCD. FM_PORT_DeletePCD must be called first."));
  41213. +
  41214. + if (p_FmPort->enabled)
  41215. + {
  41216. + if (FM_PORT_Disable(p_FmPort) != E_OK)
  41217. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM_PORT_Disable FAILED"));
  41218. + }
  41219. +
  41220. + if (p_FmPort->imEn)
  41221. + FmPortImFree(p_FmPort);
  41222. +
  41223. + FmPortDriverParamFree(p_FmPort);
  41224. +
  41225. + memset(&fmParams, 0, sizeof(fmParams));
  41226. + fmParams.hardwarePortId = p_FmPort->hardwarePortId;
  41227. + fmParams.portType = (e_FmPortType)p_FmPort->portType;
  41228. + fmParams.deqPipelineDepth =
  41229. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth;
  41230. +
  41231. + FmFreePortParams(p_FmPort->h_Fm, &fmParams);
  41232. +
  41233. +#if (DPAA_VERSION >= 11)
  41234. + if (FmVSPFreeForPort(p_FmPort->h_Fm, p_FmPort->portType, p_FmPort->portId)
  41235. + != E_OK)
  41236. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("VSP free of port FAILED"));
  41237. +
  41238. + if (p_FmPort->p_ParamsPage)
  41239. + FM_MURAM_FreeMem(p_FmPort->h_FmMuram, p_FmPort->p_ParamsPage);
  41240. +#endif /* (DPAA_VERSION >= 11) */
  41241. +
  41242. + if (p_FmPort->h_Spinlock)
  41243. + XX_FreeSpinlock(p_FmPort->h_Spinlock);
  41244. +
  41245. + XX_Free(p_FmPort);
  41246. +
  41247. + return E_OK;
  41248. +}
  41249. +
  41250. +/*************************************************/
  41251. +/* API Advanced Init unit functions */
  41252. +/*************************************************/
  41253. +
  41254. +t_Error FM_PORT_ConfigNumOfOpenDmas(t_Handle h_FmPort, t_FmPortRsrc *p_OpenDmas)
  41255. +{
  41256. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41257. +
  41258. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41259. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41260. +
  41261. + p_FmPort->p_FmPortDriverParam->setNumOfOpenDmas = TRUE;
  41262. + memcpy(&p_FmPort->openDmas, p_OpenDmas, sizeof(t_FmPortRsrc));
  41263. +
  41264. + return E_OK;
  41265. +}
  41266. +
  41267. +t_Error FM_PORT_ConfigNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks)
  41268. +{
  41269. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41270. +
  41271. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41272. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41273. +
  41274. + memcpy(&p_FmPort->tasks, p_NumOfTasks, sizeof(t_FmPortRsrc));
  41275. + p_FmPort->p_FmPortDriverParam->setNumOfTasks = TRUE;
  41276. + return E_OK;
  41277. +}
  41278. +
  41279. +t_Error FM_PORT_ConfigSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo)
  41280. +{
  41281. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41282. +
  41283. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41284. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41285. +
  41286. + p_FmPort->p_FmPortDriverParam->setSizeOfFifo = TRUE;
  41287. + memcpy(&p_FmPort->fifoBufs, p_SizeOfFifo, sizeof(t_FmPortRsrc));
  41288. +
  41289. + return E_OK;
  41290. +}
  41291. +
  41292. +t_Error FM_PORT_ConfigDeqHighPriority(t_Handle h_FmPort, bool highPri)
  41293. +{
  41294. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41295. +
  41296. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41297. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41298. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  41299. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
  41300. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("not available for Rx ports"));
  41301. +
  41302. + p_FmPort->p_FmPortDriverParam->dfltCfg.deq_high_pri = highPri;
  41303. +
  41304. + return E_OK;
  41305. +}
  41306. +
  41307. +t_Error FM_PORT_ConfigDeqType(t_Handle h_FmPort, e_FmPortDeqType deqType)
  41308. +{
  41309. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41310. +
  41311. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41312. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41313. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  41314. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
  41315. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41316. + ("not available for Rx ports"));
  41317. +
  41318. + p_FmPort->p_FmPortDriverParam->dfltCfg.deq_type =
  41319. + (enum fman_port_deq_type)deqType;
  41320. +
  41321. + return E_OK;
  41322. +}
  41323. +
  41324. +t_Error FM_PORT_ConfigDeqPrefetchOption(
  41325. + t_Handle h_FmPort, e_FmPortDeqPrefetchOption deqPrefetchOption)
  41326. +{
  41327. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41328. +
  41329. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41330. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41331. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  41332. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
  41333. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41334. + ("not available for Rx ports"));
  41335. + p_FmPort->p_FmPortDriverParam->dfltCfg.deq_prefetch_opt =
  41336. + (enum fman_port_deq_prefetch)deqPrefetchOption;
  41337. +
  41338. + return E_OK;
  41339. +}
  41340. +
  41341. +t_Error FM_PORT_ConfigBackupPools(t_Handle h_FmPort,
  41342. + t_FmBackupBmPools *p_BackupBmPools)
  41343. +{
  41344. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41345. +
  41346. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41347. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41348. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  41349. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  41350. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41351. + ("available for Rx ports only"));
  41352. +
  41353. + p_FmPort->p_FmPortDriverParam->p_BackupBmPools =
  41354. + (t_FmBackupBmPools *)XX_Malloc(sizeof(t_FmBackupBmPools));
  41355. + if (!p_FmPort->p_FmPortDriverParam->p_BackupBmPools)
  41356. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_BackupBmPools allocation failed"));
  41357. + memcpy(p_FmPort->p_FmPortDriverParam->p_BackupBmPools, p_BackupBmPools,
  41358. + sizeof(t_FmBackupBmPools));
  41359. +
  41360. + return E_OK;
  41361. +}
  41362. +
  41363. +t_Error FM_PORT_ConfigDeqByteCnt(t_Handle h_FmPort, uint16_t deqByteCnt)
  41364. +{
  41365. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41366. +
  41367. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41368. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41369. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  41370. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
  41371. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41372. + ("not available for Rx ports"));
  41373. +
  41374. + p_FmPort->p_FmPortDriverParam->dfltCfg.deq_byte_cnt = deqByteCnt;
  41375. +
  41376. + return E_OK;
  41377. +}
  41378. +
  41379. +t_Error FM_PORT_ConfigBufferPrefixContent(
  41380. + t_Handle h_FmPort, t_FmBufferPrefixContent *p_FmBufferPrefixContent)
  41381. +{
  41382. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41383. +
  41384. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41385. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41386. +
  41387. + memcpy(&p_FmPort->p_FmPortDriverParam->bufferPrefixContent,
  41388. + p_FmBufferPrefixContent, sizeof(t_FmBufferPrefixContent));
  41389. + /* if dataAlign was not initialized by user, we return to driver's default */
  41390. + if (!p_FmPort->p_FmPortDriverParam->bufferPrefixContent.dataAlign)
  41391. + p_FmPort->p_FmPortDriverParam->bufferPrefixContent.dataAlign =
  41392. + DEFAULT_PORT_bufferPrefixContent_dataAlign;
  41393. +
  41394. + return E_OK;
  41395. +}
  41396. +
  41397. +t_Error FM_PORT_ConfigCheksumLastBytesIgnore(t_Handle h_FmPort,
  41398. + uint8_t checksumLastBytesIgnore)
  41399. +{
  41400. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41401. +
  41402. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41403. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41404. +
  41405. + p_FmPort->p_FmPortDriverParam->dfltCfg.checksum_bytes_ignore =
  41406. + checksumLastBytesIgnore;
  41407. +
  41408. + return E_OK;
  41409. +}
  41410. +
  41411. +t_Error FM_PORT_ConfigCutBytesFromEnd(t_Handle h_FmPort,
  41412. + uint8_t cutBytesFromEnd)
  41413. +{
  41414. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41415. +
  41416. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41417. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41418. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  41419. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  41420. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41421. + ("available for Rx ports only"));
  41422. +
  41423. + p_FmPort->p_FmPortDriverParam->dfltCfg.rx_cut_end_bytes = cutBytesFromEnd;
  41424. +
  41425. + return E_OK;
  41426. +}
  41427. +
  41428. +t_Error FM_PORT_ConfigPoolDepletion(t_Handle h_FmPort,
  41429. + t_FmBufPoolDepletion *p_BufPoolDepletion)
  41430. +{
  41431. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41432. +
  41433. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41434. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41435. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  41436. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  41437. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41438. + ("available for Rx ports only"));
  41439. +
  41440. + p_FmPort->p_FmPortDriverParam->enBufPoolDepletion = TRUE;
  41441. + memcpy(&p_FmPort->p_FmPortDriverParam->bufPoolDepletion, p_BufPoolDepletion,
  41442. + sizeof(t_FmBufPoolDepletion));
  41443. +
  41444. + return E_OK;
  41445. +}
  41446. +
  41447. +t_Error FM_PORT_ConfigObservedPoolDepletion(
  41448. + t_Handle h_FmPort,
  41449. + t_FmPortObservedBufPoolDepletion *p_FmPortObservedBufPoolDepletion)
  41450. +{
  41451. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41452. +
  41453. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41454. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41455. + if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  41456. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41457. + ("available for OP ports only"));
  41458. +
  41459. + p_FmPort->p_FmPortDriverParam->enBufPoolDepletion = TRUE;
  41460. + memcpy(&p_FmPort->p_FmPortDriverParam->bufPoolDepletion,
  41461. + &p_FmPortObservedBufPoolDepletion->poolDepletionParams,
  41462. + sizeof(t_FmBufPoolDepletion));
  41463. + memcpy(&p_FmPort->p_FmPortDriverParam->extBufPools,
  41464. + &p_FmPortObservedBufPoolDepletion->poolsParams,
  41465. + sizeof(t_FmExtPools));
  41466. +
  41467. + return E_OK;
  41468. +}
  41469. +
  41470. +t_Error FM_PORT_ConfigExtBufPools(t_Handle h_FmPort, t_FmExtPools *p_FmExtPools)
  41471. +{
  41472. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41473. +
  41474. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41475. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41476. +
  41477. + if (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  41478. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41479. + ("available for OP ports only"));
  41480. +
  41481. + memcpy(&p_FmPort->p_FmPortDriverParam->extBufPools, p_FmExtPools,
  41482. + sizeof(t_FmExtPools));
  41483. +
  41484. + return E_OK;
  41485. +}
  41486. +
  41487. +t_Error FM_PORT_ConfigDontReleaseTxBufToBM(t_Handle h_FmPort)
  41488. +{
  41489. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41490. +
  41491. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41492. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41493. + if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
  41494. + && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
  41495. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41496. + ("available for Tx ports only"));
  41497. +
  41498. + p_FmPort->p_FmPortDriverParam->dontReleaseBuf = TRUE;
  41499. +
  41500. + return E_OK;
  41501. +}
  41502. +
  41503. +t_Error FM_PORT_ConfigDfltColor(t_Handle h_FmPort, e_FmPortColor color)
  41504. +{
  41505. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41506. +
  41507. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41508. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41509. + p_FmPort->p_FmPortDriverParam->dfltCfg.color = (enum fman_port_color)color;
  41510. +
  41511. + return E_OK;
  41512. +}
  41513. +
  41514. +t_Error FM_PORT_ConfigSyncReq(t_Handle h_FmPort, bool syncReq)
  41515. +{
  41516. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41517. +
  41518. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41519. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41520. +
  41521. + if ((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
  41522. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX))
  41523. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41524. + ("Not available for Tx ports"));
  41525. +
  41526. + p_FmPort->p_FmPortDriverParam->dfltCfg.sync_req = syncReq;
  41527. +
  41528. + return E_OK;
  41529. +}
  41530. +
  41531. +t_Error FM_PORT_ConfigFrmDiscardOverride(t_Handle h_FmPort, bool override)
  41532. +{
  41533. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41534. +
  41535. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41536. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41537. + if ((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
  41538. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX))
  41539. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41540. + ("Not available for Tx ports"));
  41541. +
  41542. + p_FmPort->p_FmPortDriverParam->dfltCfg.discard_override = override;
  41543. +
  41544. + return E_OK;
  41545. +}
  41546. +
  41547. +t_Error FM_PORT_ConfigErrorsToDiscard(t_Handle h_FmPort,
  41548. + fmPortFrameErrSelect_t errs)
  41549. +{
  41550. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41551. +
  41552. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41553. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41554. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  41555. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  41556. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  41557. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  41558. + ("available for Rx and offline parsing ports only"));
  41559. +
  41560. + p_FmPort->p_FmPortDriverParam->errorsToDiscard = errs;
  41561. +
  41562. + return E_OK;
  41563. +}
  41564. +
  41565. +t_Error FM_PORT_ConfigDmaSwapData(t_Handle h_FmPort, e_FmDmaSwapOption swapData)
  41566. +{
  41567. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41568. +
  41569. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41570. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41571. +
  41572. + p_FmPort->p_FmPortDriverParam->dfltCfg.dma_swap_data =
  41573. + (enum fman_port_dma_swap)swapData;
  41574. +
  41575. + return E_OK;
  41576. +}
  41577. +
  41578. +t_Error FM_PORT_ConfigDmaIcCacheAttr(t_Handle h_FmPort,
  41579. + e_FmDmaCacheOption intContextCacheAttr)
  41580. +{
  41581. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41582. +
  41583. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41584. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41585. +
  41586. + p_FmPort->p_FmPortDriverParam->dfltCfg.dma_ic_stash_on =
  41587. + (bool)(intContextCacheAttr == e_FM_DMA_STASH);
  41588. +
  41589. + return E_OK;
  41590. +}
  41591. +
  41592. +t_Error FM_PORT_ConfigDmaHdrAttr(t_Handle h_FmPort,
  41593. + e_FmDmaCacheOption headerCacheAttr)
  41594. +{
  41595. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41596. +
  41597. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41598. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41599. +
  41600. + p_FmPort->p_FmPortDriverParam->dfltCfg.dma_header_stash_on =
  41601. + (bool)(headerCacheAttr == e_FM_DMA_STASH);
  41602. +
  41603. + return E_OK;
  41604. +}
  41605. +
  41606. +t_Error FM_PORT_ConfigDmaScatterGatherAttr(
  41607. + t_Handle h_FmPort, e_FmDmaCacheOption scatterGatherCacheAttr)
  41608. +{
  41609. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41610. +
  41611. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41612. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41613. +
  41614. + p_FmPort->p_FmPortDriverParam->dfltCfg.dma_sg_stash_on =
  41615. + (bool)(scatterGatherCacheAttr == e_FM_DMA_STASH);
  41616. +
  41617. + return E_OK;
  41618. +}
  41619. +
  41620. +t_Error FM_PORT_ConfigDmaWriteOptimize(t_Handle h_FmPort, bool optimize)
  41621. +{
  41622. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41623. +
  41624. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41625. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41626. +
  41627. + if ((p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)
  41628. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX))
  41629. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41630. + ("Not available for Tx ports"));
  41631. +
  41632. + p_FmPort->p_FmPortDriverParam->dfltCfg.dma_write_optimize = optimize;
  41633. +
  41634. + return E_OK;
  41635. +}
  41636. +
  41637. +#if (DPAA_VERSION >= 11)
  41638. +t_Error FM_PORT_ConfigNoScatherGather(t_Handle h_FmPort, bool noScatherGather)
  41639. +{
  41640. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41641. +
  41642. + UNUSED(noScatherGather);
  41643. + UNUSED(p_FmPort);
  41644. +
  41645. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41646. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41647. +
  41648. + p_FmPort->p_FmPortDriverParam->noScatherGather = noScatherGather;
  41649. +
  41650. + return E_OK;
  41651. +}
  41652. +#endif /* (DPAA_VERSION >= 11) */
  41653. +
  41654. +t_Error FM_PORT_ConfigForwardReuseIntContext(t_Handle h_FmPort,
  41655. + bool forwardReuse)
  41656. +{
  41657. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41658. +
  41659. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41660. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41661. +
  41662. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  41663. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  41664. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41665. + ("available for Rx ports only"));
  41666. +
  41667. + p_FmPort->p_FmPortDriverParam->forwardReuseIntContext = forwardReuse;
  41668. +
  41669. + return E_OK;
  41670. +}
  41671. +
  41672. +t_Error FM_PORT_ConfigMaxFrameLength(t_Handle h_FmPort, uint16_t length)
  41673. +{
  41674. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41675. +
  41676. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41677. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41678. +
  41679. + p_FmPort->maxFrameLength = length;
  41680. +
  41681. + return E_OK;
  41682. +}
  41683. +
  41684. +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
  41685. +t_Error FM_PORT_ConfigBCBWorkaround(t_Handle h_FmPort)
  41686. +{
  41687. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41688. +
  41689. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41690. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41691. +
  41692. + p_FmPort->p_FmPortDriverParam->bcbWorkaround = TRUE;
  41693. +
  41694. + return E_OK;
  41695. +}
  41696. +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
  41697. +
  41698. +/****************************************************/
  41699. +/* Hidden-DEBUG Only API */
  41700. +/****************************************************/
  41701. +
  41702. +t_Error FM_PORT_ConfigTxFifoMinFillLevel(t_Handle h_FmPort,
  41703. + uint32_t minFillLevel)
  41704. +{
  41705. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41706. +
  41707. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41708. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41709. + if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
  41710. + && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
  41711. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41712. + ("available for Tx ports only"));
  41713. +
  41714. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_min_level = minFillLevel;
  41715. +
  41716. + return E_OK;
  41717. +}
  41718. +
  41719. +t_Error FM_PORT_ConfigFifoDeqPipelineDepth(t_Handle h_FmPort,
  41720. + uint8_t deqPipelineDepth)
  41721. +{
  41722. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41723. +
  41724. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41725. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41726. +
  41727. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  41728. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX))
  41729. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41730. + ("Not available for Rx ports"));
  41731. +
  41732. + if (p_FmPort->imEn)
  41733. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41734. + ("Not available for IM ports!"));
  41735. +
  41736. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_deq_pipeline_depth =
  41737. + deqPipelineDepth;
  41738. +
  41739. + return E_OK;
  41740. +}
  41741. +
  41742. +t_Error FM_PORT_ConfigTxFifoLowComfLevel(t_Handle h_FmPort,
  41743. + uint32_t fifoLowComfLevel)
  41744. +{
  41745. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41746. +
  41747. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41748. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41749. + if ((p_FmPort->portType != e_FM_PORT_TYPE_TX_10G)
  41750. + && (p_FmPort->portType != e_FM_PORT_TYPE_TX))
  41751. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41752. + ("available for Tx ports only"));
  41753. +
  41754. + p_FmPort->p_FmPortDriverParam->dfltCfg.tx_fifo_low_comf_level =
  41755. + fifoLowComfLevel;
  41756. +
  41757. + return E_OK;
  41758. +}
  41759. +
  41760. +t_Error FM_PORT_ConfigRxFifoThreshold(t_Handle h_FmPort, uint32_t fifoThreshold)
  41761. +{
  41762. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41763. +
  41764. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41765. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41766. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  41767. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  41768. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41769. + ("available for Rx ports only"));
  41770. +
  41771. + p_FmPort->p_FmPortDriverParam->dfltCfg.rx_fifo_thr = fifoThreshold;
  41772. +
  41773. + return E_OK;
  41774. +}
  41775. +
  41776. +t_Error FM_PORT_ConfigRxFifoPriElevationLevel(t_Handle h_FmPort,
  41777. + uint32_t priElevationLevel)
  41778. +{
  41779. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41780. +
  41781. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41782. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41783. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  41784. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  41785. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  41786. + ("available for Rx ports only"));
  41787. +
  41788. + p_FmPort->p_FmPortDriverParam->dfltCfg.rx_pri_elevation = priElevationLevel;
  41789. +
  41790. + return E_OK;
  41791. +}
  41792. +/****************************************************/
  41793. +/* API Run-time Control unit functions */
  41794. +/****************************************************/
  41795. +
  41796. +t_Error FM_PORT_SetNumOfOpenDmas(t_Handle h_FmPort,
  41797. + t_FmPortRsrc *p_NumOfOpenDmas)
  41798. +{
  41799. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41800. + t_Error err;
  41801. +
  41802. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41803. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41804. +
  41805. + if ((!p_NumOfOpenDmas->num) || (p_NumOfOpenDmas->num > MAX_NUM_OF_DMAS))
  41806. + RETURN_ERROR( MAJOR, E_INVALID_VALUE,
  41807. + ("openDmas-num can't be larger than %d", MAX_NUM_OF_DMAS));
  41808. + if (p_NumOfOpenDmas->extra > MAX_NUM_OF_EXTRA_DMAS)
  41809. + RETURN_ERROR(
  41810. + MAJOR,
  41811. + E_INVALID_VALUE,
  41812. + ("openDmas-extra can't be larger than %d", MAX_NUM_OF_EXTRA_DMAS));
  41813. + err = FmSetNumOfOpenDmas(p_FmPort->h_Fm, p_FmPort->hardwarePortId,
  41814. + (uint8_t*)&p_NumOfOpenDmas->num,
  41815. + (uint8_t*)&p_NumOfOpenDmas->extra, FALSE);
  41816. + if (err)
  41817. + RETURN_ERROR(MAJOR, err, NO_MSG);
  41818. +
  41819. + memcpy(&p_FmPort->openDmas, p_NumOfOpenDmas, sizeof(t_FmPortRsrc));
  41820. +
  41821. + return E_OK;
  41822. +}
  41823. +
  41824. +t_Error FM_PORT_SetNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks)
  41825. +{
  41826. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41827. + t_Error err;
  41828. +
  41829. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41830. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41831. +
  41832. + /* only driver uses host command port, so ASSERT rather than RETURN_ERROR */
  41833. + ASSERT_COND(p_FmPort->portType != e_FM_PORT_TYPE_OH_HOST_COMMAND);
  41834. +
  41835. + if ((!p_NumOfTasks->num) || (p_NumOfTasks->num > MAX_NUM_OF_TASKS))
  41836. + RETURN_ERROR(
  41837. + MAJOR, E_INVALID_VALUE,
  41838. + ("NumOfTasks-num can't be larger than %d", MAX_NUM_OF_TASKS));
  41839. + if (p_NumOfTasks->extra > MAX_NUM_OF_EXTRA_TASKS)
  41840. + RETURN_ERROR(
  41841. + MAJOR,
  41842. + E_INVALID_VALUE,
  41843. + ("NumOfTasks-extra can't be larger than %d", MAX_NUM_OF_EXTRA_TASKS));
  41844. +
  41845. + err = FmSetNumOfTasks(p_FmPort->h_Fm, p_FmPort->hardwarePortId,
  41846. + (uint8_t*)&p_NumOfTasks->num,
  41847. + (uint8_t*)&p_NumOfTasks->extra, FALSE);
  41848. + if (err)
  41849. + RETURN_ERROR(MAJOR, err, NO_MSG);
  41850. +
  41851. + /* update driver's struct */
  41852. + memcpy(&p_FmPort->tasks, p_NumOfTasks, sizeof(t_FmPortRsrc));
  41853. + return E_OK;
  41854. +}
  41855. +
  41856. +t_Error FM_PORT_SetSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo)
  41857. +{
  41858. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41859. + t_Error err;
  41860. +
  41861. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41862. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  41863. +
  41864. + if (!p_SizeOfFifo->num || (p_SizeOfFifo->num > MAX_PORT_FIFO_SIZE))
  41865. + RETURN_ERROR(
  41866. + MAJOR,
  41867. + E_INVALID_VALUE,
  41868. + ("SizeOfFifo-num has to be in the range of 256 - %d", MAX_PORT_FIFO_SIZE));
  41869. + if (p_SizeOfFifo->num % BMI_FIFO_UNITS)
  41870. + RETURN_ERROR(
  41871. + MAJOR, E_INVALID_VALUE,
  41872. + ("SizeOfFifo-num has to be divisible by %d", BMI_FIFO_UNITS));
  41873. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  41874. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  41875. + {
  41876. + /* extra FIFO size (allowed only to Rx ports) */
  41877. + if (p_SizeOfFifo->extra % BMI_FIFO_UNITS)
  41878. + RETURN_ERROR(
  41879. + MAJOR,
  41880. + E_INVALID_VALUE,
  41881. + ("SizeOfFifo-extra has to be divisible by %d", BMI_FIFO_UNITS));
  41882. + }
  41883. + else
  41884. + if (p_SizeOfFifo->extra)
  41885. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  41886. + (" No SizeOfFifo-extra for non Rx ports"));
  41887. +
  41888. + memcpy(&p_FmPort->fifoBufs, p_SizeOfFifo, sizeof(t_FmPortRsrc));
  41889. +
  41890. + /* we do not change user's parameter */
  41891. + err = VerifySizeOfFifo(p_FmPort);
  41892. + if (err)
  41893. + RETURN_ERROR(MAJOR, err, NO_MSG);
  41894. +
  41895. + err = FmSetSizeOfFifo(p_FmPort->h_Fm, p_FmPort->hardwarePortId,
  41896. + &p_SizeOfFifo->num, &p_SizeOfFifo->extra, FALSE);
  41897. + if (err)
  41898. + RETURN_ERROR(MAJOR, err, NO_MSG);
  41899. +
  41900. + return E_OK;
  41901. +}
  41902. +
  41903. +uint32_t FM_PORT_GetBufferDataOffset(t_Handle h_FmPort)
  41904. +{
  41905. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41906. +
  41907. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, 0);
  41908. + SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
  41909. + 0);
  41910. +
  41911. + return p_FmPort->bufferOffsets.dataOffset;
  41912. +}
  41913. +
  41914. +uint8_t * FM_PORT_GetBufferICInfo(t_Handle h_FmPort, char *p_Data)
  41915. +{
  41916. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41917. +
  41918. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
  41919. + SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
  41920. + NULL);
  41921. +
  41922. + if (p_FmPort->bufferOffsets.pcdInfoOffset == ILLEGAL_BASE)
  41923. + return NULL;
  41924. +
  41925. + return (uint8_t *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.pcdInfoOffset);
  41926. +}
  41927. +
  41928. +t_FmPrsResult * FM_PORT_GetBufferPrsResult(t_Handle h_FmPort, char *p_Data)
  41929. +{
  41930. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41931. +
  41932. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
  41933. + SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
  41934. + NULL);
  41935. +
  41936. + if (p_FmPort->bufferOffsets.prsResultOffset == ILLEGAL_BASE)
  41937. + return NULL;
  41938. +
  41939. + return (t_FmPrsResult *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.prsResultOffset);
  41940. +}
  41941. +
  41942. +uint64_t * FM_PORT_GetBufferTimeStamp(t_Handle h_FmPort, char *p_Data)
  41943. +{
  41944. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41945. +
  41946. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
  41947. + SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
  41948. + NULL);
  41949. +
  41950. + if (p_FmPort->bufferOffsets.timeStampOffset == ILLEGAL_BASE)
  41951. + return NULL;
  41952. +
  41953. + return (uint64_t *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.timeStampOffset);
  41954. +}
  41955. +
  41956. +uint8_t * FM_PORT_GetBufferHashResult(t_Handle h_FmPort, char *p_Data)
  41957. +{
  41958. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41959. +
  41960. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, NULL);
  41961. + SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
  41962. + NULL);
  41963. +
  41964. + if (p_FmPort->bufferOffsets.hashResultOffset == ILLEGAL_BASE)
  41965. + return NULL;
  41966. +
  41967. + return (uint8_t *)PTR_MOVE(p_Data, p_FmPort->bufferOffsets.hashResultOffset);
  41968. +}
  41969. +
  41970. +t_Error FM_PORT_Disable(t_Handle h_FmPort)
  41971. +{
  41972. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  41973. + int err;
  41974. +
  41975. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  41976. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  41977. +
  41978. + if (p_FmPort->imEn)
  41979. + FmPortImDisable(p_FmPort);
  41980. +
  41981. + err = fman_port_disable(&p_FmPort->port);
  41982. + if (err == -EBUSY)
  41983. + {
  41984. + DBG(WARNING, ("%s: BMI or QMI is Busy. Port forced down",
  41985. + p_FmPort->name));
  41986. + }
  41987. + else
  41988. + if (err != 0)
  41989. + {
  41990. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_disable"));
  41991. + }
  41992. +
  41993. + p_FmPort->enabled = FALSE;
  41994. +
  41995. + return E_OK;
  41996. +}
  41997. +
  41998. +t_Error FM_PORT_Enable(t_Handle h_FmPort)
  41999. +{
  42000. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42001. + int err;
  42002. +
  42003. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42004. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42005. +
  42006. + /* Used by FM_PORT_Free routine as indication
  42007. + if to disable port. Thus set it to TRUE prior
  42008. + to enabling itself. This way if part of enable
  42009. + process fails there will be still things
  42010. + to disable during Free. For example, if BMI
  42011. + enable succeeded but QMI failed, still BMI
  42012. + needs to be disabled by Free. */
  42013. + p_FmPort->enabled = TRUE;
  42014. +
  42015. + if (p_FmPort->imEn)
  42016. + FmPortImEnable(p_FmPort);
  42017. +
  42018. + err = fman_port_enable(&p_FmPort->port);
  42019. + if (err != 0)
  42020. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_enable"));
  42021. +
  42022. + return E_OK;
  42023. +}
  42024. +
  42025. +t_Error FM_PORT_SetRateLimit(t_Handle h_FmPort, t_FmPortRateLimit *p_RateLimit)
  42026. +{
  42027. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42028. + uint8_t factor, countUnitBit;
  42029. + uint16_t baseGran;
  42030. + struct fman_port_rate_limiter params;
  42031. + int err;
  42032. +
  42033. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42034. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  42035. +
  42036. + switch (p_FmPort->portType)
  42037. + {
  42038. + case (e_FM_PORT_TYPE_TX_10G):
  42039. + case (e_FM_PORT_TYPE_TX):
  42040. + baseGran = BMI_RATE_LIMIT_GRAN_TX;
  42041. + break;
  42042. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  42043. + baseGran = BMI_RATE_LIMIT_GRAN_OP;
  42044. + break;
  42045. + default:
  42046. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  42047. + ("available for Tx and Offline parsing ports only"));
  42048. + }
  42049. +
  42050. + countUnitBit = (uint8_t)FmGetTimeStampScale(p_FmPort->h_Fm); /* TimeStamp per nano seconds units */
  42051. + /* normally, we use 1 usec as the reference count */
  42052. + factor = 1;
  42053. + /* if ratelimit is too small for a 1usec factor, multiply the factor */
  42054. + while (p_RateLimit->rateLimit < baseGran / factor)
  42055. + {
  42056. + if (countUnitBit == 31)
  42057. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Rate limit is too small"));
  42058. +
  42059. + countUnitBit++;
  42060. + factor <<= 1;
  42061. + }
  42062. + /* if ratelimit is too large for a 1usec factor, it is also larger than max rate*/
  42063. + if (p_RateLimit->rateLimit
  42064. + > ((uint32_t)baseGran * (1 << 10) * (uint32_t)factor))
  42065. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Rate limit is too large"));
  42066. +
  42067. + if (!p_RateLimit->maxBurstSize
  42068. + || (p_RateLimit->maxBurstSize > BMI_RATE_LIMIT_MAX_BURST_SIZE))
  42069. + RETURN_ERROR(
  42070. + MAJOR,
  42071. + E_INVALID_VALUE,
  42072. + ("maxBurstSize must be between 1K and %dk", BMI_RATE_LIMIT_MAX_BURST_SIZE));
  42073. +
  42074. + params.count_1micro_bit = (uint8_t)FmGetTimeStampScale(p_FmPort->h_Fm);
  42075. + params.high_burst_size_gran = FALSE;
  42076. + params.burst_size = p_RateLimit->maxBurstSize;
  42077. + params.rate = p_RateLimit->rateLimit;
  42078. + params.rate_factor = E_FMAN_PORT_RATE_DOWN_NONE;
  42079. +
  42080. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  42081. + {
  42082. +#ifndef FM_NO_ADVANCED_RATE_LIMITER
  42083. +
  42084. + if ((p_FmPort->fmRevInfo.majorRev == 4)
  42085. + || (p_FmPort->fmRevInfo.majorRev >= 6))
  42086. + {
  42087. + params.high_burst_size_gran = TRUE;
  42088. + }
  42089. + else
  42090. +#endif /* ! FM_NO_ADVANCED_RATE_LIMITER */
  42091. + {
  42092. + if (p_RateLimit->rateLimitDivider
  42093. + != e_FM_PORT_DUAL_RATE_LIMITER_NONE)
  42094. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  42095. + ("FM_PORT_ConfigDualRateLimitScaleDown"));
  42096. +
  42097. + if (p_RateLimit->maxBurstSize % 1000)
  42098. + {
  42099. + p_RateLimit->maxBurstSize =
  42100. + (uint16_t)((p_RateLimit->maxBurstSize / 1000) + 1);
  42101. + DBG(WARNING, ("rateLimit.maxBurstSize rounded up to %d", (p_RateLimit->maxBurstSize/1000+1)*1000));
  42102. + }
  42103. + else
  42104. + p_RateLimit->maxBurstSize = (uint16_t)(p_RateLimit->maxBurstSize
  42105. + / 1000);
  42106. + }
  42107. + params.rate_factor =
  42108. + (enum fman_port_rate_limiter_scale_down)p_RateLimit->rateLimitDivider;
  42109. + params.burst_size = p_RateLimit->maxBurstSize;
  42110. + }
  42111. +
  42112. + err = fman_port_set_rate_limiter(&p_FmPort->port, &params);
  42113. + if (err != 0)
  42114. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_rate_limiter"));
  42115. +
  42116. + return E_OK;
  42117. +}
  42118. +
  42119. +t_Error FM_PORT_DeleteRateLimit(t_Handle h_FmPort)
  42120. +{
  42121. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42122. + int err;
  42123. +
  42124. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42125. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  42126. +
  42127. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)
  42128. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX)
  42129. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
  42130. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  42131. + ("available for Tx and Offline parsing ports only"));
  42132. +
  42133. + err = fman_port_delete_rate_limiter(&p_FmPort->port);
  42134. + if (err != 0)
  42135. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_rate_limiter"));
  42136. + return E_OK;
  42137. +}
  42138. +
  42139. +t_Error FM_PORT_SetPfcPrioritiesMappingToQmanWQ(t_Handle h_FmPort, uint8_t prio,
  42140. + uint8_t wq)
  42141. +{
  42142. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42143. + uint32_t tmpReg;
  42144. + uint32_t wqTmpReg;
  42145. +
  42146. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42147. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42148. +
  42149. + if ((p_FmPort->portType != e_FM_PORT_TYPE_TX)
  42150. + && (p_FmPort->portType != e_FM_PORT_TYPE_TX_10G))
  42151. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  42152. + ("PFC mapping is available for Tx ports only"));
  42153. +
  42154. + if (prio > 7)
  42155. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
  42156. + ("PFC priority (%d) is out of range (0-7)", prio));
  42157. + if (wq > 7)
  42158. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
  42159. + ("WQ (%d) is out of range (0-7)", wq));
  42160. +
  42161. + tmpReg = GET_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tpfcm[0]);
  42162. + tmpReg &= ~(0xf << ((7 - prio) * 4));
  42163. + wqTmpReg = ((uint32_t)wq << ((7 - prio) * 4));
  42164. + tmpReg |= wqTmpReg;
  42165. +
  42166. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tpfcm[0],
  42167. + tmpReg);
  42168. +
  42169. + return E_OK;
  42170. +}
  42171. +
  42172. +t_Error FM_PORT_SetFrameQueueCounters(t_Handle h_FmPort, bool enable)
  42173. +{
  42174. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42175. +
  42176. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42177. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42178. +
  42179. + fman_port_set_queue_cnt_mode(&p_FmPort->port, enable);
  42180. +
  42181. + return E_OK;
  42182. +}
  42183. +
  42184. +t_Error FM_PORT_SetPerformanceCounters(t_Handle h_FmPort, bool enable)
  42185. +{
  42186. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42187. + int err;
  42188. +
  42189. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42190. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42191. +
  42192. + err = fman_port_set_perf_cnt_mode(&p_FmPort->port, enable);
  42193. + if (err != 0)
  42194. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_perf_cnt_mode"));
  42195. + return E_OK;
  42196. +}
  42197. +
  42198. +t_Error FM_PORT_SetPerformanceCountersParams(
  42199. + t_Handle h_FmPort, t_FmPortPerformanceCnt *p_FmPortPerformanceCnt)
  42200. +{
  42201. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42202. + struct fman_port_perf_cnt_params params;
  42203. + int err;
  42204. +
  42205. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42206. +
  42207. + /* check parameters */
  42208. + if (!p_FmPortPerformanceCnt->taskCompVal
  42209. + || (p_FmPortPerformanceCnt->taskCompVal > p_FmPort->tasks.num))
  42210. + RETURN_ERROR(
  42211. + MAJOR,
  42212. + E_INVALID_VALUE,
  42213. + ("taskCompVal (%d) has to be in the range of 1 - %d (current value)!", p_FmPortPerformanceCnt->taskCompVal, p_FmPort->tasks.num));
  42214. + if (!p_FmPortPerformanceCnt->dmaCompVal
  42215. + || (p_FmPortPerformanceCnt->dmaCompVal > p_FmPort->openDmas.num))
  42216. + RETURN_ERROR(
  42217. + MAJOR,
  42218. + E_INVALID_VALUE,
  42219. + ("dmaCompVal (%d) has to be in the range of 1 - %d (current value)!", p_FmPortPerformanceCnt->dmaCompVal, p_FmPort->openDmas.num));
  42220. + if (!p_FmPortPerformanceCnt->fifoCompVal
  42221. + || (p_FmPortPerformanceCnt->fifoCompVal > p_FmPort->fifoBufs.num))
  42222. + RETURN_ERROR(
  42223. + MAJOR,
  42224. + E_INVALID_VALUE,
  42225. + ("fifoCompVal (%d) has to be in the range of 256 - %d (current value)!", p_FmPortPerformanceCnt->fifoCompVal, p_FmPort->fifoBufs.num));
  42226. + if (p_FmPortPerformanceCnt->fifoCompVal % BMI_FIFO_UNITS)
  42227. + RETURN_ERROR(
  42228. + MAJOR,
  42229. + E_INVALID_VALUE,
  42230. + ("fifoCompVal (%d) has to be divisible by %d", p_FmPortPerformanceCnt->fifoCompVal, BMI_FIFO_UNITS));
  42231. +
  42232. + switch (p_FmPort->portType)
  42233. + {
  42234. + case (e_FM_PORT_TYPE_RX_10G):
  42235. + case (e_FM_PORT_TYPE_RX):
  42236. + if (!p_FmPortPerformanceCnt->queueCompVal
  42237. + || (p_FmPortPerformanceCnt->queueCompVal
  42238. + > MAX_PERFORMANCE_RX_QUEUE_COMP))
  42239. + RETURN_ERROR(
  42240. + MAJOR,
  42241. + E_INVALID_VALUE,
  42242. + ("performanceCnt.queueCompVal for Rx has to be in the range of 1 - %d", MAX_PERFORMANCE_RX_QUEUE_COMP));
  42243. + break;
  42244. + case (e_FM_PORT_TYPE_TX_10G):
  42245. + case (e_FM_PORT_TYPE_TX):
  42246. + if (!p_FmPortPerformanceCnt->queueCompVal
  42247. + || (p_FmPortPerformanceCnt->queueCompVal
  42248. + > MAX_PERFORMANCE_TX_QUEUE_COMP))
  42249. + RETURN_ERROR(
  42250. + MAJOR,
  42251. + E_INVALID_VALUE,
  42252. + ("performanceCnt.queueCompVal for Tx has to be in the range of 1 - %d", MAX_PERFORMANCE_TX_QUEUE_COMP));
  42253. + break;
  42254. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  42255. + case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
  42256. + if (p_FmPortPerformanceCnt->queueCompVal)
  42257. + RETURN_ERROR(
  42258. + MAJOR,
  42259. + E_INVALID_VALUE,
  42260. + ("performanceCnt.queueCompVal is not relevant for H/O ports."));
  42261. + break;
  42262. + default:
  42263. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  42264. + }
  42265. +
  42266. + params.task_val = p_FmPortPerformanceCnt->taskCompVal;
  42267. + params.queue_val = p_FmPortPerformanceCnt->queueCompVal;
  42268. + params.dma_val = p_FmPortPerformanceCnt->dmaCompVal;
  42269. + params.fifo_val = p_FmPortPerformanceCnt->fifoCompVal;
  42270. +
  42271. + err = fman_port_set_perf_cnt_params(&p_FmPort->port, &params);
  42272. + if (err != 0)
  42273. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_perf_cnt_params"));
  42274. +
  42275. + return E_OK;
  42276. +}
  42277. +
  42278. +t_Error FM_PORT_AnalyzePerformanceParams(t_Handle h_FmPort)
  42279. +{
  42280. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42281. + t_FmPortPerformanceCnt currParams, savedParams;
  42282. + t_Error err;
  42283. + bool underTest, failed = FALSE;
  42284. +
  42285. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42286. +
  42287. + XX_Print("Analyzing Performance parameters for port (type %d, id%d)\n",
  42288. + p_FmPort->portType, p_FmPort->portId);
  42289. +
  42290. + currParams.taskCompVal = (uint8_t)p_FmPort->tasks.num;
  42291. + if ((p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  42292. + || (p_FmPort->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND))
  42293. + currParams.queueCompVal = 0;
  42294. + else
  42295. + currParams.queueCompVal = 1;
  42296. + currParams.dmaCompVal = (uint8_t)p_FmPort->openDmas.num;
  42297. + currParams.fifoCompVal = p_FmPort->fifoBufs.num;
  42298. +
  42299. + FM_PORT_SetPerformanceCounters(p_FmPort, FALSE);
  42300. + ClearPerfCnts(p_FmPort);
  42301. + if ((err = FM_PORT_SetPerformanceCountersParams(p_FmPort, &currParams))
  42302. + != E_OK)
  42303. + RETURN_ERROR(MAJOR, err, NO_MSG);
  42304. + FM_PORT_SetPerformanceCounters(p_FmPort, TRUE);
  42305. + XX_UDelay(1000000);
  42306. + FM_PORT_SetPerformanceCounters(p_FmPort, FALSE);
  42307. + if (FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL))
  42308. + {
  42309. + XX_Print(
  42310. + "Max num of defined port tasks (%d) utilized - Please enlarge\n",
  42311. + p_FmPort->tasks.num);
  42312. + failed = TRUE;
  42313. + }
  42314. + if (FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL))
  42315. + {
  42316. + XX_Print(
  42317. + "Max num of defined port openDmas (%d) utilized - Please enlarge\n",
  42318. + p_FmPort->openDmas.num);
  42319. + failed = TRUE;
  42320. + }
  42321. + if (FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL))
  42322. + {
  42323. + XX_Print(
  42324. + "Max size of defined port fifo (%d) utilized - Please enlarge\n",
  42325. + p_FmPort->fifoBufs.num);
  42326. + failed = TRUE;
  42327. + }
  42328. + if (failed)
  42329. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  42330. +
  42331. + memset(&savedParams, 0, sizeof(savedParams));
  42332. + while (TRUE)
  42333. + {
  42334. + underTest = FALSE;
  42335. + if ((currParams.taskCompVal != 1) && !savedParams.taskCompVal)
  42336. + {
  42337. + currParams.taskCompVal--;
  42338. + underTest = TRUE;
  42339. + }
  42340. + if ((currParams.dmaCompVal != 1) && !savedParams.dmaCompVal)
  42341. + {
  42342. + currParams.dmaCompVal--;
  42343. + underTest = TRUE;
  42344. + }
  42345. + if ((currParams.fifoCompVal != BMI_FIFO_UNITS)
  42346. + && !savedParams.fifoCompVal)
  42347. + {
  42348. + currParams.fifoCompVal -= BMI_FIFO_UNITS;
  42349. + underTest = TRUE;
  42350. + }
  42351. + if (!underTest)
  42352. + break;
  42353. +
  42354. + ClearPerfCnts(p_FmPort);
  42355. + if ((err = FM_PORT_SetPerformanceCountersParams(p_FmPort, &currParams))
  42356. + != E_OK)
  42357. + RETURN_ERROR(MAJOR, err, NO_MSG);
  42358. + FM_PORT_SetPerformanceCounters(p_FmPort, TRUE);
  42359. + XX_UDelay(1000000);
  42360. + FM_PORT_SetPerformanceCounters(p_FmPort, FALSE);
  42361. +
  42362. + if (!savedParams.taskCompVal
  42363. + && FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL))
  42364. + savedParams.taskCompVal = (uint8_t)(currParams.taskCompVal + 2);
  42365. + if (!savedParams.dmaCompVal
  42366. + && FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL))
  42367. + savedParams.dmaCompVal = (uint8_t)(currParams.dmaCompVal + 2);
  42368. + if (!savedParams.fifoCompVal
  42369. + && FM_PORT_GetCounter(p_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL))
  42370. + savedParams.fifoCompVal = currParams.fifoCompVal
  42371. + + (2 * BMI_FIFO_UNITS);
  42372. + }
  42373. +
  42374. + XX_Print("best vals: tasks %d, dmas %d, fifos %d\n",
  42375. + savedParams.taskCompVal, savedParams.dmaCompVal,
  42376. + savedParams.fifoCompVal);
  42377. + return E_OK;
  42378. +}
  42379. +
  42380. +t_Error FM_PORT_SetStatisticsCounters(t_Handle h_FmPort, bool enable)
  42381. +{
  42382. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42383. + int err;
  42384. +
  42385. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42386. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42387. +
  42388. + err = fman_port_set_stats_cnt_mode(&p_FmPort->port, enable);
  42389. + if (err != 0)
  42390. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_stats_cnt_mode"));
  42391. + return E_OK;
  42392. +}
  42393. +
  42394. +t_Error FM_PORT_SetErrorsRoute(t_Handle h_FmPort, fmPortFrameErrSelect_t errs)
  42395. +{
  42396. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42397. + volatile uint32_t *p_ErrDiscard = NULL;
  42398. + int err;
  42399. +
  42400. + UNUSED(p_ErrDiscard);
  42401. + err = fman_port_set_err_mask(&p_FmPort->port, (uint32_t)errs);
  42402. + if (err != 0)
  42403. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_err_mask"));
  42404. +
  42405. +#ifdef FM_ERROR_VSP_NO_MATCH_SW006
  42406. + if (p_FmPort->fmRevInfo.majorRev >= 6)
  42407. + {
  42408. + t_FmPcdCtrlParamsPage *p_ParamsPage;
  42409. +
  42410. + FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
  42411. + (void**)&p_ParamsPage);
  42412. + ASSERT_COND(p_ParamsPage);
  42413. + switch (p_FmPort->portType)
  42414. + {
  42415. + case (e_FM_PORT_TYPE_RX_10G):
  42416. + case (e_FM_PORT_TYPE_RX):
  42417. + p_ErrDiscard =
  42418. + &p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm;
  42419. + break;
  42420. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  42421. + p_ErrDiscard =
  42422. + &p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm;
  42423. + break;
  42424. + default:
  42425. + RETURN_ERROR(
  42426. + MAJOR, E_INVALID_OPERATION,
  42427. + ("available for Rx and offline parsing ports only"));
  42428. + }
  42429. + WRITE_UINT32(p_ParamsPage->errorsDiscardMask,
  42430. + GET_UINT32(*p_ErrDiscard) | errs);
  42431. + }
  42432. +#endif /* FM_ERROR_VSP_NO_MATCH_SW006 */
  42433. +
  42434. + return E_OK;
  42435. +}
  42436. +
  42437. +t_Error FM_PORT_SetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId,
  42438. + bool enable)
  42439. +{
  42440. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42441. + int err;
  42442. +
  42443. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42444. + SANITY_CHECK_RETURN_ERROR(poolId<BM_MAX_NUM_OF_POOLS, E_INVALID_HANDLE);
  42445. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42446. +
  42447. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  42448. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  42449. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  42450. + ("available for Rx ports only"));
  42451. +
  42452. + err = fman_port_set_bpool_cnt_mode(&p_FmPort->port, poolId, enable);
  42453. + if (err != 0)
  42454. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_set_bpool_cnt_mode"));
  42455. + return E_OK;
  42456. +}
  42457. +
  42458. +t_Error FM_PORT_GetBmiCounters(t_Handle h_FmPort, t_FmPortBmiStats *p_BmiStats)
  42459. +{
  42460. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42461. +
  42462. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  42463. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G)){
  42464. + p_BmiStats->cntCycle =
  42465. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_CYCLE);
  42466. + /* fmbm_rccn */
  42467. + p_BmiStats->cntTaskUtil =
  42468. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL);
  42469. + /* fmbm_rtuc */
  42470. + p_BmiStats->cntQueueUtil =
  42471. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_QUEUE_UTIL);
  42472. + /* fmbm_rrquc */
  42473. + p_BmiStats->cntDmaUtil =
  42474. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL);
  42475. + /* fmbm_rduc */
  42476. + p_BmiStats->cntFifoUtil =
  42477. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL);
  42478. + /* fmbm_rfuc */
  42479. + p_BmiStats->cntRxPauseActivation =
  42480. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION);
  42481. + /* fmbm_rpac */
  42482. + p_BmiStats->cntFrame =
  42483. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FRAME);
  42484. + /* fmbm_rfrc */
  42485. + p_BmiStats->cntDiscardFrame =
  42486. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DISCARD_FRAME);
  42487. + /* fmbm_rfdc */
  42488. + p_BmiStats->cntDeallocBuf =
  42489. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DEALLOC_BUF);
  42490. + /* fmbm_rbdc */
  42491. + p_BmiStats->cntRxBadFrame =
  42492. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_BAD_FRAME);
  42493. + /* fmbm_rfbc */
  42494. + p_BmiStats->cntRxLargeFrame =
  42495. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_LARGE_FRAME);
  42496. + /* fmbm_rlfc */
  42497. + p_BmiStats->cntRxFilterFrame =
  42498. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_FILTER_FRAME);
  42499. + /* fmbm_rffc */
  42500. + p_BmiStats->cntRxListDmaErr =
  42501. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR);
  42502. + /* fmbm_rfldec */
  42503. + p_BmiStats->cntRxOutOfBuffersDiscard =
  42504. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD);
  42505. + /* fmbm_rodc */
  42506. + p_BmiStats->cntWredDiscard = 0;
  42507. + p_BmiStats->cntLengthErr = 0;
  42508. + p_BmiStats->cntUnsupportedFormat = 0;
  42509. + }
  42510. + else if ((p_FmPort->portType == e_FM_PORT_TYPE_TX)
  42511. + || (p_FmPort->portType == e_FM_PORT_TYPE_TX_10G)){
  42512. + p_BmiStats->cntCycle =
  42513. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_CYCLE);
  42514. + /* fmbm_tccn */
  42515. + p_BmiStats->cntTaskUtil =
  42516. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL);
  42517. + /* fmbm_ttuc */
  42518. + p_BmiStats->cntQueueUtil =
  42519. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_QUEUE_UTIL);
  42520. + /* fmbm_ttcquc */
  42521. + p_BmiStats->cntDmaUtil =
  42522. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL);
  42523. + /* fmbm_tduc */
  42524. + p_BmiStats->cntFifoUtil =
  42525. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL);
  42526. + /* fmbm_tfuc */
  42527. + p_BmiStats->cntRxPauseActivation = 0;
  42528. + p_BmiStats->cntFrame =
  42529. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FRAME);
  42530. + /* fmbm_tfrc */
  42531. + p_BmiStats->cntDiscardFrame =
  42532. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DISCARD_FRAME);
  42533. + /* fmbm_tfdc */
  42534. + p_BmiStats->cntDeallocBuf =
  42535. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DEALLOC_BUF);
  42536. + /* fmbm_tbdc */
  42537. + p_BmiStats->cntRxBadFrame = 0;
  42538. + p_BmiStats->cntRxLargeFrame = 0;
  42539. + p_BmiStats->cntRxFilterFrame = 0;
  42540. + p_BmiStats->cntRxListDmaErr = 0;
  42541. + p_BmiStats->cntRxOutOfBuffersDiscard = 0;
  42542. + p_BmiStats->cntWredDiscard = 0;
  42543. + p_BmiStats->cntLengthErr =
  42544. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_LENGTH_ERR);
  42545. + /* fmbm_tfledc */
  42546. + p_BmiStats->cntUnsupportedFormat =
  42547. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT);
  42548. + /* fmbm_tfufdc */
  42549. + }
  42550. + else if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) {
  42551. + p_BmiStats->cntCycle =
  42552. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_CYCLE);
  42553. + /* fmbm_occn */
  42554. + p_BmiStats->cntTaskUtil =
  42555. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_TASK_UTIL);
  42556. + /* fmbm_otuc */
  42557. + p_BmiStats->cntQueueUtil = 0;
  42558. + p_BmiStats->cntDmaUtil =
  42559. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DMA_UTIL);
  42560. + /* fmbm_oduc */
  42561. + p_BmiStats->cntFifoUtil =
  42562. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FIFO_UTIL);
  42563. + /* fmbm_ofuc*/
  42564. + p_BmiStats->cntRxPauseActivation = 0;
  42565. + p_BmiStats->cntFrame =
  42566. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_FRAME);
  42567. + /* fmbm_ofrc */
  42568. + p_BmiStats->cntDiscardFrame =
  42569. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DISCARD_FRAME);
  42570. + /* fmbm_ofdc */
  42571. + p_BmiStats->cntDeallocBuf =
  42572. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_DEALLOC_BUF);
  42573. + /* fmbm_obdc*/
  42574. + p_BmiStats->cntRxBadFrame = 0;
  42575. + p_BmiStats->cntRxLargeFrame = 0;
  42576. + p_BmiStats->cntRxFilterFrame =
  42577. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_FILTER_FRAME);
  42578. + /* fmbm_offc */
  42579. + p_BmiStats->cntRxListDmaErr =
  42580. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR);
  42581. + /* fmbm_ofldec */
  42582. + p_BmiStats->cntRxOutOfBuffersDiscard =
  42583. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD);
  42584. + /* fmbm_rodc */
  42585. + p_BmiStats->cntWredDiscard =
  42586. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_WRED_DISCARD);
  42587. + /* fmbm_ofwdc */
  42588. + p_BmiStats->cntLengthErr =
  42589. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_LENGTH_ERR);
  42590. + /* fmbm_ofledc */
  42591. + p_BmiStats->cntUnsupportedFormat =
  42592. + FM_PORT_GetCounter(h_FmPort, e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT);
  42593. + /* fmbm_ofufdc */
  42594. + }
  42595. + return E_OK;
  42596. +}
  42597. +
  42598. +uint32_t FM_PORT_GetCounter(t_Handle h_FmPort, e_FmPortCounters counter)
  42599. +{
  42600. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42601. + bool bmiCounter = FALSE;
  42602. + enum fman_port_stats_counters statsType;
  42603. + enum fman_port_perf_counters perfType;
  42604. + enum fman_port_qmi_counters queueType;
  42605. + bool isStats;
  42606. + t_Error errCode;
  42607. +
  42608. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, 0);
  42609. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42610. +
  42611. + switch (counter)
  42612. + {
  42613. + case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
  42614. + case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
  42615. + case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
  42616. + /* check that counter is available for the port type */
  42617. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  42618. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  42619. + {
  42620. + REPORT_ERROR(MINOR, E_INVALID_STATE,
  42621. + ("Requested counter is not available for Rx ports"));
  42622. + return 0;
  42623. + }
  42624. + bmiCounter = FALSE;
  42625. + break;
  42626. + case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
  42627. + bmiCounter = FALSE;
  42628. + break;
  42629. + default: /* BMI counters (or error - will be checked in BMI routine )*/
  42630. + bmiCounter = TRUE;
  42631. + break;
  42632. + }
  42633. +
  42634. + if (bmiCounter)
  42635. + {
  42636. + errCode = BmiPortCheckAndGetCounterType(p_FmPort, counter, &statsType,
  42637. + &perfType, &isStats);
  42638. + if (errCode != E_OK)
  42639. + {
  42640. + REPORT_ERROR(MINOR, errCode, NO_MSG);
  42641. + return 0;
  42642. + }
  42643. + if (isStats)
  42644. + return fman_port_get_stats_counter(&p_FmPort->port, statsType);
  42645. + else
  42646. + return fman_port_get_perf_counter(&p_FmPort->port, perfType);
  42647. + }
  42648. + else /* QMI counter */
  42649. + {
  42650. + /* check that counters are enabled */
  42651. + if (!(GET_UINT32(p_FmPort->port.qmi_regs->fmqm_pnc)
  42652. + & QMI_PORT_CFG_EN_COUNTERS))
  42653. +
  42654. + {
  42655. + REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter was not enabled"));
  42656. + return 0;
  42657. + }
  42658. +
  42659. + /* Set counter */
  42660. + switch (counter)
  42661. + {
  42662. + case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
  42663. + queueType = E_FMAN_PORT_ENQ_TOTAL;
  42664. + break;
  42665. + case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
  42666. + queueType = E_FMAN_PORT_DEQ_TOTAL;
  42667. + break;
  42668. + case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
  42669. + queueType = E_FMAN_PORT_DEQ_FROM_DFLT;
  42670. + break;
  42671. + case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
  42672. + queueType = E_FMAN_PORT_DEQ_CONFIRM;
  42673. + break;
  42674. + default:
  42675. + REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter is not available"));
  42676. + return 0;
  42677. + }
  42678. +
  42679. + return fman_port_get_qmi_counter(&p_FmPort->port, queueType);
  42680. + }
  42681. +
  42682. + return 0;
  42683. +}
  42684. +
  42685. +t_Error FM_PORT_ModifyCounter(t_Handle h_FmPort, e_FmPortCounters counter,
  42686. + uint32_t value)
  42687. +{
  42688. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42689. + bool bmiCounter = FALSE;
  42690. + enum fman_port_stats_counters statsType;
  42691. + enum fman_port_perf_counters perfType;
  42692. + enum fman_port_qmi_counters queueType;
  42693. + bool isStats;
  42694. + t_Error errCode;
  42695. +
  42696. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42697. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42698. +
  42699. + switch (counter)
  42700. + {
  42701. + case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
  42702. + case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
  42703. + case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
  42704. + /* check that counter is available for the port type */
  42705. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
  42706. + || (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  42707. + RETURN_ERROR(
  42708. + MINOR, E_INVALID_STATE,
  42709. + ("Requested counter is not available for Rx ports"));
  42710. + case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
  42711. + bmiCounter = FALSE;
  42712. + break;
  42713. + default: /* BMI counters (or error - will be checked in BMI routine )*/
  42714. + bmiCounter = TRUE;
  42715. + break;
  42716. + }
  42717. +
  42718. + if (bmiCounter)
  42719. + {
  42720. + errCode = BmiPortCheckAndGetCounterType(p_FmPort, counter, &statsType,
  42721. + &perfType, &isStats);
  42722. + if (errCode != E_OK)
  42723. + {
  42724. + RETURN_ERROR(MINOR, errCode, NO_MSG);
  42725. + }
  42726. + if (isStats)
  42727. + fman_port_set_stats_counter(&p_FmPort->port, statsType, value);
  42728. + else
  42729. + fman_port_set_perf_counter(&p_FmPort->port, perfType, value);
  42730. + }
  42731. + else /* QMI counter */
  42732. + {
  42733. + /* check that counters are enabled */
  42734. + if (!(GET_UINT32(p_FmPort->port.qmi_regs->fmqm_pnc)
  42735. + & QMI_PORT_CFG_EN_COUNTERS))
  42736. + {
  42737. + RETURN_ERROR(MINOR, E_INVALID_STATE,
  42738. + ("Requested counter was not enabled"));
  42739. + }
  42740. +
  42741. + /* Set counter */
  42742. + switch (counter)
  42743. + {
  42744. + case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
  42745. + queueType = E_FMAN_PORT_ENQ_TOTAL;
  42746. + break;
  42747. + case (e_FM_PORT_COUNTERS_DEQ_TOTAL):
  42748. + queueType = E_FMAN_PORT_DEQ_TOTAL;
  42749. + break;
  42750. + case (e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT):
  42751. + queueType = E_FMAN_PORT_DEQ_FROM_DFLT;
  42752. + break;
  42753. + case (e_FM_PORT_COUNTERS_DEQ_CONFIRM):
  42754. + queueType = E_FMAN_PORT_DEQ_CONFIRM;
  42755. + break;
  42756. + default:
  42757. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  42758. + ("Requested counter is not available"));
  42759. + }
  42760. +
  42761. + fman_port_set_qmi_counter(&p_FmPort->port, queueType, value);
  42762. + }
  42763. +
  42764. + return E_OK;
  42765. +}
  42766. +
  42767. +uint32_t FM_PORT_GetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId)
  42768. +{
  42769. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42770. +
  42771. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, 0);
  42772. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42773. +
  42774. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX)
  42775. + && (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  42776. + {
  42777. + REPORT_ERROR(MINOR, E_INVALID_STATE, ("Requested counter is not available for non-Rx ports"));
  42778. + return 0;
  42779. + }
  42780. + return fman_port_get_bpool_counter(&p_FmPort->port, poolId);
  42781. +}
  42782. +
  42783. +t_Error FM_PORT_ModifyAllocBufCounter(t_Handle h_FmPort, uint8_t poolId,
  42784. + uint32_t value)
  42785. +{
  42786. + t_FmPort *p_FmPort = (t_FmPort *)h_FmPort;
  42787. +
  42788. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42789. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42790. +
  42791. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX)
  42792. + && (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  42793. + RETURN_ERROR( MINOR, E_INVALID_STATE,
  42794. + ("Requested counter is not available for non-Rx ports"));
  42795. +
  42796. + fman_port_set_bpool_counter(&p_FmPort->port, poolId, value);
  42797. + return E_OK;
  42798. +}
  42799. +bool FM_PORT_IsStalled(t_Handle h_FmPort)
  42800. +{
  42801. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42802. + t_Error err;
  42803. + bool isStalled;
  42804. +
  42805. + SANITY_CHECK_RETURN_VALUE(p_FmPort, E_INVALID_HANDLE, FALSE);
  42806. + SANITY_CHECK_RETURN_VALUE(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE,
  42807. + FALSE);
  42808. +
  42809. + err = FmIsPortStalled(p_FmPort->h_Fm, p_FmPort->hardwarePortId, &isStalled);
  42810. + if (err != E_OK)
  42811. + {
  42812. + REPORT_ERROR(MAJOR, err, NO_MSG);
  42813. + return TRUE;
  42814. + }
  42815. + return isStalled;
  42816. +}
  42817. +
  42818. +t_Error FM_PORT_ReleaseStalled(t_Handle h_FmPort)
  42819. +{
  42820. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42821. +
  42822. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42823. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42824. +
  42825. + return FmResumeStalledPort(p_FmPort->h_Fm, p_FmPort->hardwarePortId);
  42826. +}
  42827. +
  42828. +t_Error FM_PORT_SetRxL4ChecksumVerify(t_Handle h_FmPort, bool l4Checksum)
  42829. +{
  42830. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42831. + int err;
  42832. +
  42833. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42834. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  42835. +
  42836. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  42837. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  42838. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  42839. + ("available for Rx ports only"));
  42840. +
  42841. + if (l4Checksum)
  42842. + err = fman_port_modify_rx_fd_bits(
  42843. + &p_FmPort->port, (uint8_t)(BMI_PORT_RFNE_FRWD_DCL4C >> 24),
  42844. + TRUE);
  42845. + else
  42846. + err = fman_port_modify_rx_fd_bits(
  42847. + &p_FmPort->port, (uint8_t)(BMI_PORT_RFNE_FRWD_DCL4C >> 24),
  42848. + FALSE);
  42849. + if (err != 0)
  42850. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_modify_rx_fd_bits"));
  42851. +
  42852. + return E_OK;
  42853. +}
  42854. +
  42855. +/*****************************************************************************/
  42856. +/* API Run-time PCD Control unit functions */
  42857. +/*****************************************************************************/
  42858. +
  42859. +#if (DPAA_VERSION >= 11)
  42860. +t_Error FM_PORT_VSPAlloc(t_Handle h_FmPort, t_FmPortVSPAllocParams *p_VSPParams)
  42861. +{
  42862. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42863. + t_Error err = E_OK;
  42864. + volatile uint32_t *p_BmiStorageProfileId = NULL, *p_BmiVspe = NULL;
  42865. + uint32_t tmpReg = 0, tmp = 0;
  42866. + uint16_t hwStoragePrflId;
  42867. +
  42868. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  42869. + SANITY_CHECK_RETURN_ERROR(p_FmPort->h_Fm, E_INVALID_HANDLE);
  42870. + /*for numOfProfiles = 0 don't call this function*/
  42871. + SANITY_CHECK_RETURN_ERROR(p_VSPParams->numOfProfiles, E_INVALID_VALUE);
  42872. + /*dfltRelativeId should be in the range of numOfProfiles*/
  42873. + SANITY_CHECK_RETURN_ERROR(
  42874. + p_VSPParams->dfltRelativeId < p_VSPParams->numOfProfiles,
  42875. + E_INVALID_VALUE);
  42876. + /*p_FmPort should be from Rx type or OP*/
  42877. + SANITY_CHECK_RETURN_ERROR(
  42878. + ((p_FmPort->portType == e_FM_PORT_TYPE_RX_10G) || (p_FmPort->portType == e_FM_PORT_TYPE_RX) || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)),
  42879. + E_INVALID_VALUE);
  42880. + /*port should be disabled*/
  42881. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->enabled, E_INVALID_STATE);
  42882. + /*if its called for Rx port relevant Tx Port should be passed (initialized) too and it should be disabled*/
  42883. + SANITY_CHECK_RETURN_ERROR(
  42884. + ((p_VSPParams->h_FmTxPort && !((t_FmPort *)(p_VSPParams->h_FmTxPort))->enabled) || (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)),
  42885. + E_INVALID_VALUE);
  42886. + /*should be called before SetPCD - this port should be without PCD*/
  42887. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->pcdEngines, E_INVALID_STATE);
  42888. +
  42889. + /*alloc window of VSPs for this port*/
  42890. + err = FmVSPAllocForPort(p_FmPort->h_Fm, p_FmPort->portType,
  42891. + p_FmPort->portId, p_VSPParams->numOfProfiles);
  42892. + if (err != E_OK)
  42893. + RETURN_ERROR(MAJOR, err, NO_MSG);
  42894. +
  42895. + /*get absolute VSP ID for dfltRelative*/
  42896. + err = FmVSPGetAbsoluteProfileId(p_FmPort->h_Fm, p_FmPort->portType,
  42897. + p_FmPort->portId,
  42898. + p_VSPParams->dfltRelativeId,
  42899. + &hwStoragePrflId);
  42900. + if (err != E_OK)
  42901. + RETURN_ERROR(MAJOR, err, NO_MSG);
  42902. +
  42903. + /*fill relevant registers for p_FmPort and relative TxPort in the case p_FmPort from Rx type*/
  42904. + switch (p_FmPort->portType)
  42905. + {
  42906. + case (e_FM_PORT_TYPE_RX_10G):
  42907. + case (e_FM_PORT_TYPE_RX):
  42908. + p_BmiStorageProfileId =
  42909. + &(((t_FmPort *)(p_VSPParams->h_FmTxPort))->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfqid);
  42910. + p_BmiVspe =
  42911. + &(((t_FmPort *)(p_VSPParams->h_FmTxPort))->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tfne);
  42912. +
  42913. + tmpReg = GET_UINT32(*p_BmiStorageProfileId) & ~BMI_SP_ID_MASK;
  42914. + tmpReg |= (uint32_t)hwStoragePrflId << BMI_SP_ID_SHIFT;
  42915. + WRITE_UINT32(*p_BmiStorageProfileId, tmpReg);
  42916. +
  42917. + tmpReg = GET_UINT32(*p_BmiVspe);
  42918. + WRITE_UINT32(*p_BmiVspe, tmpReg | BMI_SP_EN);
  42919. +
  42920. + p_BmiStorageProfileId =
  42921. + &p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfqid;
  42922. + p_BmiVspe = &p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rpp;
  42923. + hwStoragePrflId = p_VSPParams->dfltRelativeId;
  42924. + break;
  42925. +
  42926. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  42927. + tmpReg = NIA_ENG_BMI | NIA_BMI_AC_FETCH_ALL_FRAME;
  42928. + WRITE_UINT32( p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs.fmqm_pndn,
  42929. + tmpReg);
  42930. +
  42931. + p_BmiStorageProfileId =
  42932. + &p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofqid;
  42933. + p_BmiVspe = &p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_opp;
  42934. + tmp |= BMI_EBD_EN;
  42935. + break;
  42936. +
  42937. + default:
  42938. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  42939. + ("available for Rx and offline parsing ports only"));
  42940. + }
  42941. +
  42942. + p_FmPort->vspe = TRUE;
  42943. + p_FmPort->dfltRelativeId = p_VSPParams->dfltRelativeId;
  42944. +
  42945. + tmpReg = GET_UINT32(*p_BmiStorageProfileId) & ~BMI_SP_ID_MASK;
  42946. + tmpReg |= (uint32_t)hwStoragePrflId << BMI_SP_ID_SHIFT;
  42947. + WRITE_UINT32(*p_BmiStorageProfileId, tmpReg);
  42948. +
  42949. + tmpReg = GET_UINT32(*p_BmiVspe);
  42950. + WRITE_UINT32(*p_BmiVspe, tmpReg | BMI_SP_EN | tmp);
  42951. + return E_OK;
  42952. +}
  42953. +#endif /* (DPAA_VERSION >= 11) */
  42954. +
  42955. +t_Error FM_PORT_PcdPlcrAllocProfiles(t_Handle h_FmPort, uint16_t numOfProfiles)
  42956. +{
  42957. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42958. + t_Error err = E_OK;
  42959. +
  42960. + p_FmPort->h_FmPcd = FmGetPcdHandle(p_FmPort->h_Fm);
  42961. + ASSERT_COND(p_FmPort->h_FmPcd);
  42962. +
  42963. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  42964. + {
  42965. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  42966. + return ERROR_CODE(E_BUSY);
  42967. + }
  42968. +
  42969. + if (numOfProfiles)
  42970. + {
  42971. + err = FmPcdPlcrAllocProfiles(p_FmPort->h_FmPcd,
  42972. + p_FmPort->hardwarePortId, numOfProfiles);
  42973. + if (err)
  42974. + RETURN_ERROR(MAJOR, err, NO_MSG);
  42975. + }
  42976. + /* set the port handle within the PCD policer, even if no profiles defined */
  42977. + FmPcdPortRegister(p_FmPort->h_FmPcd, h_FmPort, p_FmPort->hardwarePortId);
  42978. +
  42979. + RELEASE_LOCK(p_FmPort->lock);
  42980. +
  42981. + return E_OK;
  42982. +}
  42983. +
  42984. +t_Error FM_PORT_PcdPlcrFreeProfiles(t_Handle h_FmPort)
  42985. +{
  42986. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  42987. + t_Error err = E_OK;
  42988. +
  42989. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  42990. + {
  42991. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  42992. + return ERROR_CODE(E_BUSY);
  42993. + }
  42994. +
  42995. + err = FmPcdPlcrFreeProfiles(p_FmPort->h_FmPcd, p_FmPort->hardwarePortId);
  42996. +
  42997. + RELEASE_LOCK(p_FmPort->lock);
  42998. +
  42999. + if (err)
  43000. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43001. +
  43002. + return E_OK;
  43003. +}
  43004. +
  43005. +t_Error FM_PORT_PcdKgModifyInitialScheme(t_Handle h_FmPort,
  43006. + t_FmPcdKgSchemeSelect *p_FmPcdKgScheme)
  43007. +{
  43008. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43009. + volatile uint32_t *p_BmiHpnia = NULL;
  43010. + uint32_t tmpReg;
  43011. + uint8_t relativeSchemeId;
  43012. + uint8_t physicalSchemeId;
  43013. +
  43014. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  43015. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43016. + SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_KG,
  43017. + E_INVALID_STATE);
  43018. +
  43019. + tmpReg = (uint32_t)((p_FmPort->pcdEngines & FM_PCD_CC) ? NIA_KG_CC_EN : 0);
  43020. + switch (p_FmPort->portType)
  43021. + {
  43022. + case (e_FM_PORT_TYPE_RX_10G):
  43023. + case (e_FM_PORT_TYPE_RX):
  43024. + p_BmiHpnia = &p_FmPort->port.bmi_regs->rx.fmbm_rfpne;
  43025. + break;
  43026. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  43027. + p_BmiHpnia = &p_FmPort->port.bmi_regs->oh.fmbm_ofpne;
  43028. + break;
  43029. + default:
  43030. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43031. + ("available for Rx and offline parsing ports only"));
  43032. + }
  43033. +
  43034. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43035. + {
  43036. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43037. + return ERROR_CODE(E_BUSY);
  43038. + }
  43039. +
  43040. + /* if we want to change to direct scheme, we need to check that this scheme is valid */
  43041. + if (p_FmPcdKgScheme->direct)
  43042. + {
  43043. + physicalSchemeId = FmPcdKgGetSchemeId(p_FmPcdKgScheme->h_DirectScheme);
  43044. + /* check that this scheme is bound to this port */
  43045. + if (!(p_FmPort->schemesPerPortVector
  43046. + & (uint32_t)(1 << (31 - (uint32_t)physicalSchemeId))))
  43047. + {
  43048. + RELEASE_LOCK(p_FmPort->lock);
  43049. + RETURN_ERROR(
  43050. + MAJOR, E_INVALID_STATE,
  43051. + ("called with a scheme that is not bound to this port"));
  43052. + }
  43053. +
  43054. + relativeSchemeId = FmPcdKgGetRelativeSchemeId(p_FmPort->h_FmPcd,
  43055. + physicalSchemeId);
  43056. + if (relativeSchemeId >= FM_PCD_KG_NUM_OF_SCHEMES)
  43057. + {
  43058. + RELEASE_LOCK(p_FmPort->lock);
  43059. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE,
  43060. + ("called with invalid Scheme "));
  43061. + }
  43062. +
  43063. + if (!FmPcdKgIsSchemeValidSw(p_FmPcdKgScheme->h_DirectScheme))
  43064. + {
  43065. + RELEASE_LOCK(p_FmPort->lock);
  43066. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  43067. + ("called with uninitialized Scheme "));
  43068. + }
  43069. +
  43070. + WRITE_UINT32(
  43071. + *p_BmiHpnia,
  43072. + NIA_ENG_KG | tmpReg | NIA_KG_DIRECT | (uint32_t)physicalSchemeId);
  43073. + }
  43074. + else
  43075. + /* change to indirect scheme */
  43076. + WRITE_UINT32(*p_BmiHpnia, NIA_ENG_KG | tmpReg);
  43077. + RELEASE_LOCK(p_FmPort->lock);
  43078. +
  43079. + return E_OK;
  43080. +}
  43081. +
  43082. +t_Error FM_PORT_PcdPlcrModifyInitialProfile(t_Handle h_FmPort,
  43083. + t_Handle h_Profile)
  43084. +{
  43085. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43086. + volatile uint32_t *p_BmiNia;
  43087. + volatile uint32_t *p_BmiHpnia;
  43088. + uint32_t tmpReg;
  43089. + uint16_t absoluteProfileId = FmPcdPlcrProfileGetAbsoluteId(h_Profile);
  43090. +
  43091. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  43092. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43093. + SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_PLCR,
  43094. + E_INVALID_STATE);
  43095. +
  43096. + /* check relevance of this routine - only when policer is used
  43097. + directly after BMI or Parser */
  43098. + if ((p_FmPort->pcdEngines & FM_PCD_KG)
  43099. + || (p_FmPort->pcdEngines & FM_PCD_CC))
  43100. + RETURN_ERROR(
  43101. + MAJOR,
  43102. + E_INVALID_STATE,
  43103. + ("relevant only when PCD support mode is e_FM_PCD_SUPPORT_PLCR_ONLY or e_FM_PCD_SUPPORT_PRS_AND_PLCR"));
  43104. +
  43105. + switch (p_FmPort->portType)
  43106. + {
  43107. + case (e_FM_PORT_TYPE_RX_10G):
  43108. + case (e_FM_PORT_TYPE_RX):
  43109. + p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
  43110. + p_BmiHpnia = &p_FmPort->port.bmi_regs->rx.fmbm_rfpne;
  43111. + tmpReg = GET_UINT32(*p_BmiNia) & BMI_RFNE_FDCS_MASK;
  43112. + break;
  43113. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  43114. + p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
  43115. + p_BmiHpnia = &p_FmPort->port.bmi_regs->oh.fmbm_ofpne;
  43116. + tmpReg = 0;
  43117. + break;
  43118. + default:
  43119. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43120. + ("available for Rx and offline parsing ports only"));
  43121. + }
  43122. +
  43123. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43124. + {
  43125. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43126. + return ERROR_CODE(E_BUSY);
  43127. + }
  43128. +
  43129. + if (!FmPcdPlcrIsProfileValid(p_FmPort->h_FmPcd, absoluteProfileId))
  43130. + {
  43131. + RELEASE_LOCK(p_FmPort->lock);
  43132. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("Invalid profile"));
  43133. + }
  43134. +
  43135. + tmpReg |= (uint32_t)(NIA_ENG_PLCR | NIA_PLCR_ABSOLUTE | absoluteProfileId);
  43136. +
  43137. + if (p_FmPort->pcdEngines & FM_PCD_PRS) /* e_FM_PCD_SUPPORT_PRS_AND_PLCR */
  43138. + {
  43139. + /* update BMI HPNIA */
  43140. + WRITE_UINT32(*p_BmiHpnia, tmpReg);
  43141. + }
  43142. + else /* e_FM_PCD_SUPPORT_PLCR_ONLY */
  43143. + {
  43144. + /* rfne may contain FDCS bits, so first we read them. */
  43145. + tmpReg |= (GET_UINT32(*p_BmiNia) & BMI_RFNE_FDCS_MASK);
  43146. + /* update BMI NIA */
  43147. + WRITE_UINT32(*p_BmiNia, tmpReg);
  43148. + }RELEASE_LOCK(p_FmPort->lock);
  43149. +
  43150. + return E_OK;
  43151. +}
  43152. +
  43153. +t_Error FM_PORT_PcdCcModifyTree(t_Handle h_FmPort, t_Handle h_CcTree)
  43154. +{
  43155. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43156. + t_Error err = E_OK;
  43157. + volatile uint32_t *p_BmiCcBase = NULL;
  43158. + volatile uint32_t *p_BmiNia = NULL;
  43159. + uint32_t ccTreePhysOffset;
  43160. +
  43161. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  43162. + SANITY_CHECK_RETURN_ERROR(h_CcTree, E_INVALID_HANDLE);
  43163. +
  43164. + if (p_FmPort->imEn)
  43165. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  43166. + ("available for non-independent mode ports only"));
  43167. +
  43168. + /* get PCD registers pointers */
  43169. + switch (p_FmPort->portType)
  43170. + {
  43171. + case (e_FM_PORT_TYPE_RX_10G):
  43172. + case (e_FM_PORT_TYPE_RX):
  43173. + p_BmiNia = &p_FmPort->port.bmi_regs->rx.fmbm_rfne;
  43174. + break;
  43175. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  43176. + p_BmiNia = &p_FmPort->port.bmi_regs->oh.fmbm_ofne;
  43177. + break;
  43178. + default:
  43179. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43180. + ("available for Rx and offline parsing ports only"));
  43181. + }
  43182. +
  43183. + /* check that current NIA is BMI to BMI */
  43184. + if ((GET_UINT32(*p_BmiNia) & ~BMI_RFNE_FDCS_MASK)
  43185. + != GET_NIA_BMI_AC_ENQ_FRAME(p_FmPort->h_FmPcd))
  43186. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43187. + ("may be called only for ports in BMI-to-BMI state."));
  43188. +
  43189. + if (p_FmPort->pcdEngines & FM_PCD_CC)
  43190. + {
  43191. + if (p_FmPort->h_IpReassemblyManip)
  43192. + {
  43193. + err = FmPcdCcTreeAddIPR(p_FmPort->h_FmPcd, h_CcTree, NULL,
  43194. + p_FmPort->h_IpReassemblyManip, FALSE);
  43195. + if (err != E_OK)
  43196. + {
  43197. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43198. + }
  43199. + }
  43200. + else
  43201. + if (p_FmPort->h_CapwapReassemblyManip)
  43202. + {
  43203. + err = FmPcdCcTreeAddCPR(p_FmPort->h_FmPcd, h_CcTree, NULL,
  43204. + p_FmPort->h_CapwapReassemblyManip,
  43205. + FALSE);
  43206. + if (err != E_OK)
  43207. + {
  43208. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43209. + }
  43210. + }
  43211. + switch (p_FmPort->portType)
  43212. + {
  43213. + case (e_FM_PORT_TYPE_RX_10G):
  43214. + case (e_FM_PORT_TYPE_RX):
  43215. + p_BmiCcBase = &p_FmPort->port.bmi_regs->rx.fmbm_rccb;
  43216. + break;
  43217. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  43218. + p_BmiCcBase = &p_FmPort->port.bmi_regs->oh.fmbm_occb;
  43219. + break;
  43220. + default:
  43221. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Invalid port type"));
  43222. + }
  43223. +
  43224. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43225. + {
  43226. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43227. + return ERROR_CODE(E_BUSY);
  43228. + }
  43229. + err = FmPcdCcBindTree(p_FmPort->h_FmPcd, NULL, h_CcTree,
  43230. + &ccTreePhysOffset, h_FmPort);
  43231. + if (err)
  43232. + {
  43233. + RELEASE_LOCK(p_FmPort->lock);
  43234. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43235. + }WRITE_UINT32(*p_BmiCcBase, ccTreePhysOffset);
  43236. +
  43237. + p_FmPort->ccTreeId = h_CcTree;
  43238. + RELEASE_LOCK(p_FmPort->lock);
  43239. + }
  43240. + else
  43241. + RETURN_ERROR( MAJOR, E_INVALID_STATE,
  43242. + ("Coarse Classification not defined for this port."));
  43243. +
  43244. + return E_OK;
  43245. +}
  43246. +
  43247. +t_Error FM_PORT_AttachPCD(t_Handle h_FmPort)
  43248. +{
  43249. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43250. + t_Error err = E_OK;
  43251. +
  43252. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  43253. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43254. +
  43255. + if (p_FmPort->imEn)
  43256. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  43257. + ("available for non-independent mode ports only"));
  43258. +
  43259. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  43260. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  43261. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  43262. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43263. + ("available for Rx and offline parsing ports only"));
  43264. +
  43265. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43266. + {
  43267. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43268. + return ERROR_CODE(E_BUSY);
  43269. + }
  43270. +
  43271. + if (p_FmPort->h_ReassemblyTree)
  43272. + p_FmPort->pcdEngines |= FM_PCD_CC;
  43273. +
  43274. + err = AttachPCD(h_FmPort);
  43275. + RELEASE_LOCK(p_FmPort->lock);
  43276. +
  43277. + return err;
  43278. +}
  43279. +
  43280. +t_Error FM_PORT_DetachPCD(t_Handle h_FmPort)
  43281. +{
  43282. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43283. + t_Error err = E_OK;
  43284. +
  43285. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  43286. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43287. +
  43288. + if (p_FmPort->imEn)
  43289. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  43290. + ("available for non-independent mode ports only"));
  43291. +
  43292. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  43293. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  43294. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  43295. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43296. + ("available for Rx and offline parsing ports only"));
  43297. +
  43298. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43299. + {
  43300. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43301. + return ERROR_CODE(E_BUSY);
  43302. + }
  43303. +
  43304. + err = DetachPCD(h_FmPort);
  43305. + if (err != E_OK)
  43306. + {
  43307. + RELEASE_LOCK(p_FmPort->lock);
  43308. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43309. + }
  43310. +
  43311. + if (p_FmPort->h_ReassemblyTree)
  43312. + p_FmPort->pcdEngines &= ~FM_PCD_CC;
  43313. + RELEASE_LOCK(p_FmPort->lock);
  43314. +
  43315. + return E_OK;
  43316. +}
  43317. +
  43318. +t_Error FM_PORT_SetPCD(t_Handle h_FmPort, t_FmPortPcdParams *p_PcdParam)
  43319. +{
  43320. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43321. + t_Error err = E_OK;
  43322. + t_FmPortPcdParams modifiedPcdParams, *p_PcdParams;
  43323. + t_FmPcdCcTreeParams *p_FmPcdCcTreeParams;
  43324. + t_FmPortPcdCcParams fmPortPcdCcParams;
  43325. + t_FmPortGetSetCcParams fmPortGetSetCcParams;
  43326. +
  43327. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  43328. + SANITY_CHECK_RETURN_ERROR(p_PcdParam, E_NULL_POINTER);
  43329. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43330. +
  43331. + if (p_FmPort->imEn)
  43332. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  43333. + ("available for non-independent mode ports only"));
  43334. +
  43335. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  43336. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  43337. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  43338. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43339. + ("available for Rx and offline parsing ports only"));
  43340. +
  43341. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43342. + {
  43343. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43344. + return ERROR_CODE(E_BUSY);
  43345. + }
  43346. +
  43347. + p_FmPort->h_FmPcd = FmGetPcdHandle(p_FmPort->h_Fm);
  43348. + ASSERT_COND(p_FmPort->h_FmPcd);
  43349. +
  43350. + if (p_PcdParam->p_CcParams && !p_PcdParam->p_CcParams->h_CcTree)
  43351. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE,
  43352. + ("Tree handle must be given if CC is required"));
  43353. +
  43354. + memcpy(&modifiedPcdParams, p_PcdParam, sizeof(t_FmPortPcdParams));
  43355. + p_PcdParams = &modifiedPcdParams;
  43356. + if ((p_PcdParams->h_IpReassemblyManip)
  43357. +#if (DPAA_VERSION >= 11)
  43358. + || (p_PcdParams->h_CapwapReassemblyManip)
  43359. +#endif /* (DPAA_VERSION >= 11) */
  43360. + )
  43361. + {
  43362. + if ((p_PcdParams->pcdSupport != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG)
  43363. + && (p_PcdParams->pcdSupport
  43364. + != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC)
  43365. + && (p_PcdParams->pcdSupport
  43366. + != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR)
  43367. + && (p_PcdParams->pcdSupport
  43368. + != e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR))
  43369. + {
  43370. + RELEASE_LOCK(p_FmPort->lock);
  43371. + RETURN_ERROR( MAJOR, E_INVALID_STATE,
  43372. + ("pcdSupport must have KG for supporting Reassembly"));
  43373. + }
  43374. + p_FmPort->h_IpReassemblyManip = p_PcdParams->h_IpReassemblyManip;
  43375. +#if (DPAA_VERSION >= 11)
  43376. + if ((p_PcdParams->h_IpReassemblyManip)
  43377. + && (p_PcdParams->h_CapwapReassemblyManip))
  43378. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  43379. + ("Either IP-R or CAPWAP-R is allowed"));
  43380. + if ((p_PcdParams->h_CapwapReassemblyManip)
  43381. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  43382. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  43383. + ("CAPWAP-R is allowed only on offline-port"));
  43384. + if (p_PcdParams->h_CapwapReassemblyManip)
  43385. + p_FmPort->h_CapwapReassemblyManip =
  43386. + p_PcdParams->h_CapwapReassemblyManip;
  43387. +#endif /* (DPAA_VERSION >= 11) */
  43388. +
  43389. + if (!p_PcdParams->p_CcParams)
  43390. + {
  43391. + if (!((p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_PRS_AND_KG)
  43392. + || (p_PcdParams->pcdSupport
  43393. + == e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR)))
  43394. + {
  43395. + RELEASE_LOCK(p_FmPort->lock);
  43396. + RETURN_ERROR(
  43397. + MAJOR,
  43398. + E_INVALID_STATE,
  43399. + ("PCD initialization structure is not consistent with pcdSupport"));
  43400. + }
  43401. +
  43402. + /* No user-tree, need to build internal tree */
  43403. + p_FmPcdCcTreeParams = (t_FmPcdCcTreeParams*)XX_Malloc(
  43404. + sizeof(t_FmPcdCcTreeParams));
  43405. + if (!p_FmPcdCcTreeParams)
  43406. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_FmPcdCcTreeParams"));
  43407. + memset(p_FmPcdCcTreeParams, 0, sizeof(t_FmPcdCcTreeParams));
  43408. + p_FmPcdCcTreeParams->h_NetEnv = p_PcdParams->h_NetEnv;
  43409. + p_FmPort->h_ReassemblyTree = FM_PCD_CcRootBuild(
  43410. + p_FmPort->h_FmPcd, p_FmPcdCcTreeParams);
  43411. +
  43412. + if (!p_FmPort->h_ReassemblyTree)
  43413. + {
  43414. + RELEASE_LOCK(p_FmPort->lock);
  43415. + XX_Free(p_FmPcdCcTreeParams);
  43416. + RETURN_ERROR( MAJOR, E_INVALID_HANDLE,
  43417. + ("FM_PCD_CcBuildTree for Reassembly failed"));
  43418. + }
  43419. + if (p_PcdParams->pcdSupport == e_FM_PORT_PCD_SUPPORT_PRS_AND_KG)
  43420. + p_PcdParams->pcdSupport =
  43421. + e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC;
  43422. + else
  43423. + p_PcdParams->pcdSupport =
  43424. + e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR;
  43425. +
  43426. + memset(&fmPortPcdCcParams, 0, sizeof(t_FmPortPcdCcParams));
  43427. + fmPortPcdCcParams.h_CcTree = p_FmPort->h_ReassemblyTree;
  43428. + p_PcdParams->p_CcParams = &fmPortPcdCcParams;
  43429. + XX_Free(p_FmPcdCcTreeParams);
  43430. + }
  43431. +
  43432. + if (p_FmPort->h_IpReassemblyManip)
  43433. + err = FmPcdCcTreeAddIPR(p_FmPort->h_FmPcd,
  43434. + p_PcdParams->p_CcParams->h_CcTree,
  43435. + p_PcdParams->h_NetEnv,
  43436. + p_FmPort->h_IpReassemblyManip, TRUE);
  43437. +#if (DPAA_VERSION >= 11)
  43438. + else
  43439. + if (p_FmPort->h_CapwapReassemblyManip)
  43440. + err = FmPcdCcTreeAddCPR(p_FmPort->h_FmPcd,
  43441. + p_PcdParams->p_CcParams->h_CcTree,
  43442. + p_PcdParams->h_NetEnv,
  43443. + p_FmPort->h_CapwapReassemblyManip,
  43444. + TRUE);
  43445. +#endif /* (DPAA_VERSION >= 11) */
  43446. +
  43447. + if (err != E_OK)
  43448. + {
  43449. + if (p_FmPort->h_ReassemblyTree)
  43450. + {
  43451. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43452. + p_FmPort->h_ReassemblyTree = NULL;
  43453. + }RELEASE_LOCK(p_FmPort->lock);
  43454. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43455. + }
  43456. + }
  43457. +
  43458. + if (!FmPcdLockTryLockAll(p_FmPort->h_FmPcd))
  43459. + {
  43460. + if (p_FmPort->h_ReassemblyTree)
  43461. + {
  43462. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43463. + p_FmPort->h_ReassemblyTree = NULL;
  43464. + }RELEASE_LOCK(p_FmPort->lock);
  43465. + DBG(TRACE, ("Try LockAll - BUSY"));
  43466. + return ERROR_CODE(E_BUSY);
  43467. + }
  43468. +
  43469. + err = SetPcd(h_FmPort, p_PcdParams);
  43470. + if (err)
  43471. + {
  43472. + if (p_FmPort->h_ReassemblyTree)
  43473. + {
  43474. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43475. + p_FmPort->h_ReassemblyTree = NULL;
  43476. + }
  43477. + FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
  43478. + RELEASE_LOCK(p_FmPort->lock);
  43479. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43480. + }
  43481. +
  43482. + if ((p_FmPort->pcdEngines & FM_PCD_PRS)
  43483. + && (p_PcdParams->p_PrsParams->includeInPrsStatistics))
  43484. + {
  43485. + err = FmPcdPrsIncludePortInStatistics(p_FmPort->h_FmPcd,
  43486. + p_FmPort->hardwarePortId, TRUE);
  43487. + if (err)
  43488. + {
  43489. + DeletePcd(p_FmPort);
  43490. + if (p_FmPort->h_ReassemblyTree)
  43491. + {
  43492. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43493. + p_FmPort->h_ReassemblyTree = NULL;
  43494. + }
  43495. + FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
  43496. + RELEASE_LOCK(p_FmPort->lock);
  43497. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43498. + }
  43499. + p_FmPort->includeInPrsStatistics = TRUE;
  43500. + }
  43501. +
  43502. + FmPcdIncNetEnvOwners(p_FmPort->h_FmPcd, p_FmPort->netEnvId);
  43503. +
  43504. + if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd))
  43505. + {
  43506. + memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
  43507. +
  43508. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  43509. + {
  43510. +#ifdef FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004
  43511. + if ((p_FmPort->fmRevInfo.majorRev < 6) &&
  43512. + (p_FmPort->pcdEngines & FM_PCD_KG))
  43513. + {
  43514. + int i;
  43515. + for (i = 0; i<p_PcdParams->p_KgParams->numOfSchemes; i++)
  43516. + /* The following function must be locked */
  43517. + FmPcdKgCcGetSetParams(p_FmPort->h_FmPcd,
  43518. + p_PcdParams->p_KgParams->h_Schemes[i],
  43519. + UPDATE_KG_NIA_CC_WA,
  43520. + 0);
  43521. + }
  43522. +#endif /* FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004 */
  43523. +
  43524. +#if (DPAA_VERSION >= 11)
  43525. + {
  43526. + t_FmPcdCtrlParamsPage *p_ParamsPage;
  43527. +
  43528. + FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
  43529. + (void**)&p_ParamsPage);
  43530. + ASSERT_COND(p_ParamsPage);
  43531. + WRITE_UINT32(p_ParamsPage->postBmiFetchNia,
  43532. + p_FmPort->savedBmiNia);
  43533. + }
  43534. +#endif /* (DPAA_VERSION >= 11) */
  43535. +
  43536. + /* Set post-bmi-fetch nia */
  43537. + p_FmPort->savedBmiNia &= BMI_RFNE_FDCS_MASK;
  43538. + p_FmPort->savedBmiNia |= (NIA_FM_CTL_AC_POST_BMI_FETCH
  43539. + | NIA_ENG_FM_CTL);
  43540. +
  43541. + /* Set pre-bmi-fetch nia */
  43542. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNDN;
  43543. +#if (DPAA_VERSION >= 11)
  43544. + fmPortGetSetCcParams.setCcParams.nia =
  43545. + (NIA_FM_CTL_AC_PRE_BMI_FETCH_FULL_FRAME | NIA_ENG_FM_CTL);
  43546. +#else
  43547. + fmPortGetSetCcParams.setCcParams.nia = (NIA_FM_CTL_AC_PRE_BMI_FETCH_HEADER | NIA_ENG_FM_CTL);
  43548. +#endif /* (DPAA_VERSION >= 11) */
  43549. + if ((err = FmPortGetSetCcParams(p_FmPort, &fmPortGetSetCcParams))
  43550. + != E_OK)
  43551. + {
  43552. + DeletePcd(p_FmPort);
  43553. + if (p_FmPort->h_ReassemblyTree)
  43554. + {
  43555. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43556. + p_FmPort->h_ReassemblyTree = NULL;
  43557. + }
  43558. + FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
  43559. + RELEASE_LOCK(p_FmPort->lock);
  43560. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43561. + }
  43562. + }
  43563. +
  43564. + FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
  43565. +
  43566. + /* Set pop-to-next-step nia */
  43567. +#if (DPAA_VERSION == 10)
  43568. + if (p_FmPort->fmRevInfo.majorRev < 6)
  43569. + {
  43570. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_PNEN;
  43571. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
  43572. + }
  43573. + else
  43574. + {
  43575. +#endif /* (DPAA_VERSION == 10) */
  43576. + fmPortGetSetCcParams.getCcParams.type = GET_NIA_FPNE;
  43577. +#if (DPAA_VERSION == 10)
  43578. + }
  43579. +#endif /* (DPAA_VERSION == 10) */
  43580. + if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
  43581. + != E_OK)
  43582. + {
  43583. + DeletePcd(p_FmPort);
  43584. + if (p_FmPort->h_ReassemblyTree)
  43585. + {
  43586. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43587. + p_FmPort->h_ReassemblyTree = NULL;
  43588. + }RELEASE_LOCK(p_FmPort->lock);
  43589. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43590. + }
  43591. +
  43592. + /* Set post-bmi-prepare-to-enq nia */
  43593. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_FENE;
  43594. + fmPortGetSetCcParams.setCcParams.nia = (NIA_FM_CTL_AC_POST_BMI_ENQ
  43595. + | NIA_ENG_FM_CTL);
  43596. + if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
  43597. + != E_OK)
  43598. + {
  43599. + DeletePcd(p_FmPort);
  43600. + if (p_FmPort->h_ReassemblyTree)
  43601. + {
  43602. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43603. + p_FmPort->h_ReassemblyTree = NULL;
  43604. + }RELEASE_LOCK(p_FmPort->lock);
  43605. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43606. + }
  43607. +
  43608. + if ((p_FmPort->h_IpReassemblyManip)
  43609. + || (p_FmPort->h_CapwapReassemblyManip))
  43610. + {
  43611. +#if (DPAA_VERSION == 10)
  43612. + if (p_FmPort->fmRevInfo.majorRev < 6)
  43613. + {
  43614. + /* Overwrite post-bmi-prepare-to-enq nia */
  43615. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_FENE;
  43616. + fmPortGetSetCcParams.setCcParams.nia = (NIA_FM_CTL_AC_POST_BMI_ENQ_ORR | NIA_ENG_FM_CTL | NIA_ORDER_RESTOR);
  43617. + fmPortGetSetCcParams.setCcParams.overwrite = TRUE;
  43618. + }
  43619. + else
  43620. + {
  43621. +#endif /* (DPAA_VERSION == 10) */
  43622. + /* Set the ORR bit (for order-restoration) */
  43623. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_FPNE;
  43624. + fmPortGetSetCcParams.setCcParams.nia =
  43625. + fmPortGetSetCcParams.getCcParams.nia | NIA_ORDER_RESTOR;
  43626. +#if (DPAA_VERSION == 10)
  43627. + }
  43628. +#endif /* (DPAA_VERSION == 10) */
  43629. + if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
  43630. + != E_OK)
  43631. + {
  43632. + DeletePcd(p_FmPort);
  43633. + if (p_FmPort->h_ReassemblyTree)
  43634. + {
  43635. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43636. + p_FmPort->h_ReassemblyTree = NULL;
  43637. + }RELEASE_LOCK(p_FmPort->lock);
  43638. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43639. + }
  43640. + }
  43641. + }
  43642. + else
  43643. + FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
  43644. +
  43645. +#if (DPAA_VERSION >= 11)
  43646. + {
  43647. + t_FmPcdCtrlParamsPage *p_ParamsPage;
  43648. +
  43649. + memset(&fmPortGetSetCcParams, 0, sizeof(t_FmPortGetSetCcParams));
  43650. +
  43651. + fmPortGetSetCcParams.setCcParams.type = UPDATE_NIA_CMNE;
  43652. + if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd))
  43653. + fmPortGetSetCcParams.setCcParams.nia = NIA_FM_CTL_AC_POP_TO_N_STEP
  43654. + | NIA_ENG_FM_CTL;
  43655. + else
  43656. + fmPortGetSetCcParams.setCcParams.nia =
  43657. + NIA_FM_CTL_AC_NO_IPACC_POP_TO_N_STEP | NIA_ENG_FM_CTL;
  43658. + if ((err = FmPortGetSetCcParams(h_FmPort, &fmPortGetSetCcParams))
  43659. + != E_OK)
  43660. + {
  43661. + DeletePcd(p_FmPort);
  43662. + if (p_FmPort->h_ReassemblyTree)
  43663. + {
  43664. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43665. + p_FmPort->h_ReassemblyTree = NULL;
  43666. + }RELEASE_LOCK(p_FmPort->lock);
  43667. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43668. + }
  43669. +
  43670. + FmPortSetGprFunc(p_FmPort, e_FM_PORT_GPR_MURAM_PAGE,
  43671. + (void**)&p_ParamsPage);
  43672. + ASSERT_COND(p_ParamsPage);
  43673. +
  43674. + if (FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd))
  43675. + WRITE_UINT32(
  43676. + p_ParamsPage->misc,
  43677. + GET_UINT32(p_ParamsPage->misc) | FM_CTL_PARAMS_PAGE_OFFLOAD_SUPPORT_EN);
  43678. +
  43679. + if ((p_FmPort->h_IpReassemblyManip)
  43680. + || (p_FmPort->h_CapwapReassemblyManip))
  43681. + {
  43682. + if (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  43683. + WRITE_UINT32(
  43684. + p_ParamsPage->discardMask,
  43685. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->ohPortBmiRegs.fmbm_ofsdm));
  43686. + else
  43687. + WRITE_UINT32(
  43688. + p_ParamsPage->discardMask,
  43689. + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfsdm));
  43690. + }
  43691. +#ifdef FM_ERROR_VSP_NO_MATCH_SW006
  43692. + if (p_FmPort->vspe)
  43693. + WRITE_UINT32(
  43694. + p_ParamsPage->misc,
  43695. + GET_UINT32(p_ParamsPage->misc) | (p_FmPort->dfltRelativeId & FM_CTL_PARAMS_PAGE_ERROR_VSP_MASK));
  43696. +#endif /* FM_ERROR_VSP_NO_MATCH_SW006 */
  43697. + }
  43698. +#endif /* (DPAA_VERSION >= 11) */
  43699. +
  43700. + err = AttachPCD(h_FmPort);
  43701. + if (err)
  43702. + {
  43703. + DeletePcd(p_FmPort);
  43704. + if (p_FmPort->h_ReassemblyTree)
  43705. + {
  43706. + FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43707. + p_FmPort->h_ReassemblyTree = NULL;
  43708. + }RELEASE_LOCK(p_FmPort->lock);
  43709. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43710. + }
  43711. +
  43712. + RELEASE_LOCK(p_FmPort->lock);
  43713. +
  43714. + return err;
  43715. +}
  43716. +
  43717. +t_Error FM_PORT_DeletePCD(t_Handle h_FmPort)
  43718. +{
  43719. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43720. + t_Error err = E_OK;
  43721. +
  43722. + SANITY_CHECK_RETURN_ERROR(h_FmPort, E_INVALID_HANDLE);
  43723. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43724. +
  43725. + if (p_FmPort->imEn)
  43726. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION,
  43727. + ("available for non-independant mode ports only"));
  43728. +
  43729. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  43730. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  43731. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  43732. + RETURN_ERROR( MAJOR, E_INVALID_OPERATION,
  43733. + ("available for Rx and offline parsing ports only"));
  43734. +
  43735. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43736. + {
  43737. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43738. + return ERROR_CODE(E_BUSY);
  43739. + }
  43740. +
  43741. + err = DetachPCD(h_FmPort);
  43742. + if (err)
  43743. + {
  43744. + RELEASE_LOCK(p_FmPort->lock);
  43745. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43746. + }
  43747. +
  43748. + FmPcdDecNetEnvOwners(p_FmPort->h_FmPcd, p_FmPort->netEnvId);
  43749. +
  43750. + /* we do it anyway, instead of checking if included */
  43751. + if ((p_FmPort->pcdEngines & FM_PCD_PRS) && p_FmPort->includeInPrsStatistics)
  43752. + {
  43753. + FmPcdPrsIncludePortInStatistics(p_FmPort->h_FmPcd,
  43754. + p_FmPort->hardwarePortId, FALSE);
  43755. + p_FmPort->includeInPrsStatistics = FALSE;
  43756. + }
  43757. +
  43758. + if (!FmPcdLockTryLockAll(p_FmPort->h_FmPcd))
  43759. + {
  43760. + RELEASE_LOCK(p_FmPort->lock);
  43761. + DBG(TRACE, ("Try LockAll - BUSY"));
  43762. + return ERROR_CODE(E_BUSY);
  43763. + }
  43764. +
  43765. + err = DeletePcd(h_FmPort);
  43766. + FmPcdLockUnlockAll(p_FmPort->h_FmPcd);
  43767. + if (err)
  43768. + {
  43769. + RELEASE_LOCK(p_FmPort->lock);
  43770. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43771. + }
  43772. +
  43773. + if (p_FmPort->h_ReassemblyTree)
  43774. + {
  43775. + err = FM_PCD_CcRootDelete(p_FmPort->h_ReassemblyTree);
  43776. + if (err)
  43777. + {
  43778. + RELEASE_LOCK(p_FmPort->lock);
  43779. + RETURN_ERROR(MAJOR, err, NO_MSG);
  43780. + }
  43781. + p_FmPort->h_ReassemblyTree = NULL;
  43782. + }RELEASE_LOCK(p_FmPort->lock);
  43783. +
  43784. + return err;
  43785. +}
  43786. +
  43787. +t_Error FM_PORT_PcdKgBindSchemes(t_Handle h_FmPort,
  43788. + t_FmPcdPortSchemesParams *p_PortScheme)
  43789. +{
  43790. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43791. + t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
  43792. + t_Error err = E_OK;
  43793. + uint32_t tmpScmVec = 0;
  43794. + int i;
  43795. +
  43796. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  43797. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43798. + SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_KG,
  43799. + E_INVALID_STATE);
  43800. +
  43801. + schemeBind.netEnvId = p_FmPort->netEnvId;
  43802. + schemeBind.hardwarePortId = p_FmPort->hardwarePortId;
  43803. + schemeBind.numOfSchemes = p_PortScheme->numOfSchemes;
  43804. + schemeBind.useClsPlan = p_FmPort->useClsPlan;
  43805. + for (i = 0; i < schemeBind.numOfSchemes; i++)
  43806. + {
  43807. + schemeBind.schemesIds[i] = FmPcdKgGetSchemeId(
  43808. + p_PortScheme->h_Schemes[i]);
  43809. + /* build vector */
  43810. + tmpScmVec |= 1 << (31 - (uint32_t)schemeBind.schemesIds[i]);
  43811. + }
  43812. +
  43813. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43814. + {
  43815. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43816. + return ERROR_CODE(E_BUSY);
  43817. + }
  43818. +
  43819. + err = FmPcdKgBindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
  43820. + if (err == E_OK)
  43821. + p_FmPort->schemesPerPortVector |= tmpScmVec;
  43822. +
  43823. +#ifdef FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004
  43824. + if ((FmPcdIsAdvancedOffloadSupported(p_FmPort->h_FmPcd)) &&
  43825. + (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
  43826. + (p_FmPort->fmRevInfo.majorRev < 6))
  43827. + {
  43828. + for (i=0; i<p_PortScheme->numOfSchemes; i++)
  43829. + FmPcdKgCcGetSetParams(p_FmPort->h_FmPcd, p_PortScheme->h_Schemes[i], UPDATE_KG_NIA_CC_WA, 0);
  43830. + }
  43831. +#endif /* FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004 */
  43832. +
  43833. + RELEASE_LOCK(p_FmPort->lock);
  43834. +
  43835. + return err;
  43836. +}
  43837. +
  43838. +t_Error FM_PORT_PcdKgUnbindSchemes(t_Handle h_FmPort,
  43839. + t_FmPcdPortSchemesParams *p_PortScheme)
  43840. +{
  43841. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43842. + t_FmPcdKgInterModuleBindPortToSchemes schemeBind;
  43843. + t_Error err = E_OK;
  43844. + uint32_t tmpScmVec = 0;
  43845. + int i;
  43846. +
  43847. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  43848. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_STATE);
  43849. + SANITY_CHECK_RETURN_ERROR(p_FmPort->pcdEngines & FM_PCD_KG,
  43850. + E_INVALID_STATE);
  43851. +
  43852. + schemeBind.netEnvId = p_FmPort->netEnvId;
  43853. + schemeBind.hardwarePortId = p_FmPort->hardwarePortId;
  43854. + schemeBind.numOfSchemes = p_PortScheme->numOfSchemes;
  43855. + for (i = 0; i < schemeBind.numOfSchemes; i++)
  43856. + {
  43857. + schemeBind.schemesIds[i] = FmPcdKgGetSchemeId(
  43858. + p_PortScheme->h_Schemes[i]);
  43859. + /* build vector */
  43860. + tmpScmVec |= 1 << (31 - (uint32_t)schemeBind.schemesIds[i]);
  43861. + }
  43862. +
  43863. + if (!TRY_LOCK(p_FmPort->h_Spinlock, &p_FmPort->lock))
  43864. + {
  43865. + DBG(TRACE, ("FM Port Try Lock - BUSY"));
  43866. + return ERROR_CODE(E_BUSY);
  43867. + }
  43868. +
  43869. + err = FmPcdKgUnbindPortToSchemes(p_FmPort->h_FmPcd, &schemeBind);
  43870. + if (err == E_OK)
  43871. + p_FmPort->schemesPerPortVector &= ~tmpScmVec;
  43872. + RELEASE_LOCK(p_FmPort->lock);
  43873. +
  43874. + return err;
  43875. +}
  43876. +
  43877. +t_Error FM_PORT_AddCongestionGrps(t_Handle h_FmPort,
  43878. + t_FmPortCongestionGrps *p_CongestionGrps)
  43879. +{
  43880. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43881. + uint8_t priorityTmpArray[FM_PORT_NUM_OF_CONGESTION_GRPS];
  43882. + uint8_t mod, index;
  43883. + uint32_t i, grpsMap[FMAN_PORT_CG_MAP_NUM];
  43884. + int err;
  43885. +#if (DPAA_VERSION >= 11)
  43886. + int j;
  43887. +#endif /* (DPAA_VERSION >= 11) */
  43888. +
  43889. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  43890. +
  43891. + /* un-necessary check of the indexes; probably will be needed in the future when there
  43892. + will be more CGs available ....
  43893. + for (i=0; i<p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
  43894. + if (p_CongestionGrps->congestionGrpsToConsider[i] >= FM_PORT_NUM_OF_CONGESTION_GRPS)
  43895. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("CG id!"));
  43896. + */
  43897. +
  43898. +#ifdef FM_NO_OP_OBSERVED_CGS
  43899. + if ((p_FmPort->fmRevInfo.majorRev != 4) &&
  43900. + (p_FmPort->fmRevInfo.majorRev < 6))
  43901. + {
  43902. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) &&
  43903. + (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  43904. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Available for Rx ports only"));
  43905. + }
  43906. + else
  43907. +#endif /* FM_NO_OP_OBSERVED_CGS */
  43908. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  43909. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  43910. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  43911. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  43912. + ("Available for Rx & OP ports only"));
  43913. +
  43914. + /* Prepare groups map array */
  43915. + memset(grpsMap, 0, FMAN_PORT_CG_MAP_NUM * sizeof(uint32_t));
  43916. + for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
  43917. + {
  43918. + index = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] / 32);
  43919. + mod = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] % 32);
  43920. + if (p_FmPort->fmRevInfo.majorRev != 4)
  43921. + grpsMap[7 - index] |= (uint32_t)(1 << mod);
  43922. + else
  43923. + grpsMap[0] |= (uint32_t)(1 << mod);
  43924. + }
  43925. +
  43926. + memset(&priorityTmpArray, 0,
  43927. + FM_PORT_NUM_OF_CONGESTION_GRPS * sizeof(uint8_t));
  43928. +
  43929. + for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
  43930. + {
  43931. +#if (DPAA_VERSION >= 11)
  43932. + for (j = 0; j < FM_MAX_NUM_OF_PFC_PRIORITIES; j++)
  43933. + if (p_CongestionGrps->pfcPrioritiesEn[i][j])
  43934. + priorityTmpArray[p_CongestionGrps->congestionGrpsToConsider[i]] |=
  43935. + (0x01 << (FM_MAX_NUM_OF_PFC_PRIORITIES - j - 1));
  43936. +#endif /* (DPAA_VERSION >= 11) */
  43937. + }
  43938. +
  43939. +#if (DPAA_VERSION >= 11)
  43940. + for (i = 0; i < FM_PORT_NUM_OF_CONGESTION_GRPS; i++)
  43941. + {
  43942. + err = FmSetCongestionGroupPFCpriority(p_FmPort->h_Fm, i,
  43943. + priorityTmpArray[i]);
  43944. + if (err)
  43945. + return err;
  43946. + }
  43947. +#endif /* (DPAA_VERSION >= 11) */
  43948. +
  43949. + err = fman_port_add_congestion_grps(&p_FmPort->port, grpsMap);
  43950. + if (err != 0)
  43951. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fman_port_add_congestion_grps"));
  43952. +
  43953. + return E_OK;
  43954. +}
  43955. +
  43956. +t_Error FM_PORT_RemoveCongestionGrps(t_Handle h_FmPort,
  43957. + t_FmPortCongestionGrps *p_CongestionGrps)
  43958. +{
  43959. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  43960. + uint8_t mod, index;
  43961. + uint32_t i, grpsMap[FMAN_PORT_CG_MAP_NUM];
  43962. + int err;
  43963. +
  43964. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  43965. +
  43966. + {
  43967. +#ifdef FM_NO_OP_OBSERVED_CGS
  43968. + t_FmRevisionInfo revInfo;
  43969. +
  43970. + FM_GetRevision(p_FmPort->h_Fm, &revInfo);
  43971. + if (revInfo.majorRev != 4)
  43972. + {
  43973. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) &&
  43974. + (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  43975. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Available for Rx ports only"));
  43976. + }
  43977. + else
  43978. +#endif /* FM_NO_OP_OBSERVED_CGS */
  43979. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G)
  43980. + && (p_FmPort->portType != e_FM_PORT_TYPE_RX)
  43981. + && (p_FmPort->portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING))
  43982. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  43983. + ("Available for Rx & OP ports only"));
  43984. + }
  43985. +
  43986. + /* Prepare groups map array */
  43987. + memset(grpsMap, 0, FMAN_PORT_CG_MAP_NUM * sizeof(uint32_t));
  43988. + for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
  43989. + {
  43990. + index = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] / 32);
  43991. + mod = (uint8_t)(p_CongestionGrps->congestionGrpsToConsider[i] % 32);
  43992. + if (p_FmPort->fmRevInfo.majorRev != 4)
  43993. + grpsMap[7 - index] |= (uint32_t)(1 << mod);
  43994. + else
  43995. + grpsMap[0] |= (uint32_t)(1 << mod);
  43996. + }
  43997. +
  43998. +#if (DPAA_VERSION >= 11)
  43999. + for (i = 0; i < p_CongestionGrps->numOfCongestionGrpsToConsider; i++)
  44000. + {
  44001. + t_Error err = FmSetCongestionGroupPFCpriority(
  44002. + p_FmPort->h_Fm, p_CongestionGrps->congestionGrpsToConsider[i],
  44003. + 0);
  44004. + if (err)
  44005. + return err;
  44006. + }
  44007. +#endif /* (DPAA_VERSION >= 11) */
  44008. +
  44009. + err = fman_port_remove_congestion_grps(&p_FmPort->port, grpsMap);
  44010. + if (err != 0)
  44011. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  44012. + ("fman_port_remove_congestion_grps"));
  44013. + return E_OK;
  44014. +}
  44015. +
  44016. +#if (DPAA_VERSION >= 11)
  44017. +t_Error FM_PORT_GetIPv4OptionsCount(t_Handle h_FmPort,
  44018. + uint32_t *p_Ipv4OptionsCount)
  44019. +{
  44020. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  44021. +
  44022. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  44023. + SANITY_CHECK_RETURN_ERROR(
  44024. + (p_FmPort->portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING),
  44025. + E_INVALID_VALUE);
  44026. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_ParamsPage, E_INVALID_STATE);
  44027. + SANITY_CHECK_RETURN_ERROR(p_Ipv4OptionsCount, E_NULL_POINTER);
  44028. +
  44029. + *p_Ipv4OptionsCount = GET_UINT32(p_FmPort->p_ParamsPage->ipfOptionsCounter);
  44030. +
  44031. + return E_OK;
  44032. +}
  44033. +#endif /* (DPAA_VERSION >= 11) */
  44034. +
  44035. +t_Error FM_PORT_ConfigDsarSupport(t_Handle h_FmPortRx,
  44036. + t_FmPortDsarTablesSizes *params)
  44037. +{
  44038. + t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
  44039. + p_FmPort->deepSleepVars.autoResMaxSizes = XX_Malloc(
  44040. + sizeof(struct t_FmPortDsarTablesSizes));
  44041. + memcpy(p_FmPort->deepSleepVars.autoResMaxSizes, params,
  44042. + sizeof(struct t_FmPortDsarTablesSizes));
  44043. + return E_OK;
  44044. +}
  44045. +
  44046. +static t_Error FmPortConfigAutoResForDeepSleepSupport1(t_FmPort *p_FmPort)
  44047. +{
  44048. + uint32_t *param_page;
  44049. + t_FmPortDsarTablesSizes *params = p_FmPort->deepSleepVars.autoResMaxSizes;
  44050. + t_ArCommonDesc *ArCommonDescPtr;
  44051. + uint32_t size = sizeof(t_ArCommonDesc);
  44052. + // ARP
  44053. + // should put here if (params->max_num_of_arp_entries)?
  44054. + size = ROUND_UP(size,4);
  44055. + size += sizeof(t_DsarArpDescriptor);
  44056. + size += sizeof(t_DsarArpBindingEntry) * params->maxNumOfArpEntries;
  44057. + size += sizeof(t_DsarArpStatistics);
  44058. + //ICMPV4
  44059. + size = ROUND_UP(size,4);
  44060. + size += sizeof(t_DsarIcmpV4Descriptor);
  44061. + size += sizeof(t_DsarIcmpV4BindingEntry) * params->maxNumOfEchoIpv4Entries;
  44062. + size += sizeof(t_DsarIcmpV4Statistics);
  44063. + //ICMPV6
  44064. + size = ROUND_UP(size,4);
  44065. + size += sizeof(t_DsarIcmpV6Descriptor);
  44066. + size += sizeof(t_DsarIcmpV6BindingEntry) * params->maxNumOfEchoIpv6Entries;
  44067. + size += sizeof(t_DsarIcmpV6Statistics);
  44068. + //ND
  44069. + size = ROUND_UP(size,4);
  44070. + size += sizeof(t_DsarNdDescriptor);
  44071. + size += sizeof(t_DsarIcmpV6BindingEntry) * params->maxNumOfNdpEntries;
  44072. + size += sizeof(t_DsarIcmpV6Statistics);
  44073. + //SNMP
  44074. + size = ROUND_UP(size,4);
  44075. + size += sizeof(t_DsarSnmpDescriptor);
  44076. + size += sizeof(t_DsarSnmpIpv4AddrTblEntry)
  44077. + * params->maxNumOfSnmpIPV4Entries;
  44078. + size += sizeof(t_DsarSnmpIpv6AddrTblEntry)
  44079. + * params->maxNumOfSnmpIPV6Entries;
  44080. + size += sizeof(t_OidsTblEntry) * params->maxNumOfSnmpOidEntries;
  44081. + size += params->maxNumOfSnmpOidChar;
  44082. + size += sizeof(t_DsarIcmpV6Statistics);
  44083. + //filters
  44084. + size = ROUND_UP(size,4);
  44085. + size += params->maxNumOfIpProtFiltering;
  44086. + size = ROUND_UP(size,4);
  44087. + size += params->maxNumOfUdpPortFiltering * sizeof(t_PortTblEntry);
  44088. + size = ROUND_UP(size,4);
  44089. + size += params->maxNumOfTcpPortFiltering * sizeof(t_PortTblEntry);
  44090. +
  44091. + // add here for more protocols
  44092. +
  44093. + // statistics
  44094. + size = ROUND_UP(size,4);
  44095. + size += sizeof(t_ArStatistics);
  44096. +
  44097. + ArCommonDescPtr = FM_MURAM_AllocMem(p_FmPort->h_FmMuram, size, 0x10);
  44098. +
  44099. + param_page =
  44100. + XX_PhysToVirt(
  44101. + p_FmPort->fmMuramPhysBaseAddr
  44102. + + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr));
  44103. + WRITE_UINT32(
  44104. + *param_page,
  44105. + (uint32_t)(XX_VirtToPhys(ArCommonDescPtr) - p_FmPort->fmMuramPhysBaseAddr));
  44106. + return E_OK;
  44107. +}
  44108. +
  44109. +t_FmPortDsarTablesSizes* FM_PORT_GetDsarTablesMaxSizes(t_Handle h_FmPortRx)
  44110. +{
  44111. + t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
  44112. + return p_FmPort->deepSleepVars.autoResMaxSizes;
  44113. +}
  44114. +
  44115. +struct arOffsets
  44116. +{
  44117. + uint32_t arp;
  44118. + uint32_t nd;
  44119. + uint32_t icmpv4;
  44120. + uint32_t icmpv6;
  44121. + uint32_t snmp;
  44122. + uint32_t stats;
  44123. + uint32_t filtIp;
  44124. + uint32_t filtUdp;
  44125. + uint32_t filtTcp;
  44126. +};
  44127. +
  44128. +static uint32_t AR_ComputeOffsets(struct arOffsets* of,
  44129. + struct t_FmPortDsarParams *params,
  44130. + t_FmPort *p_FmPort)
  44131. +{
  44132. + uint32_t size = sizeof(t_ArCommonDesc);
  44133. + // ARP
  44134. + if (params->p_AutoResArpInfo)
  44135. + {
  44136. + size = ROUND_UP(size,4);
  44137. + of->arp = size;
  44138. + size += sizeof(t_DsarArpDescriptor);
  44139. + size += sizeof(t_DsarArpBindingEntry)
  44140. + * params->p_AutoResArpInfo->tableSize;
  44141. + size += sizeof(t_DsarArpStatistics);
  44142. + }
  44143. + // ICMPV4
  44144. + if (params->p_AutoResEchoIpv4Info)
  44145. + {
  44146. + size = ROUND_UP(size,4);
  44147. + of->icmpv4 = size;
  44148. + size += sizeof(t_DsarIcmpV4Descriptor);
  44149. + size += sizeof(t_DsarIcmpV4BindingEntry)
  44150. + * params->p_AutoResEchoIpv4Info->tableSize;
  44151. + size += sizeof(t_DsarIcmpV4Statistics);
  44152. + }
  44153. + // ICMPV6
  44154. + if (params->p_AutoResEchoIpv6Info)
  44155. + {
  44156. + size = ROUND_UP(size,4);
  44157. + of->icmpv6 = size;
  44158. + size += sizeof(t_DsarIcmpV6Descriptor);
  44159. + size += sizeof(t_DsarIcmpV6BindingEntry)
  44160. + * params->p_AutoResEchoIpv6Info->tableSize;
  44161. + size += sizeof(t_DsarIcmpV6Statistics);
  44162. + }
  44163. + // ND
  44164. + if (params->p_AutoResNdpInfo)
  44165. + {
  44166. + size = ROUND_UP(size,4);
  44167. + of->nd = size;
  44168. + size += sizeof(t_DsarNdDescriptor);
  44169. + size += sizeof(t_DsarIcmpV6BindingEntry)
  44170. + * (params->p_AutoResNdpInfo->tableSizeAssigned
  44171. + + params->p_AutoResNdpInfo->tableSizeTmp);
  44172. + size += sizeof(t_DsarIcmpV6Statistics);
  44173. + }
  44174. + // SNMP
  44175. + if (params->p_AutoResSnmpInfo)
  44176. + {
  44177. + size = ROUND_UP(size,4);
  44178. + of->snmp = size;
  44179. + size += sizeof(t_DsarSnmpDescriptor);
  44180. + size += sizeof(t_DsarSnmpIpv4AddrTblEntry)
  44181. + * params->p_AutoResSnmpInfo->numOfIpv4Addresses;
  44182. + size += sizeof(t_DsarSnmpIpv6AddrTblEntry)
  44183. + * params->p_AutoResSnmpInfo->numOfIpv6Addresses;
  44184. + size += sizeof(t_OidsTblEntry) * params->p_AutoResSnmpInfo->oidsTblSize;
  44185. + size += p_FmPort->deepSleepVars.autoResMaxSizes->maxNumOfSnmpOidChar;
  44186. + size += sizeof(t_DsarIcmpV6Statistics);
  44187. + }
  44188. + //filters
  44189. + size = ROUND_UP(size,4);
  44190. + if (params->p_AutoResFilteringInfo)
  44191. + {
  44192. + of->filtIp = size;
  44193. + size += params->p_AutoResFilteringInfo->ipProtTableSize;
  44194. + size = ROUND_UP(size,4);
  44195. + of->filtUdp = size;
  44196. + size += params->p_AutoResFilteringInfo->udpPortsTableSize
  44197. + * sizeof(t_PortTblEntry);
  44198. + size = ROUND_UP(size,4);
  44199. + of->filtTcp = size;
  44200. + size += params->p_AutoResFilteringInfo->tcpPortsTableSize
  44201. + * sizeof(t_PortTblEntry);
  44202. + }
  44203. + // add here for more protocols
  44204. + // statistics
  44205. + size = ROUND_UP(size,4);
  44206. + of->stats = size;
  44207. + size += sizeof(t_ArStatistics);
  44208. + return size;
  44209. +}
  44210. +
  44211. +uint32_t* ARDesc;
  44212. +void PrsEnable(t_Handle p_FmPcd);
  44213. +void PrsDisable(t_Handle p_FmPcd);
  44214. +int PrsIsEnabled(t_Handle p_FmPcd);
  44215. +t_Handle FM_PCD_GetHcPort(t_Handle h_FmPcd);
  44216. +
  44217. +static t_Error DsarCheckParams(t_FmPortDsarParams *params,
  44218. + t_FmPortDsarTablesSizes *sizes)
  44219. +{
  44220. + bool macInit = FALSE;
  44221. + uint8_t mac[6];
  44222. + int i = 0;
  44223. +
  44224. + // check table sizes
  44225. + if (params->p_AutoResArpInfo
  44226. + && sizes->maxNumOfArpEntries < params->p_AutoResArpInfo->tableSize)
  44227. + RETURN_ERROR(
  44228. + MAJOR, E_INVALID_VALUE,
  44229. + ("DSAR: Arp table size exceeds the configured maximum size."));
  44230. + if (params->p_AutoResEchoIpv4Info
  44231. + && sizes->maxNumOfEchoIpv4Entries
  44232. + < params->p_AutoResEchoIpv4Info->tableSize)
  44233. + RETURN_ERROR(
  44234. + MAJOR,
  44235. + E_INVALID_VALUE,
  44236. + ("DSAR: EchoIpv4 table size exceeds the configured maximum size."));
  44237. + if (params->p_AutoResNdpInfo
  44238. + && sizes->maxNumOfNdpEntries
  44239. + < params->p_AutoResNdpInfo->tableSizeAssigned
  44240. + + params->p_AutoResNdpInfo->tableSizeTmp)
  44241. + RETURN_ERROR(
  44242. + MAJOR, E_INVALID_VALUE,
  44243. + ("DSAR: NDP table size exceeds the configured maximum size."));
  44244. + if (params->p_AutoResEchoIpv6Info
  44245. + && sizes->maxNumOfEchoIpv6Entries
  44246. + < params->p_AutoResEchoIpv6Info->tableSize)
  44247. + RETURN_ERROR(
  44248. + MAJOR,
  44249. + E_INVALID_VALUE,
  44250. + ("DSAR: EchoIpv6 table size exceeds the configured maximum size."));
  44251. + if (params->p_AutoResSnmpInfo
  44252. + && sizes->maxNumOfSnmpOidEntries
  44253. + < params->p_AutoResSnmpInfo->oidsTblSize)
  44254. + RETURN_ERROR(
  44255. + MAJOR,
  44256. + E_INVALID_VALUE,
  44257. + ("DSAR: Snmp Oid table size exceeds the configured maximum size."));
  44258. + if (params->p_AutoResSnmpInfo
  44259. + && sizes->maxNumOfSnmpIPV4Entries
  44260. + < params->p_AutoResSnmpInfo->numOfIpv4Addresses)
  44261. + RETURN_ERROR(
  44262. + MAJOR,
  44263. + E_INVALID_VALUE,
  44264. + ("DSAR: Snmp ipv4 table size exceeds the configured maximum size."));
  44265. + if (params->p_AutoResSnmpInfo
  44266. + && sizes->maxNumOfSnmpIPV6Entries
  44267. + < params->p_AutoResSnmpInfo->numOfIpv6Addresses)
  44268. + RETURN_ERROR(
  44269. + MAJOR,
  44270. + E_INVALID_VALUE,
  44271. + ("DSAR: Snmp ipv6 table size exceeds the configured maximum size."));
  44272. + if (params->p_AutoResFilteringInfo)
  44273. + {
  44274. + if (sizes->maxNumOfIpProtFiltering
  44275. + < params->p_AutoResFilteringInfo->ipProtTableSize)
  44276. + RETURN_ERROR(
  44277. + MAJOR,
  44278. + E_INVALID_VALUE,
  44279. + ("DSAR: ip filter table size exceeds the configured maximum size."));
  44280. + if (sizes->maxNumOfTcpPortFiltering
  44281. + < params->p_AutoResFilteringInfo->udpPortsTableSize)
  44282. + RETURN_ERROR(
  44283. + MAJOR,
  44284. + E_INVALID_VALUE,
  44285. + ("DSAR: udp filter table size exceeds the configured maximum size."));
  44286. + if (sizes->maxNumOfUdpPortFiltering
  44287. + < params->p_AutoResFilteringInfo->tcpPortsTableSize)
  44288. + RETURN_ERROR(
  44289. + MAJOR,
  44290. + E_INVALID_VALUE,
  44291. + ("DSAR: tcp filter table size exceeds the configured maximum size."));
  44292. + }
  44293. + /* check only 1 MAC address is configured (this is what ucode currently supports) */
  44294. + if (params->p_AutoResArpInfo && params->p_AutoResArpInfo->tableSize)
  44295. + {
  44296. + memcpy(mac, params->p_AutoResArpInfo->p_AutoResTable[0].mac, 6);
  44297. + i = 1;
  44298. + macInit = TRUE;
  44299. +
  44300. + for (; i < params->p_AutoResArpInfo->tableSize; i++)
  44301. + if (memcmp(mac, params->p_AutoResArpInfo->p_AutoResTable[i].mac, 6))
  44302. + RETURN_ERROR(
  44303. + MAJOR, E_INVALID_VALUE,
  44304. + ("DSAR: Only 1 mac address is currently supported."));
  44305. + }
  44306. + if (params->p_AutoResEchoIpv4Info
  44307. + && params->p_AutoResEchoIpv4Info->tableSize)
  44308. + {
  44309. + i = 0;
  44310. + if (!macInit)
  44311. + {
  44312. + memcpy(mac, params->p_AutoResEchoIpv4Info->p_AutoResTable[0].mac,
  44313. + 6);
  44314. + i = 1;
  44315. + macInit = TRUE;
  44316. + }
  44317. + for (; i < params->p_AutoResEchoIpv4Info->tableSize; i++)
  44318. + if (memcmp(mac,
  44319. + params->p_AutoResEchoIpv4Info->p_AutoResTable[i].mac, 6))
  44320. + RETURN_ERROR(
  44321. + MAJOR, E_INVALID_VALUE,
  44322. + ("DSAR: Only 1 mac address is currently supported."));
  44323. + }
  44324. + if (params->p_AutoResEchoIpv6Info
  44325. + && params->p_AutoResEchoIpv6Info->tableSize)
  44326. + {
  44327. + i = 0;
  44328. + if (!macInit)
  44329. + {
  44330. + memcpy(mac, params->p_AutoResEchoIpv6Info->p_AutoResTable[0].mac,
  44331. + 6);
  44332. + i = 1;
  44333. + macInit = TRUE;
  44334. + }
  44335. + for (; i < params->p_AutoResEchoIpv6Info->tableSize; i++)
  44336. + if (memcmp(mac,
  44337. + params->p_AutoResEchoIpv6Info->p_AutoResTable[i].mac, 6))
  44338. + RETURN_ERROR(
  44339. + MAJOR, E_INVALID_VALUE,
  44340. + ("DSAR: Only 1 mac address is currently supported."));
  44341. + }
  44342. + if (params->p_AutoResNdpInfo && params->p_AutoResNdpInfo->tableSizeAssigned)
  44343. + {
  44344. + i = 0;
  44345. + if (!macInit)
  44346. + {
  44347. + memcpy(mac, params->p_AutoResNdpInfo->p_AutoResTableAssigned[0].mac,
  44348. + 6);
  44349. + i = 1;
  44350. + macInit = TRUE;
  44351. + }
  44352. + for (; i < params->p_AutoResNdpInfo->tableSizeAssigned; i++)
  44353. + if (memcmp(mac,
  44354. + params->p_AutoResNdpInfo->p_AutoResTableAssigned[i].mac,
  44355. + 6))
  44356. + RETURN_ERROR(
  44357. + MAJOR, E_INVALID_VALUE,
  44358. + ("DSAR: Only 1 mac address is currently supported."));
  44359. + }
  44360. + if (params->p_AutoResNdpInfo && params->p_AutoResNdpInfo->tableSizeTmp)
  44361. + {
  44362. + i = 0;
  44363. + if (!macInit)
  44364. + {
  44365. + memcpy(mac, params->p_AutoResNdpInfo->p_AutoResTableTmp[0].mac, 6);
  44366. + i = 1;
  44367. + }
  44368. + for (; i < params->p_AutoResNdpInfo->tableSizeTmp; i++)
  44369. + if (memcmp(mac, params->p_AutoResNdpInfo->p_AutoResTableTmp[i].mac,
  44370. + 6))
  44371. + RETURN_ERROR(
  44372. + MAJOR, E_INVALID_VALUE,
  44373. + ("DSAR: Only 1 mac address is currently supported."));
  44374. + }
  44375. + return E_OK;
  44376. +}
  44377. +
  44378. +static int GetBERLen(uint8_t* buf)
  44379. +{
  44380. + if (*buf & 0x80)
  44381. + {
  44382. + if ((*buf & 0x7F) == 1)
  44383. + return buf[1];
  44384. + else
  44385. + return *(uint16_t*)&buf[1]; // assuming max len is 2
  44386. + }
  44387. + else
  44388. + return buf[0];
  44389. +}
  44390. +#define TOTAL_BER_LEN(len) (len < 128) ? len + 2 : len + 3
  44391. +
  44392. +#define SCFG_FMCLKDPSLPCR_ADDR 0xFFE0FC00C
  44393. +#define SCFG_FMCLKDPSLPCR_DS_VAL 0x08402000
  44394. +#define SCFG_FMCLKDPSLPCR_NORMAL_VAL 0x00402000
  44395. +static int fm_soc_suspend(void)
  44396. +{
  44397. + uint32_t *fmclk, tmp32;
  44398. + fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
  44399. + tmp32 = GET_UINT32(*fmclk);
  44400. + WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_DS_VAL);
  44401. + tmp32 = GET_UINT32(*fmclk);
  44402. + iounmap(fmclk);
  44403. + return 0;
  44404. +}
  44405. +
  44406. +void fm_clk_down(void)
  44407. +{
  44408. + uint32_t *fmclk, tmp32;
  44409. + fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
  44410. + tmp32 = GET_UINT32(*fmclk);
  44411. + WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_DS_VAL | 0x40000000);
  44412. + tmp32 = GET_UINT32(*fmclk);
  44413. + iounmap(fmclk);
  44414. +}
  44415. +
  44416. +t_Error FM_PORT_EnterDsar(t_Handle h_FmPortRx, t_FmPortDsarParams *params)
  44417. +{
  44418. + int i, j;
  44419. + t_Error err;
  44420. + uint32_t nia;
  44421. + t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
  44422. + t_FmPort *p_FmPortTx = (t_FmPort *)params->h_FmPortTx;
  44423. + t_DsarArpDescriptor *ArpDescriptor;
  44424. + t_DsarIcmpV4Descriptor* ICMPV4Descriptor;
  44425. + t_DsarIcmpV6Descriptor* ICMPV6Descriptor;
  44426. + t_DsarNdDescriptor* NDDescriptor;
  44427. +
  44428. + uint64_t fmMuramVirtBaseAddr = (uint64_t)PTR_TO_UINT(XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr));
  44429. + uint32_t *param_page = XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr));
  44430. + t_ArCommonDesc *ArCommonDescPtr = (t_ArCommonDesc*)(XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(*param_page)));
  44431. + struct arOffsets* of;
  44432. + uint8_t tmp = 0;
  44433. + t_FmGetSetParams fmGetSetParams;
  44434. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44435. + fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
  44436. + fmGetSetParams.setParams.sleep = 1;
  44437. +
  44438. + err = DsarCheckParams(params, p_FmPort->deepSleepVars.autoResMaxSizes);
  44439. + if (err != E_OK)
  44440. + return err;
  44441. +
  44442. + p_FmPort->deepSleepVars.autoResOffsets = XX_Malloc(sizeof(struct arOffsets));
  44443. + of = (struct arOffsets *)p_FmPort->deepSleepVars.autoResOffsets;
  44444. + IOMemSet32(ArCommonDescPtr, 0, AR_ComputeOffsets(of, params, p_FmPort));
  44445. +
  44446. + // common
  44447. + WRITE_UINT8(ArCommonDescPtr->arTxPort, p_FmPortTx->hardwarePortId);
  44448. + nia = GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne); // bmi nia
  44449. + if ((nia & 0x007C0000) == 0x00440000) // bmi nia is parser
  44450. + WRITE_UINT32(ArCommonDescPtr->activeHPNIA, GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne));
  44451. + else
  44452. + WRITE_UINT32(ArCommonDescPtr->activeHPNIA, nia);
  44453. + WRITE_UINT16(ArCommonDescPtr->snmpPort, 161);
  44454. +
  44455. + // ARP
  44456. + if (params->p_AutoResArpInfo)
  44457. + {
  44458. + t_DsarArpBindingEntry* arp_bindings;
  44459. + ArpDescriptor = (t_DsarArpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->arp);
  44460. + WRITE_UINT32(ArCommonDescPtr->p_ArpDescriptor, PTR_TO_UINT(ArpDescriptor) - fmMuramVirtBaseAddr);
  44461. + arp_bindings = (t_DsarArpBindingEntry*)(PTR_TO_UINT(ArpDescriptor) + sizeof(t_DsarArpDescriptor));
  44462. + if (params->p_AutoResArpInfo->enableConflictDetection)
  44463. + WRITE_UINT16(ArpDescriptor->control, 1);
  44464. + else
  44465. + WRITE_UINT16(ArpDescriptor->control, 0);
  44466. + if (params->p_AutoResArpInfo->tableSize)
  44467. + {
  44468. + t_FmPortDsarArpEntry* arp_entry = params->p_AutoResArpInfo->p_AutoResTable;
  44469. + WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&arp_entry[0].mac[0]);
  44470. + WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&arp_entry[0].mac[2]);
  44471. + WRITE_UINT16(ArpDescriptor->numOfBindings, params->p_AutoResArpInfo->tableSize);
  44472. +
  44473. + for (i = 0; i < params->p_AutoResArpInfo->tableSize; i++)
  44474. + {
  44475. + WRITE_UINT32(arp_bindings[i].ipv4Addr, arp_entry[i].ipAddress);
  44476. + if (arp_entry[i].isVlan)
  44477. + WRITE_UINT16(arp_bindings[i].vlanId, arp_entry[i].vid & 0xFFF);
  44478. + }
  44479. + WRITE_UINT32(ArpDescriptor->p_Bindings, PTR_TO_UINT(arp_bindings) - fmMuramVirtBaseAddr);
  44480. + }
  44481. + WRITE_UINT32(ArpDescriptor->p_Statistics, PTR_TO_UINT(arp_bindings) +
  44482. + sizeof(t_DsarArpBindingEntry) * params->p_AutoResArpInfo->tableSize - fmMuramVirtBaseAddr);
  44483. + }
  44484. +
  44485. + // ICMPV4
  44486. + if (params->p_AutoResEchoIpv4Info)
  44487. + {
  44488. + t_DsarIcmpV4BindingEntry* icmpv4_bindings;
  44489. + ICMPV4Descriptor = (t_DsarIcmpV4Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv4);
  44490. + WRITE_UINT32(ArCommonDescPtr->p_IcmpV4Descriptor, PTR_TO_UINT(ICMPV4Descriptor) - fmMuramVirtBaseAddr);
  44491. + icmpv4_bindings = (t_DsarIcmpV4BindingEntry*)(PTR_TO_UINT(ICMPV4Descriptor) + sizeof(t_DsarIcmpV4Descriptor));
  44492. + WRITE_UINT16(ICMPV4Descriptor->control, 0);
  44493. + if (params->p_AutoResEchoIpv4Info->tableSize)
  44494. + {
  44495. + t_FmPortDsarArpEntry* arp_entry = params->p_AutoResEchoIpv4Info->p_AutoResTable;
  44496. + WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&arp_entry[0].mac[0]);
  44497. + WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&arp_entry[0].mac[2]);
  44498. + WRITE_UINT16(ICMPV4Descriptor->numOfBindings, params->p_AutoResEchoIpv4Info->tableSize);
  44499. +
  44500. + for (i = 0; i < params->p_AutoResEchoIpv4Info->tableSize; i++)
  44501. + {
  44502. + WRITE_UINT32(icmpv4_bindings[i].ipv4Addr, arp_entry[i].ipAddress);
  44503. + if (arp_entry[i].isVlan)
  44504. + WRITE_UINT16(icmpv4_bindings[i].vlanId, arp_entry[i].vid & 0xFFF);
  44505. + }
  44506. + WRITE_UINT32(ICMPV4Descriptor->p_Bindings, PTR_TO_UINT(icmpv4_bindings) - fmMuramVirtBaseAddr);
  44507. + }
  44508. + WRITE_UINT32(ICMPV4Descriptor->p_Statistics, PTR_TO_UINT(icmpv4_bindings) +
  44509. + sizeof(t_DsarIcmpV4BindingEntry) * params->p_AutoResEchoIpv4Info->tableSize - fmMuramVirtBaseAddr);
  44510. + }
  44511. +
  44512. + // ICMPV6
  44513. + if (params->p_AutoResEchoIpv6Info)
  44514. + {
  44515. + t_DsarIcmpV6BindingEntry* icmpv6_bindings;
  44516. + ICMPV6Descriptor = (t_DsarIcmpV6Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv6);
  44517. + WRITE_UINT32(ArCommonDescPtr->p_IcmpV6Descriptor, PTR_TO_UINT(ICMPV6Descriptor) - fmMuramVirtBaseAddr);
  44518. + icmpv6_bindings = (t_DsarIcmpV6BindingEntry*)(PTR_TO_UINT(ICMPV6Descriptor) + sizeof(t_DsarIcmpV6Descriptor));
  44519. + WRITE_UINT16(ICMPV6Descriptor->control, 0);
  44520. + if (params->p_AutoResEchoIpv6Info->tableSize)
  44521. + {
  44522. + t_FmPortDsarNdpEntry* ndp_entry = params->p_AutoResEchoIpv6Info->p_AutoResTable;
  44523. + WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&ndp_entry[0].mac[0]);
  44524. + WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&ndp_entry[0].mac[2]);
  44525. + WRITE_UINT16(ICMPV6Descriptor->numOfBindings, params->p_AutoResEchoIpv6Info->tableSize);
  44526. +
  44527. + for (i = 0; i < params->p_AutoResEchoIpv6Info->tableSize; i++)
  44528. + {
  44529. + for (j = 0; j < 4; j++)
  44530. + WRITE_UINT32(icmpv6_bindings[i].ipv6Addr[j], ndp_entry[i].ipAddress[j]);
  44531. + if (ndp_entry[i].isVlan)
  44532. + WRITE_UINT16(*(uint16_t*)&icmpv6_bindings[i].ipv6Addr[4], ndp_entry[i].vid & 0xFFF); // writing vlan
  44533. + }
  44534. + WRITE_UINT32(ICMPV6Descriptor->p_Bindings, PTR_TO_UINT(icmpv6_bindings) - fmMuramVirtBaseAddr);
  44535. + }
  44536. + WRITE_UINT32(ICMPV6Descriptor->p_Statistics, PTR_TO_UINT(icmpv6_bindings) +
  44537. + sizeof(t_DsarIcmpV6BindingEntry) * params->p_AutoResEchoIpv6Info->tableSize - fmMuramVirtBaseAddr);
  44538. + }
  44539. +
  44540. + // ND
  44541. + if (params->p_AutoResNdpInfo)
  44542. + {
  44543. + t_DsarIcmpV6BindingEntry* icmpv6_bindings;
  44544. + NDDescriptor = (t_DsarNdDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->nd);
  44545. + WRITE_UINT32(ArCommonDescPtr->p_NdDescriptor, PTR_TO_UINT(NDDescriptor) - fmMuramVirtBaseAddr);
  44546. + icmpv6_bindings = (t_DsarIcmpV6BindingEntry*)(PTR_TO_UINT(NDDescriptor) + sizeof(t_DsarNdDescriptor));
  44547. + if (params->p_AutoResNdpInfo->enableConflictDetection)
  44548. + WRITE_UINT16(NDDescriptor->control, 1);
  44549. + else
  44550. + WRITE_UINT16(NDDescriptor->control, 0);
  44551. + if (params->p_AutoResNdpInfo->tableSizeAssigned + params->p_AutoResNdpInfo->tableSizeTmp)
  44552. + {
  44553. + t_FmPortDsarNdpEntry* ndp_entry = params->p_AutoResNdpInfo->p_AutoResTableAssigned;
  44554. + WRITE_UINT16(*(uint16_t*)&ArCommonDescPtr->macStationAddr[0], *(uint16_t*)&ndp_entry[0].mac[0]);
  44555. + WRITE_UINT32(*(uint32_t*)&ArCommonDescPtr->macStationAddr[2], *(uint32_t*)&ndp_entry[0].mac[2]);
  44556. + WRITE_UINT16(NDDescriptor->numOfBindings, params->p_AutoResNdpInfo->tableSizeAssigned
  44557. + + params->p_AutoResNdpInfo->tableSizeTmp);
  44558. +
  44559. + for (i = 0; i < params->p_AutoResNdpInfo->tableSizeAssigned; i++)
  44560. + {
  44561. + for (j = 0; j < 4; j++)
  44562. + WRITE_UINT32(icmpv6_bindings[i].ipv6Addr[j], ndp_entry[i].ipAddress[j]);
  44563. + if (ndp_entry[i].isVlan)
  44564. + WRITE_UINT16(*(uint16_t*)&icmpv6_bindings[i].ipv6Addr[4], ndp_entry[i].vid & 0xFFF); // writing vlan
  44565. + }
  44566. + ndp_entry = params->p_AutoResNdpInfo->p_AutoResTableTmp;
  44567. + for (i = 0; i < params->p_AutoResNdpInfo->tableSizeTmp; i++)
  44568. + {
  44569. + for (j = 0; j < 4; j++)
  44570. + WRITE_UINT32(icmpv6_bindings[i + params->p_AutoResNdpInfo->tableSizeAssigned].ipv6Addr[j], ndp_entry[i].ipAddress[j]);
  44571. + if (ndp_entry[i].isVlan)
  44572. + WRITE_UINT16(*(uint16_t*)&icmpv6_bindings[i + params->p_AutoResNdpInfo->tableSizeAssigned].ipv6Addr[4], ndp_entry[i].vid & 0xFFF); // writing vlan
  44573. + }
  44574. + WRITE_UINT32(NDDescriptor->p_Bindings, PTR_TO_UINT(icmpv6_bindings) - fmMuramVirtBaseAddr);
  44575. + }
  44576. + WRITE_UINT32(NDDescriptor->p_Statistics, PTR_TO_UINT(icmpv6_bindings) + sizeof(t_DsarIcmpV6BindingEntry)
  44577. + * (params->p_AutoResNdpInfo->tableSizeAssigned + params->p_AutoResNdpInfo->tableSizeTmp)
  44578. + - fmMuramVirtBaseAddr);
  44579. + WRITE_UINT32(NDDescriptor->solicitedAddr, 0xFFFFFFFF);
  44580. + }
  44581. +
  44582. + // SNMP
  44583. + if (params->p_AutoResSnmpInfo)
  44584. + {
  44585. + t_FmPortDsarSnmpInfo *snmpSrc = params->p_AutoResSnmpInfo;
  44586. + t_DsarSnmpIpv4AddrTblEntry* snmpIpv4Addr;
  44587. + t_DsarSnmpIpv6AddrTblEntry* snmpIpv6Addr;
  44588. + t_OidsTblEntry* snmpOid;
  44589. + uint8_t *charPointer;
  44590. + int len;
  44591. + t_DsarSnmpDescriptor* SnmpDescriptor = (t_DsarSnmpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->snmp);
  44592. + WRITE_UINT32(ArCommonDescPtr->p_SnmpDescriptor, PTR_TO_UINT(SnmpDescriptor) - fmMuramVirtBaseAddr);
  44593. + WRITE_UINT16(SnmpDescriptor->control, snmpSrc->control);
  44594. + WRITE_UINT16(SnmpDescriptor->maxSnmpMsgLength, snmpSrc->maxSnmpMsgLength);
  44595. + snmpIpv4Addr = (t_DsarSnmpIpv4AddrTblEntry*)(PTR_TO_UINT(SnmpDescriptor) + sizeof(t_DsarSnmpDescriptor));
  44596. + if (snmpSrc->numOfIpv4Addresses)
  44597. + {
  44598. + t_FmPortDsarSnmpIpv4AddrTblEntry* snmpIpv4AddrSrc = snmpSrc->p_Ipv4AddrTbl;
  44599. + WRITE_UINT16(SnmpDescriptor->numOfIpv4Addresses, snmpSrc->numOfIpv4Addresses);
  44600. + for (i = 0; i < snmpSrc->numOfIpv4Addresses; i++)
  44601. + {
  44602. + WRITE_UINT32(snmpIpv4Addr[i].ipv4Addr, snmpIpv4AddrSrc[i].ipv4Addr);
  44603. + if (snmpIpv4AddrSrc[i].isVlan)
  44604. + WRITE_UINT16(snmpIpv4Addr[i].vlanId, snmpIpv4AddrSrc[i].vid & 0xFFF);
  44605. + }
  44606. + WRITE_UINT32(SnmpDescriptor->p_Ipv4AddrTbl, PTR_TO_UINT(snmpIpv4Addr) - fmMuramVirtBaseAddr);
  44607. + }
  44608. + snmpIpv6Addr = (t_DsarSnmpIpv6AddrTblEntry*)(PTR_TO_UINT(snmpIpv4Addr)
  44609. + + sizeof(t_DsarSnmpIpv4AddrTblEntry) * snmpSrc->numOfIpv4Addresses);
  44610. + if (snmpSrc->numOfIpv6Addresses)
  44611. + {
  44612. + t_FmPortDsarSnmpIpv6AddrTblEntry* snmpIpv6AddrSrc = snmpSrc->p_Ipv6AddrTbl;
  44613. + WRITE_UINT16(SnmpDescriptor->numOfIpv6Addresses, snmpSrc->numOfIpv6Addresses);
  44614. + for (i = 0; i < snmpSrc->numOfIpv6Addresses; i++)
  44615. + {
  44616. + for (j = 0; j < 4; j++)
  44617. + WRITE_UINT32(snmpIpv6Addr[i].ipv6Addr[j], snmpIpv6AddrSrc[i].ipv6Addr[j]);
  44618. + if (snmpIpv6AddrSrc[i].isVlan)
  44619. + WRITE_UINT16(snmpIpv6Addr[i].vlanId, snmpIpv6AddrSrc[i].vid & 0xFFF);
  44620. + }
  44621. + WRITE_UINT32(SnmpDescriptor->p_Ipv6AddrTbl, PTR_TO_UINT(snmpIpv6Addr) - fmMuramVirtBaseAddr);
  44622. + }
  44623. + snmpOid = (t_OidsTblEntry*)(PTR_TO_UINT(snmpIpv6Addr)
  44624. + + sizeof(t_DsarSnmpIpv6AddrTblEntry) * snmpSrc->numOfIpv6Addresses);
  44625. + charPointer = (uint8_t*)(PTR_TO_UINT(snmpOid)
  44626. + + sizeof(t_OidsTblEntry) * snmpSrc->oidsTblSize);
  44627. + len = TOTAL_BER_LEN(GetBERLen(&snmpSrc->p_RdOnlyCommunityStr[1]));
  44628. + Mem2IOCpy32(charPointer, snmpSrc->p_RdOnlyCommunityStr, len);
  44629. + WRITE_UINT32(SnmpDescriptor->p_RdOnlyCommunityStr, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
  44630. + charPointer += len;
  44631. + len = TOTAL_BER_LEN(GetBERLen(&snmpSrc->p_RdWrCommunityStr[1]));
  44632. + Mem2IOCpy32(charPointer, snmpSrc->p_RdWrCommunityStr, len);
  44633. + WRITE_UINT32(SnmpDescriptor->p_RdWrCommunityStr, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
  44634. + charPointer += len;
  44635. + WRITE_UINT32(SnmpDescriptor->oidsTblSize, snmpSrc->oidsTblSize);
  44636. + WRITE_UINT32(SnmpDescriptor->p_OidsTbl, PTR_TO_UINT(snmpOid) - fmMuramVirtBaseAddr);
  44637. + for (i = 0; i < snmpSrc->oidsTblSize; i++)
  44638. + {
  44639. + WRITE_UINT16(snmpOid->oidSize, snmpSrc->p_OidsTbl[i].oidSize);
  44640. + WRITE_UINT16(snmpOid->resSize, snmpSrc->p_OidsTbl[i].resSize);
  44641. + Mem2IOCpy32(charPointer, snmpSrc->p_OidsTbl[i].oidVal, snmpSrc->p_OidsTbl[i].oidSize);
  44642. + WRITE_UINT32(snmpOid->p_Oid, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
  44643. + charPointer += snmpSrc->p_OidsTbl[i].oidSize;
  44644. + if (snmpSrc->p_OidsTbl[i].resSize <= 4)
  44645. + WRITE_UINT32(snmpOid->resValOrPtr, *snmpSrc->p_OidsTbl[i].resVal);
  44646. + else
  44647. + {
  44648. + Mem2IOCpy32(charPointer, snmpSrc->p_OidsTbl[i].resVal, snmpSrc->p_OidsTbl[i].resSize);
  44649. + WRITE_UINT32(snmpOid->resValOrPtr, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
  44650. + charPointer += snmpSrc->p_OidsTbl[i].resSize;
  44651. + }
  44652. + snmpOid++;
  44653. + }
  44654. + charPointer = UINT_TO_PTR(ROUND_UP(PTR_TO_UINT(charPointer),4));
  44655. + WRITE_UINT32(SnmpDescriptor->p_Statistics, PTR_TO_UINT(charPointer) - fmMuramVirtBaseAddr);
  44656. + }
  44657. +
  44658. + // filtering
  44659. + if (params->p_AutoResFilteringInfo)
  44660. + {
  44661. + if (params->p_AutoResFilteringInfo->ipProtPassOnHit)
  44662. + tmp |= IP_PROT_TBL_PASS_MASK;
  44663. + if (params->p_AutoResFilteringInfo->udpPortPassOnHit)
  44664. + tmp |= UDP_PORT_TBL_PASS_MASK;
  44665. + if (params->p_AutoResFilteringInfo->tcpPortPassOnHit)
  44666. + tmp |= TCP_PORT_TBL_PASS_MASK;
  44667. + WRITE_UINT8(ArCommonDescPtr->filterControl, tmp);
  44668. + WRITE_UINT16(ArCommonDescPtr->tcpControlPass, params->p_AutoResFilteringInfo->tcpFlagsMask);
  44669. +
  44670. + // ip filtering
  44671. + if (params->p_AutoResFilteringInfo->ipProtTableSize)
  44672. + {
  44673. + uint8_t* ip_tbl = (uint8_t*)(PTR_TO_UINT(ArCommonDescPtr) + of->filtIp);
  44674. + WRITE_UINT8(ArCommonDescPtr->ipProtocolTblSize, params->p_AutoResFilteringInfo->ipProtTableSize);
  44675. + for (i = 0; i < params->p_AutoResFilteringInfo->ipProtTableSize; i++)
  44676. + WRITE_UINT8(ip_tbl[i], params->p_AutoResFilteringInfo->p_IpProtTablePtr[i]);
  44677. + WRITE_UINT32(ArCommonDescPtr->p_IpProtocolFiltTbl, PTR_TO_UINT(ip_tbl) - fmMuramVirtBaseAddr);
  44678. + }
  44679. +
  44680. + // udp filtering
  44681. + if (params->p_AutoResFilteringInfo->udpPortsTableSize)
  44682. + {
  44683. + t_PortTblEntry* udp_tbl = (t_PortTblEntry*)(PTR_TO_UINT(ArCommonDescPtr) + of->filtUdp);
  44684. + WRITE_UINT8(ArCommonDescPtr->udpPortTblSize, params->p_AutoResFilteringInfo->udpPortsTableSize);
  44685. + for (i = 0; i < params->p_AutoResFilteringInfo->udpPortsTableSize; i++)
  44686. + {
  44687. + WRITE_UINT32(udp_tbl[i].Ports,
  44688. + (params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].srcPort << 16) +
  44689. + params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].dstPort);
  44690. + WRITE_UINT32(udp_tbl[i].PortsMask,
  44691. + (params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].srcPortMask << 16) +
  44692. + params->p_AutoResFilteringInfo->p_UdpPortsTablePtr[i].dstPortMask);
  44693. + }
  44694. + WRITE_UINT32(ArCommonDescPtr->p_UdpPortFiltTbl, PTR_TO_UINT(udp_tbl) - fmMuramVirtBaseAddr);
  44695. + }
  44696. +
  44697. + // tcp filtering
  44698. + if (params->p_AutoResFilteringInfo->tcpPortsTableSize)
  44699. + {
  44700. + t_PortTblEntry* tcp_tbl = (t_PortTblEntry*)(PTR_TO_UINT(ArCommonDescPtr) + of->filtTcp);
  44701. + WRITE_UINT8(ArCommonDescPtr->tcpPortTblSize, params->p_AutoResFilteringInfo->tcpPortsTableSize);
  44702. + for (i = 0; i < params->p_AutoResFilteringInfo->tcpPortsTableSize; i++)
  44703. + {
  44704. + WRITE_UINT32(tcp_tbl[i].Ports,
  44705. + (params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].srcPort << 16) +
  44706. + params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].dstPort);
  44707. + WRITE_UINT32(tcp_tbl[i].PortsMask,
  44708. + (params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].srcPortMask << 16) +
  44709. + params->p_AutoResFilteringInfo->p_TcpPortsTablePtr[i].dstPortMask);
  44710. + }
  44711. + WRITE_UINT32(ArCommonDescPtr->p_TcpPortFiltTbl, PTR_TO_UINT(tcp_tbl) - fmMuramVirtBaseAddr);
  44712. + }
  44713. + }
  44714. + // common stats
  44715. + WRITE_UINT32(ArCommonDescPtr->p_ArStats, PTR_TO_UINT(ArCommonDescPtr) + of->stats - fmMuramVirtBaseAddr);
  44716. +
  44717. + // get into Deep Sleep sequence:
  44718. +
  44719. + // Ensures that FMan do not enter the idle state. This is done by programing
  44720. + // FMDPSLPCR[FM_STOP] to one.
  44721. + fm_soc_suspend();
  44722. +
  44723. + ARDesc = UINT_TO_PTR(XX_VirtToPhys(ArCommonDescPtr));
  44724. + return E_OK;
  44725. +
  44726. +}
  44727. +
  44728. +void FM_ChangeClock(t_Handle h_Fm, int hardwarePortId);
  44729. +t_Error FM_PORT_EnterDsarFinal(t_Handle h_DsarRxPort, t_Handle h_DsarTxPort)
  44730. +{
  44731. + t_FmGetSetParams fmGetSetParams;
  44732. + t_FmPort *p_FmPort = (t_FmPort *)h_DsarRxPort;
  44733. + t_FmPort *p_FmPortTx = (t_FmPort *)h_DsarTxPort;
  44734. + t_Handle *h_FmPcd = FmGetPcd(p_FmPort->h_Fm);
  44735. + t_FmPort *p_FmPortHc = FM_PCD_GetHcPort(h_FmPcd);
  44736. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44737. + fmGetSetParams.setParams.type = UPDATE_FM_CLD;
  44738. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44739. +
  44740. + /* Issue graceful stop to HC port */
  44741. + FM_PORT_Disable(p_FmPortHc);
  44742. +
  44743. + // config tx port
  44744. + p_FmPort->deepSleepVars.fmbm_tcfg = GET_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg);
  44745. + WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg, GET_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg) | BMI_PORT_CFG_IM | BMI_PORT_CFG_EN);
  44746. + // ????
  44747. + p_FmPort->deepSleepVars.fmbm_tcmne = GET_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcmne);
  44748. + WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcmne, 0xE);
  44749. + // Stage 7:echo
  44750. + p_FmPort->deepSleepVars.fmbm_rfpne = GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne);
  44751. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne, 0x2E);
  44752. + if (!PrsIsEnabled(h_FmPcd))
  44753. + {
  44754. + p_FmPort->deepSleepVars.dsarEnabledParser = TRUE;
  44755. + PrsEnable(h_FmPcd);
  44756. + }
  44757. + else
  44758. + p_FmPort->deepSleepVars.dsarEnabledParser = FALSE;
  44759. +
  44760. + p_FmPort->deepSleepVars.fmbm_rfne = GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne);
  44761. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne, 0x440000);
  44762. +
  44763. + // save rcfg for restoring: accumulate mode is changed by ucode
  44764. + p_FmPort->deepSleepVars.fmbm_rcfg = GET_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rcfg);
  44765. + WRITE_UINT32(p_FmPort->port.bmi_regs->rx.fmbm_rcfg, p_FmPort->deepSleepVars.fmbm_rcfg | BMI_PORT_CFG_AM);
  44766. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44767. + fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
  44768. + fmGetSetParams.setParams.sleep = 1;
  44769. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44770. +
  44771. +// ***** issue external request sync command
  44772. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44773. + fmGetSetParams.setParams.type = UPDATE_FPM_EXTC;
  44774. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44775. + // get
  44776. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44777. + fmGetSetParams.getParams.type = GET_FMFP_EXTC;
  44778. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44779. + if (fmGetSetParams.getParams.fmfp_extc != 0)
  44780. + {
  44781. + // clear
  44782. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44783. + fmGetSetParams.setParams.type = UPDATE_FPM_EXTC_CLEAR;
  44784. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44785. +}
  44786. +
  44787. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44788. + fmGetSetParams.getParams.type = GET_FMFP_EXTC | GET_FM_NPI;
  44789. + do
  44790. + {
  44791. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44792. + } while (fmGetSetParams.getParams.fmfp_extc != 0 && fmGetSetParams.getParams.fm_npi == 0);
  44793. + if (fmGetSetParams.getParams.fm_npi != 0)
  44794. + XX_Print("FM: Sync did not finish\n");
  44795. +
  44796. + // check that all stoped
  44797. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44798. + fmGetSetParams.getParams.type = GET_FMQM_GS | GET_FM_NPI;
  44799. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44800. + while (fmGetSetParams.getParams.fmqm_gs & 0xF0000000)
  44801. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44802. + if (fmGetSetParams.getParams.fmqm_gs == 0 && fmGetSetParams.getParams.fm_npi == 0)
  44803. + XX_Print("FM: Sleeping\n");
  44804. +// FM_ChangeClock(p_FmPort->h_Fm, p_FmPort->hardwarePortId);
  44805. +
  44806. + return E_OK;
  44807. +}
  44808. +
  44809. +EXPORT_SYMBOL(FM_PORT_EnterDsarFinal);
  44810. +
  44811. +void FM_PORT_Dsar_DumpRegs()
  44812. +{
  44813. + uint32_t* hh = XX_PhysToVirt(PTR_TO_UINT(ARDesc));
  44814. + DUMP_MEMORY(hh, 0x220);
  44815. +}
  44816. +
  44817. +void FM_PORT_ExitDsar(t_Handle h_FmPortRx, t_Handle h_FmPortTx)
  44818. +{
  44819. + t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
  44820. + t_FmPort *p_FmPortTx = (t_FmPort *)h_FmPortTx;
  44821. + t_Handle *h_FmPcd = FmGetPcd(p_FmPort->h_Fm);
  44822. + t_FmPort *p_FmPortHc = FM_PCD_GetHcPort(h_FmPcd);
  44823. + t_FmGetSetParams fmGetSetParams;
  44824. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  44825. + fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
  44826. + fmGetSetParams.setParams.sleep = 0;
  44827. + if (p_FmPort->deepSleepVars.autoResOffsets)
  44828. + {
  44829. + XX_Free(p_FmPort->deepSleepVars.autoResOffsets);
  44830. + p_FmPort->deepSleepVars.autoResOffsets = 0;
  44831. + }
  44832. +
  44833. + if (p_FmPort->deepSleepVars.dsarEnabledParser)
  44834. + PrsDisable(FmGetPcd(p_FmPort->h_Fm));
  44835. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfpne, p_FmPort->deepSleepVars.fmbm_rfpne);
  44836. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfne, p_FmPort->deepSleepVars.fmbm_rfne);
  44837. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rcfg, p_FmPort->deepSleepVars.fmbm_rcfg);
  44838. + FmGetSetParams(p_FmPort->h_Fm, &fmGetSetParams);
  44839. + WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcmne, p_FmPort->deepSleepVars.fmbm_tcmne);
  44840. + WRITE_UINT32(p_FmPortTx->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfg, p_FmPort->deepSleepVars.fmbm_tcfg);
  44841. + FM_PORT_Enable(p_FmPortHc);
  44842. +}
  44843. +
  44844. +bool FM_PORT_IsInDsar(t_Handle h_FmPort)
  44845. +{
  44846. + t_FmPort *p_FmPort = (t_FmPort *)h_FmPort;
  44847. + return PTR_TO_UINT(p_FmPort->deepSleepVars.autoResOffsets);
  44848. +}
  44849. +
  44850. +t_Error FM_PORT_GetDsarStats(t_Handle h_FmPortRx, t_FmPortDsarStats *stats)
  44851. +{
  44852. + t_FmPort *p_FmPort = (t_FmPort *)h_FmPortRx;
  44853. + struct arOffsets *of = (struct arOffsets*)p_FmPort->deepSleepVars.autoResOffsets;
  44854. + uint8_t* fmMuramVirtBaseAddr = XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr);
  44855. + uint32_t *param_page = XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr));
  44856. + t_ArCommonDesc *ArCommonDescPtr = (t_ArCommonDesc*)(XX_PhysToVirt(p_FmPort->fmMuramPhysBaseAddr + GET_UINT32(*param_page)));
  44857. + t_DsarArpDescriptor *ArpDescriptor = (t_DsarArpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->arp);
  44858. + t_DsarArpStatistics* arp_stats = (t_DsarArpStatistics*)(PTR_TO_UINT(ArpDescriptor->p_Statistics) + fmMuramVirtBaseAddr);
  44859. + t_DsarIcmpV4Descriptor* ICMPV4Descriptor = (t_DsarIcmpV4Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv4);
  44860. + t_DsarIcmpV4Statistics* icmpv4_stats = (t_DsarIcmpV4Statistics*)(PTR_TO_UINT(ICMPV4Descriptor->p_Statistics) + fmMuramVirtBaseAddr);
  44861. + t_DsarNdDescriptor* NDDescriptor = (t_DsarNdDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->nd);
  44862. + t_NdStatistics* nd_stats = (t_NdStatistics*)(PTR_TO_UINT(NDDescriptor->p_Statistics) + fmMuramVirtBaseAddr);
  44863. + t_DsarIcmpV6Descriptor* ICMPV6Descriptor = (t_DsarIcmpV6Descriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->icmpv6);
  44864. + t_DsarIcmpV6Statistics* icmpv6_stats = (t_DsarIcmpV6Statistics*)(PTR_TO_UINT(ICMPV6Descriptor->p_Statistics) + fmMuramVirtBaseAddr);
  44865. + t_DsarSnmpDescriptor* SnmpDescriptor = (t_DsarSnmpDescriptor*)(PTR_TO_UINT(ArCommonDescPtr) + of->snmp);
  44866. + t_DsarSnmpStatistics* snmp_stats = (t_DsarSnmpStatistics*)(PTR_TO_UINT(SnmpDescriptor->p_Statistics) + fmMuramVirtBaseAddr);
  44867. + stats->arpArCnt = arp_stats->arCnt;
  44868. + stats->echoIcmpv4ArCnt = icmpv4_stats->arCnt;
  44869. + stats->ndpArCnt = nd_stats->arCnt;
  44870. + stats->echoIcmpv6ArCnt = icmpv6_stats->arCnt;
  44871. + stats->snmpGetCnt = snmp_stats->snmpGetReqCnt;
  44872. + stats->snmpGetNextCnt = snmp_stats->snmpGetNextReqCnt;
  44873. + return E_OK;
  44874. +}
  44875. --- /dev/null
  44876. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.h
  44877. @@ -0,0 +1,999 @@
  44878. +/*
  44879. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  44880. + *
  44881. + * Redistribution and use in source and binary forms, with or without
  44882. + * modification, are permitted provided that the following conditions are met:
  44883. + * * Redistributions of source code must retain the above copyright
  44884. + * notice, this list of conditions and the following disclaimer.
  44885. + * * Redistributions in binary form must reproduce the above copyright
  44886. + * notice, this list of conditions and the following disclaimer in the
  44887. + * documentation and/or other materials provided with the distribution.
  44888. + * * Neither the name of Freescale Semiconductor nor the
  44889. + * names of its contributors may be used to endorse or promote products
  44890. + * derived from this software without specific prior written permission.
  44891. + *
  44892. + *
  44893. + * ALTERNATIVELY, this software may be distributed under the terms of the
  44894. + * GNU General Public License ("GPL") as published by the Free Software
  44895. + * Foundation, either version 2 of that License or (at your option) any
  44896. + * later version.
  44897. + *
  44898. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  44899. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  44900. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  44901. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  44902. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  44903. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  44904. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  44905. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  44906. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  44907. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  44908. + */
  44909. +
  44910. +
  44911. +/******************************************************************************
  44912. + @File fm_port.h
  44913. +
  44914. + @Description FM Port internal structures and definitions.
  44915. +*//***************************************************************************/
  44916. +#ifndef __FM_PORT_H
  44917. +#define __FM_PORT_H
  44918. +
  44919. +#include "error_ext.h"
  44920. +#include "std_ext.h"
  44921. +#include "fm_port_ext.h"
  44922. +
  44923. +#include "fm_common.h"
  44924. +#include "fm_sp_common.h"
  44925. +#include "fsl_fman_sp.h"
  44926. +#include "fm_port_ext.h"
  44927. +#include "fsl_fman_port.h"
  44928. +
  44929. +#define __ERR_MODULE__ MODULE_FM_PORT
  44930. +
  44931. +
  44932. +#define MIN_EXT_BUF_SIZE 64
  44933. +#define DATA_ALIGNMENT 64
  44934. +#define MAX_LIODN_OFFSET 64
  44935. +#define MAX_PORT_FIFO_SIZE MIN(BMI_MAX_FIFO_SIZE, 1024*BMI_FIFO_UNITS)
  44936. +
  44937. +/**************************************************************************//**
  44938. + @Description Memory Map defines
  44939. +*//***************************************************************************/
  44940. +#define BMI_PORT_REGS_OFFSET 0
  44941. +#define QMI_PORT_REGS_OFFSET 0x400
  44942. +#define PRS_PORT_REGS_OFFSET 0x800
  44943. +
  44944. +/**************************************************************************//**
  44945. + @Description defaults
  44946. +*//***************************************************************************/
  44947. +#define DEFAULT_PORT_deqHighPriority_1G FALSE
  44948. +#define DEFAULT_PORT_deqHighPriority_10G TRUE
  44949. +#define DEFAULT_PORT_deqType e_FM_PORT_DEQ_TYPE1
  44950. +#define DEFAULT_PORT_deqPrefetchOption e_FM_PORT_DEQ_FULL_PREFETCH
  44951. +#define DEFAULT_PORT_deqPrefetchOption_HC e_FM_PORT_DEQ_NO_PREFETCH
  44952. +#define DEFAULT_PORT_deqByteCnt_10G 0x1400
  44953. +#define DEFAULT_PORT_deqByteCnt_1G 0x400
  44954. +#define DEFAULT_PORT_bufferPrefixContent_privDataSize DEFAULT_FM_SP_bufferPrefixContent_privDataSize
  44955. +#define DEFAULT_PORT_bufferPrefixContent_passPrsResult DEFAULT_FM_SP_bufferPrefixContent_passPrsResult
  44956. +#define DEFAULT_PORT_bufferPrefixContent_passTimeStamp DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp
  44957. +#define DEFAULT_PORT_bufferPrefixContent_allOtherPCDInfo DEFAULT_FM_SP_bufferPrefixContent_allOtherPCDInfo
  44958. +#define DEFAULT_PORT_bufferPrefixContent_dataAlign DEFAULT_FM_SP_bufferPrefixContent_dataAlign
  44959. +#define DEFAULT_PORT_cheksumLastBytesIgnore 0
  44960. +#define DEFAULT_PORT_cutBytesFromEnd 4
  44961. +#define DEFAULT_PORT_fifoDeqPipelineDepth_IM 2
  44962. +
  44963. +#define DEFAULT_PORT_frmDiscardOverride FALSE
  44964. +
  44965. +#define DEFAULT_PORT_dmaSwapData (e_FmDmaSwapOption)DEFAULT_FMAN_SP_DMA_SWAP_DATA
  44966. +#define DEFAULT_PORT_dmaIntContextCacheAttr (e_FmDmaCacheOption)DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR
  44967. +#define DEFAULT_PORT_dmaHeaderCacheAttr (e_FmDmaCacheOption)DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR
  44968. +#define DEFAULT_PORT_dmaScatterGatherCacheAttr (e_FmDmaCacheOption)DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR
  44969. +#define DEFAULT_PORT_dmaWriteOptimize DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE
  44970. +
  44971. +#define DEFAULT_PORT_noScatherGather DEFAULT_FMAN_SP_NO_SCATTER_GATHER
  44972. +#define DEFAULT_PORT_forwardIntContextReuse FALSE
  44973. +#define DEFAULT_PORT_BufMargins_startMargins 32
  44974. +#define DEFAULT_PORT_BufMargins_endMargins 0
  44975. +#define DEFAULT_PORT_syncReq TRUE
  44976. +#define DEFAULT_PORT_syncReqForHc FALSE
  44977. +#define DEFAULT_PORT_color e_FM_PORT_COLOR_GREEN
  44978. +#define DEFAULT_PORT_errorsToDiscard FM_PORT_FRM_ERR_CLS_DISCARD
  44979. +/* #define DEFAULT_PORT_dualRateLimitScaleDown e_FM_PORT_DUAL_RATE_LIMITER_NONE */
  44980. +/* #define DEFAULT_PORT_rateLimitBurstSizeHighGranularity FALSE */
  44981. +#define DEFAULT_PORT_exception IM_EV_BSY
  44982. +#define DEFAULT_PORT_maxFrameLength 9600
  44983. +
  44984. +#define DEFAULT_notSupported 0xff
  44985. +
  44986. +#if (DPAA_VERSION < 11)
  44987. +#define DEFAULT_PORT_rxFifoPriElevationLevel MAX_PORT_FIFO_SIZE
  44988. +#define DEFAULT_PORT_rxFifoThreshold (MAX_PORT_FIFO_SIZE*3/4)
  44989. +
  44990. +#define DEFAULT_PORT_txFifoMinFillLevel 0
  44991. +#define DEFAULT_PORT_txFifoLowComfLevel (5*KILOBYTE)
  44992. +#define DEFAULT_PORT_fifoDeqPipelineDepth_1G 1
  44993. +#define DEFAULT_PORT_fifoDeqPipelineDepth_10G 4
  44994. +
  44995. +#define DEFAULT_PORT_fifoDeqPipelineDepth_OH 2
  44996. +
  44997. +/* Host command port MUST NOT be changed to more than 1 !!! */
  44998. +#define DEFAULT_PORT_numOfTasks(type) \
  44999. + (uint32_t)((((type) == e_FM_PORT_TYPE_RX_10G) || \
  45000. + ((type) == e_FM_PORT_TYPE_TX_10G)) ? 16 : \
  45001. + ((((type) == e_FM_PORT_TYPE_RX) || \
  45002. + ((type) == e_FM_PORT_TYPE_TX) || \
  45003. + ((type) == e_FM_PORT_TYPE_OH_OFFLINE_PARSING)) ? 3 : 1))
  45004. +
  45005. +#define DEFAULT_PORT_extraNumOfTasks(type) \
  45006. + (uint32_t)(((type) == e_FM_PORT_TYPE_RX_10G) ? 8 : \
  45007. + (((type) == e_FM_PORT_TYPE_RX) ? 2 : 0))
  45008. +
  45009. +#define DEFAULT_PORT_numOfOpenDmas(type) \
  45010. + (uint32_t)((((type) == e_FM_PORT_TYPE_TX_10G) || \
  45011. + ((type) == e_FM_PORT_TYPE_RX_10G)) ? 8 : 1 )
  45012. +
  45013. +#define DEFAULT_PORT_extraNumOfOpenDmas(type) \
  45014. + (uint32_t)(((type) == e_FM_PORT_TYPE_RX_10G) ? 8 : \
  45015. + (((type) == e_FM_PORT_TYPE_RX) ? 1 : 0))
  45016. +
  45017. +#define DEFAULT_PORT_numOfFifoBufs(type) \
  45018. + (uint32_t)((((type) == e_FM_PORT_TYPE_RX_10G) || \
  45019. + ((type) == e_FM_PORT_TYPE_TX_10G)) ? 48 : \
  45020. + ((type) == e_FM_PORT_TYPE_RX) ? 45 : \
  45021. + ((type) == e_FM_PORT_TYPE_TX) ? 44 : 8)
  45022. +
  45023. +#define DEFAULT_PORT_extraNumOfFifoBufs 0
  45024. +
  45025. +#else /* (DPAA_VERSION < 11) */
  45026. +/* Defaults are registers' reset values */
  45027. +#define DEFAULT_PORT_rxFifoPriElevationLevel MAX_PORT_FIFO_SIZE
  45028. +#define DEFAULT_PORT_rxFifoThreshold MAX_PORT_FIFO_SIZE
  45029. +
  45030. +#define DEFAULT_PORT_txFifoMinFillLevel 0
  45031. +#define DEFAULT_PORT_txFifoLowComfLevel (5 * KILOBYTE)
  45032. +#define DEFAULT_PORT_fifoDeqPipelineDepth_1G 2
  45033. +#define DEFAULT_PORT_fifoDeqPipelineDepth_10G 4
  45034. +
  45035. +#define DEFAULT_PORT_fifoDeqPipelineDepth_OH 2
  45036. +
  45037. +#define DEFAULT_PORT_numOfTasks(type) \
  45038. + (uint32_t)((((type) == e_FM_PORT_TYPE_RX_10G) || \
  45039. + ((type) == e_FM_PORT_TYPE_TX_10G)) ? 14 : \
  45040. + (((type) == e_FM_PORT_TYPE_RX) || \
  45041. + ((type) == e_FM_PORT_TYPE_TX)) ? 4 : \
  45042. + ((type) == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) ? 6 : 1)
  45043. +
  45044. +#define DEFAULT_PORT_extraNumOfTasks(type) 0
  45045. +
  45046. +#define DEFAULT_PORT_numOfOpenDmas(type) \
  45047. + (uint32_t)(((type) == e_FM_PORT_TYPE_RX_10G) ? 8 : \
  45048. + ((type) == e_FM_PORT_TYPE_TX_10G) ? 12 : \
  45049. + ((type) == e_FM_PORT_TYPE_RX) ? 2 : \
  45050. + ((type) == e_FM_PORT_TYPE_TX) ? 3 : \
  45051. + ((type) == e_FM_PORT_TYPE_OH_HOST_COMMAND) ? 2 : 4)
  45052. +
  45053. +#define DEFAULT_PORT_extraNumOfOpenDmas(type) 0
  45054. +
  45055. +#define DEFAULT_PORT_numOfFifoBufs(type) \
  45056. + (uint32_t) (((type) == e_FM_PORT_TYPE_RX_10G) ? 96 : \
  45057. + ((type) == e_FM_PORT_TYPE_TX_10G) ? 64 : \
  45058. + ((type) == e_FM_PORT_TYPE_OH_HOST_COMMAND) ? 10 : 50)
  45059. +
  45060. +#define DEFAULT_PORT_extraNumOfFifoBufs 0
  45061. +
  45062. +#endif /* (DPAA_VERSION < 11) */
  45063. +
  45064. +#define DEFAULT_PORT_txBdRingLength 16
  45065. +#define DEFAULT_PORT_rxBdRingLength 128
  45066. +#define DEFAULT_PORT_ImfwExtStructsMemId 0
  45067. +#define DEFAULT_PORT_ImfwExtStructsMemAttr MEMORY_ATTR_CACHEABLE
  45068. +
  45069. +#define FM_PORT_CG_REG_NUM(_cgId) (((FM_PORT_NUM_OF_CONGESTION_GRPS/32)-1)-_cgId/32)
  45070. +
  45071. +/**************************************************************************//**
  45072. + @Collection PCD Engines
  45073. +*//***************************************************************************/
  45074. +typedef uint32_t fmPcdEngines_t; /**< options as defined below: */
  45075. +
  45076. +#define FM_PCD_NONE 0 /**< No PCD Engine indicated */
  45077. +#define FM_PCD_PRS 0x80000000 /**< Parser indicated */
  45078. +#define FM_PCD_KG 0x40000000 /**< Keygen indicated */
  45079. +#define FM_PCD_CC 0x20000000 /**< Coarse classification indicated */
  45080. +#define FM_PCD_PLCR 0x10000000 /**< Policer indicated */
  45081. +#define FM_PCD_MANIP 0x08000000 /**< Manipulation indicated */
  45082. +/* @} */
  45083. +
  45084. +#define FM_PORT_MAX_NUM_OF_EXT_POOLS_ALL_INTEGRATIONS 8
  45085. +#define FM_PORT_MAX_NUM_OF_CONGESTION_GRPS_ALL_INTEGRATIONS 256
  45086. +#define FM_PORT_CG_REG_NUM(_cgId) (((FM_PORT_NUM_OF_CONGESTION_GRPS/32)-1)-_cgId/32)
  45087. +
  45088. +#define FM_OH_PORT_ID 0
  45089. +
  45090. +/***********************************************************************/
  45091. +/* SW parser OFFLOAD labels (offsets) */
  45092. +/***********************************************************************/
  45093. +#if (DPAA_VERSION == 10)
  45094. +#define OFFLOAD_SW_PATCH_IPv4_IPR_LABEL 0x300
  45095. +#define OFFLOAD_SW_PATCH_IPv6_IPR_LABEL 0x325
  45096. +#define OFFLOAD_SW_PATCH_IPv6_IPF_LABEL 0x325
  45097. +#else
  45098. +#define OFFLOAD_SW_PATCH_IPv4_IPR_LABEL 0x100
  45099. +/* Will be used for:
  45100. + * 1. identify fragments
  45101. + * 2. udp-lite
  45102. + */
  45103. +#define OFFLOAD_SW_PATCH_IPv6_IPR_LABEL 0x146
  45104. +/* Will be used for:
  45105. + * 1. will identify the fragmentable area
  45106. + * 2. udp-lite
  45107. + */
  45108. +#define OFFLOAD_SW_PATCH_IPv6_IPF_LABEL 0x261
  45109. +#define OFFLOAD_SW_PATCH_CAPWAP_LABEL 0x38d
  45110. +#endif /* (DPAA_VERSION == 10) */
  45111. +
  45112. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  45113. +#define UDP_LITE_SW_PATCH_LABEL 0x2E0
  45114. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  45115. +
  45116. +
  45117. +/**************************************************************************//**
  45118. + @Description Memory Mapped Registers
  45119. +*//***************************************************************************/
  45120. +
  45121. +#if defined(__MWERKS__) && !defined(__GNUC__)
  45122. +#pragma pack(push,1)
  45123. +#endif /* defined(__MWERKS__) && ... */
  45124. +
  45125. +typedef struct
  45126. +{
  45127. + volatile uint32_t fmbm_rcfg; /**< Rx Configuration */
  45128. + volatile uint32_t fmbm_rst; /**< Rx Status */
  45129. + volatile uint32_t fmbm_rda; /**< Rx DMA attributes*/
  45130. + volatile uint32_t fmbm_rfp; /**< Rx FIFO Parameters*/
  45131. + volatile uint32_t fmbm_rfed; /**< Rx Frame End Data*/
  45132. + volatile uint32_t fmbm_ricp; /**< Rx Internal Context Parameters*/
  45133. + volatile uint32_t fmbm_rim; /**< Rx Internal Buffer Margins*/
  45134. + volatile uint32_t fmbm_rebm; /**< Rx External Buffer Margins*/
  45135. + volatile uint32_t fmbm_rfne; /**< Rx Frame Next Engine*/
  45136. + volatile uint32_t fmbm_rfca; /**< Rx Frame Command Attributes.*/
  45137. + volatile uint32_t fmbm_rfpne; /**< Rx Frame Parser Next Engine*/
  45138. + volatile uint32_t fmbm_rpso; /**< Rx Parse Start Offset*/
  45139. + volatile uint32_t fmbm_rpp; /**< Rx Policer Profile */
  45140. + volatile uint32_t fmbm_rccb; /**< Rx Coarse Classification Base */
  45141. + volatile uint32_t fmbm_reth; /**< Rx Excessive Threshold */
  45142. + volatile uint32_t reserved1[0x01];/**< (0x03C) */
  45143. + volatile uint32_t fmbm_rprai[FM_PORT_PRS_RESULT_NUM_OF_WORDS];
  45144. + /**< Rx Parse Results Array Initialization*/
  45145. + volatile uint32_t fmbm_rfqid; /**< Rx Frame Queue ID*/
  45146. + volatile uint32_t fmbm_refqid; /**< Rx Error Frame Queue ID*/
  45147. + volatile uint32_t fmbm_rfsdm; /**< Rx Frame Status Discard Mask*/
  45148. + volatile uint32_t fmbm_rfsem; /**< Rx Frame Status Error Mask*/
  45149. + volatile uint32_t fmbm_rfene; /**< Rx Frame Enqueue Next Engine */
  45150. + volatile uint32_t reserved2[0x02];/**< (0x074-0x078) */
  45151. + volatile uint32_t fmbm_rcmne; /**< Rx Frame Continuous Mode Next Engine */
  45152. + volatile uint32_t reserved3[0x20];/**< (0x080 0x0FF) */
  45153. + volatile uint32_t fmbm_ebmpi[FM_PORT_MAX_NUM_OF_EXT_POOLS_ALL_INTEGRATIONS];
  45154. + /**< Buffer Manager pool Information-*/
  45155. + volatile uint32_t fmbm_acnt[FM_PORT_MAX_NUM_OF_EXT_POOLS_ALL_INTEGRATIONS];
  45156. + /**< Allocate Counter-*/
  45157. + volatile uint32_t reserved4[0x08];
  45158. + /**< 0x130/0x140 - 0x15F reserved -*/
  45159. + volatile uint32_t fmbm_rcgm[FM_PORT_MAX_NUM_OF_CONGESTION_GRPS_ALL_INTEGRATIONS/32];
  45160. + /**< Congestion Group Map*/
  45161. + volatile uint32_t fmbm_rmpd; /**< BM Pool Depletion */
  45162. + volatile uint32_t reserved5[0x1F];/**< (0x184 0x1FF) */
  45163. + volatile uint32_t fmbm_rstc; /**< Rx Statistics Counters*/
  45164. + volatile uint32_t fmbm_rfrc; /**< Rx Frame Counter*/
  45165. + volatile uint32_t fmbm_rfbc; /**< Rx Bad Frames Counter*/
  45166. + volatile uint32_t fmbm_rlfc; /**< Rx Large Frames Counter*/
  45167. + volatile uint32_t fmbm_rffc; /**< Rx Filter Frames Counter*/
  45168. + volatile uint32_t fmbm_rfcd; /**< Rx Frame Discard Counter*/
  45169. + volatile uint32_t fmbm_rfldec; /**< Rx Frames List DMA Error Counter*/
  45170. + volatile uint32_t fmbm_rodc; /**< Rx Out of Buffers Discard Counter-*/
  45171. + volatile uint32_t fmbm_rbdc; /**< Rx Buffers Deallocate Counter-*/
  45172. + volatile uint32_t fmbm_rpec; /**< Rx RX Prepare to enqueue Counter-*/
  45173. + volatile uint32_t reserved6[0x16];/**< (0x228 0x27F) */
  45174. + volatile uint32_t fmbm_rpc; /**< Rx Performance Counters*/
  45175. + volatile uint32_t fmbm_rpcp; /**< Rx Performance Count Parameters*/
  45176. + volatile uint32_t fmbm_rccn; /**< Rx Cycle Counter*/
  45177. + volatile uint32_t fmbm_rtuc; /**< Rx Tasks Utilization Counter*/
  45178. + volatile uint32_t fmbm_rrquc; /**< Rx Receive Queue Utilization Counter*/
  45179. + volatile uint32_t fmbm_rduc; /**< Rx DMA Utilization Counter*/
  45180. + volatile uint32_t fmbm_rfuc; /**< Rx FIFO Utilization Counter*/
  45181. + volatile uint32_t fmbm_rpac; /**< Rx Pause Activation Counter*/
  45182. + volatile uint32_t reserved7[0x18];/**< (0x2A0-0x2FF) */
  45183. + volatile uint32_t fmbm_rdcfg[0x3];/**< Rx Debug-*/
  45184. + volatile uint32_t fmbm_rgpr; /**< Rx General Purpose Register. */
  45185. + volatile uint32_t reserved8[0x3a];/**< (0x310-0x3FF) */
  45186. +} t_FmPortRxBmiRegs;
  45187. +
  45188. +typedef struct
  45189. +{
  45190. + volatile uint32_t fmbm_tcfg; /**< Tx Configuration */
  45191. + volatile uint32_t fmbm_tst; /**< Tx Status */
  45192. + volatile uint32_t fmbm_tda; /**< Tx DMA attributes */
  45193. + volatile uint32_t fmbm_tfp; /**< Tx FIFO Parameters */
  45194. + volatile uint32_t fmbm_tfed; /**< Tx Frame End Data */
  45195. + volatile uint32_t fmbm_ticp; /**< Tx Internal Context Parameters */
  45196. + volatile uint32_t fmbm_tfdne; /**< Tx Frame Dequeue Next Engine. */
  45197. + volatile uint32_t fmbm_tfca; /**< Tx Frame Command attribute. */
  45198. + volatile uint32_t fmbm_tcfqid; /**< Tx Confirmation Frame Queue ID. */
  45199. + volatile uint32_t fmbm_tfeqid; /**< Tx Frame Error Queue ID */
  45200. + volatile uint32_t fmbm_tfene; /**< Tx Frame Enqueue Next Engine */
  45201. + volatile uint32_t fmbm_trlmts; /**< Tx Rate Limiter Scale */
  45202. + volatile uint32_t fmbm_trlmt; /**< Tx Rate Limiter */
  45203. + volatile uint32_t fmbm_tccb; /**< Tx Coarse Classification Base */
  45204. + volatile uint32_t reserved0[0x0e];/**< (0x038-0x070) */
  45205. + volatile uint32_t fmbm_tfne; /**< Tx Frame Next Engine */
  45206. + volatile uint32_t fmbm_tpfcm[0x02];/**< Tx Priority based Flow Control (PFC) Mapping */
  45207. + volatile uint32_t fmbm_tcmne; /**< Tx Frame Continuous Mode Next Engine */
  45208. + volatile uint32_t reserved2[0x60];/**< (0x080-0x200) */
  45209. + volatile uint32_t fmbm_tstc; /**< Tx Statistics Counters */
  45210. + volatile uint32_t fmbm_tfrc; /**< Tx Frame Counter */
  45211. + volatile uint32_t fmbm_tfdc; /**< Tx Frames Discard Counter */
  45212. + volatile uint32_t fmbm_tfledc; /**< Tx Frame Length error discard counter */
  45213. + volatile uint32_t fmbm_tfufdc; /**< Tx Frame unsupported format discard Counter */
  45214. + volatile uint32_t fmbm_tbdc; /**< Tx Buffers Deallocate Counter */
  45215. + volatile uint32_t reserved3[0x1A];/**< (0x218-0x280) */
  45216. + volatile uint32_t fmbm_tpc; /**< Tx Performance Counters*/
  45217. + volatile uint32_t fmbm_tpcp; /**< Tx Performance Count Parameters*/
  45218. + volatile uint32_t fmbm_tccn; /**< Tx Cycle Counter*/
  45219. + volatile uint32_t fmbm_ttuc; /**< Tx Tasks Utilization Counter*/
  45220. + volatile uint32_t fmbm_ttcquc; /**< Tx Transmit Confirm Queue Utilization Counter*/
  45221. + volatile uint32_t fmbm_tduc; /**< Tx DMA Utilization Counter*/
  45222. + volatile uint32_t fmbm_tfuc; /**< Tx FIFO Utilization Counter*/
  45223. + volatile uint32_t reserved4[16]; /**< (0x29C-0x2FF) */
  45224. + volatile uint32_t fmbm_tdcfg[0x3];/**< Tx Debug-*/
  45225. + volatile uint32_t fmbm_tgpr; /**< O/H General Purpose Register */
  45226. + volatile uint32_t reserved5[0x3a];/**< (0x310-0x3FF) */
  45227. +} t_FmPortTxBmiRegs;
  45228. +
  45229. +typedef struct
  45230. +{
  45231. + volatile uint32_t fmbm_ocfg; /**< O/H Configuration */
  45232. + volatile uint32_t fmbm_ost; /**< O/H Status */
  45233. + volatile uint32_t fmbm_oda; /**< O/H DMA attributes */
  45234. + volatile uint32_t fmbm_oicp; /**< O/H Internal Context Parameters */
  45235. + volatile uint32_t fmbm_ofdne; /**< O/H Frame Dequeue Next Engine */
  45236. + volatile uint32_t fmbm_ofne; /**< O/H Frame Next Engine */
  45237. + volatile uint32_t fmbm_ofca; /**< O/H Frame Command Attributes. */
  45238. + volatile uint32_t fmbm_ofpne; /**< O/H Frame Parser Next Engine */
  45239. + volatile uint32_t fmbm_opso; /**< O/H Parse Start Offset */
  45240. + volatile uint32_t fmbm_opp; /**< O/H Policer Profile */
  45241. + volatile uint32_t fmbm_occb; /**< O/H Coarse Classification base */
  45242. + volatile uint32_t fmbm_oim; /**< O/H Internal margins*/
  45243. + volatile uint32_t fmbm_ofp; /**< O/H Fifo Parameters*/
  45244. + volatile uint32_t fmbm_ofed; /**< O/H Frame End Data*/
  45245. + volatile uint32_t reserved0[2]; /**< (0x038 - 0x03F) */
  45246. + volatile uint32_t fmbm_oprai[FM_PORT_PRS_RESULT_NUM_OF_WORDS];
  45247. + /**< O/H Parse Results Array Initialization */
  45248. + volatile uint32_t fmbm_ofqid; /**< O/H Frame Queue ID */
  45249. + volatile uint32_t fmbm_oefqid; /**< O/H Error Frame Queue ID */
  45250. + volatile uint32_t fmbm_ofsdm; /**< O/H Frame Status Discard Mask */
  45251. + volatile uint32_t fmbm_ofsem; /**< O/H Frame Status Error Mask */
  45252. + volatile uint32_t fmbm_ofene; /**< O/H Frame Enqueue Next Engine */
  45253. + volatile uint32_t fmbm_orlmts; /**< O/H Rate Limiter Scale */
  45254. + volatile uint32_t fmbm_orlmt; /**< O/H Rate Limiter */
  45255. + volatile uint32_t fmbm_ocmne; /**< O/H Continuous Mode Next Engine */
  45256. + volatile uint32_t reserved1[0x20];/**< (0x080 - 0x0FF) */
  45257. + volatile uint32_t fmbm_oebmpi[2]; /**< Buffer Manager Observed Pool Information */
  45258. + volatile uint32_t reserved2[0x16];/**< (0x108 - 0x15F) */
  45259. + volatile uint32_t fmbm_ocgm; /**< Observed Congestion Group Map */
  45260. + volatile uint32_t reserved3[0x7]; /**< (0x164 - 0x17F) */
  45261. + volatile uint32_t fmbm_ompd; /**< Observed BMan Pool Depletion */
  45262. + volatile uint32_t reserved4[0x1F];/**< (0x184 - 0x1FF) */
  45263. + volatile uint32_t fmbm_ostc; /**< O/H Statistics Counters */
  45264. + volatile uint32_t fmbm_ofrc; /**< O/H Frame Counter */
  45265. + volatile uint32_t fmbm_ofdc; /**< O/H Frames Discard Counter */
  45266. + volatile uint32_t fmbm_ofledc; /**< O/H Frames Length Error Discard Counter */
  45267. + volatile uint32_t fmbm_ofufdc; /**< O/H Frames Unsupported Format Discard Counter */
  45268. + volatile uint32_t fmbm_offc; /**< O/H Filter Frames Counter */
  45269. + volatile uint32_t fmbm_ofwdc; /**< - Rx Frames WRED Discard Counter */
  45270. + volatile uint32_t fmbm_ofldec; /**< O/H Frames List DMA Error Counter */
  45271. + volatile uint32_t fmbm_obdc; /**< O/H Buffers Deallocate Counter */
  45272. + volatile uint32_t fmbm_oodc; /**< O/H Out of Buffers Discard Counter */
  45273. + volatile uint32_t fmbm_opec; /**< O/H Prepare to enqueue Counter */
  45274. + volatile uint32_t reserved5[0x15];/**< ( - 0x27F) */
  45275. + volatile uint32_t fmbm_opc; /**< O/H Performance Counters */
  45276. + volatile uint32_t fmbm_opcp; /**< O/H Performance Count Parameters */
  45277. + volatile uint32_t fmbm_occn; /**< O/H Cycle Counter */
  45278. + volatile uint32_t fmbm_otuc; /**< O/H Tasks Utilization Counter */
  45279. + volatile uint32_t fmbm_oduc; /**< O/H DMA Utilization Counter */
  45280. + volatile uint32_t fmbm_ofuc; /**< O/H FIFO Utilization Counter */
  45281. + volatile uint32_t reserved6[26]; /**< (0x298-0x2FF) */
  45282. + volatile uint32_t fmbm_odcfg[0x3];/**< O/H Debug (only 1 in P1023) */
  45283. + volatile uint32_t fmbm_ogpr; /**< O/H General Purpose Register. */
  45284. + volatile uint32_t reserved7[0x3a];/**< (0x310 0x3FF) */
  45285. +} t_FmPortOhBmiRegs;
  45286. +
  45287. +typedef union
  45288. +{
  45289. + t_FmPortRxBmiRegs rxPortBmiRegs;
  45290. + t_FmPortTxBmiRegs txPortBmiRegs;
  45291. + t_FmPortOhBmiRegs ohPortBmiRegs;
  45292. +} u_FmPortBmiRegs;
  45293. +
  45294. +typedef struct
  45295. +{
  45296. + volatile uint32_t reserved1[2]; /**< 0xn024 - 0x02B */
  45297. + volatile uint32_t fmqm_pndn; /**< PortID n Dequeue NIA Register */
  45298. + volatile uint32_t fmqm_pndc; /**< PortID n Dequeue Config Register */
  45299. + volatile uint32_t fmqm_pndtfc; /**< PortID n Dequeue Total Frame Counter */
  45300. + volatile uint32_t fmqm_pndfdc; /**< PortID n Dequeue FQID from Default Counter */
  45301. + volatile uint32_t fmqm_pndcc; /**< PortID n Dequeue Confirm Counter */
  45302. +} t_FmPortNonRxQmiRegs;
  45303. +
  45304. +typedef struct
  45305. +{
  45306. + volatile uint32_t fmqm_pnc; /**< PortID n Configuration Register */
  45307. + volatile uint32_t fmqm_pns; /**< PortID n Status Register */
  45308. + volatile uint32_t fmqm_pnts; /**< PortID n Task Status Register */
  45309. + volatile uint32_t reserved0[4]; /**< 0xn00C - 0xn01B */
  45310. + volatile uint32_t fmqm_pnen; /**< PortID n Enqueue NIA Register */
  45311. + volatile uint32_t fmqm_pnetfc; /**< PortID n Enqueue Total Frame Counter */
  45312. + t_FmPortNonRxQmiRegs nonRxQmiRegs; /**< Registers for Tx Hc & Op ports */
  45313. +} t_FmPortQmiRegs;
  45314. +
  45315. +typedef struct
  45316. +{
  45317. + struct
  45318. + {
  45319. + volatile uint32_t softSeqAttach; /**< Soft Sequence Attachment */
  45320. + volatile uint32_t lcv; /**< Line-up Enable Confirmation Mask */
  45321. + } hdrs[FM_PCD_PRS_NUM_OF_HDRS];
  45322. + volatile uint32_t reserved0[0xde];
  45323. + volatile uint32_t pcac; /**< Parse Internal Memory Configuration Access Control Register */
  45324. + volatile uint32_t pctpid; /**< Parse Internal Memory Configured TPID Register */
  45325. +} t_FmPortPrsRegs;
  45326. +
  45327. +/**************************************************************************//*
  45328. + @Description Basic buffer descriptor (BD) structure
  45329. +*//***************************************************************************/
  45330. +typedef _Packed struct
  45331. +{
  45332. + volatile uint16_t status;
  45333. + volatile uint16_t length;
  45334. + volatile uint8_t reserved0[0x6];
  45335. + volatile uint8_t reserved1[0x1];
  45336. + volatile t_FmPhysAddr buff;
  45337. +} _PackedType t_FmImBd;
  45338. +
  45339. +typedef _Packed struct
  45340. +{
  45341. + volatile uint16_t gen; /**< tbd */
  45342. + volatile uint8_t reserved0[0x1];
  45343. + volatile t_FmPhysAddr bdRingBase; /**< tbd */
  45344. + volatile uint16_t bdRingSize; /**< tbd */
  45345. + volatile uint16_t offsetIn; /**< tbd */
  45346. + volatile uint16_t offsetOut; /**< tbd */
  45347. + volatile uint8_t reserved1[0x12]; /**< 0x0e - 0x1f */
  45348. +} _PackedType t_FmPortImQd;
  45349. +
  45350. +typedef _Packed struct
  45351. +{
  45352. + volatile uint32_t mode; /**< Mode register */
  45353. + volatile uint32_t rxQdPtr; /**< tbd */
  45354. + volatile uint32_t txQdPtr; /**< tbd */
  45355. + volatile uint16_t mrblr; /**< tbd */
  45356. + volatile uint16_t rxQdBsyCnt; /**< tbd */
  45357. + volatile uint8_t reserved0[0x10]; /**< 0x10 - 0x1f */
  45358. + t_FmPortImQd rxQd;
  45359. + t_FmPortImQd txQd;
  45360. + volatile uint8_t reserved1[0xa0]; /**< 0x60 - 0xff */
  45361. +} _PackedType t_FmPortImPram;
  45362. +
  45363. +#if defined(__MWERKS__) && !defined(__GNUC__)
  45364. +#pragma pack(pop)
  45365. +#endif /* defined(__MWERKS__) && ... */
  45366. +
  45367. +
  45368. +/**************************************************************************//**
  45369. + @Description Registers bit fields
  45370. +*//***************************************************************************/
  45371. +
  45372. +/**************************************************************************//**
  45373. + @Description BMI defines
  45374. +*//***************************************************************************/
  45375. +#if (DPAA_VERSION >= 11)
  45376. +#define BMI_SP_ID_MASK 0xff000000
  45377. +#define BMI_SP_ID_SHIFT 24
  45378. +#define BMI_SP_EN 0x01000000
  45379. +#endif /* (DPAA_VERSION >= 11) */
  45380. +
  45381. +#define BMI_PORT_CFG_EN 0x80000000
  45382. +#define BMI_PORT_CFG_EN_MACSEC 0x00800000
  45383. +#define BMI_PORT_CFG_FDOVR 0x02000000
  45384. +#define BMI_PORT_CFG_IM 0x01000000
  45385. +#define BMI_PORT_CFG_AM 0x00000040
  45386. +#define BMI_PORT_STATUS_BSY 0x80000000
  45387. +#define BMI_COUNTERS_EN 0x80000000
  45388. +
  45389. +#define BMI_PORT_RFNE_FRWD_DCL4C 0x10000000
  45390. +#define BMI_PORT_RFNE_FRWD_RPD 0x40000000
  45391. +#define BMI_RFNE_FDCS_MASK 0xFF000000
  45392. +#define BMI_RFNE_HXS_MASK 0x000000FF
  45393. +
  45394. +#define BMI_CMD_MR_LEAC 0x00200000
  45395. +#define BMI_CMD_MR_SLEAC 0x00100000
  45396. +#define BMI_CMD_MR_MA 0x00080000
  45397. +#define BMI_CMD_MR_DEAS 0x00040000
  45398. +#define BMI_CMD_RX_MR_DEF (BMI_CMD_MR_LEAC | \
  45399. + BMI_CMD_MR_SLEAC | \
  45400. + BMI_CMD_MR_MA | \
  45401. + BMI_CMD_MR_DEAS)
  45402. +#define BMI_CMD_ATTR_ORDER 0x80000000
  45403. +#define BMI_CMD_ATTR_SYNC 0x02000000
  45404. +#define BMI_CMD_ATTR_MODE_MISS_ALLIGN_ADDR_EN 0x00080000
  45405. +#define BMI_CMD_ATTR_MACCMD_MASK 0x0000ff00
  45406. +#define BMI_CMD_ATTR_MACCMD_OVERRIDE 0x00008000
  45407. +#define BMI_CMD_ATTR_MACCMD_SECURED 0x00001000
  45408. +#define BMI_CMD_ATTR_MACCMD_SC_MASK 0x00000f00
  45409. +
  45410. +#define BMI_EXT_BUF_POOL_ID_MASK 0x003F0000
  45411. +#define BMI_STATUS_RX_MASK_UNUSED (uint32_t)(~(FM_PORT_FRM_ERR_DMA | \
  45412. + FM_PORT_FRM_ERR_PHYSICAL | \
  45413. + FM_PORT_FRM_ERR_SIZE | \
  45414. + FM_PORT_FRM_ERR_CLS_DISCARD | \
  45415. + FM_PORT_FRM_ERR_EXTRACTION | \
  45416. + FM_PORT_FRM_ERR_NO_SCHEME | \
  45417. + FM_PORT_FRM_ERR_COLOR_RED | \
  45418. + FM_PORT_FRM_ERR_COLOR_YELLOW | \
  45419. + FM_PORT_FRM_ERR_ILL_PLCR | \
  45420. + FM_PORT_FRM_ERR_PLCR_FRAME_LEN | \
  45421. + FM_PORT_FRM_ERR_PRS_TIMEOUT | \
  45422. + FM_PORT_FRM_ERR_PRS_ILL_INSTRUCT | \
  45423. + FM_PORT_FRM_ERR_BLOCK_LIMIT_EXCEEDED | \
  45424. + FM_PORT_FRM_ERR_PRS_HDR_ERR | \
  45425. + FM_PORT_FRM_ERR_IPRE | \
  45426. + FM_PORT_FRM_ERR_IPR_NCSP | \
  45427. + FM_PORT_FRM_ERR_KEYSIZE_OVERFLOW))
  45428. +
  45429. +#define BMI_STATUS_OP_MASK_UNUSED (uint32_t)(BMI_STATUS_RX_MASK_UNUSED & \
  45430. + ~(FM_PORT_FRM_ERR_LENGTH | \
  45431. + FM_PORT_FRM_ERR_NON_FM | \
  45432. + FM_PORT_FRM_ERR_UNSUPPORTED_FORMAT))
  45433. +
  45434. +#define BMI_RATE_LIMIT_EN 0x80000000
  45435. +#define BMI_RATE_LIMIT_BURST_SIZE_GRAN 0x80000000
  45436. +#define BMI_RATE_LIMIT_SCALE_BY_2 0x00000001
  45437. +#define BMI_RATE_LIMIT_SCALE_BY_4 0x00000002
  45438. +#define BMI_RATE_LIMIT_SCALE_BY_8 0x00000003
  45439. +
  45440. +#define BMI_RX_FIFO_THRESHOLD_BC 0x80000000
  45441. +
  45442. +#define BMI_PRS_RESULT_HIGH 0x00000000
  45443. +#define BMI_PRS_RESULT_LOW 0xFFFFFFFF
  45444. +
  45445. +
  45446. +#define RX_ERRS_TO_ENQ (FM_PORT_FRM_ERR_DMA | \
  45447. + FM_PORT_FRM_ERR_PHYSICAL | \
  45448. + FM_PORT_FRM_ERR_SIZE | \
  45449. + FM_PORT_FRM_ERR_EXTRACTION | \
  45450. + FM_PORT_FRM_ERR_NO_SCHEME | \
  45451. + FM_PORT_FRM_ERR_ILL_PLCR | \
  45452. + FM_PORT_FRM_ERR_PLCR_FRAME_LEN | \
  45453. + FM_PORT_FRM_ERR_PRS_TIMEOUT | \
  45454. + FM_PORT_FRM_ERR_PRS_ILL_INSTRUCT | \
  45455. + FM_PORT_FRM_ERR_BLOCK_LIMIT_EXCEEDED | \
  45456. + FM_PORT_FRM_ERR_PRS_HDR_ERR | \
  45457. + FM_PORT_FRM_ERR_KEYSIZE_OVERFLOW | \
  45458. + FM_PORT_FRM_ERR_IPRE)
  45459. +
  45460. +#define OP_ERRS_TO_ENQ (RX_ERRS_TO_ENQ | \
  45461. + FM_PORT_FRM_ERR_LENGTH | \
  45462. + FM_PORT_FRM_ERR_NON_FM | \
  45463. + FM_PORT_FRM_ERR_UNSUPPORTED_FORMAT)
  45464. +
  45465. +
  45466. +#define BMI_RX_FIFO_PRI_ELEVATION_MASK 0x03FF0000
  45467. +#define BMI_RX_FIFO_THRESHOLD_MASK 0x000003FF
  45468. +#define BMI_TX_FIFO_MIN_FILL_MASK 0x03FF0000
  45469. +#define BMI_FIFO_PIPELINE_DEPTH_MASK 0x0000F000
  45470. +#define BMI_TX_LOW_COMF_MASK 0x000003FF
  45471. +
  45472. +/* shifts */
  45473. +#define BMI_PORT_CFG_MS_SEL_SHIFT 16
  45474. +#define BMI_DMA_ATTR_IC_CACHE_SHIFT FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT
  45475. +#define BMI_DMA_ATTR_HDR_CACHE_SHIFT FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT
  45476. +#define BMI_DMA_ATTR_SG_CACHE_SHIFT FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT
  45477. +
  45478. +#define BMI_IM_FOF_SHIFT 28
  45479. +#define BMI_PR_PORTID_SHIFT 24
  45480. +
  45481. +#define BMI_RX_FIFO_PRI_ELEVATION_SHIFT 16
  45482. +#define BMI_RX_FIFO_THRESHOLD_SHIFT 0
  45483. +
  45484. +#define BMI_RX_FRAME_END_CS_IGNORE_SHIFT 24
  45485. +#define BMI_RX_FRAME_END_CUT_SHIFT 16
  45486. +
  45487. +#define BMI_IC_SIZE_SHIFT FMAN_SP_IC_SIZE_SHIFT
  45488. +
  45489. +#define BMI_INT_BUF_MARG_SHIFT 28
  45490. +
  45491. +#define BMI_EXT_BUF_MARG_END_SHIFT FMAN_SP_EXT_BUF_MARG_END_SHIFT
  45492. +
  45493. +#define BMI_CMD_ATTR_COLOR_SHIFT 26
  45494. +#define BMI_CMD_ATTR_COM_MODE_SHIFT 16
  45495. +#define BMI_CMD_ATTR_MACCMD_SHIFT 8
  45496. +#define BMI_CMD_ATTR_MACCMD_OVERRIDE_SHIFT 15
  45497. +#define BMI_CMD_ATTR_MACCMD_SECURED_SHIFT 12
  45498. +#define BMI_CMD_ATTR_MACCMD_SC_SHIFT 8
  45499. +
  45500. +#define BMI_POOL_DEP_NUM_OF_POOLS_VECTOR_SHIFT 24
  45501. +
  45502. +#define BMI_TX_FIFO_MIN_FILL_SHIFT 16
  45503. +#define BMI_TX_LOW_COMF_SHIFT 0
  45504. +
  45505. +#define BMI_PERFORMANCE_TASK_COMP_SHIFT 24
  45506. +#define BMI_PERFORMANCE_PORT_COMP_SHIFT 16
  45507. +#define BMI_PERFORMANCE_DMA_COMP_SHIFT 12
  45508. +#define BMI_PERFORMANCE_FIFO_COMP_SHIFT 0
  45509. +
  45510. +#define BMI_MAX_BURST_SHIFT 16
  45511. +#define BMI_COUNT_RATE_UNIT_SHIFT 16
  45512. +
  45513. +/* sizes */
  45514. +#define FRAME_END_DATA_SIZE 16
  45515. +#define FRAME_OFFSET_UNITS 16
  45516. +#define MIN_TX_INT_OFFSET 16
  45517. +#define MAX_FRAME_OFFSET 64
  45518. +#define MAX_FIFO_PIPELINE_DEPTH 8
  45519. +#define MAX_PERFORMANCE_TASK_COMP 64
  45520. +#define MAX_PERFORMANCE_TX_QUEUE_COMP 8
  45521. +#define MAX_PERFORMANCE_RX_QUEUE_COMP 64
  45522. +#define MAX_PERFORMANCE_DMA_COMP 16
  45523. +#define MAX_NUM_OF_TASKS 64
  45524. +#define MAX_NUM_OF_EXTRA_TASKS 8
  45525. +#define MAX_NUM_OF_DMAS 16
  45526. +#define MAX_NUM_OF_EXTRA_DMAS 8
  45527. +#define MAX_BURST_SIZE 1024
  45528. +#define MIN_NUM_OF_OP_DMAS 2
  45529. +
  45530. +
  45531. +/**************************************************************************//**
  45532. + @Description QMI defines
  45533. +*//***************************************************************************/
  45534. +/* masks */
  45535. +#define QMI_PORT_CFG_EN 0x80000000
  45536. +#define QMI_PORT_CFG_EN_COUNTERS 0x10000000
  45537. +#define QMI_PORT_STATUS_DEQ_TNUM_BSY 0x80000000
  45538. +#define QMI_PORT_STATUS_DEQ_FD_BSY 0x20000000
  45539. +
  45540. +#define QMI_DEQ_CFG_PREFETCH_NO_TNUM 0x02000000
  45541. +#define QMI_DEQ_CFG_PREFETCH_WAITING_TNUM 0
  45542. +#define QMI_DEQ_CFG_PREFETCH_1_FRAME 0
  45543. +#define QMI_DEQ_CFG_PREFETCH_3_FRAMES 0x01000000
  45544. +
  45545. +#define QMI_DEQ_CFG_PRI 0x80000000
  45546. +#define QMI_DEQ_CFG_TYPE1 0x10000000
  45547. +#define QMI_DEQ_CFG_TYPE2 0x20000000
  45548. +#define QMI_DEQ_CFG_TYPE3 0x30000000
  45549. +
  45550. +#define QMI_DEQ_CFG_SUBPORTAL_MASK 0x1f
  45551. +#define QMI_DEQ_CFG_SUBPORTAL_SHIFT 20
  45552. +
  45553. +/**************************************************************************//**
  45554. + @Description PARSER defines
  45555. +*//***************************************************************************/
  45556. +/* masks */
  45557. +#define PRS_HDR_ERROR_DIS 0x00000800
  45558. +#define PRS_HDR_SW_PRS_EN 0x00000400
  45559. +#define PRS_CP_OFFSET_MASK 0x0000000F
  45560. +#define PRS_TPID1_MASK 0xFFFF0000
  45561. +#define PRS_TPID2_MASK 0x0000FFFF
  45562. +#define PRS_TPID_DFLT 0x91009100
  45563. +
  45564. +#define PRS_HDR_MPLS_LBL_INTER_EN 0x00200000
  45565. +#define PRS_HDR_IPV6_ROUTE_HDR_EN 0x00008000
  45566. +#define PRS_HDR_PPPOE_MTU_CHECK_EN 0x80000000
  45567. +#define PRS_HDR_UDP_PAD_REMOVAL 0x80000000
  45568. +#define PRS_HDR_TCP_PAD_REMOVAL 0x80000000
  45569. +#define PRS_CAC_STOP 0x00000001
  45570. +#define PRS_CAC_ACTIVE 0x00000100
  45571. +
  45572. +/* shifts */
  45573. +#define PRS_PCTPID_SHIFT 16
  45574. +#define PRS_HDR_MPLS_NEXT_HDR_SHIFT 22
  45575. +#define PRS_HDR_ETH_BC_SHIFT 28
  45576. +#define PRS_HDR_ETH_MC_SHIFT 24
  45577. +#define PRS_HDR_VLAN_STACKED_SHIFT 16
  45578. +#define PRS_HDR_MPLS_STACKED_SHIFT 16
  45579. +#define PRS_HDR_IPV4_1_BC_SHIFT 28
  45580. +#define PRS_HDR_IPV4_1_MC_SHIFT 24
  45581. +#define PRS_HDR_IPV4_2_UC_SHIFT 20
  45582. +#define PRS_HDR_IPV4_2_MC_BC_SHIFT 16
  45583. +#define PRS_HDR_IPV6_1_MC_SHIFT 24
  45584. +#define PRS_HDR_IPV6_2_UC_SHIFT 20
  45585. +#define PRS_HDR_IPV6_2_MC_SHIFT 16
  45586. +
  45587. +#define PRS_HDR_ETH_BC_MASK 0x0fffffff
  45588. +#define PRS_HDR_ETH_MC_MASK 0xf0ffffff
  45589. +#define PRS_HDR_VLAN_STACKED_MASK 0xfff0ffff
  45590. +#define PRS_HDR_MPLS_STACKED_MASK 0xfff0ffff
  45591. +#define PRS_HDR_IPV4_1_BC_MASK 0x0fffffff
  45592. +#define PRS_HDR_IPV4_1_MC_MASK 0xf0ffffff
  45593. +#define PRS_HDR_IPV4_2_UC_MASK 0xff0fffff
  45594. +#define PRS_HDR_IPV4_2_MC_BC_MASK 0xfff0ffff
  45595. +#define PRS_HDR_IPV6_1_MC_MASK 0xf0ffffff
  45596. +#define PRS_HDR_IPV6_2_UC_MASK 0xff0fffff
  45597. +#define PRS_HDR_IPV6_2_MC_MASK 0xfff0ffff
  45598. +
  45599. +/* others */
  45600. +#define PRS_HDR_ENTRY_SIZE 8
  45601. +#define DEFAULT_CLS_PLAN_VECTOR 0xFFFFFFFF
  45602. +
  45603. +#define IPSEC_SW_PATCH_START 0x20
  45604. +#define SCTP_SW_PATCH_START 0x4D
  45605. +#define DCCP_SW_PATCH_START 0x41
  45606. +
  45607. +/**************************************************************************//**
  45608. + @Description IM defines
  45609. +*//***************************************************************************/
  45610. +#define BD_R_E 0x80000000
  45611. +#define BD_L 0x08000000
  45612. +
  45613. +#define BD_RX_CRE 0x00080000
  45614. +#define BD_RX_FTL 0x00040000
  45615. +#define BD_RX_FTS 0x00020000
  45616. +#define BD_RX_OV 0x00010000
  45617. +
  45618. +#define BD_RX_ERRORS (BD_RX_CRE | BD_RX_FTL | BD_RX_FTS | BD_RX_OV)
  45619. +
  45620. +#define FM_IM_SIZEOF_BD sizeof(t_FmImBd)
  45621. +
  45622. +#define BD_STATUS_MASK 0xffff0000
  45623. +#define BD_LENGTH_MASK 0x0000ffff
  45624. +
  45625. +#define BD_STATUS_AND_LENGTH_SET(bd, val) WRITE_UINT32(*(volatile uint32_t*)(bd), (val))
  45626. +
  45627. +#define BD_STATUS_AND_LENGTH(bd) GET_UINT32(*(volatile uint32_t*)(bd))
  45628. +
  45629. +#define BD_GET(id) &p_FmPort->im.p_BdRing[id]
  45630. +
  45631. +#define IM_ILEGAL_BD_ID 0xffff
  45632. +
  45633. +/* others */
  45634. +#define IM_PRAM_ALIGN 0x100
  45635. +
  45636. +/* masks */
  45637. +#define IM_MODE_GBL 0x20000000
  45638. +#define IM_MODE_BO_MASK 0x18000000
  45639. +#define IM_MODE_BO_SHIFT 3
  45640. +#define IM_MODE_GRC_STP 0x00800000
  45641. +
  45642. +#define IM_MODE_SET_BO(val) (uint32_t)((val << (31-IM_MODE_BO_SHIFT)) & IM_MODE_BO_MASK)
  45643. +
  45644. +#define IM_RXQD_BSYINTM 0x0008
  45645. +#define IM_RXQD_RXFINTM 0x0010
  45646. +#define IM_RXQD_FPMEVT_SEL_MASK 0x0003
  45647. +
  45648. +#define IM_EV_BSY 0x40000000
  45649. +#define IM_EV_RX 0x80000000
  45650. +
  45651. +
  45652. +/**************************************************************************//**
  45653. + @Description Additional defines
  45654. +*//***************************************************************************/
  45655. +
  45656. +typedef struct {
  45657. + t_Handle h_FmMuram;
  45658. + t_FmPortImPram *p_FmPortImPram;
  45659. + uint8_t fwExtStructsMemId;
  45660. + uint32_t fwExtStructsMemAttr;
  45661. + uint16_t bdRingSize;
  45662. + t_FmImBd *p_BdRing;
  45663. + t_Handle *p_BdShadow;
  45664. + uint16_t currBdId;
  45665. + uint16_t firstBdOfFrameId;
  45666. +
  45667. + /* Rx port parameters */
  45668. + uint8_t dataMemId; /**< Memory partition ID for data buffers */
  45669. + uint32_t dataMemAttributes; /**< Memory attributes for data buffers */
  45670. + t_BufferPoolInfo rxPool;
  45671. + uint16_t mrblr;
  45672. + uint16_t rxFrameAccumLength;
  45673. + t_FmPortImRxStoreCallback *f_RxStore;
  45674. +
  45675. + /* Tx port parameters */
  45676. + uint32_t txFirstBdStatus;
  45677. + t_FmPortImTxConfCallback *f_TxConf;
  45678. +} t_FmMacIm;
  45679. +
  45680. +
  45681. +typedef struct {
  45682. + struct fman_port_cfg dfltCfg;
  45683. + uint32_t dfltFqid;
  45684. + uint32_t confFqid;
  45685. + uint32_t errFqid;
  45686. + uintptr_t baseAddr;
  45687. + uint8_t deqSubPortal;
  45688. + bool deqHighPriority;
  45689. + e_FmPortDeqType deqType;
  45690. + e_FmPortDeqPrefetchOption deqPrefetchOption;
  45691. + uint16_t deqByteCnt;
  45692. + uint8_t cheksumLastBytesIgnore;
  45693. + uint8_t cutBytesFromEnd;
  45694. + t_FmBufPoolDepletion bufPoolDepletion;
  45695. + uint8_t pipelineDepth;
  45696. + uint16_t fifoLowComfLevel;
  45697. + bool frmDiscardOverride;
  45698. + bool enRateLimit;
  45699. + t_FmPortRateLimit rateLimit;
  45700. + e_FmPortDualRateLimiterScaleDown rateLimitDivider;
  45701. + bool enBufPoolDepletion;
  45702. + uint16_t liodnOffset;
  45703. + uint16_t liodnBase;
  45704. + t_FmExtPools extBufPools;
  45705. + e_FmDmaSwapOption dmaSwapData;
  45706. + e_FmDmaCacheOption dmaIntContextCacheAttr;
  45707. + e_FmDmaCacheOption dmaHeaderCacheAttr;
  45708. + e_FmDmaCacheOption dmaScatterGatherCacheAttr;
  45709. + bool dmaReadOptimize;
  45710. + bool dmaWriteOptimize;
  45711. + uint32_t txFifoMinFillLevel;
  45712. + uint32_t txFifoLowComfLevel;
  45713. + uint32_t rxFifoPriElevationLevel;
  45714. + uint32_t rxFifoThreshold;
  45715. + t_FmSpBufMargins bufMargins;
  45716. + t_FmSpIntContextDataCopy intContext;
  45717. + bool syncReq;
  45718. + e_FmPortColor color;
  45719. + fmPortFrameErrSelect_t errorsToDiscard;
  45720. + fmPortFrameErrSelect_t errorsToEnq;
  45721. + bool forwardReuseIntContext;
  45722. + t_FmBufferPrefixContent bufferPrefixContent;
  45723. + t_FmBackupBmPools *p_BackupBmPools;
  45724. + bool dontReleaseBuf;
  45725. + bool setNumOfTasks;
  45726. + bool setNumOfOpenDmas;
  45727. + bool setSizeOfFifo;
  45728. +#if (DPAA_VERSION >= 11)
  45729. + bool noScatherGather;
  45730. +#endif /* (DPAA_VERSION >= 11) */
  45731. +
  45732. +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
  45733. + bool bcbWorkaround;
  45734. +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
  45735. +} t_FmPortDriverParam;
  45736. +
  45737. +
  45738. +typedef struct t_FmPortRxPoolsParams
  45739. +{
  45740. + uint8_t numOfPools;
  45741. + uint16_t secondLargestBufSize;
  45742. + uint16_t largestBufSize;
  45743. +} t_FmPortRxPoolsParams;
  45744. +
  45745. +typedef struct t_FmPortDsarVars {
  45746. + t_Handle *autoResOffsets;
  45747. + t_FmPortDsarTablesSizes *autoResMaxSizes;
  45748. + uint32_t fmbm_tcfg;
  45749. + uint32_t fmbm_tcmne;
  45750. + uint32_t fmbm_rfne;
  45751. + uint32_t fmbm_rfpne;
  45752. + uint32_t fmbm_rcfg;
  45753. + bool dsarEnabledParser;
  45754. +} t_FmPortDsarVars;
  45755. +typedef struct {
  45756. + struct fman_port port;
  45757. + t_Handle h_Fm;
  45758. + t_Handle h_FmPcd;
  45759. + t_Handle h_FmMuram;
  45760. + t_FmRevisionInfo fmRevInfo;
  45761. + uint8_t portId;
  45762. + e_FmPortType portType;
  45763. + int enabled;
  45764. + char name[MODULE_NAME_SIZE];
  45765. + uint8_t hardwarePortId;
  45766. + uint16_t fmClkFreq;
  45767. + t_FmPortQmiRegs *p_FmPortQmiRegs;
  45768. + u_FmPortBmiRegs *p_FmPortBmiRegs;
  45769. + t_FmPortPrsRegs *p_FmPortPrsRegs;
  45770. + fmPcdEngines_t pcdEngines;
  45771. + uint32_t savedBmiNia;
  45772. + uint8_t netEnvId;
  45773. + uint32_t optArray[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
  45774. + uint32_t lcvs[FM_PCD_PRS_NUM_OF_HDRS];
  45775. + uint8_t privateInfo;
  45776. + uint32_t schemesPerPortVector;
  45777. + bool useClsPlan;
  45778. + uint8_t clsPlanGrpId;
  45779. + t_Handle ccTreeId;
  45780. + t_Handle completeArg;
  45781. + void (*f_Complete)(t_Handle arg);
  45782. + t_FmSpBufferOffsets bufferOffsets;
  45783. + /* Independent-Mode parameters support */
  45784. + bool imEn;
  45785. + t_FmMacIm im;
  45786. + volatile bool lock;
  45787. + t_Handle h_Spinlock;
  45788. + t_FmPortExceptionCallback *f_Exception;
  45789. + t_Handle h_App;
  45790. + uint8_t internalBufferOffset;
  45791. + uint8_t fmanCtrlEventId;
  45792. + uint32_t exceptions;
  45793. + bool polling;
  45794. + t_FmExtPools extBufPools;
  45795. + uint32_t requiredAction;
  45796. + uint32_t savedQmiPnen;
  45797. + uint32_t savedBmiFene;
  45798. + uint32_t savedBmiFpne;
  45799. + uint32_t savedBmiCmne;
  45800. + uint32_t savedBmiOfp;
  45801. + uint32_t savedNonRxQmiRegsPndn;
  45802. + uint32_t origNonRxQmiRegsPndn;
  45803. + int savedPrsStartOffset;
  45804. + bool includeInPrsStatistics;
  45805. + uint16_t maxFrameLength;
  45806. + t_FmFmanCtrl orFmanCtrl;
  45807. + t_FmPortRsrc openDmas;
  45808. + t_FmPortRsrc tasks;
  45809. + t_FmPortRsrc fifoBufs;
  45810. + t_FmPortRxPoolsParams rxPoolsParams;
  45811. +// bool explicitUserSizeOfFifo;
  45812. + t_Handle h_IpReassemblyManip;
  45813. + t_Handle h_CapwapReassemblyManip;
  45814. + t_Handle h_ReassemblyTree;
  45815. + uint64_t fmMuramPhysBaseAddr;
  45816. +#if (DPAA_VERSION >= 11)
  45817. + bool vspe;
  45818. + uint8_t dfltRelativeId;
  45819. + e_FmPortGprFuncType gprFunc;
  45820. + t_FmPcdCtrlParamsPage *p_ParamsPage;
  45821. +#endif /* (DPAA_VERSION >= 11) */
  45822. + t_FmPortDsarVars deepSleepVars;
  45823. + t_FmPortDriverParam *p_FmPortDriverParam;
  45824. +} t_FmPort;
  45825. +
  45826. +
  45827. +void FmPortConfigIM (t_FmPort *p_FmPort, t_FmPortParams *p_FmPortParams);
  45828. +t_Error FmPortImCheckInitParameters(t_FmPort *p_FmPort);
  45829. +
  45830. +t_Error FmPortImInit(t_FmPort *p_FmPort);
  45831. +void FmPortImFree(t_FmPort *p_FmPort);
  45832. +
  45833. +t_Error FmPortImEnable (t_FmPort *p_FmPort);
  45834. +t_Error FmPortImDisable (t_FmPort *p_FmPort);
  45835. +t_Error FmPortImRx (t_FmPort *p_FmPort);
  45836. +
  45837. +void FmPortSetMacsecLcv(t_Handle h_FmPort);
  45838. +void FmPortSetMacsecCmd(t_Handle h_FmPort, uint8_t dfltSci);
  45839. +
  45840. +
  45841. +t_Error FM_PORT_SetNumOfOpenDmas(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfOpenDmas);
  45842. +t_Error FM_PORT_SetNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks);
  45843. +t_Error FM_PORT_SetSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo);
  45844. +
  45845. +static __inline__ uint8_t * BdBufferGet (t_PhysToVirt *f_PhysToVirt, t_FmImBd *p_Bd)
  45846. +{
  45847. + uint64_t physAddr = (uint64_t)((uint64_t)GET_UINT8(p_Bd->buff.high) << 32);
  45848. + physAddr |= GET_UINT32(p_Bd->buff.low);
  45849. +
  45850. + return (uint8_t *)f_PhysToVirt((physAddress_t)(physAddr));
  45851. +}
  45852. +
  45853. +static __inline__ void SET_ADDR(volatile t_FmPhysAddr *fmPhysAddr, uint64_t value)
  45854. +{
  45855. + WRITE_UINT8(fmPhysAddr->high,(uint8_t)((value & 0x000000ff00000000LL) >> 32));
  45856. + WRITE_UINT32(fmPhysAddr->low,(uint32_t)value);
  45857. +}
  45858. +
  45859. +static __inline__ void BdBufferSet(t_VirtToPhys *f_VirtToPhys, t_FmImBd *p_Bd, uint8_t *p_Buffer)
  45860. +{
  45861. + uint64_t physAddr = (uint64_t)(f_VirtToPhys(p_Buffer));
  45862. + SET_ADDR(&p_Bd->buff, physAddr);
  45863. +}
  45864. +
  45865. +static __inline__ uint16_t GetNextBdId(t_FmPort *p_FmPort, uint16_t id)
  45866. +{
  45867. + if (id < p_FmPort->im.bdRingSize-1)
  45868. + return (uint16_t)(id+1);
  45869. + else
  45870. + return 0;
  45871. +}
  45872. +
  45873. +void FM_PORT_Dsar_DumpRegs(void);
  45874. +
  45875. +
  45876. +#endif /* __FM_PORT_H */
  45877. --- /dev/null
  45878. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_dsar.h
  45879. @@ -0,0 +1,494 @@
  45880. +/*
  45881. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  45882. + *
  45883. + * Redistribution and use in source and binary forms, with or without
  45884. + * modification, are permitted provided that the following conditions are met:
  45885. + * * Redistributions of source code must retain the above copyright
  45886. + * notice, this list of conditions and the following disclaimer.
  45887. + * * Redistributions in binary form must reproduce the above copyright
  45888. + * notice, this list of conditions and the following disclaimer in the
  45889. + * documentation and/or other materials provided with the distribution.
  45890. + * * Neither the name of Freescale Semiconductor nor the
  45891. + * names of its contributors may be used to endorse or promote products
  45892. + * derived from this software without specific prior written permission.
  45893. + *
  45894. + *
  45895. + * ALTERNATIVELY, this software may be distributed under the terms of the
  45896. + * GNU General Public License ("GPL") as published by the Free Software
  45897. + * Foundation, either version 2 of that License or (at your option) any
  45898. + * later version.
  45899. + *
  45900. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  45901. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  45902. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  45903. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  45904. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  45905. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  45906. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  45907. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  45908. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  45909. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45910. + */
  45911. +
  45912. +/**************************************************************************//**
  45913. + @File fm_port_dsar.h
  45914. +
  45915. + @Description Deep Sleep Auto Response project - common module header file.
  45916. +
  45917. + Author - Eyal Harari
  45918. +
  45919. + @Cautions See the FMan Controller spec and design document for more information.
  45920. +*//***************************************************************************/
  45921. +
  45922. +#ifndef __FM_PORT_DSAR_H_
  45923. +#define __FM_PORT_DSAR_H_
  45924. +
  45925. +#define DSAR_GETSER_MASK 0xFF0000FF
  45926. +
  45927. +#if defined(__MWERKS__) && !defined(__GNUC__)
  45928. +#pragma pack(push,1)
  45929. +#endif /* defined(__MWERKS__) && ... */
  45930. +
  45931. +/**************************************************************************//**
  45932. + @Description Deep Sleep Auto Response VLAN-IPv4 Binding Table (for ARP/ICMPv4)
  45933. + Refer to the FMan Controller spec for more details.
  45934. +*//***************************************************************************/
  45935. +typedef _Packed struct
  45936. +{
  45937. + uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
  45938. + uint16_t vlanId; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  45939. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  45940. + uint16_t reserved;
  45941. +} _PackedType t_DsarArpBindingEntry;
  45942. +
  45943. +/**************************************************************************//**
  45944. + @Description Deep Sleep Auto Response Address Resolution Protocol Statistics Descriptor
  45945. + Refer to the FMan Controller spec for more details.
  45946. + 0x00 INVAL_CNT Invalid ARP IPv4-Ethernet counter
  45947. + 0x04 ECHO_CNT Echo counter
  45948. + 0x08 CD_CNT Conflict Detection counter
  45949. + 0x0C AR_CNT Auto-Response counter
  45950. + 0x10 RATM_CNT Replies Addressed To Me counter
  45951. + 0x14 UKOP_CNT Unknown Operation counter
  45952. + 0x18 NMTP_CNT Not my TPA counter
  45953. + 0x1C NMVLAN_CNT Not My VLAN counter
  45954. +*//***************************************************************************/
  45955. +typedef _Packed struct
  45956. +{
  45957. + uint32_t invalCnt; /**< Invalid ARP IPv4-Ethernet counter. */
  45958. + uint32_t echoCnt; /**< Echo counter. */
  45959. + uint32_t cdCnt; /**< Conflict Detection counter. */
  45960. + uint32_t arCnt; /**< Auto-Response counter. */
  45961. + uint32_t ratmCnt; /**< Replies Addressed To Me counter. */
  45962. + uint32_t ukopCnt; /**< Unknown Operation counter. */
  45963. + uint32_t nmtpCnt; /**< Not my TPA counter. */
  45964. + uint32_t nmVlanCnt; /**< Not My VLAN counter */
  45965. +} _PackedType t_DsarArpStatistics;
  45966. +
  45967. +
  45968. +/**************************************************************************//**
  45969. + @Description Deep Sleep Auto Response Address Resolution Protocol Descriptor
  45970. + 0x0 0-15 Control bits [0-15]. Bit 15 = CDEN.
  45971. + 0x2 0-15 NumOfBindings Number of entries in the binding list.
  45972. + 0x4 0-15 BindingsPointer Bindings Pointer. This points to an IPv4-MAC Addresses Bindings list.
  45973. + 0x6 0-15
  45974. + 0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ARP Descriptors statistics data structure.
  45975. + 0xA 0-15
  45976. + 0xC 0-15 Reserved Reserved. Must be cleared.
  45977. + 0xE 015
  45978. +
  45979. +*//***************************************************************************/
  45980. +typedef _Packed struct
  45981. +{
  45982. + uint16_t control; /** Control bits [0-15]. Bit 15 = CDEN */
  45983. + uint16_t numOfBindings; /**< Number of VLAN-IPv4 */
  45984. + uint32_t p_Bindings; /**< VLAN-IPv4 Bindings table pointer. */
  45985. + uint32_t p_Statistics; /**< Statistics Data Structure pointer. */
  45986. + uint32_t reserved1; /**< Reserved. */
  45987. +} _PackedType t_DsarArpDescriptor;
  45988. +
  45989. +
  45990. +/**************************************************************************//**
  45991. + @Description Deep Sleep Auto Response VLAN-IPv4 Binding Table (for ARP/ICMPv4)
  45992. + Refer to the FMan Controller spec for more details.
  45993. +*//***************************************************************************/
  45994. +typedef _Packed struct
  45995. +{
  45996. + uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
  45997. + uint16_t vlanId; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  45998. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  45999. + uint16_t reserved;
  46000. +} _PackedType t_DsarIcmpV4BindingEntry;
  46001. +
  46002. +/**************************************************************************//**
  46003. + @Description Deep Sleep Auto Response ICMPv4 Statistics Descriptor
  46004. + Refer to the FMan Controller spec for more details.
  46005. + 0x00 INVAL_CNT Invalid ICMPv4 header counter
  46006. + 0x04 NMVLAN_CNT Not My VLAN counter
  46007. + 0x08 NMIP_CNT Not My IP counter
  46008. + 0x0C AR_CNT Auto-Response counter
  46009. + 0x10 CSERR_CNT Checksum Error counter
  46010. + 0x14 Reserved Reserved
  46011. + 0x18 Reserved Reserved
  46012. + 0x1C Reserved Reserved
  46013. +
  46014. +*//***************************************************************************/
  46015. +typedef _Packed struct
  46016. +{
  46017. + uint32_t invalCnt; /**< Invalid ICMPv4 Echo counter. */
  46018. + uint32_t nmVlanCnt; /**< Not My VLAN counter */
  46019. + uint32_t nmIpCnt; /**< Not My IP counter */
  46020. + uint32_t arCnt; /**< Auto-Response counter */
  46021. + uint32_t cserrCnt; /**< Checksum Error counter */
  46022. + uint32_t reserved0; /**< Reserved */
  46023. + uint32_t reserved1; /**< Reserved */
  46024. + uint32_t reserved2; /**< Reserved */
  46025. +} _PackedType t_DsarIcmpV4Statistics;
  46026. +
  46027. +
  46028. +
  46029. +/**************************************************************************//**
  46030. + @Description Deep Sleep Auto Response ICMPv4 Descriptor
  46031. + 0x0 0-15 Control bits [0-15]
  46032. + 0x2 0-15 NumOfBindings Number of entries in the binding list.
  46033. + 0x4 0-15 BindingsPointer Bindings Pointer. This points to an VLAN-IPv4 Addresses Bindings list.
  46034. + 0x6 0-15
  46035. + 0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ICMPv4 statistics data structure.
  46036. + 0xA 0-15
  46037. + 0xC 0-15 Reserved Reserved. Must be cleared.
  46038. + 0xE 015
  46039. +
  46040. +*//***************************************************************************/
  46041. +typedef _Packed struct
  46042. +{
  46043. + uint16_t control; /** Control bits [0-15]. */
  46044. + uint16_t numOfBindings; /**< Number of VLAN-IPv4 */
  46045. + uint32_t p_Bindings; /**< VLAN-IPv4 Bindings table pointer. */
  46046. + uint32_t p_Statistics; /**< Statistics Data Structure pointer. */
  46047. + uint32_t reserved1; /**< Reserved. */
  46048. +} _PackedType t_DsarIcmpV4Descriptor;
  46049. +
  46050. +/**************************************************************************//**
  46051. + @Description Deep Sleep Auto Response VLAN-IPv4 Binding Table (for ARP/ICMPv4)
  46052. + The 4 left-most bits (15:12) of the VlanId parameter are control flags.
  46053. + Flags[3:1] (VlanId[15:13]): Reserved, should be cleared.
  46054. + Flags[0] (VlanId[12]): Temporary address.
  46055. + ? 0 - Assigned IP address.
  46056. + ? 1- Temporary (tentative) IP address.
  46057. + Refer to the FMan Controller spec for more details.
  46058. +*//***************************************************************************/
  46059. +typedef _Packed struct
  46060. +{
  46061. + uint32_t ipv6Addr[4]; /*!< 3 * 32 bit IPv4 Address. */
  46062. + uint16_t resFlags:4; /*!< reserved flags. should be cleared */
  46063. + uint16_t vlanId:12; /*!< 12 bits VLAN ID. */
  46064. + /*!< This field should be 0x000 for an entry with no VLAN tag or a null VLAN ID. */
  46065. + uint16_t reserved;
  46066. +} _PackedType t_DsarIcmpV6BindingEntry;
  46067. +
  46068. +/**************************************************************************//**
  46069. + @Description Deep Sleep Auto Response ICMPv4 Statistics Descriptor
  46070. + Refer to the FMan Controller spec for more details.
  46071. + 0x00 INVAL_CNT Invalid ICMPv4 header counter
  46072. + 0x04 NMVLAN_CNT Not My VLAN counter
  46073. + 0x08 NMIP_CNT Not My IP counter
  46074. + 0x0C AR_CNT Auto-Response counter
  46075. + 0x10 CSERR_CNT Checksum Error counter
  46076. + 0x14 MCAST_CNT Multicast counter
  46077. + 0x18 Reserved Reserved
  46078. + 0x1C Reserved Reserved
  46079. +
  46080. +*//***************************************************************************/
  46081. +typedef _Packed struct
  46082. +{
  46083. + uint32_t invalCnt; /**< Invalid ICMPv4 Echo counter. */
  46084. + uint32_t nmVlanCnt; /**< Not My VLAN counter */
  46085. + uint32_t nmIpCnt; /**< Not My IP counter */
  46086. + uint32_t arCnt; /**< Auto-Response counter */
  46087. + uint32_t reserved1; /**< Reserved */
  46088. + uint32_t reserved2; /**< Reserved */
  46089. + uint32_t reserved3; /**< Reserved */
  46090. + uint32_t reserved4; /**< Reserved */
  46091. +} _PackedType t_DsarIcmpV6Statistics;
  46092. +
  46093. +/**************************************************************************//**
  46094. + @Description Deep Sleep Auto Response Neighbor Discovery Statistics Descriptor
  46095. + 0x00 INVAL_CNT Invalid Neighbor Discovery message counter
  46096. + 0x04 NMVLAN_CNT Not My VLAN counter
  46097. + 0x08 NMIP_CNT Not My IP counter
  46098. + 0x0C AR_CNT Auto-Response counter
  46099. + 0x10 CSERR_CNT Checksum Error counter
  46100. + 0x14 USADVERT_CNT Unsolicited Neighbor Advertisements counter
  46101. + 0x18 NMMCAST_CNT Not My Multicast group counter
  46102. + 0x1C NSLLA_CNT No Source Link-Layer Address counter. Indicates that there was a match on a Target
  46103. + Address of a packet that its source IP address is a unicast address, but the ICMPv6
  46104. + Source Link-layer Address option is omitted
  46105. +*//***************************************************************************/
  46106. +typedef _Packed struct
  46107. +{
  46108. + uint32_t invalCnt; /**< Invalid ICMPv4 Echo counter. */
  46109. + uint32_t nmVlanCnt; /**< Not My VLAN counter */
  46110. + uint32_t nmIpCnt; /**< Not My IP counter */
  46111. + uint32_t arCnt; /**< Auto-Response counter */
  46112. + uint32_t reserved1; /**< Reserved */
  46113. + uint32_t usadvertCnt; /**< Unsolicited Neighbor Advertisements counter */
  46114. + uint32_t nmmcastCnt; /**< Not My Multicast group counter */
  46115. + uint32_t nsllaCnt; /**< No Source Link-Layer Address counter */
  46116. +} _PackedType t_NdStatistics;
  46117. +
  46118. +/**************************************************************************//**
  46119. + @Description Deep Sleep Auto Response ICMPv6 Descriptor
  46120. + 0x0 0-15 Control bits [0-15]
  46121. + 0x2 0-15 NumOfBindings Number of entries in the binding list.
  46122. + 0x4 0-15 BindingsPointer Bindings Pointer. This points to an VLAN-IPv4 Addresses Bindings list.
  46123. + 0x6 0-15
  46124. + 0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ICMPv4 statistics data structure.
  46125. + 0xA 0-15
  46126. + 0xC 0-15 Reserved Reserved. Must be cleared.
  46127. + 0xE 015
  46128. +
  46129. +*//***************************************************************************/
  46130. +typedef _Packed struct
  46131. +{
  46132. + uint16_t control; /** Control bits [0-15]. */
  46133. + uint16_t numOfBindings; /**< Number of VLAN-IPv6 */
  46134. + uint32_t p_Bindings; /**< VLAN-IPv4 Bindings table pointer. */
  46135. + uint32_t p_Statistics; /**< Statistics Data Structure pointer. */
  46136. + uint32_t reserved1; /**< Reserved. */
  46137. +} _PackedType t_DsarIcmpV6Descriptor;
  46138. +
  46139. +
  46140. +/**************************************************************************//**
  46141. + @Description Internet Control Message Protocol (ICMPv6) Echo message header
  46142. + The fields names are taken from RFC 4443.
  46143. +*//***************************************************************************/
  46144. +/* 0 1 2 3 */
  46145. +/* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 */
  46146. +/* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ */
  46147. +/* | Type | Code | Checksum | */
  46148. +/* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ */
  46149. +/* | Identifier | Sequence Number | */
  46150. +/* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ */
  46151. +/* | Data ... */
  46152. +/* +-+-+-+-+- */
  46153. +typedef _Packed struct
  46154. +{
  46155. + uint8_t type;
  46156. + uint8_t code;
  46157. + uint16_t checksum;
  46158. + uint16_t identifier;
  46159. + uint16_t sequenceNumber;
  46160. +} _PackedType t_IcmpV6EchoHdr;
  46161. +
  46162. +/**************************************************************************//**
  46163. + @Description Internet Control Message Protocol (ICMPv6)
  46164. + Neighbor Solicitation/Advertisement header
  46165. + The fields names are taken from RFC 4861.
  46166. + The R/S/O fields are valid for Neighbor Advertisement only
  46167. +*//***************************************************************************/
  46168. +/* 0 1 2 3
  46169. + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
  46170. + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  46171. + * | Type | Code | Checksum |
  46172. + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  46173. + * |R|S|O| Reserved |
  46174. + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  46175. + * | |
  46176. + * + +
  46177. + * | |
  46178. + * + Target Address +
  46179. + * | |
  46180. + * + +
  46181. + * | |
  46182. + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  46183. + * | Options ...
  46184. + * +-+-+-+-+-+-+-+-+-+-+-+-
  46185. + *
  46186. + * Options Format:
  46187. + * 0 1 2 3
  46188. + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
  46189. + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  46190. + * | Type | Length | Link-Layer Address ... |
  46191. + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  46192. + * | Link-Layer Address |
  46193. + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  46194. +*/
  46195. +typedef _Packed struct
  46196. +{
  46197. + uint8_t type;
  46198. + uint8_t code;
  46199. + uint16_t checksum;
  46200. + uint32_t router:1;
  46201. + uint32_t solicited:1;
  46202. + uint32_t override:1;
  46203. + uint32_t reserved:29;
  46204. + uint32_t targetAddr[4];
  46205. + uint8_t optionType;
  46206. + uint8_t optionLength;
  46207. + uint8_t linkLayerAddr[6];
  46208. +} _PackedType t_IcmpV6NdHdr;
  46209. +
  46210. +/**************************************************************************//**
  46211. + @Description Deep Sleep Auto Response ICMPv6 Descriptor
  46212. + 0x0 0-15 Control bits [0-15]
  46213. + 0x2 0-15 NumOfBindings Number of entries in the binding list.
  46214. + 0x4 0-15 BindingsPointer Bindings Pointer. This points to an VLAN-IPv4 Addresses Bindings list.
  46215. + 0x6 0-15
  46216. + 0x8 0-15 StatisticsPointer Statistics Pointer. This field points to the ICMPv4 statistics data structure.
  46217. + 0xA 0-15
  46218. + 0xC 0-15 Reserved Reserved. Must be cleared.
  46219. + 0xE 015
  46220. +
  46221. +*//***************************************************************************/
  46222. +typedef _Packed struct
  46223. +{
  46224. + uint16_t control; /** Control bits [0-15]. */
  46225. + uint16_t numOfBindings; /**< Number of VLAN-IPv6 */
  46226. + uint32_t p_Bindings; /**< VLAN-IPv4 Bindings table pointer. */
  46227. + uint32_t p_Statistics; /**< Statistics Data Structure pointer. */
  46228. + uint32_t solicitedAddr; /**< Solicited Node Multicast Group Address */
  46229. +} _PackedType t_DsarNdDescriptor;
  46230. +
  46231. +/**************************************************************************//**
  46232. +@Description Deep Sleep Auto Response SNMP OIDs table entry
  46233. +
  46234. +*//***************************************************************************/
  46235. +typedef struct {
  46236. + uint16_t oidSize; /**< Size in octets of the OID. */
  46237. + uint16_t resSize; /**< Size in octets of the value that is attached to the OID. */
  46238. + uint32_t p_Oid; /**< Pointer to the OID. OID is encoded in BER but type and length are excluded. */
  46239. + uint32_t resValOrPtr; /**< Value (for up to 4 octets) or pointer to the Value. Encoded in BER. */
  46240. + uint32_t reserved;
  46241. +} t_OidsTblEntry;
  46242. +
  46243. +/**************************************************************************//**
  46244. + @Description Deep Sleep Auto Response SNMP IPv4 Addresses Table Entry
  46245. + Refer to the FMan Controller spec for more details.
  46246. +*//***************************************************************************/
  46247. +typedef struct
  46248. +{
  46249. + uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
  46250. + uint16_t vlanId; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  46251. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  46252. + uint16_t reserved;
  46253. +} t_DsarSnmpIpv4AddrTblEntry;
  46254. +
  46255. +/**************************************************************************//**
  46256. + @Description Deep Sleep Auto Response SNMP IPv6 Addresses Table Entry
  46257. + Refer to the FMan Controller spec for more details.
  46258. +*//***************************************************************************/
  46259. +#pragma pack(push,1)
  46260. +typedef struct
  46261. +{
  46262. + uint32_t ipv6Addr[4]; /*!< 4 * 32 bit IPv6 Address. */
  46263. + uint16_t vlanId; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  46264. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  46265. + uint16_t reserved;
  46266. +} t_DsarSnmpIpv6AddrTblEntry;
  46267. +#pragma pack(pop)
  46268. +
  46269. +/**************************************************************************//**
  46270. +@Description Deep Sleep Auto Response SNMP statistics table
  46271. +
  46272. +*//***************************************************************************/
  46273. +typedef struct {
  46274. + uint32_t snmpErrCnt; /**< Counts SNMP errors (wrong version, BER encoding, format). */
  46275. + uint32_t snmpCommunityErrCnt; /**< Counts messages that were dropped due to insufficient permission. */
  46276. + uint32_t snmpTotalDiscardCnt; /**< Counts any message that was dropped. */
  46277. + uint32_t snmpGetReqCnt; /**< Counts the number of get-request messages */
  46278. + uint32_t snmpGetNextReqCnt; /**< Counts the number of get-next-request messages */
  46279. +} t_DsarSnmpStatistics;
  46280. +
  46281. +/**************************************************************************//**
  46282. + @Description Deep Sleep Auto Response SNMP Descriptor
  46283. +
  46284. +*//***************************************************************************/
  46285. +typedef struct
  46286. +{
  46287. + uint16_t control; /**< Control bits [0-15]. */
  46288. + uint16_t maxSnmpMsgLength; /**< Maximal allowed SNMP message length. */
  46289. + uint16_t numOfIpv4Addresses; /**< Number of entries in IPv4 addresses table. */
  46290. + uint16_t numOfIpv6Addresses; /**< Number of entries in IPv6 addresses table. */
  46291. + uint32_t p_Ipv4AddrTbl; /**< Pointer to IPv4 addresses table. */
  46292. + uint32_t p_Ipv6AddrTbl; /**< Pointer to IPv6 addresses table. */
  46293. + uint32_t p_RdOnlyCommunityStr; /**< Pointer to the Read Only Community String. */
  46294. + uint32_t p_RdWrCommunityStr; /**< Pointer to the Read Write Community String. */
  46295. + uint32_t p_OidsTbl; /**< Pointer to OIDs table. */
  46296. + uint32_t oidsTblSize; /**< Number of entries in OIDs table. */
  46297. + uint32_t p_Statistics; /**< Pointer to SNMP statistics table. */
  46298. +} t_DsarSnmpDescriptor;
  46299. +
  46300. +/**************************************************************************//**
  46301. +@Description Deep Sleep Auto Response (Common) Statistics
  46302. +
  46303. +*//***************************************************************************/
  46304. +typedef _Packed struct {
  46305. + uint32_t dsarDiscarded;
  46306. + uint32_t dsarErrDiscarded;
  46307. + uint32_t dsarFragDiscarded;
  46308. + uint32_t dsarTunnelDiscarded;
  46309. + uint32_t dsarArpDiscarded;
  46310. + uint32_t dsarIpDiscarded;
  46311. + uint32_t dsarTcpDiscarded;
  46312. + uint32_t dsarUdpDiscarded;
  46313. + uint32_t dsarIcmpV6ChecksumErr; /* ICMPv6 Checksum Error counter */
  46314. + uint32_t dsarIcmpV6OtherType; /* ICMPv6 'Other' type (not Echo or Neighbor Solicitaion/Advertisement counter */
  46315. + uint32_t dsarIcmpV4OtherType; /* ICMPv4 'Other' type (not Echo) counter */
  46316. +} _PackedType t_ArStatistics;
  46317. +
  46318. +
  46319. +/**************************************************************************//**
  46320. +@Description Deep Sleep Auto Response TCP/UDP port filter table entry
  46321. +
  46322. +*//***************************************************************************/
  46323. +typedef _Packed struct {
  46324. + uint32_t Ports;
  46325. + uint32_t PortsMask;
  46326. +} _PackedType t_PortTblEntry;
  46327. +
  46328. +
  46329. +
  46330. +/**************************************************************************//**
  46331. +@Description Deep Sleep Auto Response Common Parameters Descriptor
  46332. +
  46333. +*//***************************************************************************/
  46334. +typedef _Packed struct {
  46335. + uint8_t arTxPort; /* 0x00 0-7 Auto Response Transmit Port number */
  46336. + uint8_t controlBits; /* 0x00 8-15 Auto Response control bits */
  46337. + uint16_t res1; /* 0x00 16-31 Reserved */
  46338. + uint32_t activeHPNIA; /* 0x04 0-31 Active mode Hardware Parser NIA */
  46339. + uint16_t snmpPort; /* 0x08 0-15 SNMP Port. */
  46340. + uint8_t macStationAddr[6]; /* 0x08 16-31 and 0x0C 0-31 MAC Station Address */
  46341. + uint8_t res2; /* 0x10 0-7 Reserved */
  46342. + uint8_t filterControl; /* 0x10 8-15 Filtering Control Bits. */
  46343. + uint16_t tcpControlPass; /* 0x10 16-31 TCP control pass flags */
  46344. + uint8_t ipProtocolTblSize; /* 0x14 0-7 IP Protocol Table Size. */
  46345. + uint8_t udpPortTblSize; /* 0x14 8-15 UDP Port Table Size. */
  46346. + uint8_t tcpPortTblSize; /* 0x14 16-23 TCP Port Table Size. */
  46347. + uint8_t res3; /* 0x14 24-31 Reserved */
  46348. + uint32_t p_IpProtocolFiltTbl; /* 0x18 0-31 Pointer to IP Protocol Filter Table */
  46349. + uint32_t p_UdpPortFiltTbl; /* 0x1C 0-31 Pointer to UDP Port Filter Table */
  46350. + uint32_t p_TcpPortFiltTbl; /* 0x20 0-31 Pointer to TCP Port Filter Table */
  46351. + uint32_t res4; /* 0x24 Reserved */
  46352. + uint32_t p_ArpDescriptor; /* 0x28 0-31 ARP Descriptor Pointer. */
  46353. + uint32_t p_NdDescriptor; /* 0x2C 0-31 Neighbor Discovery Descriptor. */
  46354. + uint32_t p_IcmpV4Descriptor; /* 0x30 0-31 ICMPv4 Descriptor pointer. */
  46355. + uint32_t p_IcmpV6Descriptor; /* 0x34 0-31 ICMPv6 Descriptor pointer. */
  46356. + uint32_t p_SnmpDescriptor; /* 0x38 0-31 SNMP Descriptor pointer. */
  46357. + uint32_t p_ArStats; /* 0x3C 0-31 Pointer to Auto Response Statistics */
  46358. +} _PackedType t_ArCommonDesc;
  46359. +
  46360. +#if defined(__MWERKS__) && !defined(__GNUC__)
  46361. +#pragma pack(pop)
  46362. +#endif /* defined(__MWERKS__) && ... */
  46363. +
  46364. +/* t_ArCommonDesc.filterControl bits */
  46365. +#define IP_PROT_TBL_PASS_MASK 0x08
  46366. +#define UDP_PORT_TBL_PASS_MASK 0x04
  46367. +#define TCP_PORT_TBL_PASS_MASK 0x02
  46368. +
  46369. +/* Offset of TCF flags within TCP packet */
  46370. +#define TCP_FLAGS_OFFSET 12
  46371. +
  46372. +
  46373. +#endif /* __FM_PORT_DSAR_H_ */
  46374. --- /dev/null
  46375. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port_im.c
  46376. @@ -0,0 +1,753 @@
  46377. +/*
  46378. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  46379. + *
  46380. + * Redistribution and use in source and binary forms, with or without
  46381. + * modification, are permitted provided that the following conditions are met:
  46382. + * * Redistributions of source code must retain the above copyright
  46383. + * notice, this list of conditions and the following disclaimer.
  46384. + * * Redistributions in binary form must reproduce the above copyright
  46385. + * notice, this list of conditions and the following disclaimer in the
  46386. + * documentation and/or other materials provided with the distribution.
  46387. + * * Neither the name of Freescale Semiconductor nor the
  46388. + * names of its contributors may be used to endorse or promote products
  46389. + * derived from this software without specific prior written permission.
  46390. + *
  46391. + *
  46392. + * ALTERNATIVELY, this software may be distributed under the terms of the
  46393. + * GNU General Public License ("GPL") as published by the Free Software
  46394. + * Foundation, either version 2 of that License or (at your option) any
  46395. + * later version.
  46396. + *
  46397. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  46398. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  46399. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  46400. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  46401. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  46402. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  46403. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  46404. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  46405. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  46406. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46407. + */
  46408. +
  46409. +
  46410. +/******************************************************************************
  46411. + @File fm_port_im.c
  46412. +
  46413. + @Description FM Port Independent-Mode ...
  46414. +*//***************************************************************************/
  46415. +#include "std_ext.h"
  46416. +#include "string_ext.h"
  46417. +#include "error_ext.h"
  46418. +#include "memcpy_ext.h"
  46419. +#include "fm_muram_ext.h"
  46420. +
  46421. +#include "fm_port.h"
  46422. +
  46423. +
  46424. +#define TX_CONF_STATUS_UNSENT 0x1
  46425. +
  46426. +
  46427. +typedef enum e_TxConfType
  46428. +{
  46429. + e_TX_CONF_TYPE_CHECK = 0 /**< check if all the buffers were touched by the muxator, no confirmation callback */
  46430. + ,e_TX_CONF_TYPE_CALLBACK = 1 /**< confirm to user all the available sent buffers */
  46431. + ,e_TX_CONF_TYPE_FLUSH = 3 /**< confirm all buffers plus the unsent one with an appropriate status */
  46432. +} e_TxConfType;
  46433. +
  46434. +
  46435. +static void ImException(t_Handle h_FmPort, uint32_t event)
  46436. +{
  46437. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  46438. +
  46439. + ASSERT_COND(((event & (IM_EV_RX | IM_EV_BSY)) && FmIsMaster(p_FmPort->h_Fm)) ||
  46440. + !FmIsMaster(p_FmPort->h_Fm));
  46441. +
  46442. + if (event & IM_EV_RX)
  46443. + FmPortImRx(p_FmPort);
  46444. + if ((event & IM_EV_BSY) && p_FmPort->f_Exception)
  46445. + p_FmPort->f_Exception(p_FmPort->h_App, e_FM_PORT_EXCEPTION_IM_BUSY);
  46446. +}
  46447. +
  46448. +
  46449. +static t_Error TxConf(t_FmPort *p_FmPort, e_TxConfType confType)
  46450. +{
  46451. + t_Error retVal = E_BUSY;
  46452. + uint32_t bdStatus;
  46453. + uint16_t savedStartBdId, confBdId;
  46454. +
  46455. + ASSERT_COND(p_FmPort);
  46456. +
  46457. + /*
  46458. + if (confType==e_TX_CONF_TYPE_CHECK)
  46459. + return (WfqEntryIsQueueEmpty(p_FmPort->im.h_WfqEntry) ? E_OK : E_BUSY);
  46460. + */
  46461. +
  46462. + confBdId = savedStartBdId = p_FmPort->im.currBdId;
  46463. + bdStatus = BD_STATUS_AND_LENGTH(BD_GET(confBdId));
  46464. +
  46465. + /* If R bit is set, we don't enter, or we break.
  46466. + we run till we get to R, or complete the loop */
  46467. + while ((!(bdStatus & BD_R_E) || (confType == e_TX_CONF_TYPE_FLUSH)) && (retVal != E_OK))
  46468. + {
  46469. + if (confType & e_TX_CONF_TYPE_CALLBACK) /* if it is confirmation with user callbacks */
  46470. + BD_STATUS_AND_LENGTH_SET(BD_GET(confBdId), 0);
  46471. +
  46472. + /* case 1: R bit is 0 and Length is set -> confirm! */
  46473. + if ((confType & e_TX_CONF_TYPE_CALLBACK) && (bdStatus & BD_LENGTH_MASK))
  46474. + {
  46475. + if (p_FmPort->im.f_TxConf)
  46476. + {
  46477. + if ((confType == e_TX_CONF_TYPE_FLUSH) && (bdStatus & BD_R_E))
  46478. + p_FmPort->im.f_TxConf(p_FmPort->h_App,
  46479. + BdBufferGet(XX_PhysToVirt, BD_GET(confBdId)),
  46480. + TX_CONF_STATUS_UNSENT,
  46481. + p_FmPort->im.p_BdShadow[confBdId]);
  46482. + else
  46483. + p_FmPort->im.f_TxConf(p_FmPort->h_App,
  46484. + BdBufferGet(XX_PhysToVirt, BD_GET(confBdId)),
  46485. + 0,
  46486. + p_FmPort->im.p_BdShadow[confBdId]);
  46487. + }
  46488. + }
  46489. + /* case 2: R bit is 0 and Length is 0 -> not used yet, nop! */
  46490. +
  46491. + confBdId = GetNextBdId(p_FmPort, confBdId);
  46492. + if (confBdId == savedStartBdId)
  46493. + retVal = E_OK;
  46494. + bdStatus = BD_STATUS_AND_LENGTH(BD_GET(confBdId));
  46495. + }
  46496. +
  46497. + return retVal;
  46498. +}
  46499. +
  46500. +t_Error FmPortImEnable(t_FmPort *p_FmPort)
  46501. +{
  46502. + uint32_t tmpReg = GET_UINT32(p_FmPort->im.p_FmPortImPram->mode);
  46503. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, (uint32_t)(tmpReg & ~IM_MODE_GRC_STP));
  46504. + return E_OK;
  46505. +}
  46506. +
  46507. +t_Error FmPortImDisable(t_FmPort *p_FmPort)
  46508. +{
  46509. + uint32_t tmpReg = GET_UINT32(p_FmPort->im.p_FmPortImPram->mode);
  46510. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, (uint32_t)(tmpReg | IM_MODE_GRC_STP));
  46511. + return E_OK;
  46512. +}
  46513. +
  46514. +t_Error FmPortImRx(t_FmPort *p_FmPort)
  46515. +{
  46516. + t_Handle h_CurrUserPriv, h_NewUserPriv;
  46517. + uint32_t bdStatus;
  46518. + volatile uint8_t buffPos;
  46519. + uint16_t length;
  46520. + uint16_t errors;
  46521. + uint8_t *p_CurData, *p_Data;
  46522. + uint32_t flags;
  46523. +
  46524. + ASSERT_COND(p_FmPort);
  46525. +
  46526. + flags = XX_LockIntrSpinlock(p_FmPort->h_Spinlock);
  46527. + if (p_FmPort->lock)
  46528. + {
  46529. + XX_UnlockIntrSpinlock(p_FmPort->h_Spinlock, flags);
  46530. + return E_OK;
  46531. + }
  46532. + p_FmPort->lock = TRUE;
  46533. + XX_UnlockIntrSpinlock(p_FmPort->h_Spinlock, flags);
  46534. +
  46535. + bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
  46536. +
  46537. + while (!(bdStatus & BD_R_E)) /* while there is data in the Rx BD */
  46538. + {
  46539. + if ((p_Data = p_FmPort->im.rxPool.f_GetBuf(p_FmPort->im.rxPool.h_BufferPool, &h_NewUserPriv)) == NULL)
  46540. + {
  46541. + p_FmPort->lock = FALSE;
  46542. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Data buffer"));
  46543. + }
  46544. +
  46545. + if (p_FmPort->im.firstBdOfFrameId == IM_ILEGAL_BD_ID)
  46546. + p_FmPort->im.firstBdOfFrameId = p_FmPort->im.currBdId;
  46547. +
  46548. + p_CurData = BdBufferGet(p_FmPort->im.rxPool.f_PhysToVirt, BD_GET(p_FmPort->im.currBdId));
  46549. + h_CurrUserPriv = p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId];
  46550. + length = (uint16_t)((bdStatus & BD_L) ?
  46551. + ((bdStatus & BD_LENGTH_MASK) - p_FmPort->im.rxFrameAccumLength):
  46552. + (bdStatus & BD_LENGTH_MASK));
  46553. + p_FmPort->im.rxFrameAccumLength += length;
  46554. +
  46555. + /* determine whether buffer is first, last, first and last (single */
  46556. + /* buffer frame) or middle (not first and not last) */
  46557. + buffPos = (uint8_t)((p_FmPort->im.currBdId == p_FmPort->im.firstBdOfFrameId) ?
  46558. + ((bdStatus & BD_L) ? SINGLE_BUF : FIRST_BUF) :
  46559. + ((bdStatus & BD_L) ? LAST_BUF : MIDDLE_BUF));
  46560. +
  46561. + if (bdStatus & BD_L)
  46562. + {
  46563. + p_FmPort->im.rxFrameAccumLength = 0;
  46564. + p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
  46565. + }
  46566. +
  46567. + BdBufferSet(p_FmPort->im.rxPool.f_VirtToPhys, BD_GET(p_FmPort->im.currBdId), p_Data);
  46568. +
  46569. + BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.currBdId), BD_R_E);
  46570. +
  46571. + errors = (uint16_t)((bdStatus & BD_RX_ERRORS) >> 16);
  46572. + p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId] = h_NewUserPriv;
  46573. +
  46574. + p_FmPort->im.currBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
  46575. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.offsetOut, (uint16_t)(p_FmPort->im.currBdId<<4));
  46576. + /* Pass the buffer if one of the conditions is true:
  46577. + - There are no errors
  46578. + - This is a part of a larger frame ( the application has already received some buffers ) */
  46579. + if ((buffPos != SINGLE_BUF) || !errors)
  46580. + {
  46581. + if (p_FmPort->im.f_RxStore(p_FmPort->h_App,
  46582. + p_CurData,
  46583. + length,
  46584. + errors,
  46585. + buffPos,
  46586. + h_CurrUserPriv) == e_RX_STORE_RESPONSE_PAUSE)
  46587. + break;
  46588. + }
  46589. + else if (p_FmPort->im.rxPool.f_PutBuf(p_FmPort->im.rxPool.h_BufferPool,
  46590. + p_CurData,
  46591. + h_CurrUserPriv))
  46592. + {
  46593. + p_FmPort->lock = FALSE;
  46594. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Failed freeing data buffer"));
  46595. + }
  46596. +
  46597. + bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
  46598. + }
  46599. + p_FmPort->lock = FALSE;
  46600. + return E_OK;
  46601. +}
  46602. +
  46603. +void FmPortConfigIM (t_FmPort *p_FmPort, t_FmPortParams *p_FmPortParams)
  46604. +{
  46605. + ASSERT_COND(p_FmPort);
  46606. +
  46607. + SANITY_CHECK_RETURN(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  46608. +
  46609. + p_FmPort->im.h_FmMuram = p_FmPortParams->specificParams.imRxTxParams.h_FmMuram;
  46610. + p_FmPort->p_FmPortDriverParam->liodnOffset = p_FmPortParams->specificParams.imRxTxParams.liodnOffset;
  46611. + p_FmPort->im.dataMemId = p_FmPortParams->specificParams.imRxTxParams.dataMemId;
  46612. + p_FmPort->im.dataMemAttributes = p_FmPortParams->specificParams.imRxTxParams.dataMemAttributes;
  46613. +
  46614. + p_FmPort->im.fwExtStructsMemId = DEFAULT_PORT_ImfwExtStructsMemId;
  46615. + p_FmPort->im.fwExtStructsMemAttr = DEFAULT_PORT_ImfwExtStructsMemAttr;
  46616. +
  46617. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
  46618. + (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  46619. + {
  46620. + p_FmPort->im.rxPool.h_BufferPool = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.h_BufferPool;
  46621. + p_FmPort->im.rxPool.f_GetBuf = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_GetBuf;
  46622. + p_FmPort->im.rxPool.f_PutBuf = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_PutBuf;
  46623. + p_FmPort->im.rxPool.bufferSize = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.bufferSize;
  46624. + p_FmPort->im.rxPool.f_PhysToVirt = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_PhysToVirt;
  46625. + if (!p_FmPort->im.rxPool.f_PhysToVirt)
  46626. + p_FmPort->im.rxPool.f_PhysToVirt = XX_PhysToVirt;
  46627. + p_FmPort->im.rxPool.f_VirtToPhys = p_FmPortParams->specificParams.imRxTxParams.rxPoolParams.f_VirtToPhys;
  46628. + if (!p_FmPort->im.rxPool.f_VirtToPhys)
  46629. + p_FmPort->im.rxPool.f_VirtToPhys = XX_VirtToPhys;
  46630. + p_FmPort->im.f_RxStore = p_FmPortParams->specificParams.imRxTxParams.f_RxStore;
  46631. +
  46632. + p_FmPort->im.mrblr = 0x8000;
  46633. + while (p_FmPort->im.mrblr)
  46634. + {
  46635. + if (p_FmPort->im.rxPool.bufferSize & p_FmPort->im.mrblr)
  46636. + break;
  46637. + p_FmPort->im.mrblr >>= 1;
  46638. + }
  46639. + if (p_FmPort->im.mrblr != p_FmPort->im.rxPool.bufferSize)
  46640. + DBG(WARNING, ("Max-Rx-Buffer-Length set to %d", p_FmPort->im.mrblr));
  46641. + p_FmPort->im.bdRingSize = DEFAULT_PORT_rxBdRingLength;
  46642. + p_FmPort->exceptions = DEFAULT_PORT_exception;
  46643. + if (FmIsMaster(p_FmPort->h_Fm))
  46644. + p_FmPort->polling = FALSE;
  46645. + else
  46646. + p_FmPort->polling = TRUE;
  46647. + p_FmPort->fmanCtrlEventId = (uint8_t)NO_IRQ;
  46648. + }
  46649. + else
  46650. + {
  46651. + p_FmPort->im.f_TxConf = p_FmPortParams->specificParams.imRxTxParams.f_TxConf;
  46652. +
  46653. + p_FmPort->im.bdRingSize = DEFAULT_PORT_txBdRingLength;
  46654. + }
  46655. +}
  46656. +
  46657. +t_Error FmPortImCheckInitParameters(t_FmPort *p_FmPort)
  46658. +{
  46659. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX) &&
  46660. + (p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) &&
  46661. + (p_FmPort->portType != e_FM_PORT_TYPE_TX) &&
  46662. + (p_FmPort->portType != e_FM_PORT_TYPE_TX_10G))
  46663. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, NO_MSG);
  46664. +
  46665. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
  46666. + (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  46667. + {
  46668. + if (!POWER_OF_2(p_FmPort->im.mrblr))
  46669. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("max Rx buffer length must be power of 2!!!"));
  46670. + if (p_FmPort->im.mrblr < 256)
  46671. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("max Rx buffer length must at least 256!!!"));
  46672. + if (p_FmPort->p_FmPortDriverParam->liodnOffset & ~FM_LIODN_OFFSET_MASK)
  46673. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("liodnOffset is larger than %d", FM_LIODN_OFFSET_MASK+1));
  46674. + }
  46675. +
  46676. + return E_OK;
  46677. +}
  46678. +
  46679. +t_Error FmPortImInit(t_FmPort *p_FmPort)
  46680. +{
  46681. + t_FmImBd *p_Bd=NULL;
  46682. + t_Handle h_BufContext;
  46683. + uint64_t tmpPhysBase;
  46684. + uint16_t log2Num;
  46685. + uint8_t *p_Data/*, *p_Tmp*/;
  46686. + int i;
  46687. + t_Error err;
  46688. + uint16_t tmpReg16;
  46689. + uint32_t tmpReg32;
  46690. +
  46691. + ASSERT_COND(p_FmPort);
  46692. +
  46693. + p_FmPort->im.p_FmPortImPram =
  46694. + (t_FmPortImPram *)FM_MURAM_AllocMem(p_FmPort->im.h_FmMuram, sizeof(t_FmPortImPram), IM_PRAM_ALIGN);
  46695. + if (!p_FmPort->im.p_FmPortImPram)
  46696. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Parameter-RAM!!!"));
  46697. + WRITE_BLOCK(p_FmPort->im.p_FmPortImPram, 0, sizeof(t_FmPortImPram));
  46698. +
  46699. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
  46700. + (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  46701. + {
  46702. + p_FmPort->im.p_BdRing =
  46703. + (t_FmImBd *)XX_MallocSmart((uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize),
  46704. + p_FmPort->im.fwExtStructsMemId,
  46705. + 4);
  46706. + if (!p_FmPort->im.p_BdRing)
  46707. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Rx BD ring!!!"));
  46708. + IOMemSet32(p_FmPort->im.p_BdRing, 0, (uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
  46709. +
  46710. + p_FmPort->im.p_BdShadow = (t_Handle *)XX_Malloc((uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
  46711. + if (!p_FmPort->im.p_BdShadow)
  46712. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Rx BD shadow!!!"));
  46713. + memset(p_FmPort->im.p_BdShadow, 0, (uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
  46714. +
  46715. + /* Initialize the Rx-BD ring */
  46716. + for (i=0; i<p_FmPort->im.bdRingSize; i++)
  46717. + {
  46718. + p_Bd = BD_GET(i);
  46719. + BD_STATUS_AND_LENGTH_SET (p_Bd, BD_R_E);
  46720. +
  46721. + if ((p_Data = p_FmPort->im.rxPool.f_GetBuf(p_FmPort->im.rxPool.h_BufferPool, &h_BufContext)) == NULL)
  46722. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("Data buffer"));
  46723. + BdBufferSet(p_FmPort->im.rxPool.f_VirtToPhys, p_Bd, p_Data);
  46724. + p_FmPort->im.p_BdShadow[i] = h_BufContext;
  46725. + }
  46726. +
  46727. + if ((p_FmPort->im.dataMemAttributes & MEMORY_ATTR_CACHEABLE) ||
  46728. + (p_FmPort->im.fwExtStructsMemAttr & MEMORY_ATTR_CACHEABLE))
  46729. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_GBL | IM_MODE_SET_BO(2));
  46730. + else
  46731. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_SET_BO(2));
  46732. +
  46733. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->rxQdPtr,
  46734. + (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
  46735. + p_FmPort->fmMuramPhysBaseAddr + 0x20));
  46736. +
  46737. + LOG2((uint64_t)p_FmPort->im.mrblr, log2Num);
  46738. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->mrblr, log2Num);
  46739. +
  46740. + /* Initialize Rx QD */
  46741. + tmpPhysBase = (uint64_t)(XX_VirtToPhys(p_FmPort->im.p_BdRing));
  46742. + SET_ADDR(&p_FmPort->im.p_FmPortImPram->rxQd.bdRingBase, tmpPhysBase);
  46743. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.bdRingSize, (uint16_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
  46744. +
  46745. + /* Update the IM PRAM address in the BMI */
  46746. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rfqid,
  46747. + (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
  46748. + p_FmPort->fmMuramPhysBaseAddr));
  46749. + if (!p_FmPort->polling || p_FmPort->exceptions)
  46750. + {
  46751. + /* Allocate, configure and register interrupts */
  46752. + err = FmAllocFmanCtrlEventReg(p_FmPort->h_Fm, &p_FmPort->fmanCtrlEventId);
  46753. + if (err)
  46754. + RETURN_ERROR(MAJOR, err, NO_MSG);
  46755. +
  46756. + ASSERT_COND(!(p_FmPort->fmanCtrlEventId & ~IM_RXQD_FPMEVT_SEL_MASK));
  46757. + tmpReg16 = (uint16_t)(p_FmPort->fmanCtrlEventId & IM_RXQD_FPMEVT_SEL_MASK);
  46758. + tmpReg32 = 0;
  46759. +
  46760. + if (p_FmPort->exceptions & IM_EV_BSY)
  46761. + {
  46762. + tmpReg16 |= IM_RXQD_BSYINTM;
  46763. + tmpReg32 |= IM_EV_BSY;
  46764. + }
  46765. + if (!p_FmPort->polling)
  46766. + {
  46767. + tmpReg16 |= IM_RXQD_RXFINTM;
  46768. + tmpReg32 |= IM_EV_RX;
  46769. + }
  46770. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, tmpReg16);
  46771. +
  46772. + FmRegisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, ImException , (t_Handle)p_FmPort);
  46773. +
  46774. + FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, tmpReg32);
  46775. + }
  46776. + else
  46777. + p_FmPort->fmanCtrlEventId = (uint8_t)NO_IRQ;
  46778. + }
  46779. + else
  46780. + {
  46781. + p_FmPort->im.p_BdRing = (t_FmImBd *)XX_MallocSmart((uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize), p_FmPort->im.fwExtStructsMemId, 4);
  46782. + if (!p_FmPort->im.p_BdRing)
  46783. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Tx BD ring!!!"));
  46784. + IOMemSet32(p_FmPort->im.p_BdRing, 0, (uint32_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
  46785. +
  46786. + p_FmPort->im.p_BdShadow = (t_Handle *)XX_Malloc((uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
  46787. + if (!p_FmPort->im.p_BdShadow)
  46788. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("Independent-Mode Rx BD shadow!!!"));
  46789. + memset(p_FmPort->im.p_BdShadow, 0, (uint32_t)(sizeof(t_Handle)*p_FmPort->im.bdRingSize));
  46790. + p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
  46791. +
  46792. + if ((p_FmPort->im.dataMemAttributes & MEMORY_ATTR_CACHEABLE) ||
  46793. + (p_FmPort->im.fwExtStructsMemAttr & MEMORY_ATTR_CACHEABLE))
  46794. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_GBL | IM_MODE_SET_BO(2));
  46795. + else
  46796. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->mode, IM_MODE_SET_BO(2));
  46797. +
  46798. + WRITE_UINT32(p_FmPort->im.p_FmPortImPram->txQdPtr,
  46799. + (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
  46800. + p_FmPort->fmMuramPhysBaseAddr + 0x40));
  46801. +
  46802. + /* Initialize Tx QD */
  46803. + tmpPhysBase = (uint64_t)(XX_VirtToPhys(p_FmPort->im.p_BdRing));
  46804. + SET_ADDR(&p_FmPort->im.p_FmPortImPram->txQd.bdRingBase, tmpPhysBase);
  46805. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->txQd.bdRingSize, (uint16_t)(sizeof(t_FmImBd)*p_FmPort->im.bdRingSize));
  46806. +
  46807. + /* Update the IM PRAM address in the BMI */
  46808. + WRITE_UINT32(p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tcfqid,
  46809. + (uint32_t)((uint64_t)(XX_VirtToPhys(p_FmPort->im.p_FmPortImPram)) -
  46810. + p_FmPort->fmMuramPhysBaseAddr));
  46811. + }
  46812. +
  46813. +
  46814. + return E_OK;
  46815. +}
  46816. +
  46817. +void FmPortImFree(t_FmPort *p_FmPort)
  46818. +{
  46819. + uint32_t bdStatus;
  46820. + uint8_t *p_CurData;
  46821. +
  46822. + ASSERT_COND(p_FmPort);
  46823. + ASSERT_COND(p_FmPort->im.p_FmPortImPram);
  46824. +
  46825. + if ((p_FmPort->portType == e_FM_PORT_TYPE_RX) ||
  46826. + (p_FmPort->portType == e_FM_PORT_TYPE_RX_10G))
  46827. + {
  46828. + if (!p_FmPort->polling || p_FmPort->exceptions)
  46829. + {
  46830. + /* Deallocate and unregister interrupts */
  46831. + FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, 0);
  46832. +
  46833. + FmFreeFmanCtrlEventReg(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
  46834. +
  46835. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, 0);
  46836. +
  46837. + FmUnregisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
  46838. + }
  46839. + /* Try first clean what has received */
  46840. + FmPortImRx(p_FmPort);
  46841. +
  46842. + /* Now, get rid of the the empty buffer! */
  46843. + bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
  46844. +
  46845. + while (bdStatus & BD_R_E) /* while there is data in the Rx BD */
  46846. + {
  46847. + p_CurData = BdBufferGet(p_FmPort->im.rxPool.f_PhysToVirt, BD_GET(p_FmPort->im.currBdId));
  46848. +
  46849. + BdBufferSet(p_FmPort->im.rxPool.f_VirtToPhys, BD_GET(p_FmPort->im.currBdId), NULL);
  46850. + BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.currBdId), 0);
  46851. +
  46852. + p_FmPort->im.rxPool.f_PutBuf(p_FmPort->im.rxPool.h_BufferPool,
  46853. + p_CurData,
  46854. + p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId]);
  46855. +
  46856. + p_FmPort->im.currBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
  46857. + bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
  46858. + }
  46859. + }
  46860. + else
  46861. + TxConf(p_FmPort, e_TX_CONF_TYPE_FLUSH);
  46862. +
  46863. + FM_MURAM_FreeMem(p_FmPort->im.h_FmMuram, p_FmPort->im.p_FmPortImPram);
  46864. +
  46865. + if (p_FmPort->im.p_BdShadow)
  46866. + XX_Free(p_FmPort->im.p_BdShadow);
  46867. +
  46868. + if (p_FmPort->im.p_BdRing)
  46869. + XX_FreeSmart(p_FmPort->im.p_BdRing);
  46870. +}
  46871. +
  46872. +
  46873. +t_Error FM_PORT_ConfigIMMaxRxBufLength(t_Handle h_FmPort, uint16_t newVal)
  46874. +{
  46875. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  46876. +
  46877. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  46878. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  46879. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  46880. +
  46881. + p_FmPort->im.mrblr = newVal;
  46882. +
  46883. + return E_OK;
  46884. +}
  46885. +
  46886. +t_Error FM_PORT_ConfigIMRxBdRingLength(t_Handle h_FmPort, uint16_t newVal)
  46887. +{
  46888. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  46889. +
  46890. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  46891. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  46892. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  46893. +
  46894. + p_FmPort->im.bdRingSize = newVal;
  46895. +
  46896. + return E_OK;
  46897. +}
  46898. +
  46899. +t_Error FM_PORT_ConfigIMTxBdRingLength(t_Handle h_FmPort, uint16_t newVal)
  46900. +{
  46901. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  46902. +
  46903. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  46904. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  46905. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  46906. +
  46907. + p_FmPort->im.bdRingSize = newVal;
  46908. +
  46909. + return E_OK;
  46910. +}
  46911. +
  46912. +t_Error FM_PORT_ConfigIMFmanCtrlExternalStructsMemory(t_Handle h_FmPort,
  46913. + uint8_t memId,
  46914. + uint32_t memAttributes)
  46915. +{
  46916. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  46917. +
  46918. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  46919. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  46920. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  46921. +
  46922. + p_FmPort->im.fwExtStructsMemId = memId;
  46923. + p_FmPort->im.fwExtStructsMemAttr = memAttributes;
  46924. +
  46925. + return E_OK;
  46926. +}
  46927. +
  46928. +t_Error FM_PORT_ConfigIMPolling(t_Handle h_FmPort)
  46929. +{
  46930. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  46931. +
  46932. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  46933. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  46934. + SANITY_CHECK_RETURN_ERROR(p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  46935. +
  46936. + if ((p_FmPort->portType != e_FM_PORT_TYPE_RX_10G) && (p_FmPort->portType != e_FM_PORT_TYPE_RX))
  46937. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("Available for Rx ports only"));
  46938. +
  46939. + if (!FmIsMaster(p_FmPort->h_Fm))
  46940. + RETURN_ERROR(MAJOR, E_INVALID_OPERATION, ("Available on master-partition only;"
  46941. + "in guest-partitions, IM is always in polling!"));
  46942. +
  46943. + p_FmPort->polling = TRUE;
  46944. +
  46945. + return E_OK;
  46946. +}
  46947. +
  46948. +t_Error FM_PORT_SetIMExceptions(t_Handle h_FmPort, e_FmPortExceptions exception, bool enable)
  46949. +{
  46950. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  46951. + t_Error err;
  46952. + uint16_t tmpReg16;
  46953. + uint32_t tmpReg32;
  46954. +
  46955. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  46956. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  46957. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  46958. +
  46959. + if (exception == e_FM_PORT_EXCEPTION_IM_BUSY)
  46960. + {
  46961. + if (enable)
  46962. + {
  46963. + p_FmPort->exceptions |= IM_EV_BSY;
  46964. + if (p_FmPort->fmanCtrlEventId == (uint8_t)NO_IRQ)
  46965. + {
  46966. + /* Allocate, configure and register interrupts */
  46967. + err = FmAllocFmanCtrlEventReg(p_FmPort->h_Fm, &p_FmPort->fmanCtrlEventId);
  46968. + if (err)
  46969. + RETURN_ERROR(MAJOR, err, NO_MSG);
  46970. + ASSERT_COND(!(p_FmPort->fmanCtrlEventId & ~IM_RXQD_FPMEVT_SEL_MASK));
  46971. +
  46972. + FmRegisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, ImException, (t_Handle)p_FmPort);
  46973. + tmpReg16 = (uint16_t)((p_FmPort->fmanCtrlEventId & IM_RXQD_FPMEVT_SEL_MASK) | IM_RXQD_BSYINTM);
  46974. + tmpReg32 = IM_EV_BSY;
  46975. + }
  46976. + else
  46977. + {
  46978. + tmpReg16 = (uint16_t)(GET_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen) | IM_RXQD_BSYINTM);
  46979. + tmpReg32 = FmGetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId) | IM_EV_BSY;
  46980. + }
  46981. +
  46982. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, tmpReg16);
  46983. + FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, tmpReg32);
  46984. + }
  46985. + else
  46986. + {
  46987. + p_FmPort->exceptions &= ~IM_EV_BSY;
  46988. + if (!p_FmPort->exceptions && p_FmPort->polling)
  46989. + {
  46990. + FmFreeFmanCtrlEventReg(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
  46991. + FmUnregisterFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId);
  46992. + FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, 0);
  46993. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, 0);
  46994. + p_FmPort->fmanCtrlEventId = (uint8_t)NO_IRQ;
  46995. + }
  46996. + else
  46997. + {
  46998. + tmpReg16 = (uint16_t)(GET_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen) & ~IM_RXQD_BSYINTM);
  46999. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->rxQd.gen, tmpReg16);
  47000. + tmpReg32 = FmGetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId) & ~IM_EV_BSY;
  47001. + FmSetFmanCtrlIntr(p_FmPort->h_Fm, p_FmPort->fmanCtrlEventId, tmpReg32);
  47002. + }
  47003. + }
  47004. + }
  47005. + else
  47006. + RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("Invalid exception."));
  47007. +
  47008. + return E_OK;
  47009. +}
  47010. +
  47011. +t_Error FM_PORT_ImTx( t_Handle h_FmPort,
  47012. + uint8_t *p_Data,
  47013. + uint16_t length,
  47014. + bool lastBuffer,
  47015. + t_Handle h_BufContext)
  47016. +{
  47017. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  47018. + uint16_t nextBdId;
  47019. + uint32_t bdStatus, nextBdStatus;
  47020. + bool firstBuffer;
  47021. +
  47022. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  47023. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  47024. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  47025. +
  47026. + bdStatus = BD_STATUS_AND_LENGTH(BD_GET(p_FmPort->im.currBdId));
  47027. + nextBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
  47028. + nextBdStatus = BD_STATUS_AND_LENGTH(BD_GET(nextBdId));
  47029. +
  47030. + if (!(bdStatus & BD_R_E) && !(nextBdStatus & BD_R_E))
  47031. + {
  47032. + /* Confirm the current BD - BD is available */
  47033. + if ((bdStatus & BD_LENGTH_MASK) && (p_FmPort->im.f_TxConf))
  47034. + p_FmPort->im.f_TxConf (p_FmPort->h_App,
  47035. + BdBufferGet(XX_PhysToVirt, BD_GET(p_FmPort->im.currBdId)),
  47036. + 0,
  47037. + p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId]);
  47038. +
  47039. + bdStatus = length;
  47040. +
  47041. + /* if this is the first BD of a frame */
  47042. + if (p_FmPort->im.firstBdOfFrameId == IM_ILEGAL_BD_ID)
  47043. + {
  47044. + firstBuffer = TRUE;
  47045. + p_FmPort->im.txFirstBdStatus = (bdStatus | BD_R_E);
  47046. +
  47047. + if (!lastBuffer)
  47048. + p_FmPort->im.firstBdOfFrameId = p_FmPort->im.currBdId;
  47049. + }
  47050. + else
  47051. + firstBuffer = FALSE;
  47052. +
  47053. + BdBufferSet(XX_VirtToPhys, BD_GET(p_FmPort->im.currBdId), p_Data);
  47054. + p_FmPort->im.p_BdShadow[p_FmPort->im.currBdId] = h_BufContext;
  47055. +
  47056. + /* deal with last */
  47057. + if (lastBuffer)
  47058. + {
  47059. + /* if single buffer frame */
  47060. + if (firstBuffer)
  47061. + BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.currBdId), p_FmPort->im.txFirstBdStatus | BD_L);
  47062. + else
  47063. + {
  47064. + /* Set the last BD of the frame */
  47065. + BD_STATUS_AND_LENGTH_SET (BD_GET(p_FmPort->im.currBdId), (bdStatus | BD_R_E | BD_L));
  47066. + /* Set the first BD of the frame */
  47067. + BD_STATUS_AND_LENGTH_SET(BD_GET(p_FmPort->im.firstBdOfFrameId), p_FmPort->im.txFirstBdStatus);
  47068. + p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
  47069. + }
  47070. + WRITE_UINT16(p_FmPort->im.p_FmPortImPram->txQd.offsetIn, (uint16_t)(GetNextBdId(p_FmPort, p_FmPort->im.currBdId)<<4));
  47071. + }
  47072. + else if (!firstBuffer) /* mid frame buffer */
  47073. + BD_STATUS_AND_LENGTH_SET (BD_GET(p_FmPort->im.currBdId), bdStatus | BD_R_E);
  47074. +
  47075. + p_FmPort->im.currBdId = GetNextBdId(p_FmPort, p_FmPort->im.currBdId);
  47076. + }
  47077. + else
  47078. + {
  47079. + /* Discard current frame. Return error. */
  47080. + if (p_FmPort->im.firstBdOfFrameId != IM_ILEGAL_BD_ID)
  47081. + {
  47082. + /* Error: No free BD */
  47083. + /* Response: Discard current frame. Return error. */
  47084. + uint16_t cleanBdId = p_FmPort->im.firstBdOfFrameId;
  47085. +
  47086. + ASSERT_COND(p_FmPort->im.firstBdOfFrameId != p_FmPort->im.currBdId);
  47087. +
  47088. + /* Since firstInFrame is not NULL, one buffer at least has already been
  47089. + inserted into the BD ring. Using do-while covers the situation of a
  47090. + frame spanned throughout the whole Tx BD ring (p_CleanBd is incremented
  47091. + prior to testing whether or not it's equal to TxBd). */
  47092. + do
  47093. + {
  47094. + BD_STATUS_AND_LENGTH_SET(BD_GET(cleanBdId), 0);
  47095. + /* Advance BD pointer */
  47096. + cleanBdId = GetNextBdId(p_FmPort, cleanBdId);
  47097. + } while (cleanBdId != p_FmPort->im.currBdId);
  47098. +
  47099. + p_FmPort->im.currBdId = cleanBdId;
  47100. + p_FmPort->im.firstBdOfFrameId = IM_ILEGAL_BD_ID;
  47101. + }
  47102. +
  47103. + return ERROR_CODE(E_FULL);
  47104. + }
  47105. +
  47106. + return E_OK;
  47107. +}
  47108. +
  47109. +void FM_PORT_ImTxConf(t_Handle h_FmPort)
  47110. +{
  47111. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  47112. +
  47113. + SANITY_CHECK_RETURN(p_FmPort, E_INVALID_HANDLE);
  47114. + SANITY_CHECK_RETURN(p_FmPort->imEn, E_INVALID_STATE);
  47115. + SANITY_CHECK_RETURN(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  47116. +
  47117. + TxConf(p_FmPort, e_TX_CONF_TYPE_CALLBACK);
  47118. +}
  47119. +
  47120. +t_Error FM_PORT_ImRx(t_Handle h_FmPort)
  47121. +{
  47122. + t_FmPort *p_FmPort = (t_FmPort*)h_FmPort;
  47123. +
  47124. + SANITY_CHECK_RETURN_ERROR(p_FmPort, E_INVALID_HANDLE);
  47125. + SANITY_CHECK_RETURN_ERROR(p_FmPort->imEn, E_INVALID_STATE);
  47126. + SANITY_CHECK_RETURN_ERROR(!p_FmPort->p_FmPortDriverParam, E_INVALID_HANDLE);
  47127. +
  47128. + return FmPortImRx(p_FmPort);
  47129. +}
  47130. --- /dev/null
  47131. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fman_port.c
  47132. @@ -0,0 +1,1568 @@
  47133. +/*
  47134. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  47135. + *
  47136. + * Redistribution and use in source and binary forms, with or without
  47137. + * modification, are permitted provided that the following conditions are met:
  47138. + * * Redistributions of source code must retain the above copyright
  47139. + * notice, this list of conditions and the following disclaimer.
  47140. + * * Redistributions in binary form must reproduce the above copyright
  47141. + * notice, this list of conditions and the following disclaimer in the
  47142. + * documentation and/or other materials provided with the distribution.
  47143. + * * Neither the name of Freescale Semiconductor nor the
  47144. + * names of its contributors may be used to endorse or promote products
  47145. + * derived from this software without specific prior written permission.
  47146. + *
  47147. + *
  47148. + * ALTERNATIVELY, this software may be distributed under the terms of the
  47149. + * GNU General Public License ("GPL") as published by the Free Software
  47150. + * Foundation, either version 2 of that License or (at your option) any
  47151. + * later version.
  47152. + *
  47153. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  47154. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  47155. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  47156. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  47157. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  47158. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  47159. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  47160. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  47161. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  47162. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  47163. + */
  47164. +
  47165. +
  47166. +#include "common/general.h"
  47167. +
  47168. +#include "fman_common.h"
  47169. +#include "fsl_fman_port.h"
  47170. +
  47171. +
  47172. +/* problem Eyal: the following should not be here*/
  47173. +#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME 0x00000028
  47174. +
  47175. +static uint32_t get_no_pcd_nia_bmi_ac_enc_frame(struct fman_port_cfg *cfg)
  47176. +{
  47177. + if (cfg->errata_A006675)
  47178. + return NIA_ENG_FM_CTL |
  47179. + NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME;
  47180. + else
  47181. + return NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME;
  47182. +}
  47183. +
  47184. +static int init_bmi_rx(struct fman_port *port,
  47185. + struct fman_port_cfg *cfg,
  47186. + struct fman_port_params *params)
  47187. +{
  47188. + struct fman_port_rx_bmi_regs *regs = &port->bmi_regs->rx;
  47189. + uint32_t tmp;
  47190. +
  47191. + /* Rx Configuration register */
  47192. + tmp = 0;
  47193. + if (port->im_en)
  47194. + tmp |= BMI_PORT_CFG_IM;
  47195. + else if (cfg->discard_override)
  47196. + tmp |= BMI_PORT_CFG_FDOVR;
  47197. + iowrite32be(tmp, &regs->fmbm_rcfg);
  47198. +
  47199. + /* DMA attributes */
  47200. + tmp = (uint32_t)cfg->dma_swap_data << BMI_DMA_ATTR_SWP_SHIFT;
  47201. + if (cfg->dma_ic_stash_on)
  47202. + tmp |= BMI_DMA_ATTR_IC_STASH_ON;
  47203. + if (cfg->dma_header_stash_on)
  47204. + tmp |= BMI_DMA_ATTR_HDR_STASH_ON;
  47205. + if (cfg->dma_sg_stash_on)
  47206. + tmp |= BMI_DMA_ATTR_SG_STASH_ON;
  47207. + if (cfg->dma_write_optimize)
  47208. + tmp |= BMI_DMA_ATTR_WRITE_OPTIMIZE;
  47209. + iowrite32be(tmp, &regs->fmbm_rda);
  47210. +
  47211. + /* Rx FIFO parameters */
  47212. + tmp = (cfg->rx_pri_elevation / FMAN_PORT_BMI_FIFO_UNITS - 1) <<
  47213. + BMI_RX_FIFO_PRI_ELEVATION_SHIFT;
  47214. + tmp |= cfg->rx_fifo_thr / FMAN_PORT_BMI_FIFO_UNITS - 1;
  47215. + iowrite32be(tmp, &regs->fmbm_rfp);
  47216. +
  47217. + if (cfg->excessive_threshold_register)
  47218. + /* always allow access to the extra resources */
  47219. + iowrite32be(BMI_RX_FIFO_THRESHOLD_ETHE, &regs->fmbm_reth);
  47220. +
  47221. + /* Frame end data */
  47222. + tmp = (uint32_t)cfg->checksum_bytes_ignore <<
  47223. + BMI_RX_FRAME_END_CS_IGNORE_SHIFT;
  47224. + tmp |= (uint32_t)cfg->rx_cut_end_bytes <<
  47225. + BMI_RX_FRAME_END_CUT_SHIFT;
  47226. + if (cfg->errata_A006320)
  47227. + tmp &= 0xffe0ffff;
  47228. + iowrite32be(tmp, &regs->fmbm_rfed);
  47229. +
  47230. + /* Internal context parameters */
  47231. + tmp = ((uint32_t)cfg->ic_ext_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
  47232. + BMI_IC_TO_EXT_SHIFT;
  47233. + tmp |= ((uint32_t)cfg->ic_int_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
  47234. + BMI_IC_FROM_INT_SHIFT;
  47235. + tmp |= cfg->ic_size / FMAN_PORT_IC_OFFSET_UNITS;
  47236. + iowrite32be(tmp, &regs->fmbm_ricp);
  47237. +
  47238. + /* Internal buffer offset */
  47239. + tmp = ((uint32_t)cfg->int_buf_start_margin / FMAN_PORT_IC_OFFSET_UNITS)
  47240. + << BMI_INT_BUF_MARG_SHIFT;
  47241. + iowrite32be(tmp, &regs->fmbm_rim);
  47242. +
  47243. + /* External buffer margins */
  47244. + if (!port->im_en)
  47245. + {
  47246. + tmp = (uint32_t)cfg->ext_buf_start_margin <<
  47247. + BMI_EXT_BUF_MARG_START_SHIFT;
  47248. + tmp |= (uint32_t)cfg->ext_buf_end_margin;
  47249. + if (cfg->fmbm_rebm_has_sgd && cfg->no_scatter_gather)
  47250. + tmp |= BMI_SG_DISABLE;
  47251. + iowrite32be(tmp, &regs->fmbm_rebm);
  47252. + }
  47253. +
  47254. + /* Frame attributes */
  47255. + tmp = BMI_CMD_RX_MR_DEF;
  47256. + if (!port->im_en)
  47257. + {
  47258. + tmp |= BMI_CMD_ATTR_ORDER;
  47259. + tmp |= (uint32_t)cfg->color << BMI_CMD_ATTR_COLOR_SHIFT;
  47260. + if (cfg->sync_req)
  47261. + tmp |= BMI_CMD_ATTR_SYNC;
  47262. + }
  47263. + iowrite32be(tmp, &regs->fmbm_rfca);
  47264. +
  47265. + /* NIA */
  47266. + if (port->im_en)
  47267. + tmp = NIA_ENG_FM_CTL | NIA_FM_CTL_AC_IND_MODE_RX;
  47268. + else
  47269. + {
  47270. + tmp = (uint32_t)cfg->rx_fd_bits << BMI_NEXT_ENG_FD_BITS_SHIFT;
  47271. + tmp |= get_no_pcd_nia_bmi_ac_enc_frame(cfg);
  47272. + }
  47273. + iowrite32be(tmp, &regs->fmbm_rfne);
  47274. +
  47275. + /* Enqueue NIA */
  47276. + iowrite32be(NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR, &regs->fmbm_rfene);
  47277. +
  47278. + /* Default/error queues */
  47279. + if (!port->im_en)
  47280. + {
  47281. + iowrite32be((params->dflt_fqid & 0x00FFFFFF), &regs->fmbm_rfqid);
  47282. + iowrite32be((params->err_fqid & 0x00FFFFFF), &regs->fmbm_refqid);
  47283. + }
  47284. +
  47285. + /* Discard/error masks */
  47286. + iowrite32be(params->discard_mask, &regs->fmbm_rfsdm);
  47287. + iowrite32be(params->err_mask, &regs->fmbm_rfsem);
  47288. +
  47289. + /* Statistics counters */
  47290. + tmp = 0;
  47291. + if (cfg->stats_counters_enable)
  47292. + tmp = BMI_COUNTERS_EN;
  47293. + iowrite32be(tmp, &regs->fmbm_rstc);
  47294. +
  47295. + /* Performance counters */
  47296. + fman_port_set_perf_cnt_params(port, &cfg->perf_cnt_params);
  47297. + tmp = 0;
  47298. + if (cfg->perf_counters_enable)
  47299. + tmp = BMI_COUNTERS_EN;
  47300. + iowrite32be(tmp, &regs->fmbm_rpc);
  47301. +
  47302. + return 0;
  47303. +}
  47304. +
  47305. +static int init_bmi_tx(struct fman_port *port,
  47306. + struct fman_port_cfg *cfg,
  47307. + struct fman_port_params *params)
  47308. +{
  47309. + struct fman_port_tx_bmi_regs *regs = &port->bmi_regs->tx;
  47310. + uint32_t tmp;
  47311. +
  47312. + /* Tx Configuration register */
  47313. + tmp = 0;
  47314. + if (port->im_en)
  47315. + tmp |= BMI_PORT_CFG_IM;
  47316. + iowrite32be(tmp, &regs->fmbm_tcfg);
  47317. +
  47318. + /* DMA attributes */
  47319. + tmp = (uint32_t)cfg->dma_swap_data << BMI_DMA_ATTR_SWP_SHIFT;
  47320. + if (cfg->dma_ic_stash_on)
  47321. + tmp |= BMI_DMA_ATTR_IC_STASH_ON;
  47322. + if (cfg->dma_header_stash_on)
  47323. + tmp |= BMI_DMA_ATTR_HDR_STASH_ON;
  47324. + if (cfg->dma_sg_stash_on)
  47325. + tmp |= BMI_DMA_ATTR_SG_STASH_ON;
  47326. + iowrite32be(tmp, &regs->fmbm_tda);
  47327. +
  47328. + /* Tx FIFO parameters */
  47329. + tmp = (cfg->tx_fifo_min_level / FMAN_PORT_BMI_FIFO_UNITS) <<
  47330. + BMI_TX_FIFO_MIN_FILL_SHIFT;
  47331. + tmp |= ((uint32_t)cfg->tx_fifo_deq_pipeline_depth - 1) <<
  47332. + BMI_FIFO_PIPELINE_DEPTH_SHIFT;
  47333. + tmp |= (uint32_t)(cfg->tx_fifo_low_comf_level /
  47334. + FMAN_PORT_BMI_FIFO_UNITS - 1);
  47335. + iowrite32be(tmp, &regs->fmbm_tfp);
  47336. +
  47337. + /* Frame end data */
  47338. + tmp = (uint32_t)cfg->checksum_bytes_ignore <<
  47339. + BMI_FRAME_END_CS_IGNORE_SHIFT;
  47340. + iowrite32be(tmp, &regs->fmbm_tfed);
  47341. +
  47342. + /* Internal context parameters */
  47343. + if (!port->im_en)
  47344. + {
  47345. + tmp = ((uint32_t)cfg->ic_ext_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
  47346. + BMI_IC_TO_EXT_SHIFT;
  47347. + tmp |= ((uint32_t)cfg->ic_int_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
  47348. + BMI_IC_FROM_INT_SHIFT;
  47349. + tmp |= cfg->ic_size / FMAN_PORT_IC_OFFSET_UNITS;
  47350. + iowrite32be(tmp, &regs->fmbm_ticp);
  47351. + }
  47352. + /* Frame attributes */
  47353. + tmp = BMI_CMD_TX_MR_DEF;
  47354. + if (port->im_en)
  47355. + tmp |= BMI_CMD_MR_DEAS;
  47356. + else
  47357. + {
  47358. + tmp |= BMI_CMD_ATTR_ORDER;
  47359. + tmp |= (uint32_t)cfg->color << BMI_CMD_ATTR_COLOR_SHIFT;
  47360. + }
  47361. + iowrite32be(tmp, &regs->fmbm_tfca);
  47362. +
  47363. + /* Dequeue NIA + enqueue NIA */
  47364. + if (port->im_en)
  47365. + {
  47366. + iowrite32be(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_IND_MODE_TX, &regs->fmbm_tfdne);
  47367. + iowrite32be(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_IND_MODE_TX, &regs->fmbm_tfene);
  47368. + }
  47369. + else
  47370. + {
  47371. + iowrite32be(NIA_ENG_QMI_DEQ, &regs->fmbm_tfdne);
  47372. + iowrite32be(NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR, &regs->fmbm_tfene);
  47373. + if (cfg->fmbm_tfne_has_features)
  47374. + iowrite32be(!params->dflt_fqid ?
  47375. + BMI_EBD_EN | NIA_BMI_AC_FETCH_ALL_FRAME :
  47376. + NIA_BMI_AC_FETCH_ALL_FRAME, &regs->fmbm_tfne);
  47377. + if (!params->dflt_fqid && params->dont_release_buf)
  47378. + {
  47379. + iowrite32be(0x00FFFFFF, &regs->fmbm_tcfqid);
  47380. + iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_TX_RELEASE, &regs->fmbm_tfene);
  47381. + if (cfg->fmbm_tfne_has_features)
  47382. + iowrite32be(ioread32be(&regs->fmbm_tfne) & ~BMI_EBD_EN, &regs->fmbm_tfne);
  47383. + }
  47384. + }
  47385. +
  47386. + /* Confirmation/error queues */
  47387. + if (!port->im_en)
  47388. + {
  47389. + if (params->dflt_fqid || !params->dont_release_buf)
  47390. + iowrite32be(params->dflt_fqid & 0x00FFFFFF, &regs->fmbm_tcfqid);
  47391. + iowrite32be((params->err_fqid & 0x00FFFFFF), &regs->fmbm_tefqid);
  47392. + }
  47393. + /* Statistics counters */
  47394. + tmp = 0;
  47395. + if (cfg->stats_counters_enable)
  47396. + tmp = BMI_COUNTERS_EN;
  47397. + iowrite32be(tmp, &regs->fmbm_tstc);
  47398. +
  47399. + /* Performance counters */
  47400. + fman_port_set_perf_cnt_params(port, &cfg->perf_cnt_params);
  47401. + tmp = 0;
  47402. + if (cfg->perf_counters_enable)
  47403. + tmp = BMI_COUNTERS_EN;
  47404. + iowrite32be(tmp, &regs->fmbm_tpc);
  47405. +
  47406. + return 0;
  47407. +}
  47408. +
  47409. +static int init_bmi_oh(struct fman_port *port,
  47410. + struct fman_port_cfg *cfg,
  47411. + struct fman_port_params *params)
  47412. +{
  47413. + struct fman_port_oh_bmi_regs *regs = &port->bmi_regs->oh;
  47414. + uint32_t tmp;
  47415. +
  47416. + /* OP Configuration register */
  47417. + tmp = 0;
  47418. + if (cfg->discard_override)
  47419. + tmp |= BMI_PORT_CFG_FDOVR;
  47420. + iowrite32be(tmp, &regs->fmbm_ocfg);
  47421. +
  47422. + /* DMA attributes */
  47423. + tmp = (uint32_t)cfg->dma_swap_data << BMI_DMA_ATTR_SWP_SHIFT;
  47424. + if (cfg->dma_ic_stash_on)
  47425. + tmp |= BMI_DMA_ATTR_IC_STASH_ON;
  47426. + if (cfg->dma_header_stash_on)
  47427. + tmp |= BMI_DMA_ATTR_HDR_STASH_ON;
  47428. + if (cfg->dma_sg_stash_on)
  47429. + tmp |= BMI_DMA_ATTR_SG_STASH_ON;
  47430. + if (cfg->dma_write_optimize)
  47431. + tmp |= BMI_DMA_ATTR_WRITE_OPTIMIZE;
  47432. + iowrite32be(tmp, &regs->fmbm_oda);
  47433. +
  47434. + /* Tx FIFO parameters */
  47435. + tmp = ((uint32_t)cfg->tx_fifo_deq_pipeline_depth - 1) <<
  47436. + BMI_FIFO_PIPELINE_DEPTH_SHIFT;
  47437. + iowrite32be(tmp, &regs->fmbm_ofp);
  47438. +
  47439. + /* Internal context parameters */
  47440. + tmp = ((uint32_t)cfg->ic_ext_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
  47441. + BMI_IC_TO_EXT_SHIFT;
  47442. + tmp |= ((uint32_t)cfg->ic_int_offset / FMAN_PORT_IC_OFFSET_UNITS) <<
  47443. + BMI_IC_FROM_INT_SHIFT;
  47444. + tmp |= cfg->ic_size / FMAN_PORT_IC_OFFSET_UNITS;
  47445. + iowrite32be(tmp, &regs->fmbm_oicp);
  47446. +
  47447. + /* Frame attributes */
  47448. + tmp = BMI_CMD_OP_MR_DEF;
  47449. + tmp |= (uint32_t)cfg->color << BMI_CMD_ATTR_COLOR_SHIFT;
  47450. + if (cfg->sync_req)
  47451. + tmp |= BMI_CMD_ATTR_SYNC;
  47452. + if (port->type == E_FMAN_PORT_TYPE_OP)
  47453. + tmp |= BMI_CMD_ATTR_ORDER;
  47454. + iowrite32be(tmp, &regs->fmbm_ofca);
  47455. +
  47456. + /* Internal buffer offset */
  47457. + tmp = ((uint32_t)cfg->int_buf_start_margin / FMAN_PORT_IC_OFFSET_UNITS)
  47458. + << BMI_INT_BUF_MARG_SHIFT;
  47459. + iowrite32be(tmp, &regs->fmbm_oim);
  47460. +
  47461. + /* Dequeue NIA */
  47462. + iowrite32be(NIA_ENG_QMI_DEQ, &regs->fmbm_ofdne);
  47463. +
  47464. + /* NIA and Enqueue NIA */
  47465. + if (port->type == E_FMAN_PORT_TYPE_HC) {
  47466. + iowrite32be(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_HC,
  47467. + &regs->fmbm_ofne);
  47468. + iowrite32be(NIA_ENG_QMI_ENQ, &regs->fmbm_ofene);
  47469. + } else {
  47470. + iowrite32be(get_no_pcd_nia_bmi_ac_enc_frame(cfg),
  47471. + &regs->fmbm_ofne);
  47472. + iowrite32be(NIA_ENG_QMI_ENQ | NIA_ORDER_RESTOR,
  47473. + &regs->fmbm_ofene);
  47474. + }
  47475. +
  47476. + /* Default/error queues */
  47477. + iowrite32be((params->dflt_fqid & 0x00FFFFFF), &regs->fmbm_ofqid);
  47478. + iowrite32be((params->err_fqid & 0x00FFFFFF), &regs->fmbm_oefqid);
  47479. +
  47480. + /* Discard/error masks */
  47481. + if (port->type == E_FMAN_PORT_TYPE_OP) {
  47482. + iowrite32be(params->discard_mask, &regs->fmbm_ofsdm);
  47483. + iowrite32be(params->err_mask, &regs->fmbm_ofsem);
  47484. + }
  47485. +
  47486. + /* Statistics counters */
  47487. + tmp = 0;
  47488. + if (cfg->stats_counters_enable)
  47489. + tmp = BMI_COUNTERS_EN;
  47490. + iowrite32be(tmp, &regs->fmbm_ostc);
  47491. +
  47492. + /* Performance counters */
  47493. + fman_port_set_perf_cnt_params(port, &cfg->perf_cnt_params);
  47494. + tmp = 0;
  47495. + if (cfg->perf_counters_enable)
  47496. + tmp = BMI_COUNTERS_EN;
  47497. + iowrite32be(tmp, &regs->fmbm_opc);
  47498. +
  47499. + return 0;
  47500. +}
  47501. +
  47502. +static int init_qmi(struct fman_port *port,
  47503. + struct fman_port_cfg *cfg,
  47504. + struct fman_port_params *params)
  47505. +{
  47506. + struct fman_port_qmi_regs *regs = port->qmi_regs;
  47507. + uint32_t tmp;
  47508. +
  47509. + tmp = 0;
  47510. + if (cfg->queue_counters_enable)
  47511. + tmp |= QMI_PORT_CFG_EN_COUNTERS;
  47512. + iowrite32be(tmp, &regs->fmqm_pnc);
  47513. +
  47514. + /* Rx port configuration */
  47515. + if ((port->type == E_FMAN_PORT_TYPE_RX) ||
  47516. + (port->type == E_FMAN_PORT_TYPE_RX_10G)) {
  47517. + /* Enqueue NIA */
  47518. + iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_RELEASE, &regs->fmqm_pnen);
  47519. + return 0;
  47520. + }
  47521. +
  47522. + /* Continue with Tx and O/H port configuration */
  47523. + if ((port->type == E_FMAN_PORT_TYPE_TX) ||
  47524. + (port->type == E_FMAN_PORT_TYPE_TX_10G)) {
  47525. + /* Enqueue NIA */
  47526. + iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_TX_RELEASE,
  47527. + &regs->fmqm_pnen);
  47528. + /* Dequeue NIA */
  47529. + iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_TX, &regs->fmqm_pndn);
  47530. + } else {
  47531. + /* Enqueue NIA */
  47532. + iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_RELEASE, &regs->fmqm_pnen);
  47533. + /* Dequeue NIA */
  47534. + iowrite32be(NIA_ENG_BMI | NIA_BMI_AC_FETCH, &regs->fmqm_pndn);
  47535. + }
  47536. +
  47537. + /* Dequeue Configuration register */
  47538. + tmp = 0;
  47539. + if (cfg->deq_high_pri)
  47540. + tmp |= QMI_DEQ_CFG_PRI;
  47541. +
  47542. + switch (cfg->deq_type) {
  47543. + case E_FMAN_PORT_DEQ_BY_PRI:
  47544. + tmp |= QMI_DEQ_CFG_TYPE1;
  47545. + break;
  47546. + case E_FMAN_PORT_DEQ_ACTIVE_FQ:
  47547. + tmp |= QMI_DEQ_CFG_TYPE2;
  47548. + break;
  47549. + case E_FMAN_PORT_DEQ_ACTIVE_FQ_NO_ICS:
  47550. + tmp |= QMI_DEQ_CFG_TYPE3;
  47551. + break;
  47552. + default:
  47553. + return -EINVAL;
  47554. + }
  47555. +
  47556. + if (cfg->qmi_deq_options_support) {
  47557. + if ((port->type == E_FMAN_PORT_TYPE_HC) &&
  47558. + (cfg->deq_prefetch_opt != E_FMAN_PORT_DEQ_NO_PREFETCH))
  47559. + return -EINVAL;
  47560. +
  47561. + switch (cfg->deq_prefetch_opt) {
  47562. + case E_FMAN_PORT_DEQ_NO_PREFETCH:
  47563. + break;
  47564. + case E_FMAN_PORT_DEQ_PART_PREFETCH:
  47565. + tmp |= QMI_DEQ_CFG_PREFETCH_PARTIAL;
  47566. + break;
  47567. + case E_FMAN_PORT_DEQ_FULL_PREFETCH:
  47568. + tmp |= QMI_DEQ_CFG_PREFETCH_FULL;
  47569. + break;
  47570. + default:
  47571. + return -EINVAL;
  47572. + }
  47573. + }
  47574. + tmp |= (uint32_t)(params->deq_sp & QMI_DEQ_CFG_SP_MASK) <<
  47575. + QMI_DEQ_CFG_SP_SHIFT;
  47576. + tmp |= cfg->deq_byte_cnt;
  47577. + iowrite32be(tmp, &regs->fmqm_pndc);
  47578. +
  47579. + return 0;
  47580. +}
  47581. +
  47582. +static void get_rx_stats_reg(struct fman_port *port,
  47583. + enum fman_port_stats_counters counter,
  47584. + uint32_t **stats_reg)
  47585. +{
  47586. + struct fman_port_rx_bmi_regs *regs = &port->bmi_regs->rx;
  47587. +
  47588. + switch (counter) {
  47589. + case E_FMAN_PORT_STATS_CNT_FRAME:
  47590. + *stats_reg = &regs->fmbm_rfrc;
  47591. + break;
  47592. + case E_FMAN_PORT_STATS_CNT_DISCARD:
  47593. + *stats_reg = &regs->fmbm_rfdc;
  47594. + break;
  47595. + case E_FMAN_PORT_STATS_CNT_DEALLOC_BUF:
  47596. + *stats_reg = &regs->fmbm_rbdc;
  47597. + break;
  47598. + case E_FMAN_PORT_STATS_CNT_RX_BAD_FRAME:
  47599. + *stats_reg = &regs->fmbm_rfbc;
  47600. + break;
  47601. + case E_FMAN_PORT_STATS_CNT_RX_LARGE_FRAME:
  47602. + *stats_reg = &regs->fmbm_rlfc;
  47603. + break;
  47604. + case E_FMAN_PORT_STATS_CNT_RX_OUT_OF_BUF:
  47605. + *stats_reg = &regs->fmbm_rodc;
  47606. + break;
  47607. + case E_FMAN_PORT_STATS_CNT_FILTERED_FRAME:
  47608. + *stats_reg = &regs->fmbm_rffc;
  47609. + break;
  47610. + case E_FMAN_PORT_STATS_CNT_DMA_ERR:
  47611. + *stats_reg = &regs->fmbm_rfldec;
  47612. + break;
  47613. + default:
  47614. + *stats_reg = NULL;
  47615. + }
  47616. +}
  47617. +
  47618. +static void get_tx_stats_reg(struct fman_port *port,
  47619. + enum fman_port_stats_counters counter,
  47620. + uint32_t **stats_reg)
  47621. +{
  47622. + struct fman_port_tx_bmi_regs *regs = &port->bmi_regs->tx;
  47623. +
  47624. + switch (counter) {
  47625. + case E_FMAN_PORT_STATS_CNT_FRAME:
  47626. + *stats_reg = &regs->fmbm_tfrc;
  47627. + break;
  47628. + case E_FMAN_PORT_STATS_CNT_DISCARD:
  47629. + *stats_reg = &regs->fmbm_tfdc;
  47630. + break;
  47631. + case E_FMAN_PORT_STATS_CNT_DEALLOC_BUF:
  47632. + *stats_reg = &regs->fmbm_tbdc;
  47633. + break;
  47634. + case E_FMAN_PORT_STATS_CNT_LEN_ERR:
  47635. + *stats_reg = &regs->fmbm_tfledc;
  47636. + break;
  47637. + case E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT:
  47638. + *stats_reg = &regs->fmbm_tfufdc;
  47639. + break;
  47640. + default:
  47641. + *stats_reg = NULL;
  47642. + }
  47643. +}
  47644. +
  47645. +static void get_oh_stats_reg(struct fman_port *port,
  47646. + enum fman_port_stats_counters counter,
  47647. + uint32_t **stats_reg)
  47648. +{
  47649. + struct fman_port_oh_bmi_regs *regs = &port->bmi_regs->oh;
  47650. +
  47651. + switch (counter) {
  47652. + case E_FMAN_PORT_STATS_CNT_FRAME:
  47653. + *stats_reg = &regs->fmbm_ofrc;
  47654. + break;
  47655. + case E_FMAN_PORT_STATS_CNT_DISCARD:
  47656. + *stats_reg = &regs->fmbm_ofdc;
  47657. + break;
  47658. + case E_FMAN_PORT_STATS_CNT_DEALLOC_BUF:
  47659. + *stats_reg = &regs->fmbm_obdc;
  47660. + break;
  47661. + case E_FMAN_PORT_STATS_CNT_FILTERED_FRAME:
  47662. + *stats_reg = &regs->fmbm_offc;
  47663. + break;
  47664. + case E_FMAN_PORT_STATS_CNT_DMA_ERR:
  47665. + *stats_reg = &regs->fmbm_ofldec;
  47666. + break;
  47667. + case E_FMAN_PORT_STATS_CNT_LEN_ERR:
  47668. + *stats_reg = &regs->fmbm_ofledc;
  47669. + break;
  47670. + case E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT:
  47671. + *stats_reg = &regs->fmbm_ofufdc;
  47672. + break;
  47673. + case E_FMAN_PORT_STATS_CNT_WRED_DISCARD:
  47674. + *stats_reg = &regs->fmbm_ofwdc;
  47675. + break;
  47676. + default:
  47677. + *stats_reg = NULL;
  47678. + }
  47679. +}
  47680. +
  47681. +static void get_rx_perf_reg(struct fman_port *port,
  47682. + enum fman_port_perf_counters counter,
  47683. + uint32_t **perf_reg)
  47684. +{
  47685. + struct fman_port_rx_bmi_regs *regs = &port->bmi_regs->rx;
  47686. +
  47687. + switch (counter) {
  47688. + case E_FMAN_PORT_PERF_CNT_CYCLE:
  47689. + *perf_reg = &regs->fmbm_rccn;
  47690. + break;
  47691. + case E_FMAN_PORT_PERF_CNT_TASK_UTIL:
  47692. + *perf_reg = &regs->fmbm_rtuc;
  47693. + break;
  47694. + case E_FMAN_PORT_PERF_CNT_QUEUE_UTIL:
  47695. + *perf_reg = &regs->fmbm_rrquc;
  47696. + break;
  47697. + case E_FMAN_PORT_PERF_CNT_DMA_UTIL:
  47698. + *perf_reg = &regs->fmbm_rduc;
  47699. + break;
  47700. + case E_FMAN_PORT_PERF_CNT_FIFO_UTIL:
  47701. + *perf_reg = &regs->fmbm_rfuc;
  47702. + break;
  47703. + case E_FMAN_PORT_PERF_CNT_RX_PAUSE:
  47704. + *perf_reg = &regs->fmbm_rpac;
  47705. + break;
  47706. + default:
  47707. + *perf_reg = NULL;
  47708. + }
  47709. +}
  47710. +
  47711. +static void get_tx_perf_reg(struct fman_port *port,
  47712. + enum fman_port_perf_counters counter,
  47713. + uint32_t **perf_reg)
  47714. +{
  47715. + struct fman_port_tx_bmi_regs *regs = &port->bmi_regs->tx;
  47716. +
  47717. + switch (counter) {
  47718. + case E_FMAN_PORT_PERF_CNT_CYCLE:
  47719. + *perf_reg = &regs->fmbm_tccn;
  47720. + break;
  47721. + case E_FMAN_PORT_PERF_CNT_TASK_UTIL:
  47722. + *perf_reg = &regs->fmbm_ttuc;
  47723. + break;
  47724. + case E_FMAN_PORT_PERF_CNT_QUEUE_UTIL:
  47725. + *perf_reg = &regs->fmbm_ttcquc;
  47726. + break;
  47727. + case E_FMAN_PORT_PERF_CNT_DMA_UTIL:
  47728. + *perf_reg = &regs->fmbm_tduc;
  47729. + break;
  47730. + case E_FMAN_PORT_PERF_CNT_FIFO_UTIL:
  47731. + *perf_reg = &regs->fmbm_tfuc;
  47732. + break;
  47733. + default:
  47734. + *perf_reg = NULL;
  47735. + }
  47736. +}
  47737. +
  47738. +static void get_oh_perf_reg(struct fman_port *port,
  47739. + enum fman_port_perf_counters counter,
  47740. + uint32_t **perf_reg)
  47741. +{
  47742. + struct fman_port_oh_bmi_regs *regs = &port->bmi_regs->oh;
  47743. +
  47744. + switch (counter) {
  47745. + case E_FMAN_PORT_PERF_CNT_CYCLE:
  47746. + *perf_reg = &regs->fmbm_occn;
  47747. + break;
  47748. + case E_FMAN_PORT_PERF_CNT_TASK_UTIL:
  47749. + *perf_reg = &regs->fmbm_otuc;
  47750. + break;
  47751. + case E_FMAN_PORT_PERF_CNT_DMA_UTIL:
  47752. + *perf_reg = &regs->fmbm_oduc;
  47753. + break;
  47754. + case E_FMAN_PORT_PERF_CNT_FIFO_UTIL:
  47755. + *perf_reg = &regs->fmbm_ofuc;
  47756. + break;
  47757. + default:
  47758. + *perf_reg = NULL;
  47759. + }
  47760. +}
  47761. +
  47762. +static void get_qmi_counter_reg(struct fman_port *port,
  47763. + enum fman_port_qmi_counters counter,
  47764. + uint32_t **queue_reg)
  47765. +{
  47766. + struct fman_port_qmi_regs *regs = port->qmi_regs;
  47767. +
  47768. + switch (counter) {
  47769. + case E_FMAN_PORT_ENQ_TOTAL:
  47770. + *queue_reg = &regs->fmqm_pnetfc;
  47771. + break;
  47772. + case E_FMAN_PORT_DEQ_TOTAL:
  47773. + if ((port->type == E_FMAN_PORT_TYPE_RX) ||
  47774. + (port->type == E_FMAN_PORT_TYPE_RX_10G))
  47775. + /* Counter not available for Rx ports */
  47776. + *queue_reg = NULL;
  47777. + else
  47778. + *queue_reg = &regs->fmqm_pndtfc;
  47779. + break;
  47780. + case E_FMAN_PORT_DEQ_FROM_DFLT:
  47781. + if ((port->type == E_FMAN_PORT_TYPE_RX) ||
  47782. + (port->type == E_FMAN_PORT_TYPE_RX_10G))
  47783. + /* Counter not available for Rx ports */
  47784. + *queue_reg = NULL;
  47785. + else
  47786. + *queue_reg = &regs->fmqm_pndfdc;
  47787. + break;
  47788. + case E_FMAN_PORT_DEQ_CONFIRM:
  47789. + if ((port->type == E_FMAN_PORT_TYPE_RX) ||
  47790. + (port->type == E_FMAN_PORT_TYPE_RX_10G))
  47791. + /* Counter not available for Rx ports */
  47792. + *queue_reg = NULL;
  47793. + else
  47794. + *queue_reg = &regs->fmqm_pndcc;
  47795. + break;
  47796. + default:
  47797. + *queue_reg = NULL;
  47798. + }
  47799. +}
  47800. +
  47801. +void fman_port_defconfig(struct fman_port_cfg *cfg, enum fman_port_type type)
  47802. +{
  47803. + cfg->dma_swap_data = E_FMAN_PORT_DMA_NO_SWAP;
  47804. + cfg->dma_ic_stash_on = FALSE;
  47805. + cfg->dma_header_stash_on = FALSE;
  47806. + cfg->dma_sg_stash_on = FALSE;
  47807. + cfg->dma_write_optimize = TRUE;
  47808. + cfg->color = E_FMAN_PORT_COLOR_GREEN;
  47809. + cfg->discard_override = FALSE;
  47810. + cfg->checksum_bytes_ignore = 0;
  47811. + cfg->rx_cut_end_bytes = 4;
  47812. + cfg->rx_pri_elevation = ((0x3FF + 1) * FMAN_PORT_BMI_FIFO_UNITS);
  47813. + cfg->rx_fifo_thr = ((0x3FF + 1) * FMAN_PORT_BMI_FIFO_UNITS);
  47814. + cfg->rx_fd_bits = 0;
  47815. + cfg->ic_ext_offset = 0;
  47816. + cfg->ic_int_offset = 0;
  47817. + cfg->ic_size = 0;
  47818. + cfg->int_buf_start_margin = 0;
  47819. + cfg->ext_buf_start_margin = 0;
  47820. + cfg->ext_buf_end_margin = 0;
  47821. + cfg->tx_fifo_min_level = 0;
  47822. + cfg->tx_fifo_low_comf_level = (5 * KILOBYTE);
  47823. + cfg->stats_counters_enable = TRUE;
  47824. + cfg->perf_counters_enable = TRUE;
  47825. + cfg->deq_type = E_FMAN_PORT_DEQ_BY_PRI;
  47826. +
  47827. + if (type == E_FMAN_PORT_TYPE_HC) {
  47828. + cfg->sync_req = FALSE;
  47829. + cfg->deq_prefetch_opt = E_FMAN_PORT_DEQ_NO_PREFETCH;
  47830. + } else {
  47831. + cfg->sync_req = TRUE;
  47832. + cfg->deq_prefetch_opt = E_FMAN_PORT_DEQ_FULL_PREFETCH;
  47833. + }
  47834. +
  47835. + if (type == E_FMAN_PORT_TYPE_TX_10G) {
  47836. + cfg->tx_fifo_deq_pipeline_depth = 4;
  47837. + cfg->deq_high_pri = TRUE;
  47838. + cfg->deq_byte_cnt = 0x1400;
  47839. + } else {
  47840. + if ((type == E_FMAN_PORT_TYPE_HC) ||
  47841. + (type == E_FMAN_PORT_TYPE_OP))
  47842. + cfg->tx_fifo_deq_pipeline_depth = 2;
  47843. + else
  47844. + cfg->tx_fifo_deq_pipeline_depth = 1;
  47845. +
  47846. + cfg->deq_high_pri = FALSE;
  47847. + cfg->deq_byte_cnt = 0x400;
  47848. + }
  47849. + cfg->no_scatter_gather = DEFAULT_FMAN_SP_NO_SCATTER_GATHER;
  47850. +}
  47851. +
  47852. +static uint8_t fman_port_find_bpool(struct fman_port *port, uint8_t bpid)
  47853. +{
  47854. + uint32_t *bp_reg, tmp;
  47855. + uint8_t i, id;
  47856. +
  47857. + /* Find the pool */
  47858. + bp_reg = port->bmi_regs->rx.fmbm_ebmpi;
  47859. + for (i = 0;
  47860. + (i < port->ext_pools_num && (i < FMAN_PORT_MAX_EXT_POOLS_NUM));
  47861. + i++) {
  47862. + tmp = ioread32be(&bp_reg[i]);
  47863. + id = (uint8_t)((tmp & BMI_EXT_BUF_POOL_ID_MASK) >>
  47864. + BMI_EXT_BUF_POOL_ID_SHIFT);
  47865. +
  47866. + if (id == bpid)
  47867. + break;
  47868. + }
  47869. +
  47870. + return i;
  47871. +}
  47872. +
  47873. +int fman_port_init(struct fman_port *port,
  47874. + struct fman_port_cfg *cfg,
  47875. + struct fman_port_params *params)
  47876. +{
  47877. + int err;
  47878. +
  47879. + /* Init BMI registers */
  47880. + switch (port->type) {
  47881. + case E_FMAN_PORT_TYPE_RX:
  47882. + case E_FMAN_PORT_TYPE_RX_10G:
  47883. + err = init_bmi_rx(port, cfg, params);
  47884. + break;
  47885. + case E_FMAN_PORT_TYPE_TX:
  47886. + case E_FMAN_PORT_TYPE_TX_10G:
  47887. + err = init_bmi_tx(port, cfg, params);
  47888. + break;
  47889. + case E_FMAN_PORT_TYPE_OP:
  47890. + case E_FMAN_PORT_TYPE_HC:
  47891. + err = init_bmi_oh(port, cfg, params);
  47892. + break;
  47893. + default:
  47894. + return -EINVAL;
  47895. + }
  47896. +
  47897. + if (err)
  47898. + return err;
  47899. +
  47900. + /* Init QMI registers */
  47901. + if (!port->im_en)
  47902. + {
  47903. + err = init_qmi(port, cfg, params);
  47904. + return err;
  47905. + }
  47906. + return 0;
  47907. +}
  47908. +
  47909. +int fman_port_enable(struct fman_port *port)
  47910. +{
  47911. + uint32_t *bmi_cfg_reg, tmp;
  47912. + bool rx_port;
  47913. +
  47914. + switch (port->type) {
  47915. + case E_FMAN_PORT_TYPE_RX:
  47916. + case E_FMAN_PORT_TYPE_RX_10G:
  47917. + bmi_cfg_reg = &port->bmi_regs->rx.fmbm_rcfg;
  47918. + rx_port = TRUE;
  47919. + break;
  47920. + case E_FMAN_PORT_TYPE_TX:
  47921. + case E_FMAN_PORT_TYPE_TX_10G:
  47922. + bmi_cfg_reg = &port->bmi_regs->tx.fmbm_tcfg;
  47923. + rx_port = FALSE;
  47924. + break;
  47925. + case E_FMAN_PORT_TYPE_OP:
  47926. + case E_FMAN_PORT_TYPE_HC:
  47927. + bmi_cfg_reg = &port->bmi_regs->oh.fmbm_ocfg;
  47928. + rx_port = FALSE;
  47929. + break;
  47930. + default:
  47931. + return -EINVAL;
  47932. + }
  47933. +
  47934. + /* Enable QMI */
  47935. + if (!rx_port) {
  47936. + tmp = ioread32be(&port->qmi_regs->fmqm_pnc) | QMI_PORT_CFG_EN;
  47937. + iowrite32be(tmp, &port->qmi_regs->fmqm_pnc);
  47938. + }
  47939. +
  47940. + /* Enable BMI */
  47941. + tmp = ioread32be(bmi_cfg_reg) | BMI_PORT_CFG_EN;
  47942. + iowrite32be(tmp, bmi_cfg_reg);
  47943. +
  47944. + return 0;
  47945. +}
  47946. +
  47947. +int fman_port_disable(const struct fman_port *port)
  47948. +{
  47949. + uint32_t *bmi_cfg_reg, *bmi_status_reg, tmp;
  47950. + bool rx_port, failure = FALSE;
  47951. + int count;
  47952. +
  47953. + switch (port->type) {
  47954. + case E_FMAN_PORT_TYPE_RX:
  47955. + case E_FMAN_PORT_TYPE_RX_10G:
  47956. + bmi_cfg_reg = &port->bmi_regs->rx.fmbm_rcfg;
  47957. + bmi_status_reg = &port->bmi_regs->rx.fmbm_rst;
  47958. + rx_port = TRUE;
  47959. + break;
  47960. + case E_FMAN_PORT_TYPE_TX:
  47961. + case E_FMAN_PORT_TYPE_TX_10G:
  47962. + bmi_cfg_reg = &port->bmi_regs->tx.fmbm_tcfg;
  47963. + bmi_status_reg = &port->bmi_regs->tx.fmbm_tst;
  47964. + rx_port = FALSE;
  47965. + break;
  47966. + case E_FMAN_PORT_TYPE_OP:
  47967. + case E_FMAN_PORT_TYPE_HC:
  47968. + bmi_cfg_reg = &port->bmi_regs->oh.fmbm_ocfg;
  47969. + bmi_status_reg = &port->bmi_regs->oh.fmbm_ost;
  47970. + rx_port = FALSE;
  47971. + break;
  47972. + default:
  47973. + return -EINVAL;
  47974. + }
  47975. +
  47976. + /* Disable QMI */
  47977. + if (!rx_port) {
  47978. + tmp = ioread32be(&port->qmi_regs->fmqm_pnc) & ~QMI_PORT_CFG_EN;
  47979. + iowrite32be(tmp, &port->qmi_regs->fmqm_pnc);
  47980. +
  47981. + /* Wait for QMI to finish FD handling */
  47982. + count = 100;
  47983. + do {
  47984. + udelay(10);
  47985. + tmp = ioread32be(&port->qmi_regs->fmqm_pns);
  47986. + } while ((tmp & QMI_PORT_STATUS_DEQ_FD_BSY) && --count);
  47987. +
  47988. + if (count == 0)
  47989. + {
  47990. + /* Timeout */
  47991. + failure = TRUE;
  47992. + }
  47993. + }
  47994. +
  47995. + /* Disable BMI */
  47996. + tmp = ioread32be(bmi_cfg_reg) & ~BMI_PORT_CFG_EN;
  47997. + iowrite32be(tmp, bmi_cfg_reg);
  47998. +
  47999. + /* Wait for graceful stop end */
  48000. + count = 500;
  48001. + do {
  48002. + udelay(10);
  48003. + tmp = ioread32be(bmi_status_reg);
  48004. + } while ((tmp & BMI_PORT_STATUS_BSY) && --count);
  48005. +
  48006. + if (count == 0)
  48007. + {
  48008. + /* Timeout */
  48009. + failure = TRUE;
  48010. + }
  48011. +
  48012. + if (failure)
  48013. + return -EBUSY;
  48014. +
  48015. + return 0;
  48016. +}
  48017. +
  48018. +int fman_port_set_bpools(const struct fman_port *port,
  48019. + const struct fman_port_bpools *bp)
  48020. +{
  48021. + uint32_t tmp, *bp_reg, *bp_depl_reg;
  48022. + uint8_t i, max_bp_num;
  48023. + bool grp_depl_used = FALSE, rx_port;
  48024. +
  48025. + switch (port->type) {
  48026. + case E_FMAN_PORT_TYPE_RX:
  48027. + case E_FMAN_PORT_TYPE_RX_10G:
  48028. + max_bp_num = port->ext_pools_num;
  48029. + rx_port = TRUE;
  48030. + bp_reg = port->bmi_regs->rx.fmbm_ebmpi;
  48031. + bp_depl_reg = &port->bmi_regs->rx.fmbm_mpd;
  48032. + break;
  48033. + case E_FMAN_PORT_TYPE_OP:
  48034. + if (port->fm_rev_maj != 4)
  48035. + return -EINVAL;
  48036. + max_bp_num = FMAN_PORT_OBS_EXT_POOLS_NUM;
  48037. + rx_port = FALSE;
  48038. + bp_reg = port->bmi_regs->oh.fmbm_oebmpi;
  48039. + bp_depl_reg = &port->bmi_regs->oh.fmbm_ompd;
  48040. + break;
  48041. + default:
  48042. + return -EINVAL;
  48043. + }
  48044. +
  48045. + if (rx_port) {
  48046. + /* Check buffers are provided in ascending order */
  48047. + for (i = 0;
  48048. + (i < (bp->count-1) && (i < FMAN_PORT_MAX_EXT_POOLS_NUM - 1));
  48049. + i++) {
  48050. + if (bp->bpool[i].size > bp->bpool[i+1].size)
  48051. + return -EINVAL;
  48052. + }
  48053. + }
  48054. +
  48055. + /* Set up external buffers pools */
  48056. + for (i = 0; i < bp->count; i++) {
  48057. + tmp = BMI_EXT_BUF_POOL_VALID;
  48058. + tmp |= ((uint32_t)bp->bpool[i].bpid <<
  48059. + BMI_EXT_BUF_POOL_ID_SHIFT) & BMI_EXT_BUF_POOL_ID_MASK;
  48060. +
  48061. + if (rx_port) {
  48062. + if (bp->counters_enable)
  48063. + tmp |= BMI_EXT_BUF_POOL_EN_COUNTER;
  48064. +
  48065. + if (bp->bpool[i].is_backup)
  48066. + tmp |= BMI_EXT_BUF_POOL_BACKUP;
  48067. +
  48068. + tmp |= (uint32_t)bp->bpool[i].size;
  48069. + }
  48070. +
  48071. + iowrite32be(tmp, &bp_reg[i]);
  48072. + }
  48073. +
  48074. + /* Clear unused pools */
  48075. + for (i = bp->count; i < max_bp_num; i++)
  48076. + iowrite32be(0, &bp_reg[i]);
  48077. +
  48078. + /* Pools depletion */
  48079. + tmp = 0;
  48080. + for (i = 0; i < FMAN_PORT_MAX_EXT_POOLS_NUM; i++) {
  48081. + if (bp->bpool[i].grp_bp_depleted) {
  48082. + grp_depl_used = TRUE;
  48083. + tmp |= 0x80000000 >> i;
  48084. + }
  48085. +
  48086. + if (bp->bpool[i].single_bp_depleted)
  48087. + tmp |= 0x80 >> i;
  48088. +
  48089. + if (bp->bpool[i].pfc_priorities_en)
  48090. + tmp |= 0x0100 << i;
  48091. + }
  48092. +
  48093. + if (grp_depl_used)
  48094. + tmp |= ((uint32_t)bp->grp_bp_depleted_num - 1) <<
  48095. + BMI_POOL_DEP_NUM_OF_POOLS_SHIFT;
  48096. +
  48097. + iowrite32be(tmp, bp_depl_reg);
  48098. + return 0;
  48099. +}
  48100. +
  48101. +int fman_port_set_rate_limiter(struct fman_port *port,
  48102. + struct fman_port_rate_limiter *rate_limiter)
  48103. +{
  48104. + uint32_t *rate_limit_reg, *rate_limit_scale_reg;
  48105. + uint32_t granularity, tmp;
  48106. + uint8_t usec_bit, factor;
  48107. +
  48108. + switch (port->type) {
  48109. + case E_FMAN_PORT_TYPE_TX:
  48110. + case E_FMAN_PORT_TYPE_TX_10G:
  48111. + rate_limit_reg = &port->bmi_regs->tx.fmbm_trlmt;
  48112. + rate_limit_scale_reg = &port->bmi_regs->tx.fmbm_trlmts;
  48113. + granularity = BMI_RATE_LIMIT_GRAN_TX;
  48114. + break;
  48115. + case E_FMAN_PORT_TYPE_OP:
  48116. + rate_limit_reg = &port->bmi_regs->oh.fmbm_orlmt;
  48117. + rate_limit_scale_reg = &port->bmi_regs->oh.fmbm_orlmts;
  48118. + granularity = BMI_RATE_LIMIT_GRAN_OP;
  48119. + break;
  48120. + default:
  48121. + return -EINVAL;
  48122. + }
  48123. +
  48124. + /* Factor is per 1 usec count */
  48125. + factor = 1;
  48126. + usec_bit = rate_limiter->count_1micro_bit;
  48127. +
  48128. + /* If rate limit is too small for an 1usec factor, adjust timestamp
  48129. + * scale and multiply the factor */
  48130. + while (rate_limiter->rate < (granularity / factor)) {
  48131. + if (usec_bit == 31)
  48132. + /* Can't configure rate limiter - rate is too small */
  48133. + return -EINVAL;
  48134. +
  48135. + usec_bit++;
  48136. + factor <<= 1;
  48137. + }
  48138. +
  48139. + /* Figure out register value. The "while" above quarantees that
  48140. + * (rate_limiter->rate * factor / granularity) >= 1 */
  48141. + tmp = (uint32_t)(rate_limiter->rate * factor / granularity - 1);
  48142. +
  48143. + /* Check rate limit isn't too large */
  48144. + if (tmp >= BMI_RATE_LIMIT_MAX_RATE_IN_GRAN_UNITS)
  48145. + return -EINVAL;
  48146. +
  48147. + /* Check burst size is in allowed range */
  48148. + if ((rate_limiter->burst_size == 0) ||
  48149. + (rate_limiter->burst_size >
  48150. + BMI_RATE_LIMIT_MAX_BURST_SIZE))
  48151. + return -EINVAL;
  48152. +
  48153. + tmp |= (uint32_t)(rate_limiter->burst_size - 1) <<
  48154. + BMI_RATE_LIMIT_MAX_BURST_SHIFT;
  48155. +
  48156. + if ((port->type == E_FMAN_PORT_TYPE_OP) &&
  48157. + (port->fm_rev_maj == 4)) {
  48158. + if (rate_limiter->high_burst_size_gran)
  48159. + tmp |= BMI_RATE_LIMIT_HIGH_BURST_SIZE_GRAN;
  48160. + }
  48161. +
  48162. + iowrite32be(tmp, rate_limit_reg);
  48163. +
  48164. + /* Set up rate limiter scale register */
  48165. + tmp = BMI_RATE_LIMIT_SCALE_EN;
  48166. + tmp |= (31 - (uint32_t)usec_bit) << BMI_RATE_LIMIT_SCALE_TSBS_SHIFT;
  48167. +
  48168. + if ((port->type == E_FMAN_PORT_TYPE_OP) &&
  48169. + (port->fm_rev_maj == 4))
  48170. + tmp |= rate_limiter->rate_factor;
  48171. +
  48172. + iowrite32be(tmp, rate_limit_scale_reg);
  48173. +
  48174. + return 0;
  48175. +}
  48176. +
  48177. +int fman_port_delete_rate_limiter(struct fman_port *port)
  48178. +{
  48179. + uint32_t *rate_limit_scale_reg;
  48180. +
  48181. + switch (port->type) {
  48182. + case E_FMAN_PORT_TYPE_TX:
  48183. + case E_FMAN_PORT_TYPE_TX_10G:
  48184. + rate_limit_scale_reg = &port->bmi_regs->tx.fmbm_trlmts;
  48185. + break;
  48186. + case E_FMAN_PORT_TYPE_OP:
  48187. + rate_limit_scale_reg = &port->bmi_regs->oh.fmbm_orlmts;
  48188. + break;
  48189. + default:
  48190. + return -EINVAL;
  48191. + }
  48192. +
  48193. + iowrite32be(0, rate_limit_scale_reg);
  48194. + return 0;
  48195. +}
  48196. +
  48197. +int fman_port_set_err_mask(struct fman_port *port, uint32_t err_mask)
  48198. +{
  48199. + uint32_t *err_mask_reg;
  48200. +
  48201. + /* Obtain register address */
  48202. + switch (port->type) {
  48203. + case E_FMAN_PORT_TYPE_RX:
  48204. + case E_FMAN_PORT_TYPE_RX_10G:
  48205. + err_mask_reg = &port->bmi_regs->rx.fmbm_rfsem;
  48206. + break;
  48207. + case E_FMAN_PORT_TYPE_OP:
  48208. + err_mask_reg = &port->bmi_regs->oh.fmbm_ofsem;
  48209. + break;
  48210. + default:
  48211. + return -EINVAL;
  48212. + }
  48213. +
  48214. + iowrite32be(err_mask, err_mask_reg);
  48215. + return 0;
  48216. +}
  48217. +
  48218. +int fman_port_set_discard_mask(struct fman_port *port, uint32_t discard_mask)
  48219. +{
  48220. + uint32_t *discard_mask_reg;
  48221. +
  48222. + /* Obtain register address */
  48223. + switch (port->type) {
  48224. + case E_FMAN_PORT_TYPE_RX:
  48225. + case E_FMAN_PORT_TYPE_RX_10G:
  48226. + discard_mask_reg = &port->bmi_regs->rx.fmbm_rfsdm;
  48227. + break;
  48228. + case E_FMAN_PORT_TYPE_OP:
  48229. + discard_mask_reg = &port->bmi_regs->oh.fmbm_ofsdm;
  48230. + break;
  48231. + default:
  48232. + return -EINVAL;
  48233. + }
  48234. +
  48235. + iowrite32be(discard_mask, discard_mask_reg);
  48236. + return 0;
  48237. +}
  48238. +
  48239. +int fman_port_modify_rx_fd_bits(struct fman_port *port,
  48240. + uint8_t rx_fd_bits,
  48241. + bool add)
  48242. +{
  48243. + uint32_t tmp;
  48244. +
  48245. + switch (port->type) {
  48246. + case E_FMAN_PORT_TYPE_RX:
  48247. + case E_FMAN_PORT_TYPE_RX_10G:
  48248. + break;
  48249. + default:
  48250. + return -EINVAL;
  48251. + }
  48252. +
  48253. + tmp = ioread32be(&port->bmi_regs->rx.fmbm_rfne);
  48254. +
  48255. + if (add)
  48256. + tmp |= (uint32_t)rx_fd_bits << BMI_NEXT_ENG_FD_BITS_SHIFT;
  48257. + else
  48258. + tmp &= ~((uint32_t)rx_fd_bits << BMI_NEXT_ENG_FD_BITS_SHIFT);
  48259. +
  48260. + iowrite32be(tmp, &port->bmi_regs->rx.fmbm_rfne);
  48261. + return 0;
  48262. +}
  48263. +
  48264. +int fman_port_set_perf_cnt_params(struct fman_port *port,
  48265. + struct fman_port_perf_cnt_params *params)
  48266. +{
  48267. + uint32_t *pcp_reg, tmp;
  48268. +
  48269. + /* Obtain register address and check parameters are in range */
  48270. + switch (port->type) {
  48271. + case E_FMAN_PORT_TYPE_RX:
  48272. + case E_FMAN_PORT_TYPE_RX_10G:
  48273. + pcp_reg = &port->bmi_regs->rx.fmbm_rpcp;
  48274. + if ((params->queue_val == 0) ||
  48275. + (params->queue_val > MAX_PERFORMANCE_RX_QUEUE_COMP))
  48276. + return -EINVAL;
  48277. + break;
  48278. + case E_FMAN_PORT_TYPE_TX:
  48279. + case E_FMAN_PORT_TYPE_TX_10G:
  48280. + pcp_reg = &port->bmi_regs->tx.fmbm_tpcp;
  48281. + if ((params->queue_val == 0) ||
  48282. + (params->queue_val > MAX_PERFORMANCE_TX_QUEUE_COMP))
  48283. + return -EINVAL;
  48284. + break;
  48285. + case E_FMAN_PORT_TYPE_OP:
  48286. + case E_FMAN_PORT_TYPE_HC:
  48287. + pcp_reg = &port->bmi_regs->oh.fmbm_opcp;
  48288. + if (params->queue_val != 0)
  48289. + return -EINVAL;
  48290. + break;
  48291. + default:
  48292. + return -EINVAL;
  48293. + }
  48294. +
  48295. + if ((params->task_val == 0) ||
  48296. + (params->task_val > MAX_PERFORMANCE_TASK_COMP))
  48297. + return -EINVAL;
  48298. + if ((params->dma_val == 0) ||
  48299. + (params->dma_val > MAX_PERFORMANCE_DMA_COMP))
  48300. + return -EINVAL;
  48301. + if ((params->fifo_val == 0) ||
  48302. + ((params->fifo_val / FMAN_PORT_BMI_FIFO_UNITS) >
  48303. + MAX_PERFORMANCE_FIFO_COMP))
  48304. + return -EINVAL;
  48305. + tmp = (uint32_t)(params->task_val - 1) <<
  48306. + BMI_PERFORMANCE_TASK_COMP_SHIFT;
  48307. + tmp |= (uint32_t)(params->dma_val - 1) <<
  48308. + BMI_PERFORMANCE_DMA_COMP_SHIFT;
  48309. + tmp |= (uint32_t)(params->fifo_val / FMAN_PORT_BMI_FIFO_UNITS - 1);
  48310. +
  48311. + switch (port->type) {
  48312. + case E_FMAN_PORT_TYPE_RX:
  48313. + case E_FMAN_PORT_TYPE_RX_10G:
  48314. + case E_FMAN_PORT_TYPE_TX:
  48315. + case E_FMAN_PORT_TYPE_TX_10G:
  48316. + tmp |= (uint32_t)(params->queue_val - 1) <<
  48317. + BMI_PERFORMANCE_QUEUE_COMP_SHIFT;
  48318. + break;
  48319. + default:
  48320. + break;
  48321. + }
  48322. +
  48323. +
  48324. + iowrite32be(tmp, pcp_reg);
  48325. + return 0;
  48326. +}
  48327. +
  48328. +int fman_port_set_stats_cnt_mode(struct fman_port *port, bool enable)
  48329. +{
  48330. + uint32_t *stats_reg, tmp;
  48331. +
  48332. + switch (port->type) {
  48333. + case E_FMAN_PORT_TYPE_RX:
  48334. + case E_FMAN_PORT_TYPE_RX_10G:
  48335. + stats_reg = &port->bmi_regs->rx.fmbm_rstc;
  48336. + break;
  48337. + case E_FMAN_PORT_TYPE_TX:
  48338. + case E_FMAN_PORT_TYPE_TX_10G:
  48339. + stats_reg = &port->bmi_regs->tx.fmbm_tstc;
  48340. + break;
  48341. + case E_FMAN_PORT_TYPE_OP:
  48342. + case E_FMAN_PORT_TYPE_HC:
  48343. + stats_reg = &port->bmi_regs->oh.fmbm_ostc;
  48344. + break;
  48345. + default:
  48346. + return -EINVAL;
  48347. + }
  48348. +
  48349. + tmp = ioread32be(stats_reg);
  48350. +
  48351. + if (enable)
  48352. + tmp |= BMI_COUNTERS_EN;
  48353. + else
  48354. + tmp &= ~BMI_COUNTERS_EN;
  48355. +
  48356. + iowrite32be(tmp, stats_reg);
  48357. + return 0;
  48358. +}
  48359. +
  48360. +int fman_port_set_perf_cnt_mode(struct fman_port *port, bool enable)
  48361. +{
  48362. + uint32_t *stats_reg, tmp;
  48363. +
  48364. + switch (port->type) {
  48365. + case E_FMAN_PORT_TYPE_RX:
  48366. + case E_FMAN_PORT_TYPE_RX_10G:
  48367. + stats_reg = &port->bmi_regs->rx.fmbm_rpc;
  48368. + break;
  48369. + case E_FMAN_PORT_TYPE_TX:
  48370. + case E_FMAN_PORT_TYPE_TX_10G:
  48371. + stats_reg = &port->bmi_regs->tx.fmbm_tpc;
  48372. + break;
  48373. + case E_FMAN_PORT_TYPE_OP:
  48374. + case E_FMAN_PORT_TYPE_HC:
  48375. + stats_reg = &port->bmi_regs->oh.fmbm_opc;
  48376. + break;
  48377. + default:
  48378. + return -EINVAL;
  48379. + }
  48380. +
  48381. + tmp = ioread32be(stats_reg);
  48382. +
  48383. + if (enable)
  48384. + tmp |= BMI_COUNTERS_EN;
  48385. + else
  48386. + tmp &= ~BMI_COUNTERS_EN;
  48387. +
  48388. + iowrite32be(tmp, stats_reg);
  48389. + return 0;
  48390. +}
  48391. +
  48392. +int fman_port_set_queue_cnt_mode(struct fman_port *port, bool enable)
  48393. +{
  48394. + uint32_t tmp;
  48395. +
  48396. + tmp = ioread32be(&port->qmi_regs->fmqm_pnc);
  48397. +
  48398. + if (enable)
  48399. + tmp |= QMI_PORT_CFG_EN_COUNTERS;
  48400. + else
  48401. + tmp &= ~QMI_PORT_CFG_EN_COUNTERS;
  48402. +
  48403. + iowrite32be(tmp, &port->qmi_regs->fmqm_pnc);
  48404. + return 0;
  48405. +}
  48406. +
  48407. +int fman_port_set_bpool_cnt_mode(struct fman_port *port,
  48408. + uint8_t bpid,
  48409. + bool enable)
  48410. +{
  48411. + uint8_t index;
  48412. + uint32_t tmp;
  48413. +
  48414. + switch (port->type) {
  48415. + case E_FMAN_PORT_TYPE_RX:
  48416. + case E_FMAN_PORT_TYPE_RX_10G:
  48417. + break;
  48418. + default:
  48419. + return -EINVAL;
  48420. + }
  48421. +
  48422. + /* Find the pool */
  48423. + index = fman_port_find_bpool(port, bpid);
  48424. + if (index == port->ext_pools_num || index == FMAN_PORT_MAX_EXT_POOLS_NUM)
  48425. + /* Not found */
  48426. + return -EINVAL;
  48427. +
  48428. + tmp = ioread32be(&port->bmi_regs->rx.fmbm_ebmpi[index]);
  48429. +
  48430. + if (enable)
  48431. + tmp |= BMI_EXT_BUF_POOL_EN_COUNTER;
  48432. + else
  48433. + tmp &= ~BMI_EXT_BUF_POOL_EN_COUNTER;
  48434. +
  48435. + iowrite32be(tmp, &port->bmi_regs->rx.fmbm_ebmpi[index]);
  48436. + return 0;
  48437. +}
  48438. +
  48439. +uint32_t fman_port_get_stats_counter(struct fman_port *port,
  48440. + enum fman_port_stats_counters counter)
  48441. +{
  48442. + uint32_t *stats_reg, ret_val;
  48443. +
  48444. + switch (port->type) {
  48445. + case E_FMAN_PORT_TYPE_RX:
  48446. + case E_FMAN_PORT_TYPE_RX_10G:
  48447. + get_rx_stats_reg(port, counter, &stats_reg);
  48448. + break;
  48449. + case E_FMAN_PORT_TYPE_TX:
  48450. + case E_FMAN_PORT_TYPE_TX_10G:
  48451. + get_tx_stats_reg(port, counter, &stats_reg);
  48452. + break;
  48453. + case E_FMAN_PORT_TYPE_OP:
  48454. + case E_FMAN_PORT_TYPE_HC:
  48455. + get_oh_stats_reg(port, counter, &stats_reg);
  48456. + break;
  48457. + default:
  48458. + stats_reg = NULL;
  48459. + }
  48460. +
  48461. + if (stats_reg == NULL)
  48462. + return 0;
  48463. +
  48464. + ret_val = ioread32be(stats_reg);
  48465. + return ret_val;
  48466. +}
  48467. +
  48468. +void fman_port_set_stats_counter(struct fman_port *port,
  48469. + enum fman_port_stats_counters counter,
  48470. + uint32_t value)
  48471. +{
  48472. + uint32_t *stats_reg;
  48473. +
  48474. + switch (port->type) {
  48475. + case E_FMAN_PORT_TYPE_RX:
  48476. + case E_FMAN_PORT_TYPE_RX_10G:
  48477. + get_rx_stats_reg(port, counter, &stats_reg);
  48478. + break;
  48479. + case E_FMAN_PORT_TYPE_TX:
  48480. + case E_FMAN_PORT_TYPE_TX_10G:
  48481. + get_tx_stats_reg(port, counter, &stats_reg);
  48482. + break;
  48483. + case E_FMAN_PORT_TYPE_OP:
  48484. + case E_FMAN_PORT_TYPE_HC:
  48485. + get_oh_stats_reg(port, counter, &stats_reg);
  48486. + break;
  48487. + default:
  48488. + stats_reg = NULL;
  48489. + }
  48490. +
  48491. + if (stats_reg == NULL)
  48492. + return;
  48493. +
  48494. + iowrite32be(value, stats_reg);
  48495. +}
  48496. +
  48497. +uint32_t fman_port_get_perf_counter(struct fman_port *port,
  48498. + enum fman_port_perf_counters counter)
  48499. +{
  48500. + uint32_t *perf_reg, ret_val;
  48501. +
  48502. + switch (port->type) {
  48503. + case E_FMAN_PORT_TYPE_RX:
  48504. + case E_FMAN_PORT_TYPE_RX_10G:
  48505. + get_rx_perf_reg(port, counter, &perf_reg);
  48506. + break;
  48507. + case E_FMAN_PORT_TYPE_TX:
  48508. + case E_FMAN_PORT_TYPE_TX_10G:
  48509. + get_tx_perf_reg(port, counter, &perf_reg);
  48510. + break;
  48511. + case E_FMAN_PORT_TYPE_OP:
  48512. + case E_FMAN_PORT_TYPE_HC:
  48513. + get_oh_perf_reg(port, counter, &perf_reg);
  48514. + break;
  48515. + default:
  48516. + perf_reg = NULL;
  48517. + }
  48518. +
  48519. + if (perf_reg == NULL)
  48520. + return 0;
  48521. +
  48522. + ret_val = ioread32be(perf_reg);
  48523. + return ret_val;
  48524. +}
  48525. +
  48526. +void fman_port_set_perf_counter(struct fman_port *port,
  48527. + enum fman_port_perf_counters counter,
  48528. + uint32_t value)
  48529. +{
  48530. + uint32_t *perf_reg;
  48531. +
  48532. + switch (port->type) {
  48533. + case E_FMAN_PORT_TYPE_RX:
  48534. + case E_FMAN_PORT_TYPE_RX_10G:
  48535. + get_rx_perf_reg(port, counter, &perf_reg);
  48536. + break;
  48537. + case E_FMAN_PORT_TYPE_TX:
  48538. + case E_FMAN_PORT_TYPE_TX_10G:
  48539. + get_tx_perf_reg(port, counter, &perf_reg);
  48540. + break;
  48541. + case E_FMAN_PORT_TYPE_OP:
  48542. + case E_FMAN_PORT_TYPE_HC:
  48543. + get_oh_perf_reg(port, counter, &perf_reg);
  48544. + break;
  48545. + default:
  48546. + perf_reg = NULL;
  48547. + }
  48548. +
  48549. + if (perf_reg == NULL)
  48550. + return;
  48551. +
  48552. + iowrite32be(value, perf_reg);
  48553. +}
  48554. +
  48555. +uint32_t fman_port_get_qmi_counter(struct fman_port *port,
  48556. + enum fman_port_qmi_counters counter)
  48557. +{
  48558. + uint32_t *queue_reg, ret_val;
  48559. +
  48560. + get_qmi_counter_reg(port, counter, &queue_reg);
  48561. +
  48562. + if (queue_reg == NULL)
  48563. + return 0;
  48564. +
  48565. + ret_val = ioread32be(queue_reg);
  48566. + return ret_val;
  48567. +}
  48568. +
  48569. +void fman_port_set_qmi_counter(struct fman_port *port,
  48570. + enum fman_port_qmi_counters counter,
  48571. + uint32_t value)
  48572. +{
  48573. + uint32_t *queue_reg;
  48574. +
  48575. + get_qmi_counter_reg(port, counter, &queue_reg);
  48576. +
  48577. + if (queue_reg == NULL)
  48578. + return;
  48579. +
  48580. + iowrite32be(value, queue_reg);
  48581. +}
  48582. +
  48583. +uint32_t fman_port_get_bpool_counter(struct fman_port *port, uint8_t bpid)
  48584. +{
  48585. + uint8_t index;
  48586. + uint32_t ret_val;
  48587. +
  48588. + switch (port->type) {
  48589. + case E_FMAN_PORT_TYPE_RX:
  48590. + case E_FMAN_PORT_TYPE_RX_10G:
  48591. + break;
  48592. + default:
  48593. + return 0;
  48594. + }
  48595. +
  48596. + /* Find the pool */
  48597. + index = fman_port_find_bpool(port, bpid);
  48598. + if (index == port->ext_pools_num || index == FMAN_PORT_MAX_EXT_POOLS_NUM)
  48599. + /* Not found */
  48600. + return 0;
  48601. +
  48602. + ret_val = ioread32be(&port->bmi_regs->rx.fmbm_acnt[index]);
  48603. + return ret_val;
  48604. +}
  48605. +
  48606. +void fman_port_set_bpool_counter(struct fman_port *port,
  48607. + uint8_t bpid,
  48608. + uint32_t value)
  48609. +{
  48610. + uint8_t index;
  48611. +
  48612. + switch (port->type) {
  48613. + case E_FMAN_PORT_TYPE_RX:
  48614. + case E_FMAN_PORT_TYPE_RX_10G:
  48615. + break;
  48616. + default:
  48617. + return;
  48618. + }
  48619. +
  48620. + /* Find the pool */
  48621. + index = fman_port_find_bpool(port, bpid);
  48622. + if (index == port->ext_pools_num || index == FMAN_PORT_MAX_EXT_POOLS_NUM)
  48623. + /* Not found */
  48624. + return;
  48625. +
  48626. + iowrite32be(value, &port->bmi_regs->rx.fmbm_acnt[index]);
  48627. +}
  48628. +
  48629. +int fman_port_add_congestion_grps(struct fman_port *port,
  48630. + uint32_t grps_map[FMAN_PORT_CG_MAP_NUM])
  48631. +{
  48632. + int i;
  48633. + uint32_t tmp, *grp_map_reg;
  48634. + uint8_t max_grp_map_num;
  48635. +
  48636. + switch (port->type) {
  48637. + case E_FMAN_PORT_TYPE_RX:
  48638. + case E_FMAN_PORT_TYPE_RX_10G:
  48639. + if (port->fm_rev_maj == 4)
  48640. + max_grp_map_num = 1;
  48641. + else
  48642. + max_grp_map_num = FMAN_PORT_CG_MAP_NUM;
  48643. + grp_map_reg = port->bmi_regs->rx.fmbm_rcgm;
  48644. + break;
  48645. + case E_FMAN_PORT_TYPE_OP:
  48646. + max_grp_map_num = 1;
  48647. + if (port->fm_rev_maj != 4)
  48648. + return -EINVAL;
  48649. + grp_map_reg = port->bmi_regs->oh.fmbm_ocgm;
  48650. + break;
  48651. + default:
  48652. + return -EINVAL;
  48653. + }
  48654. +
  48655. + for (i = (max_grp_map_num - 1); i >= 0; i--) {
  48656. + if (grps_map[i] == 0)
  48657. + continue;
  48658. + tmp = ioread32be(&grp_map_reg[i]);
  48659. + tmp |= grps_map[i];
  48660. + iowrite32be(tmp, &grp_map_reg[i]);
  48661. + }
  48662. +
  48663. + return 0;
  48664. +}
  48665. +
  48666. +int fman_port_remove_congestion_grps(struct fman_port *port,
  48667. + uint32_t grps_map[FMAN_PORT_CG_MAP_NUM])
  48668. +{
  48669. + int i;
  48670. + uint32_t tmp, *grp_map_reg;
  48671. + uint8_t max_grp_map_num;
  48672. +
  48673. + switch (port->type) {
  48674. + case E_FMAN_PORT_TYPE_RX:
  48675. + case E_FMAN_PORT_TYPE_RX_10G:
  48676. + if (port->fm_rev_maj == 4)
  48677. + max_grp_map_num = 1;
  48678. + else
  48679. + max_grp_map_num = FMAN_PORT_CG_MAP_NUM;
  48680. + grp_map_reg = port->bmi_regs->rx.fmbm_rcgm;
  48681. + break;
  48682. + case E_FMAN_PORT_TYPE_OP:
  48683. + max_grp_map_num = 1;
  48684. + if (port->fm_rev_maj != 4)
  48685. + return -EINVAL;
  48686. + grp_map_reg = port->bmi_regs->oh.fmbm_ocgm;
  48687. + break;
  48688. + default:
  48689. + return -EINVAL;
  48690. + }
  48691. +
  48692. + for (i = (max_grp_map_num - 1); i >= 0; i--) {
  48693. + if (grps_map[i] == 0)
  48694. + continue;
  48695. + tmp = ioread32be(&grp_map_reg[i]);
  48696. + tmp &= ~grps_map[i];
  48697. + iowrite32be(tmp, &grp_map_reg[i]);
  48698. + }
  48699. + return 0;
  48700. +}
  48701. --- /dev/null
  48702. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/Makefile
  48703. @@ -0,0 +1,15 @@
  48704. +#
  48705. +# Makefile for the Freescale Ethernet controllers
  48706. +#
  48707. +ccflags-y += -DVERSION=\"\"
  48708. +#
  48709. +#Include netcomm SW specific definitions
  48710. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  48711. +
  48712. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  48713. +
  48714. +ccflags-y += -I$(NCSW_FM_INC)
  48715. +
  48716. +obj-y += fsl-ncsw-RTC.o
  48717. +
  48718. +fsl-ncsw-RTC-objs := fm_rtc.o fman_rtc.o
  48719. --- /dev/null
  48720. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.c
  48721. @@ -0,0 +1,692 @@
  48722. +/*
  48723. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  48724. + *
  48725. + * Redistribution and use in source and binary forms, with or without
  48726. + * modification, are permitted provided that the following conditions are met:
  48727. + * * Redistributions of source code must retain the above copyright
  48728. + * notice, this list of conditions and the following disclaimer.
  48729. + * * Redistributions in binary form must reproduce the above copyright
  48730. + * notice, this list of conditions and the following disclaimer in the
  48731. + * documentation and/or other materials provided with the distribution.
  48732. + * * Neither the name of Freescale Semiconductor nor the
  48733. + * names of its contributors may be used to endorse or promote products
  48734. + * derived from this software without specific prior written permission.
  48735. + *
  48736. + *
  48737. + * ALTERNATIVELY, this software may be distributed under the terms of the
  48738. + * GNU General Public License ("GPL") as published by the Free Software
  48739. + * Foundation, either version 2 of that License or (at your option) any
  48740. + * later version.
  48741. + *
  48742. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  48743. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  48744. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  48745. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  48746. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  48747. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  48748. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  48749. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  48750. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  48751. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48752. + */
  48753. +
  48754. +
  48755. +/******************************************************************************
  48756. + @File fm_rtc.c
  48757. +
  48758. + @Description FM RTC driver implementation.
  48759. +
  48760. + @Cautions None
  48761. +*//***************************************************************************/
  48762. +
  48763. +#include "error_ext.h"
  48764. +#include "debug_ext.h"
  48765. +#include "string_ext.h"
  48766. +#include "part_ext.h"
  48767. +#include "xx_ext.h"
  48768. +#include "ncsw_ext.h"
  48769. +
  48770. +#include "fm_rtc.h"
  48771. +#include "fm_common.h"
  48772. +
  48773. +
  48774. +
  48775. +/*****************************************************************************/
  48776. +static t_Error CheckInitParameters(t_FmRtc *p_Rtc)
  48777. +{
  48778. + struct rtc_cfg *p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
  48779. + int i;
  48780. +
  48781. + if ((p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL) &&
  48782. + (p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_SYSTEM) &&
  48783. + (p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR))
  48784. + RETURN_ERROR(MAJOR, E_INVALID_CLOCK, ("Source clock undefined"));
  48785. +
  48786. + if (p_Rtc->outputClockDivisor == 0)
  48787. + {
  48788. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  48789. + ("Divisor for output clock (should be positive)"));
  48790. + }
  48791. +
  48792. + for (i=0; i < FM_RTC_NUM_OF_ALARMS; i++)
  48793. + {
  48794. + if ((p_RtcDriverParam->alarm_polarity[i] != E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW) &&
  48795. + (p_RtcDriverParam->alarm_polarity[i] != E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH))
  48796. + {
  48797. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm %d signal polarity", i));
  48798. + }
  48799. + }
  48800. + for (i=0; i < FM_RTC_NUM_OF_EXT_TRIGGERS; i++)
  48801. + {
  48802. + if ((p_RtcDriverParam->trigger_polarity[i] != E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE) &&
  48803. + (p_RtcDriverParam->trigger_polarity[i] != E_FMAN_RTC_TRIGGER_ON_RISING_EDGE))
  48804. + {
  48805. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Trigger %d signal polarity", i));
  48806. + }
  48807. + }
  48808. +
  48809. + return E_OK;
  48810. +}
  48811. +
  48812. +/*****************************************************************************/
  48813. +static void RtcExceptions(t_Handle h_FmRtc)
  48814. +{
  48815. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  48816. + struct rtc_regs *p_MemMap;
  48817. + register uint32_t events;
  48818. +
  48819. + ASSERT_COND(p_Rtc);
  48820. + p_MemMap = p_Rtc->p_MemMap;
  48821. +
  48822. + events = fman_rtc_check_and_clear_event(p_MemMap);
  48823. + if (events & FMAN_RTC_TMR_TEVENT_ALM1)
  48824. + {
  48825. + if (p_Rtc->alarmParams[0].clearOnExpiration)
  48826. + {
  48827. + fman_rtc_set_timer_alarm_l(p_MemMap, 0, 0);
  48828. + fman_rtc_disable_interupt(p_MemMap, FMAN_RTC_TMR_TEVENT_ALM1);
  48829. + }
  48830. + ASSERT_COND(p_Rtc->alarmParams[0].f_AlarmCallback);
  48831. + p_Rtc->alarmParams[0].f_AlarmCallback(p_Rtc->h_App, 0);
  48832. + }
  48833. + if (events & FMAN_RTC_TMR_TEVENT_ALM2)
  48834. + {
  48835. + if (p_Rtc->alarmParams[1].clearOnExpiration)
  48836. + {
  48837. + fman_rtc_set_timer_alarm_l(p_MemMap, 1, 0);
  48838. + fman_rtc_disable_interupt(p_MemMap, FMAN_RTC_TMR_TEVENT_ALM2);
  48839. + }
  48840. + ASSERT_COND(p_Rtc->alarmParams[1].f_AlarmCallback);
  48841. + p_Rtc->alarmParams[1].f_AlarmCallback(p_Rtc->h_App, 1);
  48842. + }
  48843. + if (events & FMAN_RTC_TMR_TEVENT_PP1)
  48844. + {
  48845. + ASSERT_COND(p_Rtc->periodicPulseParams[0].f_PeriodicPulseCallback);
  48846. + p_Rtc->periodicPulseParams[0].f_PeriodicPulseCallback(p_Rtc->h_App, 0);
  48847. + }
  48848. + if (events & FMAN_RTC_TMR_TEVENT_PP2)
  48849. + {
  48850. + ASSERT_COND(p_Rtc->periodicPulseParams[1].f_PeriodicPulseCallback);
  48851. + p_Rtc->periodicPulseParams[1].f_PeriodicPulseCallback(p_Rtc->h_App, 1);
  48852. + }
  48853. + if (events & FMAN_RTC_TMR_TEVENT_ETS1)
  48854. + {
  48855. + ASSERT_COND(p_Rtc->externalTriggerParams[0].f_ExternalTriggerCallback);
  48856. + p_Rtc->externalTriggerParams[0].f_ExternalTriggerCallback(p_Rtc->h_App, 0);
  48857. + }
  48858. + if (events & FMAN_RTC_TMR_TEVENT_ETS2)
  48859. + {
  48860. + ASSERT_COND(p_Rtc->externalTriggerParams[1].f_ExternalTriggerCallback);
  48861. + p_Rtc->externalTriggerParams[1].f_ExternalTriggerCallback(p_Rtc->h_App, 1);
  48862. + }
  48863. +}
  48864. +
  48865. +
  48866. +/*****************************************************************************/
  48867. +t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam)
  48868. +{
  48869. + t_FmRtc *p_Rtc;
  48870. +
  48871. + SANITY_CHECK_RETURN_VALUE(p_FmRtcParam, E_NULL_POINTER, NULL);
  48872. +
  48873. + /* Allocate memory for the FM RTC driver parameters */
  48874. + p_Rtc = (t_FmRtc *)XX_Malloc(sizeof(t_FmRtc));
  48875. + if (!p_Rtc)
  48876. + {
  48877. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM RTC driver structure"));
  48878. + return NULL;
  48879. + }
  48880. +
  48881. + memset(p_Rtc, 0, sizeof(t_FmRtc));
  48882. +
  48883. + /* Allocate memory for the FM RTC driver parameters */
  48884. + p_Rtc->p_RtcDriverParam = (struct rtc_cfg *)XX_Malloc(sizeof(struct rtc_cfg));
  48885. + if (!p_Rtc->p_RtcDriverParam)
  48886. + {
  48887. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM RTC driver parameters"));
  48888. + XX_Free(p_Rtc);
  48889. + return NULL;
  48890. + }
  48891. +
  48892. + memset(p_Rtc->p_RtcDriverParam, 0, sizeof(struct rtc_cfg));
  48893. +
  48894. + /* Store RTC configuration parameters */
  48895. + p_Rtc->h_Fm = p_FmRtcParam->h_Fm;
  48896. +
  48897. + /* Set default RTC configuration parameters */
  48898. + fman_rtc_defconfig(p_Rtc->p_RtcDriverParam);
  48899. +
  48900. + p_Rtc->outputClockDivisor = DEFAULT_OUTPUT_CLOCK_DIVISOR;
  48901. + p_Rtc->p_RtcDriverParam->bypass = DEFAULT_BYPASS;
  48902. + p_Rtc->clockPeriodNanoSec = DEFAULT_CLOCK_PERIOD; /* 1 usec */
  48903. +
  48904. +
  48905. + /* Store RTC parameters in the RTC control structure */
  48906. + p_Rtc->p_MemMap = (struct rtc_regs *)UINT_TO_PTR(p_FmRtcParam->baseAddress);
  48907. + p_Rtc->h_App = p_FmRtcParam->h_App;
  48908. +
  48909. + return p_Rtc;
  48910. +}
  48911. +
  48912. +/*****************************************************************************/
  48913. +t_Error FM_RTC_Init(t_Handle h_FmRtc)
  48914. +{
  48915. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  48916. + struct rtc_cfg *p_RtcDriverParam;
  48917. + struct rtc_regs *p_MemMap;
  48918. + uint32_t freqCompensation = 0;
  48919. + uint64_t tmpDouble;
  48920. + bool init_freq_comp = FALSE;
  48921. +
  48922. + p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
  48923. + p_MemMap = p_Rtc->p_MemMap;
  48924. +
  48925. + if (CheckInitParameters(p_Rtc)!=E_OK)
  48926. + RETURN_ERROR(MAJOR, E_CONFLICT,
  48927. + ("Init Parameters are not Valid"));
  48928. +
  48929. + /* TODO check that no timestamping MACs are working in this stage. */
  48930. +
  48931. + /* find source clock frequency in Mhz */
  48932. + if (p_Rtc->p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_SYSTEM)
  48933. + p_Rtc->srcClkFreqMhz = p_Rtc->p_RtcDriverParam->ext_src_clk_freq;
  48934. + else
  48935. + p_Rtc->srcClkFreqMhz = (uint32_t)(FmGetMacClockFreq(p_Rtc->h_Fm));
  48936. +
  48937. + /* if timer in Master mode Initialize TMR_CTRL */
  48938. + /* We want the counter (TMR_CNT) to count in nano-seconds */
  48939. + if (!p_RtcDriverParam->timer_slave_mode && p_Rtc->p_RtcDriverParam->bypass)
  48940. + p_Rtc->clockPeriodNanoSec = (1000 / p_Rtc->srcClkFreqMhz);
  48941. + else
  48942. + {
  48943. + /* Initialize TMR_ADD with the initial frequency compensation value:
  48944. + freqCompensation = (2^32 / frequency ratio) */
  48945. + /* frequency ratio = sorce clock/rtc clock =
  48946. + * (p_Rtc->srcClkFreqMhz*1000000))/ 1/(p_Rtc->clockPeriodNanoSec * 1000000000) */
  48947. + init_freq_comp = TRUE;
  48948. + freqCompensation = (uint32_t)DIV_CEIL(ACCUMULATOR_OVERFLOW * 1000,
  48949. + p_Rtc->clockPeriodNanoSec * p_Rtc->srcClkFreqMhz);
  48950. + }
  48951. +
  48952. + /* check the legality of the relation between source and destination clocks */
  48953. + /* should be larger than 1.0001 */
  48954. + tmpDouble = 10000 * (uint64_t)p_Rtc->clockPeriodNanoSec * (uint64_t)p_Rtc->srcClkFreqMhz;
  48955. + if ((tmpDouble) <= 10001)
  48956. + RETURN_ERROR(MAJOR, E_CONFLICT,
  48957. + ("Invalid relation between source and destination clocks. Should be larger than 1.0001"));
  48958. +
  48959. + fman_rtc_init(p_RtcDriverParam,
  48960. + p_MemMap,
  48961. + FM_RTC_NUM_OF_ALARMS,
  48962. + FM_RTC_NUM_OF_PERIODIC_PULSES,
  48963. + FM_RTC_NUM_OF_EXT_TRIGGERS,
  48964. + init_freq_comp,
  48965. + freqCompensation,
  48966. + p_Rtc->outputClockDivisor);
  48967. +
  48968. + /* Register the FM RTC interrupt */
  48969. + FmRegisterIntr(p_Rtc->h_Fm, e_FM_MOD_TMR, 0, e_FM_INTR_TYPE_NORMAL, RtcExceptions , p_Rtc);
  48970. +
  48971. + /* Free parameters structures */
  48972. + XX_Free(p_Rtc->p_RtcDriverParam);
  48973. + p_Rtc->p_RtcDriverParam = NULL;
  48974. +
  48975. + return E_OK;
  48976. +}
  48977. +
  48978. +/*****************************************************************************/
  48979. +t_Error FM_RTC_Free(t_Handle h_FmRtc)
  48980. +{
  48981. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  48982. +
  48983. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  48984. +
  48985. + if (p_Rtc->p_RtcDriverParam)
  48986. + {
  48987. + XX_Free(p_Rtc->p_RtcDriverParam);
  48988. + }
  48989. + else
  48990. + {
  48991. + FM_RTC_Disable(h_FmRtc);
  48992. + }
  48993. +
  48994. + /* Unregister FM RTC interrupt */
  48995. + FmUnregisterIntr(p_Rtc->h_Fm, e_FM_MOD_TMR, 0, e_FM_INTR_TYPE_NORMAL);
  48996. + XX_Free(p_Rtc);
  48997. +
  48998. + return E_OK;
  48999. +}
  49000. +
  49001. +/*****************************************************************************/
  49002. +t_Error FM_RTC_ConfigSourceClock(t_Handle h_FmRtc,
  49003. + e_FmSrcClk srcClk,
  49004. + uint32_t freqInMhz)
  49005. +{
  49006. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49007. +
  49008. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49009. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49010. +
  49011. + p_Rtc->p_RtcDriverParam->src_clk = (enum fman_src_clock)srcClk;
  49012. + if (srcClk != e_FM_RTC_SOURCE_CLOCK_SYSTEM)
  49013. + p_Rtc->p_RtcDriverParam->ext_src_clk_freq = freqInMhz;
  49014. +
  49015. + return E_OK;
  49016. +}
  49017. +
  49018. +/*****************************************************************************/
  49019. +t_Error FM_RTC_ConfigPeriod(t_Handle h_FmRtc, uint32_t period)
  49020. +{
  49021. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49022. +
  49023. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49024. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49025. +
  49026. + p_Rtc->clockPeriodNanoSec = period;
  49027. +
  49028. + return E_OK;
  49029. +}
  49030. +
  49031. +/*****************************************************************************/
  49032. +t_Error FM_RTC_ConfigFrequencyBypass(t_Handle h_FmRtc, bool enabled)
  49033. +{
  49034. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49035. +
  49036. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49037. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49038. +
  49039. + p_Rtc->p_RtcDriverParam->bypass = enabled;
  49040. +
  49041. + return E_OK;
  49042. +}
  49043. +
  49044. +/*****************************************************************************/
  49045. +t_Error FM_RTC_ConfigInvertedInputClockPhase(t_Handle h_FmRtc, bool inverted)
  49046. +{
  49047. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49048. +
  49049. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49050. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49051. +
  49052. + p_Rtc->p_RtcDriverParam->invert_input_clk_phase = inverted;
  49053. +
  49054. + return E_OK;
  49055. +}
  49056. +
  49057. +/*****************************************************************************/
  49058. +t_Error FM_RTC_ConfigInvertedOutputClockPhase(t_Handle h_FmRtc, bool inverted)
  49059. +{
  49060. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49061. +
  49062. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49063. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49064. +
  49065. + p_Rtc->p_RtcDriverParam->invert_output_clk_phase = inverted;
  49066. +
  49067. + return E_OK;
  49068. +}
  49069. +
  49070. +/*****************************************************************************/
  49071. +t_Error FM_RTC_ConfigOutputClockDivisor(t_Handle h_FmRtc, uint16_t divisor)
  49072. +{
  49073. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49074. +
  49075. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49076. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49077. +
  49078. + p_Rtc->outputClockDivisor = divisor;
  49079. +
  49080. + return E_OK;
  49081. +}
  49082. +
  49083. +/*****************************************************************************/
  49084. +t_Error FM_RTC_ConfigPulseRealignment(t_Handle h_FmRtc, bool enable)
  49085. +{
  49086. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49087. +
  49088. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49089. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49090. +
  49091. + p_Rtc->p_RtcDriverParam->pulse_realign = enable;
  49092. +
  49093. + return E_OK;
  49094. +}
  49095. +
  49096. +/*****************************************************************************/
  49097. +t_Error FM_RTC_ConfigAlarmPolarity(t_Handle h_FmRtc,
  49098. + uint8_t alarmId,
  49099. + e_FmRtcAlarmPolarity alarmPolarity)
  49100. +{
  49101. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49102. +
  49103. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49104. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49105. +
  49106. + if (alarmId >= FM_RTC_NUM_OF_ALARMS)
  49107. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm ID"));
  49108. +
  49109. + p_Rtc->p_RtcDriverParam->alarm_polarity[alarmId] =
  49110. + (enum fman_rtc_alarm_polarity)alarmPolarity;
  49111. +
  49112. + return E_OK;
  49113. +}
  49114. +
  49115. +/*****************************************************************************/
  49116. +t_Error FM_RTC_ConfigExternalTriggerPolarity(t_Handle h_FmRtc,
  49117. + uint8_t triggerId,
  49118. + e_FmRtcTriggerPolarity triggerPolarity)
  49119. +{
  49120. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49121. +
  49122. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49123. + SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49124. +
  49125. + if (triggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
  49126. + {
  49127. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External trigger ID"));
  49128. + }
  49129. +
  49130. + p_Rtc->p_RtcDriverParam->trigger_polarity[triggerId] =
  49131. + (enum fman_rtc_trigger_polarity)triggerPolarity;
  49132. +
  49133. + return E_OK;
  49134. +}
  49135. +
  49136. +/*****************************************************************************/
  49137. +t_Error FM_RTC_Enable(t_Handle h_FmRtc, bool resetClock)
  49138. +{
  49139. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49140. +
  49141. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49142. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49143. +
  49144. + fman_rtc_enable(p_Rtc->p_MemMap, resetClock);
  49145. + return E_OK;
  49146. +}
  49147. +
  49148. +/*****************************************************************************/
  49149. +t_Error FM_RTC_Disable(t_Handle h_FmRtc)
  49150. +{
  49151. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49152. +
  49153. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49154. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49155. +
  49156. + /* TODO A check must be added here, that no timestamping MAC's
  49157. + * are working in this stage. */
  49158. + fman_rtc_disable(p_Rtc->p_MemMap);
  49159. +
  49160. + return E_OK;
  49161. +}
  49162. +
  49163. +/*****************************************************************************/
  49164. +t_Error FM_RTC_SetClockOffset(t_Handle h_FmRtc, int64_t offset)
  49165. +{
  49166. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49167. +
  49168. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49169. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49170. +
  49171. + fman_rtc_set_timer_offset(p_Rtc->p_MemMap, offset);
  49172. + return E_OK;
  49173. +}
  49174. +
  49175. +/*****************************************************************************/
  49176. +t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams)
  49177. +{
  49178. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49179. + uint64_t tmpAlarm;
  49180. + bool enable = FALSE;
  49181. +
  49182. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49183. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49184. +
  49185. + if (p_FmRtcAlarmParams->alarmId >= FM_RTC_NUM_OF_ALARMS)
  49186. + {
  49187. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm ID"));
  49188. + }
  49189. +
  49190. + if (p_FmRtcAlarmParams->alarmTime < p_Rtc->clockPeriodNanoSec)
  49191. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
  49192. + ("Alarm time must be equal or larger than RTC period - %d nanoseconds",
  49193. + p_Rtc->clockPeriodNanoSec));
  49194. + if (p_FmRtcAlarmParams->alarmTime % (uint64_t)p_Rtc->clockPeriodNanoSec)
  49195. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
  49196. + ("Alarm time must be a multiple of RTC period - %d nanoseconds",
  49197. + p_Rtc->clockPeriodNanoSec));
  49198. + tmpAlarm = p_FmRtcAlarmParams->alarmTime/(uint64_t)p_Rtc->clockPeriodNanoSec;
  49199. +
  49200. + if (p_FmRtcAlarmParams->f_AlarmCallback)
  49201. + {
  49202. + p_Rtc->alarmParams[p_FmRtcAlarmParams->alarmId].f_AlarmCallback = p_FmRtcAlarmParams->f_AlarmCallback;
  49203. + p_Rtc->alarmParams[p_FmRtcAlarmParams->alarmId].clearOnExpiration = p_FmRtcAlarmParams->clearOnExpiration;
  49204. + enable = TRUE;
  49205. + }
  49206. +
  49207. + fman_rtc_set_alarm(p_Rtc->p_MemMap, p_FmRtcAlarmParams->alarmId, (unsigned long)tmpAlarm, enable);
  49208. +
  49209. + return E_OK;
  49210. +}
  49211. +
  49212. +/*****************************************************************************/
  49213. +t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_FmRtcPeriodicPulseParams)
  49214. +{
  49215. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49216. + bool enable = FALSE;
  49217. + uint64_t tmpFiper;
  49218. +
  49219. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49220. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49221. +
  49222. + if (p_FmRtcPeriodicPulseParams->periodicPulseId >= FM_RTC_NUM_OF_PERIODIC_PULSES)
  49223. + {
  49224. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Periodic pulse ID"));
  49225. + }
  49226. + if (fman_rtc_is_enabled(p_Rtc->p_MemMap))
  49227. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Can't set Periodic pulse when RTC is enabled."));
  49228. + if (p_FmRtcPeriodicPulseParams->periodicPulsePeriod < p_Rtc->clockPeriodNanoSec)
  49229. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
  49230. + ("Periodic pulse must be equal or larger than RTC period - %d nanoseconds",
  49231. + p_Rtc->clockPeriodNanoSec));
  49232. + if (p_FmRtcPeriodicPulseParams->periodicPulsePeriod % (uint64_t)p_Rtc->clockPeriodNanoSec)
  49233. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
  49234. + ("Periodic pulse must be a multiple of RTC period - %d nanoseconds",
  49235. + p_Rtc->clockPeriodNanoSec));
  49236. + tmpFiper = p_FmRtcPeriodicPulseParams->periodicPulsePeriod/(uint64_t)p_Rtc->clockPeriodNanoSec;
  49237. + if (tmpFiper & 0xffffffff00000000LL)
  49238. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,
  49239. + ("Periodic pulse/RTC Period must be smaller than 4294967296",
  49240. + p_Rtc->clockPeriodNanoSec));
  49241. +
  49242. + if (p_FmRtcPeriodicPulseParams->f_PeriodicPulseCallback)
  49243. + {
  49244. + p_Rtc->periodicPulseParams[p_FmRtcPeriodicPulseParams->periodicPulseId].f_PeriodicPulseCallback =
  49245. + p_FmRtcPeriodicPulseParams->f_PeriodicPulseCallback;
  49246. + enable = TRUE;
  49247. + }
  49248. + fman_rtc_set_periodic_pulse(p_Rtc->p_MemMap, p_FmRtcPeriodicPulseParams->periodicPulseId, (uint32_t)tmpFiper, enable);
  49249. + return E_OK;
  49250. +}
  49251. +
  49252. +/*****************************************************************************/
  49253. +t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId)
  49254. +{
  49255. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49256. +
  49257. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49258. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49259. +
  49260. + if (periodicPulseId >= FM_RTC_NUM_OF_PERIODIC_PULSES)
  49261. + {
  49262. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Periodic pulse ID"));
  49263. + }
  49264. +
  49265. + p_Rtc->periodicPulseParams[periodicPulseId].f_PeriodicPulseCallback = NULL;
  49266. + fman_rtc_clear_periodic_pulse(p_Rtc->p_MemMap, periodicPulseId);
  49267. +
  49268. + return E_OK;
  49269. +}
  49270. +
  49271. +/*****************************************************************************/
  49272. +t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams *p_FmRtcExternalTriggerParams)
  49273. +{
  49274. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49275. + bool enable = FALSE;
  49276. +
  49277. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49278. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49279. +
  49280. + if (p_FmRtcExternalTriggerParams->externalTriggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
  49281. + {
  49282. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External Trigger ID"));
  49283. + }
  49284. +
  49285. + if (p_FmRtcExternalTriggerParams->f_ExternalTriggerCallback)
  49286. + {
  49287. + p_Rtc->externalTriggerParams[p_FmRtcExternalTriggerParams->externalTriggerId].f_ExternalTriggerCallback = p_FmRtcExternalTriggerParams->f_ExternalTriggerCallback;
  49288. + enable = TRUE;
  49289. + }
  49290. +
  49291. + fman_rtc_set_ext_trigger(p_Rtc->p_MemMap, p_FmRtcExternalTriggerParams->externalTriggerId, enable, p_FmRtcExternalTriggerParams->usePulseAsInput);
  49292. + return E_OK;
  49293. +}
  49294. +
  49295. +/*****************************************************************************/
  49296. +t_Error FM_RTC_ClearExternalTrigger(t_Handle h_FmRtc, uint8_t externalTriggerId)
  49297. +{
  49298. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49299. +
  49300. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49301. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49302. +
  49303. + if (externalTriggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
  49304. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External Trigger ID"));
  49305. +
  49306. + p_Rtc->externalTriggerParams[externalTriggerId].f_ExternalTriggerCallback = NULL;
  49307. +
  49308. + fman_rtc_clear_external_trigger(p_Rtc->p_MemMap, externalTriggerId);
  49309. +
  49310. + return E_OK;
  49311. +}
  49312. +
  49313. +/*****************************************************************************/
  49314. +t_Error FM_RTC_GetExternalTriggerTimeStamp(t_Handle h_FmRtc,
  49315. + uint8_t triggerId,
  49316. + uint64_t *p_TimeStamp)
  49317. +{
  49318. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49319. +
  49320. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49321. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49322. +
  49323. + if (triggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
  49324. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External trigger ID"));
  49325. +
  49326. + *p_TimeStamp = fman_rtc_get_trigger_stamp(p_Rtc->p_MemMap, triggerId)*p_Rtc->clockPeriodNanoSec;
  49327. +
  49328. + return E_OK;
  49329. +}
  49330. +
  49331. +/*****************************************************************************/
  49332. +t_Error FM_RTC_GetCurrentTime(t_Handle h_FmRtc, uint64_t *p_Ts)
  49333. +{
  49334. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49335. +
  49336. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49337. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49338. +
  49339. + *p_Ts = fman_rtc_get_timer(p_Rtc->p_MemMap)*p_Rtc->clockPeriodNanoSec;
  49340. +
  49341. + return E_OK;
  49342. +}
  49343. +
  49344. +/*****************************************************************************/
  49345. +t_Error FM_RTC_SetCurrentTime(t_Handle h_FmRtc, uint64_t ts)
  49346. +{
  49347. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49348. +
  49349. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49350. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49351. +
  49352. + ts = ts/p_Rtc->clockPeriodNanoSec;
  49353. + fman_rtc_set_timer(p_Rtc->p_MemMap, (int64_t)ts);
  49354. +
  49355. + return E_OK;
  49356. +}
  49357. +
  49358. +/*****************************************************************************/
  49359. +t_Error FM_RTC_GetFreqCompensation(t_Handle h_FmRtc, uint32_t *p_Compensation)
  49360. +{
  49361. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49362. +
  49363. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49364. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49365. +
  49366. + *p_Compensation = fman_rtc_get_frequency_compensation(p_Rtc->p_MemMap);
  49367. +
  49368. + return E_OK;
  49369. +}
  49370. +
  49371. +/*****************************************************************************/
  49372. +t_Error FM_RTC_SetFreqCompensation(t_Handle h_FmRtc, uint32_t freqCompensation)
  49373. +{
  49374. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49375. +
  49376. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49377. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49378. +
  49379. + /* set the new freqCompensation */
  49380. + fman_rtc_set_frequency_compensation(p_Rtc->p_MemMap, freqCompensation);
  49381. +
  49382. + return E_OK;
  49383. +}
  49384. +
  49385. +#ifdef CONFIG_PTP_1588_CLOCK_DPAA
  49386. +/*****************************************************************************/
  49387. +t_Error FM_RTC_EnableInterrupt(t_Handle h_FmRtc, uint32_t events)
  49388. +{
  49389. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49390. +
  49391. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49392. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49393. +
  49394. + /* enable interrupt */
  49395. + fman_rtc_enable_interupt(p_Rtc->p_MemMap, events);
  49396. +
  49397. + return E_OK;
  49398. +}
  49399. +
  49400. +/*****************************************************************************/
  49401. +t_Error FM_RTC_DisableInterrupt(t_Handle h_FmRtc, uint32_t events)
  49402. +{
  49403. + t_FmRtc *p_Rtc = (t_FmRtc *)h_FmRtc;
  49404. +
  49405. + SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
  49406. + SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
  49407. +
  49408. + /* disable interrupt */
  49409. + fman_rtc_disable_interupt(p_Rtc->p_MemMap, events);
  49410. +
  49411. + return E_OK;
  49412. +}
  49413. +#endif
  49414. --- /dev/null
  49415. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fm_rtc.h
  49416. @@ -0,0 +1,96 @@
  49417. +/*
  49418. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  49419. + *
  49420. + * Redistribution and use in source and binary forms, with or without
  49421. + * modification, are permitted provided that the following conditions are met:
  49422. + * * Redistributions of source code must retain the above copyright
  49423. + * notice, this list of conditions and the following disclaimer.
  49424. + * * Redistributions in binary form must reproduce the above copyright
  49425. + * notice, this list of conditions and the following disclaimer in the
  49426. + * documentation and/or other materials provided with the distribution.
  49427. + * * Neither the name of Freescale Semiconductor nor the
  49428. + * names of its contributors may be used to endorse or promote products
  49429. + * derived from this software without specific prior written permission.
  49430. + *
  49431. + *
  49432. + * ALTERNATIVELY, this software may be distributed under the terms of the
  49433. + * GNU General Public License ("GPL") as published by the Free Software
  49434. + * Foundation, either version 2 of that License or (at your option) any
  49435. + * later version.
  49436. + *
  49437. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  49438. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  49439. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  49440. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  49441. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  49442. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  49443. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  49444. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  49445. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  49446. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  49447. + */
  49448. +
  49449. +
  49450. +/******************************************************************************
  49451. + @File fm_rtc.h
  49452. +
  49453. + @Description Memory map and internal definitions for FM RTC IEEE1588 Timer driver.
  49454. +
  49455. + @Cautions None
  49456. +*//***************************************************************************/
  49457. +
  49458. +#ifndef __FM_RTC_H__
  49459. +#define __FM_RTC_H__
  49460. +
  49461. +#include "std_ext.h"
  49462. +#include "fm_rtc_ext.h"
  49463. +
  49464. +
  49465. +#define __ERR_MODULE__ MODULE_FM_RTC
  49466. +
  49467. +/* General definitions */
  49468. +
  49469. +#define ACCUMULATOR_OVERFLOW ((uint64_t)(1LL << 32))
  49470. +#define DEFAULT_OUTPUT_CLOCK_DIVISOR 0x00000002
  49471. +#define DEFAULT_BYPASS FALSE
  49472. +#define DEFAULT_CLOCK_PERIOD 1000
  49473. +
  49474. +
  49475. +
  49476. +typedef struct t_FmRtcAlarm
  49477. +{
  49478. + t_FmRtcExceptionsCallback *f_AlarmCallback;
  49479. + bool clearOnExpiration;
  49480. +} t_FmRtcAlarm;
  49481. +
  49482. +typedef struct t_FmRtcPeriodicPulse
  49483. +{
  49484. + t_FmRtcExceptionsCallback *f_PeriodicPulseCallback;
  49485. +} t_FmRtcPeriodicPulse;
  49486. +
  49487. +typedef struct t_FmRtcExternalTrigger
  49488. +{
  49489. + t_FmRtcExceptionsCallback *f_ExternalTriggerCallback;
  49490. +} t_FmRtcExternalTrigger;
  49491. +
  49492. +
  49493. +/**************************************************************************//**
  49494. + @Description RTC FM driver control structure.
  49495. +*//***************************************************************************/
  49496. +typedef struct t_FmRtc
  49497. +{
  49498. + t_Part *p_Part; /**< Pointer to the integration device */
  49499. + t_Handle h_Fm;
  49500. + t_Handle h_App; /**< Application handle */
  49501. + struct rtc_regs *p_MemMap;
  49502. + uint32_t clockPeriodNanoSec; /**< RTC clock period in nano-seconds (for FS mode) */
  49503. + uint32_t srcClkFreqMhz;
  49504. + uint16_t outputClockDivisor; /**< Output clock divisor (for FS mode) */
  49505. + t_FmRtcAlarm alarmParams[FM_RTC_NUM_OF_ALARMS];
  49506. + t_FmRtcPeriodicPulse periodicPulseParams[FM_RTC_NUM_OF_PERIODIC_PULSES];
  49507. + t_FmRtcExternalTrigger externalTriggerParams[FM_RTC_NUM_OF_EXT_TRIGGERS];
  49508. + struct rtc_cfg *p_RtcDriverParam; /**< RTC Driver parameters (for Init phase) */
  49509. +} t_FmRtc;
  49510. +
  49511. +
  49512. +#endif /* __FM_RTC_H__ */
  49513. --- /dev/null
  49514. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Rtc/fman_rtc.c
  49515. @@ -0,0 +1,334 @@
  49516. +/*
  49517. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  49518. + *
  49519. + * Redistribution and use in source and binary forms, with or without
  49520. + * modification, are permitted provided that the following conditions are met:
  49521. + * * Redistributions of source code must retain the above copyright
  49522. + * notice, this list of conditions and the following disclaimer.
  49523. + * * Redistributions in binary form must reproduce the above copyright
  49524. + * notice, this list of conditions and the following disclaimer in the
  49525. + * documentation and/or other materials provided with the distribution.
  49526. + * * Neither the name of Freescale Semiconductor nor the
  49527. + * names of its contributors may be used to endorse or promote products
  49528. + * derived from this software without specific prior written permission.
  49529. + *
  49530. + *
  49531. + * ALTERNATIVELY, this software may be distributed under the terms of the
  49532. + * GNU General Public License ("GPL") as published by the Free Software
  49533. + * Foundation, either version 2 of that License or (at your option) any
  49534. + * later version.
  49535. + *
  49536. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  49537. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  49538. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  49539. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  49540. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  49541. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  49542. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  49543. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  49544. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  49545. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  49546. + */
  49547. +
  49548. +#include "fsl_fman_rtc.h"
  49549. +
  49550. +void fman_rtc_defconfig(struct rtc_cfg *cfg)
  49551. +{
  49552. + int i;
  49553. + cfg->src_clk = DEFAULT_SRC_CLOCK;
  49554. + cfg->invert_input_clk_phase = DEFAULT_INVERT_INPUT_CLK_PHASE;
  49555. + cfg->invert_output_clk_phase = DEFAULT_INVERT_OUTPUT_CLK_PHASE;
  49556. + cfg->pulse_realign = DEFAULT_PULSE_REALIGN;
  49557. + for (i = 0; i < FMAN_RTC_MAX_NUM_OF_ALARMS; i++)
  49558. + cfg->alarm_polarity[i] = DEFAULT_ALARM_POLARITY;
  49559. + for (i = 0; i < FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS; i++)
  49560. + cfg->trigger_polarity[i] = DEFAULT_TRIGGER_POLARITY;
  49561. +}
  49562. +
  49563. +uint32_t fman_rtc_get_events(struct rtc_regs *regs)
  49564. +{
  49565. + return ioread32be(&regs->tmr_tevent);
  49566. +}
  49567. +
  49568. +uint32_t fman_rtc_get_event(struct rtc_regs *regs, uint32_t ev_mask)
  49569. +{
  49570. + return ioread32be(&regs->tmr_tevent) & ev_mask;
  49571. +}
  49572. +
  49573. +uint32_t fman_rtc_get_interrupt_mask(struct rtc_regs *regs)
  49574. +{
  49575. + return ioread32be(&regs->tmr_temask);
  49576. +}
  49577. +
  49578. +void fman_rtc_set_interrupt_mask(struct rtc_regs *regs, uint32_t mask)
  49579. +{
  49580. + iowrite32be(mask, &regs->tmr_temask);
  49581. +}
  49582. +
  49583. +void fman_rtc_ack_event(struct rtc_regs *regs, uint32_t events)
  49584. +{
  49585. + iowrite32be(events, &regs->tmr_tevent);
  49586. +}
  49587. +
  49588. +uint32_t fman_rtc_check_and_clear_event(struct rtc_regs *regs)
  49589. +{
  49590. + uint32_t event;
  49591. +
  49592. + event = ioread32be(&regs->tmr_tevent);
  49593. + event &= ioread32be(&regs->tmr_temask);
  49594. +
  49595. + if (event)
  49596. + iowrite32be(event, &regs->tmr_tevent);
  49597. + return event;
  49598. +}
  49599. +
  49600. +uint32_t fman_rtc_get_frequency_compensation(struct rtc_regs *regs)
  49601. +{
  49602. + return ioread32be(&regs->tmr_add);
  49603. +}
  49604. +
  49605. +void fman_rtc_set_frequency_compensation(struct rtc_regs *regs, uint32_t val)
  49606. +{
  49607. + iowrite32be(val, &regs->tmr_add);
  49608. +}
  49609. +
  49610. +void fman_rtc_enable_interupt(struct rtc_regs *regs, uint32_t events)
  49611. +{
  49612. + fman_rtc_set_interrupt_mask(regs, fman_rtc_get_interrupt_mask(regs) | events);
  49613. +}
  49614. +
  49615. +void fman_rtc_disable_interupt(struct rtc_regs *regs, uint32_t events)
  49616. +{
  49617. + fman_rtc_set_interrupt_mask(regs, fman_rtc_get_interrupt_mask(regs) & ~events);
  49618. +}
  49619. +
  49620. +void fman_rtc_set_timer_alarm_l(struct rtc_regs *regs, int index, uint32_t val)
  49621. +{
  49622. + iowrite32be(val, &regs->tmr_alarm[index].tmr_alarm_l);
  49623. +}
  49624. +
  49625. +void fman_rtc_set_timer_fiper(struct rtc_regs *regs, int index, uint32_t val)
  49626. +{
  49627. + iowrite32be(val, &regs->tmr_fiper[index]);
  49628. +}
  49629. +
  49630. +void fman_rtc_set_timer_alarm(struct rtc_regs *regs, int index, int64_t val)
  49631. +{
  49632. + iowrite32be((uint32_t)val, &regs->tmr_alarm[index].tmr_alarm_l);
  49633. + iowrite32be((uint32_t)(val >> 32), &regs->tmr_alarm[index].tmr_alarm_h);
  49634. +}
  49635. +
  49636. +void fman_rtc_set_timer_offset(struct rtc_regs *regs, int64_t val)
  49637. +{
  49638. + iowrite32be((uint32_t)val, &regs->tmr_off_l);
  49639. + iowrite32be((uint32_t)(val >> 32), &regs->tmr_off_h);
  49640. +}
  49641. +
  49642. +uint64_t fman_rtc_get_trigger_stamp(struct rtc_regs *regs, int id)
  49643. +{
  49644. + uint64_t time;
  49645. + /* TMR_CNT_L must be read first to get an accurate value */
  49646. + time = (uint64_t)ioread32be(&regs->tmr_etts[id].tmr_etts_l);
  49647. + time |= ((uint64_t)ioread32be(&regs->tmr_etts[id].tmr_etts_h)
  49648. + << 32);
  49649. +
  49650. + return time;
  49651. +}
  49652. +
  49653. +uint32_t fman_rtc_get_timer_ctrl(struct rtc_regs *regs)
  49654. +{
  49655. + return ioread32be(&regs->tmr_ctrl);
  49656. +}
  49657. +
  49658. +void fman_rtc_set_timer_ctrl(struct rtc_regs *regs, uint32_t val)
  49659. +{
  49660. + iowrite32be(val, &regs->tmr_ctrl);
  49661. +}
  49662. +
  49663. +void fman_rtc_timers_soft_reset(struct rtc_regs *regs)
  49664. +{
  49665. + fman_rtc_set_timer_ctrl(regs, FMAN_RTC_TMR_CTRL_TMSR);
  49666. + udelay(10);
  49667. + fman_rtc_set_timer_ctrl(regs, 0);
  49668. +}
  49669. +
  49670. +void fman_rtc_init(struct rtc_cfg *cfg, struct rtc_regs *regs, int num_alarms,
  49671. + int num_fipers, int num_ext_triggers, bool init_freq_comp,
  49672. + uint32_t freq_compensation, uint32_t output_clock_divisor)
  49673. +{
  49674. + uint32_t tmr_ctrl;
  49675. + int i;
  49676. +
  49677. + fman_rtc_timers_soft_reset(regs);
  49678. +
  49679. + /* Set the source clock */
  49680. + switch (cfg->src_clk) {
  49681. + case E_FMAN_RTC_SOURCE_CLOCK_SYSTEM:
  49682. + tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_MAC_CLK;
  49683. + break;
  49684. + case E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR:
  49685. + tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_OSC_CLK;
  49686. + break;
  49687. + default:
  49688. + /* Use a clock from the External TMR reference clock.*/
  49689. + tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_EXT_CLK;
  49690. + break;
  49691. + }
  49692. +
  49693. + /* whatever period the user picked, the timestamp will advance in '1'
  49694. + * every time the period passed. */
  49695. + tmr_ctrl |= ((1 << FMAN_RTC_TMR_CTRL_TCLK_PERIOD_SHIFT) &
  49696. + FMAN_RTC_TMR_CTRL_TCLK_PERIOD_MASK);
  49697. +
  49698. + if (cfg->invert_input_clk_phase)
  49699. + tmr_ctrl |= FMAN_RTC_TMR_CTRL_CIPH;
  49700. + if (cfg->invert_output_clk_phase)
  49701. + tmr_ctrl |= FMAN_RTC_TMR_CTRL_COPH;
  49702. +
  49703. + for (i = 0; i < num_alarms; i++) {
  49704. + if (cfg->alarm_polarity[i] ==
  49705. + E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW)
  49706. + tmr_ctrl |= (FMAN_RTC_TMR_CTRL_ALMP1 >> i);
  49707. + }
  49708. +
  49709. + for (i = 0; i < num_ext_triggers; i++)
  49710. + if (cfg->trigger_polarity[i] ==
  49711. + E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE)
  49712. + tmr_ctrl |= (FMAN_RTC_TMR_CTRL_ETEP1 << i);
  49713. +
  49714. + if (!cfg->timer_slave_mode && cfg->bypass)
  49715. + tmr_ctrl |= FMAN_RTC_TMR_CTRL_BYP;
  49716. +
  49717. + fman_rtc_set_timer_ctrl(regs, tmr_ctrl);
  49718. + if (init_freq_comp)
  49719. + fman_rtc_set_frequency_compensation(regs, freq_compensation);
  49720. +
  49721. + /* Clear TMR_ALARM registers */
  49722. + for (i = 0; i < num_alarms; i++)
  49723. + fman_rtc_set_timer_alarm(regs, i, 0xFFFFFFFFFFFFFFFFLL);
  49724. +
  49725. + /* Clear TMR_TEVENT */
  49726. + fman_rtc_ack_event(regs, FMAN_RTC_TMR_TEVENT_ALL);
  49727. +
  49728. + /* Initialize TMR_TEMASK */
  49729. + fman_rtc_set_interrupt_mask(regs, 0);
  49730. +
  49731. + /* Clear TMR_FIPER registers */
  49732. + for (i = 0; i < num_fipers; i++)
  49733. + fman_rtc_set_timer_fiper(regs, i, 0xFFFFFFFF);
  49734. +
  49735. + /* Initialize TMR_PRSC */
  49736. + iowrite32be(output_clock_divisor, &regs->tmr_prsc);
  49737. +
  49738. + /* Clear TMR_OFF */
  49739. + fman_rtc_set_timer_offset(regs, 0);
  49740. +}
  49741. +
  49742. +bool fman_rtc_is_enabled(struct rtc_regs *regs)
  49743. +{
  49744. + return (bool)(fman_rtc_get_timer_ctrl(regs) & FMAN_RTC_TMR_CTRL_TE);
  49745. +}
  49746. +
  49747. +void fman_rtc_enable(struct rtc_regs *regs, bool reset_clock)
  49748. +{
  49749. + uint32_t tmr_ctrl = fman_rtc_get_timer_ctrl(regs);
  49750. +
  49751. + /* TODO check that no timestamping MACs are working in this stage. */
  49752. + if (reset_clock) {
  49753. + fman_rtc_set_timer_ctrl(regs, (tmr_ctrl | FMAN_RTC_TMR_CTRL_TMSR));
  49754. +
  49755. + udelay(10);
  49756. + /* Clear TMR_OFF */
  49757. + fman_rtc_set_timer_offset(regs, 0);
  49758. + }
  49759. +
  49760. + fman_rtc_set_timer_ctrl(regs, (tmr_ctrl | FMAN_RTC_TMR_CTRL_TE));
  49761. +}
  49762. +
  49763. +void fman_rtc_disable(struct rtc_regs *regs)
  49764. +{
  49765. + fman_rtc_set_timer_ctrl(regs, (fman_rtc_get_timer_ctrl(regs)
  49766. + & ~(FMAN_RTC_TMR_CTRL_TE)));
  49767. +}
  49768. +
  49769. +void fman_rtc_clear_periodic_pulse(struct rtc_regs *regs, int id)
  49770. +{
  49771. + uint32_t tmp_reg;
  49772. + if (id == 0)
  49773. + tmp_reg = FMAN_RTC_TMR_TEVENT_PP1;
  49774. + else
  49775. + tmp_reg = FMAN_RTC_TMR_TEVENT_PP2;
  49776. + fman_rtc_disable_interupt(regs, tmp_reg);
  49777. +
  49778. + tmp_reg = fman_rtc_get_timer_ctrl(regs);
  49779. + if (tmp_reg & FMAN_RTC_TMR_CTRL_FS)
  49780. + fman_rtc_set_timer_ctrl(regs, tmp_reg & ~FMAN_RTC_TMR_CTRL_FS);
  49781. +
  49782. + fman_rtc_set_timer_fiper(regs, id, 0xFFFFFFFF);
  49783. +}
  49784. +
  49785. +void fman_rtc_clear_external_trigger(struct rtc_regs *regs, int id)
  49786. +{
  49787. + uint32_t tmpReg, tmp_ctrl;
  49788. +
  49789. + if (id == 0)
  49790. + tmpReg = FMAN_RTC_TMR_TEVENT_ETS1;
  49791. + else
  49792. + tmpReg = FMAN_RTC_TMR_TEVENT_ETS2;
  49793. + fman_rtc_disable_interupt(regs, tmpReg);
  49794. +
  49795. + if (id == 0)
  49796. + tmpReg = FMAN_RTC_TMR_CTRL_PP1L;
  49797. + else
  49798. + tmpReg = FMAN_RTC_TMR_CTRL_PP2L;
  49799. + tmp_ctrl = fman_rtc_get_timer_ctrl(regs);
  49800. + if (tmp_ctrl & tmpReg)
  49801. + fman_rtc_set_timer_ctrl(regs, tmp_ctrl & ~tmpReg);
  49802. +}
  49803. +
  49804. +void fman_rtc_set_alarm(struct rtc_regs *regs, int id, uint32_t val, bool enable)
  49805. +{
  49806. + uint32_t tmpReg;
  49807. + fman_rtc_set_timer_alarm(regs, id, val);
  49808. + if (enable) {
  49809. + if (id == 0)
  49810. + tmpReg = FMAN_RTC_TMR_TEVENT_ALM1;
  49811. + else
  49812. + tmpReg = FMAN_RTC_TMR_TEVENT_ALM2;
  49813. + fman_rtc_enable_interupt(regs, tmpReg);
  49814. + }
  49815. +}
  49816. +
  49817. +void fman_rtc_set_periodic_pulse(struct rtc_regs *regs, int id, uint32_t val,
  49818. + bool enable)
  49819. +{
  49820. + uint32_t tmpReg;
  49821. + fman_rtc_set_timer_fiper(regs, id, val);
  49822. + if (enable) {
  49823. + if (id == 0)
  49824. + tmpReg = FMAN_RTC_TMR_TEVENT_PP1;
  49825. + else
  49826. + tmpReg = FMAN_RTC_TMR_TEVENT_PP2;
  49827. + fman_rtc_enable_interupt(regs, tmpReg);
  49828. + }
  49829. +}
  49830. +
  49831. +void fman_rtc_set_ext_trigger(struct rtc_regs *regs, int id, bool enable,
  49832. + bool use_pulse_as_input)
  49833. +{
  49834. + uint32_t tmpReg;
  49835. + if (enable) {
  49836. + if (id == 0)
  49837. + tmpReg = FMAN_RTC_TMR_TEVENT_ETS1;
  49838. + else
  49839. + tmpReg = FMAN_RTC_TMR_TEVENT_ETS2;
  49840. + fman_rtc_enable_interupt(regs, tmpReg);
  49841. + }
  49842. + if (use_pulse_as_input) {
  49843. + if (id == 0)
  49844. + tmpReg = FMAN_RTC_TMR_CTRL_PP1L;
  49845. + else
  49846. + tmpReg = FMAN_RTC_TMR_CTRL_PP2L;
  49847. + fman_rtc_set_timer_ctrl(regs, fman_rtc_get_timer_ctrl(regs) | tmpReg);
  49848. + }
  49849. +}
  49850. --- /dev/null
  49851. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/Makefile
  49852. @@ -0,0 +1,15 @@
  49853. +#
  49854. +# Makefile for the Freescale Ethernet controllers
  49855. +#
  49856. +ccflags-y += -DVERSION=\"\"
  49857. +#
  49858. +#Include netcomm SW specific definitions
  49859. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  49860. +
  49861. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  49862. +
  49863. +ccflags-y += -I$(NCSW_FM_INC)
  49864. +
  49865. +obj-y += fsl-ncsw-sp.o
  49866. +
  49867. +fsl-ncsw-sp-objs := fm_sp.o fman_sp.o
  49868. --- /dev/null
  49869. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.c
  49870. @@ -0,0 +1,757 @@
  49871. +/*
  49872. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  49873. + *
  49874. + * Redistribution and use in source and binary forms, with or without
  49875. + * modification, are permitted provided that the following conditions are met:
  49876. + * * Redistributions of source code must retain the above copyright
  49877. + * notice, this list of conditions and the following disclaimer.
  49878. + * * Redistributions in binary form must reproduce the above copyright
  49879. + * notice, this list of conditions and the following disclaimer in the
  49880. + * documentation and/or other materials provided with the distribution.
  49881. + * * Neither the name of Freescale Semiconductor nor the
  49882. + * names of its contributors may be used to endorse or promote products
  49883. + * derived from this software without specific prior written permission.
  49884. + *
  49885. + *
  49886. + * ALTERNATIVELY, this software may be distributed under the terms of the
  49887. + * GNU General Public License ("GPL") as published by the Free Software
  49888. + * Foundation, either version 2 of that License or (at your option) any
  49889. + * later version.
  49890. + *
  49891. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  49892. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  49893. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  49894. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  49895. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  49896. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  49897. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  49898. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  49899. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  49900. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  49901. + */
  49902. +
  49903. +
  49904. +/******************************************************************************
  49905. + @File fm_sp.c
  49906. +
  49907. + @Description FM PCD Storage profile ...
  49908. +*//***************************************************************************/
  49909. +
  49910. +#include "std_ext.h"
  49911. +#include "error_ext.h"
  49912. +#include "string_ext.h"
  49913. +#include "debug_ext.h"
  49914. +#include "net_ext.h"
  49915. +
  49916. +#include "fm_vsp_ext.h"
  49917. +#include "fm_sp.h"
  49918. +#include "fm_common.h"
  49919. +#include "fsl_fman_sp.h"
  49920. +
  49921. +
  49922. +#if (DPAA_VERSION >= 11)
  49923. +static t_Error CheckParamsGeneratedInternally(t_FmVspEntry *p_FmVspEntry)
  49924. +{
  49925. + t_Error err = E_OK;
  49926. +
  49927. + if ((err = FmSpCheckIntContextParams(&p_FmVspEntry->intContext))!= E_OK)
  49928. + RETURN_ERROR(MAJOR, err, NO_MSG);
  49929. + if ((err = FmSpCheckBufMargins(&p_FmVspEntry->bufMargins)) != E_OK)
  49930. + RETURN_ERROR(MAJOR, err, NO_MSG);
  49931. + return err;
  49932. +
  49933. +}
  49934. +
  49935. +static t_Error CheckParams(t_FmVspEntry *p_FmVspEntry)
  49936. +{
  49937. + t_Error err = E_OK;
  49938. +
  49939. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  49940. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  49941. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->h_Fm, E_INVALID_HANDLE);
  49942. +
  49943. + if ((err = FmSpCheckBufPoolsParams(&p_FmVspEntry->p_FmVspEntryDriverParams->extBufPools,
  49944. + p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools,
  49945. + p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion)) != E_OK)
  49946. +
  49947. + RETURN_ERROR(MAJOR, err, NO_MSG);
  49948. +
  49949. + if (p_FmVspEntry->p_FmVspEntryDriverParams->liodnOffset & ~FM_LIODN_OFFSET_MASK)
  49950. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("liodnOffset is larger than %d", FM_LIODN_OFFSET_MASK+1));
  49951. +
  49952. + err = FmVSPCheckRelativeProfile(p_FmVspEntry->h_Fm,
  49953. + p_FmVspEntry->portType,
  49954. + p_FmVspEntry->portId,
  49955. + p_FmVspEntry->relativeProfileId);
  49956. +
  49957. + return err;
  49958. +}
  49959. +#endif /* (DPAA_VERSION >= 11) */
  49960. +
  49961. +
  49962. +/*****************************************************************************/
  49963. +/* Inter-module API routines */
  49964. +/*****************************************************************************/
  49965. +void FmSpSetBufPoolsInAscOrderOfBufSizes(t_FmExtPools *p_FmExtPools,
  49966. + uint8_t *orderedArray,
  49967. + uint16_t *sizesArray)
  49968. +{
  49969. + uint16_t bufSize = 0;
  49970. + int i=0, j=0, k=0;
  49971. +
  49972. + /* First we copy the external buffers pools information to an ordered local array */
  49973. + for (i=0;i<p_FmExtPools->numOfPoolsUsed;i++)
  49974. + {
  49975. + /* get pool size */
  49976. + bufSize = p_FmExtPools->extBufPool[i].size;
  49977. +
  49978. + /* keep sizes in an array according to poolId for direct access */
  49979. + sizesArray[p_FmExtPools->extBufPool[i].id] = bufSize;
  49980. +
  49981. + /* save poolId in an ordered array according to size */
  49982. + for (j=0;j<=i;j++)
  49983. + {
  49984. + /* this is the next free place in the array */
  49985. + if (j==i)
  49986. + orderedArray[i] = p_FmExtPools->extBufPool[i].id;
  49987. + else
  49988. + {
  49989. + /* find the right place for this poolId */
  49990. + if (bufSize < sizesArray[orderedArray[j]])
  49991. + {
  49992. + /* move the poolIds one place ahead to make room for this poolId */
  49993. + for (k=i;k>j;k--)
  49994. + orderedArray[k] = orderedArray[k-1];
  49995. +
  49996. + /* now k==j, this is the place for the new size */
  49997. + orderedArray[k] = p_FmExtPools->extBufPool[i].id;
  49998. + break;
  49999. + }
  50000. + }
  50001. + }
  50002. + }
  50003. +}
  50004. +
  50005. +t_Error FmSpCheckBufPoolsParams(t_FmExtPools *p_FmExtPools,
  50006. + t_FmBackupBmPools *p_FmBackupBmPools,
  50007. + t_FmBufPoolDepletion *p_FmBufPoolDepletion)
  50008. +{
  50009. +
  50010. + int i = 0, j = 0;
  50011. + bool found;
  50012. + uint8_t count = 0;
  50013. +
  50014. + if (p_FmExtPools)
  50015. + {
  50016. + if (p_FmExtPools->numOfPoolsUsed > FM_PORT_MAX_NUM_OF_EXT_POOLS)
  50017. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numOfPoolsUsed can't be larger than %d", FM_PORT_MAX_NUM_OF_EXT_POOLS));
  50018. +
  50019. + for (i=0;i<p_FmExtPools->numOfPoolsUsed;i++)
  50020. + {
  50021. + if (p_FmExtPools->extBufPool[i].id >= BM_MAX_NUM_OF_POOLS)
  50022. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("extBufPools.extBufPool[%d].id can't be larger than %d", i, BM_MAX_NUM_OF_POOLS));
  50023. + if (!p_FmExtPools->extBufPool[i].size)
  50024. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("extBufPools.extBufPool[%d].size is 0", i));
  50025. + }
  50026. + }
  50027. + if (!p_FmExtPools && (p_FmBackupBmPools || p_FmBufPoolDepletion))
  50028. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("backupBmPools ot bufPoolDepletion can not be defined without external pools"));
  50029. +
  50030. + /* backup BM pools indication is valid only for some chip derivatives
  50031. + (limited by the config routine) */
  50032. + if (p_FmBackupBmPools)
  50033. + {
  50034. + if (p_FmBackupBmPools->numOfBackupPools >= p_FmExtPools->numOfPoolsUsed)
  50035. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("p_BackupBmPools must be smaller than extBufPools.numOfPoolsUsed"));
  50036. + found = FALSE;
  50037. + for (i = 0;i<p_FmBackupBmPools->numOfBackupPools;i++)
  50038. + {
  50039. +
  50040. + for (j=0;j<p_FmExtPools->numOfPoolsUsed;j++)
  50041. + {
  50042. + if (p_FmBackupBmPools->poolIds[i] == p_FmExtPools->extBufPool[j].id)
  50043. + {
  50044. + found = TRUE;
  50045. + break;
  50046. + }
  50047. + }
  50048. + if (!found)
  50049. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("All p_BackupBmPools.poolIds must be included in extBufPools.extBufPool[n].id"));
  50050. + else
  50051. + found = FALSE;
  50052. + }
  50053. + }
  50054. +
  50055. + /* up to extBufPools.numOfPoolsUsed pools may be defined */
  50056. + if (p_FmBufPoolDepletion && p_FmBufPoolDepletion->poolsGrpModeEnable)
  50057. + {
  50058. + if ((p_FmBufPoolDepletion->numOfPools > p_FmExtPools->numOfPoolsUsed))
  50059. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufPoolDepletion.numOfPools can't be larger than %d and can't be larger than numOfPoolsUsed", FM_PORT_MAX_NUM_OF_EXT_POOLS));
  50060. +
  50061. + if (!p_FmBufPoolDepletion->numOfPools)
  50062. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufPoolDepletion.numOfPoolsToConsider can not be 0 when poolsGrpModeEnable=TRUE"));
  50063. +
  50064. + found = FALSE;
  50065. + count = 0;
  50066. + /* for each pool that is in poolsToConsider, check if it is defined
  50067. + in extBufPool */
  50068. + for (i=0;i<BM_MAX_NUM_OF_POOLS;i++)
  50069. + {
  50070. + if (p_FmBufPoolDepletion->poolsToConsider[i])
  50071. + {
  50072. + for (j=0;j<p_FmExtPools->numOfPoolsUsed;j++)
  50073. + {
  50074. + if (i == p_FmExtPools->extBufPool[j].id)
  50075. + {
  50076. + found = TRUE;
  50077. + count++;
  50078. + break;
  50079. + }
  50080. + }
  50081. + if (!found)
  50082. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Pools selected for depletion are not used."));
  50083. + else
  50084. + found = FALSE;
  50085. + }
  50086. + }
  50087. + /* check that the number of pools that we have checked is equal to the number announced by the user */
  50088. + if (count != p_FmBufPoolDepletion->numOfPools)
  50089. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufPoolDepletion.numOfPools is larger than the number of pools defined."));
  50090. + }
  50091. +
  50092. + if (p_FmBufPoolDepletion && p_FmBufPoolDepletion->singlePoolModeEnable)
  50093. + {
  50094. + /* calculate vector for number of pools depletion */
  50095. + found = FALSE;
  50096. + count = 0;
  50097. + for (i=0;i<BM_MAX_NUM_OF_POOLS;i++)
  50098. + {
  50099. + if (p_FmBufPoolDepletion->poolsToConsiderForSingleMode[i])
  50100. + {
  50101. + for (j=0;j<p_FmExtPools->numOfPoolsUsed;j++)
  50102. + {
  50103. + if (i == p_FmExtPools->extBufPool[j].id)
  50104. + {
  50105. + found = TRUE;
  50106. + count++;
  50107. + break;
  50108. + }
  50109. + }
  50110. + if (!found)
  50111. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Pools selected for depletion are not used."));
  50112. + else
  50113. + found = FALSE;
  50114. + }
  50115. + }
  50116. + if (!count)
  50117. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("No pools defined for single buffer mode pool depletion."));
  50118. + }
  50119. +
  50120. + return E_OK;
  50121. +}
  50122. +
  50123. +t_Error FmSpCheckIntContextParams(t_FmSpIntContextDataCopy *p_FmSpIntContextDataCopy)
  50124. +{
  50125. + /* Check that divisible by 16 and not larger than 240 */
  50126. + if (p_FmSpIntContextDataCopy->intContextOffset >MAX_INT_OFFSET)
  50127. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.intContextOffset can't be larger than %d", MAX_INT_OFFSET));
  50128. + if (p_FmSpIntContextDataCopy->intContextOffset % OFFSET_UNITS)
  50129. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.intContextOffset has to be divisible by %d", OFFSET_UNITS));
  50130. +
  50131. + /* check that ic size+ic internal offset, does not exceed ic block size */
  50132. + if (p_FmSpIntContextDataCopy->size + p_FmSpIntContextDataCopy->intContextOffset > MAX_IC_SIZE)
  50133. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.size + intContext.intContextOffset has to be smaller than %d", MAX_IC_SIZE));
  50134. + /* Check that divisible by 16 and not larger than 256 */
  50135. + if (p_FmSpIntContextDataCopy->size % OFFSET_UNITS)
  50136. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.size has to be divisible by %d", OFFSET_UNITS));
  50137. +
  50138. + /* Check that divisible by 16 and not larger than 4K */
  50139. + if (p_FmSpIntContextDataCopy->extBufOffset > MAX_EXT_OFFSET)
  50140. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.extBufOffset can't be larger than %d", MAX_EXT_OFFSET));
  50141. + if (p_FmSpIntContextDataCopy->extBufOffset % OFFSET_UNITS)
  50142. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("intContext.extBufOffset has to be divisible by %d", OFFSET_UNITS));
  50143. +
  50144. + return E_OK;
  50145. +}
  50146. +
  50147. +t_Error FmSpCheckBufMargins(t_FmSpBufMargins *p_FmSpBufMargins)
  50148. +{
  50149. + /* Check the margin definition */
  50150. + if (p_FmSpBufMargins->startMargins > MAX_EXT_BUFFER_OFFSET)
  50151. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufMargins.startMargins can't be larger than %d", MAX_EXT_BUFFER_OFFSET));
  50152. + if (p_FmSpBufMargins->endMargins > MAX_EXT_BUFFER_OFFSET)
  50153. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("bufMargins.endMargins can't be larger than %d", MAX_EXT_BUFFER_OFFSET));
  50154. +
  50155. + return E_OK;
  50156. +}
  50157. +
  50158. +t_Error FmSpBuildBufferStructure(t_FmSpIntContextDataCopy *p_FmSpIntContextDataCopy,
  50159. + t_FmBufferPrefixContent *p_BufferPrefixContent,
  50160. + t_FmSpBufMargins *p_FmSpBufMargins,
  50161. + t_FmSpBufferOffsets *p_FmSpBufferOffsets,
  50162. + uint8_t *internalBufferOffset)
  50163. +{
  50164. + uint32_t tmp;
  50165. +
  50166. + SANITY_CHECK_RETURN_ERROR(p_FmSpIntContextDataCopy, E_INVALID_VALUE);
  50167. + ASSERT_COND(p_FmSpIntContextDataCopy);
  50168. + ASSERT_COND(p_BufferPrefixContent);
  50169. + ASSERT_COND(p_FmSpBufMargins);
  50170. + ASSERT_COND(p_FmSpBufferOffsets);
  50171. +
  50172. + /* Align start of internal context data to 16 byte */
  50173. + p_FmSpIntContextDataCopy->extBufOffset =
  50174. + (uint16_t)((p_BufferPrefixContent->privDataSize & (OFFSET_UNITS-1)) ?
  50175. + ((p_BufferPrefixContent->privDataSize + OFFSET_UNITS) & ~(uint16_t)(OFFSET_UNITS-1)) :
  50176. + p_BufferPrefixContent->privDataSize);
  50177. +
  50178. + /* Translate margin and intContext params to FM parameters */
  50179. + /* Initialize with illegal value. Later we'll set legal values. */
  50180. + p_FmSpBufferOffsets->prsResultOffset = (uint32_t)ILLEGAL_BASE;
  50181. + p_FmSpBufferOffsets->timeStampOffset = (uint32_t)ILLEGAL_BASE;
  50182. + p_FmSpBufferOffsets->hashResultOffset= (uint32_t)ILLEGAL_BASE;
  50183. + p_FmSpBufferOffsets->pcdInfoOffset = (uint32_t)ILLEGAL_BASE;
  50184. +
  50185. + /* Internally the driver supports 4 options
  50186. + 1. prsResult/timestamp/hashResult selection (in fact 8 options, but for simplicity we'll
  50187. + relate to it as 1).
  50188. + 2. All IC context (from AD) not including debug.*/
  50189. +
  50190. + /* This 'if' covers option 2. We copy from beginning of context. */
  50191. + if (p_BufferPrefixContent->passAllOtherPCDInfo)
  50192. + {
  50193. + p_FmSpIntContextDataCopy->size = 128; /* must be aligned to 16 */
  50194. + /* Start copying data after 16 bytes (FD) from the beginning of the internal context */
  50195. + p_FmSpIntContextDataCopy->intContextOffset = 16;
  50196. +
  50197. + if (p_BufferPrefixContent->passAllOtherPCDInfo)
  50198. + p_FmSpBufferOffsets->pcdInfoOffset = p_FmSpIntContextDataCopy->extBufOffset;
  50199. + if (p_BufferPrefixContent->passPrsResult)
  50200. + p_FmSpBufferOffsets->prsResultOffset =
  50201. + (uint32_t)(p_FmSpIntContextDataCopy->extBufOffset + 16);
  50202. + if (p_BufferPrefixContent->passTimeStamp)
  50203. + p_FmSpBufferOffsets->timeStampOffset =
  50204. + (uint32_t)(p_FmSpIntContextDataCopy->extBufOffset + 48);
  50205. + if (p_BufferPrefixContent->passHashResult)
  50206. + p_FmSpBufferOffsets->hashResultOffset =
  50207. + (uint32_t)(p_FmSpIntContextDataCopy->extBufOffset + 56);
  50208. + }
  50209. + else
  50210. + {
  50211. + /* This case covers the options under 1 */
  50212. + /* Copy size must be in 16-byte granularity. */
  50213. + p_FmSpIntContextDataCopy->size =
  50214. + (uint16_t)((p_BufferPrefixContent->passPrsResult ? 32 : 0) +
  50215. + ((p_BufferPrefixContent->passTimeStamp ||
  50216. + p_BufferPrefixContent->passHashResult) ? 16 : 0));
  50217. +
  50218. + /* Align start of internal context data to 16 byte */
  50219. + p_FmSpIntContextDataCopy->intContextOffset =
  50220. + (uint8_t)(p_BufferPrefixContent->passPrsResult ? 32 :
  50221. + ((p_BufferPrefixContent->passTimeStamp ||
  50222. + p_BufferPrefixContent->passHashResult) ? 64 : 0));
  50223. +
  50224. + if (p_BufferPrefixContent->passPrsResult)
  50225. + p_FmSpBufferOffsets->prsResultOffset = p_FmSpIntContextDataCopy->extBufOffset;
  50226. + if (p_BufferPrefixContent->passTimeStamp)
  50227. + p_FmSpBufferOffsets->timeStampOffset = p_BufferPrefixContent->passPrsResult ?
  50228. + (p_FmSpIntContextDataCopy->extBufOffset + sizeof(t_FmPrsResult)) :
  50229. + p_FmSpIntContextDataCopy->extBufOffset;
  50230. + if (p_BufferPrefixContent->passHashResult)
  50231. + /* If PR is not requested, whether TS is requested or not, IC will be copied from TS */
  50232. + p_FmSpBufferOffsets->hashResultOffset = p_BufferPrefixContent->passPrsResult ?
  50233. + (p_FmSpIntContextDataCopy->extBufOffset + sizeof(t_FmPrsResult) + 8) :
  50234. + p_FmSpIntContextDataCopy->extBufOffset + 8;
  50235. + }
  50236. +
  50237. + if (p_FmSpIntContextDataCopy->size)
  50238. + p_FmSpBufMargins->startMargins =
  50239. + (uint16_t)(p_FmSpIntContextDataCopy->extBufOffset +
  50240. + p_FmSpIntContextDataCopy->size);
  50241. + else
  50242. + /* No Internal Context passing, STartMargin is immediately after privateInfo */
  50243. + p_FmSpBufMargins->startMargins = p_BufferPrefixContent->privDataSize;
  50244. +
  50245. + /* save extra space for manip in both external and internal buffers */
  50246. + if (p_BufferPrefixContent->manipExtraSpace)
  50247. + {
  50248. + uint8_t extraSpace;
  50249. +#ifdef FM_CAPWAP_SUPPORT
  50250. + if ((p_BufferPrefixContent->manipExtraSpace + CAPWAP_FRAG_EXTRA_SPACE) >= 256)
  50251. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  50252. + ("p_BufferPrefixContent->manipExtraSpace should be less than %d",
  50253. + 256-CAPWAP_FRAG_EXTRA_SPACE));
  50254. + extraSpace = (uint8_t)(p_BufferPrefixContent->manipExtraSpace + CAPWAP_FRAG_EXTRA_SPACE);
  50255. +#else
  50256. + extraSpace = p_BufferPrefixContent->manipExtraSpace;
  50257. +#endif /* FM_CAPWAP_SUPPORT */
  50258. + p_FmSpBufferOffsets->manipOffset = p_FmSpBufMargins->startMargins;
  50259. + p_FmSpBufMargins->startMargins += extraSpace;
  50260. + *internalBufferOffset = extraSpace;
  50261. + }
  50262. +
  50263. + /* align data start */
  50264. + tmp = (uint32_t)(p_FmSpBufMargins->startMargins % p_BufferPrefixContent->dataAlign);
  50265. + if (tmp)
  50266. + p_FmSpBufMargins->startMargins += (p_BufferPrefixContent->dataAlign-tmp);
  50267. + p_FmSpBufferOffsets->dataOffset = p_FmSpBufMargins->startMargins;
  50268. +
  50269. + return E_OK;
  50270. +}
  50271. +/*********************** End of inter-module routines ************************/
  50272. +
  50273. +
  50274. +#if (DPAA_VERSION >= 11)
  50275. +/*****************************************************************************/
  50276. +/* API routines */
  50277. +/*****************************************************************************/
  50278. +t_Handle FM_VSP_Config(t_FmVspParams *p_FmVspParams)
  50279. +{
  50280. + t_FmVspEntry *p_FmVspEntry = NULL;
  50281. + struct fm_storage_profile_params fm_vsp_params;
  50282. +
  50283. + p_FmVspEntry = (t_FmVspEntry *)XX_Malloc(sizeof(t_FmVspEntry));
  50284. + if (!p_FmVspEntry)
  50285. + {
  50286. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_StorageProfile allocation failed"));
  50287. + return NULL;
  50288. + }
  50289. + memset(p_FmVspEntry, 0, sizeof(t_FmVspEntry));
  50290. +
  50291. + p_FmVspEntry->p_FmVspEntryDriverParams = (t_FmVspEntryDriverParams *)XX_Malloc(sizeof(t_FmVspEntryDriverParams));
  50292. + if (!p_FmVspEntry->p_FmVspEntryDriverParams)
  50293. + {
  50294. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("p_StorageProfile allocation failed"));
  50295. + XX_Free(p_FmVspEntry);
  50296. + return NULL;
  50297. + }
  50298. + memset(p_FmVspEntry->p_FmVspEntryDriverParams, 0, sizeof(t_FmVspEntryDriverParams));
  50299. + fman_vsp_defconfig(&fm_vsp_params);
  50300. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaHeaderCacheAttr = fm_vsp_params.header_cache_attr;
  50301. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaIntContextCacheAttr = fm_vsp_params.int_context_cache_attr;
  50302. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaScatterGatherCacheAttr = fm_vsp_params.scatter_gather_cache_attr;
  50303. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaSwapData = fm_vsp_params.dma_swap_data;
  50304. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaWriteOptimize = fm_vsp_params.dma_write_optimize;
  50305. + p_FmVspEntry->p_FmVspEntryDriverParams->noScatherGather = fm_vsp_params.no_scather_gather;
  50306. + p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.privDataSize = DEFAULT_FM_SP_bufferPrefixContent_privDataSize;
  50307. + p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.passPrsResult= DEFAULT_FM_SP_bufferPrefixContent_passPrsResult;
  50308. + p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.passTimeStamp= DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp;
  50309. + p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.passAllOtherPCDInfo
  50310. + = DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp;
  50311. + p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.dataAlign = DEFAULT_FM_SP_bufferPrefixContent_dataAlign;
  50312. + p_FmVspEntry->p_FmVspEntryDriverParams->liodnOffset = p_FmVspParams->liodnOffset;
  50313. +
  50314. + memcpy(&p_FmVspEntry->p_FmVspEntryDriverParams->extBufPools, &p_FmVspParams->extBufPools, sizeof(t_FmExtPools));
  50315. + p_FmVspEntry->h_Fm = p_FmVspParams->h_Fm;
  50316. + p_FmVspEntry->portType = p_FmVspParams->portParams.portType;
  50317. + p_FmVspEntry->portId = p_FmVspParams->portParams.portId;
  50318. +
  50319. + p_FmVspEntry->relativeProfileId = p_FmVspParams->relativeProfileId;
  50320. +
  50321. + return p_FmVspEntry;
  50322. +}
  50323. +
  50324. +t_Error FM_VSP_Init(t_Handle h_FmVsp)
  50325. +{
  50326. +
  50327. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry *)h_FmVsp;
  50328. + struct fm_storage_profile_params fm_vsp_params;
  50329. + uint8_t orderedArray[FM_PORT_MAX_NUM_OF_EXT_POOLS];
  50330. + uint16_t sizesArray[BM_MAX_NUM_OF_POOLS];
  50331. + t_Error err;
  50332. + uint16_t absoluteProfileId = 0;
  50333. + int i = 0;
  50334. +
  50335. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50336. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams,E_INVALID_HANDLE);
  50337. +
  50338. + CHECK_INIT_PARAMETERS(p_FmVspEntry, CheckParams);
  50339. +
  50340. + memset(&orderedArray, 0, sizeof(uint8_t) * FM_PORT_MAX_NUM_OF_EXT_POOLS);
  50341. + memset(&sizesArray, 0, sizeof(uint16_t) * BM_MAX_NUM_OF_POOLS);
  50342. +
  50343. + err = FmSpBuildBufferStructure(&p_FmVspEntry->intContext,
  50344. + &p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent,
  50345. + &p_FmVspEntry->bufMargins,
  50346. + &p_FmVspEntry->bufferOffsets,
  50347. + &p_FmVspEntry->internalBufferOffset);
  50348. + if (err != E_OK)
  50349. + RETURN_ERROR(MAJOR, err, NO_MSG);
  50350. +
  50351. +
  50352. + err = CheckParamsGeneratedInternally(p_FmVspEntry);
  50353. + if (err != E_OK)
  50354. + RETURN_ERROR(MAJOR, err, NO_MSG);
  50355. +
  50356. +
  50357. + p_FmVspEntry->p_FmSpRegsBase =
  50358. + (struct fm_pcd_storage_profile_regs *)FmGetVSPBaseAddr(p_FmVspEntry->h_Fm);
  50359. + if (!p_FmVspEntry->p_FmSpRegsBase)
  50360. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("impossible to initialize SpRegsBase"));
  50361. +
  50362. + /* order external buffer pools in ascending order of buffer pools sizes */
  50363. + FmSpSetBufPoolsInAscOrderOfBufSizes(&(p_FmVspEntry->p_FmVspEntryDriverParams)->extBufPools,
  50364. + orderedArray,
  50365. + sizesArray);
  50366. +
  50367. + p_FmVspEntry->extBufPools.numOfPoolsUsed =
  50368. + p_FmVspEntry->p_FmVspEntryDriverParams->extBufPools.numOfPoolsUsed;
  50369. + for (i = 0; i < p_FmVspEntry->extBufPools.numOfPoolsUsed; i++)
  50370. + {
  50371. + p_FmVspEntry->extBufPools.extBufPool[i].id = orderedArray[i];
  50372. + p_FmVspEntry->extBufPools.extBufPool[i].size = sizesArray[orderedArray[i]];
  50373. + }
  50374. +
  50375. + /* on user responsibility to fill it according requirement */
  50376. + memset(&fm_vsp_params, 0, sizeof(struct fm_storage_profile_params));
  50377. + fm_vsp_params.dma_swap_data = p_FmVspEntry->p_FmVspEntryDriverParams->dmaSwapData;
  50378. + fm_vsp_params.int_context_cache_attr = p_FmVspEntry->p_FmVspEntryDriverParams->dmaIntContextCacheAttr;
  50379. + fm_vsp_params.header_cache_attr = p_FmVspEntry->p_FmVspEntryDriverParams->dmaHeaderCacheAttr;
  50380. + fm_vsp_params.scatter_gather_cache_attr = p_FmVspEntry->p_FmVspEntryDriverParams->dmaScatterGatherCacheAttr;
  50381. + fm_vsp_params.dma_write_optimize = p_FmVspEntry->p_FmVspEntryDriverParams->dmaWriteOptimize;
  50382. + fm_vsp_params.liodn_offset = p_FmVspEntry->p_FmVspEntryDriverParams->liodnOffset;
  50383. + fm_vsp_params.no_scather_gather = p_FmVspEntry->p_FmVspEntryDriverParams->noScatherGather;
  50384. +
  50385. + if (p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion)
  50386. + {
  50387. + fm_vsp_params.buf_pool_depletion.buf_pool_depletion_enabled = TRUE;
  50388. + fm_vsp_params.buf_pool_depletion.pools_grp_mode_enable = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->poolsGrpModeEnable;
  50389. + fm_vsp_params.buf_pool_depletion.num_pools = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->numOfPools;
  50390. + fm_vsp_params.buf_pool_depletion.pools_to_consider = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->poolsToConsider;
  50391. + fm_vsp_params.buf_pool_depletion.single_pool_mode_enable = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->singlePoolModeEnable;
  50392. + fm_vsp_params.buf_pool_depletion.pools_to_consider_for_single_mode = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->poolsToConsiderForSingleMode;
  50393. + fm_vsp_params.buf_pool_depletion.has_pfc_priorities = TRUE;
  50394. + fm_vsp_params.buf_pool_depletion.pfc_priorities_en = p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion->pfcPrioritiesEn;
  50395. + }
  50396. + else
  50397. + fm_vsp_params.buf_pool_depletion.buf_pool_depletion_enabled = FALSE;
  50398. +
  50399. + if (p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools)
  50400. + {
  50401. + fm_vsp_params.backup_pools.num_backup_pools = p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools->numOfBackupPools;
  50402. + fm_vsp_params.backup_pools.pool_ids = p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools->poolIds;
  50403. + }
  50404. + else
  50405. + fm_vsp_params.backup_pools.num_backup_pools = 0;
  50406. +
  50407. + fm_vsp_params.fm_ext_pools.num_pools_used = p_FmVspEntry->extBufPools.numOfPoolsUsed;
  50408. + fm_vsp_params.fm_ext_pools.ext_buf_pool = (struct fman_ext_pool_params*)&p_FmVspEntry->extBufPools.extBufPool;
  50409. + fm_vsp_params.buf_margins = (struct fman_sp_buf_margins*)&p_FmVspEntry->bufMargins;
  50410. + fm_vsp_params.int_context = (struct fman_sp_int_context_data_copy*)&p_FmVspEntry->intContext;
  50411. +
  50412. + /* no check on err - it was checked earlier */
  50413. + FmVSPGetAbsoluteProfileId(p_FmVspEntry->h_Fm,
  50414. + p_FmVspEntry->portType,
  50415. + p_FmVspEntry->portId,
  50416. + p_FmVspEntry->relativeProfileId,
  50417. + &absoluteProfileId);
  50418. +
  50419. + ASSERT_COND(p_FmVspEntry->p_FmSpRegsBase);
  50420. + ASSERT_COND(fm_vsp_params.int_context);
  50421. + ASSERT_COND(fm_vsp_params.buf_margins);
  50422. + ASSERT_COND((absoluteProfileId <= FM_VSP_MAX_NUM_OF_ENTRIES));
  50423. +
  50424. + /* Set all registers related to VSP */
  50425. + fman_vsp_init(p_FmVspEntry->p_FmSpRegsBase, absoluteProfileId, &fm_vsp_params,FM_PORT_MAX_NUM_OF_EXT_POOLS, BM_MAX_NUM_OF_POOLS, FM_MAX_NUM_OF_PFC_PRIORITIES);
  50426. +
  50427. + p_FmVspEntry->absoluteSpId = absoluteProfileId;
  50428. +
  50429. + if (p_FmVspEntry->p_FmVspEntryDriverParams)
  50430. + XX_Free(p_FmVspEntry->p_FmVspEntryDriverParams);
  50431. + p_FmVspEntry->p_FmVspEntryDriverParams = NULL;
  50432. +
  50433. + return E_OK;
  50434. +}
  50435. +
  50436. +t_Error FM_VSP_Free(t_Handle h_FmVsp)
  50437. +{
  50438. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry *)h_FmVsp;
  50439. + SANITY_CHECK_RETURN_ERROR(h_FmVsp, E_INVALID_HANDLE);
  50440. + XX_Free(p_FmVspEntry);
  50441. + return E_OK;
  50442. +}
  50443. +
  50444. +t_Error FM_VSP_ConfigBufferPrefixContent(t_Handle h_FmVsp, t_FmBufferPrefixContent *p_FmBufferPrefixContent)
  50445. +{
  50446. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50447. +
  50448. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50449. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50450. +
  50451. + memcpy(&p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent, p_FmBufferPrefixContent, sizeof(t_FmBufferPrefixContent));
  50452. + /* if dataAlign was not initialized by user, we return to driver's default */
  50453. + if (!p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.dataAlign)
  50454. + p_FmVspEntry->p_FmVspEntryDriverParams->bufferPrefixContent.dataAlign = DEFAULT_FM_SP_bufferPrefixContent_dataAlign;
  50455. +
  50456. + return E_OK;
  50457. +}
  50458. +
  50459. +t_Error FM_VSP_ConfigDmaSwapData(t_Handle h_FmVsp, e_FmDmaSwapOption swapData)
  50460. +{
  50461. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50462. +
  50463. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50464. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50465. +
  50466. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaSwapData = swapData;
  50467. +
  50468. + return E_OK;
  50469. +}
  50470. +
  50471. +t_Error FM_VSP_ConfigDmaIcCacheAttr(t_Handle h_FmVsp, e_FmDmaCacheOption intContextCacheAttr)
  50472. +{
  50473. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50474. +
  50475. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50476. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50477. +
  50478. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaIntContextCacheAttr = intContextCacheAttr;
  50479. +
  50480. + return E_OK;
  50481. +}
  50482. +
  50483. +t_Error FM_VSP_ConfigDmaHdrAttr(t_Handle h_FmVsp, e_FmDmaCacheOption headerCacheAttr)
  50484. +{
  50485. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50486. +
  50487. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50488. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50489. +
  50490. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaHeaderCacheAttr = headerCacheAttr;
  50491. +
  50492. + return E_OK;
  50493. +}
  50494. +
  50495. +t_Error FM_VSP_ConfigDmaScatterGatherAttr(t_Handle h_FmVsp, e_FmDmaCacheOption scatterGatherCacheAttr)
  50496. +{
  50497. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50498. +
  50499. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50500. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50501. +
  50502. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaScatterGatherCacheAttr = scatterGatherCacheAttr;
  50503. +
  50504. + return E_OK;
  50505. +}
  50506. +
  50507. +t_Error FM_VSP_ConfigDmaWriteOptimize(t_Handle h_FmVsp, bool optimize)
  50508. +{
  50509. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50510. +
  50511. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50512. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50513. +
  50514. +
  50515. + p_FmVspEntry->p_FmVspEntryDriverParams->dmaWriteOptimize = optimize;
  50516. +
  50517. + return E_OK;
  50518. +}
  50519. +
  50520. +t_Error FM_VSP_ConfigNoScatherGather(t_Handle h_FmVsp, bool noScatherGather)
  50521. +{
  50522. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50523. +
  50524. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry, E_INVALID_HANDLE);
  50525. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50526. +
  50527. +
  50528. + p_FmVspEntry->p_FmVspEntryDriverParams->noScatherGather = noScatherGather;
  50529. +
  50530. + return E_OK;
  50531. +}
  50532. +
  50533. +t_Error FM_VSP_ConfigPoolDepletion(t_Handle h_FmVsp, t_FmBufPoolDepletion *p_BufPoolDepletion)
  50534. +{
  50535. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50536. +
  50537. + SANITY_CHECK_RETURN_ERROR(h_FmVsp, E_INVALID_HANDLE);
  50538. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50539. + SANITY_CHECK_RETURN_ERROR(p_BufPoolDepletion, E_INVALID_HANDLE);
  50540. +
  50541. + p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion = (t_FmBufPoolDepletion *)XX_Malloc(sizeof(t_FmBufPoolDepletion));
  50542. + if (!p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion)
  50543. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_BufPoolDepletion allocation failed"));
  50544. + memcpy(p_FmVspEntry->p_FmVspEntryDriverParams->p_BufPoolDepletion, p_BufPoolDepletion, sizeof(t_FmBufPoolDepletion));
  50545. +
  50546. + return E_OK;
  50547. +}
  50548. +
  50549. +t_Error FM_VSP_ConfigBackupPools(t_Handle h_FmVsp, t_FmBackupBmPools *p_BackupBmPools)
  50550. +{
  50551. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50552. +
  50553. + SANITY_CHECK_RETURN_ERROR(h_FmVsp, E_INVALID_HANDLE);
  50554. + SANITY_CHECK_RETURN_ERROR(p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_HANDLE);
  50555. + SANITY_CHECK_RETURN_ERROR(p_BackupBmPools, E_INVALID_HANDLE);
  50556. +
  50557. + p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools = (t_FmBackupBmPools *)XX_Malloc(sizeof(t_FmBackupBmPools));
  50558. + if (!p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools)
  50559. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("p_BackupBmPools allocation failed"));
  50560. + memcpy(p_FmVspEntry->p_FmVspEntryDriverParams->p_BackupBmPools, p_BackupBmPools, sizeof(t_FmBackupBmPools));
  50561. +
  50562. + return E_OK;
  50563. +}
  50564. +
  50565. +uint32_t FM_VSP_GetBufferDataOffset(t_Handle h_FmVsp)
  50566. +{
  50567. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50568. +
  50569. + SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, 0);
  50570. + SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, 0);
  50571. +
  50572. + return p_FmVspEntry->bufferOffsets.dataOffset;
  50573. +}
  50574. +
  50575. +uint8_t * FM_VSP_GetBufferICInfo(t_Handle h_FmVsp, char *p_Data)
  50576. +{
  50577. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50578. +
  50579. + SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
  50580. + SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
  50581. +
  50582. + if (p_FmVspEntry->bufferOffsets.pcdInfoOffset == ILLEGAL_BASE)
  50583. + return NULL;
  50584. +
  50585. + return (uint8_t *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.pcdInfoOffset);
  50586. +}
  50587. +
  50588. +t_FmPrsResult * FM_VSP_GetBufferPrsResult(t_Handle h_FmVsp, char *p_Data)
  50589. +{
  50590. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50591. +
  50592. + SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
  50593. + SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
  50594. +
  50595. + if (p_FmVspEntry->bufferOffsets.prsResultOffset == ILLEGAL_BASE)
  50596. + return NULL;
  50597. +
  50598. + return (t_FmPrsResult *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.prsResultOffset);
  50599. +}
  50600. +
  50601. +uint64_t * FM_VSP_GetBufferTimeStamp(t_Handle h_FmVsp, char *p_Data)
  50602. +{
  50603. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50604. +
  50605. + SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
  50606. + SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
  50607. +
  50608. + if (p_FmVspEntry->bufferOffsets.timeStampOffset == ILLEGAL_BASE)
  50609. + return NULL;
  50610. +
  50611. + return (uint64_t *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.timeStampOffset);
  50612. +}
  50613. +
  50614. +uint8_t * FM_VSP_GetBufferHashResult(t_Handle h_FmVsp, char *p_Data)
  50615. +{
  50616. + t_FmVspEntry *p_FmVspEntry = (t_FmVspEntry*)h_FmVsp;
  50617. +
  50618. + SANITY_CHECK_RETURN_VALUE(p_FmVspEntry, E_INVALID_HANDLE, NULL);
  50619. + SANITY_CHECK_RETURN_VALUE(!p_FmVspEntry->p_FmVspEntryDriverParams, E_INVALID_STATE, NULL);
  50620. +
  50621. + if (p_FmVspEntry->bufferOffsets.hashResultOffset == ILLEGAL_BASE)
  50622. + return NULL;
  50623. +
  50624. + return (uint8_t *)PTR_MOVE(p_Data, p_FmVspEntry->bufferOffsets.hashResultOffset);
  50625. +}
  50626. +
  50627. +#endif /* (DPAA_VERSION >= 11) */
  50628. --- /dev/null
  50629. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fm_sp.h
  50630. @@ -0,0 +1,85 @@
  50631. +/*
  50632. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  50633. + *
  50634. + * Redistribution and use in source and binary forms, with or without
  50635. + * modification, are permitted provided that the following conditions are met:
  50636. + * * Redistributions of source code must retain the above copyright
  50637. + * notice, this list of conditions and the following disclaimer.
  50638. + * * Redistributions in binary form must reproduce the above copyright
  50639. + * notice, this list of conditions and the following disclaimer in the
  50640. + * documentation and/or other materials provided with the distribution.
  50641. + * * Neither the name of Freescale Semiconductor nor the
  50642. + * names of its contributors may be used to endorse or promote products
  50643. + * derived from this software without specific prior written permission.
  50644. + *
  50645. + *
  50646. + * ALTERNATIVELY, this software may be distributed under the terms of the
  50647. + * GNU General Public License ("GPL") as published by the Free Software
  50648. + * Foundation, either version 2 of that License or (at your option) any
  50649. + * later version.
  50650. + *
  50651. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  50652. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  50653. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  50654. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  50655. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  50656. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  50657. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  50658. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  50659. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  50660. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  50661. + */
  50662. +
  50663. +
  50664. +/******************************************************************************
  50665. + @File fm_sp.h
  50666. +
  50667. + @Description FM SP ...
  50668. +*//***************************************************************************/
  50669. +#ifndef __FM_SP_H
  50670. +#define __FM_SP_H
  50671. +
  50672. +#include "std_ext.h"
  50673. +#include "error_ext.h"
  50674. +#include "list_ext.h"
  50675. +
  50676. +#include "fm_sp_common.h"
  50677. +#include "fm_common.h"
  50678. +
  50679. +
  50680. +#define __ERR_MODULE__ MODULE_FM_SP
  50681. +
  50682. +typedef struct {
  50683. + t_FmBufferPrefixContent bufferPrefixContent;
  50684. + e_FmDmaSwapOption dmaSwapData;
  50685. + e_FmDmaCacheOption dmaIntContextCacheAttr;
  50686. + e_FmDmaCacheOption dmaHeaderCacheAttr;
  50687. + e_FmDmaCacheOption dmaScatterGatherCacheAttr;
  50688. + bool dmaWriteOptimize;
  50689. + uint16_t liodnOffset;
  50690. + bool noScatherGather;
  50691. + t_FmBufPoolDepletion *p_BufPoolDepletion;
  50692. + t_FmBackupBmPools *p_BackupBmPools;
  50693. + t_FmExtPools extBufPools;
  50694. +} t_FmVspEntryDriverParams;
  50695. +
  50696. +typedef struct {
  50697. + bool valid;
  50698. + volatile bool lock;
  50699. + uint8_t pointedOwners;
  50700. + uint16_t absoluteSpId;
  50701. + uint8_t internalBufferOffset;
  50702. + t_FmSpBufMargins bufMargins;
  50703. + t_FmSpIntContextDataCopy intContext;
  50704. + t_FmSpBufferOffsets bufferOffsets;
  50705. + t_Handle h_Fm;
  50706. + e_FmPortType portType; /**< Port type */
  50707. + uint8_t portId; /**< Port Id - relative to type */
  50708. + uint8_t relativeProfileId;
  50709. + struct fm_pcd_storage_profile_regs *p_FmSpRegsBase;
  50710. + t_FmExtPools extBufPools;
  50711. + t_FmVspEntryDriverParams *p_FmVspEntryDriverParams;
  50712. +} t_FmVspEntry;
  50713. +
  50714. +
  50715. +#endif /* __FM_SP_H */
  50716. --- /dev/null
  50717. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/SP/fman_sp.c
  50718. @@ -0,0 +1,197 @@
  50719. +/*
  50720. + * Copyright 2013 Freescale Semiconductor Inc.
  50721. + *
  50722. + * Redistribution and use in source and binary forms, with or without
  50723. + * modification, are permitted provided that the following conditions are met:
  50724. + * * Redistributions of source code must retain the above copyright
  50725. + * notice, this list of conditions and the following disclaimer.
  50726. + * * Redistributions in binary form must reproduce the above copyright
  50727. + * notice, this list of conditions and the following disclaimer in the
  50728. + * documentation and/or other materials provided with the distribution.
  50729. + * * Neither the name of Freescale Semiconductor nor the
  50730. + * names of its contributors may be used to endorse or promote products
  50731. + * derived from this software without specific prior written permission.
  50732. + *
  50733. + *
  50734. + * ALTERNATIVELY, this software may be distributed under the terms of the
  50735. + * GNU General Public License ("GPL") as published by the Free Software
  50736. + * Foundation, either version 2 of that License or (at your option) any
  50737. + * later version.
  50738. + *
  50739. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  50740. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  50741. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  50742. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  50743. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  50744. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  50745. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  50746. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  50747. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  50748. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  50749. + */
  50750. +
  50751. +#include "fsl_fman_sp.h"
  50752. +
  50753. +
  50754. +uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs *regs,
  50755. + uint16_t index)
  50756. +{
  50757. + struct fm_pcd_storage_profile_regs *sp_regs;
  50758. + sp_regs = &regs[index];
  50759. + return ioread32be(&sp_regs->fm_sp_acnt);
  50760. +}
  50761. +
  50762. +void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs,
  50763. + uint16_t index, uint32_t value)
  50764. +{
  50765. + struct fm_pcd_storage_profile_regs *sp_regs;
  50766. + sp_regs = &regs[index];
  50767. + iowrite32be(value, &sp_regs->fm_sp_acnt);
  50768. +}
  50769. +
  50770. +void fman_vsp_defconfig(struct fm_storage_profile_params *cfg)
  50771. +{
  50772. + cfg->dma_swap_data =
  50773. + DEFAULT_FMAN_SP_DMA_SWAP_DATA;
  50774. + cfg->int_context_cache_attr =
  50775. + DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR;
  50776. + cfg->header_cache_attr =
  50777. + DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR;
  50778. + cfg->scatter_gather_cache_attr =
  50779. + DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR;
  50780. + cfg->dma_write_optimize =
  50781. + DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE;
  50782. + cfg->no_scather_gather =
  50783. + DEFAULT_FMAN_SP_NO_SCATTER_GATHER;
  50784. +}
  50785. +
  50786. +static inline uint32_t calc_vec_dep(int max_pools, bool *pools,
  50787. + struct fman_ext_pools *ext_buf_pools, uint32_t mask)
  50788. +{
  50789. + int i, j;
  50790. + uint32_t vector = 0;
  50791. + for (i = 0; i < max_pools; i++)
  50792. + if (pools[i])
  50793. + for (j = 0; j < ext_buf_pools->num_pools_used; j++)
  50794. + if (i == ext_buf_pools->ext_buf_pool[j].id) {
  50795. + vector |= mask >> j;
  50796. + break;
  50797. + }
  50798. + return vector;
  50799. +}
  50800. +
  50801. +void fman_vsp_init(struct fm_pcd_storage_profile_regs *regs,
  50802. + uint16_t index, struct fm_storage_profile_params *fm_vsp_params,
  50803. + int port_max_num_of_ext_pools, int bm_max_num_of_pools,
  50804. + int max_num_of_pfc_priorities)
  50805. +{
  50806. + int i = 0, j = 0;
  50807. + struct fm_pcd_storage_profile_regs *sp_regs;
  50808. + uint32_t tmp_reg, vector;
  50809. + struct fman_ext_pools *ext_buf_pools = &fm_vsp_params->fm_ext_pools;
  50810. + struct fman_buf_pool_depletion *buf_pool_depletion =
  50811. + &fm_vsp_params->buf_pool_depletion;
  50812. + struct fman_backup_bm_pools *backup_pools =
  50813. + &fm_vsp_params->backup_pools;
  50814. + struct fman_sp_int_context_data_copy *int_context_data_copy =
  50815. + fm_vsp_params->int_context;
  50816. + struct fman_sp_buf_margins *external_buffer_margins =
  50817. + fm_vsp_params->buf_margins;
  50818. + bool no_scather_gather = fm_vsp_params->no_scather_gather;
  50819. + uint16_t liodn_offset = fm_vsp_params->liodn_offset;
  50820. +
  50821. + sp_regs = &regs[index];
  50822. +
  50823. + /* fill external buffers manager pool information register*/
  50824. + for (i = 0; i < ext_buf_pools->num_pools_used; i++) {
  50825. + tmp_reg = FMAN_SP_EXT_BUF_POOL_VALID |
  50826. + FMAN_SP_EXT_BUF_POOL_EN_COUNTER;
  50827. + tmp_reg |= ((uint32_t)ext_buf_pools->ext_buf_pool[i].id <<
  50828. + FMAN_SP_EXT_BUF_POOL_ID_SHIFT);
  50829. + tmp_reg |= ext_buf_pools->ext_buf_pool[i].size;
  50830. + /* functionality available only for some deriviatives
  50831. + (limited by config) */
  50832. + for (j = 0; j < backup_pools->num_backup_pools; j++)
  50833. + if (ext_buf_pools->ext_buf_pool[i].id ==
  50834. + backup_pools->pool_ids[j]) {
  50835. + tmp_reg |= FMAN_SP_EXT_BUF_POOL_BACKUP;
  50836. + break;
  50837. + }
  50838. + iowrite32be(tmp_reg, &sp_regs->fm_sp_ebmpi[i]);
  50839. + }
  50840. +
  50841. + /* clear unused pools */
  50842. + for (i = ext_buf_pools->num_pools_used;
  50843. + i < port_max_num_of_ext_pools; i++)
  50844. + iowrite32be(0, &sp_regs->fm_sp_ebmpi[i]);
  50845. +
  50846. + /* fill pool depletion register*/
  50847. + tmp_reg = 0;
  50848. + if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->pools_grp_mode_enable) {
  50849. + /* calculate vector for number of pools depletion */
  50850. + vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->
  50851. + pools_to_consider, ext_buf_pools, 0x80000000);
  50852. +
  50853. + /* configure num of pools and vector for number of pools mode */
  50854. + tmp_reg |= (((uint32_t)buf_pool_depletion->num_pools - 1) <<
  50855. + FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT);
  50856. + tmp_reg |= vector;
  50857. + }
  50858. +
  50859. + if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->single_pool_mode_enable) {
  50860. + /* calculate vector for number of pools depletion */
  50861. + vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->
  50862. + pools_to_consider_for_single_mode,
  50863. + ext_buf_pools, 0x00000080);
  50864. +
  50865. + /* configure num of pools and vector for number of pools mode */
  50866. + tmp_reg |= vector;
  50867. + }
  50868. +
  50869. + /* fill QbbPEV */
  50870. + if (buf_pool_depletion->buf_pool_depletion_enabled) {
  50871. + vector = 0;
  50872. + for (i = 0; i < max_num_of_pfc_priorities; i++)
  50873. + if (buf_pool_depletion->pfc_priorities_en[i] == TRUE)
  50874. + vector |= 0x00000100 << i;
  50875. + tmp_reg |= vector;
  50876. + }
  50877. + iowrite32be(tmp_reg, &sp_regs->fm_sp_mpd);
  50878. +
  50879. + /* fill dma attributes register */
  50880. + tmp_reg = 0;
  50881. + tmp_reg |= (uint32_t)fm_vsp_params->dma_swap_data <<
  50882. + FMAN_SP_DMA_ATTR_SWP_SHIFT;
  50883. + tmp_reg |= (uint32_t)fm_vsp_params->int_context_cache_attr <<
  50884. + FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT;
  50885. + tmp_reg |= (uint32_t)fm_vsp_params->header_cache_attr <<
  50886. + FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT;
  50887. + tmp_reg |= (uint32_t)fm_vsp_params->scatter_gather_cache_attr <<
  50888. + FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT;
  50889. + if (fm_vsp_params->dma_write_optimize)
  50890. + tmp_reg |= FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE;
  50891. + iowrite32be(tmp_reg, &sp_regs->fm_sp_da);
  50892. +
  50893. + /* IC parameters - fill internal context parameters register */
  50894. + tmp_reg = 0;
  50895. + tmp_reg |= (((uint32_t)int_context_data_copy->ext_buf_offset/
  50896. + OFFSET_UNITS) << FMAN_SP_IC_TO_EXT_SHIFT);
  50897. + tmp_reg |= (((uint32_t)int_context_data_copy->int_context_offset/
  50898. + OFFSET_UNITS) << FMAN_SP_IC_FROM_INT_SHIFT);
  50899. + tmp_reg |= (((uint32_t)int_context_data_copy->size/OFFSET_UNITS) <<
  50900. + FMAN_SP_IC_SIZE_SHIFT);
  50901. + iowrite32be(tmp_reg, &sp_regs->fm_sp_icp);
  50902. +
  50903. + /* buffer margins - fill external buffer margins register */
  50904. + tmp_reg = 0;
  50905. + tmp_reg |= (((uint32_t)external_buffer_margins->start_margins) <<
  50906. + FMAN_SP_EXT_BUF_MARG_START_SHIFT);
  50907. + tmp_reg |= (((uint32_t)external_buffer_margins->end_margins) <<
  50908. + FMAN_SP_EXT_BUF_MARG_END_SHIFT);
  50909. + if (no_scather_gather)
  50910. + tmp_reg |= FMAN_SP_SG_DISABLE;
  50911. + iowrite32be(tmp_reg, &sp_regs->fm_sp_ebm);
  50912. +
  50913. + /* buffer margins - fill spliodn register */
  50914. + iowrite32be(liodn_offset, &sp_regs->fm_sp_spliodn);
  50915. +}
  50916. --- /dev/null
  50917. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.c
  50918. @@ -0,0 +1,5195 @@
  50919. +/*
  50920. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  50921. + *
  50922. + * Redistribution and use in source and binary forms, with or without
  50923. + * modification, are permitted provided that the following conditions are met:
  50924. + * * Redistributions of source code must retain the above copyright
  50925. + * notice, this list of conditions and the following disclaimer.
  50926. + * * Redistributions in binary form must reproduce the above copyright
  50927. + * notice, this list of conditions and the following disclaimer in the
  50928. + * documentation and/or other materials provided with the distribution.
  50929. + * * Neither the name of Freescale Semiconductor nor the
  50930. + * names of its contributors may be used to endorse or promote products
  50931. + * derived from this software without specific prior written permission.
  50932. + *
  50933. + *
  50934. + * ALTERNATIVELY, this software may be distributed under the terms of the
  50935. + * GNU General Public License ("GPL") as published by the Free Software
  50936. + * Foundation, either version 2 of that License or (at your option) any
  50937. + * later version.
  50938. + *
  50939. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  50940. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  50941. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  50942. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  50943. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  50944. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  50945. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  50946. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  50947. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  50948. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  50949. + */
  50950. +
  50951. +
  50952. +/******************************************************************************
  50953. + @File fm.c
  50954. +
  50955. + @Description FM driver routines implementation.
  50956. +*//***************************************************************************/
  50957. +#include "std_ext.h"
  50958. +#include "error_ext.h"
  50959. +#include "xx_ext.h"
  50960. +#include "string_ext.h"
  50961. +#include "sprint_ext.h"
  50962. +#include "debug_ext.h"
  50963. +#include "fm_muram_ext.h"
  50964. +
  50965. +#include "fm_common.h"
  50966. +#include "fm_ipc.h"
  50967. +#include "fm.h"
  50968. +#ifndef CONFIG_FMAN_ARM
  50969. +#include <linux/fsl/svr.h>
  50970. +#endif
  50971. +#include "fsl_fman.h"
  50972. +
  50973. +
  50974. +/****************************************/
  50975. +/* static functions */
  50976. +/****************************************/
  50977. +
  50978. +static volatile bool blockingFlag = FALSE;
  50979. +static void IpcMsgCompletionCB(t_Handle h_Fm,
  50980. + uint8_t *p_Msg,
  50981. + uint8_t *p_Reply,
  50982. + uint32_t replyLength,
  50983. + t_Error status)
  50984. +{
  50985. + UNUSED(h_Fm);UNUSED(p_Msg);UNUSED(p_Reply);UNUSED(replyLength);UNUSED(status);
  50986. + blockingFlag = FALSE;
  50987. +}
  50988. +
  50989. +static void FreeInitResources(t_Fm *p_Fm)
  50990. +{
  50991. + if (p_Fm->camBaseAddr)
  50992. + FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->camBaseAddr));
  50993. + if (p_Fm->fifoBaseAddr)
  50994. + FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->fifoBaseAddr));
  50995. + if (p_Fm->resAddr)
  50996. + FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->resAddr));
  50997. +}
  50998. +
  50999. +static bool IsFmanCtrlCodeLoaded(t_Fm *p_Fm)
  51000. +{
  51001. + t_FMIramRegs *p_Iram;
  51002. +
  51003. + ASSERT_COND(p_Fm);
  51004. + p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
  51005. +
  51006. + return (bool)!!(GET_UINT32(p_Iram->iready) & IRAM_READY);
  51007. +}
  51008. +
  51009. +static t_Error CheckFmParameters(t_Fm *p_Fm)
  51010. +{
  51011. + if (IsFmanCtrlCodeLoaded(p_Fm) && !p_Fm->resetOnInit)
  51012. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Old FMan CTRL code is loaded; FM must be reset!"));
  51013. +#if (DPAA_VERSION < 11)
  51014. + if (!p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats ||
  51015. + (p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats > DMA_MODE_MAX_AXI_DBG_NUM_OF_BEATS))
  51016. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  51017. + ("axiDbgNumOfBeats has to be in the range 1 - %d", DMA_MODE_MAX_AXI_DBG_NUM_OF_BEATS));
  51018. +#endif /* (DPAA_VERSION < 11) */
  51019. + if (p_Fm->p_FmDriverParam->dma_cam_num_of_entries % DMA_CAM_UNITS)
  51020. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_cam_num_of_entries has to be divisble by %d", DMA_CAM_UNITS));
  51021. +// if (!p_Fm->p_FmDriverParam->dma_cam_num_of_entries || (p_Fm->p_FmDriverParam->dma_cam_num_of_entries > DMA_MODE_MAX_CAM_NUM_OF_ENTRIES))
  51022. +// RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_cam_num_of_entries has to be in the range 1 - %d", DMA_MODE_MAX_CAM_NUM_OF_ENTRIES));
  51023. + if (p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer > DMA_THRESH_MAX_COMMQ)
  51024. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_comm_qtsh_asrt_emer can not be larger than %d", DMA_THRESH_MAX_COMMQ));
  51025. + if (p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer > DMA_THRESH_MAX_COMMQ)
  51026. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_comm_qtsh_clr_emer can not be larger than %d", DMA_THRESH_MAX_COMMQ));
  51027. + if (p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer >= p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer)
  51028. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_comm_qtsh_clr_emer must be smaller than dma_comm_qtsh_asrt_emer"));
  51029. +#if (DPAA_VERSION < 11)
  51030. + if (p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer > DMA_THRESH_MAX_BUF)
  51031. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_read_buf_tsh_asrt_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
  51032. + if (p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer > DMA_THRESH_MAX_BUF)
  51033. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_read_buf_tsh_clr_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
  51034. + if (p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer >= p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer)
  51035. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_read_buf_tsh_clr_emer must be smaller than dma_read_buf_tsh_asrt_emer"));
  51036. + if (p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer > DMA_THRESH_MAX_BUF)
  51037. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_write_buf_tsh_asrt_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
  51038. + if (p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer > DMA_THRESH_MAX_BUF)
  51039. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_write_buf_tsh_clr_emer can not be larger than %d", DMA_THRESH_MAX_BUF));
  51040. + if (p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer >= p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer)
  51041. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_write_buf_tsh_clr_emer must be smaller than dma_write_buf_tsh_asrt_emer"));
  51042. +#else /* (DPAA_VERSION >= 11) */
  51043. + if ((p_Fm->p_FmDriverParam->dma_dbg_cnt_mode == E_FMAN_DMA_DBG_CNT_INT_READ_EM)||
  51044. + (p_Fm->p_FmDriverParam->dma_dbg_cnt_mode == E_FMAN_DMA_DBG_CNT_INT_WRITE_EM) ||
  51045. + (p_Fm->p_FmDriverParam->dma_dbg_cnt_mode == E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT))
  51046. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_dbg_cnt_mode value not supported by this integration."));
  51047. + if ((p_Fm->p_FmDriverParam->dma_emergency_bus_select == FM_DMA_MURAM_READ_EMERGENCY)||
  51048. + (p_Fm->p_FmDriverParam->dma_emergency_bus_select == FM_DMA_MURAM_WRITE_EMERGENCY))
  51049. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("emergencyBusSelect value not supported by this integration."));
  51050. + if (p_Fm->p_FmDriverParam->dma_stop_on_bus_error)
  51051. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_stop_on_bus_error not supported by this integration."));
  51052. +#ifdef FM_AID_MODE_NO_TNUM_SW005
  51053. + if (p_Fm->p_FmDriverParam->dma_aid_mode != E_FMAN_DMA_AID_OUT_PORT_ID)
  51054. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_aid_mode not supported by this integration."));
  51055. +#endif /* FM_AID_MODE_NO_TNUM_SW005 */
  51056. + if (p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats)
  51057. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dma_axi_dbg_num_of_beats not supported by this integration."));
  51058. +#endif /* (DPAA_VERSION < 11) */
  51059. +
  51060. + if (!p_Fm->p_FmStateStruct->fmClkFreq)
  51061. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fmClkFreq must be set."));
  51062. + if (USEC_TO_CLK(p_Fm->p_FmDriverParam->dma_watchdog, p_Fm->p_FmStateStruct->fmClkFreq) > DMA_MAX_WATCHDOG)
  51063. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  51064. + ("dma_watchdog depends on FM clock. dma_watchdog(in microseconds) * clk (in Mhz), may not exceed 0x08x", DMA_MAX_WATCHDOG));
  51065. +
  51066. +#if (DPAA_VERSION >= 11)
  51067. + if ((p_Fm->partVSPBase + p_Fm->partNumOfVSPs) > FM_VSP_MAX_NUM_OF_ENTRIES)
  51068. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("partVSPBase+partNumOfVSPs out of range!!!"));
  51069. +#endif /* (DPAA_VERSION >= 11) */
  51070. +
  51071. + if (p_Fm->p_FmStateStruct->totalFifoSize % BMI_FIFO_UNITS)
  51072. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("totalFifoSize number has to be divisible by %d", BMI_FIFO_UNITS));
  51073. + if (!p_Fm->p_FmStateStruct->totalFifoSize ||
  51074. + (p_Fm->p_FmStateStruct->totalFifoSize > BMI_MAX_FIFO_SIZE))
  51075. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  51076. + ("totalFifoSize (currently defined as %d) has to be in the range of 256 to %d",
  51077. + p_Fm->p_FmStateStruct->totalFifoSize,
  51078. + BMI_MAX_FIFO_SIZE));
  51079. + if (!p_Fm->p_FmStateStruct->totalNumOfTasks ||
  51080. + (p_Fm->p_FmStateStruct->totalNumOfTasks > BMI_MAX_NUM_OF_TASKS))
  51081. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("totalNumOfTasks number has to be in the range 1 - %d", BMI_MAX_NUM_OF_TASKS));
  51082. +
  51083. +#ifdef FM_HAS_TOTAL_DMAS
  51084. + if (!p_Fm->p_FmStateStruct->maxNumOfOpenDmas ||
  51085. + (p_Fm->p_FmStateStruct->maxNumOfOpenDmas > BMI_MAX_NUM_OF_DMAS))
  51086. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("maxNumOfOpenDmas number has to be in the range 1 - %d", BMI_MAX_NUM_OF_DMAS));
  51087. +#endif /* FM_HAS_TOTAL_DMAS */
  51088. +
  51089. + if (p_Fm->p_FmDriverParam->disp_limit_tsh > FPM_MAX_DISP_LIMIT)
  51090. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("disp_limit_tsh can't be greater than %d", FPM_MAX_DISP_LIMIT));
  51091. +
  51092. + if (!p_Fm->f_Exception)
  51093. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
  51094. + if (!p_Fm->f_BusError)
  51095. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exceptions callback not provided"));
  51096. +
  51097. +#ifdef FM_NO_WATCHDOG
  51098. + if ((p_Fm->p_FmStateStruct->revInfo.majorRev == 2) &&
  51099. + (p_Fm->p_FmDriverParam->dma_watchdog))
  51100. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("watchdog!"));
  51101. +#endif /* FM_NO_WATCHDOG */
  51102. +
  51103. +#ifdef FM_ECC_HALT_NO_SYNC_ERRATA_10GMAC_A008
  51104. + if ((p_Fm->p_FmStateStruct->revInfo.majorRev < 6) &&
  51105. + (p_Fm->p_FmDriverParam->halt_on_unrecov_ecc_err))
  51106. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("HaltOnEccError!"));
  51107. +#endif /* FM_ECC_HALT_NO_SYNC_ERRATA_10GMAC_A008 */
  51108. +
  51109. +#ifdef FM_NO_TNUM_AGING
  51110. + if ((p_Fm->p_FmStateStruct->revInfo.majorRev != 4) &&
  51111. + (p_Fm->p_FmStateStruct->revInfo.majorRev < 6))
  51112. + if (p_Fm->p_FmDriverParam->tnum_aging_period)
  51113. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("Tnum aging!"));
  51114. +#endif /* FM_NO_TNUM_AGING */
  51115. +
  51116. + /* check that user did not set revision-dependent exceptions */
  51117. +#ifdef FM_NO_DISPATCH_RAM_ECC
  51118. + if ((p_Fm->p_FmStateStruct->revInfo.majorRev != 4) &&
  51119. + (p_Fm->p_FmStateStruct->revInfo.majorRev < 6))
  51120. + if (p_Fm->userSetExceptions & FM_EX_BMI_DISPATCH_RAM_ECC)
  51121. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("exception e_FM_EX_BMI_DISPATCH_RAM_ECC!"));
  51122. +#endif /* FM_NO_DISPATCH_RAM_ECC */
  51123. +
  51124. +#ifdef FM_QMI_NO_ECC_EXCEPTIONS
  51125. + if (p_Fm->p_FmStateStruct->revInfo.majorRev == 4)
  51126. + if (p_Fm->userSetExceptions & (FM_EX_QMI_SINGLE_ECC | FM_EX_QMI_DOUBLE_ECC))
  51127. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("exception e_FM_EX_QMI_SINGLE_ECC/e_FM_EX_QMI_DOUBLE_ECC!"));
  51128. +#endif /* FM_QMI_NO_ECC_EXCEPTIONS */
  51129. +
  51130. +#ifdef FM_QMI_NO_SINGLE_ECC_EXCEPTION
  51131. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  51132. + if (p_Fm->userSetExceptions & FM_EX_QMI_SINGLE_ECC)
  51133. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("exception e_FM_EX_QMI_SINGLE_ECC!"));
  51134. +#endif /* FM_QMI_NO_SINGLE_ECC_EXCEPTION */
  51135. +
  51136. + return E_OK;
  51137. +}
  51138. +
  51139. +
  51140. +static void SendIpcIsr(t_Fm *p_Fm, uint32_t macEvent, uint32_t pendingReg)
  51141. +{
  51142. + ASSERT_COND(p_Fm->guestId == NCSW_MASTER_ID);
  51143. +
  51144. + if (p_Fm->intrMng[macEvent].guestId == NCSW_MASTER_ID)
  51145. + p_Fm->intrMng[macEvent].f_Isr(p_Fm->intrMng[macEvent].h_SrcHandle);
  51146. +
  51147. + /* If the MAC is running on guest-partition and we have IPC session with it,
  51148. + we inform him about the event through IPC; otherwise, we ignore the event. */
  51149. + else if (p_Fm->h_IpcSessions[p_Fm->intrMng[macEvent].guestId])
  51150. + {
  51151. + t_Error err;
  51152. + t_FmIpcIsr fmIpcIsr;
  51153. + t_FmIpcMsg msg;
  51154. +
  51155. + memset(&msg, 0, sizeof(msg));
  51156. + msg.msgId = FM_GUEST_ISR;
  51157. + fmIpcIsr.pendingReg = pendingReg;
  51158. + fmIpcIsr.boolErr = FALSE;
  51159. + memcpy(msg.msgBody, &fmIpcIsr, sizeof(fmIpcIsr));
  51160. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[p_Fm->intrMng[macEvent].guestId],
  51161. + (uint8_t*)&msg,
  51162. + sizeof(msg.msgId) + sizeof(fmIpcIsr),
  51163. + NULL,
  51164. + NULL,
  51165. + NULL,
  51166. + NULL);
  51167. + if (err != E_OK)
  51168. + REPORT_ERROR(MINOR, err, NO_MSG);
  51169. + }
  51170. + else
  51171. + DBG(TRACE, ("FM Guest mode, without IPC - can't call ISR!"));
  51172. +}
  51173. +
  51174. +static void BmiErrEvent(t_Fm *p_Fm)
  51175. +{
  51176. + uint32_t event;
  51177. + struct fman_bmi_regs *bmi_rg = p_Fm->p_FmBmiRegs;
  51178. +
  51179. +
  51180. + event = fman_get_bmi_err_event(bmi_rg);
  51181. +
  51182. + if (event & BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC)
  51183. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_STORAGE_PROFILE_ECC);
  51184. + if (event & BMI_ERR_INTR_EN_LIST_RAM_ECC)
  51185. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_LIST_RAM_ECC);
  51186. + if (event & BMI_ERR_INTR_EN_STATISTICS_RAM_ECC)
  51187. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_STATISTICS_RAM_ECC);
  51188. + if (event & BMI_ERR_INTR_EN_DISPATCH_RAM_ECC)
  51189. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_BMI_DISPATCH_RAM_ECC);
  51190. +}
  51191. +
  51192. +static void QmiErrEvent(t_Fm *p_Fm)
  51193. +{
  51194. + uint32_t event;
  51195. + struct fman_qmi_regs *qmi_rg = p_Fm->p_FmQmiRegs;
  51196. +
  51197. + event = fman_get_qmi_err_event(qmi_rg);
  51198. +
  51199. + if (event & QMI_ERR_INTR_EN_DOUBLE_ECC)
  51200. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_QMI_DOUBLE_ECC);
  51201. + if (event & QMI_ERR_INTR_EN_DEQ_FROM_DEF)
  51202. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID);
  51203. +}
  51204. +
  51205. +static void DmaErrEvent(t_Fm *p_Fm)
  51206. +{
  51207. + uint32_t status, com_id;
  51208. + uint8_t tnum;
  51209. + uint8_t hardwarePortId;
  51210. + uint8_t relativePortId;
  51211. + uint16_t liodn;
  51212. + struct fman_dma_regs *dma_rg = p_Fm->p_FmDmaRegs;
  51213. +
  51214. + status = fman_get_dma_err_event(dma_rg);
  51215. +
  51216. + if (status & DMA_STATUS_BUS_ERR)
  51217. + {
  51218. + com_id = fman_get_dma_com_id(dma_rg);
  51219. + hardwarePortId = (uint8_t)(((com_id & DMA_TRANSFER_PORTID_MASK) >> DMA_TRANSFER_PORTID_SHIFT));
  51220. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  51221. + HW_PORT_ID_TO_SW_PORT_ID(relativePortId, hardwarePortId);
  51222. + tnum = (uint8_t)((com_id & DMA_TRANSFER_TNUM_MASK) >> DMA_TRANSFER_TNUM_SHIFT);
  51223. + liodn = (uint16_t)(com_id & DMA_TRANSFER_LIODN_MASK);
  51224. + ASSERT_COND(p_Fm->p_FmStateStruct->portsTypes[hardwarePortId] != e_FM_PORT_TYPE_DUMMY);
  51225. + p_Fm->f_BusError(p_Fm->h_App,
  51226. + p_Fm->p_FmStateStruct->portsTypes[hardwarePortId],
  51227. + relativePortId,
  51228. + fman_get_dma_addr(dma_rg),
  51229. + tnum,
  51230. + liodn);
  51231. + }
  51232. + if (status & DMA_STATUS_FM_SPDAT_ECC)
  51233. + p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_SINGLE_PORT_ECC);
  51234. + if (status & DMA_STATUS_READ_ECC)
  51235. + p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_READ_ECC);
  51236. + if (status & DMA_STATUS_SYSTEM_WRITE_ECC)
  51237. + p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_SYSTEM_WRITE_ECC);
  51238. + if (status & DMA_STATUS_FM_WRITE_ECC)
  51239. + p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_DMA_FM_WRITE_ECC);
  51240. + }
  51241. +
  51242. +static void FpmErrEvent(t_Fm *p_Fm)
  51243. +{
  51244. + uint32_t event;
  51245. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  51246. +
  51247. + event = fman_get_fpm_err_event(fpm_rg);
  51248. +
  51249. + if ((event & FPM_EV_MASK_DOUBLE_ECC) && (event & FPM_EV_MASK_DOUBLE_ECC_EN))
  51250. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_FPM_DOUBLE_ECC);
  51251. + if ((event & FPM_EV_MASK_STALL) && (event & FPM_EV_MASK_STALL_EN))
  51252. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_FPM_STALL_ON_TASKS);
  51253. + if ((event & FPM_EV_MASK_SINGLE_ECC) && (event & FPM_EV_MASK_SINGLE_ECC_EN))
  51254. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_FPM_SINGLE_ECC);
  51255. +}
  51256. +
  51257. +static void MuramErrIntr(t_Fm *p_Fm)
  51258. +{
  51259. + uint32_t event;
  51260. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  51261. +
  51262. + event = fman_get_muram_err_event(fpm_rg);
  51263. +
  51264. + if (event & FPM_RAM_MURAM_ECC)
  51265. + p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_MURAM_ECC);
  51266. +}
  51267. +
  51268. +static void IramErrIntr(t_Fm *p_Fm)
  51269. +{
  51270. + uint32_t event;
  51271. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  51272. +
  51273. + event = fman_get_iram_err_event(fpm_rg);
  51274. +
  51275. + if (event & FPM_RAM_IRAM_ECC)
  51276. + p_Fm->f_Exception(p_Fm->h_App, e_FM_EX_IRAM_ECC);
  51277. +}
  51278. +
  51279. +static void QmiEvent(t_Fm *p_Fm)
  51280. +{
  51281. + uint32_t event;
  51282. + struct fman_qmi_regs *qmi_rg = p_Fm->p_FmQmiRegs;
  51283. +
  51284. + event = fman_get_qmi_event(qmi_rg);
  51285. +
  51286. + if (event & QMI_INTR_EN_SINGLE_ECC)
  51287. + p_Fm->f_Exception(p_Fm->h_App,e_FM_EX_QMI_SINGLE_ECC);
  51288. +}
  51289. +
  51290. +static void UnimplementedIsr(t_Handle h_Arg)
  51291. +{
  51292. + UNUSED(h_Arg);
  51293. +
  51294. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unimplemented ISR!"));
  51295. +}
  51296. +
  51297. +static void UnimplementedFmanCtrlIsr(t_Handle h_Arg, uint32_t event)
  51298. +{
  51299. + UNUSED(h_Arg); UNUSED(event);
  51300. +
  51301. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Unimplemented FmCtl ISR!"));
  51302. +}
  51303. +
  51304. +static void EnableTimeStamp(t_Fm *p_Fm)
  51305. +{
  51306. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  51307. +
  51308. + ASSERT_COND(p_Fm->p_FmStateStruct);
  51309. + ASSERT_COND(p_Fm->p_FmStateStruct->count1MicroBit);
  51310. +
  51311. + fman_enable_time_stamp(fpm_rg, p_Fm->p_FmStateStruct->count1MicroBit, p_Fm->p_FmStateStruct->fmClkFreq);
  51312. +
  51313. + p_Fm->p_FmStateStruct->enabledTimeStamp = TRUE;
  51314. +}
  51315. +
  51316. +static t_Error ClearIRam(t_Fm *p_Fm)
  51317. +{
  51318. + t_FMIramRegs *p_Iram;
  51319. + int i;
  51320. + int iram_size;
  51321. +
  51322. + ASSERT_COND(p_Fm);
  51323. + p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
  51324. + iram_size = FM_IRAM_SIZE(p_Fm->p_FmStateStruct->revInfo.majorRev,p_Fm->p_FmStateStruct->revInfo.minorRev);
  51325. +
  51326. + /* Enable the auto-increment */
  51327. + WRITE_UINT32(p_Iram->iadd, IRAM_IADD_AIE);
  51328. + while (GET_UINT32(p_Iram->iadd) != IRAM_IADD_AIE) ;
  51329. +
  51330. + for (i=0; i < (iram_size/4); i++)
  51331. + WRITE_UINT32(p_Iram->idata, 0xffffffff);
  51332. +
  51333. + WRITE_UINT32(p_Iram->iadd, iram_size - 4);
  51334. + CORE_MemoryBarrier();
  51335. + while (GET_UINT32(p_Iram->idata) != 0xffffffff) ;
  51336. +
  51337. + return E_OK;
  51338. +}
  51339. +
  51340. +static t_Error LoadFmanCtrlCode(t_Fm *p_Fm)
  51341. +{
  51342. + t_FMIramRegs *p_Iram;
  51343. + int i;
  51344. + uint32_t tmp;
  51345. + uint8_t compTo16;
  51346. +
  51347. + ASSERT_COND(p_Fm);
  51348. + p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
  51349. +
  51350. + /* Enable the auto-increment */
  51351. + WRITE_UINT32(p_Iram->iadd, IRAM_IADD_AIE);
  51352. + while (GET_UINT32(p_Iram->iadd) != IRAM_IADD_AIE) ;
  51353. +
  51354. + for (i=0; i < (p_Fm->firmware.size / 4); i++)
  51355. + WRITE_UINT32(p_Iram->idata, p_Fm->firmware.p_Code[i]);
  51356. +
  51357. + compTo16 = (uint8_t)(p_Fm->firmware.size % 16);
  51358. + if (compTo16)
  51359. + for (i=0; i < ((16-compTo16) / 4); i++)
  51360. + WRITE_UINT32(p_Iram->idata, 0xffffffff);
  51361. +
  51362. + WRITE_UINT32(p_Iram->iadd,p_Fm->firmware.size-4);
  51363. + while (GET_UINT32(p_Iram->iadd) != (p_Fm->firmware.size-4)) ;
  51364. +
  51365. + /* verify that writing has completed */
  51366. + while (GET_UINT32(p_Iram->idata) != p_Fm->firmware.p_Code[(p_Fm->firmware.size / 4)-1]) ;
  51367. +
  51368. + if (p_Fm->fwVerify)
  51369. + {
  51370. + WRITE_UINT32(p_Iram->iadd, IRAM_IADD_AIE);
  51371. + while (GET_UINT32(p_Iram->iadd) != IRAM_IADD_AIE) ;
  51372. + for (i=0; i < (p_Fm->firmware.size / 4); i++)
  51373. + {
  51374. + tmp = GET_UINT32(p_Iram->idata);
  51375. + if (tmp != p_Fm->firmware.p_Code[i])
  51376. + RETURN_ERROR(MAJOR, E_WRITE_FAILED,
  51377. + ("UCode write error : write 0x%x, read 0x%x",
  51378. + p_Fm->firmware.p_Code[i],tmp));
  51379. + }
  51380. + WRITE_UINT32(p_Iram->iadd, 0x0);
  51381. + }
  51382. +
  51383. + /* Enable patch from IRAM */
  51384. + WRITE_UINT32(p_Iram->iready, IRAM_READY);
  51385. + XX_UDelay(1000);
  51386. +
  51387. + DBG(INFO, ("FMan-Controller code (ver %d.%d.%d) loaded to IRAM.",
  51388. + ((uint16_t *)p_Fm->firmware.p_Code)[2],
  51389. + ((uint8_t *)p_Fm->firmware.p_Code)[6],
  51390. + ((uint8_t *)p_Fm->firmware.p_Code)[7]));
  51391. +
  51392. + return E_OK;
  51393. +}
  51394. +
  51395. +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
  51396. +static t_Error FwNotResetErratumBugzilla6173WA(t_Fm *p_Fm)
  51397. +{
  51398. + t_FMIramRegs *p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
  51399. + uint32_t tmpReg;
  51400. + uint32_t savedSpliodn[63];
  51401. +
  51402. + /* write to IRAM first location the debug instruction */
  51403. + WRITE_UINT32(p_Iram->iadd, 0);
  51404. + while (GET_UINT32(p_Iram->iadd) != 0) ;
  51405. + WRITE_UINT32(p_Iram->idata, FM_FW_DEBUG_INSTRUCTION);
  51406. +
  51407. + WRITE_UINT32(p_Iram->iadd, 0);
  51408. + while (GET_UINT32(p_Iram->iadd) != 0) ;
  51409. + while (GET_UINT32(p_Iram->idata) != FM_FW_DEBUG_INSTRUCTION) ;
  51410. +
  51411. + /* Enable patch from IRAM */
  51412. + WRITE_UINT32(p_Iram->iready, IRAM_READY);
  51413. + CORE_MemoryBarrier();
  51414. + XX_UDelay(100);
  51415. + IO2MemCpy32((uint8_t *)savedSpliodn,
  51416. + (uint8_t *)p_Fm->p_FmBmiRegs->fmbm_spliodn,
  51417. + 63*sizeof(uint32_t));
  51418. +
  51419. + /* reset FMAN */
  51420. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rstc, FPM_RSTC_FM_RESET);
  51421. + CORE_MemoryBarrier();
  51422. + XX_UDelay(100);
  51423. +
  51424. + /* verify breakpoint debug status register */
  51425. + tmpReg = GET_UINT32(*(uint32_t *)UINT_TO_PTR(p_Fm->baseAddr + FM_DEBUG_STATUS_REGISTER_OFFSET));
  51426. + if (!tmpReg)
  51427. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Invalid debug status register value is '0'"));
  51428. +
  51429. + /*************************************/
  51430. + /* Load FMan-Controller code to IRAM */
  51431. + /*************************************/
  51432. + ClearIRam(p_Fm);
  51433. + if (p_Fm->firmware.p_Code &&
  51434. + (LoadFmanCtrlCode(p_Fm) != E_OK))
  51435. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  51436. + XX_UDelay(100);
  51437. +
  51438. + /* reset FMAN again to start the microcode */
  51439. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rstc, FPM_RSTC_FM_RESET);
  51440. + CORE_MemoryBarrier();
  51441. + XX_UDelay(100);
  51442. + Mem2IOCpy32((uint8_t *)p_Fm->p_FmBmiRegs->fmbm_spliodn,
  51443. + (uint8_t *)savedSpliodn,
  51444. + 63*sizeof(uint32_t));
  51445. +
  51446. + if (fman_is_qmi_halt_not_busy_state(p_Fm->p_FmQmiRegs))
  51447. + {
  51448. + fman_resume(p_Fm->p_FmFpmRegs);
  51449. + CORE_MemoryBarrier();
  51450. + XX_UDelay(100);
  51451. + }
  51452. +
  51453. + return E_OK;
  51454. +}
  51455. +#endif /* FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
  51456. +
  51457. +static void GuestErrorIsr(t_Fm *p_Fm, uint32_t pending)
  51458. +{
  51459. +#define FM_G_CALL_1G_MAC_ERR_ISR(_id) \
  51460. +do { \
  51461. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].h_SrcHandle);\
  51462. +} while (0)
  51463. +#define FM_G_CALL_10G_MAC_ERR_ISR(_id) \
  51464. +do { \
  51465. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].h_SrcHandle);\
  51466. +} while (0)
  51467. +
  51468. + /* error interrupts */
  51469. + if (pending & ERR_INTR_EN_1G_MAC0)
  51470. + FM_G_CALL_1G_MAC_ERR_ISR(0);
  51471. + if (pending & ERR_INTR_EN_1G_MAC1)
  51472. + FM_G_CALL_1G_MAC_ERR_ISR(1);
  51473. + if (pending & ERR_INTR_EN_1G_MAC2)
  51474. + FM_G_CALL_1G_MAC_ERR_ISR(2);
  51475. + if (pending & ERR_INTR_EN_1G_MAC3)
  51476. + FM_G_CALL_1G_MAC_ERR_ISR(3);
  51477. + if (pending & ERR_INTR_EN_1G_MAC4)
  51478. + FM_G_CALL_1G_MAC_ERR_ISR(4);
  51479. + if (pending & ERR_INTR_EN_1G_MAC5)
  51480. + FM_G_CALL_1G_MAC_ERR_ISR(5);
  51481. + if (pending & ERR_INTR_EN_1G_MAC6)
  51482. + FM_G_CALL_1G_MAC_ERR_ISR(6);
  51483. + if (pending & ERR_INTR_EN_1G_MAC7)
  51484. + FM_G_CALL_1G_MAC_ERR_ISR(7);
  51485. + if (pending & ERR_INTR_EN_10G_MAC0)
  51486. + FM_G_CALL_10G_MAC_ERR_ISR(0);
  51487. + if (pending & ERR_INTR_EN_10G_MAC1)
  51488. + FM_G_CALL_10G_MAC_ERR_ISR(1);
  51489. +}
  51490. +
  51491. +static void GuestEventIsr(t_Fm *p_Fm, uint32_t pending)
  51492. +{
  51493. +#define FM_G_CALL_1G_MAC_ISR(_id) \
  51494. +do { \
  51495. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].h_SrcHandle);\
  51496. +} while (0)
  51497. +#define FM_G_CALL_10G_MAC_ISR(_id) \
  51498. +do { \
  51499. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].h_SrcHandle);\
  51500. +} while (0)
  51501. +
  51502. + if (pending & INTR_EN_1G_MAC0)
  51503. + FM_G_CALL_1G_MAC_ISR(0);
  51504. + if (pending & INTR_EN_1G_MAC1)
  51505. + FM_G_CALL_1G_MAC_ISR(1);
  51506. + if (pending & INTR_EN_1G_MAC2)
  51507. + FM_G_CALL_1G_MAC_ISR(2);
  51508. + if (pending & INTR_EN_1G_MAC3)
  51509. + FM_G_CALL_1G_MAC_ISR(3);
  51510. + if (pending & INTR_EN_1G_MAC4)
  51511. + FM_G_CALL_1G_MAC_ISR(4);
  51512. + if (pending & INTR_EN_1G_MAC5)
  51513. + FM_G_CALL_1G_MAC_ISR(5);
  51514. + if (pending & INTR_EN_1G_MAC6)
  51515. + FM_G_CALL_1G_MAC_ISR(6);
  51516. + if (pending & INTR_EN_1G_MAC7)
  51517. + FM_G_CALL_1G_MAC_ISR(7);
  51518. + if (pending & INTR_EN_10G_MAC0)
  51519. + FM_G_CALL_10G_MAC_ISR(0);
  51520. + if (pending & INTR_EN_10G_MAC1)
  51521. + FM_G_CALL_10G_MAC_ISR(1);
  51522. + if (pending & INTR_EN_TMR)
  51523. + p_Fm->intrMng[e_FM_EV_TMR].f_Isr(p_Fm->intrMng[e_FM_EV_TMR].h_SrcHandle);
  51524. +}
  51525. +
  51526. +#if (DPAA_VERSION >= 11)
  51527. +static t_Error SetVSPWindow(t_Handle h_Fm,
  51528. + uint8_t hardwarePortId,
  51529. + uint8_t baseStorageProfile,
  51530. + uint8_t log2NumOfProfiles)
  51531. +{
  51532. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  51533. +
  51534. + ASSERT_COND(h_Fm);
  51535. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  51536. +
  51537. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  51538. + !p_Fm->p_FmBmiRegs &&
  51539. + p_Fm->h_IpcSessions[0])
  51540. + {
  51541. + t_FmIpcVspSetPortWindow fmIpcVspSetPortWindow;
  51542. + t_FmIpcMsg msg;
  51543. + t_Error err = E_OK;
  51544. +
  51545. + memset(&msg, 0, sizeof(msg));
  51546. + memset(&fmIpcVspSetPortWindow, 0, sizeof(t_FmIpcVspSetPortWindow));
  51547. + fmIpcVspSetPortWindow.hardwarePortId = hardwarePortId;
  51548. + fmIpcVspSetPortWindow.baseStorageProfile = baseStorageProfile;
  51549. + fmIpcVspSetPortWindow.log2NumOfProfiles = log2NumOfProfiles;
  51550. + msg.msgId = FM_VSP_SET_PORT_WINDOW;
  51551. + memcpy(msg.msgBody, &fmIpcVspSetPortWindow, sizeof(t_FmIpcVspSetPortWindow));
  51552. +
  51553. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  51554. + (uint8_t*)&msg,
  51555. + sizeof(msg.msgId),
  51556. + NULL,
  51557. + NULL,
  51558. + NULL,
  51559. + NULL);
  51560. + if (err != E_OK)
  51561. + RETURN_ERROR(MINOR, err, NO_MSG);
  51562. + return E_OK;
  51563. + }
  51564. + else if (!p_Fm->p_FmBmiRegs)
  51565. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  51566. + ("Either IPC or 'baseAddress' is required!"));
  51567. +
  51568. + fman_set_vsp_window(p_Fm->p_FmBmiRegs,
  51569. + hardwarePortId,
  51570. + baseStorageProfile,
  51571. + log2NumOfProfiles);
  51572. +
  51573. + return E_OK;
  51574. +}
  51575. +
  51576. +static uint8_t AllocVSPsForPartition(t_Handle h_Fm, uint8_t base, uint8_t numOfProfiles, uint8_t guestId)
  51577. +{
  51578. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  51579. + uint8_t profilesFound = 0;
  51580. + int i = 0;
  51581. + uint32_t intFlags;
  51582. +
  51583. + if (!numOfProfiles)
  51584. + return E_OK;
  51585. +
  51586. + if ((numOfProfiles > FM_VSP_MAX_NUM_OF_ENTRIES) ||
  51587. + (base + numOfProfiles > FM_VSP_MAX_NUM_OF_ENTRIES))
  51588. + return (uint8_t)ILLEGAL_BASE;
  51589. +
  51590. + if (p_Fm->h_IpcSessions[0])
  51591. + {
  51592. + t_FmIpcResourceAllocParams ipcAllocParams;
  51593. + t_FmIpcMsg msg;
  51594. + t_FmIpcReply reply;
  51595. + t_Error err;
  51596. + uint32_t replyLength;
  51597. +
  51598. + memset(&msg, 0, sizeof(msg));
  51599. + memset(&reply, 0, sizeof(reply));
  51600. + memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
  51601. + ipcAllocParams.guestId = p_Fm->guestId;
  51602. + ipcAllocParams.num = p_Fm->partNumOfVSPs;
  51603. + ipcAllocParams.base = p_Fm->partVSPBase;
  51604. + msg.msgId = FM_VSP_ALLOC;
  51605. + memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
  51606. + replyLength = sizeof(uint32_t) + sizeof(uint8_t);
  51607. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  51608. + (uint8_t*)&msg,
  51609. + sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
  51610. + (uint8_t*)&reply,
  51611. + &replyLength,
  51612. + NULL,
  51613. + NULL);
  51614. + if ((err != E_OK) ||
  51615. + (replyLength != (sizeof(uint32_t) + sizeof(uint8_t))))
  51616. + RETURN_ERROR(MAJOR, err, NO_MSG);
  51617. + else
  51618. + memcpy((uint8_t*)&p_Fm->partVSPBase, reply.replyBody, sizeof(uint8_t));
  51619. + if (p_Fm->partVSPBase == (uint8_t)(ILLEGAL_BASE))
  51620. + RETURN_ERROR(MAJOR, err, NO_MSG);
  51621. + }
  51622. + if (p_Fm->guestId != NCSW_MASTER_ID)
  51623. + {
  51624. + DBG(WARNING, ("FM Guest mode, without IPC - can't validate VSP range!"));
  51625. + return (uint8_t)ILLEGAL_BASE;
  51626. + }
  51627. +
  51628. + intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
  51629. + for (i = base; i < base + numOfProfiles; i++)
  51630. + if (p_Fm->p_FmSp->profiles[i].profilesMng.ownerId == (uint8_t)ILLEGAL_BASE)
  51631. + profilesFound++;
  51632. + else
  51633. + break;
  51634. +
  51635. + if (profilesFound == numOfProfiles)
  51636. + for (i = base; i<base + numOfProfiles; i++)
  51637. + p_Fm->p_FmSp->profiles[i].profilesMng.ownerId = guestId;
  51638. + else
  51639. + {
  51640. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  51641. + return (uint8_t)ILLEGAL_BASE;
  51642. + }
  51643. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  51644. +
  51645. + return base;
  51646. +}
  51647. +
  51648. +static void FreeVSPsForPartition(t_Handle h_Fm, uint8_t base, uint8_t numOfProfiles, uint8_t guestId)
  51649. +{
  51650. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  51651. + int i = 0;
  51652. +
  51653. + ASSERT_COND(p_Fm);
  51654. +
  51655. + if (p_Fm->h_IpcSessions[0])
  51656. + {
  51657. + t_FmIpcResourceAllocParams ipcAllocParams;
  51658. + t_FmIpcMsg msg;
  51659. + t_FmIpcReply reply;
  51660. + uint32_t replyLength;
  51661. + t_Error err;
  51662. +
  51663. + memset(&msg, 0, sizeof(msg));
  51664. + memset(&reply, 0, sizeof(reply));
  51665. + memset(&ipcAllocParams, 0, sizeof(t_FmIpcResourceAllocParams));
  51666. + ipcAllocParams.guestId = p_Fm->guestId;
  51667. + ipcAllocParams.num = p_Fm->partNumOfVSPs;
  51668. + ipcAllocParams.base = p_Fm->partVSPBase;
  51669. + msg.msgId = FM_VSP_FREE;
  51670. + memcpy(msg.msgBody, &ipcAllocParams, sizeof(t_FmIpcResourceAllocParams));
  51671. + replyLength = sizeof(uint32_t) + sizeof(uint8_t);
  51672. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  51673. + (uint8_t*)&msg,
  51674. + sizeof(msg.msgId) + sizeof(t_FmIpcResourceAllocParams),
  51675. + (uint8_t*)&reply,
  51676. + &replyLength,
  51677. + NULL,
  51678. + NULL);
  51679. + if (err != E_OK)
  51680. + REPORT_ERROR(MAJOR, err, NO_MSG);
  51681. + return;
  51682. + }
  51683. + if (p_Fm->guestId != NCSW_MASTER_ID)
  51684. + {
  51685. + DBG(WARNING, ("FM Guest mode, without IPC - can't validate VSP range!"));
  51686. + return;
  51687. + }
  51688. +
  51689. + ASSERT_COND(p_Fm->p_FmSp);
  51690. +
  51691. + for (i=base; i<numOfProfiles; i++)
  51692. + {
  51693. + if (p_Fm->p_FmSp->profiles[i].profilesMng.ownerId == guestId)
  51694. + p_Fm->p_FmSp->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
  51695. + else
  51696. + DBG(WARNING, ("Request for freeing storage profile window which wasn't allocated to this partition"));
  51697. + }
  51698. +}
  51699. +#endif /* (DPAA_VERSION >= 11) */
  51700. +
  51701. +static t_Error FmGuestHandleIpcMsgCB(t_Handle h_Fm,
  51702. + uint8_t *p_Msg,
  51703. + uint32_t msgLength,
  51704. + uint8_t *p_Reply,
  51705. + uint32_t *p_ReplyLength)
  51706. +{
  51707. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  51708. + t_FmIpcMsg *p_IpcMsg = (t_FmIpcMsg*)p_Msg;
  51709. +
  51710. + UNUSED(p_Reply);
  51711. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  51712. + SANITY_CHECK_RETURN_ERROR((msgLength > sizeof(uint32_t)), E_INVALID_VALUE);
  51713. +
  51714. +#ifdef DISABLE_SANITY_CHECKS
  51715. + UNUSED(msgLength);
  51716. +#endif /* DISABLE_SANITY_CHECKS */
  51717. +
  51718. + ASSERT_COND(p_Msg);
  51719. +
  51720. + *p_ReplyLength = 0;
  51721. +
  51722. + switch (p_IpcMsg->msgId)
  51723. + {
  51724. + case (FM_GUEST_ISR):
  51725. + {
  51726. + t_FmIpcIsr ipcIsr;
  51727. +
  51728. + memcpy((uint8_t*)&ipcIsr, p_IpcMsg->msgBody, sizeof(t_FmIpcIsr));
  51729. + if (ipcIsr.boolErr)
  51730. + GuestErrorIsr(p_Fm, ipcIsr.pendingReg);
  51731. + else
  51732. + GuestEventIsr(p_Fm, ipcIsr.pendingReg);
  51733. + break;
  51734. + }
  51735. + default:
  51736. + *p_ReplyLength = 0;
  51737. + RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("command not found!!!"));
  51738. + }
  51739. + return E_OK;
  51740. +}
  51741. +
  51742. +static t_Error FmHandleIpcMsgCB(t_Handle h_Fm,
  51743. + uint8_t *p_Msg,
  51744. + uint32_t msgLength,
  51745. + uint8_t *p_Reply,
  51746. + uint32_t *p_ReplyLength)
  51747. +{
  51748. + t_Error err;
  51749. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  51750. + t_FmIpcMsg *p_IpcMsg = (t_FmIpcMsg*)p_Msg;
  51751. + t_FmIpcReply *p_IpcReply = (t_FmIpcReply*)p_Reply;
  51752. +
  51753. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  51754. + SANITY_CHECK_RETURN_ERROR((msgLength >= sizeof(uint32_t)), E_INVALID_VALUE);
  51755. +
  51756. +#ifdef DISABLE_SANITY_CHECKS
  51757. + UNUSED(msgLength);
  51758. +#endif /* DISABLE_SANITY_CHECKS */
  51759. +
  51760. + ASSERT_COND(p_IpcMsg);
  51761. +
  51762. + memset(p_IpcReply, 0, (sizeof(uint8_t) * FM_IPC_MAX_REPLY_SIZE));
  51763. + *p_ReplyLength = 0;
  51764. +
  51765. + switch (p_IpcMsg->msgId)
  51766. + {
  51767. + case (FM_GET_SET_PORT_PARAMS):
  51768. + {
  51769. + t_FmIpcPortInInitParams ipcInitParams;
  51770. + t_FmInterModulePortInitParams initParams;
  51771. + t_FmIpcPortOutInitParams ipcOutInitParams;
  51772. +
  51773. + memcpy((uint8_t*)&ipcInitParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortInInitParams));
  51774. + initParams.hardwarePortId = ipcInitParams.hardwarePortId;
  51775. + initParams.portType = (e_FmPortType)ipcInitParams.enumPortType;
  51776. + initParams.independentMode = (bool)(ipcInitParams.boolIndependentMode);
  51777. + initParams.liodnOffset = ipcInitParams.liodnOffset;
  51778. + initParams.numOfTasks = ipcInitParams.numOfTasks;
  51779. + initParams.numOfExtraTasks = ipcInitParams.numOfExtraTasks;
  51780. + initParams.numOfOpenDmas = ipcInitParams.numOfOpenDmas;
  51781. + initParams.numOfExtraOpenDmas = ipcInitParams.numOfExtraOpenDmas;
  51782. + initParams.sizeOfFifo = ipcInitParams.sizeOfFifo;
  51783. + initParams.extraSizeOfFifo = ipcInitParams.extraSizeOfFifo;
  51784. + initParams.deqPipelineDepth = ipcInitParams.deqPipelineDepth;
  51785. + initParams.maxFrameLength = ipcInitParams.maxFrameLength;
  51786. + initParams.liodnBase = ipcInitParams.liodnBase;
  51787. +
  51788. + p_IpcReply->error = (uint32_t)FmGetSetPortParams(h_Fm, &initParams);
  51789. +
  51790. + ipcOutInitParams.ipcPhysAddr.high = initParams.fmMuramPhysBaseAddr.high;
  51791. + ipcOutInitParams.ipcPhysAddr.low = initParams.fmMuramPhysBaseAddr.low;
  51792. + ipcOutInitParams.sizeOfFifo = initParams.sizeOfFifo;
  51793. + ipcOutInitParams.extraSizeOfFifo = initParams.extraSizeOfFifo;
  51794. + ipcOutInitParams.numOfTasks = initParams.numOfTasks;
  51795. + ipcOutInitParams.numOfExtraTasks = initParams.numOfExtraTasks;
  51796. + ipcOutInitParams.numOfOpenDmas = initParams.numOfOpenDmas;
  51797. + ipcOutInitParams.numOfExtraOpenDmas = initParams.numOfExtraOpenDmas;
  51798. + memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcOutInitParams, sizeof(ipcOutInitParams));
  51799. + *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcPortOutInitParams);
  51800. + break;
  51801. + }
  51802. + case (FM_SET_SIZE_OF_FIFO):
  51803. + {
  51804. + t_FmIpcPortRsrcParams ipcPortRsrcParams;
  51805. +
  51806. + memcpy((uint8_t*)&ipcPortRsrcParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortRsrcParams));
  51807. + p_IpcReply->error = (uint32_t)FmSetSizeOfFifo(h_Fm,
  51808. + ipcPortRsrcParams.hardwarePortId,
  51809. + &ipcPortRsrcParams.val,
  51810. + &ipcPortRsrcParams.extra,
  51811. + (bool)ipcPortRsrcParams.boolInitialConfig);
  51812. + *p_ReplyLength = sizeof(uint32_t);
  51813. + break;
  51814. + }
  51815. + case (FM_SET_NUM_OF_TASKS):
  51816. + {
  51817. + t_FmIpcPortRsrcParams ipcPortRsrcParams;
  51818. +
  51819. + memcpy((uint8_t*)&ipcPortRsrcParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortRsrcParams));
  51820. + p_IpcReply->error = (uint32_t)FmSetNumOfTasks(h_Fm, ipcPortRsrcParams.hardwarePortId,
  51821. + (uint8_t*)&ipcPortRsrcParams.val,
  51822. + (uint8_t*)&ipcPortRsrcParams.extra,
  51823. + (bool)ipcPortRsrcParams.boolInitialConfig);
  51824. + *p_ReplyLength = sizeof(uint32_t);
  51825. + break;
  51826. + }
  51827. + case (FM_SET_NUM_OF_OPEN_DMAS):
  51828. + {
  51829. + t_FmIpcPortRsrcParams ipcPortRsrcParams;
  51830. +
  51831. + memcpy((uint8_t*)&ipcPortRsrcParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortRsrcParams));
  51832. + p_IpcReply->error = (uint32_t)FmSetNumOfOpenDmas(h_Fm, ipcPortRsrcParams.hardwarePortId,
  51833. + (uint8_t*)&ipcPortRsrcParams.val,
  51834. + (uint8_t*)&ipcPortRsrcParams.extra,
  51835. + (bool)ipcPortRsrcParams.boolInitialConfig);
  51836. + *p_ReplyLength = sizeof(uint32_t);
  51837. + break;
  51838. + }
  51839. + case (FM_RESUME_STALLED_PORT):
  51840. + *p_ReplyLength = sizeof(uint32_t);
  51841. + p_IpcReply->error = (uint32_t)FmResumeStalledPort(h_Fm, p_IpcMsg->msgBody[0]);
  51842. + break;
  51843. + case (FM_MASTER_IS_ALIVE):
  51844. + {
  51845. + uint8_t guestId = p_IpcMsg->msgBody[0];
  51846. + /* build the FM master partition IPC address */
  51847. + memset(p_Fm->fmIpcHandlerModuleName[guestId], 0, (sizeof(char)) * MODULE_NAME_SIZE);
  51848. + if (Sprint (p_Fm->fmIpcHandlerModuleName[guestId], "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, guestId) != (guestId<10 ? 6:7))
  51849. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  51850. + p_Fm->h_IpcSessions[guestId] = XX_IpcInitSession(p_Fm->fmIpcHandlerModuleName[guestId], p_Fm->fmModuleName);
  51851. + if (p_Fm->h_IpcSessions[guestId] == NULL)
  51852. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("FM Master IPC session for guest %d", guestId));
  51853. + *(uint8_t*)(p_IpcReply->replyBody) = 1;
  51854. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
  51855. + break;
  51856. + }
  51857. + case (FM_IS_PORT_STALLED):
  51858. + {
  51859. + bool tmp;
  51860. +
  51861. + p_IpcReply->error = (uint32_t)FmIsPortStalled(h_Fm, p_IpcMsg->msgBody[0], &tmp);
  51862. + *(uint8_t*)(p_IpcReply->replyBody) = (uint8_t)tmp;
  51863. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
  51864. + break;
  51865. + }
  51866. + case (FM_RESET_MAC):
  51867. + {
  51868. + t_FmIpcMacParams ipcMacParams;
  51869. +
  51870. + memcpy((uint8_t*)&ipcMacParams, p_IpcMsg->msgBody, sizeof(t_FmIpcMacParams));
  51871. + p_IpcReply->error = (uint32_t)FmResetMac(p_Fm,
  51872. + (e_FmMacType)(ipcMacParams.enumType),
  51873. + ipcMacParams.id);
  51874. + *p_ReplyLength = sizeof(uint32_t);
  51875. + break;
  51876. + }
  51877. + case (FM_SET_MAC_MAX_FRAME):
  51878. + {
  51879. + t_FmIpcMacMaxFrameParams ipcMacMaxFrameParams;
  51880. +
  51881. + memcpy((uint8_t*)&ipcMacMaxFrameParams, p_IpcMsg->msgBody, sizeof(t_FmIpcMacMaxFrameParams));
  51882. + err = FmSetMacMaxFrame(p_Fm,
  51883. + (e_FmMacType)(ipcMacMaxFrameParams.macParams.enumType),
  51884. + ipcMacMaxFrameParams.macParams.id,
  51885. + ipcMacMaxFrameParams.maxFrameLength);
  51886. + if (err != E_OK)
  51887. + REPORT_ERROR(MINOR, err, NO_MSG);
  51888. + break;
  51889. + }
  51890. +#if (DPAA_VERSION >= 11)
  51891. + case (FM_VSP_ALLOC) :
  51892. + {
  51893. + t_FmIpcResourceAllocParams ipcAllocParams;
  51894. + uint8_t vspBase;
  51895. + memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
  51896. + vspBase = AllocVSPsForPartition(h_Fm, (uint8_t)ipcAllocParams.base, (uint8_t)ipcAllocParams.num, ipcAllocParams.guestId);
  51897. + memcpy(p_IpcReply->replyBody, (uint8_t*)&vspBase, sizeof(uint8_t));
  51898. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
  51899. + break;
  51900. + }
  51901. + case (FM_VSP_FREE) :
  51902. + {
  51903. + t_FmIpcResourceAllocParams ipcAllocParams;
  51904. + memcpy(&ipcAllocParams, p_IpcMsg->msgBody, sizeof(t_FmIpcResourceAllocParams));
  51905. + FreeVSPsForPartition(h_Fm, (uint8_t)ipcAllocParams.base, (uint8_t)ipcAllocParams.num, ipcAllocParams.guestId);
  51906. + break;
  51907. + }
  51908. + case (FM_VSP_SET_PORT_WINDOW) :
  51909. + {
  51910. + t_FmIpcVspSetPortWindow ipcVspSetPortWindow;
  51911. + memcpy(&ipcVspSetPortWindow, p_IpcMsg->msgBody, sizeof(t_FmIpcVspSetPortWindow));
  51912. + err = SetVSPWindow(h_Fm,
  51913. + ipcVspSetPortWindow.hardwarePortId,
  51914. + ipcVspSetPortWindow.baseStorageProfile,
  51915. + ipcVspSetPortWindow.log2NumOfProfiles);
  51916. + return err;
  51917. + }
  51918. + case (FM_SET_CONG_GRP_PFC_PRIO) :
  51919. + {
  51920. + t_FmIpcSetCongestionGroupPfcPriority fmIpcSetCongestionGroupPfcPriority;
  51921. + memcpy(&fmIpcSetCongestionGroupPfcPriority, p_IpcMsg->msgBody, sizeof(t_FmIpcSetCongestionGroupPfcPriority));
  51922. + err = FmSetCongestionGroupPFCpriority(h_Fm,
  51923. + fmIpcSetCongestionGroupPfcPriority.congestionGroupId,
  51924. + fmIpcSetCongestionGroupPfcPriority.priorityBitMap);
  51925. + return err;
  51926. + }
  51927. +#endif /* (DPAA_VERSION >= 11) */
  51928. +
  51929. + case (FM_FREE_PORT):
  51930. + {
  51931. + t_FmInterModulePortFreeParams portParams;
  51932. + t_FmIpcPortFreeParams ipcPortParams;
  51933. +
  51934. + memcpy((uint8_t*)&ipcPortParams, p_IpcMsg->msgBody, sizeof(t_FmIpcPortFreeParams));
  51935. + portParams.hardwarePortId = ipcPortParams.hardwarePortId;
  51936. + portParams.portType = (e_FmPortType)(ipcPortParams.enumPortType);
  51937. + portParams.deqPipelineDepth = ipcPortParams.deqPipelineDepth;
  51938. + FmFreePortParams(h_Fm, &portParams);
  51939. + break;
  51940. + }
  51941. + case (FM_REGISTER_INTR):
  51942. + {
  51943. + t_FmIpcRegisterIntr ipcRegIntr;
  51944. +
  51945. + memcpy((uint8_t*)&ipcRegIntr, p_IpcMsg->msgBody, sizeof(ipcRegIntr));
  51946. + p_Fm->intrMng[ipcRegIntr.event].guestId = ipcRegIntr.guestId;
  51947. + break;
  51948. + }
  51949. + case (FM_GET_PARAMS):
  51950. + {
  51951. + t_FmIpcParams ipcParams;
  51952. +
  51953. + /* Get clock frequency */
  51954. + ipcParams.fmClkFreq = p_Fm->p_FmStateStruct->fmClkFreq;
  51955. + ipcParams.fmMacClkFreq = p_Fm->p_FmStateStruct->fmMacClkFreq;
  51956. +
  51957. + fman_get_revision(p_Fm->p_FmFpmRegs,&ipcParams.majorRev,&ipcParams.minorRev);
  51958. +
  51959. + memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcParams, sizeof(t_FmIpcParams));
  51960. + *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcParams);
  51961. + break;
  51962. + }
  51963. + case (FM_GET_FMAN_CTRL_CODE_REV):
  51964. + {
  51965. + t_FmCtrlCodeRevisionInfo fmanCtrlRevInfo;
  51966. + t_FmIpcFmanCtrlCodeRevisionInfo ipcRevInfo;
  51967. +
  51968. + p_IpcReply->error = (uint32_t)FM_GetFmanCtrlCodeRevision(h_Fm, &fmanCtrlRevInfo);
  51969. + ipcRevInfo.packageRev = fmanCtrlRevInfo.packageRev;
  51970. + ipcRevInfo.majorRev = fmanCtrlRevInfo.majorRev;
  51971. + ipcRevInfo.minorRev = fmanCtrlRevInfo.minorRev;
  51972. + memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcRevInfo, sizeof(t_FmIpcFmanCtrlCodeRevisionInfo));
  51973. + *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcFmanCtrlCodeRevisionInfo);
  51974. + break;
  51975. + }
  51976. +
  51977. + case (FM_DMA_STAT):
  51978. + {
  51979. + t_FmDmaStatus dmaStatus;
  51980. + t_FmIpcDmaStatus ipcDmaStatus;
  51981. +
  51982. + FM_GetDmaStatus(h_Fm, &dmaStatus);
  51983. + ipcDmaStatus.boolCmqNotEmpty = (uint8_t)dmaStatus.cmqNotEmpty;
  51984. + ipcDmaStatus.boolBusError = (uint8_t)dmaStatus.busError;
  51985. + ipcDmaStatus.boolReadBufEccError = (uint8_t)dmaStatus.readBufEccError;
  51986. + ipcDmaStatus.boolWriteBufEccSysError = (uint8_t)dmaStatus.writeBufEccSysError;
  51987. + ipcDmaStatus.boolWriteBufEccFmError = (uint8_t)dmaStatus.writeBufEccFmError;
  51988. + ipcDmaStatus.boolSinglePortEccError = (uint8_t)dmaStatus.singlePortEccError;
  51989. + memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcDmaStatus, sizeof(t_FmIpcDmaStatus));
  51990. + *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcDmaStatus);
  51991. + break;
  51992. + }
  51993. + case (FM_ALLOC_FMAN_CTRL_EVENT_REG):
  51994. + p_IpcReply->error = (uint32_t)FmAllocFmanCtrlEventReg(h_Fm, (uint8_t*)p_IpcReply->replyBody);
  51995. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint8_t);
  51996. + break;
  51997. + case (FM_FREE_FMAN_CTRL_EVENT_REG):
  51998. + FmFreeFmanCtrlEventReg(h_Fm, p_IpcMsg->msgBody[0]);
  51999. + break;
  52000. + case (FM_GET_TIMESTAMP_SCALE):
  52001. + {
  52002. + uint32_t timeStamp = FmGetTimeStampScale(h_Fm);
  52003. +
  52004. + memcpy(p_IpcReply->replyBody, (uint8_t*)&timeStamp, sizeof(uint32_t));
  52005. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
  52006. + break;
  52007. + }
  52008. + case (FM_GET_COUNTER):
  52009. + {
  52010. + e_FmCounters inCounter;
  52011. + uint32_t outCounter;
  52012. +
  52013. + memcpy((uint8_t*)&inCounter, p_IpcMsg->msgBody, sizeof(uint32_t));
  52014. + outCounter = FM_GetCounter(h_Fm, inCounter);
  52015. + memcpy(p_IpcReply->replyBody, (uint8_t*)&outCounter, sizeof(uint32_t));
  52016. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
  52017. + break;
  52018. + }
  52019. + case (FM_SET_FMAN_CTRL_EVENTS_ENABLE):
  52020. + {
  52021. + t_FmIpcFmanEvents ipcFmanEvents;
  52022. +
  52023. + memcpy((uint8_t*)&ipcFmanEvents, p_IpcMsg->msgBody, sizeof(t_FmIpcFmanEvents));
  52024. + FmSetFmanCtrlIntr(h_Fm,
  52025. + ipcFmanEvents.eventRegId,
  52026. + ipcFmanEvents.enableEvents);
  52027. + break;
  52028. + }
  52029. + case (FM_GET_FMAN_CTRL_EVENTS_ENABLE):
  52030. + {
  52031. + uint32_t tmp = FmGetFmanCtrlIntr(h_Fm, p_IpcMsg->msgBody[0]);
  52032. +
  52033. + memcpy(p_IpcReply->replyBody, (uint8_t*)&tmp, sizeof(uint32_t));
  52034. + *p_ReplyLength = sizeof(uint32_t) + sizeof(uint32_t);
  52035. + break;
  52036. + }
  52037. + case (FM_GET_PHYS_MURAM_BASE):
  52038. + {
  52039. + t_FmPhysAddr physAddr;
  52040. + t_FmIpcPhysAddr ipcPhysAddr;
  52041. +
  52042. + FmGetPhysicalMuramBase(h_Fm, &physAddr);
  52043. + ipcPhysAddr.high = physAddr.high;
  52044. + ipcPhysAddr.low = physAddr.low;
  52045. + memcpy(p_IpcReply->replyBody, (uint8_t*)&ipcPhysAddr, sizeof(t_FmIpcPhysAddr));
  52046. + *p_ReplyLength = sizeof(uint32_t) + sizeof(t_FmIpcPhysAddr);
  52047. + break;
  52048. + }
  52049. + case (FM_ENABLE_RAM_ECC):
  52050. + {
  52051. + if (((err = FM_EnableRamsEcc(h_Fm)) != E_OK) ||
  52052. + ((err = FM_SetException(h_Fm, e_FM_EX_IRAM_ECC, TRUE)) != E_OK) ||
  52053. + ((err = FM_SetException(h_Fm, e_FM_EX_MURAM_ECC, TRUE)) != E_OK))
  52054. +#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0))
  52055. + UNUSED(err);
  52056. +#else
  52057. + REPORT_ERROR(MINOR, err, NO_MSG);
  52058. +#endif /* (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0)) */
  52059. + break;
  52060. + }
  52061. + case (FM_DISABLE_RAM_ECC):
  52062. + {
  52063. +
  52064. + if (((err = FM_SetException(h_Fm, e_FM_EX_IRAM_ECC, FALSE)) != E_OK) ||
  52065. + ((err = FM_SetException(h_Fm, e_FM_EX_MURAM_ECC, FALSE)) != E_OK) ||
  52066. + ((err = FM_DisableRamsEcc(h_Fm)) != E_OK))
  52067. +#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0))
  52068. + UNUSED(err);
  52069. +#else
  52070. + REPORT_ERROR(MINOR, err, NO_MSG);
  52071. +#endif /* (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0)) */
  52072. + break;
  52073. + }
  52074. + case (FM_SET_NUM_OF_FMAN_CTRL):
  52075. + {
  52076. + t_FmIpcPortNumOfFmanCtrls ipcPortNumOfFmanCtrls;
  52077. +
  52078. + memcpy((uint8_t*)&ipcPortNumOfFmanCtrls, p_IpcMsg->msgBody, sizeof(t_FmIpcPortNumOfFmanCtrls));
  52079. + err = FmSetNumOfRiscsPerPort(h_Fm,
  52080. + ipcPortNumOfFmanCtrls.hardwarePortId,
  52081. + ipcPortNumOfFmanCtrls.numOfFmanCtrls,
  52082. + ipcPortNumOfFmanCtrls.orFmanCtrl);
  52083. + if (err != E_OK)
  52084. + REPORT_ERROR(MINOR, err, NO_MSG);
  52085. + break;
  52086. + }
  52087. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  52088. + case (FM_10G_TX_ECC_WA):
  52089. + p_IpcReply->error = (uint32_t)Fm10GTxEccWorkaround(h_Fm, p_IpcMsg->msgBody[0]);
  52090. + *p_ReplyLength = sizeof(uint32_t);
  52091. + break;
  52092. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  52093. + default:
  52094. + *p_ReplyLength = 0;
  52095. + RETURN_ERROR(MINOR, E_INVALID_SELECTION, ("command not found!!!"));
  52096. + }
  52097. + return E_OK;
  52098. +}
  52099. +
  52100. +
  52101. +/****************************************/
  52102. +/* Inter-Module functions */
  52103. +/****************************************/
  52104. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  52105. +t_Error Fm10GTxEccWorkaround(t_Handle h_Fm, uint8_t macId)
  52106. +{
  52107. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52108. + t_Error err = E_OK;
  52109. + t_FmIpcMsg msg;
  52110. + t_FmIpcReply reply;
  52111. + uint32_t replyLength;
  52112. + uint8_t rxHardwarePortId, txHardwarePortId;
  52113. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  52114. +
  52115. + if (p_Fm->guestId != NCSW_MASTER_ID)
  52116. + {
  52117. + memset(&msg, 0, sizeof(msg));
  52118. + memset(&reply, 0, sizeof(reply));
  52119. + msg.msgId = FM_10G_TX_ECC_WA;
  52120. + msg.msgBody[0] = macId;
  52121. + replyLength = sizeof(uint32_t);
  52122. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52123. + (uint8_t*)&msg,
  52124. + sizeof(msg.msgId)+sizeof(macId),
  52125. + (uint8_t*)&reply,
  52126. + &replyLength,
  52127. + NULL,
  52128. + NULL)) != E_OK)
  52129. + RETURN_ERROR(MINOR, err, NO_MSG);
  52130. + if (replyLength != sizeof(uint32_t))
  52131. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  52132. + return (t_Error)(reply.error);
  52133. + }
  52134. +
  52135. + SANITY_CHECK_RETURN_ERROR((macId == 0), E_NOT_SUPPORTED);
  52136. + SANITY_CHECK_RETURN_ERROR(IsFmanCtrlCodeLoaded(p_Fm), E_INVALID_STATE);
  52137. +
  52138. + rxHardwarePortId = SwPortIdToHwPortId(e_FM_PORT_TYPE_RX_10G,
  52139. + macId,
  52140. + p_Fm->p_FmStateStruct->revInfo.majorRev,
  52141. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  52142. + txHardwarePortId = SwPortIdToHwPortId(e_FM_PORT_TYPE_TX_10G,
  52143. + macId,
  52144. + p_Fm->p_FmStateStruct->revInfo.majorRev,
  52145. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  52146. + if ((p_Fm->p_FmStateStruct->portsTypes[rxHardwarePortId] != e_FM_PORT_TYPE_DUMMY) ||
  52147. + (p_Fm->p_FmStateStruct->portsTypes[txHardwarePortId] != e_FM_PORT_TYPE_DUMMY))
  52148. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  52149. + ("MAC should be initialized prior to Rx and Tx ports!"));
  52150. +
  52151. + return fman_set_erratum_10gmac_a004_wa(fpm_rg);
  52152. +}
  52153. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  52154. +
  52155. +uint16_t FmGetTnumAgingPeriod(t_Handle h_Fm)
  52156. +{
  52157. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  52158. +
  52159. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
  52160. + SANITY_CHECK_RETURN_VALUE(!p_Fm->p_FmDriverParam, E_INVALID_STATE, 0);
  52161. +
  52162. + return p_Fm->tnumAgingPeriod;
  52163. +}
  52164. +
  52165. +t_Error FmSetPortPreFetchConfiguration(t_Handle h_Fm,
  52166. + uint8_t portNum,
  52167. + bool preFetchConfigured)
  52168. +{
  52169. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52170. +
  52171. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  52172. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  52173. +
  52174. + p_Fm->portsPreFetchConfigured[portNum] = TRUE;
  52175. + p_Fm->portsPreFetchValue[portNum] = preFetchConfigured;
  52176. +
  52177. + return E_OK;
  52178. +}
  52179. +
  52180. +t_Error FmGetPortPreFetchConfiguration(t_Handle h_Fm,
  52181. + uint8_t portNum,
  52182. + bool *p_PortConfigured,
  52183. + bool *p_PreFetchConfigured)
  52184. +{
  52185. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52186. +
  52187. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  52188. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  52189. +
  52190. + /* If the prefetch wasn't configured yet (not enable or disabled)
  52191. + we return the value TRUE as it was already configured */
  52192. + if (!p_Fm->portsPreFetchConfigured[portNum])
  52193. + {
  52194. + *p_PortConfigured = FALSE;
  52195. + *p_PreFetchConfigured = FALSE;
  52196. + }
  52197. + else
  52198. + {
  52199. + *p_PortConfigured = TRUE;
  52200. + *p_PreFetchConfigured = (p_Fm->portsPreFetchConfigured[portNum]);
  52201. + }
  52202. +
  52203. + return E_OK;
  52204. +}
  52205. +
  52206. +t_Error FmSetCongestionGroupPFCpriority(t_Handle h_Fm,
  52207. + uint32_t congestionGroupId,
  52208. + uint8_t priorityBitMap)
  52209. +{
  52210. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  52211. + uint32_t regNum;
  52212. +
  52213. + ASSERT_COND(h_Fm);
  52214. +
  52215. + if (congestionGroupId > FM_PORT_NUM_OF_CONGESTION_GRPS)
  52216. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  52217. + ("Congestion group ID bigger than %d",
  52218. + FM_PORT_NUM_OF_CONGESTION_GRPS));
  52219. +
  52220. + if (p_Fm->guestId == NCSW_MASTER_ID)
  52221. + {
  52222. + ASSERT_COND(p_Fm->baseAddr);
  52223. + regNum = (FM_PORT_NUM_OF_CONGESTION_GRPS - 1 - congestionGroupId) / 4;
  52224. + fman_set_congestion_group_pfc_priority((uint32_t *)((p_Fm->baseAddr+FM_MM_CGP)),
  52225. + congestionGroupId,
  52226. + priorityBitMap,
  52227. + regNum);
  52228. + }
  52229. + else if (p_Fm->h_IpcSessions[0])
  52230. + {
  52231. + t_Error err;
  52232. + t_FmIpcMsg msg;
  52233. + t_FmIpcSetCongestionGroupPfcPriority fmIpcSetCongestionGroupPfcPriority;
  52234. +
  52235. + memset(&msg, 0, sizeof(msg));
  52236. + memset(&fmIpcSetCongestionGroupPfcPriority, 0, sizeof(t_FmIpcSetCongestionGroupPfcPriority));
  52237. + fmIpcSetCongestionGroupPfcPriority.congestionGroupId = congestionGroupId;
  52238. + fmIpcSetCongestionGroupPfcPriority.priorityBitMap = priorityBitMap;
  52239. +
  52240. + msg.msgId = FM_SET_CONG_GRP_PFC_PRIO;
  52241. + memcpy(msg.msgBody, &fmIpcSetCongestionGroupPfcPriority, sizeof(t_FmIpcSetCongestionGroupPfcPriority));
  52242. +
  52243. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52244. + (uint8_t*)&msg,
  52245. + sizeof(msg.msgId),
  52246. + NULL,
  52247. + NULL,
  52248. + NULL,
  52249. + NULL);
  52250. + if (err != E_OK)
  52251. + RETURN_ERROR(MINOR, err, NO_MSG);
  52252. + }
  52253. + else
  52254. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("guest without IPC!"));
  52255. +
  52256. + return E_OK;
  52257. +}
  52258. +
  52259. +uintptr_t FmGetPcdPrsBaseAddr(t_Handle h_Fm)
  52260. +{
  52261. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52262. +
  52263. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
  52264. +
  52265. + if (!p_Fm->baseAddr)
  52266. + {
  52267. + REPORT_ERROR(MAJOR, E_INVALID_STATE,
  52268. + ("No base-addr; probably Guest with IPC!"));
  52269. + return 0;
  52270. + }
  52271. +
  52272. + return (p_Fm->baseAddr + FM_MM_PRS);
  52273. +}
  52274. +
  52275. +uintptr_t FmGetPcdKgBaseAddr(t_Handle h_Fm)
  52276. +{
  52277. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52278. +
  52279. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
  52280. +
  52281. + if (!p_Fm->baseAddr)
  52282. + {
  52283. + REPORT_ERROR(MAJOR, E_INVALID_STATE,
  52284. + ("No base-addr; probably Guest with IPC!"));
  52285. + return 0;
  52286. + }
  52287. +
  52288. + return (p_Fm->baseAddr + FM_MM_KG);
  52289. +}
  52290. +
  52291. +uintptr_t FmGetPcdPlcrBaseAddr(t_Handle h_Fm)
  52292. +{
  52293. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52294. +
  52295. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
  52296. +
  52297. + if (!p_Fm->baseAddr)
  52298. + {
  52299. + REPORT_ERROR(MAJOR, E_INVALID_STATE,
  52300. + ("No base-addr; probably Guest with IPC!"));
  52301. + return 0;
  52302. + }
  52303. +
  52304. + return (p_Fm->baseAddr + FM_MM_PLCR);
  52305. +}
  52306. +
  52307. +#if (DPAA_VERSION >= 11)
  52308. +uintptr_t FmGetVSPBaseAddr(t_Handle h_Fm)
  52309. +{
  52310. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52311. +
  52312. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
  52313. +
  52314. + return p_Fm->vspBaseAddr;
  52315. +}
  52316. +#endif /* (DPAA_VERSION >= 11) */
  52317. +
  52318. +t_Handle FmGetMuramHandle(t_Handle h_Fm)
  52319. +{
  52320. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52321. +
  52322. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, NULL);
  52323. +
  52324. + return (p_Fm->h_FmMuram);
  52325. +}
  52326. +
  52327. +void FmGetPhysicalMuramBase(t_Handle h_Fm, t_FmPhysAddr *p_FmPhysAddr)
  52328. +{
  52329. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52330. +
  52331. + if (p_Fm->fmMuramPhysBaseAddr)
  52332. + {
  52333. + /* General FM driver initialization */
  52334. + p_FmPhysAddr->low = (uint32_t)p_Fm->fmMuramPhysBaseAddr;
  52335. + p_FmPhysAddr->high = (uint8_t)((p_Fm->fmMuramPhysBaseAddr & 0x000000ff00000000LL) >> 32);
  52336. + return;
  52337. + }
  52338. +
  52339. + ASSERT_COND(p_Fm->guestId != NCSW_MASTER_ID);
  52340. +
  52341. + if (p_Fm->h_IpcSessions[0])
  52342. + {
  52343. + t_Error err;
  52344. + t_FmIpcMsg msg;
  52345. + t_FmIpcReply reply;
  52346. + uint32_t replyLength;
  52347. + t_FmIpcPhysAddr ipcPhysAddr;
  52348. +
  52349. + memset(&msg, 0, sizeof(msg));
  52350. + memset(&reply, 0, sizeof(reply));
  52351. + msg.msgId = FM_GET_PHYS_MURAM_BASE;
  52352. + replyLength = sizeof(uint32_t) + sizeof(t_FmPhysAddr);
  52353. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52354. + (uint8_t*)&msg,
  52355. + sizeof(msg.msgId),
  52356. + (uint8_t*)&reply,
  52357. + &replyLength,
  52358. + NULL,
  52359. + NULL);
  52360. + if (err != E_OK)
  52361. + {
  52362. + REPORT_ERROR(MINOR, err, NO_MSG);
  52363. + return;
  52364. + }
  52365. + if (replyLength != (sizeof(uint32_t) + sizeof(t_FmPhysAddr)))
  52366. + {
  52367. + REPORT_ERROR(MINOR, E_INVALID_VALUE,("IPC reply length mismatch"));
  52368. + return;
  52369. + }
  52370. + memcpy((uint8_t*)&ipcPhysAddr, reply.replyBody, sizeof(t_FmIpcPhysAddr));
  52371. + p_FmPhysAddr->high = ipcPhysAddr.high;
  52372. + p_FmPhysAddr->low = ipcPhysAddr.low;
  52373. + }
  52374. + else
  52375. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  52376. + ("running in guest-mode without neither IPC nor mapped register!"));
  52377. +}
  52378. +
  52379. +#if (DPAA_VERSION >= 11)
  52380. +t_Error FmVSPAllocForPort (t_Handle h_Fm,
  52381. + e_FmPortType portType,
  52382. + uint8_t portId,
  52383. + uint8_t numOfVSPs)
  52384. +{
  52385. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  52386. + t_Error err = E_OK;
  52387. + uint32_t profilesFound, intFlags;
  52388. + uint8_t first, i;
  52389. + uint8_t log2Num;
  52390. + uint8_t swPortIndex=0, hardwarePortId;
  52391. +
  52392. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  52393. +
  52394. + if (!numOfVSPs)
  52395. + return E_OK;
  52396. +
  52397. + if (numOfVSPs > FM_VSP_MAX_NUM_OF_ENTRIES)
  52398. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("numProfiles can not be bigger than %d.",FM_VSP_MAX_NUM_OF_ENTRIES));
  52399. +
  52400. + if (!POWER_OF_2(numOfVSPs))
  52401. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("numProfiles must be a power of 2."));
  52402. +
  52403. + LOG2((uint64_t)numOfVSPs, log2Num);
  52404. +
  52405. + if ((log2Num == 0) || (p_Fm->partVSPBase == 0))
  52406. + first = 0;
  52407. + else
  52408. + first = 1<<log2Num;
  52409. +
  52410. + if (first > (p_Fm->partVSPBase + p_Fm->partNumOfVSPs))
  52411. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("can not allocate storage profile port window"));
  52412. +
  52413. + if (first < p_Fm->partVSPBase)
  52414. + while (first < p_Fm->partVSPBase)
  52415. + first = first + numOfVSPs;
  52416. +
  52417. + if ((first + numOfVSPs) > (p_Fm->partVSPBase + p_Fm->partNumOfVSPs))
  52418. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("can not allocate storage profile port window"));
  52419. +
  52420. + intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
  52421. + profilesFound = 0;
  52422. + for (i=first; i < p_Fm->partVSPBase + p_Fm->partNumOfVSPs; )
  52423. + {
  52424. + if (!p_Fm->p_FmSp->profiles[i].profilesMng.allocated)
  52425. + {
  52426. + profilesFound++;
  52427. + i++;
  52428. + if (profilesFound == numOfVSPs)
  52429. + break;
  52430. + }
  52431. + else
  52432. + {
  52433. + profilesFound = 0;
  52434. + /* advance i to the next aligned address */
  52435. + first = i = (uint8_t)(first + numOfVSPs);
  52436. + }
  52437. + }
  52438. + if (profilesFound == numOfVSPs)
  52439. + for (i = first; i<first + numOfVSPs; i++)
  52440. + p_Fm->p_FmSp->profiles[i].profilesMng.allocated = TRUE;
  52441. + else
  52442. + {
  52443. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  52444. + RETURN_ERROR(MINOR, E_FULL, ("No profiles."));
  52445. + }
  52446. +
  52447. + hardwarePortId = SwPortIdToHwPortId(portType,
  52448. + portId,
  52449. + p_Fm->p_FmStateStruct->revInfo.majorRev,
  52450. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  52451. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  52452. +
  52453. + p_Fm->p_FmSp->portsMapping[swPortIndex].numOfProfiles = numOfVSPs;
  52454. + p_Fm->p_FmSp->portsMapping[swPortIndex].profilesBase = first;
  52455. +
  52456. + if ((err = SetVSPWindow(h_Fm,hardwarePortId, first,log2Num)) != E_OK)
  52457. + for (i = first; i < first + numOfVSPs; i++)
  52458. + p_Fm->p_FmSp->profiles[i].profilesMng.allocated = FALSE;
  52459. +
  52460. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  52461. +
  52462. + return err;
  52463. +}
  52464. +
  52465. +t_Error FmVSPFreeForPort(t_Handle h_Fm,
  52466. + e_FmPortType portType,
  52467. + uint8_t portId)
  52468. +{
  52469. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  52470. + uint8_t swPortIndex=0, hardwarePortId, first, numOfVSPs, i;
  52471. + uint32_t intFlags;
  52472. +
  52473. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  52474. +
  52475. + hardwarePortId = SwPortIdToHwPortId(portType,
  52476. + portId,
  52477. + p_Fm->p_FmStateStruct->revInfo.majorRev,
  52478. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  52479. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  52480. +
  52481. + numOfVSPs = (uint8_t)p_Fm->p_FmSp->portsMapping[swPortIndex].numOfProfiles;
  52482. + first = (uint8_t)p_Fm->p_FmSp->portsMapping[swPortIndex].profilesBase;
  52483. +
  52484. + intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
  52485. + for (i = first; i < first + numOfVSPs; i++)
  52486. + p_Fm->p_FmSp->profiles[i].profilesMng.allocated = FALSE;
  52487. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  52488. +
  52489. + p_Fm->p_FmSp->portsMapping[swPortIndex].numOfProfiles = 0;
  52490. + p_Fm->p_FmSp->portsMapping[swPortIndex].profilesBase = 0;
  52491. +
  52492. + return E_OK;
  52493. +}
  52494. +#endif /* (DPAA_VERSION >= 11) */
  52495. +
  52496. +t_Error FmAllocFmanCtrlEventReg(t_Handle h_Fm, uint8_t *p_EventId)
  52497. +{
  52498. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52499. + uint8_t i;
  52500. +
  52501. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  52502. +
  52503. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  52504. + p_Fm->h_IpcSessions[0])
  52505. + {
  52506. + t_Error err;
  52507. + t_FmIpcMsg msg;
  52508. + t_FmIpcReply reply;
  52509. + uint32_t replyLength;
  52510. +
  52511. + memset(&msg, 0, sizeof(msg));
  52512. + memset(&reply, 0, sizeof(reply));
  52513. + msg.msgId = FM_ALLOC_FMAN_CTRL_EVENT_REG;
  52514. + replyLength = sizeof(uint32_t) + sizeof(uint8_t);
  52515. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52516. + (uint8_t*)&msg,
  52517. + sizeof(msg.msgId),
  52518. + (uint8_t*)&reply,
  52519. + &replyLength,
  52520. + NULL,
  52521. + NULL)) != E_OK)
  52522. + RETURN_ERROR(MAJOR, err, NO_MSG);
  52523. +
  52524. + if (replyLength != (sizeof(uint32_t) + sizeof(uint8_t)))
  52525. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  52526. +
  52527. + *p_EventId = *(uint8_t*)(reply.replyBody);
  52528. +
  52529. + return (t_Error)(reply.error);
  52530. + }
  52531. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  52532. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  52533. + ("running in guest-mode without IPC!"));
  52534. +
  52535. + for (i=0;i<FM_NUM_OF_FMAN_CTRL_EVENT_REGS;i++)
  52536. + if (!p_Fm->usedEventRegs[i])
  52537. + {
  52538. + p_Fm->usedEventRegs[i] = TRUE;
  52539. + *p_EventId = i;
  52540. + break;
  52541. + }
  52542. +
  52543. + if (i==FM_NUM_OF_FMAN_CTRL_EVENT_REGS)
  52544. + RETURN_ERROR(MAJOR, E_BUSY, ("No resource - FMan controller event register."));
  52545. +
  52546. + return E_OK;
  52547. +}
  52548. +
  52549. +void FmFreeFmanCtrlEventReg(t_Handle h_Fm, uint8_t eventId)
  52550. +{
  52551. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52552. +
  52553. + SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
  52554. +
  52555. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  52556. + p_Fm->h_IpcSessions[0])
  52557. + {
  52558. + t_Error err;
  52559. + t_FmIpcMsg msg;
  52560. +
  52561. + memset(&msg, 0, sizeof(msg));
  52562. + msg.msgId = FM_FREE_FMAN_CTRL_EVENT_REG;
  52563. + msg.msgBody[0] = eventId;
  52564. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52565. + (uint8_t*)&msg,
  52566. + sizeof(msg.msgId)+sizeof(eventId),
  52567. + NULL,
  52568. + NULL,
  52569. + NULL,
  52570. + NULL);
  52571. + if (err != E_OK)
  52572. + REPORT_ERROR(MINOR, err, NO_MSG);
  52573. + return;
  52574. + }
  52575. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  52576. + {
  52577. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  52578. + ("running in guest-mode without IPC!"));
  52579. + return;
  52580. + }
  52581. +
  52582. + ((t_Fm*)h_Fm)->usedEventRegs[eventId] = FALSE;
  52583. +}
  52584. +
  52585. +void FmSetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, uint32_t enableEvents)
  52586. +{
  52587. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52588. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  52589. +
  52590. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  52591. + !p_Fm->p_FmFpmRegs &&
  52592. + p_Fm->h_IpcSessions[0])
  52593. + {
  52594. + t_FmIpcFmanEvents fmanCtrl;
  52595. + t_Error err;
  52596. + t_FmIpcMsg msg;
  52597. +
  52598. + fmanCtrl.eventRegId = eventRegId;
  52599. + fmanCtrl.enableEvents = enableEvents;
  52600. + memset(&msg, 0, sizeof(msg));
  52601. + msg.msgId = FM_SET_FMAN_CTRL_EVENTS_ENABLE;
  52602. + memcpy(msg.msgBody, &fmanCtrl, sizeof(fmanCtrl));
  52603. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52604. + (uint8_t*)&msg,
  52605. + sizeof(msg.msgId)+sizeof(fmanCtrl),
  52606. + NULL,
  52607. + NULL,
  52608. + NULL,
  52609. + NULL);
  52610. + if (err != E_OK)
  52611. + REPORT_ERROR(MINOR, err, NO_MSG);
  52612. + return;
  52613. + }
  52614. + else if (!p_Fm->p_FmFpmRegs)
  52615. + {
  52616. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  52617. + ("Either IPC or 'baseAddress' is required!"));
  52618. + return;
  52619. + }
  52620. +
  52621. + ASSERT_COND(eventRegId < FM_NUM_OF_FMAN_CTRL_EVENT_REGS);
  52622. + fman_set_ctrl_intr(fpm_rg, eventRegId, enableEvents);
  52623. +}
  52624. +
  52625. +uint32_t FmGetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId)
  52626. +{
  52627. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52628. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  52629. +
  52630. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  52631. + !p_Fm->p_FmFpmRegs &&
  52632. + p_Fm->h_IpcSessions[0])
  52633. + {
  52634. + t_Error err;
  52635. + t_FmIpcMsg msg;
  52636. + t_FmIpcReply reply;
  52637. + uint32_t replyLength, ctrlIntr;
  52638. +
  52639. + memset(&msg, 0, sizeof(msg));
  52640. + memset(&reply, 0, sizeof(reply));
  52641. + msg.msgId = FM_GET_FMAN_CTRL_EVENTS_ENABLE;
  52642. + msg.msgBody[0] = eventRegId;
  52643. + replyLength = sizeof(uint32_t) + sizeof(uint32_t);
  52644. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52645. + (uint8_t*)&msg,
  52646. + sizeof(msg.msgId)+sizeof(eventRegId),
  52647. + (uint8_t*)&reply,
  52648. + &replyLength,
  52649. + NULL,
  52650. + NULL);
  52651. + if (err != E_OK)
  52652. + {
  52653. + REPORT_ERROR(MINOR, err, NO_MSG);
  52654. + return 0;
  52655. + }
  52656. + if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
  52657. + {
  52658. + REPORT_ERROR(MINOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  52659. + return 0;
  52660. + }
  52661. + memcpy((uint8_t*)&ctrlIntr, reply.replyBody, sizeof(uint32_t));
  52662. + return ctrlIntr;
  52663. + }
  52664. + else if (!p_Fm->p_FmFpmRegs)
  52665. + {
  52666. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  52667. + ("Either IPC or 'baseAddress' is required!"));
  52668. + return 0;
  52669. + }
  52670. +
  52671. + return fman_get_ctrl_intr(fpm_rg, eventRegId);
  52672. +}
  52673. +
  52674. +void FmRegisterIntr(t_Handle h_Fm,
  52675. + e_FmEventModules module,
  52676. + uint8_t modId,
  52677. + e_FmIntrType intrType,
  52678. + void (*f_Isr) (t_Handle h_Arg),
  52679. + t_Handle h_Arg)
  52680. +{
  52681. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52682. + int event = 0;
  52683. +
  52684. + ASSERT_COND(h_Fm);
  52685. +
  52686. + GET_FM_MODULE_EVENT(module, modId, intrType, event);
  52687. + ASSERT_COND(event < e_FM_EV_DUMMY_LAST);
  52688. +
  52689. + /* register in local FM structure */
  52690. + p_Fm->intrMng[event].f_Isr = f_Isr;
  52691. + p_Fm->intrMng[event].h_SrcHandle = h_Arg;
  52692. +
  52693. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  52694. + p_Fm->h_IpcSessions[0])
  52695. + {
  52696. + t_FmIpcRegisterIntr fmIpcRegisterIntr;
  52697. + t_Error err;
  52698. + t_FmIpcMsg msg;
  52699. +
  52700. + /* register in Master FM structure */
  52701. + fmIpcRegisterIntr.event = (uint32_t)event;
  52702. + fmIpcRegisterIntr.guestId = p_Fm->guestId;
  52703. + memset(&msg, 0, sizeof(msg));
  52704. + msg.msgId = FM_REGISTER_INTR;
  52705. + memcpy(msg.msgBody, &fmIpcRegisterIntr, sizeof(fmIpcRegisterIntr));
  52706. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52707. + (uint8_t*)&msg,
  52708. + sizeof(msg.msgId) + sizeof(fmIpcRegisterIntr),
  52709. + NULL,
  52710. + NULL,
  52711. + NULL,
  52712. + NULL);
  52713. + if (err != E_OK)
  52714. + REPORT_ERROR(MINOR, err, NO_MSG);
  52715. + }
  52716. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  52717. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  52718. + ("running in guest-mode without IPC!"));
  52719. +}
  52720. +
  52721. +void FmUnregisterIntr(t_Handle h_Fm,
  52722. + e_FmEventModules module,
  52723. + uint8_t modId,
  52724. + e_FmIntrType intrType)
  52725. +{
  52726. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52727. + int event = 0;
  52728. +
  52729. + ASSERT_COND(h_Fm);
  52730. +
  52731. + GET_FM_MODULE_EVENT(module, modId,intrType, event);
  52732. + ASSERT_COND(event < e_FM_EV_DUMMY_LAST);
  52733. +
  52734. + p_Fm->intrMng[event].f_Isr = UnimplementedIsr;
  52735. + p_Fm->intrMng[event].h_SrcHandle = NULL;
  52736. +}
  52737. +
  52738. +void FmRegisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Arg, uint32_t event), t_Handle h_Arg)
  52739. +{
  52740. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52741. +
  52742. + ASSERT_COND(eventRegId<FM_NUM_OF_FMAN_CTRL_EVENT_REGS);
  52743. +
  52744. + if (p_Fm->guestId != NCSW_MASTER_ID)
  52745. + {
  52746. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM in guest-mode"));
  52747. + return;
  52748. + }
  52749. +
  52750. + p_Fm->fmanCtrlIntr[eventRegId].f_Isr = f_Isr;
  52751. + p_Fm->fmanCtrlIntr[eventRegId].h_SrcHandle = h_Arg;
  52752. +}
  52753. +
  52754. +void FmUnregisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId)
  52755. +{
  52756. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52757. +
  52758. + ASSERT_COND(eventRegId<FM_NUM_OF_FMAN_CTRL_EVENT_REGS);
  52759. +
  52760. + if (p_Fm->guestId != NCSW_MASTER_ID)
  52761. + {
  52762. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("FM in guest-mode"));
  52763. + return;
  52764. + }
  52765. +
  52766. + p_Fm->fmanCtrlIntr[eventRegId].f_Isr = UnimplementedFmanCtrlIsr;
  52767. + p_Fm->fmanCtrlIntr[eventRegId].h_SrcHandle = NULL;
  52768. +}
  52769. +
  52770. +void FmRegisterPcd(t_Handle h_Fm, t_Handle h_FmPcd)
  52771. +{
  52772. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52773. +
  52774. + if (p_Fm->h_Pcd)
  52775. + REPORT_ERROR(MAJOR, E_ALREADY_EXISTS, ("PCD already set"));
  52776. +
  52777. + p_Fm->h_Pcd = h_FmPcd;
  52778. +}
  52779. +
  52780. +void FmUnregisterPcd(t_Handle h_Fm)
  52781. +{
  52782. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52783. +
  52784. + if (!p_Fm->h_Pcd)
  52785. + REPORT_ERROR(MAJOR, E_NOT_FOUND, ("PCD handle!"));
  52786. +
  52787. + p_Fm->h_Pcd = NULL;
  52788. +}
  52789. +
  52790. +t_Handle FmGetPcdHandle(t_Handle h_Fm)
  52791. +{
  52792. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52793. +
  52794. + return p_Fm->h_Pcd;
  52795. +}
  52796. +
  52797. +uint8_t FmGetId(t_Handle h_Fm)
  52798. +{
  52799. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52800. +
  52801. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0xff);
  52802. +
  52803. + return p_Fm->p_FmStateStruct->fmId;
  52804. +}
  52805. +
  52806. +t_Error FmSetNumOfRiscsPerPort(t_Handle h_Fm,
  52807. + uint8_t hardwarePortId,
  52808. + uint8_t numOfFmanCtrls,
  52809. + t_FmFmanCtrl orFmanCtrl)
  52810. +{
  52811. +
  52812. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52813. + struct fman_fpm_regs *fpm_rg;
  52814. +
  52815. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  52816. + SANITY_CHECK_RETURN_ERROR(((numOfFmanCtrls > 0) && (numOfFmanCtrls < 3)) , E_INVALID_HANDLE);
  52817. +
  52818. + fpm_rg = p_Fm->p_FmFpmRegs;
  52819. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  52820. + !p_Fm->p_FmFpmRegs &&
  52821. + p_Fm->h_IpcSessions[0])
  52822. + {
  52823. + t_Error err;
  52824. + t_FmIpcPortNumOfFmanCtrls params;
  52825. + t_FmIpcMsg msg;
  52826. +
  52827. + memset(&msg, 0, sizeof(msg));
  52828. + params.hardwarePortId = hardwarePortId;
  52829. + params.numOfFmanCtrls = numOfFmanCtrls;
  52830. + params.orFmanCtrl = orFmanCtrl;
  52831. + msg.msgId = FM_SET_NUM_OF_FMAN_CTRL;
  52832. + memcpy(msg.msgBody, &params, sizeof(params));
  52833. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52834. + (uint8_t*)&msg,
  52835. + sizeof(msg.msgId) +sizeof(params),
  52836. + NULL,
  52837. + NULL,
  52838. + NULL,
  52839. + NULL);
  52840. + if (err != E_OK)
  52841. + RETURN_ERROR(MINOR, err, NO_MSG);
  52842. + return E_OK;
  52843. + }
  52844. + else if (!p_Fm->p_FmFpmRegs)
  52845. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  52846. + ("Either IPC or 'baseAddress' is required!"));
  52847. +
  52848. + fman_set_num_of_riscs_per_port(fpm_rg, hardwarePortId, numOfFmanCtrls, orFmanCtrl);
  52849. +
  52850. + return E_OK;
  52851. +}
  52852. +
  52853. +t_Error FmGetSetPortParams(t_Handle h_Fm, t_FmInterModulePortInitParams *p_PortParams)
  52854. +{
  52855. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  52856. + t_Error err;
  52857. + uint32_t intFlags;
  52858. + uint8_t hardwarePortId = p_PortParams->hardwarePortId, macId;
  52859. + struct fman_rg fman_rg;
  52860. +
  52861. + fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
  52862. + fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
  52863. + fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
  52864. + fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
  52865. +
  52866. + if (p_Fm->guestId != NCSW_MASTER_ID)
  52867. + {
  52868. + t_FmIpcPortInInitParams portInParams;
  52869. + t_FmIpcPortOutInitParams portOutParams;
  52870. + t_FmIpcMsg msg;
  52871. + t_FmIpcReply reply;
  52872. + uint32_t replyLength;
  52873. +
  52874. + portInParams.hardwarePortId = p_PortParams->hardwarePortId;
  52875. + portInParams.enumPortType = (uint32_t)p_PortParams->portType;
  52876. + portInParams.boolIndependentMode= (uint8_t)p_PortParams->independentMode;
  52877. + portInParams.liodnOffset = p_PortParams->liodnOffset;
  52878. + portInParams.numOfTasks = p_PortParams->numOfTasks;
  52879. + portInParams.numOfExtraTasks = p_PortParams->numOfExtraTasks;
  52880. + portInParams.numOfOpenDmas = p_PortParams->numOfOpenDmas;
  52881. + portInParams.numOfExtraOpenDmas = p_PortParams->numOfExtraOpenDmas;
  52882. + portInParams.sizeOfFifo = p_PortParams->sizeOfFifo;
  52883. + portInParams.extraSizeOfFifo = p_PortParams->extraSizeOfFifo;
  52884. + portInParams.deqPipelineDepth = p_PortParams->deqPipelineDepth;
  52885. + portInParams.maxFrameLength = p_PortParams->maxFrameLength;
  52886. + portInParams.liodnBase = p_PortParams->liodnBase;
  52887. +
  52888. + memset(&msg, 0, sizeof(msg));
  52889. + memset(&reply, 0, sizeof(reply));
  52890. + msg.msgId = FM_GET_SET_PORT_PARAMS;
  52891. + memcpy(msg.msgBody, &portInParams, sizeof(portInParams));
  52892. + replyLength = (sizeof(uint32_t) + sizeof(t_FmIpcPortOutInitParams));
  52893. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  52894. + (uint8_t*)&msg,
  52895. + sizeof(msg.msgId) +sizeof(portInParams),
  52896. + (uint8_t*)&reply,
  52897. + &replyLength,
  52898. + NULL,
  52899. + NULL)) != E_OK)
  52900. + RETURN_ERROR(MINOR, err, NO_MSG);
  52901. + if (replyLength != (sizeof(uint32_t) + sizeof(t_FmIpcPortOutInitParams)))
  52902. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  52903. + memcpy((uint8_t*)&portOutParams, reply.replyBody, sizeof(t_FmIpcPortOutInitParams));
  52904. +
  52905. + p_PortParams->fmMuramPhysBaseAddr.high = portOutParams.ipcPhysAddr.high;
  52906. + p_PortParams->fmMuramPhysBaseAddr.low = portOutParams.ipcPhysAddr.low;
  52907. + p_PortParams->numOfTasks = portOutParams.numOfTasks;
  52908. + p_PortParams->numOfExtraTasks = portOutParams.numOfExtraTasks;
  52909. + p_PortParams->numOfOpenDmas = portOutParams.numOfOpenDmas;
  52910. + p_PortParams->numOfExtraOpenDmas = portOutParams.numOfExtraOpenDmas;
  52911. + p_PortParams->sizeOfFifo = portOutParams.sizeOfFifo;
  52912. + p_PortParams->extraSizeOfFifo = portOutParams.extraSizeOfFifo;
  52913. +
  52914. + return (t_Error)(reply.error);
  52915. + }
  52916. +
  52917. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  52918. +
  52919. + intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
  52920. + if (p_PortParams->independentMode)
  52921. + {
  52922. + /* set port parameters */
  52923. + p_Fm->independentMode = p_PortParams->independentMode;
  52924. + /* disable dispatch limit */
  52925. + fman_qmi_disable_dispatch_limit(fman_rg.fpm_rg);
  52926. + }
  52927. +
  52928. + if (p_PortParams->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
  52929. + {
  52930. + if (p_Fm->hcPortInitialized)
  52931. + {
  52932. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  52933. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Only one host command port is allowed."));
  52934. + }
  52935. + else
  52936. + p_Fm->hcPortInitialized = TRUE;
  52937. + }
  52938. + p_Fm->p_FmStateStruct->portsTypes[hardwarePortId] = p_PortParams->portType;
  52939. +
  52940. + err = FmSetNumOfTasks(p_Fm, hardwarePortId, &p_PortParams->numOfTasks, &p_PortParams->numOfExtraTasks, TRUE);
  52941. + if (err)
  52942. + {
  52943. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  52944. + RETURN_ERROR(MAJOR, err, NO_MSG);
  52945. + }
  52946. +
  52947. +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  52948. + if (p_Fm->p_FmStateStruct->revInfo.majorRev != 4)
  52949. +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
  52950. + if ((p_PortParams->portType != e_FM_PORT_TYPE_RX) &&
  52951. + (p_PortParams->portType != e_FM_PORT_TYPE_RX_10G))
  52952. + /* for transmit & O/H ports */
  52953. + {
  52954. + uint8_t enqTh;
  52955. + uint8_t deqTh;
  52956. +
  52957. + /* update qmi ENQ/DEQ threshold */
  52958. + p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums += p_PortParams->deqPipelineDepth;
  52959. + enqTh = fman_get_qmi_enq_th(fman_rg.qmi_rg);
  52960. + /* if enqTh is too big, we reduce it to the max value that is still OK */
  52961. + if (enqTh >= (QMI_MAX_NUM_OF_TNUMS - p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums))
  52962. + {
  52963. + enqTh = (uint8_t)(QMI_MAX_NUM_OF_TNUMS - p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums - 1);
  52964. + fman_set_qmi_enq_th(fman_rg.qmi_rg, enqTh);
  52965. + }
  52966. +
  52967. + deqTh = fman_get_qmi_deq_th(fman_rg.qmi_rg);
  52968. + /* if deqTh is too small, we enlarge it to the min value that is still OK.
  52969. + deqTh may not be larger than 63 (QMI_MAX_NUM_OF_TNUMS-1). */
  52970. + if ((deqTh <= p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums) && (deqTh < QMI_MAX_NUM_OF_TNUMS-1))
  52971. + {
  52972. + deqTh = (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums + 1);
  52973. + fman_set_qmi_deq_th(fman_rg.qmi_rg, deqTh);
  52974. + }
  52975. + }
  52976. +
  52977. +#ifdef FM_LOW_END_RESTRICTION
  52978. + if ((hardwarePortId==0x1) || (hardwarePortId==0x29))
  52979. + {
  52980. + if (p_Fm->p_FmStateStruct->lowEndRestriction)
  52981. + {
  52982. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  52983. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE, ("OP #0 cannot work with Tx Port #1."));
  52984. + }
  52985. + else
  52986. + p_Fm->p_FmStateStruct->lowEndRestriction = TRUE;
  52987. + }
  52988. +#endif /* FM_LOW_END_RESTRICTION */
  52989. +
  52990. + err = FmSetSizeOfFifo(p_Fm,
  52991. + hardwarePortId,
  52992. + &p_PortParams->sizeOfFifo,
  52993. + &p_PortParams->extraSizeOfFifo,
  52994. + TRUE);
  52995. + if (err)
  52996. + {
  52997. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  52998. + RETURN_ERROR(MAJOR, err, NO_MSG);
  52999. + }
  53000. +
  53001. + err = FmSetNumOfOpenDmas(p_Fm,
  53002. + hardwarePortId,
  53003. + &p_PortParams->numOfOpenDmas,
  53004. + &p_PortParams->numOfExtraOpenDmas,
  53005. + TRUE);
  53006. + if (err)
  53007. + {
  53008. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  53009. + RETURN_ERROR(MAJOR, err, NO_MSG);
  53010. + }
  53011. +
  53012. + fman_set_liodn_per_port(&fman_rg,
  53013. + hardwarePortId,
  53014. + p_PortParams->liodnBase,
  53015. + p_PortParams->liodnOffset);
  53016. +
  53017. + if (p_Fm->p_FmStateStruct->revInfo.majorRev < 6)
  53018. + fman_set_order_restoration_per_port(fman_rg.fpm_rg,
  53019. + hardwarePortId,
  53020. + p_PortParams->independentMode,
  53021. + !!((p_PortParams->portType==e_FM_PORT_TYPE_RX) || (p_PortParams->portType==e_FM_PORT_TYPE_RX_10G)));
  53022. +
  53023. + HW_PORT_ID_TO_SW_PORT_ID(macId, hardwarePortId);
  53024. +
  53025. +#if defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS)
  53026. + if ((p_PortParams->portType == e_FM_PORT_TYPE_TX_10G) ||
  53027. + (p_PortParams->portType == e_FM_PORT_TYPE_RX_10G))
  53028. + {
  53029. + ASSERT_COND(macId < FM_MAX_NUM_OF_10G_MACS);
  53030. + if (p_PortParams->maxFrameLength >= p_Fm->p_FmStateStruct->macMaxFrameLengths10G[macId])
  53031. + p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId] = p_PortParams->maxFrameLength;
  53032. + else
  53033. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("Port maxFrameLength is smaller than MAC current MTU"));
  53034. + }
  53035. + else
  53036. +#endif /* defined(FM_MAX_NUM_OF_10G_MACS) && ... */
  53037. + if ((p_PortParams->portType == e_FM_PORT_TYPE_TX) ||
  53038. + (p_PortParams->portType == e_FM_PORT_TYPE_RX))
  53039. + {
  53040. + ASSERT_COND(macId < FM_MAX_NUM_OF_1G_MACS);
  53041. + if (p_PortParams->maxFrameLength >= p_Fm->p_FmStateStruct->macMaxFrameLengths1G[macId])
  53042. + p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId] = p_PortParams->maxFrameLength;
  53043. + else
  53044. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("Port maxFrameLength is smaller than MAC current MTU"));
  53045. + }
  53046. +
  53047. + FmGetPhysicalMuramBase(p_Fm, &p_PortParams->fmMuramPhysBaseAddr);
  53048. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  53049. +
  53050. + return E_OK;
  53051. +}
  53052. +
  53053. +void FmFreePortParams(t_Handle h_Fm,t_FmInterModulePortFreeParams *p_PortParams)
  53054. +{
  53055. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53056. + uint32_t intFlags;
  53057. + uint8_t hardwarePortId = p_PortParams->hardwarePortId;
  53058. + uint8_t numOfTasks, numOfDmas, macId;
  53059. + uint16_t sizeOfFifo;
  53060. + t_Error err;
  53061. + t_FmIpcPortFreeParams portParams;
  53062. + t_FmIpcMsg msg;
  53063. + struct fman_qmi_regs *qmi_rg = p_Fm->p_FmQmiRegs;
  53064. + struct fman_bmi_regs *bmi_rg = p_Fm->p_FmBmiRegs;
  53065. +
  53066. + if (p_Fm->guestId != NCSW_MASTER_ID)
  53067. + {
  53068. + portParams.hardwarePortId = p_PortParams->hardwarePortId;
  53069. + portParams.enumPortType = (uint32_t)p_PortParams->portType;
  53070. + portParams.deqPipelineDepth = p_PortParams->deqPipelineDepth;
  53071. + memset(&msg, 0, sizeof(msg));
  53072. + msg.msgId = FM_FREE_PORT;
  53073. + memcpy(msg.msgBody, &portParams, sizeof(portParams));
  53074. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53075. + (uint8_t*)&msg,
  53076. + sizeof(msg.msgId)+sizeof(portParams),
  53077. + NULL,
  53078. + NULL,
  53079. + NULL,
  53080. + NULL);
  53081. + if (err != E_OK)
  53082. + REPORT_ERROR(MINOR, err, NO_MSG);
  53083. + return;
  53084. + }
  53085. +
  53086. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  53087. +
  53088. + intFlags = XX_LockIntrSpinlock(p_Fm->h_Spinlock);
  53089. +
  53090. + if (p_PortParams->portType == e_FM_PORT_TYPE_OH_HOST_COMMAND)
  53091. + {
  53092. + ASSERT_COND(p_Fm->hcPortInitialized);
  53093. + p_Fm->hcPortInitialized = FALSE;
  53094. + }
  53095. +
  53096. + p_Fm->p_FmStateStruct->portsTypes[hardwarePortId] = e_FM_PORT_TYPE_DUMMY;
  53097. +
  53098. + /* free numOfTasks */
  53099. + numOfTasks = fman_get_num_of_tasks(bmi_rg, hardwarePortId);
  53100. + ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfTasks >= numOfTasks);
  53101. + p_Fm->p_FmStateStruct->accumulatedNumOfTasks -= numOfTasks;
  53102. +
  53103. + /* free numOfOpenDmas */
  53104. + numOfDmas = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
  53105. + ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas >= numOfDmas);
  53106. + p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas -= numOfDmas;
  53107. +
  53108. +#ifdef FM_HAS_TOTAL_DMAS
  53109. + if (p_Fm->p_FmStateStruct->revInfo.majorRev < 6)
  53110. + {
  53111. + /* update total num of DMA's with committed number of open DMAS, and max uncommitted pool. */
  53112. + fman_set_num_of_open_dmas(bmi_rg,
  53113. + hardwarePortId,
  53114. + 1,
  53115. + 0,
  53116. + (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize));
  53117. + }
  53118. +#endif /* FM_HAS_TOTAL_DMAS */
  53119. +
  53120. + /* free sizeOfFifo */
  53121. + sizeOfFifo = fman_get_size_of_fifo(bmi_rg, hardwarePortId);
  53122. + ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedFifoSize >= (sizeOfFifo * BMI_FIFO_UNITS));
  53123. + p_Fm->p_FmStateStruct->accumulatedFifoSize -= (sizeOfFifo * BMI_FIFO_UNITS);
  53124. +
  53125. +#ifdef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  53126. + if (p_Fm->p_FmStateStruct->revInfo.majorRev != 4)
  53127. +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
  53128. + if ((p_PortParams->portType != e_FM_PORT_TYPE_RX) &&
  53129. + (p_PortParams->portType != e_FM_PORT_TYPE_RX_10G))
  53130. + /* for transmit & O/H ports */
  53131. + {
  53132. + uint8_t enqTh;
  53133. + uint8_t deqTh;
  53134. +
  53135. + /* update qmi ENQ/DEQ threshold */
  53136. + p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums -= p_PortParams->deqPipelineDepth;
  53137. +
  53138. + /* p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums is now smaller,
  53139. + so we can enlarge enqTh */
  53140. + enqTh = (uint8_t)(QMI_MAX_NUM_OF_TNUMS - p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums - 1);
  53141. +
  53142. + /* p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums is now smaller,
  53143. + so we can reduce deqTh */
  53144. + deqTh = (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfDeqTnums + 1);
  53145. +
  53146. + fman_set_qmi_enq_th(qmi_rg, enqTh);
  53147. + fman_set_qmi_deq_th(qmi_rg, deqTh);
  53148. + }
  53149. +
  53150. + HW_PORT_ID_TO_SW_PORT_ID(macId, hardwarePortId);
  53151. +
  53152. +#if defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS)
  53153. + if ((p_PortParams->portType == e_FM_PORT_TYPE_TX_10G) ||
  53154. + (p_PortParams->portType == e_FM_PORT_TYPE_RX_10G))
  53155. + {
  53156. + ASSERT_COND(macId < FM_MAX_NUM_OF_10G_MACS);
  53157. + p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId] = 0;
  53158. + }
  53159. + else
  53160. +#endif /* defined(FM_MAX_NUM_OF_10G_MACS) && ... */
  53161. + if ((p_PortParams->portType == e_FM_PORT_TYPE_TX) ||
  53162. + (p_PortParams->portType == e_FM_PORT_TYPE_RX))
  53163. + {
  53164. + ASSERT_COND(macId < FM_MAX_NUM_OF_1G_MACS);
  53165. + p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId] = 0;
  53166. + }
  53167. +
  53168. +#ifdef FM_LOW_END_RESTRICTION
  53169. + if ((hardwarePortId==0x1) || (hardwarePortId==0x29))
  53170. + p_Fm->p_FmStateStruct->lowEndRestriction = FALSE;
  53171. +#endif /* FM_LOW_END_RESTRICTION */
  53172. + XX_UnlockIntrSpinlock(p_Fm->h_Spinlock, intFlags);
  53173. +}
  53174. +
  53175. +t_Error FmIsPortStalled(t_Handle h_Fm, uint8_t hardwarePortId, bool *p_IsStalled)
  53176. +{
  53177. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53178. + t_Error err;
  53179. + t_FmIpcMsg msg;
  53180. + t_FmIpcReply reply;
  53181. + uint32_t replyLength;
  53182. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  53183. +
  53184. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53185. + !p_Fm->baseAddr &&
  53186. + p_Fm->h_IpcSessions[0])
  53187. + {
  53188. + memset(&msg, 0, sizeof(msg));
  53189. + memset(&reply, 0, sizeof(reply));
  53190. + msg.msgId = FM_IS_PORT_STALLED;
  53191. + msg.msgBody[0] = hardwarePortId;
  53192. + replyLength = sizeof(uint32_t) + sizeof(uint8_t);
  53193. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53194. + (uint8_t*)&msg,
  53195. + sizeof(msg.msgId)+sizeof(hardwarePortId),
  53196. + (uint8_t*)&reply,
  53197. + &replyLength,
  53198. + NULL,
  53199. + NULL);
  53200. + if (err != E_OK)
  53201. + RETURN_ERROR(MINOR, err, NO_MSG);
  53202. + if (replyLength != (sizeof(uint32_t) + sizeof(uint8_t)))
  53203. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  53204. +
  53205. + *p_IsStalled = (bool)!!(*(uint8_t*)(reply.replyBody));
  53206. +
  53207. + return (t_Error)(reply.error);
  53208. + }
  53209. + else if (!p_Fm->baseAddr)
  53210. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  53211. + ("Either IPC or 'baseAddress' is required!"));
  53212. +
  53213. + *p_IsStalled = fman_is_port_stalled(fpm_rg, hardwarePortId);
  53214. +
  53215. + return E_OK;
  53216. +}
  53217. +
  53218. +t_Error FmResumeStalledPort(t_Handle h_Fm, uint8_t hardwarePortId)
  53219. +{
  53220. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53221. + t_Error err;
  53222. + bool isStalled;
  53223. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  53224. +
  53225. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53226. + !p_Fm->baseAddr &&
  53227. + p_Fm->h_IpcSessions[0])
  53228. + {
  53229. + t_FmIpcMsg msg;
  53230. + t_FmIpcReply reply;
  53231. + uint32_t replyLength;
  53232. +
  53233. + memset(&msg, 0, sizeof(msg));
  53234. + memset(&reply, 0, sizeof(reply));
  53235. + msg.msgId = FM_RESUME_STALLED_PORT;
  53236. + msg.msgBody[0] = hardwarePortId;
  53237. + replyLength = sizeof(uint32_t);
  53238. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53239. + (uint8_t*)&msg,
  53240. + sizeof(msg.msgId) + sizeof(hardwarePortId),
  53241. + (uint8_t*)&reply,
  53242. + &replyLength,
  53243. + NULL,
  53244. + NULL);
  53245. + if (err != E_OK)
  53246. + RETURN_ERROR(MINOR, err, NO_MSG);
  53247. + if (replyLength != sizeof(uint32_t))
  53248. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  53249. + return (t_Error)(reply.error);
  53250. + }
  53251. + else if (!p_Fm->baseAddr)
  53252. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  53253. + ("Either IPC or 'baseAddress' is required!"));
  53254. +
  53255. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  53256. + RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Not available for this FM revision!"));
  53257. +
  53258. + /* Get port status */
  53259. + err = FmIsPortStalled(h_Fm, hardwarePortId, &isStalled);
  53260. + if (err)
  53261. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Can't get port status"));
  53262. + if (!isStalled)
  53263. + return E_OK;
  53264. +
  53265. + fman_resume_stalled_port(fpm_rg, hardwarePortId);
  53266. +
  53267. + return E_OK;
  53268. +}
  53269. +
  53270. +t_Error FmResetMac(t_Handle h_Fm, e_FmMacType type, uint8_t macId)
  53271. +{
  53272. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53273. + t_Error err;
  53274. + struct fman_fpm_regs *fpm_rg = p_Fm->p_FmFpmRegs;
  53275. +
  53276. +#if (DPAA_VERSION >= 11)
  53277. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  53278. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  53279. + ("FMan MAC reset!"));
  53280. +#endif /*(DPAA_VERSION >= 11)*/
  53281. +
  53282. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53283. + !p_Fm->baseAddr &&
  53284. + p_Fm->h_IpcSessions[0])
  53285. + {
  53286. + t_FmIpcMacParams macParams;
  53287. + t_FmIpcMsg msg;
  53288. + t_FmIpcReply reply;
  53289. + uint32_t replyLength;
  53290. +
  53291. + memset(&msg, 0, sizeof(msg));
  53292. + memset(&reply, 0, sizeof(reply));
  53293. + macParams.id = macId;
  53294. + macParams.enumType = (uint32_t)type;
  53295. + msg.msgId = FM_RESET_MAC;
  53296. + memcpy(msg.msgBody, &macParams, sizeof(macParams));
  53297. + replyLength = sizeof(uint32_t);
  53298. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53299. + (uint8_t*)&msg,
  53300. + sizeof(msg.msgId)+sizeof(macParams),
  53301. + (uint8_t*)&reply,
  53302. + &replyLength,
  53303. + NULL,
  53304. + NULL);
  53305. + if (err != E_OK)
  53306. + RETURN_ERROR(MINOR, err, NO_MSG);
  53307. + if (replyLength != sizeof(uint32_t))
  53308. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  53309. + return (t_Error)(reply.error);
  53310. + }
  53311. + else if (!p_Fm->baseAddr)
  53312. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  53313. + ("Either IPC or 'baseAddress' is required!"));
  53314. +
  53315. + err = (t_Error)fman_reset_mac(fpm_rg, macId, !!(type == e_FM_MAC_10G));
  53316. +
  53317. + if (err == -EBUSY)
  53318. + return ERROR_CODE(E_TIMEOUT);
  53319. + else if (err)
  53320. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal MAC ID"));
  53321. +
  53322. + return E_OK;
  53323. +}
  53324. +
  53325. +t_Error FmSetMacMaxFrame(t_Handle h_Fm, e_FmMacType type, uint8_t macId, uint16_t mtu)
  53326. +{
  53327. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53328. +
  53329. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53330. + p_Fm->h_IpcSessions[0])
  53331. + {
  53332. + t_FmIpcMacMaxFrameParams macMaxFrameLengthParams;
  53333. + t_Error err;
  53334. + t_FmIpcMsg msg;
  53335. +
  53336. + memset(&msg, 0, sizeof(msg));
  53337. + macMaxFrameLengthParams.macParams.id = macId;
  53338. + macMaxFrameLengthParams.macParams.enumType = (uint32_t)type;
  53339. + macMaxFrameLengthParams.maxFrameLength = (uint16_t)mtu;
  53340. + msg.msgId = FM_SET_MAC_MAX_FRAME;
  53341. + memcpy(msg.msgBody, &macMaxFrameLengthParams, sizeof(macMaxFrameLengthParams));
  53342. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53343. + (uint8_t*)&msg,
  53344. + sizeof(msg.msgId)+sizeof(macMaxFrameLengthParams),
  53345. + NULL,
  53346. + NULL,
  53347. + NULL,
  53348. + NULL);
  53349. + if (err != E_OK)
  53350. + RETURN_ERROR(MINOR, err, NO_MSG);
  53351. + return E_OK;
  53352. + }
  53353. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  53354. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  53355. + ("running in guest-mode without IPC!"));
  53356. +
  53357. + /* if port is already initialized, check that MaxFrameLength is smaller
  53358. + * or equal to the port's max */
  53359. +#if (defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS))
  53360. + if (type == e_FM_MAC_10G)
  53361. + {
  53362. + if ((!p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId])
  53363. + || (p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId] &&
  53364. + (mtu <= p_Fm->p_FmStateStruct->portMaxFrameLengths10G[macId])))
  53365. + p_Fm->p_FmStateStruct->macMaxFrameLengths10G[macId] = mtu;
  53366. + else
  53367. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("MAC maxFrameLength is larger than Port maxFrameLength"));
  53368. +
  53369. + }
  53370. + else
  53371. +#else
  53372. + UNUSED(type);
  53373. +#endif /* (defined(FM_MAX_NUM_OF_10G_MACS) && ... */
  53374. + if ((!p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId])
  53375. + || (p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId] &&
  53376. + (mtu <= p_Fm->p_FmStateStruct->portMaxFrameLengths1G[macId])))
  53377. + p_Fm->p_FmStateStruct->macMaxFrameLengths1G[macId] = mtu;
  53378. + else
  53379. + RETURN_ERROR(MINOR, E_INVALID_VALUE, ("MAC maxFrameLength is larger than Port maxFrameLength"));
  53380. +
  53381. + return E_OK;
  53382. +}
  53383. +
  53384. +uint16_t FmGetClockFreq(t_Handle h_Fm)
  53385. +{
  53386. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53387. +
  53388. + /* for multicore environment: this depends on the
  53389. + * fact that fmClkFreq was properly initialized at "init". */
  53390. + return p_Fm->p_FmStateStruct->fmClkFreq;
  53391. +}
  53392. +
  53393. +uint16_t FmGetMacClockFreq(t_Handle h_Fm)
  53394. +{
  53395. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53396. +
  53397. + return p_Fm->p_FmStateStruct->fmMacClkFreq;
  53398. +}
  53399. +
  53400. +uint32_t FmGetTimeStampScale(t_Handle h_Fm)
  53401. +{
  53402. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53403. +
  53404. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53405. + !p_Fm->baseAddr &&
  53406. + p_Fm->h_IpcSessions[0])
  53407. + {
  53408. + t_Error err;
  53409. + t_FmIpcMsg msg;
  53410. + t_FmIpcReply reply;
  53411. + uint32_t replyLength, timeStamp;
  53412. +
  53413. + memset(&msg, 0, sizeof(msg));
  53414. + memset(&reply, 0, sizeof(reply));
  53415. + msg.msgId = FM_GET_TIMESTAMP_SCALE;
  53416. + replyLength = sizeof(uint32_t) + sizeof(uint32_t);
  53417. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53418. + (uint8_t*)&msg,
  53419. + sizeof(msg.msgId),
  53420. + (uint8_t*)&reply,
  53421. + &replyLength,
  53422. + NULL,
  53423. + NULL)) != E_OK)
  53424. + {
  53425. + REPORT_ERROR(MAJOR, err, NO_MSG);
  53426. + return 0;
  53427. + }
  53428. + if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
  53429. + {
  53430. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  53431. + return 0;
  53432. + }
  53433. +
  53434. + memcpy((uint8_t*)&timeStamp, reply.replyBody, sizeof(uint32_t));
  53435. + return timeStamp;
  53436. + }
  53437. + else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53438. + p_Fm->baseAddr)
  53439. + {
  53440. + if (!(GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_tsc1) & FPM_TS_CTL_EN))
  53441. + {
  53442. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("timestamp is not enabled!"));
  53443. + return 0;
  53444. + }
  53445. + }
  53446. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  53447. + DBG(WARNING, ("No IPC - can't validate FM if timestamp enabled."));
  53448. +
  53449. + return p_Fm->p_FmStateStruct->count1MicroBit;
  53450. +}
  53451. +
  53452. +t_Error FmEnableRamsEcc(t_Handle h_Fm)
  53453. +{
  53454. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53455. +
  53456. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  53457. +
  53458. + p_Fm->p_FmStateStruct->ramsEccOwners++;
  53459. + p_Fm->p_FmStateStruct->internalCall = TRUE;
  53460. +
  53461. + return FM_EnableRamsEcc(p_Fm);
  53462. +}
  53463. +
  53464. +t_Error FmDisableRamsEcc(t_Handle h_Fm)
  53465. +{
  53466. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53467. +
  53468. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  53469. +
  53470. + ASSERT_COND(p_Fm->p_FmStateStruct->ramsEccOwners);
  53471. + p_Fm->p_FmStateStruct->ramsEccOwners--;
  53472. +
  53473. + if (p_Fm->p_FmStateStruct->ramsEccOwners==0)
  53474. + {
  53475. + p_Fm->p_FmStateStruct->internalCall = TRUE;
  53476. + return FM_DisableRamsEcc(p_Fm);
  53477. + }
  53478. +
  53479. + return E_OK;
  53480. +}
  53481. +
  53482. +uint8_t FmGetGuestId(t_Handle h_Fm)
  53483. +{
  53484. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53485. +
  53486. + return p_Fm->guestId;
  53487. +}
  53488. +
  53489. +bool FmIsMaster(t_Handle h_Fm)
  53490. +{
  53491. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53492. +
  53493. + return (p_Fm->guestId == NCSW_MASTER_ID);
  53494. +}
  53495. +
  53496. +t_Error FmSetSizeOfFifo(t_Handle h_Fm,
  53497. + uint8_t hardwarePortId,
  53498. + uint32_t *p_SizeOfFifo,
  53499. + uint32_t *p_ExtraSizeOfFifo,
  53500. + bool initialConfig)
  53501. +{
  53502. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  53503. + t_FmIpcPortRsrcParams rsrcParams;
  53504. + t_Error err;
  53505. + struct fman_bmi_regs *bmi_rg = p_Fm->p_FmBmiRegs;
  53506. + uint32_t sizeOfFifo = *p_SizeOfFifo, extraSizeOfFifo = *p_ExtraSizeOfFifo;
  53507. + uint16_t currentVal = 0, currentExtraVal = 0;
  53508. +
  53509. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53510. + !p_Fm->baseAddr &&
  53511. + p_Fm->h_IpcSessions[0])
  53512. + {
  53513. + t_FmIpcMsg msg;
  53514. + t_FmIpcReply reply;
  53515. + uint32_t replyLength;
  53516. +
  53517. + rsrcParams.hardwarePortId = hardwarePortId;
  53518. + rsrcParams.val = sizeOfFifo;
  53519. + rsrcParams.extra = extraSizeOfFifo;
  53520. + rsrcParams.boolInitialConfig = (uint8_t)initialConfig;
  53521. +
  53522. + memset(&msg, 0, sizeof(msg));
  53523. + memset(&reply, 0, sizeof(reply));
  53524. + msg.msgId = FM_SET_SIZE_OF_FIFO;
  53525. + memcpy(msg.msgBody, &rsrcParams, sizeof(rsrcParams));
  53526. + replyLength = sizeof(uint32_t);
  53527. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53528. + (uint8_t*)&msg,
  53529. + sizeof(msg.msgId) + sizeof(rsrcParams),
  53530. + (uint8_t*)&reply,
  53531. + &replyLength,
  53532. + NULL,
  53533. + NULL)) != E_OK)
  53534. + RETURN_ERROR(MINOR, err, NO_MSG);
  53535. + if (replyLength != sizeof(uint32_t))
  53536. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  53537. + return (t_Error)(reply.error);
  53538. + }
  53539. + else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53540. + p_Fm->baseAddr)
  53541. + {
  53542. + DBG(WARNING, ("No IPC - can't validate FM total-fifo size."));
  53543. + fman_set_size_of_fifo(bmi_rg, hardwarePortId, sizeOfFifo, extraSizeOfFifo);
  53544. + }
  53545. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  53546. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  53547. + ("running in guest-mode without neither IPC nor mapped register!"));
  53548. +
  53549. + if (!initialConfig)
  53550. + {
  53551. + /* !initialConfig - runtime change of existing value.
  53552. + * - read the current FIFO and extra FIFO size */
  53553. + currentExtraVal = fman_get_size_of_extra_fifo(bmi_rg, hardwarePortId);
  53554. + currentVal = fman_get_size_of_fifo(bmi_rg, hardwarePortId);
  53555. + }
  53556. +
  53557. + if (extraSizeOfFifo > currentExtraVal)
  53558. + {
  53559. + if (extraSizeOfFifo && !p_Fm->p_FmStateStruct->extraFifoPoolSize)
  53560. + /* if this is the first time a port requires extraFifoPoolSize, the total extraFifoPoolSize
  53561. + * must be initialized to 1 buffer per port
  53562. + */
  53563. + p_Fm->p_FmStateStruct->extraFifoPoolSize = FM_MAX_NUM_OF_RX_PORTS*BMI_FIFO_UNITS;
  53564. +
  53565. + p_Fm->p_FmStateStruct->extraFifoPoolSize = MAX(p_Fm->p_FmStateStruct->extraFifoPoolSize, extraSizeOfFifo);
  53566. + }
  53567. +
  53568. + /* check that there are enough uncommitted fifo size */
  53569. + if ((p_Fm->p_FmStateStruct->accumulatedFifoSize - currentVal + sizeOfFifo) >
  53570. + (p_Fm->p_FmStateStruct->totalFifoSize - p_Fm->p_FmStateStruct->extraFifoPoolSize)){
  53571. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  53572. + ("Port request fifo size + accumulated size > total FIFO size:"));
  53573. + RETURN_ERROR(MAJOR, E_INVALID_VALUE,
  53574. + ("port 0x%x requested %d bytes, extra size = %d, accumulated size = %d total size = %d",
  53575. + hardwarePortId, sizeOfFifo, p_Fm->p_FmStateStruct->extraFifoPoolSize,
  53576. + p_Fm->p_FmStateStruct->accumulatedFifoSize,
  53577. + p_Fm->p_FmStateStruct->totalFifoSize));
  53578. + }
  53579. + else
  53580. + {
  53581. + /* update accumulated */
  53582. + ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedFifoSize >= currentVal);
  53583. + p_Fm->p_FmStateStruct->accumulatedFifoSize -= currentVal;
  53584. + p_Fm->p_FmStateStruct->accumulatedFifoSize += sizeOfFifo;
  53585. + fman_set_size_of_fifo(bmi_rg, hardwarePortId, sizeOfFifo, extraSizeOfFifo);
  53586. + }
  53587. +
  53588. + return E_OK;
  53589. +}
  53590. +
  53591. +t_Error FmSetNumOfTasks(t_Handle h_Fm,
  53592. + uint8_t hardwarePortId,
  53593. + uint8_t *p_NumOfTasks,
  53594. + uint8_t *p_NumOfExtraTasks,
  53595. + bool initialConfig)
  53596. +{
  53597. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  53598. + t_Error err;
  53599. + struct fman_bmi_regs *bmi_rg = p_Fm->p_FmBmiRegs;
  53600. + uint8_t currentVal = 0, currentExtraVal = 0, numOfTasks = *p_NumOfTasks, numOfExtraTasks = *p_NumOfExtraTasks;
  53601. +
  53602. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  53603. +
  53604. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53605. + !p_Fm->baseAddr &&
  53606. + p_Fm->h_IpcSessions[0])
  53607. + {
  53608. + t_FmIpcPortRsrcParams rsrcParams;
  53609. + t_FmIpcMsg msg;
  53610. + t_FmIpcReply reply;
  53611. + uint32_t replyLength;
  53612. +
  53613. + rsrcParams.hardwarePortId = hardwarePortId;
  53614. + rsrcParams.val = numOfTasks;
  53615. + rsrcParams.extra = numOfExtraTasks;
  53616. + rsrcParams.boolInitialConfig = (uint8_t)initialConfig;
  53617. +
  53618. + memset(&msg, 0, sizeof(msg));
  53619. + memset(&reply, 0, sizeof(reply));
  53620. + msg.msgId = FM_SET_NUM_OF_TASKS;
  53621. + memcpy(msg.msgBody, &rsrcParams, sizeof(rsrcParams));
  53622. + replyLength = sizeof(uint32_t);
  53623. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53624. + (uint8_t*)&msg,
  53625. + sizeof(msg.msgId) + sizeof(rsrcParams),
  53626. + (uint8_t*)&reply,
  53627. + &replyLength,
  53628. + NULL,
  53629. + NULL)) != E_OK)
  53630. + RETURN_ERROR(MINOR, err, NO_MSG);
  53631. + if (replyLength != sizeof(uint32_t))
  53632. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  53633. + return (t_Error)(reply.error);
  53634. + }
  53635. + else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53636. + p_Fm->baseAddr)
  53637. + {
  53638. + DBG(WARNING, ("No IPC - can't validate FM total-num-of-tasks."));
  53639. + fman_set_num_of_tasks(bmi_rg, hardwarePortId, numOfTasks, numOfExtraTasks);
  53640. + }
  53641. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  53642. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  53643. + ("running in guest-mode without neither IPC nor mapped register!"));
  53644. +
  53645. + if (!initialConfig)
  53646. + {
  53647. + /* !initialConfig - runtime change of existing value.
  53648. + * - read the current number of tasks */
  53649. + currentVal = fman_get_num_of_tasks(bmi_rg, hardwarePortId);
  53650. + currentExtraVal = fman_get_num_extra_tasks(bmi_rg, hardwarePortId);
  53651. + }
  53652. +
  53653. + if (numOfExtraTasks > currentExtraVal)
  53654. + p_Fm->p_FmStateStruct->extraTasksPoolSize =
  53655. + (uint8_t)MAX(p_Fm->p_FmStateStruct->extraTasksPoolSize, numOfExtraTasks);
  53656. +
  53657. + /* check that there are enough uncommitted tasks */
  53658. + if ((p_Fm->p_FmStateStruct->accumulatedNumOfTasks - currentVal + numOfTasks) >
  53659. + (p_Fm->p_FmStateStruct->totalNumOfTasks - p_Fm->p_FmStateStruct->extraTasksPoolSize))
  53660. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE,
  53661. + ("Requested numOfTasks and extra tasks pool for fm%d exceed total numOfTasks.",
  53662. + p_Fm->p_FmStateStruct->fmId));
  53663. + else
  53664. + {
  53665. + ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfTasks >= currentVal);
  53666. + /* update accumulated */
  53667. + p_Fm->p_FmStateStruct->accumulatedNumOfTasks -= currentVal;
  53668. + p_Fm->p_FmStateStruct->accumulatedNumOfTasks += numOfTasks;
  53669. + fman_set_num_of_tasks(bmi_rg, hardwarePortId, numOfTasks, numOfExtraTasks);
  53670. + }
  53671. +
  53672. + return E_OK;
  53673. +}
  53674. +
  53675. +t_Error FmSetNumOfOpenDmas(t_Handle h_Fm,
  53676. + uint8_t hardwarePortId,
  53677. + uint8_t *p_NumOfOpenDmas,
  53678. + uint8_t *p_NumOfExtraOpenDmas,
  53679. + bool initialConfig)
  53680. +
  53681. +{
  53682. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  53683. + t_Error err;
  53684. + struct fman_bmi_regs *bmi_rg = p_Fm->p_FmBmiRegs;
  53685. + uint8_t numOfOpenDmas = *p_NumOfOpenDmas, numOfExtraOpenDmas = *p_NumOfExtraOpenDmas;
  53686. + uint8_t totalNumDmas = 0, currentVal = 0, currentExtraVal = 0;
  53687. +
  53688. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  53689. +
  53690. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53691. + !p_Fm->baseAddr &&
  53692. + p_Fm->h_IpcSessions[0])
  53693. + {
  53694. + t_FmIpcPortRsrcParams rsrcParams;
  53695. + t_FmIpcMsg msg;
  53696. + t_FmIpcReply reply;
  53697. + uint32_t replyLength;
  53698. +
  53699. + rsrcParams.hardwarePortId = hardwarePortId;
  53700. + rsrcParams.val = numOfOpenDmas;
  53701. + rsrcParams.extra = numOfExtraOpenDmas;
  53702. + rsrcParams.boolInitialConfig = (uint8_t)initialConfig;
  53703. +
  53704. + memset(&msg, 0, sizeof(msg));
  53705. + memset(&reply, 0, sizeof(reply));
  53706. + msg.msgId = FM_SET_NUM_OF_OPEN_DMAS;
  53707. + memcpy(msg.msgBody, &rsrcParams, sizeof(rsrcParams));
  53708. + replyLength = sizeof(uint32_t);
  53709. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  53710. + (uint8_t*)&msg,
  53711. + sizeof(msg.msgId) + sizeof(rsrcParams),
  53712. + (uint8_t*)&reply,
  53713. + &replyLength,
  53714. + NULL,
  53715. + NULL)) != E_OK)
  53716. + RETURN_ERROR(MINOR, err, NO_MSG);
  53717. + if (replyLength != sizeof(uint32_t))
  53718. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  53719. + return (t_Error)(reply.error);
  53720. + }
  53721. +#ifdef FM_HAS_TOTAL_DMAS
  53722. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  53723. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("running in guest-mode without IPC!"));
  53724. +#else
  53725. + else if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  53726. + p_Fm->baseAddr &&
  53727. + (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6))
  53728. + {
  53729. + /*DBG(WARNING, ("No IPC - can't validate FM total-num-of-dmas."));*/
  53730. +
  53731. + if (!numOfOpenDmas)
  53732. + {
  53733. + /* first config without explic it value: Do Nothing - reset value shouldn't be
  53734. + changed, read register for port save */
  53735. + *p_NumOfOpenDmas = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
  53736. + *p_NumOfExtraOpenDmas = fman_get_num_extra_dmas(bmi_rg, hardwarePortId);
  53737. + }
  53738. + else
  53739. + /* whether it is the first time with explicit value, or runtime "set" - write register */
  53740. + fman_set_num_of_open_dmas(bmi_rg,
  53741. + hardwarePortId,
  53742. + numOfOpenDmas,
  53743. + numOfExtraOpenDmas,
  53744. + p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize);
  53745. + }
  53746. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  53747. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED,
  53748. + ("running in guest-mode without neither IPC nor mapped register!"));
  53749. +#endif /* FM_HAS_TOTAL_DMAS */
  53750. +
  53751. + if (!initialConfig)
  53752. + {
  53753. + /* !initialConfig - runtime change of existing value.
  53754. + * - read the current number of open Dma's */
  53755. + currentExtraVal = fman_get_num_extra_dmas(bmi_rg, hardwarePortId);
  53756. + currentVal = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
  53757. + }
  53758. +
  53759. +#ifdef FM_NO_GUARANTEED_RESET_VALUES
  53760. + /* it's illegal to be in a state where this is not the first set and no value is specified */
  53761. + ASSERT_COND(initialConfig || numOfOpenDmas);
  53762. + if (!numOfOpenDmas)
  53763. + {
  53764. + /* !numOfOpenDmas - first configuration according to values in regs.
  53765. + * - read the current number of open Dma's */
  53766. + currentExtraVal = fman_get_num_extra_dmas(bmi_rg, hardwarePortId);
  53767. + currentVal = fman_get_num_of_dmas(bmi_rg, hardwarePortId);
  53768. + /* This is the first configuration and user did not specify value (!numOfOpenDmas),
  53769. + * reset values will be used and we just save these values for resource management */
  53770. + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize =
  53771. + (uint8_t)MAX(p_Fm->p_FmStateStruct->extraOpenDmasPoolSize, currentExtraVal);
  53772. + p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas += currentVal;
  53773. + *p_NumOfOpenDmas = currentVal;
  53774. + *p_NumOfExtraOpenDmas = currentExtraVal;
  53775. + return E_OK;
  53776. + }
  53777. +#endif /* FM_NO_GUARANTEED_RESET_VALUES */
  53778. +
  53779. + if (numOfExtraOpenDmas > currentExtraVal)
  53780. + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize =
  53781. + (uint8_t)MAX(p_Fm->p_FmStateStruct->extraOpenDmasPoolSize, numOfExtraOpenDmas);
  53782. +
  53783. +#ifdef FM_HAS_TOTAL_DMAS
  53784. + if ((p_Fm->p_FmStateStruct->revInfo.majorRev < 6) &&
  53785. + (p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas - currentVal + numOfOpenDmas >
  53786. + p_Fm->p_FmStateStruct->maxNumOfOpenDmas))
  53787. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE,
  53788. + ("Requested numOfOpenDmas for fm%d exceeds total numOfOpenDmas.",
  53789. + p_Fm->p_FmStateStruct->fmId));
  53790. +#else
  53791. + if ((p_Fm->p_FmStateStruct->revInfo.majorRev >= 6) &&
  53792. +#ifdef FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
  53793. + !((p_Fm->p_FmStateStruct->revInfo.majorRev == 6) &&
  53794. + (p_Fm->p_FmStateStruct->revInfo.minorRev == 0)) &&
  53795. +#endif /* FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981 */
  53796. + (p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas - currentVal + numOfOpenDmas > DMA_THRESH_MAX_COMMQ + 1))
  53797. + RETURN_ERROR(MAJOR, E_NOT_AVAILABLE,
  53798. + ("Requested numOfOpenDmas for fm%d exceeds DMA Command queue (%d)",
  53799. + p_Fm->p_FmStateStruct->fmId, DMA_THRESH_MAX_COMMQ+1));
  53800. +#endif /* FM_HAS_TOTAL_DMAS */
  53801. + else
  53802. + {
  53803. + ASSERT_COND(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas >= currentVal);
  53804. + /* update acummulated */
  53805. + p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas -= currentVal;
  53806. + p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas += numOfOpenDmas;
  53807. +
  53808. +#ifdef FM_HAS_TOTAL_DMAS
  53809. + if (p_Fm->p_FmStateStruct->revInfo.majorRev < 6)
  53810. + totalNumDmas = (uint8_t)(p_Fm->p_FmStateStruct->accumulatedNumOfOpenDmas + p_Fm->p_FmStateStruct->extraOpenDmasPoolSize);
  53811. +#endif /* FM_HAS_TOTAL_DMAS */
  53812. + fman_set_num_of_open_dmas(bmi_rg,
  53813. + hardwarePortId,
  53814. + numOfOpenDmas,
  53815. + numOfExtraOpenDmas,
  53816. + totalNumDmas);
  53817. + }
  53818. +
  53819. + return E_OK;
  53820. +}
  53821. +
  53822. +#if (DPAA_VERSION >= 11)
  53823. +t_Error FmVSPCheckRelativeProfile(t_Handle h_Fm,
  53824. + e_FmPortType portType,
  53825. + uint8_t portId,
  53826. + uint16_t relativeProfile)
  53827. +{
  53828. + t_Fm *p_Fm;
  53829. + t_FmSp *p_FmPcdSp;
  53830. + uint8_t swPortIndex=0, hardwarePortId;
  53831. +
  53832. + ASSERT_COND(h_Fm);
  53833. + p_Fm = (t_Fm*)h_Fm;
  53834. +
  53835. + hardwarePortId = SwPortIdToHwPortId(portType,
  53836. + portId,
  53837. + p_Fm->p_FmStateStruct->revInfo.majorRev,
  53838. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  53839. + ASSERT_COND(hardwarePortId);
  53840. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  53841. +
  53842. + p_FmPcdSp = p_Fm->p_FmSp;
  53843. + ASSERT_COND(p_FmPcdSp);
  53844. +
  53845. + if (!p_FmPcdSp->portsMapping[swPortIndex].numOfProfiles)
  53846. + RETURN_ERROR(MAJOR, E_INVALID_STATE , ("Port has no allocated profiles"));
  53847. + if (relativeProfile >= p_FmPcdSp->portsMapping[swPortIndex].numOfProfiles)
  53848. + RETURN_ERROR(MAJOR, E_NOT_IN_RANGE , ("Profile id is out of range"));
  53849. +
  53850. + return E_OK;
  53851. +}
  53852. +
  53853. +t_Error FmVSPGetAbsoluteProfileId(t_Handle h_Fm,
  53854. + e_FmPortType portType,
  53855. + uint8_t portId,
  53856. + uint16_t relativeProfile,
  53857. + uint16_t *p_AbsoluteId)
  53858. +{
  53859. + t_Fm *p_Fm;
  53860. + t_FmSp *p_FmPcdSp;
  53861. + uint8_t swPortIndex=0, hardwarePortId;
  53862. + t_Error err;
  53863. +
  53864. + ASSERT_COND(h_Fm);
  53865. + p_Fm = (t_Fm*)h_Fm;
  53866. +
  53867. + err = FmVSPCheckRelativeProfile(h_Fm, portType, portId, relativeProfile);
  53868. + if (err != E_OK)
  53869. + return err;
  53870. +
  53871. + hardwarePortId = SwPortIdToHwPortId(portType,
  53872. + portId,
  53873. + p_Fm->p_FmStateStruct->revInfo.majorRev,
  53874. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  53875. + ASSERT_COND(hardwarePortId);
  53876. + HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId);
  53877. +
  53878. + p_FmPcdSp = p_Fm->p_FmSp;
  53879. + ASSERT_COND(p_FmPcdSp);
  53880. +
  53881. + *p_AbsoluteId = (uint16_t)(p_FmPcdSp->portsMapping[swPortIndex].profilesBase + relativeProfile);
  53882. +
  53883. + return E_OK;
  53884. +}
  53885. +#endif /* (DPAA_VERSION >= 11) */
  53886. +
  53887. +static t_Error InitFmDma(t_Fm *p_Fm)
  53888. +{
  53889. + t_Error err;
  53890. +
  53891. + err = (t_Error)fman_dma_init(p_Fm->p_FmDmaRegs, p_Fm->p_FmDriverParam);
  53892. + if (err != E_OK)
  53893. + return err;
  53894. +
  53895. + /* Allocate MURAM for CAM */
  53896. + p_Fm->camBaseAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram,
  53897. + (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*DMA_CAM_SIZEOF_ENTRY),
  53898. + DMA_CAM_ALIGN));
  53899. + if (!p_Fm->camBaseAddr)
  53900. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for DMA CAM failed"));
  53901. +
  53902. + WRITE_BLOCK(UINT_TO_PTR(p_Fm->camBaseAddr),
  53903. + 0,
  53904. + (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*DMA_CAM_SIZEOF_ENTRY));
  53905. +
  53906. + if (p_Fm->p_FmStateStruct->revInfo.majorRev == 2)
  53907. + {
  53908. + FM_MURAM_FreeMem(p_Fm->h_FmMuram, UINT_TO_PTR(p_Fm->camBaseAddr));
  53909. +
  53910. + p_Fm->camBaseAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram,
  53911. + (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*72 + 128),
  53912. + 64));
  53913. + if (!p_Fm->camBaseAddr)
  53914. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for DMA CAM failed"));
  53915. +
  53916. + WRITE_BLOCK(UINT_TO_PTR(p_Fm->camBaseAddr),
  53917. + 0,
  53918. + (uint32_t)(p_Fm->p_FmDriverParam->dma_cam_num_of_entries*72 + 128));
  53919. +
  53920. + switch(p_Fm->p_FmDriverParam->dma_cam_num_of_entries)
  53921. + {
  53922. + case (8):
  53923. + WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xff000000);
  53924. + break;
  53925. + case (16):
  53926. + WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xffff0000);
  53927. + break;
  53928. + case (24):
  53929. + WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xffffff00);
  53930. + break;
  53931. + case (32):
  53932. + WRITE_UINT32(*(uint32_t*)p_Fm->camBaseAddr, 0xffffffff);
  53933. + break;
  53934. + default:
  53935. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("wrong dma_cam_num_of_entries"));
  53936. + }
  53937. + }
  53938. +
  53939. + p_Fm->p_FmDriverParam->cam_base_addr =
  53940. + (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->camBaseAddr)) - p_Fm->fmMuramPhysBaseAddr);
  53941. +
  53942. + return E_OK;
  53943. +}
  53944. +
  53945. +static t_Error InitFmFpm(t_Fm *p_Fm)
  53946. +{
  53947. + return (t_Error)fman_fpm_init(p_Fm->p_FmFpmRegs, p_Fm->p_FmDriverParam);
  53948. +}
  53949. +
  53950. +static t_Error InitFmBmi(t_Fm *p_Fm)
  53951. +{
  53952. + return (t_Error)fman_bmi_init(p_Fm->p_FmBmiRegs, p_Fm->p_FmDriverParam);
  53953. +}
  53954. +
  53955. +static t_Error InitFmQmi(t_Fm *p_Fm)
  53956. +{
  53957. + return (t_Error)fman_qmi_init(p_Fm->p_FmQmiRegs, p_Fm->p_FmDriverParam);
  53958. +}
  53959. +
  53960. +static t_Error InitGuestMode(t_Fm *p_Fm)
  53961. +{
  53962. + t_Error err = E_OK;
  53963. + int i;
  53964. + t_FmIpcMsg msg;
  53965. + t_FmIpcReply reply;
  53966. + uint32_t replyLength;
  53967. +
  53968. + ASSERT_COND(p_Fm);
  53969. + ASSERT_COND(p_Fm->guestId != NCSW_MASTER_ID);
  53970. +
  53971. + /* build the FM guest partition IPC address */
  53972. + if (Sprint (p_Fm->fmModuleName, "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, p_Fm->guestId) != (p_Fm->guestId<10 ? 6:7))
  53973. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  53974. +
  53975. + /* build the FM master partition IPC address */
  53976. + memset(p_Fm->fmIpcHandlerModuleName, 0, (sizeof(char)) * MODULE_NAME_SIZE);
  53977. + if (Sprint (p_Fm->fmIpcHandlerModuleName[0], "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, NCSW_MASTER_ID) != 6)
  53978. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  53979. +
  53980. + for (i=0;i<e_FM_EV_DUMMY_LAST;i++)
  53981. + p_Fm->intrMng[i].f_Isr = UnimplementedIsr;
  53982. +
  53983. + p_Fm->h_IpcSessions[0] = XX_IpcInitSession(p_Fm->fmIpcHandlerModuleName[0], p_Fm->fmModuleName);
  53984. + if (p_Fm->h_IpcSessions[0])
  53985. + {
  53986. + uint8_t isMasterAlive;
  53987. + t_FmIpcParams ipcParams;
  53988. +
  53989. + err = XX_IpcRegisterMsgHandler(p_Fm->fmModuleName, FmGuestHandleIpcMsgCB, p_Fm, FM_IPC_MAX_REPLY_SIZE);
  53990. + if (err)
  53991. + RETURN_ERROR(MAJOR, err, NO_MSG);
  53992. +
  53993. + memset(&msg, 0, sizeof(msg));
  53994. + memset(&reply, 0, sizeof(reply));
  53995. + msg.msgId = FM_MASTER_IS_ALIVE;
  53996. + msg.msgBody[0] = p_Fm->guestId;
  53997. + replyLength = sizeof(uint32_t) + sizeof(uint8_t);
  53998. + do
  53999. + {
  54000. + blockingFlag = TRUE;
  54001. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  54002. + (uint8_t*)&msg,
  54003. + sizeof(msg.msgId)+sizeof(p_Fm->guestId),
  54004. + (uint8_t*)&reply,
  54005. + &replyLength,
  54006. + IpcMsgCompletionCB,
  54007. + p_Fm)) != E_OK)
  54008. + REPORT_ERROR(MINOR, err, NO_MSG);
  54009. + while (blockingFlag) ;
  54010. + if (replyLength != (sizeof(uint32_t) + sizeof(uint8_t)))
  54011. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  54012. + isMasterAlive = *(uint8_t*)(reply.replyBody);
  54013. + } while (!isMasterAlive);
  54014. +
  54015. + /* read FM parameters and save */
  54016. + memset(&msg, 0, sizeof(msg));
  54017. + memset(&reply, 0, sizeof(reply));
  54018. + msg.msgId = FM_GET_PARAMS;
  54019. + replyLength = sizeof(uint32_t) + sizeof(t_FmIpcParams);
  54020. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  54021. + (uint8_t*)&msg,
  54022. + sizeof(msg.msgId),
  54023. + (uint8_t*)&reply,
  54024. + &replyLength,
  54025. + NULL,
  54026. + NULL)) != E_OK)
  54027. + RETURN_ERROR(MAJOR, err, NO_MSG);
  54028. + if (replyLength != (sizeof(uint32_t) + sizeof(t_FmIpcParams)))
  54029. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  54030. + memcpy((uint8_t*)&ipcParams, reply.replyBody, sizeof(t_FmIpcParams));
  54031. +
  54032. + p_Fm->p_FmStateStruct->fmClkFreq = ipcParams.fmClkFreq;
  54033. + p_Fm->p_FmStateStruct->fmMacClkFreq = ipcParams.fmMacClkFreq;
  54034. + p_Fm->p_FmStateStruct->revInfo.majorRev = ipcParams.majorRev;
  54035. + p_Fm->p_FmStateStruct->revInfo.minorRev = ipcParams.minorRev;
  54036. + }
  54037. + else
  54038. + {
  54039. + DBG(WARNING, ("FM Guest mode - without IPC"));
  54040. + if (!p_Fm->p_FmStateStruct->fmClkFreq)
  54041. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("No fmClkFreq configured for guest without IPC"));
  54042. + if (p_Fm->baseAddr)
  54043. + {
  54044. + fman_get_revision(p_Fm->p_FmFpmRegs,
  54045. + &p_Fm->p_FmStateStruct->revInfo.majorRev,
  54046. + &p_Fm->p_FmStateStruct->revInfo.minorRev);
  54047. +
  54048. + }
  54049. + }
  54050. +
  54051. +#if (DPAA_VERSION >= 11)
  54052. + p_Fm->partVSPBase = AllocVSPsForPartition(p_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
  54053. + if (p_Fm->partVSPBase == (uint8_t)(ILLEGAL_BASE))
  54054. + DBG(WARNING, ("partition VSPs allocation is FAILED"));
  54055. +#endif /* (DPAA_VERSION >= 11) */
  54056. +
  54057. + /* General FM driver initialization */
  54058. + if (p_Fm->baseAddr)
  54059. + p_Fm->fmMuramPhysBaseAddr =
  54060. + (uint64_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->baseAddr + FM_MM_MURAM)));
  54061. +
  54062. + XX_Free(p_Fm->p_FmDriverParam);
  54063. + p_Fm->p_FmDriverParam = NULL;
  54064. +
  54065. + if ((p_Fm->guestId == NCSW_MASTER_ID) ||
  54066. + (p_Fm->h_IpcSessions[0]))
  54067. + {
  54068. + FM_DisableRamsEcc(p_Fm);
  54069. + FmMuramClear(p_Fm->h_FmMuram);
  54070. + FM_EnableRamsEcc(p_Fm);
  54071. + }
  54072. +
  54073. + return E_OK;
  54074. +}
  54075. +
  54076. +static __inline__ enum fman_exceptions FmanExceptionTrans(e_FmExceptions exception)
  54077. +{
  54078. + switch (exception) {
  54079. + case e_FM_EX_DMA_BUS_ERROR:
  54080. + return E_FMAN_EX_DMA_BUS_ERROR;
  54081. + case e_FM_EX_DMA_READ_ECC:
  54082. + return E_FMAN_EX_DMA_READ_ECC;
  54083. + case e_FM_EX_DMA_SYSTEM_WRITE_ECC:
  54084. + return E_FMAN_EX_DMA_SYSTEM_WRITE_ECC;
  54085. + case e_FM_EX_DMA_FM_WRITE_ECC:
  54086. + return E_FMAN_EX_DMA_FM_WRITE_ECC;
  54087. + case e_FM_EX_FPM_STALL_ON_TASKS:
  54088. + return E_FMAN_EX_FPM_STALL_ON_TASKS;
  54089. + case e_FM_EX_FPM_SINGLE_ECC:
  54090. + return E_FMAN_EX_FPM_SINGLE_ECC;
  54091. + case e_FM_EX_FPM_DOUBLE_ECC:
  54092. + return E_FMAN_EX_FPM_DOUBLE_ECC;
  54093. + case e_FM_EX_QMI_SINGLE_ECC:
  54094. + return E_FMAN_EX_QMI_SINGLE_ECC;
  54095. + case e_FM_EX_QMI_DOUBLE_ECC:
  54096. + return E_FMAN_EX_QMI_DOUBLE_ECC;
  54097. + case e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID:
  54098. + return E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID;
  54099. + case e_FM_EX_BMI_LIST_RAM_ECC:
  54100. + return E_FMAN_EX_BMI_LIST_RAM_ECC;
  54101. + case e_FM_EX_BMI_STORAGE_PROFILE_ECC:
  54102. + return E_FMAN_EX_BMI_STORAGE_PROFILE_ECC;
  54103. + case e_FM_EX_BMI_STATISTICS_RAM_ECC:
  54104. + return E_FMAN_EX_BMI_STATISTICS_RAM_ECC;
  54105. + case e_FM_EX_BMI_DISPATCH_RAM_ECC:
  54106. + return E_FMAN_EX_BMI_DISPATCH_RAM_ECC;
  54107. + case e_FM_EX_IRAM_ECC:
  54108. + return E_FMAN_EX_IRAM_ECC;
  54109. + case e_FM_EX_MURAM_ECC:
  54110. + return E_FMAN_EX_MURAM_ECC;
  54111. + default:
  54112. + return E_FMAN_EX_DMA_BUS_ERROR;
  54113. + }
  54114. +}
  54115. +
  54116. +uint8_t SwPortIdToHwPortId(e_FmPortType type, uint8_t relativePortId, uint8_t majorRev, uint8_t minorRev)
  54117. +{
  54118. + switch (type)
  54119. + {
  54120. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  54121. + case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
  54122. + CHECK_PORT_ID_OH_PORTS(relativePortId);
  54123. + return (uint8_t)(BASE_OH_PORTID + (relativePortId));
  54124. + case (e_FM_PORT_TYPE_RX):
  54125. + CHECK_PORT_ID_1G_RX_PORTS(relativePortId);
  54126. + return (uint8_t)(BASE_1G_RX_PORTID + (relativePortId));
  54127. + case (e_FM_PORT_TYPE_RX_10G):
  54128. + /* The 10G port in T1024 (FMan Version 6.4) is the first port.
  54129. + * This is the reason why the 1G port offset is used.
  54130. + */
  54131. + if (majorRev == 6 && minorRev == 4)
  54132. + {
  54133. + CHECK_PORT_ID_1G_RX_PORTS(relativePortId);
  54134. + return (uint8_t)(BASE_1G_RX_PORTID + (relativePortId));
  54135. + }
  54136. + else
  54137. + {
  54138. + CHECK_PORT_ID_10G_RX_PORTS(relativePortId);
  54139. + return (uint8_t)(BASE_10G_RX_PORTID + (relativePortId));
  54140. + }
  54141. + case (e_FM_PORT_TYPE_TX):
  54142. + CHECK_PORT_ID_1G_TX_PORTS(relativePortId);
  54143. + return (uint8_t)(BASE_1G_TX_PORTID + (relativePortId));
  54144. + case (e_FM_PORT_TYPE_TX_10G):
  54145. + /* The 10G port in T1024 (FMan Version 6.4) is the first port.
  54146. + * This is the reason why the 1G port offset is used.
  54147. + */
  54148. + if (majorRev == 6 && minorRev == 4)
  54149. + {
  54150. + CHECK_PORT_ID_1G_TX_PORTS(relativePortId);
  54151. + return (uint8_t)(BASE_1G_TX_PORTID + (relativePortId));
  54152. + }
  54153. + else
  54154. + {
  54155. + CHECK_PORT_ID_10G_TX_PORTS(relativePortId);
  54156. + return (uint8_t)(BASE_10G_TX_PORTID + (relativePortId));
  54157. + }
  54158. + default:
  54159. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal port type"));
  54160. + return 0;
  54161. + }
  54162. +}
  54163. +
  54164. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  54165. +t_Error FmDumpPortRegs (t_Handle h_Fm, uint8_t hardwarePortId)
  54166. +{
  54167. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  54168. +
  54169. + DECLARE_DUMP;
  54170. +
  54171. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  54172. +
  54173. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54174. + SANITY_CHECK_RETURN_ERROR(((p_Fm->guestId == NCSW_MASTER_ID) ||
  54175. + p_Fm->baseAddr), E_INVALID_OPERATION);
  54176. +
  54177. + DUMP_TITLE(&p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId-1], ("fmbm_pp for port %u", (hardwarePortId)));
  54178. + DUMP_MEMORY(&p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId-1], sizeof(uint32_t));
  54179. +
  54180. + DUMP_TITLE(&p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId-1], ("fmbm_pfs for port %u", (hardwarePortId )));
  54181. + DUMP_MEMORY(&p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId-1], sizeof(uint32_t));
  54182. +
  54183. + DUMP_TITLE(&p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId-1], ("fmbm_spliodn for port %u", (hardwarePortId)));
  54184. + DUMP_MEMORY(&p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId-1], sizeof(uint32_t));
  54185. +
  54186. + DUMP_TITLE(&p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId], ("fmfp_ps for port %u", (hardwarePortId)));
  54187. + DUMP_MEMORY(&p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId], sizeof(uint32_t));
  54188. +
  54189. + DUMP_TITLE(&p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId/2], ("fmdmplr for port %u", (hardwarePortId)));
  54190. + DUMP_MEMORY(&p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId/2], sizeof(uint32_t));
  54191. +
  54192. + return E_OK;
  54193. +}
  54194. +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
  54195. +
  54196. +
  54197. +/*****************************************************************************/
  54198. +/* API Init unit functions */
  54199. +/*****************************************************************************/
  54200. +t_Handle FM_Config(t_FmParams *p_FmParam)
  54201. +{
  54202. + t_Fm *p_Fm;
  54203. + uint8_t i;
  54204. + uintptr_t baseAddr;
  54205. +
  54206. + SANITY_CHECK_RETURN_VALUE(p_FmParam, E_NULL_POINTER, NULL);
  54207. + SANITY_CHECK_RETURN_VALUE(((p_FmParam->firmware.p_Code && p_FmParam->firmware.size) ||
  54208. + (!p_FmParam->firmware.p_Code && !p_FmParam->firmware.size)),
  54209. + E_INVALID_VALUE, NULL);
  54210. +
  54211. + baseAddr = p_FmParam->baseAddr;
  54212. +
  54213. + /* Allocate FM structure */
  54214. + p_Fm = (t_Fm *) XX_Malloc(sizeof(t_Fm));
  54215. + if (!p_Fm)
  54216. + {
  54217. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM driver structure"));
  54218. + return NULL;
  54219. + }
  54220. + memset(p_Fm, 0, sizeof(t_Fm));
  54221. +
  54222. + p_Fm->p_FmStateStruct = (t_FmStateStruct *) XX_Malloc(sizeof(t_FmStateStruct));
  54223. + if (!p_Fm->p_FmStateStruct)
  54224. + {
  54225. + XX_Free(p_Fm);
  54226. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM Status structure"));
  54227. + return NULL;
  54228. + }
  54229. + memset(p_Fm->p_FmStateStruct, 0, sizeof(t_FmStateStruct));
  54230. +
  54231. + /* Initialize FM parameters which will be kept by the driver */
  54232. + p_Fm->p_FmStateStruct->fmId = p_FmParam->fmId;
  54233. + p_Fm->guestId = p_FmParam->guestId;
  54234. +
  54235. + for (i=0; i<FM_MAX_NUM_OF_HW_PORT_IDS; i++)
  54236. + p_Fm->p_FmStateStruct->portsTypes[i] = e_FM_PORT_TYPE_DUMMY;
  54237. +
  54238. + /* Allocate the FM driver's parameters structure */
  54239. + p_Fm->p_FmDriverParam = (struct fman_cfg *)XX_Malloc(sizeof(struct fman_cfg));
  54240. + if (!p_Fm->p_FmDriverParam)
  54241. + {
  54242. + XX_Free(p_Fm->p_FmStateStruct);
  54243. + XX_Free(p_Fm);
  54244. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM driver parameters"));
  54245. + return NULL;
  54246. + }
  54247. + memset(p_Fm->p_FmDriverParam, 0, sizeof(struct fman_cfg));
  54248. +
  54249. +#if (DPAA_VERSION >= 11)
  54250. + p_Fm->p_FmSp = (t_FmSp *)XX_Malloc(sizeof(t_FmSp));
  54251. + if (!p_Fm->p_FmSp)
  54252. + {
  54253. + XX_Free(p_Fm->p_FmDriverParam);
  54254. + XX_Free(p_Fm->p_FmStateStruct);
  54255. + XX_Free(p_Fm);
  54256. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("allocation for internal data structure failed"));
  54257. + return NULL;
  54258. + }
  54259. + memset(p_Fm->p_FmSp, 0, sizeof(t_FmSp));
  54260. +
  54261. + for (i=0; i<FM_VSP_MAX_NUM_OF_ENTRIES; i++)
  54262. + p_Fm->p_FmSp->profiles[i].profilesMng.ownerId = (uint8_t)ILLEGAL_BASE;
  54263. +#endif /* (DPAA_VERSION >= 11) */
  54264. +
  54265. + /* Initialize FM parameters which will be kept by the driver */
  54266. + p_Fm->p_FmStateStruct->fmId = p_FmParam->fmId;
  54267. + p_Fm->h_FmMuram = p_FmParam->h_FmMuram;
  54268. + p_Fm->h_App = p_FmParam->h_App;
  54269. + p_Fm->p_FmStateStruct->fmClkFreq = p_FmParam->fmClkFreq;
  54270. + p_Fm->p_FmStateStruct->fmMacClkFreq = p_FmParam->fmClkFreq / ((!p_FmParam->fmMacClkRatio)? 2: p_FmParam->fmMacClkRatio);
  54271. + p_Fm->f_Exception = p_FmParam->f_Exception;
  54272. + p_Fm->f_BusError = p_FmParam->f_BusError;
  54273. + p_Fm->p_FmFpmRegs = (struct fman_fpm_regs *)UINT_TO_PTR(baseAddr + FM_MM_FPM);
  54274. + p_Fm->p_FmBmiRegs = (struct fman_bmi_regs *)UINT_TO_PTR(baseAddr + FM_MM_BMI);
  54275. + p_Fm->p_FmQmiRegs = (struct fman_qmi_regs *)UINT_TO_PTR(baseAddr + FM_MM_QMI);
  54276. + p_Fm->p_FmDmaRegs = (struct fman_dma_regs *)UINT_TO_PTR(baseAddr + FM_MM_DMA);
  54277. + p_Fm->p_FmRegs = (struct fman_regs *)UINT_TO_PTR(baseAddr + FM_MM_BMI);
  54278. + p_Fm->baseAddr = baseAddr;
  54279. + p_Fm->p_FmStateStruct->irq = p_FmParam->irq;
  54280. + p_Fm->p_FmStateStruct->errIrq = p_FmParam->errIrq;
  54281. + p_Fm->hcPortInitialized = FALSE;
  54282. + p_Fm->independentMode = FALSE;
  54283. +
  54284. + p_Fm->h_Spinlock = XX_InitSpinlock();
  54285. + if (!p_Fm->h_Spinlock)
  54286. + {
  54287. + XX_Free(p_Fm->p_FmDriverParam);
  54288. + XX_Free(p_Fm->p_FmStateStruct);
  54289. + XX_Free(p_Fm);
  54290. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("can't allocate spinlock!"));
  54291. + return NULL;
  54292. + }
  54293. +
  54294. +#if (DPAA_VERSION >= 11)
  54295. + p_Fm->partVSPBase = p_FmParam->partVSPBase;
  54296. + p_Fm->partNumOfVSPs = p_FmParam->partNumOfVSPs;
  54297. + p_Fm->vspBaseAddr = p_FmParam->vspBaseAddr;
  54298. +#endif /* (DPAA_VERSION >= 11) */
  54299. +
  54300. + fman_defconfig(p_Fm->p_FmDriverParam,
  54301. + !!(p_Fm->guestId == NCSW_MASTER_ID));
  54302. +/* overide macros dependent parameters */
  54303. +#ifdef FM_PEDANTIC_DMA
  54304. + p_Fm->p_FmDriverParam->pedantic_dma = TRUE;
  54305. + p_Fm->p_FmDriverParam->dma_aid_override = TRUE;
  54306. +#endif /* FM_PEDANTIC_DMA */
  54307. +#ifndef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  54308. + p_Fm->p_FmDriverParam->qmi_deq_option_support = TRUE;
  54309. +#endif /* !FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
  54310. +
  54311. + p_Fm->p_FmStateStruct->ramsEccEnable = FALSE;
  54312. + p_Fm->p_FmStateStruct->extraFifoPoolSize = 0;
  54313. + p_Fm->p_FmStateStruct->exceptions = DEFAULT_exceptions;
  54314. + p_Fm->resetOnInit = DEFAULT_resetOnInit;
  54315. + p_Fm->fwVerify = DEFAULT_VerifyUcode;
  54316. + p_Fm->firmware.size = p_FmParam->firmware.size;
  54317. + if (p_Fm->firmware.size)
  54318. + {
  54319. + p_Fm->firmware.p_Code = (uint32_t *)XX_Malloc(p_Fm->firmware.size);
  54320. + if (!p_Fm->firmware.p_Code)
  54321. + {
  54322. + XX_FreeSpinlock(p_Fm->h_Spinlock);
  54323. + XX_Free(p_Fm->p_FmStateStruct);
  54324. + XX_Free(p_Fm->p_FmDriverParam);
  54325. + XX_Free(p_Fm);
  54326. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM firmware code"));
  54327. + return NULL;
  54328. + }
  54329. + memcpy(p_Fm->firmware.p_Code, p_FmParam->firmware.p_Code ,p_Fm->firmware.size);
  54330. + }
  54331. +
  54332. + if (p_Fm->guestId != NCSW_MASTER_ID)
  54333. + return p_Fm;
  54334. +
  54335. + /* read revision */
  54336. + /* Chip dependent, will be configured in Init */
  54337. + fman_get_revision(p_Fm->p_FmFpmRegs,
  54338. + &p_Fm->p_FmStateStruct->revInfo.majorRev,
  54339. + &p_Fm->p_FmStateStruct->revInfo.minorRev);
  54340. +
  54341. +#ifdef FM_AID_MODE_NO_TNUM_SW005
  54342. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  54343. + p_Fm->p_FmDriverParam->dma_aid_mode = e_FM_DMA_AID_OUT_PORT_ID;
  54344. +#endif /* FM_AID_MODE_NO_TNUM_SW005 */
  54345. +#ifndef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  54346. + if (p_Fm->p_FmStateStruct->revInfo.majorRev != 4)
  54347. + p_Fm->p_FmDriverParam->qmi_def_tnums_thresh = QMI_DEF_TNUMS_THRESH;
  54348. +#endif /* FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
  54349. +
  54350. + p_Fm->p_FmStateStruct->totalFifoSize = 0;
  54351. + p_Fm->p_FmStateStruct->totalNumOfTasks =
  54352. + DEFAULT_totalNumOfTasks(p_Fm->p_FmStateStruct->revInfo.majorRev,
  54353. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  54354. +
  54355. +#ifdef FM_HAS_TOTAL_DMAS
  54356. + p_Fm->p_FmStateStruct->maxNumOfOpenDmas = BMI_MAX_NUM_OF_DMAS;
  54357. +#endif /* FM_HAS_TOTAL_DMAS */
  54358. +#if (DPAA_VERSION < 11)
  54359. + p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer = DEFAULT_dmaCommQLow;
  54360. + p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer = DEFAULT_dmaCommQHigh;
  54361. + p_Fm->p_FmDriverParam->dma_cam_num_of_entries = DEFAULT_dmaCamNumOfEntries;
  54362. + p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer = DEFAULT_dmaReadIntBufLow;
  54363. + p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer = DEFAULT_dmaReadIntBufHigh;
  54364. + p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer = DEFAULT_dmaWriteIntBufLow;
  54365. + p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer = DEFAULT_dmaWriteIntBufHigh;
  54366. + p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats = DEFAULT_axiDbgNumOfBeats;
  54367. +#endif /* (DPAA_VERSION < 11) */
  54368. +#ifdef FM_NO_TNUM_AGING
  54369. + p_Fm->p_FmDriverParam->tnum_aging_period = 0;
  54370. +#endif
  54371. + p_Fm->tnumAgingPeriod = p_Fm->p_FmDriverParam->tnum_aging_period;
  54372. +
  54373. + return p_Fm;
  54374. +}
  54375. +
  54376. +/**************************************************************************//**
  54377. + @Function FM_Init
  54378. +
  54379. + @Description Initializes the FM module
  54380. +
  54381. + @Param[in] h_Fm - FM module descriptor
  54382. +
  54383. + @Return E_OK on success; Error code otherwise.
  54384. +*//***************************************************************************/
  54385. +t_Error FM_Init(t_Handle h_Fm)
  54386. +{
  54387. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54388. + struct fman_cfg *p_FmDriverParam = NULL;
  54389. + t_Error err = E_OK;
  54390. + int i;
  54391. + t_FmRevisionInfo revInfo;
  54392. + struct fman_rg fman_rg;
  54393. +
  54394. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54395. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54396. +
  54397. + fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
  54398. + fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
  54399. + fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
  54400. + fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
  54401. +
  54402. + p_Fm->p_FmStateStruct->count1MicroBit = FM_TIMESTAMP_1_USEC_BIT;
  54403. + p_Fm->p_FmDriverParam->num_of_fman_ctrl_evnt_regs = FM_NUM_OF_FMAN_CTRL_EVENT_REGS;
  54404. +
  54405. + if (p_Fm->guestId != NCSW_MASTER_ID)
  54406. + return InitGuestMode(p_Fm);
  54407. +
  54408. + /* if user didn't configured totalFifoSize - (totalFifoSize=0) we configure default
  54409. + * according to chip. otherwise, we use user's configuration.
  54410. + */
  54411. + if (p_Fm->p_FmStateStruct->totalFifoSize == 0)
  54412. + p_Fm->p_FmStateStruct->totalFifoSize = DEFAULT_totalFifoSize(p_Fm->p_FmStateStruct->revInfo.majorRev,
  54413. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  54414. +
  54415. + CHECK_INIT_PARAMETERS(p_Fm, CheckFmParameters);
  54416. +
  54417. + p_FmDriverParam = p_Fm->p_FmDriverParam;
  54418. +
  54419. + FM_GetRevision(p_Fm, &revInfo);
  54420. +
  54421. + /* clear revision-dependent non existing exception */
  54422. +#ifdef FM_NO_DISPATCH_RAM_ECC
  54423. + if ((revInfo.majorRev != 4) &&
  54424. + (revInfo.majorRev < 6))
  54425. + p_Fm->p_FmStateStruct->exceptions &= ~FM_EX_BMI_DISPATCH_RAM_ECC;
  54426. +#endif /* FM_NO_DISPATCH_RAM_ECC */
  54427. +
  54428. +#ifdef FM_QMI_NO_ECC_EXCEPTIONS
  54429. + if (revInfo.majorRev == 4)
  54430. + p_Fm->p_FmStateStruct->exceptions &= ~(FM_EX_QMI_SINGLE_ECC | FM_EX_QMI_DOUBLE_ECC);
  54431. +#endif /* FM_QMI_NO_ECC_EXCEPTIONS */
  54432. +
  54433. +#ifdef FM_QMI_NO_SINGLE_ECC_EXCEPTION
  54434. + if (revInfo.majorRev >= 6)
  54435. + p_Fm->p_FmStateStruct->exceptions &= ~FM_EX_QMI_SINGLE_ECC;
  54436. +#endif /* FM_QMI_NO_SINGLE_ECC_EXCEPTION */
  54437. +
  54438. + FmMuramClear(p_Fm->h_FmMuram);
  54439. +
  54440. + /* clear CPG */
  54441. + IOMemSet32(UINT_TO_PTR(p_Fm->baseAddr + FM_MM_CGP), 0, FM_PORT_NUM_OF_CONGESTION_GRPS);
  54442. +
  54443. + /* add to the default exceptions the user's definitions */
  54444. + p_Fm->p_FmStateStruct->exceptions |= p_Fm->userSetExceptions;
  54445. +
  54446. + /* Reset the FM if required */
  54447. + if (p_Fm->resetOnInit)
  54448. + {
  54449. +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
  54450. + if ((err = FwNotResetErratumBugzilla6173WA(p_Fm)) != E_OK)
  54451. + RETURN_ERROR(MAJOR, err, NO_MSG);
  54452. +#else /* not FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
  54453. +#ifndef CONFIG_FMAN_ARM
  54454. + {
  54455. + u32 svr = mfspr(SPRN_SVR);
  54456. +
  54457. + if (((SVR_SOC_VER(svr) == SVR_T4240 && SVR_REV(svr) > 0x10)) ||
  54458. + ((SVR_SOC_VER(svr) == SVR_T4160 && SVR_REV(svr) > 0x10)) ||
  54459. + ((SVR_SOC_VER(svr) == SVR_T4080 && SVR_REV(svr) > 0x10)) ||
  54460. + (SVR_SOC_VER(svr) == SVR_T1024) ||
  54461. + (SVR_SOC_VER(svr) == SVR_T1023) ||
  54462. + (SVR_SOC_VER(svr) == SVR_T2080) ||
  54463. + (SVR_SOC_VER(svr) == SVR_T2081)) {
  54464. + DBG(WARNING, ("Hack: No FM reset!\n"));
  54465. + } else {
  54466. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rstc, FPM_RSTC_FM_RESET);
  54467. + CORE_MemoryBarrier();
  54468. + XX_UDelay(100);
  54469. + }
  54470. + }
  54471. +#endif
  54472. + if (fman_is_qmi_halt_not_busy_state(p_Fm->p_FmQmiRegs))
  54473. + {
  54474. + fman_resume(p_Fm->p_FmFpmRegs);
  54475. + XX_UDelay(100);
  54476. + }
  54477. +#endif /* not FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
  54478. + }
  54479. +
  54480. +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
  54481. + if (!p_Fm->resetOnInit) /* Skip operations done in errata workaround */
  54482. + {
  54483. +#endif /* FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
  54484. + /* Load FMan-Controller code to IRAM */
  54485. +
  54486. + ClearIRam(p_Fm);
  54487. +
  54488. + if (p_Fm->firmware.p_Code && (LoadFmanCtrlCode(p_Fm) != E_OK))
  54489. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  54490. +#ifdef FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
  54491. + }
  54492. +#endif /* FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
  54493. +
  54494. +#ifdef FM_CAPWAP_SUPPORT
  54495. + /* save first 256 byte in MURAM */
  54496. + p_Fm->resAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram, 256, 0));
  54497. + if (!p_Fm->resAddr)
  54498. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for reserved Area failed"));
  54499. +
  54500. + WRITE_BLOCK(UINT_TO_PTR(p_Fm->resAddr), 0, 256);
  54501. +#endif /* FM_CAPWAP_SUPPORT */
  54502. +
  54503. +#if (DPAA_VERSION >= 11)
  54504. + p_Fm->partVSPBase = AllocVSPsForPartition(h_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
  54505. + if (p_Fm->partVSPBase == (uint8_t)(ILLEGAL_BASE))
  54506. + DBG(WARNING, ("partition VSPs allocation is FAILED"));
  54507. +#endif /* (DPAA_VERSION >= 11) */
  54508. +
  54509. + /* General FM driver initialization */
  54510. + p_Fm->fmMuramPhysBaseAddr =
  54511. + (uint64_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->baseAddr + FM_MM_MURAM)));
  54512. +
  54513. + for (i=0;i<e_FM_EV_DUMMY_LAST;i++)
  54514. + p_Fm->intrMng[i].f_Isr = UnimplementedIsr;
  54515. + for (i=0;i<FM_NUM_OF_FMAN_CTRL_EVENT_REGS;i++)
  54516. + p_Fm->fmanCtrlIntr[i].f_Isr = UnimplementedFmanCtrlIsr;
  54517. +
  54518. + p_FmDriverParam->exceptions = p_Fm->p_FmStateStruct->exceptions;
  54519. +
  54520. + /**********************/
  54521. + /* Init DMA Registers */
  54522. + /**********************/
  54523. + err = InitFmDma(p_Fm);
  54524. + if (err != E_OK)
  54525. + {
  54526. + FreeInitResources(p_Fm);
  54527. + RETURN_ERROR(MAJOR, err, NO_MSG);
  54528. + }
  54529. +
  54530. + /**********************/
  54531. + /* Init FPM Registers */
  54532. + /**********************/
  54533. + err = InitFmFpm(p_Fm);
  54534. + if (err != E_OK)
  54535. + {
  54536. + FreeInitResources(p_Fm);
  54537. + RETURN_ERROR(MAJOR, err, NO_MSG);
  54538. + }
  54539. +
  54540. + /* define common resources */
  54541. + /* allocate MURAM for FIFO according to total size */
  54542. + p_Fm->fifoBaseAddr = PTR_TO_UINT(FM_MURAM_AllocMem(p_Fm->h_FmMuram,
  54543. + p_Fm->p_FmStateStruct->totalFifoSize,
  54544. + BMI_FIFO_ALIGN));
  54545. + if (!p_Fm->fifoBaseAddr)
  54546. + {
  54547. + FreeInitResources(p_Fm);
  54548. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MURAM alloc for BMI FIFO failed"));
  54549. + }
  54550. +
  54551. + p_FmDriverParam->fifo_base_addr = (uint32_t)(XX_VirtToPhys(UINT_TO_PTR(p_Fm->fifoBaseAddr)) - p_Fm->fmMuramPhysBaseAddr);
  54552. + p_FmDriverParam->total_fifo_size = p_Fm->p_FmStateStruct->totalFifoSize;
  54553. + p_FmDriverParam->total_num_of_tasks = p_Fm->p_FmStateStruct->totalNumOfTasks;
  54554. + p_FmDriverParam->clk_freq = p_Fm->p_FmStateStruct->fmClkFreq;
  54555. +
  54556. + /**********************/
  54557. + /* Init BMI Registers */
  54558. + /**********************/
  54559. + err = InitFmBmi(p_Fm);
  54560. + if (err != E_OK)
  54561. + {
  54562. + FreeInitResources(p_Fm);
  54563. + RETURN_ERROR(MAJOR, err, NO_MSG);
  54564. + }
  54565. +
  54566. + /**********************/
  54567. + /* Init QMI Registers */
  54568. + /**********************/
  54569. + err = InitFmQmi(p_Fm);
  54570. + if (err != E_OK)
  54571. + {
  54572. + FreeInitResources(p_Fm);
  54573. + RETURN_ERROR(MAJOR, err, NO_MSG);
  54574. + }
  54575. +
  54576. + /* build the FM master partition IPC address */
  54577. + if (Sprint (p_Fm->fmModuleName, "FM_%d_%d",p_Fm->p_FmStateStruct->fmId, NCSW_MASTER_ID) != 6)
  54578. + {
  54579. + FreeInitResources(p_Fm);
  54580. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Sprint failed"));
  54581. + }
  54582. +
  54583. + err = XX_IpcRegisterMsgHandler(p_Fm->fmModuleName, FmHandleIpcMsgCB, p_Fm, FM_IPC_MAX_REPLY_SIZE);
  54584. + if (err)
  54585. + {
  54586. + FreeInitResources(p_Fm);
  54587. + RETURN_ERROR(MAJOR, err, NO_MSG);
  54588. + }
  54589. +
  54590. + /* Register the FM interrupts handlers */
  54591. + if (p_Fm->p_FmStateStruct->irq != NO_IRQ)
  54592. + {
  54593. + XX_SetIntr(p_Fm->p_FmStateStruct->irq, FM_EventIsr, p_Fm);
  54594. + XX_EnableIntr(p_Fm->p_FmStateStruct->irq);
  54595. + }
  54596. +
  54597. + if (p_Fm->p_FmStateStruct->errIrq != NO_IRQ)
  54598. + {
  54599. + XX_SetIntr(p_Fm->p_FmStateStruct->errIrq, (void (*) (t_Handle))FM_ErrorIsr, p_Fm);
  54600. + XX_EnableIntr(p_Fm->p_FmStateStruct->errIrq);
  54601. + }
  54602. +
  54603. + err = (t_Error)fman_enable(&fman_rg , p_FmDriverParam);
  54604. + if (err != E_OK)
  54605. + return err; /* FIXME */
  54606. +
  54607. + EnableTimeStamp(p_Fm);
  54608. +
  54609. + if (p_Fm->firmware.p_Code)
  54610. + {
  54611. + XX_Free(p_Fm->firmware.p_Code);
  54612. + p_Fm->firmware.p_Code = NULL;
  54613. + }
  54614. +
  54615. + XX_Free(p_Fm->p_FmDriverParam);
  54616. + p_Fm->p_FmDriverParam = NULL;
  54617. +
  54618. + return E_OK;
  54619. +}
  54620. +
  54621. +/**************************************************************************//**
  54622. + @Function FM_Free
  54623. +
  54624. + @Description Frees all resources that were assigned to FM module.
  54625. +
  54626. + Calling this routine invalidates the descriptor.
  54627. +
  54628. + @Param[in] h_Fm - FM module descriptor
  54629. +
  54630. + @Return E_OK on success; Error code otherwise.
  54631. +*//***************************************************************************/
  54632. +t_Error FM_Free(t_Handle h_Fm)
  54633. +{
  54634. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54635. + struct fman_rg fman_rg;
  54636. +
  54637. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54638. +
  54639. + fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
  54640. + fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
  54641. + fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
  54642. + fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
  54643. +
  54644. + if (p_Fm->guestId != NCSW_MASTER_ID)
  54645. + {
  54646. +#if (DPAA_VERSION >= 11)
  54647. + FreeVSPsForPartition(h_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
  54648. +
  54649. + if (p_Fm->p_FmSp)
  54650. + {
  54651. + XX_Free(p_Fm->p_FmSp);
  54652. + p_Fm->p_FmSp = NULL;
  54653. + }
  54654. +#endif /* (DPAA_VERSION >= 11) */
  54655. +
  54656. + if (p_Fm->fmModuleName[0] != 0)
  54657. + XX_IpcUnregisterMsgHandler(p_Fm->fmModuleName);
  54658. +
  54659. + if (!p_Fm->recoveryMode)
  54660. + XX_Free(p_Fm->p_FmStateStruct);
  54661. +
  54662. + XX_Free(p_Fm);
  54663. +
  54664. + return E_OK;
  54665. + }
  54666. +
  54667. + fman_free_resources(&fman_rg);
  54668. +
  54669. + if ((p_Fm->guestId == NCSW_MASTER_ID) && (p_Fm->fmModuleName[0] != 0))
  54670. + XX_IpcUnregisterMsgHandler(p_Fm->fmModuleName);
  54671. +
  54672. + if (p_Fm->p_FmStateStruct)
  54673. + {
  54674. + if (p_Fm->p_FmStateStruct->irq != NO_IRQ)
  54675. + {
  54676. + XX_DisableIntr(p_Fm->p_FmStateStruct->irq);
  54677. + XX_FreeIntr(p_Fm->p_FmStateStruct->irq);
  54678. + }
  54679. + if (p_Fm->p_FmStateStruct->errIrq != NO_IRQ)
  54680. + {
  54681. + XX_DisableIntr(p_Fm->p_FmStateStruct->errIrq);
  54682. + XX_FreeIntr(p_Fm->p_FmStateStruct->errIrq);
  54683. + }
  54684. + }
  54685. +
  54686. +#if (DPAA_VERSION >= 11)
  54687. + FreeVSPsForPartition(h_Fm, p_Fm->partVSPBase, p_Fm->partNumOfVSPs, p_Fm->guestId);
  54688. +
  54689. + if (p_Fm->p_FmSp)
  54690. + {
  54691. + XX_Free(p_Fm->p_FmSp);
  54692. + p_Fm->p_FmSp = NULL;
  54693. + }
  54694. +#endif /* (DPAA_VERSION >= 11) */
  54695. +
  54696. + if (p_Fm->h_Spinlock)
  54697. + XX_FreeSpinlock(p_Fm->h_Spinlock);
  54698. +
  54699. + if (p_Fm->p_FmDriverParam)
  54700. + {
  54701. + if (p_Fm->firmware.p_Code)
  54702. + XX_Free(p_Fm->firmware.p_Code);
  54703. + XX_Free(p_Fm->p_FmDriverParam);
  54704. + p_Fm->p_FmDriverParam = NULL;
  54705. + }
  54706. +
  54707. + FreeInitResources(p_Fm);
  54708. +
  54709. + if (!p_Fm->recoveryMode && p_Fm->p_FmStateStruct)
  54710. + XX_Free(p_Fm->p_FmStateStruct);
  54711. +
  54712. + XX_Free(p_Fm);
  54713. +
  54714. + return E_OK;
  54715. +}
  54716. +
  54717. +/*************************************************/
  54718. +/* API Advanced Init unit functions */
  54719. +/*************************************************/
  54720. +
  54721. +t_Error FM_ConfigResetOnInit(t_Handle h_Fm, bool enable)
  54722. +{
  54723. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54724. +
  54725. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54726. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54727. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54728. +
  54729. + p_Fm->resetOnInit = enable;
  54730. +
  54731. + return E_OK;
  54732. +}
  54733. +
  54734. +t_Error FM_ConfigTotalFifoSize(t_Handle h_Fm, uint32_t totalFifoSize)
  54735. +{
  54736. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54737. +
  54738. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54739. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54740. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54741. +
  54742. + p_Fm->p_FmStateStruct->totalFifoSize = totalFifoSize;
  54743. +
  54744. + return E_OK;
  54745. +}
  54746. +
  54747. +t_Error FM_ConfigDmaCacheOverride(t_Handle h_Fm, e_FmDmaCacheOverride cacheOverride)
  54748. +{
  54749. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54750. + enum fman_dma_cache_override fsl_cache_override;
  54751. +
  54752. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54753. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54754. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54755. +
  54756. + FMAN_CACHE_OVERRIDE_TRANS(fsl_cache_override, cacheOverride)
  54757. + p_Fm->p_FmDriverParam->dma_cache_override = fsl_cache_override;
  54758. +
  54759. + return E_OK;
  54760. +}
  54761. +
  54762. +t_Error FM_ConfigDmaAidOverride(t_Handle h_Fm, bool aidOverride)
  54763. +{
  54764. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54765. +
  54766. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54767. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54768. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54769. +
  54770. + p_Fm->p_FmDriverParam->dma_aid_override = aidOverride;
  54771. +
  54772. + return E_OK;
  54773. +}
  54774. +
  54775. +t_Error FM_ConfigDmaAidMode(t_Handle h_Fm, e_FmDmaAidMode aidMode)
  54776. +{
  54777. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54778. + enum fman_dma_aid_mode fsl_aid_mode;
  54779. +
  54780. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54781. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54782. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54783. +
  54784. + FMAN_AID_MODE_TRANS(fsl_aid_mode, aidMode);
  54785. + p_Fm->p_FmDriverParam->dma_aid_mode = fsl_aid_mode;
  54786. +
  54787. + return E_OK;
  54788. +}
  54789. +
  54790. +t_Error FM_ConfigDmaAxiDbgNumOfBeats(t_Handle h_Fm, uint8_t axiDbgNumOfBeats)
  54791. +{
  54792. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54793. +
  54794. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54795. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54796. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54797. +
  54798. +#if (DPAA_VERSION >= 11)
  54799. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
  54800. +#else
  54801. + p_Fm->p_FmDriverParam->dma_axi_dbg_num_of_beats = axiDbgNumOfBeats;
  54802. +
  54803. + return E_OK;
  54804. +#endif /* (DPAA_VERSION >= 11) */
  54805. +}
  54806. +
  54807. +t_Error FM_ConfigDmaCamNumOfEntries(t_Handle h_Fm, uint8_t numOfEntries)
  54808. +{
  54809. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54810. +
  54811. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54812. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54813. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54814. +
  54815. + p_Fm->p_FmDriverParam->dma_cam_num_of_entries = numOfEntries;
  54816. +
  54817. + return E_OK;
  54818. +}
  54819. +
  54820. +t_Error FM_ConfigDmaDbgCounter(t_Handle h_Fm, e_FmDmaDbgCntMode fmDmaDbgCntMode)
  54821. +{
  54822. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54823. + enum fman_dma_dbg_cnt_mode fsl_dma_dbg_cnt;
  54824. +
  54825. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54826. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54827. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54828. +
  54829. + FMAN_DMA_DBG_CNT_TRANS(fsl_dma_dbg_cnt, fmDmaDbgCntMode);
  54830. + p_Fm->p_FmDriverParam->dma_dbg_cnt_mode = fsl_dma_dbg_cnt;
  54831. +
  54832. + return E_OK;
  54833. +}
  54834. +
  54835. +t_Error FM_ConfigDmaStopOnBusErr(t_Handle h_Fm, bool stop)
  54836. +{
  54837. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54838. +
  54839. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54840. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54841. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54842. +
  54843. + p_Fm->p_FmDriverParam->dma_stop_on_bus_error = stop;
  54844. +
  54845. + return E_OK;
  54846. +}
  54847. +
  54848. +t_Error FM_ConfigDmaEmergency(t_Handle h_Fm, t_FmDmaEmergency *p_Emergency)
  54849. +{
  54850. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54851. + enum fman_dma_emergency_level fsl_dma_emer;
  54852. +
  54853. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54854. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54855. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54856. +
  54857. + FMAN_DMA_EMER_TRANS(fsl_dma_emer, p_Emergency->emergencyLevel);
  54858. + p_Fm->p_FmDriverParam->dma_en_emergency = TRUE;
  54859. + p_Fm->p_FmDriverParam->dma_emergency_bus_select = (uint32_t)p_Emergency->emergencyBusSelect;
  54860. + p_Fm->p_FmDriverParam->dma_emergency_level = fsl_dma_emer;
  54861. +
  54862. + return E_OK;
  54863. +}
  54864. +
  54865. +t_Error FM_ConfigDmaEmergencySmoother(t_Handle h_Fm, uint32_t emergencyCnt)
  54866. +{
  54867. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54868. +
  54869. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54870. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54871. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54872. +
  54873. + p_Fm->p_FmDriverParam->dma_en_emergency_smoother = TRUE;
  54874. + p_Fm->p_FmDriverParam->dma_emergency_switch_counter = emergencyCnt;
  54875. +
  54876. + return E_OK;
  54877. +}
  54878. +
  54879. +t_Error FM_ConfigDmaErr(t_Handle h_Fm, e_FmDmaErr dmaErr)
  54880. +{
  54881. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54882. + enum fman_dma_err fsl_dma_err;
  54883. +
  54884. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54885. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54886. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54887. +
  54888. + FMAN_DMA_ERR_TRANS(fsl_dma_err, dmaErr);
  54889. + p_Fm->p_FmDriverParam->dma_err = fsl_dma_err;
  54890. +
  54891. + return E_OK;
  54892. +}
  54893. +
  54894. +t_Error FM_ConfigCatastrophicErr(t_Handle h_Fm, e_FmCatastrophicErr catastrophicErr)
  54895. +{
  54896. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54897. + enum fman_catastrophic_err fsl_catastrophic_err;
  54898. +
  54899. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54900. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54901. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54902. +
  54903. + FMAN_CATASTROPHIC_ERR_TRANS(fsl_catastrophic_err, catastrophicErr);
  54904. + p_Fm->p_FmDriverParam->catastrophic_err = fsl_catastrophic_err;
  54905. +
  54906. + return E_OK;
  54907. +}
  54908. +
  54909. +t_Error FM_ConfigEnableMuramTestMode(t_Handle h_Fm)
  54910. +{
  54911. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54912. +
  54913. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54914. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54915. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54916. +
  54917. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  54918. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
  54919. +
  54920. + p_Fm->p_FmDriverParam->en_muram_test_mode = TRUE;
  54921. +
  54922. + return E_OK;
  54923. +}
  54924. +
  54925. +t_Error FM_ConfigEnableIramTestMode(t_Handle h_Fm)
  54926. +{
  54927. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54928. +
  54929. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE );
  54930. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54931. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54932. +
  54933. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  54934. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
  54935. +
  54936. + p_Fm->p_FmDriverParam->en_iram_test_mode = TRUE;
  54937. +
  54938. + return E_OK;
  54939. +}
  54940. +
  54941. +t_Error FM_ConfigHaltOnExternalActivation(t_Handle h_Fm, bool enable)
  54942. +{
  54943. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54944. +
  54945. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54946. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54947. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54948. +
  54949. + p_Fm->p_FmDriverParam->halt_on_external_activ = enable;
  54950. +
  54951. + return E_OK;
  54952. +}
  54953. +
  54954. +t_Error FM_ConfigHaltOnUnrecoverableEccError(t_Handle h_Fm, bool enable)
  54955. +{
  54956. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54957. +
  54958. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54959. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54960. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54961. +
  54962. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  54963. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
  54964. +
  54965. + p_Fm->p_FmDriverParam->halt_on_unrecov_ecc_err = enable;
  54966. +
  54967. + return E_OK;
  54968. +}
  54969. +
  54970. +t_Error FM_ConfigException(t_Handle h_Fm, e_FmExceptions exception, bool enable)
  54971. +{
  54972. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54973. + uint32_t bitMask = 0;
  54974. +
  54975. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54976. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54977. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  54978. +
  54979. + GET_EXCEPTION_FLAG(bitMask, exception);
  54980. + if (bitMask)
  54981. + {
  54982. + if (enable)
  54983. + p_Fm->userSetExceptions |= bitMask;
  54984. + else
  54985. + p_Fm->p_FmStateStruct->exceptions &= ~bitMask;
  54986. + }
  54987. + else
  54988. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  54989. +
  54990. + return E_OK;
  54991. +}
  54992. +
  54993. +t_Error FM_ConfigExternalEccRamsEnable(t_Handle h_Fm, bool enable)
  54994. +{
  54995. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  54996. +
  54997. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  54998. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  54999. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55000. +
  55001. + p_Fm->p_FmDriverParam->external_ecc_rams_enable = enable;
  55002. +
  55003. + return E_OK;
  55004. +}
  55005. +
  55006. +t_Error FM_ConfigTnumAgingPeriod(t_Handle h_Fm, uint16_t tnumAgingPeriod)
  55007. +{
  55008. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55009. +
  55010. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55011. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55012. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55013. +
  55014. + p_Fm->p_FmDriverParam->tnum_aging_period = tnumAgingPeriod;
  55015. + p_Fm->tnumAgingPeriod = p_Fm->p_FmDriverParam->tnum_aging_period;
  55016. +
  55017. + return E_OK;
  55018. +}
  55019. +
  55020. +/****************************************************/
  55021. +/* Hidden-DEBUG Only API */
  55022. +/****************************************************/
  55023. +
  55024. +t_Error FM_ConfigThresholds(t_Handle h_Fm, t_FmThresholds *p_FmThresholds)
  55025. +{
  55026. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55027. +
  55028. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55029. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55030. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55031. +
  55032. + p_Fm->p_FmDriverParam->disp_limit_tsh = p_FmThresholds->dispLimit;
  55033. + p_Fm->p_FmDriverParam->prs_disp_tsh = p_FmThresholds->prsDispTh;
  55034. + p_Fm->p_FmDriverParam->plcr_disp_tsh = p_FmThresholds->plcrDispTh;
  55035. + p_Fm->p_FmDriverParam->kg_disp_tsh = p_FmThresholds->kgDispTh;
  55036. + p_Fm->p_FmDriverParam->bmi_disp_tsh = p_FmThresholds->bmiDispTh;
  55037. + p_Fm->p_FmDriverParam->qmi_enq_disp_tsh = p_FmThresholds->qmiEnqDispTh;
  55038. + p_Fm->p_FmDriverParam->qmi_deq_disp_tsh = p_FmThresholds->qmiDeqDispTh;
  55039. + p_Fm->p_FmDriverParam->fm_ctl1_disp_tsh = p_FmThresholds->fmCtl1DispTh;
  55040. + p_Fm->p_FmDriverParam->fm_ctl2_disp_tsh = p_FmThresholds->fmCtl2DispTh;
  55041. +
  55042. + return E_OK;
  55043. +}
  55044. +
  55045. +t_Error FM_ConfigDmaSosEmergencyThreshold(t_Handle h_Fm, uint32_t dmaSosEmergency)
  55046. +{
  55047. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55048. +
  55049. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55050. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55051. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55052. +
  55053. + p_Fm->p_FmDriverParam->dma_sos_emergency = dmaSosEmergency;
  55054. +
  55055. + return E_OK;
  55056. +}
  55057. +
  55058. +t_Error FM_ConfigDmaWriteBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds)
  55059. +
  55060. +{
  55061. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55062. +
  55063. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55064. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55065. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55066. +
  55067. +#if (DPAA_VERSION >= 11)
  55068. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
  55069. +#else
  55070. + p_Fm->p_FmDriverParam->dma_write_buf_tsh_asrt_emer = p_FmDmaThresholds->assertEmergency;
  55071. + p_Fm->p_FmDriverParam->dma_write_buf_tsh_clr_emer = p_FmDmaThresholds->clearEmergency;
  55072. +
  55073. + return E_OK;
  55074. +#endif
  55075. +}
  55076. +
  55077. +t_Error FM_ConfigDmaCommQThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds)
  55078. +{
  55079. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55080. +
  55081. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55082. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55083. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55084. +
  55085. + p_Fm->p_FmDriverParam->dma_comm_qtsh_asrt_emer = p_FmDmaThresholds->assertEmergency;
  55086. + p_Fm->p_FmDriverParam->dma_comm_qtsh_clr_emer = p_FmDmaThresholds->clearEmergency;
  55087. +
  55088. + return E_OK;
  55089. +}
  55090. +
  55091. +t_Error FM_ConfigDmaReadBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds)
  55092. +{
  55093. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55094. +
  55095. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55096. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55097. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55098. +
  55099. +#if (DPAA_VERSION >= 11)
  55100. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Not available for this FM revision!"));
  55101. +#else
  55102. + p_Fm->p_FmDriverParam->dma_read_buf_tsh_clr_emer = p_FmDmaThresholds->clearEmergency;
  55103. + p_Fm->p_FmDriverParam->dma_read_buf_tsh_asrt_emer = p_FmDmaThresholds->assertEmergency;
  55104. +
  55105. + return E_OK;
  55106. +#endif
  55107. +}
  55108. +
  55109. +t_Error FM_ConfigDmaWatchdog(t_Handle h_Fm, uint32_t watchdogValue)
  55110. +{
  55111. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55112. +
  55113. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55114. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55115. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55116. +
  55117. + p_Fm->p_FmDriverParam->dma_watchdog = watchdogValue;
  55118. +
  55119. + return E_OK;
  55120. +}
  55121. +
  55122. +t_Error FM_ConfigEnableCounters(t_Handle h_Fm)
  55123. +{
  55124. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55125. +
  55126. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55127. + SANITY_CHECK_RETURN_ERROR(p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55128. +UNUSED(p_Fm);
  55129. +
  55130. + return E_OK;
  55131. +}
  55132. +
  55133. +t_Error FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_Params)
  55134. +{
  55135. + t_Fm* p_Fm = (t_Fm*)h_Fm;
  55136. + if (p_Params->setParams.type & UPDATE_FM_CLD)
  55137. + {
  55138. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_cld, GET_UINT32(
  55139. + p_Fm->p_FmFpmRegs->fm_cld) | 0x00000800);
  55140. + }
  55141. + if (p_Params->setParams.type & CLEAR_IRAM_READY)
  55142. + {
  55143. + t_FMIramRegs *p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
  55144. + WRITE_UINT32(p_Iram->iready,GET_UINT32(p_Iram->iready) & ~IRAM_READY);
  55145. + }
  55146. + if (p_Params->setParams.type & UPDATE_FPM_EXTC)
  55147. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_extc,0x80000000);
  55148. + if (p_Params->setParams.type & UPDATE_FPM_EXTC_CLEAR)
  55149. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_extc,0x00800000);
  55150. + if (p_Params->setParams.type & UPDATE_FPM_BRKC_SLP)
  55151. + {
  55152. + if (p_Params->setParams.sleep)
  55153. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc, GET_UINT32(
  55154. + p_Fm->p_FmFpmRegs->fmfp_brkc) | FPM_BRKC_SLP);
  55155. + else
  55156. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc, GET_UINT32(
  55157. + p_Fm->p_FmFpmRegs->fmfp_brkc) & ~FPM_BRKC_SLP);
  55158. + }
  55159. + if (p_Params->getParams.type & GET_FM_CLD)
  55160. + p_Params->getParams.fm_cld = GET_UINT32(p_Fm->p_FmFpmRegs->fm_cld);
  55161. + if (p_Params->getParams.type & GET_FMQM_GS)
  55162. + p_Params->getParams.fmqm_gs = GET_UINT32(p_Fm->p_FmQmiRegs->fmqm_gs);
  55163. + if (p_Params->getParams.type & GET_FM_NPI)
  55164. + p_Params->getParams.fm_npi = GET_UINT32(p_Fm->p_FmFpmRegs->fm_npi);
  55165. + if (p_Params->getParams.type & GET_FMFP_EXTC)
  55166. + p_Params->getParams.fmfp_extc = GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_extc);
  55167. + return E_OK;
  55168. +}
  55169. +
  55170. +
  55171. +/****************************************************/
  55172. +/* API Run-time Control uint functions */
  55173. +/****************************************************/
  55174. +void FM_EventIsr(t_Handle h_Fm)
  55175. +{
  55176. +#define FM_M_CALL_1G_MAC_ISR(_id) \
  55177. + { \
  55178. + if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].guestId) \
  55179. + SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id), pending); \
  55180. + else \
  55181. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_1G_MAC0+_id)].h_SrcHandle);\
  55182. + }
  55183. +#define FM_M_CALL_10G_MAC_ISR(_id) \
  55184. + { \
  55185. + if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].guestId) \
  55186. + SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id), pending); \
  55187. + else \
  55188. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_10G_MAC0+_id)].h_SrcHandle);\
  55189. + }
  55190. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55191. + uint32_t pending, event;
  55192. + struct fman_fpm_regs *fpm_rg;
  55193. +
  55194. + SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
  55195. + SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55196. + SANITY_CHECK_RETURN((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55197. +
  55198. + fpm_rg = p_Fm->p_FmFpmRegs;
  55199. +
  55200. + /* normal interrupts */
  55201. + pending = fman_get_normal_pending(fpm_rg);
  55202. + if (!pending)
  55203. + return;
  55204. + if (pending & INTR_EN_WAKEUP) // this is a wake up from sleep interrupt
  55205. + {
  55206. + t_FmGetSetParams fmGetSetParams;
  55207. + memset(&fmGetSetParams, 0, sizeof (t_FmGetSetParams));
  55208. + fmGetSetParams.setParams.type = UPDATE_FPM_BRKC_SLP;
  55209. + fmGetSetParams.setParams.sleep = 0;
  55210. + FmGetSetParams(h_Fm, &fmGetSetParams);
  55211. + }
  55212. + if (pending & INTR_EN_QMI)
  55213. + QmiEvent(p_Fm);
  55214. + if (pending & INTR_EN_PRS)
  55215. + p_Fm->intrMng[e_FM_EV_PRS].f_Isr(p_Fm->intrMng[e_FM_EV_PRS].h_SrcHandle);
  55216. + if (pending & INTR_EN_PLCR)
  55217. + p_Fm->intrMng[e_FM_EV_PLCR].f_Isr(p_Fm->intrMng[e_FM_EV_PLCR].h_SrcHandle);
  55218. + if (pending & INTR_EN_TMR)
  55219. + p_Fm->intrMng[e_FM_EV_TMR].f_Isr(p_Fm->intrMng[e_FM_EV_TMR].h_SrcHandle);
  55220. +
  55221. + /* MAC events may belong to different partitions */
  55222. + if (pending & INTR_EN_1G_MAC0)
  55223. + FM_M_CALL_1G_MAC_ISR(0);
  55224. + if (pending & INTR_EN_1G_MAC1)
  55225. + FM_M_CALL_1G_MAC_ISR(1);
  55226. + if (pending & INTR_EN_1G_MAC2)
  55227. + FM_M_CALL_1G_MAC_ISR(2);
  55228. + if (pending & INTR_EN_1G_MAC3)
  55229. + FM_M_CALL_1G_MAC_ISR(3);
  55230. + if (pending & INTR_EN_1G_MAC4)
  55231. + FM_M_CALL_1G_MAC_ISR(4);
  55232. + if (pending & INTR_EN_1G_MAC5)
  55233. + FM_M_CALL_1G_MAC_ISR(5);
  55234. + if (pending & INTR_EN_1G_MAC6)
  55235. + FM_M_CALL_1G_MAC_ISR(6);
  55236. + if (pending & INTR_EN_1G_MAC7)
  55237. + FM_M_CALL_1G_MAC_ISR(7);
  55238. + if (pending & INTR_EN_10G_MAC0)
  55239. + FM_M_CALL_10G_MAC_ISR(0);
  55240. + if (pending & INTR_EN_10G_MAC1)
  55241. + FM_M_CALL_10G_MAC_ISR(1);
  55242. +
  55243. + /* IM port events may belong to different partitions */
  55244. + if (pending & INTR_EN_REV0)
  55245. + {
  55246. + event = fman_get_controller_event(fpm_rg, 0);
  55247. + if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_0].guestId)
  55248. + /*TODO IPC ISR For Fman Ctrl */
  55249. + ASSERT_COND(0);
  55250. + /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_0, pending); */
  55251. + else
  55252. + p_Fm->fmanCtrlIntr[0].f_Isr(p_Fm->fmanCtrlIntr[0].h_SrcHandle, event);
  55253. +
  55254. + }
  55255. + if (pending & INTR_EN_REV1)
  55256. + {
  55257. + event = fman_get_controller_event(fpm_rg, 1);
  55258. + if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_1].guestId)
  55259. + /*TODO IPC ISR For Fman Ctrl */
  55260. + ASSERT_COND(0);
  55261. + /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_1, pending); */
  55262. + else
  55263. + p_Fm->fmanCtrlIntr[1].f_Isr(p_Fm->fmanCtrlIntr[1].h_SrcHandle, event);
  55264. + }
  55265. + if (pending & INTR_EN_REV2)
  55266. + {
  55267. + event = fman_get_controller_event(fpm_rg, 2);
  55268. + if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_2].guestId)
  55269. + /*TODO IPC ISR For Fman Ctrl */
  55270. + ASSERT_COND(0);
  55271. + /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_2, pending); */
  55272. + else
  55273. + p_Fm->fmanCtrlIntr[2].f_Isr(p_Fm->fmanCtrlIntr[2].h_SrcHandle, event);
  55274. + }
  55275. + if (pending & INTR_EN_REV3)
  55276. + {
  55277. + event = fman_get_controller_event(fpm_rg, 3);
  55278. + if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_FMAN_CTRL_3].guestId)
  55279. + /*TODO IPC ISR For Fman Ctrl */
  55280. + ASSERT_COND(0);
  55281. + /* SendIpcIsr(p_Fm, e_FM_EV_FMAN_CTRL_2, pendin3); */
  55282. + else
  55283. + p_Fm->fmanCtrlIntr[3].f_Isr(p_Fm->fmanCtrlIntr[3].h_SrcHandle, event);
  55284. + }
  55285. +#ifdef FM_MACSEC_SUPPORT
  55286. + if (pending & INTR_EN_MACSEC_MAC0)
  55287. + {
  55288. + if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_MACSEC_MAC0].guestId)
  55289. + SendIpcIsr(p_Fm, e_FM_EV_MACSEC_MAC0, pending);
  55290. + else
  55291. + p_Fm->intrMng[e_FM_EV_MACSEC_MAC0].f_Isr(p_Fm->intrMng[e_FM_EV_MACSEC_MAC0].h_SrcHandle);
  55292. + }
  55293. +#endif /* FM_MACSEC_SUPPORT */
  55294. +}
  55295. +
  55296. +t_Error FM_ErrorIsr(t_Handle h_Fm)
  55297. +{
  55298. +#define FM_M_CALL_1G_MAC_ERR_ISR(_id) \
  55299. + { \
  55300. + if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].guestId) \
  55301. + SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id), pending); \
  55302. + else \
  55303. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_1G_MAC0+_id)].h_SrcHandle);\
  55304. + }
  55305. +#define FM_M_CALL_10G_MAC_ERR_ISR(_id) \
  55306. + { \
  55307. + if (p_Fm->guestId != p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].guestId) \
  55308. + SendIpcIsr(p_Fm, (e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id), pending); \
  55309. + else \
  55310. + p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].f_Isr(p_Fm->intrMng[(e_FmInterModuleEvent)(e_FM_EV_ERR_10G_MAC0+_id)].h_SrcHandle);\
  55311. + }
  55312. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55313. + uint32_t pending;
  55314. + struct fman_fpm_regs *fpm_rg;
  55315. +
  55316. + SANITY_CHECK_RETURN_ERROR(h_Fm, E_INVALID_HANDLE);
  55317. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55318. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55319. +
  55320. + fpm_rg = p_Fm->p_FmFpmRegs;
  55321. +
  55322. + /* error interrupts */
  55323. + pending = fman_get_fpm_error_interrupts(fpm_rg);
  55324. + if (!pending)
  55325. + return ERROR_CODE(E_EMPTY);
  55326. +
  55327. + if (pending & ERR_INTR_EN_BMI)
  55328. + BmiErrEvent(p_Fm);
  55329. + if (pending & ERR_INTR_EN_QMI)
  55330. + QmiErrEvent(p_Fm);
  55331. + if (pending & ERR_INTR_EN_FPM)
  55332. + FpmErrEvent(p_Fm);
  55333. + if (pending & ERR_INTR_EN_DMA)
  55334. + DmaErrEvent(p_Fm);
  55335. + if (pending & ERR_INTR_EN_IRAM)
  55336. + IramErrIntr(p_Fm);
  55337. + if (pending & ERR_INTR_EN_MURAM)
  55338. + MuramErrIntr(p_Fm);
  55339. + if (pending & ERR_INTR_EN_PRS)
  55340. + p_Fm->intrMng[e_FM_EV_ERR_PRS].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_PRS].h_SrcHandle);
  55341. + if (pending & ERR_INTR_EN_PLCR)
  55342. + p_Fm->intrMng[e_FM_EV_ERR_PLCR].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_PLCR].h_SrcHandle);
  55343. + if (pending & ERR_INTR_EN_KG)
  55344. + p_Fm->intrMng[e_FM_EV_ERR_KG].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_KG].h_SrcHandle);
  55345. +
  55346. + /* MAC events may belong to different partitions */
  55347. + if (pending & ERR_INTR_EN_1G_MAC0)
  55348. + FM_M_CALL_1G_MAC_ERR_ISR(0);
  55349. + if (pending & ERR_INTR_EN_1G_MAC1)
  55350. + FM_M_CALL_1G_MAC_ERR_ISR(1);
  55351. + if (pending & ERR_INTR_EN_1G_MAC2)
  55352. + FM_M_CALL_1G_MAC_ERR_ISR(2);
  55353. + if (pending & ERR_INTR_EN_1G_MAC3)
  55354. + FM_M_CALL_1G_MAC_ERR_ISR(3);
  55355. + if (pending & ERR_INTR_EN_1G_MAC4)
  55356. + FM_M_CALL_1G_MAC_ERR_ISR(4);
  55357. + if (pending & ERR_INTR_EN_1G_MAC5)
  55358. + FM_M_CALL_1G_MAC_ERR_ISR(5);
  55359. + if (pending & ERR_INTR_EN_1G_MAC6)
  55360. + FM_M_CALL_1G_MAC_ERR_ISR(6);
  55361. + if (pending & ERR_INTR_EN_1G_MAC7)
  55362. + FM_M_CALL_1G_MAC_ERR_ISR(7);
  55363. + if (pending & ERR_INTR_EN_10G_MAC0)
  55364. + FM_M_CALL_10G_MAC_ERR_ISR(0);
  55365. + if (pending & ERR_INTR_EN_10G_MAC1)
  55366. + FM_M_CALL_10G_MAC_ERR_ISR(1);
  55367. +
  55368. +#ifdef FM_MACSEC_SUPPORT
  55369. + if (pending & ERR_INTR_EN_MACSEC_MAC0)
  55370. + {
  55371. + if (p_Fm->guestId != p_Fm->intrMng[e_FM_EV_ERR_MACSEC_MAC0].guestId)
  55372. + SendIpcIsr(p_Fm, e_FM_EV_ERR_MACSEC_MAC0, pending);
  55373. + else
  55374. + p_Fm->intrMng[e_FM_EV_ERR_MACSEC_MAC0].f_Isr(p_Fm->intrMng[e_FM_EV_ERR_MACSEC_MAC0].h_SrcHandle);
  55375. + }
  55376. +#endif /* FM_MACSEC_SUPPORT */
  55377. +
  55378. + return E_OK;
  55379. +}
  55380. +
  55381. +t_Error FM_SetPortsBandwidth(t_Handle h_Fm, t_FmPortsBandwidthParams *p_PortsBandwidth)
  55382. +{
  55383. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55384. + int i;
  55385. + uint8_t sum;
  55386. + uint8_t hardwarePortId;
  55387. + uint8_t weights[64];
  55388. + uint8_t weight, maxPercent = 0;
  55389. + struct fman_bmi_regs *bmi_rg;
  55390. +
  55391. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55392. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55393. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55394. +
  55395. + bmi_rg = p_Fm->p_FmBmiRegs;
  55396. +
  55397. + memset(weights, 0, (sizeof(uint8_t) * 64));
  55398. +
  55399. + /* check that all ports add up to 100% */
  55400. + sum = 0;
  55401. + for (i=0; i < p_PortsBandwidth->numOfPorts; i++)
  55402. + sum +=p_PortsBandwidth->portsBandwidths[i].bandwidth;
  55403. + if (sum != 100)
  55404. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Sum of ports bandwidth differ from 100%"));
  55405. +
  55406. + /* find highest percent */
  55407. + for (i=0; i < p_PortsBandwidth->numOfPorts; i++)
  55408. + {
  55409. + if (p_PortsBandwidth->portsBandwidths[i].bandwidth > maxPercent)
  55410. + maxPercent = p_PortsBandwidth->portsBandwidths[i].bandwidth;
  55411. + }
  55412. +
  55413. + ASSERT_COND(maxPercent > 0); /* guaranteed by sum = 100 */
  55414. +
  55415. + /* calculate weight for each port */
  55416. + for (i=0; i < p_PortsBandwidth->numOfPorts; i++)
  55417. + {
  55418. + weight = (uint8_t)((p_PortsBandwidth->portsBandwidths[i].bandwidth * PORT_MAX_WEIGHT ) / maxPercent);
  55419. + /* we want even division between 1-to-PORT_MAX_WEIGHT. so if exact division
  55420. + is not reached, we round up so that:
  55421. + 0 until maxPercent/PORT_MAX_WEIGHT get "1"
  55422. + maxPercent/PORT_MAX_WEIGHT+1 until (maxPercent/PORT_MAX_WEIGHT)*2 get "2"
  55423. + ...
  55424. + maxPercent - maxPercent/PORT_MAX_WEIGHT until maxPercent get "PORT_MAX_WEIGHT: */
  55425. + if ((uint8_t)((p_PortsBandwidth->portsBandwidths[i].bandwidth * PORT_MAX_WEIGHT ) % maxPercent))
  55426. + weight++;
  55427. +
  55428. + /* find the location of this port within the register */
  55429. + hardwarePortId =
  55430. + SwPortIdToHwPortId(p_PortsBandwidth->portsBandwidths[i].type,
  55431. + p_PortsBandwidth->portsBandwidths[i].relativePortId,
  55432. + p_Fm->p_FmStateStruct->revInfo.majorRev,
  55433. + p_Fm->p_FmStateStruct->revInfo.minorRev);
  55434. +
  55435. + ASSERT_COND(IN_RANGE(1, hardwarePortId, 63));
  55436. + weights[hardwarePortId] = weight;
  55437. + }
  55438. +
  55439. + fman_set_ports_bandwidth(bmi_rg, weights);
  55440. +
  55441. + return E_OK;
  55442. +}
  55443. +
  55444. +t_Error FM_EnableRamsEcc(t_Handle h_Fm)
  55445. +{
  55446. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55447. + struct fman_fpm_regs *fpm_rg;
  55448. +
  55449. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55450. +
  55451. + fpm_rg = p_Fm->p_FmFpmRegs;
  55452. +
  55453. + if (p_Fm->guestId != NCSW_MASTER_ID)
  55454. + {
  55455. + t_FmIpcMsg msg;
  55456. + t_Error err;
  55457. +
  55458. + memset(&msg, 0, sizeof(msg));
  55459. + msg.msgId = FM_ENABLE_RAM_ECC;
  55460. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  55461. + (uint8_t*)&msg,
  55462. + sizeof(msg.msgId),
  55463. + NULL,
  55464. + NULL,
  55465. + NULL,
  55466. + NULL);
  55467. + if (err != E_OK)
  55468. + RETURN_ERROR(MINOR, err, NO_MSG);
  55469. + return E_OK;
  55470. + }
  55471. +
  55472. + if (!p_Fm->p_FmStateStruct->internalCall)
  55473. + p_Fm->p_FmStateStruct->explicitEnable = TRUE;
  55474. + p_Fm->p_FmStateStruct->internalCall = FALSE;
  55475. +
  55476. + if (p_Fm->p_FmStateStruct->ramsEccEnable)
  55477. + return E_OK;
  55478. + else
  55479. + {
  55480. + fman_enable_rams_ecc(fpm_rg);
  55481. + p_Fm->p_FmStateStruct->ramsEccEnable = TRUE;
  55482. + }
  55483. +
  55484. + return E_OK;
  55485. +}
  55486. +
  55487. +t_Error FM_DisableRamsEcc(t_Handle h_Fm)
  55488. +{
  55489. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55490. + bool explicitDisable = FALSE;
  55491. + struct fman_fpm_regs *fpm_rg;
  55492. +
  55493. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55494. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_HANDLE);
  55495. +
  55496. + fpm_rg = p_Fm->p_FmFpmRegs;
  55497. +
  55498. + if (p_Fm->guestId != NCSW_MASTER_ID)
  55499. + {
  55500. + t_Error err;
  55501. + t_FmIpcMsg msg;
  55502. +
  55503. + memset(&msg, 0, sizeof(msg));
  55504. + msg.msgId = FM_DISABLE_RAM_ECC;
  55505. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  55506. + (uint8_t*)&msg,
  55507. + sizeof(msg.msgId),
  55508. + NULL,
  55509. + NULL,
  55510. + NULL,
  55511. + NULL)) != E_OK)
  55512. + RETURN_ERROR(MINOR, err, NO_MSG);
  55513. + return E_OK;
  55514. + }
  55515. +
  55516. + if (!p_Fm->p_FmStateStruct->internalCall)
  55517. + explicitDisable = TRUE;
  55518. + p_Fm->p_FmStateStruct->internalCall = FALSE;
  55519. +
  55520. + /* if rams are already disabled, or if rams were explicitly enabled and are
  55521. + currently called indirectly (not explicitly), ignore this call. */
  55522. + if (!p_Fm->p_FmStateStruct->ramsEccEnable ||
  55523. + (p_Fm->p_FmStateStruct->explicitEnable && !explicitDisable))
  55524. + return E_OK;
  55525. + else
  55526. + {
  55527. + if (p_Fm->p_FmStateStruct->explicitEnable)
  55528. + /* This is the case were both explicit are TRUE.
  55529. + Turn off this flag for cases were following ramsEnable
  55530. + routines are called */
  55531. + p_Fm->p_FmStateStruct->explicitEnable = FALSE;
  55532. +
  55533. + fman_enable_rams_ecc(fpm_rg);
  55534. + p_Fm->p_FmStateStruct->ramsEccEnable = FALSE;
  55535. + }
  55536. +
  55537. + return E_OK;
  55538. +}
  55539. +
  55540. +t_Error FM_SetException(t_Handle h_Fm, e_FmExceptions exception, bool enable)
  55541. +{
  55542. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55543. + uint32_t bitMask = 0;
  55544. + enum fman_exceptions fslException;
  55545. + struct fman_rg fman_rg;
  55546. +
  55547. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55548. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55549. +
  55550. + fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
  55551. + fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
  55552. + fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
  55553. + fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
  55554. +
  55555. + GET_EXCEPTION_FLAG(bitMask, exception);
  55556. + if (bitMask)
  55557. + {
  55558. + if (enable)
  55559. + p_Fm->p_FmStateStruct->exceptions |= bitMask;
  55560. + else
  55561. + p_Fm->p_FmStateStruct->exceptions &= ~bitMask;
  55562. +
  55563. + fslException = FmanExceptionTrans(exception);
  55564. +
  55565. + return (t_Error)fman_set_exception(&fman_rg,
  55566. + fslException,
  55567. + enable);
  55568. + }
  55569. + else
  55570. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
  55571. +
  55572. + return E_OK;
  55573. +}
  55574. +
  55575. +t_Error FM_GetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo)
  55576. +{
  55577. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55578. +
  55579. + p_FmRevisionInfo->majorRev = p_Fm->p_FmStateStruct->revInfo.majorRev;
  55580. + p_FmRevisionInfo->minorRev = p_Fm->p_FmStateStruct->revInfo.minorRev;
  55581. +
  55582. + return E_OK;
  55583. +}
  55584. +
  55585. +t_Error FM_GetFmanCtrlCodeRevision(t_Handle h_Fm, t_FmCtrlCodeRevisionInfo *p_RevisionInfo)
  55586. +{
  55587. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55588. + t_FMIramRegs *p_Iram;
  55589. + uint32_t revInfo;
  55590. +
  55591. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55592. + SANITY_CHECK_RETURN_ERROR(p_RevisionInfo, E_NULL_POINTER);
  55593. +
  55594. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  55595. + p_Fm->h_IpcSessions[0])
  55596. + {
  55597. + t_Error err;
  55598. + t_FmIpcMsg msg;
  55599. + t_FmIpcReply reply;
  55600. + uint32_t replyLength;
  55601. + t_FmIpcFmanCtrlCodeRevisionInfo ipcRevInfo;
  55602. +
  55603. + memset(&msg, 0, sizeof(msg));
  55604. + memset(&reply, 0, sizeof(reply));
  55605. + msg.msgId = FM_GET_FMAN_CTRL_CODE_REV;
  55606. + replyLength = sizeof(uint32_t) + sizeof(t_FmCtrlCodeRevisionInfo);
  55607. + if ((err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  55608. + (uint8_t*)&msg,
  55609. + sizeof(msg.msgId),
  55610. + (uint8_t*)&reply,
  55611. + &replyLength,
  55612. + NULL,
  55613. + NULL)) != E_OK)
  55614. + RETURN_ERROR(MINOR, err, NO_MSG);
  55615. + if (replyLength != (sizeof(uint32_t) + sizeof(t_FmCtrlCodeRevisionInfo)))
  55616. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  55617. + memcpy((uint8_t*)&ipcRevInfo, reply.replyBody, sizeof(t_FmCtrlCodeRevisionInfo));
  55618. + p_RevisionInfo->packageRev = ipcRevInfo.packageRev;
  55619. + p_RevisionInfo->majorRev = ipcRevInfo.majorRev;
  55620. + p_RevisionInfo->minorRev = ipcRevInfo.minorRev;
  55621. + return (t_Error)(reply.error);
  55622. + }
  55623. + else if (p_Fm->guestId != NCSW_MASTER_ID)
  55624. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED,
  55625. + ("running in guest-mode without IPC!"));
  55626. +
  55627. + p_Iram = (t_FMIramRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_IMEM);
  55628. + WRITE_UINT32(p_Iram->iadd, 0x4);
  55629. + while (GET_UINT32(p_Iram->iadd) != 0x4) ;
  55630. + revInfo = GET_UINT32(p_Iram->idata);
  55631. + p_RevisionInfo->packageRev = (uint16_t)((revInfo & 0xFFFF0000) >> 16);
  55632. + p_RevisionInfo->majorRev = (uint8_t)((revInfo & 0x0000FF00) >> 8);
  55633. + p_RevisionInfo->minorRev = (uint8_t)(revInfo & 0x000000FF);
  55634. +
  55635. + return E_OK;
  55636. +}
  55637. +
  55638. +uint32_t FM_GetCounter(t_Handle h_Fm, e_FmCounters counter)
  55639. +{
  55640. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55641. + t_Error err;
  55642. + uint32_t counterValue;
  55643. + struct fman_rg fman_rg;
  55644. + enum fman_counters fsl_counter;
  55645. +
  55646. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, 0);
  55647. + SANITY_CHECK_RETURN_VALUE(!p_Fm->p_FmDriverParam, E_INVALID_STATE, 0);
  55648. +
  55649. + fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
  55650. + fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
  55651. + fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
  55652. + fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
  55653. +
  55654. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  55655. + !p_Fm->baseAddr &&
  55656. + p_Fm->h_IpcSessions[0])
  55657. + {
  55658. + t_FmIpcMsg msg;
  55659. + t_FmIpcReply reply;
  55660. + uint32_t replyLength, outCounter;
  55661. +
  55662. + memset(&msg, 0, sizeof(msg));
  55663. + memset(&reply, 0, sizeof(reply));
  55664. + msg.msgId = FM_GET_COUNTER;
  55665. + memcpy(msg.msgBody, (uint8_t *)&counter, sizeof(uint32_t));
  55666. + replyLength = sizeof(uint32_t) + sizeof(uint32_t);
  55667. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  55668. + (uint8_t*)&msg,
  55669. + sizeof(msg.msgId) +sizeof(counterValue),
  55670. + (uint8_t*)&reply,
  55671. + &replyLength,
  55672. + NULL,
  55673. + NULL);
  55674. + if (err != E_OK)
  55675. + {
  55676. + REPORT_ERROR(MAJOR, err, NO_MSG);
  55677. + return 0;
  55678. + }
  55679. + if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
  55680. + {
  55681. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  55682. + return 0;
  55683. + }
  55684. +
  55685. + memcpy((uint8_t*)&outCounter, reply.replyBody, sizeof(uint32_t));
  55686. + return outCounter;
  55687. + }
  55688. + else if (!p_Fm->baseAddr)
  55689. + {
  55690. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Either IPC or 'baseAddress' is required!"));
  55691. + return 0;
  55692. + }
  55693. +
  55694. + /* When applicable (when there is an 'enable counters' bit,
  55695. + check that counters are enabled */
  55696. + switch (counter)
  55697. + {
  55698. + case (e_FM_COUNTERS_DEQ_1):
  55699. + case (e_FM_COUNTERS_DEQ_2):
  55700. + case (e_FM_COUNTERS_DEQ_3):
  55701. + if ((p_Fm->p_FmStateStruct->revInfo.majorRev == 4) ||
  55702. + (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6))
  55703. + {
  55704. + REPORT_ERROR(MAJOR, E_NOT_SUPPORTED, ("Requested counter not supported"));
  55705. + return 0;
  55706. + }
  55707. + case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
  55708. + case (e_FM_COUNTERS_DEQ_TOTAL_FRAME):
  55709. + case (e_FM_COUNTERS_DEQ_0):
  55710. + case (e_FM_COUNTERS_DEQ_FROM_DEFAULT):
  55711. + case (e_FM_COUNTERS_DEQ_FROM_CONTEXT):
  55712. + case (e_FM_COUNTERS_DEQ_FROM_FD):
  55713. + case (e_FM_COUNTERS_DEQ_CONFIRM):
  55714. + if (!(GET_UINT32(p_Fm->p_FmQmiRegs->fmqm_gc) & QMI_CFG_EN_COUNTERS))
  55715. + {
  55716. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Requested counter was not enabled"));
  55717. + return 0;
  55718. + }
  55719. + break;
  55720. + default:
  55721. + break;
  55722. + }
  55723. +
  55724. + FMAN_COUNTERS_TRANS(fsl_counter, counter);
  55725. + return fman_get_counter(&fman_rg, fsl_counter);
  55726. +}
  55727. +
  55728. +t_Error FM_ModifyCounter(t_Handle h_Fm, e_FmCounters counter, uint32_t val)
  55729. +{
  55730. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55731. + struct fman_rg fman_rg;
  55732. + enum fman_counters fsl_counter;
  55733. +
  55734. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55735. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55736. +
  55737. + fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
  55738. + fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
  55739. + fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
  55740. + fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
  55741. +
  55742. + FMAN_COUNTERS_TRANS(fsl_counter, counter);
  55743. + return (t_Error)fman_modify_counter(&fman_rg, fsl_counter, val);
  55744. +}
  55745. +
  55746. +void FM_SetDmaEmergency(t_Handle h_Fm, e_FmDmaMuramPort muramPort, bool enable)
  55747. +{
  55748. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55749. + struct fman_dma_regs *dma_rg;
  55750. +
  55751. + SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
  55752. + SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55753. +
  55754. + dma_rg = p_Fm->p_FmDmaRegs;
  55755. +
  55756. + fman_set_dma_emergency(dma_rg, !!(muramPort==e_FM_DMA_MURAM_PORT_WRITE), enable);
  55757. +}
  55758. +
  55759. +void FM_SetDmaExtBusPri(t_Handle h_Fm, e_FmDmaExtBusPri pri)
  55760. +{
  55761. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55762. + struct fman_dma_regs *dma_rg;
  55763. +
  55764. + SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
  55765. + SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55766. +
  55767. + dma_rg = p_Fm->p_FmDmaRegs;
  55768. +
  55769. + fman_set_dma_ext_bus_pri(dma_rg, pri);
  55770. +}
  55771. +
  55772. +void FM_GetDmaStatus(t_Handle h_Fm, t_FmDmaStatus *p_FmDmaStatus)
  55773. +{
  55774. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55775. + uint32_t dmaStatus;
  55776. + struct fman_dma_regs *dma_rg;
  55777. +
  55778. + SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
  55779. + SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55780. +
  55781. + dma_rg = p_Fm->p_FmDmaRegs;
  55782. +
  55783. + if ((p_Fm->guestId != NCSW_MASTER_ID) &&
  55784. + !p_Fm->baseAddr &&
  55785. + p_Fm->h_IpcSessions[0])
  55786. + {
  55787. + t_FmIpcDmaStatus ipcDmaStatus;
  55788. + t_FmIpcMsg msg;
  55789. + t_FmIpcReply reply;
  55790. + t_Error err;
  55791. + uint32_t replyLength;
  55792. +
  55793. + memset(&msg, 0, sizeof(msg));
  55794. + memset(&reply, 0, sizeof(reply));
  55795. + msg.msgId = FM_DMA_STAT;
  55796. + replyLength = sizeof(uint32_t) + sizeof(t_FmIpcDmaStatus);
  55797. + err = XX_IpcSendMessage(p_Fm->h_IpcSessions[0],
  55798. + (uint8_t*)&msg,
  55799. + sizeof(msg.msgId),
  55800. + (uint8_t*)&reply,
  55801. + &replyLength,
  55802. + NULL,
  55803. + NULL);
  55804. + if (err != E_OK)
  55805. + {
  55806. + REPORT_ERROR(MINOR, err, NO_MSG);
  55807. + return;
  55808. + }
  55809. + if (replyLength != (sizeof(uint32_t) + sizeof(t_FmIpcDmaStatus)))
  55810. + {
  55811. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
  55812. + return;
  55813. + }
  55814. + memcpy((uint8_t*)&ipcDmaStatus, reply.replyBody, sizeof(t_FmIpcDmaStatus));
  55815. +
  55816. + p_FmDmaStatus->cmqNotEmpty = (bool)ipcDmaStatus.boolCmqNotEmpty; /**< Command queue is not empty */
  55817. + p_FmDmaStatus->busError = (bool)ipcDmaStatus.boolBusError; /**< Bus error occurred */
  55818. + p_FmDmaStatus->readBufEccError = (bool)ipcDmaStatus.boolReadBufEccError; /**< Double ECC error on buffer Read */
  55819. + p_FmDmaStatus->writeBufEccSysError =(bool)ipcDmaStatus.boolWriteBufEccSysError; /**< Double ECC error on buffer write from system side */
  55820. + p_FmDmaStatus->writeBufEccFmError = (bool)ipcDmaStatus.boolWriteBufEccFmError; /**< Double ECC error on buffer write from FM side */
  55821. + p_FmDmaStatus->singlePortEccError = (bool)ipcDmaStatus.boolSinglePortEccError; /**< Double ECC error on buffer write from FM side */
  55822. + return;
  55823. + }
  55824. + else if (!p_Fm->baseAddr)
  55825. + {
  55826. + REPORT_ERROR(MINOR, E_NOT_SUPPORTED,
  55827. + ("Either IPC or 'baseAddress' is required!"));
  55828. + return;
  55829. + }
  55830. +
  55831. + dmaStatus = fman_get_dma_status(dma_rg);
  55832. +
  55833. + p_FmDmaStatus->cmqNotEmpty = (bool)(dmaStatus & DMA_STATUS_CMD_QUEUE_NOT_EMPTY);
  55834. + p_FmDmaStatus->busError = (bool)(dmaStatus & DMA_STATUS_BUS_ERR);
  55835. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  55836. + p_FmDmaStatus->singlePortEccError = (bool)(dmaStatus & DMA_STATUS_FM_SPDAT_ECC);
  55837. + else
  55838. + {
  55839. + p_FmDmaStatus->readBufEccError = (bool)(dmaStatus & DMA_STATUS_READ_ECC);
  55840. + p_FmDmaStatus->writeBufEccSysError = (bool)(dmaStatus & DMA_STATUS_SYSTEM_WRITE_ECC);
  55841. + p_FmDmaStatus->writeBufEccFmError = (bool)(dmaStatus & DMA_STATUS_FM_WRITE_ECC);
  55842. + }
  55843. +}
  55844. +
  55845. +void FM_Resume(t_Handle h_Fm)
  55846. +{
  55847. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55848. + struct fman_fpm_regs *fpm_rg;
  55849. +
  55850. + SANITY_CHECK_RETURN(p_Fm, E_INVALID_HANDLE);
  55851. + SANITY_CHECK_RETURN(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55852. + SANITY_CHECK_RETURN((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55853. +
  55854. + fpm_rg = p_Fm->p_FmFpmRegs;
  55855. +
  55856. + fman_resume(fpm_rg);
  55857. +}
  55858. +
  55859. +t_Error FM_GetSpecialOperationCoding(t_Handle h_Fm,
  55860. + fmSpecialOperations_t spOper,
  55861. + uint8_t *p_SpOperCoding)
  55862. +{
  55863. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  55864. + t_FmCtrlCodeRevisionInfo revInfo;
  55865. + t_Error err;
  55866. +
  55867. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55868. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55869. + SANITY_CHECK_RETURN_ERROR(p_SpOperCoding, E_NULL_POINTER);
  55870. +
  55871. + if (!spOper)
  55872. + {
  55873. + *p_SpOperCoding = 0;
  55874. + return E_OK;
  55875. + }
  55876. +
  55877. + if ((err = FM_GetFmanCtrlCodeRevision(p_Fm, &revInfo)) != E_OK)
  55878. + {
  55879. + DBG(WARNING, ("FM in guest-mode without IPC, can't validate firmware revision."));
  55880. + revInfo.packageRev = IP_OFFLOAD_PACKAGE_NUMBER;
  55881. + }
  55882. + else if (!IS_OFFLOAD_PACKAGE(revInfo.packageRev))
  55883. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("Fman ctrl code package"));
  55884. +
  55885. + switch (spOper)
  55886. + {
  55887. + case (FM_SP_OP_CAPWAP_DTLS_DEC):
  55888. + *p_SpOperCoding = 9;
  55889. + break;
  55890. + case (FM_SP_OP_CAPWAP_DTLS_ENC):
  55891. + *p_SpOperCoding = 10;
  55892. + break;
  55893. + case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_IPSEC_MANIP):
  55894. + case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_IPSEC_MANIP|FM_SP_OP_RPD):
  55895. + *p_SpOperCoding = 5;
  55896. + break;
  55897. + case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_MANIP):
  55898. + case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_MANIP|FM_SP_OP_RPD):
  55899. + *p_SpOperCoding = 6;
  55900. + break;
  55901. + case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_RPD):
  55902. + *p_SpOperCoding = 3;
  55903. + break;
  55904. + case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN):
  55905. + *p_SpOperCoding = 1;
  55906. + break;
  55907. + case (FM_SP_OP_IPSEC|FM_SP_OP_IPSEC_UPDATE_UDP_LEN|FM_SP_OP_IPSEC_NO_ETH_HDR):
  55908. + *p_SpOperCoding = 12;
  55909. + break;
  55910. + case (FM_SP_OP_IPSEC|FM_SP_OP_RPD):
  55911. + *p_SpOperCoding = 4;
  55912. + break;
  55913. + case (FM_SP_OP_IPSEC):
  55914. + *p_SpOperCoding = 2;
  55915. + break;
  55916. + case (FM_SP_OP_DCL4C):
  55917. + *p_SpOperCoding = 7;
  55918. + break;
  55919. + case (FM_SP_OP_CLEAR_RPD):
  55920. + *p_SpOperCoding = 8;
  55921. + break;
  55922. + default:
  55923. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  55924. + }
  55925. +
  55926. + return E_OK;
  55927. +}
  55928. +
  55929. +t_Error FM_CtrlMonStart(t_Handle h_Fm)
  55930. +{
  55931. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  55932. + t_FmTrbRegs *p_MonRegs;
  55933. + uint8_t i;
  55934. +
  55935. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55936. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55937. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55938. +
  55939. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc,
  55940. + GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc) | FPM_BRKC_RDBG);
  55941. +
  55942. + for (i = 0; i < FM_NUM_OF_CTRL; i++)
  55943. + {
  55944. + p_MonRegs = (t_FmTrbRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_TRB(i));
  55945. +
  55946. + /* Reset control registers */
  55947. + WRITE_UINT32(p_MonRegs->tcrh, TRB_TCRH_RESET);
  55948. + WRITE_UINT32(p_MonRegs->tcrl, TRB_TCRL_RESET);
  55949. +
  55950. + /* Configure: counter #1 counts all stalls in risc - ldsched stall
  55951. + counter #2 counts all stalls in risc - other stall*/
  55952. + WRITE_UINT32(p_MonRegs->tcrl, TRB_TCRL_RESET | TRB_TCRL_UTIL);
  55953. +
  55954. + /* Enable monitoring */
  55955. + WRITE_UINT32(p_MonRegs->tcrh, TRB_TCRH_ENABLE_COUNTERS);
  55956. + }
  55957. +
  55958. + return E_OK;
  55959. +}
  55960. +
  55961. +t_Error FM_CtrlMonStop(t_Handle h_Fm)
  55962. +{
  55963. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  55964. + t_FmTrbRegs *p_MonRegs;
  55965. + uint8_t i;
  55966. +
  55967. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55968. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55969. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55970. +
  55971. + for (i = 0; i < FM_NUM_OF_CTRL; i++)
  55972. + {
  55973. + p_MonRegs = (t_FmTrbRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_TRB(i));
  55974. + WRITE_UINT32(p_MonRegs->tcrh, TRB_TCRH_DISABLE_COUNTERS);
  55975. + }
  55976. +
  55977. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc,
  55978. + GET_UINT32(p_Fm->p_FmFpmRegs->fmfp_brkc) & ~FPM_BRKC_RDBG);
  55979. +
  55980. + return E_OK;
  55981. +}
  55982. +
  55983. +t_Error FM_CtrlMonGetCounters(t_Handle h_Fm, uint8_t fmCtrlIndex, t_FmCtrlMon *p_Mon)
  55984. +{
  55985. + t_Fm *p_Fm = (t_Fm *)h_Fm;
  55986. + t_FmTrbRegs *p_MonRegs;
  55987. + uint64_t clkCnt, utilValue, effValue;
  55988. +
  55989. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  55990. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  55991. + SANITY_CHECK_RETURN_ERROR((p_Fm->guestId == NCSW_MASTER_ID), E_NOT_SUPPORTED);
  55992. + SANITY_CHECK_RETURN_ERROR(p_Mon, E_NULL_POINTER);
  55993. +
  55994. + if (fmCtrlIndex >= FM_NUM_OF_CTRL)
  55995. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("FM Controller index"));
  55996. +
  55997. + p_MonRegs = (t_FmTrbRegs *)UINT_TO_PTR(p_Fm->baseAddr + FM_MM_TRB(fmCtrlIndex));
  55998. +
  55999. + clkCnt = (uint64_t)
  56000. + ((uint64_t)GET_UINT32(p_MonRegs->tpcch) << 32 | GET_UINT32(p_MonRegs->tpccl));
  56001. +
  56002. + utilValue = (uint64_t)
  56003. + ((uint64_t)GET_UINT32(p_MonRegs->tpc1h) << 32 | GET_UINT32(p_MonRegs->tpc1l));
  56004. +
  56005. + effValue = (uint64_t)
  56006. + ((uint64_t)GET_UINT32(p_MonRegs->tpc2h) << 32 | GET_UINT32(p_MonRegs->tpc2l));
  56007. +
  56008. + p_Mon->percentCnt[0] = (uint8_t)((clkCnt - utilValue) * 100 / clkCnt);
  56009. + if (clkCnt != utilValue)
  56010. + p_Mon->percentCnt[1] = (uint8_t)(((clkCnt - utilValue) - effValue) * 100 / (clkCnt - utilValue));
  56011. + else
  56012. + p_Mon->percentCnt[1] = 0;
  56013. +
  56014. + return E_OK;
  56015. +}
  56016. +
  56017. +t_Handle FM_GetMuramHandle(t_Handle h_Fm)
  56018. +{
  56019. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  56020. +
  56021. + SANITY_CHECK_RETURN_VALUE(p_Fm, E_INVALID_HANDLE, NULL);
  56022. +
  56023. + return (p_Fm->h_FmMuram);
  56024. +}
  56025. +
  56026. +/****************************************************/
  56027. +/* Hidden-DEBUG Only API */
  56028. +/****************************************************/
  56029. +t_Error FM_ForceIntr (t_Handle h_Fm, e_FmExceptions exception)
  56030. +{
  56031. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  56032. + enum fman_exceptions fslException;
  56033. + struct fman_rg fman_rg;
  56034. +
  56035. + SANITY_CHECK_RETURN_ERROR(p_Fm, E_INVALID_HANDLE);
  56036. + SANITY_CHECK_RETURN_ERROR(!p_Fm->p_FmDriverParam, E_INVALID_STATE);
  56037. +
  56038. + fman_rg.bmi_rg = p_Fm->p_FmBmiRegs;
  56039. + fman_rg.qmi_rg = p_Fm->p_FmQmiRegs;
  56040. + fman_rg.fpm_rg = p_Fm->p_FmFpmRegs;
  56041. + fman_rg.dma_rg = p_Fm->p_FmDmaRegs;
  56042. +
  56043. + switch (exception)
  56044. + {
  56045. + case e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID:
  56046. + if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID))
  56047. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  56048. + break;
  56049. + case e_FM_EX_QMI_SINGLE_ECC:
  56050. + if (p_Fm->p_FmStateStruct->revInfo.majorRev >= 6)
  56051. + RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("e_FM_EX_QMI_SINGLE_ECC not supported on this integration."));
  56052. +
  56053. + if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_QMI_SINGLE_ECC))
  56054. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  56055. + break;
  56056. + case e_FM_EX_QMI_DOUBLE_ECC:
  56057. + if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_QMI_DOUBLE_ECC))
  56058. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  56059. + break;
  56060. + case e_FM_EX_BMI_LIST_RAM_ECC:
  56061. + if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_LIST_RAM_ECC))
  56062. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  56063. + break;
  56064. + case e_FM_EX_BMI_STORAGE_PROFILE_ECC:
  56065. + if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_STORAGE_PROFILE_ECC))
  56066. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  56067. + break;
  56068. + case e_FM_EX_BMI_STATISTICS_RAM_ECC:
  56069. + if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_STATISTICS_RAM_ECC))
  56070. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  56071. + break;
  56072. + case e_FM_EX_BMI_DISPATCH_RAM_ECC:
  56073. + if (!(p_Fm->p_FmStateStruct->exceptions & FM_EX_BMI_DISPATCH_RAM_ECC))
  56074. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception is masked"));
  56075. + break;
  56076. + default:
  56077. + RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("The selected exception may not be forced"));
  56078. + }
  56079. +
  56080. + fslException = FmanExceptionTrans(exception);
  56081. + fman_force_intr (&fman_rg, fslException);
  56082. +
  56083. + return E_OK;
  56084. +}
  56085. +
  56086. +t_Handle FmGetPcd(t_Handle h_Fm)
  56087. +{
  56088. + return ((t_Fm*)h_Fm)->h_Pcd;
  56089. +}
  56090. +#if (DPAA_VERSION >= 11)
  56091. +extern void *g_MemacRegs;
  56092. +void fm_clk_down(void);
  56093. +uint32_t fman_memac_get_event(void *regs, uint32_t ev_mask);
  56094. +void FM_ChangeClock(t_Handle h_Fm, int hardwarePortId)
  56095. +{
  56096. + int macId;
  56097. + uint32_t event, rcr;
  56098. + t_Fm *p_Fm = (t_Fm*)h_Fm;
  56099. + rcr = GET_UINT32(p_Fm->p_FmFpmRegs->fm_rcr);
  56100. + rcr |= 0x04000000;
  56101. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rcr, rcr);
  56102. +
  56103. + HW_PORT_ID_TO_SW_PORT_ID(macId, hardwarePortId);
  56104. + do
  56105. + {
  56106. + event = fman_memac_get_event(g_MemacRegs, 0xFFFFFFFF);
  56107. + } while ((event & 0x00000020) == 0);
  56108. + fm_clk_down();
  56109. + rcr = GET_UINT32(p_Fm->p_FmFpmRegs->fm_rcr);
  56110. + rcr &= ~0x04000000;
  56111. + WRITE_UINT32(p_Fm->p_FmFpmRegs->fm_rcr, rcr);
  56112. +}
  56113. +#endif
  56114. --- /dev/null
  56115. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.h
  56116. @@ -0,0 +1,646 @@
  56117. +/*
  56118. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  56119. + *
  56120. + * Redistribution and use in source and binary forms, with or without
  56121. + * modification, are permitted provided that the following conditions are met:
  56122. + * * Redistributions of source code must retain the above copyright
  56123. + * notice, this list of conditions and the following disclaimer.
  56124. + * * Redistributions in binary form must reproduce the above copyright
  56125. + * notice, this list of conditions and the following disclaimer in the
  56126. + * documentation and/or other materials provided with the distribution.
  56127. + * * Neither the name of Freescale Semiconductor nor the
  56128. + * names of its contributors may be used to endorse or promote products
  56129. + * derived from this software without specific prior written permission.
  56130. + *
  56131. + *
  56132. + * ALTERNATIVELY, this software may be distributed under the terms of the
  56133. + * GNU General Public License ("GPL") as published by the Free Software
  56134. + * Foundation, either version 2 of that License or (at your option) any
  56135. + * later version.
  56136. + *
  56137. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  56138. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  56139. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  56140. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  56141. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  56142. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  56143. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  56144. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  56145. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  56146. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  56147. + */
  56148. +
  56149. +
  56150. +/******************************************************************************
  56151. + @File fm.h
  56152. +
  56153. + @Description FM internal structures and definitions.
  56154. +*//***************************************************************************/
  56155. +#ifndef __FM_H
  56156. +#define __FM_H
  56157. +
  56158. +#include "error_ext.h"
  56159. +#include "std_ext.h"
  56160. +#include "fm_ext.h"
  56161. +#include "fm_ipc.h"
  56162. +
  56163. +#include "fsl_fman.h"
  56164. +
  56165. +#define __ERR_MODULE__ MODULE_FM
  56166. +
  56167. +#define FM_MAX_NUM_OF_HW_PORT_IDS 64
  56168. +#define FM_MAX_NUM_OF_GUESTS 100
  56169. +
  56170. +/**************************************************************************//**
  56171. + @Description Exceptions
  56172. +*//***************************************************************************/
  56173. +#define FM_EX_DMA_BUS_ERROR 0x80000000 /**< DMA bus error. */
  56174. +#define FM_EX_DMA_READ_ECC 0x40000000
  56175. +#define FM_EX_DMA_SYSTEM_WRITE_ECC 0x20000000
  56176. +#define FM_EX_DMA_FM_WRITE_ECC 0x10000000
  56177. +#define FM_EX_FPM_STALL_ON_TASKS 0x08000000 /**< Stall of tasks on FPM */
  56178. +#define FM_EX_FPM_SINGLE_ECC 0x04000000 /**< Single ECC on FPM */
  56179. +#define FM_EX_FPM_DOUBLE_ECC 0x02000000
  56180. +#define FM_EX_QMI_SINGLE_ECC 0x01000000 /**< Single ECC on FPM */
  56181. +#define FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID 0x00800000 /**< Dequeu from default queue id */
  56182. +#define FM_EX_QMI_DOUBLE_ECC 0x00400000
  56183. +#define FM_EX_BMI_LIST_RAM_ECC 0x00200000
  56184. +#define FM_EX_BMI_STORAGE_PROFILE_ECC 0x00100000
  56185. +#define FM_EX_BMI_STATISTICS_RAM_ECC 0x00080000
  56186. +#define FM_EX_IRAM_ECC 0x00040000
  56187. +#define FM_EX_MURAM_ECC 0x00020000
  56188. +#define FM_EX_BMI_DISPATCH_RAM_ECC 0x00010000
  56189. +#define FM_EX_DMA_SINGLE_PORT_ECC 0x00008000
  56190. +
  56191. +#define DMA_EMSR_EMSTR_MASK 0x0000FFFF
  56192. +
  56193. +#define DMA_THRESH_COMMQ_MASK 0xFF000000
  56194. +#define DMA_THRESH_READ_INT_BUF_MASK 0x007F0000
  56195. +#define DMA_THRESH_WRITE_INT_BUF_MASK 0x0000007F
  56196. +
  56197. +#define GET_EXCEPTION_FLAG(bitMask, exception) \
  56198. +switch (exception){ \
  56199. + case e_FM_EX_DMA_BUS_ERROR: \
  56200. + bitMask = FM_EX_DMA_BUS_ERROR; break; \
  56201. + case e_FM_EX_DMA_SINGLE_PORT_ECC: \
  56202. + bitMask = FM_EX_DMA_SINGLE_PORT_ECC; break; \
  56203. + case e_FM_EX_DMA_READ_ECC: \
  56204. + bitMask = FM_EX_DMA_READ_ECC; break; \
  56205. + case e_FM_EX_DMA_SYSTEM_WRITE_ECC: \
  56206. + bitMask = FM_EX_DMA_SYSTEM_WRITE_ECC; break; \
  56207. + case e_FM_EX_DMA_FM_WRITE_ECC: \
  56208. + bitMask = FM_EX_DMA_FM_WRITE_ECC; break; \
  56209. + case e_FM_EX_FPM_STALL_ON_TASKS: \
  56210. + bitMask = FM_EX_FPM_STALL_ON_TASKS; break; \
  56211. + case e_FM_EX_FPM_SINGLE_ECC: \
  56212. + bitMask = FM_EX_FPM_SINGLE_ECC; break; \
  56213. + case e_FM_EX_FPM_DOUBLE_ECC: \
  56214. + bitMask = FM_EX_FPM_DOUBLE_ECC; break; \
  56215. + case e_FM_EX_QMI_SINGLE_ECC: \
  56216. + bitMask = FM_EX_QMI_SINGLE_ECC; break; \
  56217. + case e_FM_EX_QMI_DOUBLE_ECC: \
  56218. + bitMask = FM_EX_QMI_DOUBLE_ECC; break; \
  56219. + case e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID: \
  56220. + bitMask = FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID; break; \
  56221. + case e_FM_EX_BMI_LIST_RAM_ECC: \
  56222. + bitMask = FM_EX_BMI_LIST_RAM_ECC; break; \
  56223. + case e_FM_EX_BMI_STORAGE_PROFILE_ECC: \
  56224. + bitMask = FM_EX_BMI_STORAGE_PROFILE_ECC; break; \
  56225. + case e_FM_EX_BMI_STATISTICS_RAM_ECC: \
  56226. + bitMask = FM_EX_BMI_STATISTICS_RAM_ECC; break; \
  56227. + case e_FM_EX_BMI_DISPATCH_RAM_ECC: \
  56228. + bitMask = FM_EX_BMI_DISPATCH_RAM_ECC; break; \
  56229. + case e_FM_EX_IRAM_ECC: \
  56230. + bitMask = FM_EX_IRAM_ECC; break; \
  56231. + case e_FM_EX_MURAM_ECC: \
  56232. + bitMask = FM_EX_MURAM_ECC; break; \
  56233. + default: bitMask = 0;break; \
  56234. +}
  56235. +
  56236. +#define GET_FM_MODULE_EVENT(_mod, _id, _intrType, _event) \
  56237. + switch (_mod) { \
  56238. + case e_FM_MOD_PRS: \
  56239. + if (_id) _event = e_FM_EV_DUMMY_LAST; \
  56240. + else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PRS : e_FM_EV_PRS; \
  56241. + break; \
  56242. + case e_FM_MOD_KG: \
  56243. + if (_id) _event = e_FM_EV_DUMMY_LAST; \
  56244. + else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_KG : e_FM_EV_DUMMY_LAST; \
  56245. + break; \
  56246. + case e_FM_MOD_PLCR: \
  56247. + if (_id) _event = e_FM_EV_DUMMY_LAST; \
  56248. + else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_PLCR : e_FM_EV_PLCR; \
  56249. + break; \
  56250. + case e_FM_MOD_TMR: \
  56251. + if (_id) _event = e_FM_EV_DUMMY_LAST; \
  56252. + else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_DUMMY_LAST : e_FM_EV_TMR; \
  56253. + break; \
  56254. + case e_FM_MOD_10G_MAC: \
  56255. + if (_id >= FM_MAX_NUM_OF_10G_MACS) _event = e_FM_EV_DUMMY_LAST; \
  56256. + else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? (e_FM_EV_ERR_10G_MAC0 + _id) : (e_FM_EV_10G_MAC0 + _id); \
  56257. + break; \
  56258. + case e_FM_MOD_1G_MAC: \
  56259. + if (_id >= FM_MAX_NUM_OF_1G_MACS) _event = e_FM_EV_DUMMY_LAST; \
  56260. + else _event = (_intrType == e_FM_INTR_TYPE_ERR) ? (e_FM_EV_ERR_1G_MAC0 + _id) : (e_FM_EV_1G_MAC0 + _id); \
  56261. + break; \
  56262. + case e_FM_MOD_MACSEC: \
  56263. + switch (_id){ \
  56264. + case (0): _event = (_intrType == e_FM_INTR_TYPE_ERR) ? e_FM_EV_ERR_MACSEC_MAC0:e_FM_EV_MACSEC_MAC0; \
  56265. + break; \
  56266. + } \
  56267. + break; \
  56268. + case e_FM_MOD_FMAN_CTRL: \
  56269. + if (_intrType == e_FM_INTR_TYPE_ERR) _event = e_FM_EV_DUMMY_LAST; \
  56270. + else _event = (e_FM_EV_FMAN_CTRL_0 + _id); \
  56271. + break; \
  56272. + default: _event = e_FM_EV_DUMMY_LAST; \
  56273. + break; \
  56274. + }
  56275. +
  56276. +#define FMAN_CACHE_OVERRIDE_TRANS(fsl_cache_override, _cache_override) \
  56277. + switch (_cache_override){ \
  56278. + case e_FM_DMA_NO_CACHE_OR: \
  56279. + fsl_cache_override = E_FMAN_DMA_NO_CACHE_OR; break; \
  56280. + case e_FM_DMA_NO_STASH_DATA: \
  56281. + fsl_cache_override = E_FMAN_DMA_NO_STASH_DATA; break; \
  56282. + case e_FM_DMA_MAY_STASH_DATA: \
  56283. + fsl_cache_override = E_FMAN_DMA_MAY_STASH_DATA; break; \
  56284. + case e_FM_DMA_STASH_DATA: \
  56285. + fsl_cache_override = E_FMAN_DMA_STASH_DATA; break; \
  56286. + default: \
  56287. + fsl_cache_override = E_FMAN_DMA_NO_CACHE_OR; break; \
  56288. + }
  56289. +
  56290. +#define FMAN_AID_MODE_TRANS(fsl_aid_mode, _aid_mode) \
  56291. + switch (_aid_mode){ \
  56292. + case e_FM_DMA_AID_OUT_PORT_ID: \
  56293. + fsl_aid_mode = E_FMAN_DMA_AID_OUT_PORT_ID; break; \
  56294. + case e_FM_DMA_AID_OUT_TNUM: \
  56295. + fsl_aid_mode = E_FMAN_DMA_AID_OUT_TNUM; break; \
  56296. + default: \
  56297. + fsl_aid_mode = E_FMAN_DMA_AID_OUT_PORT_ID; break; \
  56298. + }
  56299. +
  56300. +#define FMAN_DMA_DBG_CNT_TRANS(fsl_dma_dbg_cnt, _dma_dbg_cnt) \
  56301. + switch (_dma_dbg_cnt){ \
  56302. + case e_FM_DMA_DBG_NO_CNT: \
  56303. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_NO_CNT; break; \
  56304. + case e_FM_DMA_DBG_CNT_DONE: \
  56305. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_DONE; break; \
  56306. + case e_FM_DMA_DBG_CNT_COMM_Q_EM: \
  56307. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_COMM_Q_EM; break; \
  56308. + case e_FM_DMA_DBG_CNT_INT_READ_EM: \
  56309. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_INT_READ_EM; break; \
  56310. + case e_FM_DMA_DBG_CNT_INT_WRITE_EM: \
  56311. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_INT_WRITE_EM ; break; \
  56312. + case e_FM_DMA_DBG_CNT_FPM_WAIT: \
  56313. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_FPM_WAIT ; break; \
  56314. + case e_FM_DMA_DBG_CNT_SIGLE_BIT_ECC: \
  56315. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_SIGLE_BIT_ECC ; break; \
  56316. + case e_FM_DMA_DBG_CNT_RAW_WAR_PROT: \
  56317. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT ; break; \
  56318. + default: \
  56319. + fsl_dma_dbg_cnt = E_FMAN_DMA_DBG_NO_CNT; break; \
  56320. + }
  56321. +
  56322. +#define FMAN_DMA_EMER_TRANS(fsl_dma_emer, _dma_emer) \
  56323. + switch (_dma_emer){ \
  56324. + case e_FM_DMA_EM_EBS: \
  56325. + fsl_dma_emer = E_FMAN_DMA_EM_EBS; break; \
  56326. + case e_FM_DMA_EM_SOS: \
  56327. + fsl_dma_emer = E_FMAN_DMA_EM_SOS; break; \
  56328. + default: \
  56329. + fsl_dma_emer = E_FMAN_DMA_EM_EBS; break; \
  56330. + }
  56331. +
  56332. +#define FMAN_DMA_ERR_TRANS(fsl_dma_err, _dma_err) \
  56333. + switch (_dma_err){ \
  56334. + case e_FM_DMA_ERR_CATASTROPHIC: \
  56335. + fsl_dma_err = E_FMAN_DMA_ERR_CATASTROPHIC; break; \
  56336. + case e_FM_DMA_ERR_REPORT: \
  56337. + fsl_dma_err = E_FMAN_DMA_ERR_REPORT; break; \
  56338. + default: \
  56339. + fsl_dma_err = E_FMAN_DMA_ERR_CATASTROPHIC; break; \
  56340. + }
  56341. +
  56342. +#define FMAN_CATASTROPHIC_ERR_TRANS(fsl_catastrophic_err, _catastrophic_err) \
  56343. + switch (_catastrophic_err){ \
  56344. + case e_FM_CATASTROPHIC_ERR_STALL_PORT: \
  56345. + fsl_catastrophic_err = E_FMAN_CATAST_ERR_STALL_PORT; break; \
  56346. + case e_FM_CATASTROPHIC_ERR_STALL_TASK: \
  56347. + fsl_catastrophic_err = E_FMAN_CATAST_ERR_STALL_TASK; break; \
  56348. + default: \
  56349. + fsl_catastrophic_err = E_FMAN_CATAST_ERR_STALL_PORT; break; \
  56350. + }
  56351. +
  56352. +#define FMAN_COUNTERS_TRANS(fsl_counters, _counters) \
  56353. + switch (_counters){ \
  56354. + case e_FM_COUNTERS_ENQ_TOTAL_FRAME: \
  56355. + fsl_counters = E_FMAN_COUNTERS_ENQ_TOTAL_FRAME; break; \
  56356. + case e_FM_COUNTERS_DEQ_TOTAL_FRAME: \
  56357. + fsl_counters = E_FMAN_COUNTERS_DEQ_TOTAL_FRAME; break; \
  56358. + case e_FM_COUNTERS_DEQ_0: \
  56359. + fsl_counters = E_FMAN_COUNTERS_DEQ_0; break; \
  56360. + case e_FM_COUNTERS_DEQ_1: \
  56361. + fsl_counters = E_FMAN_COUNTERS_DEQ_1; break; \
  56362. + case e_FM_COUNTERS_DEQ_2: \
  56363. + fsl_counters = E_FMAN_COUNTERS_DEQ_2; break; \
  56364. + case e_FM_COUNTERS_DEQ_3: \
  56365. + fsl_counters = E_FMAN_COUNTERS_DEQ_3; break; \
  56366. + case e_FM_COUNTERS_DEQ_FROM_DEFAULT: \
  56367. + fsl_counters = E_FMAN_COUNTERS_DEQ_FROM_DEFAULT; break; \
  56368. + case e_FM_COUNTERS_DEQ_FROM_CONTEXT: \
  56369. + fsl_counters = E_FMAN_COUNTERS_DEQ_FROM_CONTEXT; break; \
  56370. + case e_FM_COUNTERS_DEQ_FROM_FD: \
  56371. + fsl_counters = E_FMAN_COUNTERS_DEQ_FROM_FD; break; \
  56372. + case e_FM_COUNTERS_DEQ_CONFIRM: \
  56373. + fsl_counters = E_FMAN_COUNTERS_DEQ_CONFIRM; break; \
  56374. + default: \
  56375. + fsl_counters = E_FMAN_COUNTERS_ENQ_TOTAL_FRAME; break; \
  56376. + }
  56377. +
  56378. +/**************************************************************************//**
  56379. + @Description defaults
  56380. +*//***************************************************************************/
  56381. +#define DEFAULT_exceptions (FM_EX_DMA_BUS_ERROR |\
  56382. + FM_EX_DMA_READ_ECC |\
  56383. + FM_EX_DMA_SYSTEM_WRITE_ECC |\
  56384. + FM_EX_DMA_FM_WRITE_ECC |\
  56385. + FM_EX_FPM_STALL_ON_TASKS |\
  56386. + FM_EX_FPM_SINGLE_ECC |\
  56387. + FM_EX_FPM_DOUBLE_ECC |\
  56388. + FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID|\
  56389. + FM_EX_BMI_LIST_RAM_ECC |\
  56390. + FM_EX_BMI_STORAGE_PROFILE_ECC |\
  56391. + FM_EX_BMI_STATISTICS_RAM_ECC |\
  56392. + FM_EX_IRAM_ECC |\
  56393. + FM_EX_MURAM_ECC |\
  56394. + FM_EX_BMI_DISPATCH_RAM_ECC |\
  56395. + FM_EX_QMI_DOUBLE_ECC |\
  56396. + FM_EX_QMI_SINGLE_ECC)
  56397. +
  56398. +#define DEFAULT_eccEnable FALSE
  56399. +#ifdef FM_PEDANTIC_DMA
  56400. +#define DEFAULT_aidOverride TRUE
  56401. +#else
  56402. +#define DEFAULT_aidOverride FALSE
  56403. +#endif /* FM_PEDANTIC_DMA */
  56404. +#define DEFAULT_aidMode e_FM_DMA_AID_OUT_TNUM
  56405. +#define DEFAULT_dmaStopOnBusError FALSE
  56406. +#define DEFAULT_stopAtBusError FALSE
  56407. +#define DEFAULT_axiDbgNumOfBeats 1
  56408. +#define DEFAULT_dmaReadIntBufLow ((DMA_THRESH_MAX_BUF+1)/2)
  56409. +#define DEFAULT_dmaReadIntBufHigh ((DMA_THRESH_MAX_BUF+1)*3/4)
  56410. +#define DEFAULT_dmaWriteIntBufLow ((DMA_THRESH_MAX_BUF+1)/2)
  56411. +#define DEFAULT_dmaWriteIntBufHigh ((DMA_THRESH_MAX_BUF+1)*3/4)
  56412. +#define DEFAULT_catastrophicErr e_FM_CATASTROPHIC_ERR_STALL_PORT
  56413. +#define DEFAULT_dmaErr e_FM_DMA_ERR_CATASTROPHIC
  56414. +#define DEFAULT_resetOnInit FALSE
  56415. +#define DEFAULT_haltOnExternalActivation FALSE /* do not change! if changed, must be disabled for rev1 ! */
  56416. +#define DEFAULT_haltOnUnrecoverableEccError FALSE /* do not change! if changed, must be disabled for rev1 ! */
  56417. +#define DEFAULT_externalEccRamsEnable FALSE
  56418. +#define DEFAULT_VerifyUcode FALSE
  56419. +
  56420. +#if (DPAA_VERSION < 11)
  56421. +#define DEFAULT_totalFifoSize(major, minor) \
  56422. + (((major == 2) || (major == 5)) ? \
  56423. + (100*KILOBYTE) : ((major == 4) ? \
  56424. + (49*KILOBYTE) : (122*KILOBYTE)))
  56425. +#define DEFAULT_totalNumOfTasks(major, minor) \
  56426. + BMI_MAX_NUM_OF_TASKS
  56427. +
  56428. +#define DEFAULT_dmaCommQLow ((DMA_THRESH_MAX_COMMQ+1)/2)
  56429. +#define DEFAULT_dmaCommQHigh ((DMA_THRESH_MAX_COMMQ+1)*3/4)
  56430. +#define DEFAULT_cacheOverride e_FM_DMA_NO_CACHE_OR
  56431. +#define DEFAULT_dmaCamNumOfEntries 32
  56432. +#define DEFAULT_dmaDbgCntMode e_FM_DMA_DBG_NO_CNT
  56433. +#define DEFAULT_dmaEnEmergency FALSE
  56434. +#define DEFAULT_dmaSosEmergency 0
  56435. +#define DEFAULT_dmaWatchdog 0 /* disabled */
  56436. +#define DEFAULT_dmaEnEmergencySmoother FALSE
  56437. +#define DEFAULT_dmaEmergencySwitchCounter 0
  56438. +
  56439. +#define DEFAULT_dispLimit 0
  56440. +#define DEFAULT_prsDispTh 16
  56441. +#define DEFAULT_plcrDispTh 16
  56442. +#define DEFAULT_kgDispTh 16
  56443. +#define DEFAULT_bmiDispTh 16
  56444. +#define DEFAULT_qmiEnqDispTh 16
  56445. +#define DEFAULT_qmiDeqDispTh 16
  56446. +#define DEFAULT_fmCtl1DispTh 16
  56447. +#define DEFAULT_fmCtl2DispTh 16
  56448. +
  56449. +#else /* (DPAA_VERSION < 11) */
  56450. +/* Defaults are registers' reset values */
  56451. +#define DEFAULT_totalFifoSize(major, minor) \
  56452. + (((major == 6) && ((minor == 1) || (minor == 4))) ? \
  56453. + (156*KILOBYTE) : (295*KILOBYTE))
  56454. +
  56455. +/* According to the default value of FMBM_CFG2[TNTSKS] */
  56456. +#define DEFAULT_totalNumOfTasks(major, minor) \
  56457. + (((major == 6) && ((minor == 1) || (minor == 4))) ? 59 : 124)
  56458. +
  56459. +#define DEFAULT_dmaCommQLow 0x2A
  56460. +#define DEFAULT_dmaCommQHigh 0x3F
  56461. +#define DEFAULT_cacheOverride e_FM_DMA_NO_CACHE_OR
  56462. +#define DEFAULT_dmaCamNumOfEntries 64
  56463. +#define DEFAULT_dmaDbgCntMode e_FM_DMA_DBG_NO_CNT
  56464. +#define DEFAULT_dmaEnEmergency FALSE
  56465. +#define DEFAULT_dmaSosEmergency 0
  56466. +#define DEFAULT_dmaWatchdog 0 /* disabled */
  56467. +#define DEFAULT_dmaEnEmergencySmoother FALSE
  56468. +#define DEFAULT_dmaEmergencySwitchCounter 0
  56469. +
  56470. +#define DEFAULT_dispLimit 0
  56471. +#define DEFAULT_prsDispTh 16
  56472. +#define DEFAULT_plcrDispTh 16
  56473. +#define DEFAULT_kgDispTh 16
  56474. +#define DEFAULT_bmiDispTh 16
  56475. +#define DEFAULT_qmiEnqDispTh 16
  56476. +#define DEFAULT_qmiDeqDispTh 16
  56477. +#define DEFAULT_fmCtl1DispTh 16
  56478. +#define DEFAULT_fmCtl2DispTh 16
  56479. +#endif /* (DPAA_VERSION < 11) */
  56480. +
  56481. +#define FM_TIMESTAMP_1_USEC_BIT 8
  56482. +
  56483. +/**************************************************************************//**
  56484. + @Collection Defines used for enabling/disabling FM interrupts
  56485. + @{
  56486. +*//***************************************************************************/
  56487. +#define ERR_INTR_EN_DMA 0x00010000
  56488. +#define ERR_INTR_EN_FPM 0x80000000
  56489. +#define ERR_INTR_EN_BMI 0x00800000
  56490. +#define ERR_INTR_EN_QMI 0x00400000
  56491. +#define ERR_INTR_EN_PRS 0x00200000
  56492. +#define ERR_INTR_EN_KG 0x00100000
  56493. +#define ERR_INTR_EN_PLCR 0x00080000
  56494. +#define ERR_INTR_EN_MURAM 0x00040000
  56495. +#define ERR_INTR_EN_IRAM 0x00020000
  56496. +#define ERR_INTR_EN_10G_MAC0 0x00008000
  56497. +#define ERR_INTR_EN_10G_MAC1 0x00000040
  56498. +#define ERR_INTR_EN_1G_MAC0 0x00004000
  56499. +#define ERR_INTR_EN_1G_MAC1 0x00002000
  56500. +#define ERR_INTR_EN_1G_MAC2 0x00001000
  56501. +#define ERR_INTR_EN_1G_MAC3 0x00000800
  56502. +#define ERR_INTR_EN_1G_MAC4 0x00000400
  56503. +#define ERR_INTR_EN_1G_MAC5 0x00000200
  56504. +#define ERR_INTR_EN_1G_MAC6 0x00000100
  56505. +#define ERR_INTR_EN_1G_MAC7 0x00000080
  56506. +#define ERR_INTR_EN_MACSEC_MAC0 0x00000001
  56507. +
  56508. +#define INTR_EN_QMI 0x40000000
  56509. +#define INTR_EN_PRS 0x20000000
  56510. +#define INTR_EN_WAKEUP 0x10000000
  56511. +#define INTR_EN_PLCR 0x08000000
  56512. +#define INTR_EN_1G_MAC0 0x00080000
  56513. +#define INTR_EN_1G_MAC1 0x00040000
  56514. +#define INTR_EN_1G_MAC2 0x00020000
  56515. +#define INTR_EN_1G_MAC3 0x00010000
  56516. +#define INTR_EN_1G_MAC4 0x00000040
  56517. +#define INTR_EN_1G_MAC5 0x00000020
  56518. +#define INTR_EN_1G_MAC6 0x00000008
  56519. +#define INTR_EN_1G_MAC7 0x00000002
  56520. +#define INTR_EN_10G_MAC0 0x00200000
  56521. +#define INTR_EN_10G_MAC1 0x00100000
  56522. +#define INTR_EN_REV0 0x00008000
  56523. +#define INTR_EN_REV1 0x00004000
  56524. +#define INTR_EN_REV2 0x00002000
  56525. +#define INTR_EN_REV3 0x00001000
  56526. +#define INTR_EN_BRK 0x00000080
  56527. +#define INTR_EN_TMR 0x01000000
  56528. +#define INTR_EN_MACSEC_MAC0 0x00000001
  56529. +/* @} */
  56530. +
  56531. +/**************************************************************************//**
  56532. + @Description Memory Mapped Registers
  56533. +*//***************************************************************************/
  56534. +
  56535. +#if defined(__MWERKS__) && !defined(__GNUC__)
  56536. +#pragma pack(push,1)
  56537. +#endif /* defined(__MWERKS__) && ... */
  56538. +
  56539. +typedef struct
  56540. +{
  56541. + volatile uint32_t iadd; /**< FM IRAM instruction address register */
  56542. + volatile uint32_t idata; /**< FM IRAM instruction data register */
  56543. + volatile uint32_t itcfg; /**< FM IRAM timing config register */
  56544. + volatile uint32_t iready; /**< FM IRAM ready register */
  56545. + volatile uint32_t res[0x1FFFC];
  56546. +} t_FMIramRegs;
  56547. +
  56548. +/* Trace buffer registers -
  56549. + each FM Controller has its own trace buffer residing at FM_MM_TRB(fmCtrlIndex) offset */
  56550. +typedef struct t_FmTrbRegs
  56551. +{
  56552. + volatile uint32_t tcrh;
  56553. + volatile uint32_t tcrl;
  56554. + volatile uint32_t tesr;
  56555. + volatile uint32_t tecr0h;
  56556. + volatile uint32_t tecr0l;
  56557. + volatile uint32_t terf0h;
  56558. + volatile uint32_t terf0l;
  56559. + volatile uint32_t tecr1h;
  56560. + volatile uint32_t tecr1l;
  56561. + volatile uint32_t terf1h;
  56562. + volatile uint32_t terf1l;
  56563. + volatile uint32_t tpcch;
  56564. + volatile uint32_t tpccl;
  56565. + volatile uint32_t tpc1h;
  56566. + volatile uint32_t tpc1l;
  56567. + volatile uint32_t tpc2h;
  56568. + volatile uint32_t tpc2l;
  56569. + volatile uint32_t twdimr;
  56570. + volatile uint32_t twicvr;
  56571. + volatile uint32_t tar;
  56572. + volatile uint32_t tdr;
  56573. + volatile uint32_t tsnum1;
  56574. + volatile uint32_t tsnum2;
  56575. + volatile uint32_t tsnum3;
  56576. + volatile uint32_t tsnum4;
  56577. +} t_FmTrbRegs;
  56578. +
  56579. +#if defined(__MWERKS__) && !defined(__GNUC__)
  56580. +#pragma pack(pop)
  56581. +#endif /* defined(__MWERKS__) && ... */
  56582. +
  56583. +/**************************************************************************//**
  56584. + @Description General defines
  56585. +*//***************************************************************************/
  56586. +#define FM_DEBUG_STATUS_REGISTER_OFFSET 0x000d1084UL
  56587. +#define FM_FW_DEBUG_INSTRUCTION 0x6ffff805UL
  56588. +
  56589. +/**************************************************************************//**
  56590. + @Description FPM defines
  56591. +*//***************************************************************************/
  56592. +/* masks */
  56593. +#define FPM_BRKC_RDBG 0x00000200
  56594. +#define FPM_BRKC_SLP 0x00000800
  56595. +/**************************************************************************//**
  56596. + @Description BMI defines
  56597. +*//***************************************************************************/
  56598. +/* masks */
  56599. +#define BMI_INIT_START 0x80000000
  56600. +#define BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC 0x80000000
  56601. +#define BMI_ERR_INTR_EN_LIST_RAM_ECC 0x40000000
  56602. +#define BMI_ERR_INTR_EN_STATISTICS_RAM_ECC 0x20000000
  56603. +#define BMI_ERR_INTR_EN_DISPATCH_RAM_ECC 0x10000000
  56604. +/**************************************************************************//**
  56605. + @Description QMI defines
  56606. +*//***************************************************************************/
  56607. +/* masks */
  56608. +#define QMI_ERR_INTR_EN_DOUBLE_ECC 0x80000000
  56609. +#define QMI_ERR_INTR_EN_DEQ_FROM_DEF 0x40000000
  56610. +#define QMI_INTR_EN_SINGLE_ECC 0x80000000
  56611. +
  56612. +/**************************************************************************//**
  56613. + @Description IRAM defines
  56614. +*//***************************************************************************/
  56615. +/* masks */
  56616. +#define IRAM_IADD_AIE 0x80000000
  56617. +#define IRAM_READY 0x80000000
  56618. +
  56619. +/**************************************************************************//**
  56620. + @Description TRB defines
  56621. +*//***************************************************************************/
  56622. +/* masks */
  56623. +#define TRB_TCRH_RESET 0x04000000
  56624. +#define TRB_TCRH_ENABLE_COUNTERS 0x84008000
  56625. +#define TRB_TCRH_DISABLE_COUNTERS 0x8400C000
  56626. +#define TRB_TCRL_RESET 0x20000000
  56627. +#define TRB_TCRL_UTIL 0x00000460
  56628. +typedef struct {
  56629. + void (*f_Isr) (t_Handle h_Arg, uint32_t event);
  56630. + t_Handle h_SrcHandle;
  56631. +} t_FmanCtrlIntrSrc;
  56632. +
  56633. +
  56634. +typedef void (t_FmanCtrlIsr)( t_Handle h_Fm, uint32_t event);
  56635. +
  56636. +typedef struct
  56637. +{
  56638. +/***************************/
  56639. +/* Master/Guest parameters */
  56640. +/***************************/
  56641. + uint8_t fmId;
  56642. + e_FmPortType portsTypes[FM_MAX_NUM_OF_HW_PORT_IDS];
  56643. + uint16_t fmClkFreq;
  56644. + uint16_t fmMacClkFreq;
  56645. + t_FmRevisionInfo revInfo;
  56646. +/**************************/
  56647. +/* Master Only parameters */
  56648. +/**************************/
  56649. + bool enabledTimeStamp;
  56650. + uint8_t count1MicroBit;
  56651. + uint8_t totalNumOfTasks;
  56652. + uint32_t totalFifoSize;
  56653. + uint8_t maxNumOfOpenDmas;
  56654. + uint8_t accumulatedNumOfTasks;
  56655. + uint32_t accumulatedFifoSize;
  56656. + uint8_t accumulatedNumOfOpenDmas;
  56657. + uint8_t accumulatedNumOfDeqTnums;
  56658. +#ifdef FM_LOW_END_RESTRICTION
  56659. + bool lowEndRestriction;
  56660. +#endif /* FM_LOW_END_RESTRICTION */
  56661. + uint32_t exceptions;
  56662. + int irq;
  56663. + int errIrq;
  56664. + bool ramsEccEnable;
  56665. + bool explicitEnable;
  56666. + bool internalCall;
  56667. + uint8_t ramsEccOwners;
  56668. + uint32_t extraFifoPoolSize;
  56669. + uint8_t extraTasksPoolSize;
  56670. + uint8_t extraOpenDmasPoolSize;
  56671. +#if defined(FM_MAX_NUM_OF_10G_MACS) && (FM_MAX_NUM_OF_10G_MACS)
  56672. + uint16_t portMaxFrameLengths10G[FM_MAX_NUM_OF_10G_MACS];
  56673. + uint16_t macMaxFrameLengths10G[FM_MAX_NUM_OF_10G_MACS];
  56674. +#endif /* defined(FM_MAX_NUM_OF_10G_MACS) && ... */
  56675. + uint16_t portMaxFrameLengths1G[FM_MAX_NUM_OF_1G_MACS];
  56676. + uint16_t macMaxFrameLengths1G[FM_MAX_NUM_OF_1G_MACS];
  56677. +} t_FmStateStruct;
  56678. +
  56679. +#if (DPAA_VERSION >= 11)
  56680. +typedef struct t_FmMapParam {
  56681. + uint16_t profilesBase;
  56682. + uint16_t numOfProfiles;
  56683. + t_Handle h_FmPort;
  56684. +} t_FmMapParam;
  56685. +
  56686. +typedef struct t_FmAllocMng {
  56687. + bool allocated;
  56688. + uint8_t ownerId; /* guestId for KG in multi-partition only,
  56689. + portId for PLCR in any environment */
  56690. +} t_FmAllocMng;
  56691. +
  56692. +typedef struct t_FmPcdSpEntry {
  56693. + bool valid;
  56694. + t_FmAllocMng profilesMng;
  56695. +} t_FmPcdSpEntry;
  56696. +
  56697. +typedef struct t_FmSp {
  56698. + void *p_FmPcdStoragePrflRegs;
  56699. + t_FmPcdSpEntry profiles[FM_VSP_MAX_NUM_OF_ENTRIES];
  56700. + t_FmMapParam portsMapping[FM_MAX_NUM_OF_PORTS];
  56701. +} t_FmSp;
  56702. +#endif /* (DPAA_VERSION >= 11) */
  56703. +
  56704. +typedef struct t_Fm
  56705. +{
  56706. +/***************************/
  56707. +/* Master/Guest parameters */
  56708. +/***************************/
  56709. +/* locals for recovery */
  56710. + uintptr_t baseAddr;
  56711. +
  56712. +/* un-needed for recovery */
  56713. + t_Handle h_Pcd;
  56714. + char fmModuleName[MODULE_NAME_SIZE];
  56715. + char fmIpcHandlerModuleName[FM_MAX_NUM_OF_GUESTS][MODULE_NAME_SIZE];
  56716. + t_Handle h_IpcSessions[FM_MAX_NUM_OF_GUESTS];
  56717. + t_FmIntrSrc intrMng[e_FM_EV_DUMMY_LAST]; /* FM exceptions user callback */
  56718. + uint8_t guestId;
  56719. +/**************************/
  56720. +/* Master Only parameters */
  56721. +/**************************/
  56722. +/* locals for recovery */
  56723. + struct fman_fpm_regs *p_FmFpmRegs;
  56724. + struct fman_bmi_regs *p_FmBmiRegs;
  56725. + struct fman_qmi_regs *p_FmQmiRegs;
  56726. + struct fman_dma_regs *p_FmDmaRegs;
  56727. + struct fman_regs *p_FmRegs;
  56728. + t_FmExceptionsCallback *f_Exception;
  56729. + t_FmBusErrorCallback *f_BusError;
  56730. + t_Handle h_App; /* Application handle */
  56731. + t_Handle h_Spinlock;
  56732. + bool recoveryMode;
  56733. + t_FmStateStruct *p_FmStateStruct;
  56734. + uint16_t tnumAgingPeriod;
  56735. +#if (DPAA_VERSION >= 11)
  56736. + t_FmSp *p_FmSp;
  56737. + uint8_t partNumOfVSPs;
  56738. + uint8_t partVSPBase;
  56739. + uintptr_t vspBaseAddr;
  56740. +#endif /* (DPAA_VERSION >= 11) */
  56741. + bool portsPreFetchConfigured[FM_MAX_NUM_OF_HW_PORT_IDS]; /* Prefetch configration per Tx-port */
  56742. + bool portsPreFetchValue[FM_MAX_NUM_OF_HW_PORT_IDS]; /* Prefetch configration per Tx-port */
  56743. +
  56744. +/* un-needed for recovery */
  56745. + struct fman_cfg *p_FmDriverParam;
  56746. + t_Handle h_FmMuram;
  56747. + uint64_t fmMuramPhysBaseAddr;
  56748. + bool independentMode;
  56749. + bool hcPortInitialized;
  56750. + uintptr_t camBaseAddr; /* save for freeing */
  56751. + uintptr_t resAddr;
  56752. + uintptr_t fifoBaseAddr; /* save for freeing */
  56753. + t_FmanCtrlIntrSrc fmanCtrlIntr[FM_NUM_OF_FMAN_CTRL_EVENT_REGS]; /* FM exceptions user callback */
  56754. + bool usedEventRegs[FM_NUM_OF_FMAN_CTRL_EVENT_REGS];
  56755. + t_FmFirmwareParams firmware;
  56756. + bool fwVerify;
  56757. + bool resetOnInit;
  56758. + uint32_t userSetExceptions;
  56759. +} t_Fm;
  56760. +
  56761. +
  56762. +#endif /* __FM_H */
  56763. --- /dev/null
  56764. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_ipc.h
  56765. @@ -0,0 +1,465 @@
  56766. +/*
  56767. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  56768. + *
  56769. + * Redistribution and use in source and binary forms, with or without
  56770. + * modification, are permitted provided that the following conditions are met:
  56771. + * * Redistributions of source code must retain the above copyright
  56772. + * notice, this list of conditions and the following disclaimer.
  56773. + * * Redistributions in binary form must reproduce the above copyright
  56774. + * notice, this list of conditions and the following disclaimer in the
  56775. + * documentation and/or other materials provided with the distribution.
  56776. + * * Neither the name of Freescale Semiconductor nor the
  56777. + * names of its contributors may be used to endorse or promote products
  56778. + * derived from this software without specific prior written permission.
  56779. + *
  56780. + *
  56781. + * ALTERNATIVELY, this software may be distributed under the terms of the
  56782. + * GNU General Public License ("GPL") as published by the Free Software
  56783. + * Foundation, either version 2 of that License or (at your option) any
  56784. + * later version.
  56785. + *
  56786. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  56787. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  56788. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  56789. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  56790. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  56791. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  56792. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  56793. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  56794. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  56795. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  56796. + */
  56797. +
  56798. +
  56799. +/**************************************************************************//**
  56800. + @File fm_ipc.h
  56801. +
  56802. + @Description FM Inter-Partition prototypes, structures and definitions.
  56803. +*//***************************************************************************/
  56804. +#ifndef __FM_IPC_H
  56805. +#define __FM_IPC_H
  56806. +
  56807. +#include "error_ext.h"
  56808. +#include "std_ext.h"
  56809. +
  56810. +
  56811. +/**************************************************************************//**
  56812. + @Group FM_grp Frame Manager API
  56813. +
  56814. + @Description FM API functions, definitions and enums
  56815. +
  56816. + @{
  56817. +*//***************************************************************************/
  56818. +
  56819. +/**************************************************************************//**
  56820. + @Group FM_IPC_grp FM Inter-Partition messaging Unit
  56821. +
  56822. + @Description FM Inter-Partition messaging unit API definitions and enums.
  56823. +
  56824. + @{
  56825. +*//***************************************************************************/
  56826. +
  56827. +#if defined(__MWERKS__) && !defined(__GNUC__)
  56828. +#pragma pack(push,1)
  56829. +#endif /* defined(__MWERKS__) && ... */
  56830. +
  56831. +/**************************************************************************//**
  56832. + @Description enum for defining MAC types
  56833. +*//***************************************************************************/
  56834. +
  56835. +/**************************************************************************//**
  56836. + @Description A structure of parameters for specifying a MAC.
  56837. +*//***************************************************************************/
  56838. +typedef _Packed struct
  56839. +{
  56840. + uint8_t id;
  56841. + uint32_t enumType;
  56842. +} _PackedType t_FmIpcMacParams;
  56843. +
  56844. +/**************************************************************************//**
  56845. + @Description A structure of parameters for specifying a MAC.
  56846. +*//***************************************************************************/
  56847. +typedef _Packed struct
  56848. +{
  56849. + t_FmIpcMacParams macParams;
  56850. + uint16_t maxFrameLength;
  56851. +} _PackedType t_FmIpcMacMaxFrameParams;
  56852. +
  56853. +/**************************************************************************//**
  56854. + @Description FM physical Address
  56855. +*//***************************************************************************/
  56856. +typedef _Packed struct t_FmIpcPhysAddr
  56857. +{
  56858. + volatile uint8_t high;
  56859. + volatile uint32_t low;
  56860. +} _PackedType t_FmIpcPhysAddr;
  56861. +
  56862. +
  56863. +typedef _Packed struct t_FmIpcPortOutInitParams {
  56864. + uint8_t numOfTasks; /**< OUT */
  56865. + uint8_t numOfExtraTasks; /**< OUT */
  56866. + uint8_t numOfOpenDmas; /**< OUT */
  56867. + uint8_t numOfExtraOpenDmas; /**< OUT */
  56868. + uint32_t sizeOfFifo; /**< OUT */
  56869. + uint32_t extraSizeOfFifo; /**< OUT */
  56870. + t_FmIpcPhysAddr ipcPhysAddr; /**< OUT */
  56871. +} _PackedType t_FmIpcPortOutInitParams;
  56872. +
  56873. +/**************************************************************************//**
  56874. + @Description Structure for IPC communication during FM_PORT_Init.
  56875. +*//***************************************************************************/
  56876. +typedef _Packed struct t_FmIpcPortInInitParams {
  56877. + uint8_t hardwarePortId; /**< IN. port Id */
  56878. + uint32_t enumPortType; /**< IN. Port type */
  56879. + uint8_t boolIndependentMode;/**< IN. TRUE if FM Port operates in independent mode */
  56880. + uint16_t liodnOffset; /**< IN. Port's requested resource */
  56881. + uint8_t numOfTasks; /**< IN. Port's requested resource */
  56882. + uint8_t numOfExtraTasks; /**< IN. Port's requested resource */
  56883. + uint8_t numOfOpenDmas; /**< IN. Port's requested resource */
  56884. + uint8_t numOfExtraOpenDmas; /**< IN. Port's requested resource */
  56885. + uint32_t sizeOfFifo; /**< IN. Port's requested resource */
  56886. + uint32_t extraSizeOfFifo; /**< IN. Port's requested resource */
  56887. + uint8_t deqPipelineDepth; /**< IN. Port's requested resource */
  56888. + uint16_t maxFrameLength; /**< IN. Port's max frame length. */
  56889. + uint16_t liodnBase; /**< IN. Irrelevant for P4080 rev 1.
  56890. + LIODN base for this port, to be
  56891. + used together with LIODN offset. */
  56892. +} _PackedType t_FmIpcPortInInitParams;
  56893. +
  56894. +
  56895. +/**************************************************************************//**
  56896. + @Description Structure for IPC communication between port and FM
  56897. + regarding tasks and open DMA resources management.
  56898. +*//***************************************************************************/
  56899. +typedef _Packed struct t_FmIpcPortRsrcParams {
  56900. + uint8_t hardwarePortId; /**< IN. port Id */
  56901. + uint32_t val; /**< IN. Port's requested resource */
  56902. + uint32_t extra; /**< IN. Port's requested resource */
  56903. + uint8_t boolInitialConfig;
  56904. +} _PackedType t_FmIpcPortRsrcParams;
  56905. +
  56906. +
  56907. +/**************************************************************************//**
  56908. + @Description Structure for IPC communication between port and FM
  56909. + regarding tasks and open DMA resources management.
  56910. +*//***************************************************************************/
  56911. +typedef _Packed struct t_FmIpcPortFifoParams {
  56912. + t_FmIpcPortRsrcParams rsrcParams;
  56913. + uint32_t enumPortType;
  56914. + uint8_t boolIndependentMode;
  56915. + uint8_t deqPipelineDepth;
  56916. + uint8_t numOfPools;
  56917. + uint16_t secondLargestBufSize;
  56918. + uint16_t largestBufSize;
  56919. + uint8_t boolInitialConfig;
  56920. +} _PackedType t_FmIpcPortFifoParams;
  56921. +
  56922. +/**************************************************************************//**
  56923. + @Description Structure for port-FM communication during FM_PORT_Free.
  56924. +*//***************************************************************************/
  56925. +typedef _Packed struct t_FmIpcPortFreeParams {
  56926. + uint8_t hardwarePortId; /**< IN. port Id */
  56927. + uint32_t enumPortType; /**< IN. Port type */
  56928. + uint8_t deqPipelineDepth; /**< IN. Port's requested resource */
  56929. +} _PackedType t_FmIpcPortFreeParams;
  56930. +
  56931. +/**************************************************************************//**
  56932. + @Description Structure for defining DMA status
  56933. +*//***************************************************************************/
  56934. +typedef _Packed struct t_FmIpcDmaStatus {
  56935. + uint8_t boolCmqNotEmpty; /**< Command queue is not empty */
  56936. + uint8_t boolBusError; /**< Bus error occurred */
  56937. + uint8_t boolReadBufEccError; /**< Double ECC error on buffer Read */
  56938. + uint8_t boolWriteBufEccSysError; /**< Double ECC error on buffer write from system side */
  56939. + uint8_t boolWriteBufEccFmError; /**< Double ECC error on buffer write from FM side */
  56940. + uint8_t boolSinglePortEccError; /**< Single port ECC error from FM side */
  56941. +} _PackedType t_FmIpcDmaStatus;
  56942. +
  56943. +typedef _Packed struct t_FmIpcRegisterIntr
  56944. +{
  56945. + uint8_t guestId; /* IN */
  56946. + uint32_t event; /* IN */
  56947. +} _PackedType t_FmIpcRegisterIntr;
  56948. +
  56949. +typedef _Packed struct t_FmIpcIsr
  56950. +{
  56951. + uint8_t boolErr; /* IN */
  56952. + uint32_t pendingReg; /* IN */
  56953. +} _PackedType t_FmIpcIsr;
  56954. +
  56955. +/**************************************************************************//**
  56956. + @Description structure for returning FM parameters
  56957. +*//***************************************************************************/
  56958. +typedef _Packed struct t_FmIpcParams {
  56959. + uint16_t fmClkFreq; /**< OUT: FM Clock frequency */
  56960. + uint16_t fmMacClkFreq; /**< OUT: FM MAC clock frequence */
  56961. + uint8_t majorRev; /**< OUT: FM Major revision */
  56962. + uint8_t minorRev; /**< OUT: FM Minor revision */
  56963. +} _PackedType t_FmIpcParams;
  56964. +
  56965. +
  56966. +/**************************************************************************//**
  56967. + @Description structure for returning Fman Ctrl Code revision information
  56968. +*//***************************************************************************/
  56969. +typedef _Packed struct t_FmIpcFmanCtrlCodeRevisionInfo {
  56970. + uint16_t packageRev; /**< OUT: Package revision */
  56971. + uint8_t majorRev; /**< OUT: Major revision */
  56972. + uint8_t minorRev; /**< OUT: Minor revision */
  56973. +} _PackedType t_FmIpcFmanCtrlCodeRevisionInfo;
  56974. +
  56975. +/**************************************************************************//**
  56976. + @Description Structure for defining Fm number of Fman controlers
  56977. +*//***************************************************************************/
  56978. +typedef _Packed struct t_FmIpcPortNumOfFmanCtrls {
  56979. + uint8_t hardwarePortId; /**< IN. port Id */
  56980. + uint8_t numOfFmanCtrls; /**< IN. Port type */
  56981. + t_FmFmanCtrl orFmanCtrl; /**< IN. fman controller for order restoration*/
  56982. +} t_FmIpcPortNumOfFmanCtrls;
  56983. +
  56984. +/**************************************************************************//**
  56985. + @Description structure for setting Fman contriller events
  56986. +*//***************************************************************************/
  56987. +typedef _Packed struct t_FmIpcFmanEvents {
  56988. + uint8_t eventRegId; /**< IN: Fman controller event register id */
  56989. + uint32_t enableEvents; /**< IN/OUT: required enabled events mask */
  56990. +} _PackedType t_FmIpcFmanEvents;
  56991. +
  56992. +typedef _Packed struct t_FmIpcResourceAllocParams {
  56993. + uint8_t guestId;
  56994. + uint16_t base;
  56995. + uint16_t num;
  56996. +}_PackedType t_FmIpcResourceAllocParams;
  56997. +
  56998. +typedef _Packed struct t_FmIpcVspSetPortWindow {
  56999. + uint8_t hardwarePortId;
  57000. + uint8_t baseStorageProfile;
  57001. + uint8_t log2NumOfProfiles;
  57002. +}_PackedType t_FmIpcVspSetPortWindow;
  57003. +
  57004. +typedef _Packed struct t_FmIpcSetCongestionGroupPfcPriority {
  57005. + uint32_t congestionGroupId;
  57006. + uint8_t priorityBitMap;
  57007. +}_PackedType t_FmIpcSetCongestionGroupPfcPriority;
  57008. +
  57009. +#define FM_IPC_MAX_REPLY_BODY_SIZE 20
  57010. +#define FM_IPC_MAX_REPLY_SIZE (FM_IPC_MAX_REPLY_BODY_SIZE + sizeof(uint32_t))
  57011. +#define FM_IPC_MAX_MSG_SIZE 30
  57012. +
  57013. +typedef _Packed struct t_FmIpcMsg
  57014. +{
  57015. + uint32_t msgId;
  57016. + uint8_t msgBody[FM_IPC_MAX_MSG_SIZE];
  57017. +} _PackedType t_FmIpcMsg;
  57018. +
  57019. +typedef _Packed struct t_FmIpcReply
  57020. +{
  57021. + uint32_t error;
  57022. + uint8_t replyBody[FM_IPC_MAX_REPLY_BODY_SIZE];
  57023. +} _PackedType t_FmIpcReply;
  57024. +
  57025. +#if defined(__MWERKS__) && !defined(__GNUC__)
  57026. +#pragma pack(pop)
  57027. +#endif /* defined(__MWERKS__) && ... */
  57028. +
  57029. +
  57030. +/***************************************************************************/
  57031. +/************************ FRONT-END-TO-BACK-END*****************************/
  57032. +/***************************************************************************/
  57033. +
  57034. +/**************************************************************************//**
  57035. + @Function FM_GET_TIMESTAMP_SCALE
  57036. +
  57037. + @Description Used by FM front-end.
  57038. +
  57039. + @Param[out] uint32_t Pointer
  57040. +*//***************************************************************************/
  57041. +#define FM_GET_TIMESTAMP_SCALE 1
  57042. +
  57043. +/**************************************************************************//**
  57044. + @Function FM_GET_COUNTER
  57045. +
  57046. + @Description Used by FM front-end.
  57047. +
  57048. + @Param[in/out] t_FmIpcGetCounter Pointer
  57049. +*//***************************************************************************/
  57050. +#define FM_GET_COUNTER 2
  57051. +
  57052. +/**************************************************************************//**
  57053. + @Function FM_GET_SET_PORT_PARAMS
  57054. +
  57055. + @Description Used by FM front-end for the PORT module in order to set and get
  57056. + parameters in/from master FM module on FM PORT initialization time.
  57057. +
  57058. + @Param[in/out] t_FmIcPortInitParams Pointer
  57059. +*//***************************************************************************/
  57060. +#define FM_GET_SET_PORT_PARAMS 4
  57061. +
  57062. +/**************************************************************************//**
  57063. + @Function FM_FREE_PORT
  57064. +
  57065. + @Description Used by FM front-end for the PORT module when a port is freed
  57066. + to free all FM PORT resources.
  57067. +
  57068. + @Param[in] uint8_t Pointer
  57069. +*//***************************************************************************/
  57070. +#define FM_FREE_PORT 5
  57071. +
  57072. +/**************************************************************************//**
  57073. + @Function FM_RESET_MAC
  57074. +
  57075. + @Description Used by front-end for the MAC module to reset the MAC registers
  57076. +
  57077. + @Param[in] t_FmIpcMacParams Pointer .
  57078. +*//***************************************************************************/
  57079. +#define FM_RESET_MAC 6
  57080. +
  57081. +/**************************************************************************//**
  57082. + @Function FM_RESUME_STALLED_PORT
  57083. +
  57084. + @Description Used by FM front-end for the PORT module in order to
  57085. + release a stalled FM Port.
  57086. +
  57087. + @Param[in] uint8_t Pointer
  57088. +*//***************************************************************************/
  57089. +#define FM_RESUME_STALLED_PORT 7
  57090. +
  57091. +/**************************************************************************//**
  57092. + @Function FM_IS_PORT_STALLED
  57093. +
  57094. + @Description Used by FM front-end for the PORT module in order to check whether
  57095. + an FM port is stalled.
  57096. +
  57097. + @Param[in/out] t_FmIcPortIsStalled Pointer
  57098. +*//***************************************************************************/
  57099. +#define FM_IS_PORT_STALLED 8
  57100. +
  57101. +/**************************************************************************//**
  57102. + @Function FM_GET_PARAMS
  57103. +
  57104. + @Description Used by FM front-end for the PORT module in order to dump
  57105. + return FM parameters.
  57106. +
  57107. + @Param[in] uint8_t Pointer
  57108. +*//***************************************************************************/
  57109. +#define FM_GET_PARAMS 10
  57110. +
  57111. +/**************************************************************************//**
  57112. + @Function FM_REGISTER_INTR
  57113. +
  57114. + @Description Used by FM front-end to register an interrupt handler to
  57115. + be called upon interrupt for guest.
  57116. +
  57117. + @Param[out] t_FmIpcRegisterIntr Pointer
  57118. +*//***************************************************************************/
  57119. +#define FM_REGISTER_INTR 11
  57120. +
  57121. +/**************************************************************************//**
  57122. + @Function FM_DMA_STAT
  57123. +
  57124. + @Description Used by FM front-end to read the FM DMA status.
  57125. +
  57126. + @Param[out] t_FmIpcDmaStatus Pointer
  57127. +*//***************************************************************************/
  57128. +#define FM_DMA_STAT 13
  57129. +
  57130. +/**************************************************************************//**
  57131. + @Function FM_ALLOC_FMAN_CTRL_EVENT_REG
  57132. +
  57133. + @Description Used by FM front-end to allocate event register.
  57134. +
  57135. + @Param[out] Event register id Pointer
  57136. +*//***************************************************************************/
  57137. +#define FM_ALLOC_FMAN_CTRL_EVENT_REG 14
  57138. +
  57139. +/**************************************************************************//**
  57140. + @Function FM_FREE_FMAN_CTRL_EVENT_REG
  57141. +
  57142. + @Description Used by FM front-end to free locate event register.
  57143. +
  57144. + @Param[in] uint8_t Pointer - Event register id
  57145. +*//***************************************************************************/
  57146. +#define FM_FREE_FMAN_CTRL_EVENT_REG 15
  57147. +
  57148. +/**************************************************************************//**
  57149. + @Function FM_SET_FMAN_CTRL_EVENTS_ENABLE
  57150. +
  57151. + @Description Used by FM front-end to enable events in the FPM
  57152. + Fman controller event register.
  57153. +
  57154. + @Param[in] t_FmIpcFmanEvents Pointer
  57155. +*//***************************************************************************/
  57156. +#define FM_SET_FMAN_CTRL_EVENTS_ENABLE 16
  57157. +
  57158. +/**************************************************************************//**
  57159. + @Function FM_SET_FMAN_CTRL_EVENTS_ENABLE
  57160. +
  57161. + @Description Used by FM front-end to enable events in the FPM
  57162. + Fman controller event register.
  57163. +
  57164. + @Param[in/out] t_FmIpcFmanEvents Pointer
  57165. +*//***************************************************************************/
  57166. +#define FM_GET_FMAN_CTRL_EVENTS_ENABLE 17
  57167. +
  57168. +/**************************************************************************//**
  57169. + @Function FM_SET_MAC_MAX_FRAME
  57170. +
  57171. + @Description Used by FM front-end to set MAC's MTU/RTU's in
  57172. + back-end.
  57173. +
  57174. + @Param[in/out] t_FmIpcMacMaxFrameParams Pointer
  57175. +*//***************************************************************************/
  57176. +#define FM_SET_MAC_MAX_FRAME 18
  57177. +
  57178. +/**************************************************************************//**
  57179. + @Function FM_GET_PHYS_MURAM_BASE
  57180. +
  57181. + @Description Used by FM front-end in order to get MURAM base address
  57182. +
  57183. + @Param[in/out] t_FmIpcPhysAddr Pointer
  57184. +*//***************************************************************************/
  57185. +#define FM_GET_PHYS_MURAM_BASE 19
  57186. +
  57187. +/**************************************************************************//**
  57188. + @Function FM_MASTER_IS_ALIVE
  57189. +
  57190. + @Description Used by FM front-end in order to verify Master is up
  57191. +
  57192. + @Param[in/out] bool
  57193. +*//***************************************************************************/
  57194. +#define FM_MASTER_IS_ALIVE 20
  57195. +
  57196. +#define FM_ENABLE_RAM_ECC 21
  57197. +#define FM_DISABLE_RAM_ECC 22
  57198. +#define FM_SET_NUM_OF_FMAN_CTRL 23
  57199. +#define FM_SET_SIZE_OF_FIFO 24
  57200. +#define FM_SET_NUM_OF_TASKS 25
  57201. +#define FM_SET_NUM_OF_OPEN_DMAS 26
  57202. +#define FM_VSP_ALLOC 27
  57203. +#define FM_VSP_FREE 28
  57204. +#define FM_VSP_SET_PORT_WINDOW 29
  57205. +#define FM_GET_FMAN_CTRL_CODE_REV 30
  57206. +#define FM_SET_CONG_GRP_PFC_PRIO 31
  57207. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  57208. +#define FM_10G_TX_ECC_WA 100
  57209. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  57210. +
  57211. +/***************************************************************************/
  57212. +/************************ BACK-END-TO-FRONT-END*****************************/
  57213. +/***************************************************************************/
  57214. +
  57215. +/**************************************************************************//**
  57216. + @Function FM_GUEST_ISR
  57217. +
  57218. + @Description Used by FM back-end to report an interrupt to the front-end.
  57219. +
  57220. + @Param[out] t_FmIpcIsr Pointer
  57221. +*//***************************************************************************/
  57222. +#define FM_GUEST_ISR 1
  57223. +
  57224. +
  57225. +
  57226. +/** @} */ /* end of FM_IPC_grp group */
  57227. +/** @} */ /* end of FM_grp group */
  57228. +
  57229. +
  57230. +#endif /* __FM_IPC_H */
  57231. --- /dev/null
  57232. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm_muram.c
  57233. @@ -0,0 +1,174 @@
  57234. +/*
  57235. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  57236. + *
  57237. + * Redistribution and use in source and binary forms, with or without
  57238. + * modification, are permitted provided that the following conditions are met:
  57239. + * * Redistributions of source code must retain the above copyright
  57240. + * notice, this list of conditions and the following disclaimer.
  57241. + * * Redistributions in binary form must reproduce the above copyright
  57242. + * notice, this list of conditions and the following disclaimer in the
  57243. + * documentation and/or other materials provided with the distribution.
  57244. + * * Neither the name of Freescale Semiconductor nor the
  57245. + * names of its contributors may be used to endorse or promote products
  57246. + * derived from this software without specific prior written permission.
  57247. + *
  57248. + *
  57249. + * ALTERNATIVELY, this software may be distributed under the terms of the
  57250. + * GNU General Public License ("GPL") as published by the Free Software
  57251. + * Foundation, either version 2 of that License or (at your option) any
  57252. + * later version.
  57253. + *
  57254. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  57255. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  57256. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  57257. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  57258. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  57259. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  57260. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  57261. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  57262. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  57263. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  57264. + */
  57265. +
  57266. +
  57267. +/******************************************************************************
  57268. + @File FM_muram.c
  57269. +
  57270. + @Description FM MURAM ...
  57271. +*//***************************************************************************/
  57272. +#include "error_ext.h"
  57273. +#include "std_ext.h"
  57274. +#include "mm_ext.h"
  57275. +#include "string_ext.h"
  57276. +#include "sprint_ext.h"
  57277. +#include "fm_muram_ext.h"
  57278. +#include "fm_common.h"
  57279. +
  57280. +#define __ERR_MODULE__ MODULE_FM_MURAM
  57281. +
  57282. +
  57283. +typedef struct
  57284. +{
  57285. + t_Handle h_Mem;
  57286. + uintptr_t baseAddr;
  57287. + uint32_t size;
  57288. +} t_FmMuram;
  57289. +
  57290. +
  57291. +void FmMuramClear(t_Handle h_FmMuram)
  57292. +{
  57293. + t_FmMuram *p_FmMuram = ( t_FmMuram *)h_FmMuram;
  57294. +
  57295. + SANITY_CHECK_RETURN(h_FmMuram, E_INVALID_HANDLE);
  57296. + IOMemSet32(UINT_TO_PTR(p_FmMuram->baseAddr), 0, p_FmMuram->size);
  57297. +}
  57298. +
  57299. +
  57300. +t_Handle FM_MURAM_ConfigAndInit(uintptr_t baseAddress, uint32_t size)
  57301. +{
  57302. + t_Handle h_Mem;
  57303. + t_FmMuram *p_FmMuram;
  57304. +
  57305. + if (!baseAddress)
  57306. + {
  57307. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("baseAddress 0 is not supported"));
  57308. + return NULL;
  57309. + }
  57310. +
  57311. + if (baseAddress%4)
  57312. + {
  57313. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("baseAddress not 4 bytes aligned!"));
  57314. + return NULL;
  57315. + }
  57316. +
  57317. + /* Allocate FM MURAM structure */
  57318. + p_FmMuram = (t_FmMuram *) XX_Malloc(sizeof(t_FmMuram));
  57319. + if (!p_FmMuram)
  57320. + {
  57321. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM MURAM driver structure"));
  57322. + return NULL;
  57323. + }
  57324. + memset(p_FmMuram, 0, sizeof(t_FmMuram));
  57325. +
  57326. +
  57327. + if ((MM_Init(&h_Mem, baseAddress, size) != E_OK) || (!h_Mem))
  57328. + {
  57329. + XX_Free(p_FmMuram);
  57330. + REPORT_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-MURAM partition!!!"));
  57331. + return NULL;
  57332. + }
  57333. +
  57334. + /* Initialize FM MURAM parameters which will be kept by the driver */
  57335. + p_FmMuram->baseAddr = baseAddress;
  57336. + p_FmMuram->size = size;
  57337. + p_FmMuram->h_Mem = h_Mem;
  57338. +
  57339. + return p_FmMuram;
  57340. +}
  57341. +
  57342. +t_Error FM_MURAM_Free(t_Handle h_FmMuram)
  57343. +{
  57344. + t_FmMuram *p_FmMuram = ( t_FmMuram *)h_FmMuram;
  57345. +
  57346. + if (p_FmMuram->h_Mem)
  57347. + MM_Free(p_FmMuram->h_Mem);
  57348. +
  57349. + XX_Free(h_FmMuram);
  57350. +
  57351. + return E_OK;
  57352. +}
  57353. +
  57354. +void * FM_MURAM_AllocMem(t_Handle h_FmMuram, uint32_t size, uint32_t align)
  57355. +{
  57356. + t_FmMuram *p_FmMuram = ( t_FmMuram *)h_FmMuram;
  57357. + uintptr_t addr;
  57358. +
  57359. + SANITY_CHECK_RETURN_VALUE(h_FmMuram, E_INVALID_HANDLE, NULL);
  57360. + SANITY_CHECK_RETURN_VALUE(p_FmMuram->h_Mem, E_INVALID_HANDLE, NULL);
  57361. +
  57362. + addr = (uintptr_t)MM_Get(p_FmMuram->h_Mem, size, align ,"FM MURAM");
  57363. +
  57364. + if (addr == ILLEGAL_BASE)
  57365. + return NULL;
  57366. +
  57367. + return UINT_TO_PTR(addr);
  57368. +}
  57369. +
  57370. +void * FM_MURAM_AllocMemForce(t_Handle h_FmMuram, uint64_t base, uint32_t size)
  57371. +{
  57372. + t_FmMuram *p_FmMuram = ( t_FmMuram *)h_FmMuram;
  57373. + uintptr_t addr;
  57374. +
  57375. + SANITY_CHECK_RETURN_VALUE(h_FmMuram, E_INVALID_HANDLE, NULL);
  57376. + SANITY_CHECK_RETURN_VALUE(p_FmMuram->h_Mem, E_INVALID_HANDLE, NULL);
  57377. +
  57378. + addr = (uintptr_t)MM_GetForce(p_FmMuram->h_Mem, base, size, "FM MURAM");
  57379. +
  57380. + if (addr == ILLEGAL_BASE)
  57381. + return NULL;
  57382. +
  57383. + return UINT_TO_PTR(addr);
  57384. +}
  57385. +
  57386. +t_Error FM_MURAM_FreeMem(t_Handle h_FmMuram, void *ptr)
  57387. +{
  57388. + t_FmMuram *p_FmMuram = ( t_FmMuram *)h_FmMuram;
  57389. +
  57390. + SANITY_CHECK_RETURN_ERROR(h_FmMuram, E_INVALID_HANDLE);
  57391. + SANITY_CHECK_RETURN_ERROR(p_FmMuram->h_Mem, E_INVALID_HANDLE);
  57392. +
  57393. + if (MM_Put(p_FmMuram->h_Mem, PTR_TO_UINT(ptr)) == 0)
  57394. + RETURN_ERROR(MINOR, E_INVALID_ADDRESS, ("memory pointer!!!"));
  57395. +
  57396. + return E_OK;
  57397. +}
  57398. +
  57399. +uint64_t FM_MURAM_GetFreeMemSize(t_Handle h_FmMuram)
  57400. +{
  57401. + t_FmMuram *p_FmMuram = ( t_FmMuram *)h_FmMuram;
  57402. +
  57403. + SANITY_CHECK_RETURN_VALUE(h_FmMuram, E_INVALID_HANDLE, 0);
  57404. + SANITY_CHECK_RETURN_VALUE(p_FmMuram->h_Mem, E_INVALID_HANDLE, 0);
  57405. +
  57406. + return MM_GetFreeMemSize(p_FmMuram->h_Mem);
  57407. +}
  57408. --- /dev/null
  57409. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fman.c
  57410. @@ -0,0 +1,1399 @@
  57411. +/*
  57412. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  57413. + *
  57414. + * Redistribution and use in source and binary forms, with or without
  57415. + * modification, are permitted provided that the following conditions are met:
  57416. + * * Redistributions of source code must retain the above copyright
  57417. + * notice, this list of conditions and the following disclaimer.
  57418. + * * Redistributions in binary form must reproduce the above copyright
  57419. + * notice, this list of conditions and the following disclaimer in the
  57420. + * documentation and/or other materials provided with the distribution.
  57421. + * * Neither the name of Freescale Semiconductor nor the
  57422. + * names of its contributors may be used to endorse or promote products
  57423. + * derived from this software without specific prior written permission.
  57424. + *
  57425. + *
  57426. + * ALTERNATIVELY, this software may be distributed under the terms of the
  57427. + * GNU General Public License ("GPL") as published by the Free Software
  57428. + * Foundation, either version 2 of that License or (at your option) any
  57429. + * later version.
  57430. + *
  57431. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  57432. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  57433. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  57434. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  57435. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  57436. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  57437. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  57438. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  57439. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  57440. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  57441. + */
  57442. +
  57443. +
  57444. +
  57445. +#include "fsl_fman.h"
  57446. +#include "dpaa_integration_ext.h"
  57447. +
  57448. +uint32_t fman_get_bmi_err_event(struct fman_bmi_regs *bmi_rg)
  57449. +{
  57450. + uint32_t event, mask, force;
  57451. +
  57452. + event = ioread32be(&bmi_rg->fmbm_ievr);
  57453. + mask = ioread32be(&bmi_rg->fmbm_ier);
  57454. + event &= mask;
  57455. + /* clear the forced events */
  57456. + force = ioread32be(&bmi_rg->fmbm_ifr);
  57457. + if (force & event)
  57458. + iowrite32be(force & ~event, &bmi_rg->fmbm_ifr);
  57459. + /* clear the acknowledged events */
  57460. + iowrite32be(event, &bmi_rg->fmbm_ievr);
  57461. + return event;
  57462. +}
  57463. +
  57464. +uint32_t fman_get_qmi_err_event(struct fman_qmi_regs *qmi_rg)
  57465. +{
  57466. + uint32_t event, mask, force;
  57467. +
  57468. + event = ioread32be(&qmi_rg->fmqm_eie);
  57469. + mask = ioread32be(&qmi_rg->fmqm_eien);
  57470. + event &= mask;
  57471. +
  57472. + /* clear the forced events */
  57473. + force = ioread32be(&qmi_rg->fmqm_eif);
  57474. + if (force & event)
  57475. + iowrite32be(force & ~event, &qmi_rg->fmqm_eif);
  57476. + /* clear the acknowledged events */
  57477. + iowrite32be(event, &qmi_rg->fmqm_eie);
  57478. + return event;
  57479. +}
  57480. +
  57481. +uint32_t fman_get_dma_com_id(struct fman_dma_regs *dma_rg)
  57482. +{
  57483. + return ioread32be(&dma_rg->fmdmtcid);
  57484. +}
  57485. +
  57486. +uint64_t fman_get_dma_addr(struct fman_dma_regs *dma_rg)
  57487. +{
  57488. + uint64_t addr;
  57489. +
  57490. + addr = (uint64_t)ioread32be(&dma_rg->fmdmtal);
  57491. + addr |= ((uint64_t)(ioread32be(&dma_rg->fmdmtah)) << 32);
  57492. +
  57493. + return addr;
  57494. +}
  57495. +
  57496. +uint32_t fman_get_dma_err_event(struct fman_dma_regs *dma_rg)
  57497. +{
  57498. + uint32_t status, mask;
  57499. +
  57500. + status = ioread32be(&dma_rg->fmdmsr);
  57501. + mask = ioread32be(&dma_rg->fmdmmr);
  57502. +
  57503. + /* clear DMA_STATUS_BUS_ERR if mask has no DMA_MODE_BER */
  57504. + if ((mask & DMA_MODE_BER) != DMA_MODE_BER)
  57505. + status &= ~DMA_STATUS_BUS_ERR;
  57506. +
  57507. + /* clear relevant bits if mask has no DMA_MODE_ECC */
  57508. + if ((mask & DMA_MODE_ECC) != DMA_MODE_ECC)
  57509. + status &= ~(DMA_STATUS_FM_SPDAT_ECC |
  57510. + DMA_STATUS_READ_ECC |
  57511. + DMA_STATUS_SYSTEM_WRITE_ECC |
  57512. + DMA_STATUS_FM_WRITE_ECC);
  57513. +
  57514. + /* clear set events */
  57515. + iowrite32be(status, &dma_rg->fmdmsr);
  57516. +
  57517. + return status;
  57518. +}
  57519. +
  57520. +uint32_t fman_get_fpm_err_event(struct fman_fpm_regs *fpm_rg)
  57521. +{
  57522. + uint32_t event;
  57523. +
  57524. + event = ioread32be(&fpm_rg->fmfp_ee);
  57525. + /* clear the all occurred events */
  57526. + iowrite32be(event, &fpm_rg->fmfp_ee);
  57527. + return event;
  57528. +}
  57529. +
  57530. +uint32_t fman_get_muram_err_event(struct fman_fpm_regs *fpm_rg)
  57531. +{
  57532. + uint32_t event, mask;
  57533. +
  57534. + event = ioread32be(&fpm_rg->fm_rcr);
  57535. + mask = ioread32be(&fpm_rg->fm_rie);
  57536. +
  57537. + /* clear MURAM event bit (do not clear IRAM event) */
  57538. + iowrite32be(event & ~FPM_RAM_IRAM_ECC, &fpm_rg->fm_rcr);
  57539. +
  57540. + if ((mask & FPM_MURAM_ECC_ERR_EX_EN))
  57541. + return event;
  57542. + else
  57543. + return 0;
  57544. +}
  57545. +
  57546. +uint32_t fman_get_iram_err_event(struct fman_fpm_regs *fpm_rg)
  57547. +{
  57548. + uint32_t event, mask;
  57549. +
  57550. + event = ioread32be(&fpm_rg->fm_rcr) ;
  57551. + mask = ioread32be(&fpm_rg->fm_rie);
  57552. + /* clear IRAM event bit (do not clear MURAM event) */
  57553. + iowrite32be(event & ~FPM_RAM_MURAM_ECC,
  57554. + &fpm_rg->fm_rcr);
  57555. +
  57556. + if ((mask & FPM_IRAM_ECC_ERR_EX_EN))
  57557. + return event;
  57558. + else
  57559. + return 0;
  57560. +}
  57561. +
  57562. +uint32_t fman_get_qmi_event(struct fman_qmi_regs *qmi_rg)
  57563. +{
  57564. + uint32_t event, mask, force;
  57565. +
  57566. + event = ioread32be(&qmi_rg->fmqm_ie);
  57567. + mask = ioread32be(&qmi_rg->fmqm_ien);
  57568. + event &= mask;
  57569. + /* clear the forced events */
  57570. + force = ioread32be(&qmi_rg->fmqm_if);
  57571. + if (force & event)
  57572. + iowrite32be(force & ~event, &qmi_rg->fmqm_if);
  57573. + /* clear the acknowledged events */
  57574. + iowrite32be(event, &qmi_rg->fmqm_ie);
  57575. + return event;
  57576. +}
  57577. +
  57578. +void fman_enable_time_stamp(struct fman_fpm_regs *fpm_rg,
  57579. + uint8_t count1ubit,
  57580. + uint16_t fm_clk_freq)
  57581. +{
  57582. + uint32_t tmp;
  57583. + uint64_t frac;
  57584. + uint32_t intgr;
  57585. + uint32_t ts_freq = (uint32_t)(1 << count1ubit); /* in Mhz */
  57586. +
  57587. + /* configure timestamp so that bit 8 will count 1 microsecond
  57588. + * Find effective count rate at TIMESTAMP least significant bits:
  57589. + * Effective_Count_Rate = 1MHz x 2^8 = 256MHz
  57590. + * Find frequency ratio between effective count rate and the clock:
  57591. + * Effective_Count_Rate / CLK e.g. for 600 MHz clock:
  57592. + * 256/600 = 0.4266666... */
  57593. +
  57594. + intgr = ts_freq / fm_clk_freq;
  57595. + /* we multiply by 2^16 to keep the fraction of the division
  57596. + * we do not div back, since we write this value as a fraction
  57597. + * see spec */
  57598. +
  57599. + frac = (((uint64_t)ts_freq << 16) - ((uint64_t)intgr << 16) * fm_clk_freq)
  57600. + / fm_clk_freq;
  57601. + /* we check remainder of the division in order to round up if not int */
  57602. + if (((ts_freq << 16) - (intgr << 16)*fm_clk_freq) % fm_clk_freq)
  57603. + frac++;
  57604. +
  57605. + tmp = (intgr << FPM_TS_INT_SHIFT) | (uint16_t)frac;
  57606. + iowrite32be(tmp, &fpm_rg->fmfp_tsc2);
  57607. +
  57608. + /* enable timestamp with original clock */
  57609. + iowrite32be(FPM_TS_CTL_EN, &fpm_rg->fmfp_tsc1);
  57610. +}
  57611. +
  57612. +uint32_t fman_get_fpm_error_interrupts(struct fman_fpm_regs *fpm_rg)
  57613. +{
  57614. + return ioread32be(&fpm_rg->fm_epi);
  57615. +}
  57616. +
  57617. +
  57618. +int fman_set_erratum_10gmac_a004_wa(struct fman_fpm_regs *fpm_rg)
  57619. +{
  57620. + int timeout = 100;
  57621. +
  57622. + iowrite32be(0x40000000, &fpm_rg->fmfp_extc);
  57623. +
  57624. + while ((ioread32be(&fpm_rg->fmfp_extc) & 0x40000000) && --timeout)
  57625. + udelay(10);
  57626. +
  57627. + if (!timeout)
  57628. + return -EBUSY;
  57629. + return 0;
  57630. +}
  57631. +
  57632. +void fman_set_ctrl_intr(struct fman_fpm_regs *fpm_rg,
  57633. + uint8_t event_reg_id,
  57634. + uint32_t enable_events)
  57635. +{
  57636. + iowrite32be(enable_events, &fpm_rg->fmfp_cee[event_reg_id]);
  57637. +}
  57638. +
  57639. +uint32_t fman_get_ctrl_intr(struct fman_fpm_regs *fpm_rg, uint8_t event_reg_id)
  57640. +{
  57641. + return ioread32be(&fpm_rg->fmfp_cee[event_reg_id]);
  57642. +}
  57643. +
  57644. +void fman_set_num_of_riscs_per_port(struct fman_fpm_regs *fpm_rg,
  57645. + uint8_t port_id,
  57646. + uint8_t num_fman_ctrls,
  57647. + uint32_t or_fman_ctrl)
  57648. +{
  57649. + uint32_t tmp = 0;
  57650. +
  57651. + tmp = (uint32_t)(port_id << FPM_PORT_FM_CTL_PORTID_SHIFT);
  57652. + /*TODO - maybe to put CTL# according to another criteria*/
  57653. + if (num_fman_ctrls == 2)
  57654. + tmp = FPM_PRT_FM_CTL2 | FPM_PRT_FM_CTL1;
  57655. + /* order restoration */
  57656. + tmp |= (or_fman_ctrl << FPM_PRC_ORA_FM_CTL_SEL_SHIFT) | or_fman_ctrl;
  57657. +
  57658. + iowrite32be(tmp, &fpm_rg->fmfp_prc);
  57659. +}
  57660. +
  57661. +void fman_set_order_restoration_per_port(struct fman_fpm_regs *fpm_rg,
  57662. + uint8_t port_id,
  57663. + bool independent_mode,
  57664. + bool is_rx_port)
  57665. +{
  57666. + uint32_t tmp = 0;
  57667. +
  57668. + tmp = (uint32_t)(port_id << FPM_PORT_FM_CTL_PORTID_SHIFT);
  57669. + if (independent_mode) {
  57670. + if (is_rx_port)
  57671. + tmp |= (FPM_PRT_FM_CTL1 <<
  57672. + FPM_PRC_ORA_FM_CTL_SEL_SHIFT) | FPM_PRT_FM_CTL1;
  57673. + else
  57674. + tmp |= (FPM_PRT_FM_CTL2 <<
  57675. + FPM_PRC_ORA_FM_CTL_SEL_SHIFT) | FPM_PRT_FM_CTL2;
  57676. + } else {
  57677. + tmp |= (FPM_PRT_FM_CTL2|FPM_PRT_FM_CTL1);
  57678. +
  57679. + /* order restoration */
  57680. + if (port_id % 2)
  57681. + tmp |= (FPM_PRT_FM_CTL1 <<
  57682. + FPM_PRC_ORA_FM_CTL_SEL_SHIFT);
  57683. + else
  57684. + tmp |= (FPM_PRT_FM_CTL2 <<
  57685. + FPM_PRC_ORA_FM_CTL_SEL_SHIFT);
  57686. + }
  57687. + iowrite32be(tmp, &fpm_rg->fmfp_prc);
  57688. +}
  57689. +
  57690. +uint8_t fman_get_qmi_deq_th(struct fman_qmi_regs *qmi_rg)
  57691. +{
  57692. + return (uint8_t)ioread32be(&qmi_rg->fmqm_gc);
  57693. +}
  57694. +
  57695. +uint8_t fman_get_qmi_enq_th(struct fman_qmi_regs *qmi_rg)
  57696. +{
  57697. + return (uint8_t)(ioread32be(&qmi_rg->fmqm_gc) >> 8);
  57698. +}
  57699. +
  57700. +void fman_set_qmi_enq_th(struct fman_qmi_regs *qmi_rg, uint8_t val)
  57701. +{
  57702. + uint32_t tmp_reg;
  57703. +
  57704. + tmp_reg = ioread32be(&qmi_rg->fmqm_gc);
  57705. + tmp_reg &= ~QMI_CFG_ENQ_MASK;
  57706. + tmp_reg |= ((uint32_t)val << 8);
  57707. + iowrite32be(tmp_reg, &qmi_rg->fmqm_gc);
  57708. +}
  57709. +
  57710. +void fman_set_qmi_deq_th(struct fman_qmi_regs *qmi_rg, uint8_t val)
  57711. +{
  57712. + uint32_t tmp_reg;
  57713. +
  57714. + tmp_reg = ioread32be(&qmi_rg->fmqm_gc);
  57715. + tmp_reg &= ~QMI_CFG_DEQ_MASK;
  57716. + tmp_reg |= (uint32_t)val;
  57717. + iowrite32be(tmp_reg, &qmi_rg->fmqm_gc);
  57718. +}
  57719. +
  57720. +void fman_qmi_disable_dispatch_limit(struct fman_fpm_regs *fpm_rg)
  57721. +{
  57722. + iowrite32be(0, &fpm_rg->fmfp_mxd);
  57723. +}
  57724. +
  57725. +void fman_set_liodn_per_port(struct fman_rg *fman_rg, uint8_t port_id,
  57726. + uint16_t liodn_base,
  57727. + uint16_t liodn_ofst)
  57728. +{
  57729. + uint32_t tmp;
  57730. +
  57731. + if ((port_id > 63) || (port_id < 1))
  57732. + return;
  57733. +
  57734. + /* set LIODN base for this port */
  57735. + tmp = ioread32be(&fman_rg->dma_rg->fmdmplr[port_id / 2]);
  57736. + if (port_id % 2) {
  57737. + tmp &= ~FM_LIODN_BASE_MASK;
  57738. + tmp |= (uint32_t)liodn_base;
  57739. + } else {
  57740. + tmp &= ~(FM_LIODN_BASE_MASK << DMA_LIODN_SHIFT);
  57741. + tmp |= (uint32_t)liodn_base << DMA_LIODN_SHIFT;
  57742. + }
  57743. + iowrite32be(tmp, &fman_rg->dma_rg->fmdmplr[port_id / 2]);
  57744. + iowrite32be((uint32_t)liodn_ofst,
  57745. + &fman_rg->bmi_rg->fmbm_spliodn[port_id - 1]);
  57746. +}
  57747. +
  57748. +bool fman_is_port_stalled(struct fman_fpm_regs *fpm_rg, uint8_t port_id)
  57749. +{
  57750. + return (bool)!!(ioread32be(&fpm_rg->fmfp_ps[port_id]) & FPM_PS_STALLED);
  57751. +}
  57752. +
  57753. +void fman_resume_stalled_port(struct fman_fpm_regs *fpm_rg, uint8_t port_id)
  57754. +{
  57755. + uint32_t tmp;
  57756. +
  57757. + tmp = (uint32_t)((port_id << FPM_PORT_FM_CTL_PORTID_SHIFT) |
  57758. + FPM_PRC_REALSE_STALLED);
  57759. + iowrite32be(tmp, &fpm_rg->fmfp_prc);
  57760. +}
  57761. +
  57762. +int fman_reset_mac(struct fman_fpm_regs *fpm_rg, uint8_t mac_id, bool is_10g)
  57763. +{
  57764. + uint32_t msk, timeout = 100;
  57765. +
  57766. + /* Get the relevant bit mask */
  57767. + if (is_10g) {
  57768. + switch (mac_id) {
  57769. + case(0):
  57770. + msk = FPM_RSTC_10G0_RESET;
  57771. + break;
  57772. + case(1):
  57773. + msk = FPM_RSTC_10G1_RESET;
  57774. + break;
  57775. + default:
  57776. + return -EINVAL;
  57777. + }
  57778. + } else {
  57779. + switch (mac_id) {
  57780. + case(0):
  57781. + msk = FPM_RSTC_1G0_RESET;
  57782. + break;
  57783. + case(1):
  57784. + msk = FPM_RSTC_1G1_RESET;
  57785. + break;
  57786. + case(2):
  57787. + msk = FPM_RSTC_1G2_RESET;
  57788. + break;
  57789. + case(3):
  57790. + msk = FPM_RSTC_1G3_RESET;
  57791. + break;
  57792. + case(4):
  57793. + msk = FPM_RSTC_1G4_RESET;
  57794. + break;
  57795. + case (5):
  57796. + msk = FPM_RSTC_1G5_RESET;
  57797. + break;
  57798. + case (6):
  57799. + msk = FPM_RSTC_1G6_RESET;
  57800. + break;
  57801. + case (7):
  57802. + msk = FPM_RSTC_1G7_RESET;
  57803. + break;
  57804. + default:
  57805. + return -EINVAL;
  57806. + }
  57807. + }
  57808. + /* reset */
  57809. + iowrite32be(msk, &fpm_rg->fm_rstc);
  57810. + while ((ioread32be(&fpm_rg->fm_rstc) & msk) && --timeout)
  57811. + udelay(10);
  57812. +
  57813. + if (!timeout)
  57814. + return -EBUSY;
  57815. + return 0;
  57816. +}
  57817. +
  57818. +uint16_t fman_get_size_of_fifo(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
  57819. +{
  57820. + uint32_t tmp_reg;
  57821. +
  57822. + if ((port_id > 63) || (port_id < 1))
  57823. + return 0;
  57824. +
  57825. + tmp_reg = ioread32be(&bmi_rg->fmbm_pfs[port_id - 1]);
  57826. + return (uint16_t)((tmp_reg & BMI_FIFO_SIZE_MASK) + 1);
  57827. +}
  57828. +
  57829. +uint32_t fman_get_total_fifo_size(struct fman_bmi_regs *bmi_rg)
  57830. +{
  57831. + uint32_t reg, res;
  57832. +
  57833. + reg = ioread32be(&bmi_rg->fmbm_cfg1);
  57834. + res = (reg >> BMI_CFG1_FIFO_SIZE_SHIFT) & 0x3ff;
  57835. + return res * FMAN_BMI_FIFO_UNITS;
  57836. +}
  57837. +
  57838. +uint16_t fman_get_size_of_extra_fifo(struct fman_bmi_regs *bmi_rg,
  57839. + uint8_t port_id)
  57840. +{
  57841. + uint32_t tmp_reg;
  57842. +
  57843. + if ((port_id > 63) || (port_id < 1))
  57844. + return 0;
  57845. +
  57846. + tmp_reg = ioread32be(&bmi_rg->fmbm_pfs[port_id-1]);
  57847. + return (uint16_t)((tmp_reg & BMI_EXTRA_FIFO_SIZE_MASK) >>
  57848. + BMI_EXTRA_FIFO_SIZE_SHIFT);
  57849. +}
  57850. +
  57851. +void fman_set_size_of_fifo(struct fman_bmi_regs *bmi_rg,
  57852. + uint8_t port_id,
  57853. + uint32_t sz_fifo,
  57854. + uint32_t extra_sz_fifo)
  57855. +{
  57856. + uint32_t tmp;
  57857. +
  57858. + if ((port_id > 63) || (port_id < 1))
  57859. + return;
  57860. +
  57861. + /* calculate reg */
  57862. + tmp = (uint32_t)((sz_fifo / FMAN_BMI_FIFO_UNITS - 1) |
  57863. + ((extra_sz_fifo / FMAN_BMI_FIFO_UNITS) <<
  57864. + BMI_EXTRA_FIFO_SIZE_SHIFT));
  57865. + iowrite32be(tmp, &bmi_rg->fmbm_pfs[port_id - 1]);
  57866. +}
  57867. +
  57868. +uint8_t fman_get_num_of_tasks(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
  57869. +{
  57870. + uint32_t tmp;
  57871. +
  57872. + if ((port_id > 63) || (port_id < 1))
  57873. + return 0;
  57874. +
  57875. + tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
  57876. + return (uint8_t)(((tmp & BMI_NUM_OF_TASKS_MASK) >>
  57877. + BMI_NUM_OF_TASKS_SHIFT) + 1);
  57878. +}
  57879. +
  57880. +uint8_t fman_get_num_extra_tasks(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
  57881. +{
  57882. + uint32_t tmp;
  57883. +
  57884. + if ((port_id > 63) || (port_id < 1))
  57885. + return 0;
  57886. +
  57887. + tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
  57888. + return (uint8_t)((tmp & BMI_NUM_OF_EXTRA_TASKS_MASK) >>
  57889. + BMI_EXTRA_NUM_OF_TASKS_SHIFT);
  57890. +}
  57891. +
  57892. +void fman_set_num_of_tasks(struct fman_bmi_regs *bmi_rg,
  57893. + uint8_t port_id,
  57894. + uint8_t num_tasks,
  57895. + uint8_t num_extra_tasks)
  57896. +{
  57897. + uint32_t tmp;
  57898. +
  57899. + if ((port_id > 63) || (port_id < 1))
  57900. + return;
  57901. +
  57902. + /* calculate reg */
  57903. + tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]) &
  57904. + ~(BMI_NUM_OF_TASKS_MASK | BMI_NUM_OF_EXTRA_TASKS_MASK);
  57905. + tmp |= (uint32_t)(((num_tasks - 1) << BMI_NUM_OF_TASKS_SHIFT) |
  57906. + (num_extra_tasks << BMI_EXTRA_NUM_OF_TASKS_SHIFT));
  57907. + iowrite32be(tmp, &bmi_rg->fmbm_pp[port_id - 1]);
  57908. +}
  57909. +
  57910. +uint8_t fman_get_num_of_dmas(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
  57911. +{
  57912. + uint32_t tmp;
  57913. +
  57914. + if ((port_id > 63) || (port_id < 1))
  57915. + return 0;
  57916. +
  57917. + tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
  57918. + return (uint8_t)(((tmp & BMI_NUM_OF_DMAS_MASK) >>
  57919. + BMI_NUM_OF_DMAS_SHIFT) + 1);
  57920. +}
  57921. +
  57922. +uint8_t fman_get_num_extra_dmas(struct fman_bmi_regs *bmi_rg, uint8_t port_id)
  57923. +{
  57924. + uint32_t tmp;
  57925. +
  57926. + if ((port_id > 63) || (port_id < 1))
  57927. + return 0;
  57928. +
  57929. + tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]);
  57930. + return (uint8_t)((tmp & BMI_NUM_OF_EXTRA_DMAS_MASK) >>
  57931. + BMI_EXTRA_NUM_OF_DMAS_SHIFT);
  57932. +}
  57933. +
  57934. +void fman_set_num_of_open_dmas(struct fman_bmi_regs *bmi_rg,
  57935. + uint8_t port_id,
  57936. + uint8_t num_open_dmas,
  57937. + uint8_t num_extra_open_dmas,
  57938. + uint8_t total_num_dmas)
  57939. +{
  57940. + uint32_t tmp = 0;
  57941. +
  57942. + if ((port_id > 63) || (port_id < 1))
  57943. + return;
  57944. +
  57945. + /* calculate reg */
  57946. + tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]) &
  57947. + ~(BMI_NUM_OF_DMAS_MASK | BMI_NUM_OF_EXTRA_DMAS_MASK);
  57948. + tmp |= (uint32_t)(((num_open_dmas-1) << BMI_NUM_OF_DMAS_SHIFT) |
  57949. + (num_extra_open_dmas << BMI_EXTRA_NUM_OF_DMAS_SHIFT));
  57950. + iowrite32be(tmp, &bmi_rg->fmbm_pp[port_id - 1]);
  57951. +
  57952. + /* update total num of DMA's with committed number of open DMAS,
  57953. + * and max uncommitted pool. */
  57954. + if (total_num_dmas)
  57955. + {
  57956. + tmp = ioread32be(&bmi_rg->fmbm_cfg2) & ~BMI_CFG2_DMAS_MASK;
  57957. + tmp |= (uint32_t)(total_num_dmas - 1) << BMI_CFG2_DMAS_SHIFT;
  57958. + iowrite32be(tmp, &bmi_rg->fmbm_cfg2);
  57959. + }
  57960. +}
  57961. +
  57962. +void fman_set_vsp_window(struct fman_bmi_regs *bmi_rg,
  57963. + uint8_t port_id,
  57964. + uint8_t base_storage_profile,
  57965. + uint8_t log2_num_of_profiles)
  57966. +{
  57967. + uint32_t tmp = 0;
  57968. + if ((port_id > 63) || (port_id < 1))
  57969. + return;
  57970. +
  57971. + tmp = ioread32be(&bmi_rg->fmbm_spliodn[port_id-1]);
  57972. + tmp |= (uint32_t)((uint32_t)base_storage_profile & 0x3f) << 16;
  57973. + tmp |= (uint32_t)log2_num_of_profiles << 28;
  57974. + iowrite32be(tmp, &bmi_rg->fmbm_spliodn[port_id-1]);
  57975. +}
  57976. +
  57977. +void fman_set_congestion_group_pfc_priority(uint32_t *cpg_rg,
  57978. + uint32_t congestion_group_id,
  57979. + uint8_t priority_bit_map,
  57980. + uint32_t reg_num)
  57981. +{
  57982. + uint32_t offset, tmp = 0;
  57983. +
  57984. + offset = (congestion_group_id%4)*8;
  57985. +
  57986. + tmp = ioread32be(&cpg_rg[reg_num]);
  57987. + tmp &= ~(0xFF<<offset);
  57988. + tmp |= (uint32_t)priority_bit_map << offset;
  57989. +
  57990. + iowrite32be(tmp,&cpg_rg[reg_num]);
  57991. +}
  57992. +
  57993. +/*****************************************************************************/
  57994. +/* API Init unit functions */
  57995. +/*****************************************************************************/
  57996. +void fman_defconfig(struct fman_cfg *cfg, bool is_master)
  57997. +{
  57998. + memset(cfg, 0, sizeof(struct fman_cfg));
  57999. +
  58000. + cfg->catastrophic_err = DEFAULT_CATASTROPHIC_ERR;
  58001. + cfg->dma_err = DEFAULT_DMA_ERR;
  58002. + cfg->halt_on_external_activ = DEFAULT_HALT_ON_EXTERNAL_ACTIVATION;
  58003. + cfg->halt_on_unrecov_ecc_err = DEFAULT_HALT_ON_UNRECOVERABLE_ECC_ERROR;
  58004. + cfg->en_iram_test_mode = FALSE;
  58005. + cfg->en_muram_test_mode = FALSE;
  58006. + cfg->external_ecc_rams_enable = DEFAULT_EXTERNAL_ECC_RAMS_ENABLE;
  58007. +
  58008. + if (!is_master)
  58009. + return;
  58010. +
  58011. + cfg->dma_aid_override = DEFAULT_AID_OVERRIDE;
  58012. + cfg->dma_aid_mode = DEFAULT_AID_MODE;
  58013. + cfg->dma_comm_qtsh_clr_emer = DEFAULT_DMA_COMM_Q_LOW;
  58014. + cfg->dma_comm_qtsh_asrt_emer = DEFAULT_DMA_COMM_Q_HIGH;
  58015. + cfg->dma_cache_override = DEFAULT_CACHE_OVERRIDE;
  58016. + cfg->dma_cam_num_of_entries = DEFAULT_DMA_CAM_NUM_OF_ENTRIES;
  58017. + cfg->dma_dbg_cnt_mode = DEFAULT_DMA_DBG_CNT_MODE;
  58018. + cfg->dma_en_emergency = DEFAULT_DMA_EN_EMERGENCY;
  58019. + cfg->dma_sos_emergency = DEFAULT_DMA_SOS_EMERGENCY;
  58020. + cfg->dma_watchdog = DEFAULT_DMA_WATCHDOG;
  58021. + cfg->dma_en_emergency_smoother = DEFAULT_DMA_EN_EMERGENCY_SMOOTHER;
  58022. + cfg->dma_emergency_switch_counter = DEFAULT_DMA_EMERGENCY_SWITCH_COUNTER;
  58023. + cfg->disp_limit_tsh = DEFAULT_DISP_LIMIT;
  58024. + cfg->prs_disp_tsh = DEFAULT_PRS_DISP_TH;
  58025. + cfg->plcr_disp_tsh = DEFAULT_PLCR_DISP_TH;
  58026. + cfg->kg_disp_tsh = DEFAULT_KG_DISP_TH;
  58027. + cfg->bmi_disp_tsh = DEFAULT_BMI_DISP_TH;
  58028. + cfg->qmi_enq_disp_tsh = DEFAULT_QMI_ENQ_DISP_TH;
  58029. + cfg->qmi_deq_disp_tsh = DEFAULT_QMI_DEQ_DISP_TH;
  58030. + cfg->fm_ctl1_disp_tsh = DEFAULT_FM_CTL1_DISP_TH;
  58031. + cfg->fm_ctl2_disp_tsh = DEFAULT_FM_CTL2_DISP_TH;
  58032. +
  58033. + cfg->pedantic_dma = FALSE;
  58034. + cfg->tnum_aging_period = DEFAULT_TNUM_AGING_PERIOD;
  58035. + cfg->dma_stop_on_bus_error = FALSE;
  58036. + cfg->qmi_deq_option_support = FALSE;
  58037. +}
  58038. +
  58039. +void fman_regconfig(struct fman_rg *fman_rg, struct fman_cfg *cfg)
  58040. +{
  58041. + uint32_t tmp_reg;
  58042. +
  58043. + /* read the values from the registers as they are initialized by the HW with
  58044. + * the required values.
  58045. + */
  58046. + tmp_reg = ioread32be(&fman_rg->bmi_rg->fmbm_cfg1);
  58047. + cfg->total_fifo_size =
  58048. + (((tmp_reg & BMI_TOTAL_FIFO_SIZE_MASK) >> BMI_CFG1_FIFO_SIZE_SHIFT) + 1) * FMAN_BMI_FIFO_UNITS;
  58049. +
  58050. + tmp_reg = ioread32be(&fman_rg->bmi_rg->fmbm_cfg2);
  58051. + cfg->total_num_of_tasks =
  58052. + (uint8_t)(((tmp_reg & BMI_TOTAL_NUM_OF_TASKS_MASK) >> BMI_CFG2_TASKS_SHIFT) + 1);
  58053. +
  58054. + tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmtr);
  58055. + cfg->dma_comm_qtsh_asrt_emer = (uint8_t)(tmp_reg >> DMA_THRESH_COMMQ_SHIFT);
  58056. +
  58057. + tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmhy);
  58058. + cfg->dma_comm_qtsh_clr_emer = (uint8_t)(tmp_reg >> DMA_THRESH_COMMQ_SHIFT);
  58059. +
  58060. + tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmmr);
  58061. + cfg->dma_cache_override = (enum fman_dma_cache_override)((tmp_reg & DMA_MODE_CACHE_OR_MASK) >> DMA_MODE_CACHE_OR_SHIFT);
  58062. + cfg->dma_cam_num_of_entries = (uint8_t)((((tmp_reg & DMA_MODE_CEN_MASK) >> DMA_MODE_CEN_SHIFT) +1)*DMA_CAM_UNITS);
  58063. + cfg->dma_aid_override = (bool)((tmp_reg & DMA_MODE_AID_OR)? TRUE:FALSE);
  58064. + cfg->dma_dbg_cnt_mode = (enum fman_dma_dbg_cnt_mode)((tmp_reg & DMA_MODE_DBG_MASK) >> DMA_MODE_DBG_SHIFT);
  58065. + cfg->dma_en_emergency = (bool)((tmp_reg & DMA_MODE_EB)? TRUE : FALSE);
  58066. +
  58067. + tmp_reg = ioread32be(&fman_rg->fpm_rg->fmfp_mxd);
  58068. + cfg->disp_limit_tsh = (uint8_t)((tmp_reg & FPM_DISP_LIMIT_MASK) >> FPM_DISP_LIMIT_SHIFT);
  58069. +
  58070. + tmp_reg = ioread32be(&fman_rg->fpm_rg->fmfp_dist1);
  58071. + cfg->prs_disp_tsh = (uint8_t)((tmp_reg & FPM_THR1_PRS_MASK ) >> FPM_THR1_PRS_SHIFT);
  58072. + cfg->plcr_disp_tsh = (uint8_t)((tmp_reg & FPM_THR1_KG_MASK ) >> FPM_THR1_KG_SHIFT);
  58073. + cfg->kg_disp_tsh = (uint8_t)((tmp_reg & FPM_THR1_PLCR_MASK ) >> FPM_THR1_PLCR_SHIFT);
  58074. + cfg->bmi_disp_tsh = (uint8_t)((tmp_reg & FPM_THR1_BMI_MASK ) >> FPM_THR1_BMI_SHIFT);
  58075. +
  58076. + tmp_reg = ioread32be(&fman_rg->fpm_rg->fmfp_dist2);
  58077. + cfg->qmi_enq_disp_tsh = (uint8_t)((tmp_reg & FPM_THR2_QMI_ENQ_MASK ) >> FPM_THR2_QMI_ENQ_SHIFT);
  58078. + cfg->qmi_deq_disp_tsh = (uint8_t)((tmp_reg & FPM_THR2_QMI_DEQ_MASK ) >> FPM_THR2_QMI_DEQ_SHIFT);
  58079. + cfg->fm_ctl1_disp_tsh = (uint8_t)((tmp_reg & FPM_THR2_FM_CTL1_MASK ) >> FPM_THR2_FM_CTL1_SHIFT);
  58080. + cfg->fm_ctl2_disp_tsh = (uint8_t)((tmp_reg & FPM_THR2_FM_CTL2_MASK ) >> FPM_THR2_FM_CTL2_SHIFT);
  58081. +
  58082. + tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmsetr);
  58083. + cfg->dma_sos_emergency = tmp_reg;
  58084. +
  58085. + tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmwcr);
  58086. + cfg->dma_watchdog = tmp_reg/cfg->clk_freq;
  58087. +
  58088. + tmp_reg = ioread32be(&fman_rg->dma_rg->fmdmemsr);
  58089. + cfg->dma_en_emergency_smoother = (bool)((tmp_reg & DMA_EMSR_EMSTR_MASK)? TRUE : FALSE);
  58090. + cfg->dma_emergency_switch_counter = (tmp_reg & DMA_EMSR_EMSTR_MASK);
  58091. +}
  58092. +
  58093. +void fman_reset(struct fman_fpm_regs *fpm_rg)
  58094. +{
  58095. + iowrite32be(FPM_RSTC_FM_RESET, &fpm_rg->fm_rstc);
  58096. +}
  58097. +
  58098. +/**************************************************************************//**
  58099. + @Function FM_Init
  58100. +
  58101. + @Description Initializes the FM module
  58102. +
  58103. + @Param[in] h_Fm - FM module descriptor
  58104. +
  58105. + @Return E_OK on success; Error code otherwise.
  58106. +*//***************************************************************************/
  58107. +int fman_dma_init(struct fman_dma_regs *dma_rg, struct fman_cfg *cfg)
  58108. +{
  58109. + uint32_t tmp_reg;
  58110. +
  58111. + /**********************/
  58112. + /* Init DMA Registers */
  58113. + /**********************/
  58114. + /* clear status reg events */
  58115. + /* oren - check!!! */
  58116. + tmp_reg = (DMA_STATUS_BUS_ERR | DMA_STATUS_READ_ECC |
  58117. + DMA_STATUS_SYSTEM_WRITE_ECC | DMA_STATUS_FM_WRITE_ECC);
  58118. + iowrite32be(ioread32be(&dma_rg->fmdmsr) | tmp_reg,
  58119. + &dma_rg->fmdmsr);
  58120. +
  58121. + /* configure mode register */
  58122. + tmp_reg = 0;
  58123. + tmp_reg |= cfg->dma_cache_override << DMA_MODE_CACHE_OR_SHIFT;
  58124. + if (cfg->dma_aid_override)
  58125. + tmp_reg |= DMA_MODE_AID_OR;
  58126. + if (cfg->exceptions & FMAN_EX_DMA_BUS_ERROR)
  58127. + tmp_reg |= DMA_MODE_BER;
  58128. + if ((cfg->exceptions & FMAN_EX_DMA_SYSTEM_WRITE_ECC) |
  58129. + (cfg->exceptions & FMAN_EX_DMA_READ_ECC) |
  58130. + (cfg->exceptions & FMAN_EX_DMA_FM_WRITE_ECC))
  58131. + tmp_reg |= DMA_MODE_ECC;
  58132. + if (cfg->dma_stop_on_bus_error)
  58133. + tmp_reg |= DMA_MODE_SBER;
  58134. + if(cfg->dma_axi_dbg_num_of_beats)
  58135. + tmp_reg |= (uint32_t)(DMA_MODE_AXI_DBG_MASK &
  58136. + ((cfg->dma_axi_dbg_num_of_beats - 1) << DMA_MODE_AXI_DBG_SHIFT));
  58137. +
  58138. + if (cfg->dma_en_emergency) {
  58139. + tmp_reg |= cfg->dma_emergency_bus_select;
  58140. + tmp_reg |= cfg->dma_emergency_level << DMA_MODE_EMER_LVL_SHIFT;
  58141. + if (cfg->dma_en_emergency_smoother)
  58142. + iowrite32be(cfg->dma_emergency_switch_counter,
  58143. + &dma_rg->fmdmemsr);
  58144. + }
  58145. + tmp_reg |= ((cfg->dma_cam_num_of_entries / DMA_CAM_UNITS) - 1) <<
  58146. + DMA_MODE_CEN_SHIFT;
  58147. + tmp_reg |= DMA_MODE_SECURE_PROT;
  58148. + tmp_reg |= cfg->dma_dbg_cnt_mode << DMA_MODE_DBG_SHIFT;
  58149. + tmp_reg |= cfg->dma_aid_mode << DMA_MODE_AID_MODE_SHIFT;
  58150. +
  58151. + if (cfg->pedantic_dma)
  58152. + tmp_reg |= DMA_MODE_EMER_READ;
  58153. +
  58154. + iowrite32be(tmp_reg, &dma_rg->fmdmmr);
  58155. +
  58156. + /* configure thresholds register */
  58157. + tmp_reg = ((uint32_t)cfg->dma_comm_qtsh_asrt_emer <<
  58158. + DMA_THRESH_COMMQ_SHIFT) |
  58159. + ((uint32_t)cfg->dma_read_buf_tsh_asrt_emer <<
  58160. + DMA_THRESH_READ_INT_BUF_SHIFT) |
  58161. + ((uint32_t)cfg->dma_write_buf_tsh_asrt_emer);
  58162. +
  58163. + iowrite32be(tmp_reg, &dma_rg->fmdmtr);
  58164. +
  58165. + /* configure hysteresis register */
  58166. + tmp_reg = ((uint32_t)cfg->dma_comm_qtsh_clr_emer <<
  58167. + DMA_THRESH_COMMQ_SHIFT) |
  58168. + ((uint32_t)cfg->dma_read_buf_tsh_clr_emer <<
  58169. + DMA_THRESH_READ_INT_BUF_SHIFT) |
  58170. + ((uint32_t)cfg->dma_write_buf_tsh_clr_emer);
  58171. +
  58172. + iowrite32be(tmp_reg, &dma_rg->fmdmhy);
  58173. +
  58174. + /* configure emergency threshold */
  58175. + iowrite32be(cfg->dma_sos_emergency, &dma_rg->fmdmsetr);
  58176. +
  58177. + /* configure Watchdog */
  58178. + iowrite32be((cfg->dma_watchdog * cfg->clk_freq),
  58179. + &dma_rg->fmdmwcr);
  58180. +
  58181. + iowrite32be(cfg->cam_base_addr, &dma_rg->fmdmebcr);
  58182. +
  58183. + return 0;
  58184. +}
  58185. +
  58186. +int fman_fpm_init(struct fman_fpm_regs *fpm_rg, struct fman_cfg *cfg)
  58187. +{
  58188. + uint32_t tmp_reg;
  58189. + int i;
  58190. +
  58191. + /**********************/
  58192. + /* Init FPM Registers */
  58193. + /**********************/
  58194. + tmp_reg = (uint32_t)(cfg->disp_limit_tsh << FPM_DISP_LIMIT_SHIFT);
  58195. + iowrite32be(tmp_reg, &fpm_rg->fmfp_mxd);
  58196. +
  58197. + tmp_reg = (((uint32_t)cfg->prs_disp_tsh << FPM_THR1_PRS_SHIFT) |
  58198. + ((uint32_t)cfg->kg_disp_tsh << FPM_THR1_KG_SHIFT) |
  58199. + ((uint32_t)cfg->plcr_disp_tsh << FPM_THR1_PLCR_SHIFT) |
  58200. + ((uint32_t)cfg->bmi_disp_tsh << FPM_THR1_BMI_SHIFT));
  58201. + iowrite32be(tmp_reg, &fpm_rg->fmfp_dist1);
  58202. +
  58203. + tmp_reg = (((uint32_t)cfg->qmi_enq_disp_tsh << FPM_THR2_QMI_ENQ_SHIFT) |
  58204. + ((uint32_t)cfg->qmi_deq_disp_tsh << FPM_THR2_QMI_DEQ_SHIFT) |
  58205. + ((uint32_t)cfg->fm_ctl1_disp_tsh << FPM_THR2_FM_CTL1_SHIFT) |
  58206. + ((uint32_t)cfg->fm_ctl2_disp_tsh << FPM_THR2_FM_CTL2_SHIFT));
  58207. + iowrite32be(tmp_reg, &fpm_rg->fmfp_dist2);
  58208. +
  58209. + /* define exceptions and error behavior */
  58210. + tmp_reg = 0;
  58211. + /* Clear events */
  58212. + tmp_reg |= (FPM_EV_MASK_STALL | FPM_EV_MASK_DOUBLE_ECC |
  58213. + FPM_EV_MASK_SINGLE_ECC);
  58214. + /* enable interrupts */
  58215. + if (cfg->exceptions & FMAN_EX_FPM_STALL_ON_TASKS)
  58216. + tmp_reg |= FPM_EV_MASK_STALL_EN;
  58217. + if (cfg->exceptions & FMAN_EX_FPM_SINGLE_ECC)
  58218. + tmp_reg |= FPM_EV_MASK_SINGLE_ECC_EN;
  58219. + if (cfg->exceptions & FMAN_EX_FPM_DOUBLE_ECC)
  58220. + tmp_reg |= FPM_EV_MASK_DOUBLE_ECC_EN;
  58221. + tmp_reg |= (cfg->catastrophic_err << FPM_EV_MASK_CAT_ERR_SHIFT);
  58222. + tmp_reg |= (cfg->dma_err << FPM_EV_MASK_DMA_ERR_SHIFT);
  58223. + if (!cfg->halt_on_external_activ)
  58224. + tmp_reg |= FPM_EV_MASK_EXTERNAL_HALT;
  58225. + if (!cfg->halt_on_unrecov_ecc_err)
  58226. + tmp_reg |= FPM_EV_MASK_ECC_ERR_HALT;
  58227. + iowrite32be(tmp_reg, &fpm_rg->fmfp_ee);
  58228. +
  58229. + /* clear all fmCtls event registers */
  58230. + for (i = 0; i < cfg->num_of_fman_ctrl_evnt_regs; i++)
  58231. + iowrite32be(0xFFFFFFFF, &fpm_rg->fmfp_cev[i]);
  58232. +
  58233. + /* RAM ECC - enable and clear events*/
  58234. + /* first we need to clear all parser memory,
  58235. + * as it is uninitialized and may cause ECC errors */
  58236. + /* event bits */
  58237. + tmp_reg = (FPM_RAM_MURAM_ECC | FPM_RAM_IRAM_ECC);
  58238. + /* Rams enable not effected by RCR bit, but by a COP configuration */
  58239. + if (cfg->external_ecc_rams_enable)
  58240. + tmp_reg |= FPM_RAM_RAMS_ECC_EN_SRC_SEL;
  58241. +
  58242. + /* enable test mode */
  58243. + if (cfg->en_muram_test_mode)
  58244. + tmp_reg |= FPM_RAM_MURAM_TEST_ECC;
  58245. + if (cfg->en_iram_test_mode)
  58246. + tmp_reg |= FPM_RAM_IRAM_TEST_ECC;
  58247. + iowrite32be(tmp_reg, &fpm_rg->fm_rcr);
  58248. +
  58249. + tmp_reg = 0;
  58250. + if (cfg->exceptions & FMAN_EX_IRAM_ECC) {
  58251. + tmp_reg |= FPM_IRAM_ECC_ERR_EX_EN;
  58252. + fman_enable_rams_ecc(fpm_rg);
  58253. + }
  58254. + if (cfg->exceptions & FMAN_EX_NURAM_ECC) {
  58255. + tmp_reg |= FPM_MURAM_ECC_ERR_EX_EN;
  58256. + fman_enable_rams_ecc(fpm_rg);
  58257. + }
  58258. + iowrite32be(tmp_reg, &fpm_rg->fm_rie);
  58259. +
  58260. + return 0;
  58261. +}
  58262. +
  58263. +int fman_bmi_init(struct fman_bmi_regs *bmi_rg, struct fman_cfg *cfg)
  58264. +{
  58265. + uint32_t tmp_reg;
  58266. +
  58267. + /**********************/
  58268. + /* Init BMI Registers */
  58269. + /**********************/
  58270. +
  58271. + /* define common resources */
  58272. + tmp_reg = cfg->fifo_base_addr;
  58273. + tmp_reg = tmp_reg / BMI_FIFO_ALIGN;
  58274. +
  58275. + tmp_reg |= ((cfg->total_fifo_size / FMAN_BMI_FIFO_UNITS - 1) <<
  58276. + BMI_CFG1_FIFO_SIZE_SHIFT);
  58277. + iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg1);
  58278. +
  58279. + tmp_reg = ((uint32_t)(cfg->total_num_of_tasks - 1) <<
  58280. + BMI_CFG2_TASKS_SHIFT);
  58281. + /* num of DMA's will be dynamically updated when each port is set */
  58282. + iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg2);
  58283. +
  58284. + /* define unmaskable exceptions, enable and clear events */
  58285. + tmp_reg = 0;
  58286. + iowrite32be(BMI_ERR_INTR_EN_LIST_RAM_ECC |
  58287. + BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC |
  58288. + BMI_ERR_INTR_EN_STATISTICS_RAM_ECC |
  58289. + BMI_ERR_INTR_EN_DISPATCH_RAM_ECC,
  58290. + &bmi_rg->fmbm_ievr);
  58291. +
  58292. + if (cfg->exceptions & FMAN_EX_BMI_LIST_RAM_ECC)
  58293. + tmp_reg |= BMI_ERR_INTR_EN_LIST_RAM_ECC;
  58294. + if (cfg->exceptions & FMAN_EX_BMI_PIPELINE_ECC)
  58295. + tmp_reg |= BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC;
  58296. + if (cfg->exceptions & FMAN_EX_BMI_STATISTICS_RAM_ECC)
  58297. + tmp_reg |= BMI_ERR_INTR_EN_STATISTICS_RAM_ECC;
  58298. + if (cfg->exceptions & FMAN_EX_BMI_DISPATCH_RAM_ECC)
  58299. + tmp_reg |= BMI_ERR_INTR_EN_DISPATCH_RAM_ECC;
  58300. + iowrite32be(tmp_reg, &bmi_rg->fmbm_ier);
  58301. +
  58302. + return 0;
  58303. +}
  58304. +
  58305. +int fman_qmi_init(struct fman_qmi_regs *qmi_rg, struct fman_cfg *cfg)
  58306. +{
  58307. + uint32_t tmp_reg;
  58308. + uint16_t period_in_fm_clocks;
  58309. + uint8_t remainder;
  58310. + /**********************/
  58311. + /* Init QMI Registers */
  58312. + /**********************/
  58313. + /* Clear error interrupt events */
  58314. +
  58315. + iowrite32be(QMI_ERR_INTR_EN_DOUBLE_ECC | QMI_ERR_INTR_EN_DEQ_FROM_DEF,
  58316. + &qmi_rg->fmqm_eie);
  58317. + tmp_reg = 0;
  58318. + if (cfg->exceptions & FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID)
  58319. + tmp_reg |= QMI_ERR_INTR_EN_DEQ_FROM_DEF;
  58320. + if (cfg->exceptions & FMAN_EX_QMI_DOUBLE_ECC)
  58321. + tmp_reg |= QMI_ERR_INTR_EN_DOUBLE_ECC;
  58322. + /* enable events */
  58323. + iowrite32be(tmp_reg, &qmi_rg->fmqm_eien);
  58324. +
  58325. + if (cfg->tnum_aging_period) {
  58326. + /* tnum_aging_period is in units of usec, p_FmClockFreq in Mhz */
  58327. + period_in_fm_clocks = (uint16_t)
  58328. + (cfg->tnum_aging_period * cfg->clk_freq);
  58329. + /* period_in_fm_clocks must be a 64 multiply */
  58330. + remainder = (uint8_t)(period_in_fm_clocks % 64);
  58331. + if (remainder)
  58332. + tmp_reg = (uint32_t)((period_in_fm_clocks / 64) + 1);
  58333. + else{
  58334. + tmp_reg = (uint32_t)(period_in_fm_clocks / 64);
  58335. + if (!tmp_reg)
  58336. + tmp_reg = 1;
  58337. + }
  58338. + tmp_reg <<= QMI_TAPC_TAP;
  58339. + iowrite32be(tmp_reg, &qmi_rg->fmqm_tapc);
  58340. + }
  58341. + tmp_reg = 0;
  58342. + /* Clear interrupt events */
  58343. + iowrite32be(QMI_INTR_EN_SINGLE_ECC, &qmi_rg->fmqm_ie);
  58344. + if (cfg->exceptions & FMAN_EX_QMI_SINGLE_ECC)
  58345. + tmp_reg |= QMI_INTR_EN_SINGLE_ECC;
  58346. + /* enable events */
  58347. + iowrite32be(tmp_reg, &qmi_rg->fmqm_ien);
  58348. +
  58349. + return 0;
  58350. +}
  58351. +
  58352. +int fman_enable(struct fman_rg *fman_rg, struct fman_cfg *cfg)
  58353. +{
  58354. + uint32_t cfg_reg = 0;
  58355. +
  58356. + /**********************/
  58357. + /* Enable all modules */
  58358. + /**********************/
  58359. + /* clear & enable global counters - calculate reg and save for later,
  58360. + because it's the same reg for QMI enable */
  58361. + cfg_reg = QMI_CFG_EN_COUNTERS;
  58362. + if (cfg->qmi_deq_option_support)
  58363. + cfg_reg |= (uint32_t)(((cfg->qmi_def_tnums_thresh) << 8) |
  58364. + (uint32_t)cfg->qmi_def_tnums_thresh);
  58365. +
  58366. + iowrite32be(BMI_INIT_START, &fman_rg->bmi_rg->fmbm_init);
  58367. + iowrite32be(cfg_reg | QMI_CFG_ENQ_EN | QMI_CFG_DEQ_EN,
  58368. + &fman_rg->qmi_rg->fmqm_gc);
  58369. +
  58370. + return 0;
  58371. +}
  58372. +
  58373. +void fman_free_resources(struct fman_rg *fman_rg)
  58374. +{
  58375. + /* disable BMI and QMI */
  58376. + iowrite32be(0, &fman_rg->bmi_rg->fmbm_init);
  58377. + iowrite32be(0, &fman_rg->qmi_rg->fmqm_gc);
  58378. +
  58379. + /* release BMI resources */
  58380. + iowrite32be(0, &fman_rg->bmi_rg->fmbm_cfg2);
  58381. + iowrite32be(0, &fman_rg->bmi_rg->fmbm_cfg1);
  58382. +
  58383. + /* disable ECC */
  58384. + iowrite32be(0, &fman_rg->fpm_rg->fm_rcr);
  58385. +}
  58386. +
  58387. +/****************************************************/
  58388. +/* API Run-time Control uint functions */
  58389. +/****************************************************/
  58390. +uint32_t fman_get_normal_pending(struct fman_fpm_regs *fpm_rg)
  58391. +{
  58392. + return ioread32be(&fpm_rg->fm_npi);
  58393. +}
  58394. +
  58395. +uint32_t fman_get_controller_event(struct fman_fpm_regs *fpm_rg, uint8_t reg_id)
  58396. +{
  58397. + uint32_t event;
  58398. +
  58399. + event = ioread32be(&fpm_rg->fmfp_fcev[reg_id]) &
  58400. + ioread32be(&fpm_rg->fmfp_cee[reg_id]);
  58401. + iowrite32be(event, &fpm_rg->fmfp_cev[reg_id]);
  58402. +
  58403. + return event;
  58404. +}
  58405. +
  58406. +uint32_t fman_get_error_pending(struct fman_fpm_regs *fpm_rg)
  58407. +{
  58408. + return ioread32be(&fpm_rg->fm_epi);
  58409. +}
  58410. +
  58411. +void fman_set_ports_bandwidth(struct fman_bmi_regs *bmi_rg, uint8_t *weights)
  58412. +{
  58413. + int i;
  58414. + uint8_t shift;
  58415. + uint32_t tmp = 0;
  58416. +
  58417. + for (i = 0; i < 64; i++) {
  58418. + if (weights[i] > 1) { /* no need to write 1 since it is 0 */
  58419. + /* Add this port to tmp_reg */
  58420. + /* (each 8 ports result in one register)*/
  58421. + shift = (uint8_t)(32 - 4 * ((i % 8) + 1));
  58422. + tmp |= ((weights[i] - 1) << shift);
  58423. + }
  58424. + if (i % 8 == 7) { /* last in this set */
  58425. + iowrite32be(tmp, &bmi_rg->fmbm_arb[i / 8]);
  58426. + tmp = 0;
  58427. + }
  58428. + }
  58429. +}
  58430. +
  58431. +void fman_enable_rams_ecc(struct fman_fpm_regs *fpm_rg)
  58432. +{
  58433. + uint32_t tmp;
  58434. +
  58435. + tmp = ioread32be(&fpm_rg->fm_rcr);
  58436. + if (tmp & FPM_RAM_RAMS_ECC_EN_SRC_SEL)
  58437. + iowrite32be(tmp | FPM_RAM_IRAM_ECC_EN,
  58438. + &fpm_rg->fm_rcr);
  58439. + else
  58440. + iowrite32be(tmp | FPM_RAM_RAMS_ECC_EN |
  58441. + FPM_RAM_IRAM_ECC_EN,
  58442. + &fpm_rg->fm_rcr);
  58443. +}
  58444. +
  58445. +void fman_disable_rams_ecc(struct fman_fpm_regs *fpm_rg)
  58446. +{
  58447. + uint32_t tmp;
  58448. +
  58449. + tmp = ioread32be(&fpm_rg->fm_rcr);
  58450. + if (tmp & FPM_RAM_RAMS_ECC_EN_SRC_SEL)
  58451. + iowrite32be(tmp & ~FPM_RAM_IRAM_ECC_EN,
  58452. + &fpm_rg->fm_rcr);
  58453. + else
  58454. + iowrite32be(tmp & ~(FPM_RAM_RAMS_ECC_EN | FPM_RAM_IRAM_ECC_EN),
  58455. + &fpm_rg->fm_rcr);
  58456. +}
  58457. +
  58458. +int fman_set_exception(struct fman_rg *fman_rg,
  58459. + enum fman_exceptions exception,
  58460. + bool enable)
  58461. +{
  58462. + uint32_t tmp;
  58463. +
  58464. + switch (exception) {
  58465. + case(E_FMAN_EX_DMA_BUS_ERROR):
  58466. + tmp = ioread32be(&fman_rg->dma_rg->fmdmmr);
  58467. + if (enable)
  58468. + tmp |= DMA_MODE_BER;
  58469. + else
  58470. + tmp &= ~DMA_MODE_BER;
  58471. + /* disable bus error */
  58472. + iowrite32be(tmp, &fman_rg->dma_rg->fmdmmr);
  58473. + break;
  58474. + case(E_FMAN_EX_DMA_READ_ECC):
  58475. + case(E_FMAN_EX_DMA_SYSTEM_WRITE_ECC):
  58476. + case(E_FMAN_EX_DMA_FM_WRITE_ECC):
  58477. + tmp = ioread32be(&fman_rg->dma_rg->fmdmmr);
  58478. + if (enable)
  58479. + tmp |= DMA_MODE_ECC;
  58480. + else
  58481. + tmp &= ~DMA_MODE_ECC;
  58482. + iowrite32be(tmp, &fman_rg->dma_rg->fmdmmr);
  58483. + break;
  58484. + case(E_FMAN_EX_FPM_STALL_ON_TASKS):
  58485. + tmp = ioread32be(&fman_rg->fpm_rg->fmfp_ee);
  58486. + if (enable)
  58487. + tmp |= FPM_EV_MASK_STALL_EN;
  58488. + else
  58489. + tmp &= ~FPM_EV_MASK_STALL_EN;
  58490. + iowrite32be(tmp, &fman_rg->fpm_rg->fmfp_ee);
  58491. + break;
  58492. + case(E_FMAN_EX_FPM_SINGLE_ECC):
  58493. + tmp = ioread32be(&fman_rg->fpm_rg->fmfp_ee);
  58494. + if (enable)
  58495. + tmp |= FPM_EV_MASK_SINGLE_ECC_EN;
  58496. + else
  58497. + tmp &= ~FPM_EV_MASK_SINGLE_ECC_EN;
  58498. + iowrite32be(tmp, &fman_rg->fpm_rg->fmfp_ee);
  58499. + break;
  58500. + case(E_FMAN_EX_FPM_DOUBLE_ECC):
  58501. + tmp = ioread32be(&fman_rg->fpm_rg->fmfp_ee);
  58502. + if (enable)
  58503. + tmp |= FPM_EV_MASK_DOUBLE_ECC_EN;
  58504. + else
  58505. + tmp &= ~FPM_EV_MASK_DOUBLE_ECC_EN;
  58506. + iowrite32be(tmp, &fman_rg->fpm_rg->fmfp_ee);
  58507. + break;
  58508. + case(E_FMAN_EX_QMI_SINGLE_ECC):
  58509. + tmp = ioread32be(&fman_rg->qmi_rg->fmqm_ien);
  58510. + if (enable)
  58511. + tmp |= QMI_INTR_EN_SINGLE_ECC;
  58512. + else
  58513. + tmp &= ~QMI_INTR_EN_SINGLE_ECC;
  58514. + iowrite32be(tmp, &fman_rg->qmi_rg->fmqm_ien);
  58515. + break;
  58516. + case(E_FMAN_EX_QMI_DOUBLE_ECC):
  58517. + tmp = ioread32be(&fman_rg->qmi_rg->fmqm_eien);
  58518. + if (enable)
  58519. + tmp |= QMI_ERR_INTR_EN_DOUBLE_ECC;
  58520. + else
  58521. + tmp &= ~QMI_ERR_INTR_EN_DOUBLE_ECC;
  58522. + iowrite32be(tmp, &fman_rg->qmi_rg->fmqm_eien);
  58523. + break;
  58524. + case(E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID):
  58525. + tmp = ioread32be(&fman_rg->qmi_rg->fmqm_eien);
  58526. + if (enable)
  58527. + tmp |= QMI_ERR_INTR_EN_DEQ_FROM_DEF;
  58528. + else
  58529. + tmp &= ~QMI_ERR_INTR_EN_DEQ_FROM_DEF;
  58530. + iowrite32be(tmp, &fman_rg->qmi_rg->fmqm_eien);
  58531. + break;
  58532. + case(E_FMAN_EX_BMI_LIST_RAM_ECC):
  58533. + tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
  58534. + if (enable)
  58535. + tmp |= BMI_ERR_INTR_EN_LIST_RAM_ECC;
  58536. + else
  58537. + tmp &= ~BMI_ERR_INTR_EN_LIST_RAM_ECC;
  58538. + iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
  58539. + break;
  58540. + case(E_FMAN_EX_BMI_STORAGE_PROFILE_ECC):
  58541. + tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
  58542. + if (enable)
  58543. + tmp |= BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC;
  58544. + else
  58545. + tmp &= ~BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC;
  58546. + iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
  58547. + break;
  58548. + case(E_FMAN_EX_BMI_STATISTICS_RAM_ECC):
  58549. + tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
  58550. + if (enable)
  58551. + tmp |= BMI_ERR_INTR_EN_STATISTICS_RAM_ECC;
  58552. + else
  58553. + tmp &= ~BMI_ERR_INTR_EN_STATISTICS_RAM_ECC;
  58554. + iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
  58555. + break;
  58556. + case(E_FMAN_EX_BMI_DISPATCH_RAM_ECC):
  58557. + tmp = ioread32be(&fman_rg->bmi_rg->fmbm_ier);
  58558. + if (enable)
  58559. + tmp |= BMI_ERR_INTR_EN_DISPATCH_RAM_ECC;
  58560. + else
  58561. + tmp &= ~BMI_ERR_INTR_EN_DISPATCH_RAM_ECC;
  58562. + iowrite32be(tmp, &fman_rg->bmi_rg->fmbm_ier);
  58563. + break;
  58564. + case(E_FMAN_EX_IRAM_ECC):
  58565. + tmp = ioread32be(&fman_rg->fpm_rg->fm_rie);
  58566. + if (enable) {
  58567. + /* enable ECC if not enabled */
  58568. + fman_enable_rams_ecc(fman_rg->fpm_rg);
  58569. + /* enable ECC interrupts */
  58570. + tmp |= FPM_IRAM_ECC_ERR_EX_EN;
  58571. + } else {
  58572. + /* ECC mechanism may be disabled,
  58573. + * depending on driver status */
  58574. + fman_disable_rams_ecc(fman_rg->fpm_rg);
  58575. + tmp &= ~FPM_IRAM_ECC_ERR_EX_EN;
  58576. + }
  58577. + iowrite32be(tmp, &fman_rg->fpm_rg->fm_rie);
  58578. + break;
  58579. + case(E_FMAN_EX_MURAM_ECC):
  58580. + tmp = ioread32be(&fman_rg->fpm_rg->fm_rie);
  58581. + if (enable) {
  58582. + /* enable ECC if not enabled */
  58583. + fman_enable_rams_ecc(fman_rg->fpm_rg);
  58584. + /* enable ECC interrupts */
  58585. + tmp |= FPM_MURAM_ECC_ERR_EX_EN;
  58586. + } else {
  58587. + /* ECC mechanism may be disabled,
  58588. + * depending on driver status */
  58589. + fman_disable_rams_ecc(fman_rg->fpm_rg);
  58590. + tmp &= ~FPM_MURAM_ECC_ERR_EX_EN;
  58591. + }
  58592. + iowrite32be(tmp, &fman_rg->fpm_rg->fm_rie);
  58593. + break;
  58594. + default:
  58595. + return -EINVAL;
  58596. + }
  58597. + return 0;
  58598. +}
  58599. +
  58600. +void fman_get_revision(struct fman_fpm_regs *fpm_rg,
  58601. + uint8_t *major,
  58602. + uint8_t *minor)
  58603. +{
  58604. + uint32_t tmp;
  58605. +
  58606. + tmp = ioread32be(&fpm_rg->fm_ip_rev_1);
  58607. + *major = (uint8_t)((tmp & FPM_REV1_MAJOR_MASK) >> FPM_REV1_MAJOR_SHIFT);
  58608. + *minor = (uint8_t)((tmp & FPM_REV1_MINOR_MASK) >> FPM_REV1_MINOR_SHIFT);
  58609. +
  58610. +}
  58611. +
  58612. +uint32_t fman_get_counter(struct fman_rg *fman_rg,
  58613. + enum fman_counters reg_name)
  58614. +{
  58615. + uint32_t ret_val;
  58616. +
  58617. + switch (reg_name) {
  58618. + case(E_FMAN_COUNTERS_ENQ_TOTAL_FRAME):
  58619. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_etfc);
  58620. + break;
  58621. + case(E_FMAN_COUNTERS_DEQ_TOTAL_FRAME):
  58622. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dtfc);
  58623. + break;
  58624. + case(E_FMAN_COUNTERS_DEQ_0):
  58625. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc0);
  58626. + break;
  58627. + case(E_FMAN_COUNTERS_DEQ_1):
  58628. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc1);
  58629. + break;
  58630. + case(E_FMAN_COUNTERS_DEQ_2):
  58631. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc2);
  58632. + break;
  58633. + case(E_FMAN_COUNTERS_DEQ_3):
  58634. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dc3);
  58635. + break;
  58636. + case(E_FMAN_COUNTERS_DEQ_FROM_DEFAULT):
  58637. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dfdc);
  58638. + break;
  58639. + case(E_FMAN_COUNTERS_DEQ_FROM_CONTEXT):
  58640. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dfcc);
  58641. + break;
  58642. + case(E_FMAN_COUNTERS_DEQ_FROM_FD):
  58643. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dffc);
  58644. + break;
  58645. + case(E_FMAN_COUNTERS_DEQ_CONFIRM):
  58646. + ret_val = ioread32be(&fman_rg->qmi_rg->fmqm_dcc);
  58647. + break;
  58648. + default:
  58649. + ret_val = 0;
  58650. + }
  58651. + return ret_val;
  58652. +}
  58653. +
  58654. +int fman_modify_counter(struct fman_rg *fman_rg,
  58655. + enum fman_counters reg_name,
  58656. + uint32_t val)
  58657. +{
  58658. + /* When applicable (when there is an 'enable counters' bit,
  58659. + * check that counters are enabled */
  58660. + switch (reg_name) {
  58661. + case(E_FMAN_COUNTERS_ENQ_TOTAL_FRAME):
  58662. + case(E_FMAN_COUNTERS_DEQ_TOTAL_FRAME):
  58663. + case(E_FMAN_COUNTERS_DEQ_0):
  58664. + case(E_FMAN_COUNTERS_DEQ_1):
  58665. + case(E_FMAN_COUNTERS_DEQ_2):
  58666. + case(E_FMAN_COUNTERS_DEQ_3):
  58667. + case(E_FMAN_COUNTERS_DEQ_FROM_DEFAULT):
  58668. + case(E_FMAN_COUNTERS_DEQ_FROM_CONTEXT):
  58669. + case(E_FMAN_COUNTERS_DEQ_FROM_FD):
  58670. + case(E_FMAN_COUNTERS_DEQ_CONFIRM):
  58671. + if (!(ioread32be(&fman_rg->qmi_rg->fmqm_gc) &
  58672. + QMI_CFG_EN_COUNTERS))
  58673. + return -EINVAL;
  58674. + break;
  58675. + default:
  58676. + break;
  58677. + }
  58678. + /* Set counter */
  58679. + switch (reg_name) {
  58680. + case(E_FMAN_COUNTERS_ENQ_TOTAL_FRAME):
  58681. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_etfc);
  58682. + break;
  58683. + case(E_FMAN_COUNTERS_DEQ_TOTAL_FRAME):
  58684. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dtfc);
  58685. + break;
  58686. + case(E_FMAN_COUNTERS_DEQ_0):
  58687. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc0);
  58688. + break;
  58689. + case(E_FMAN_COUNTERS_DEQ_1):
  58690. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc1);
  58691. + break;
  58692. + case(E_FMAN_COUNTERS_DEQ_2):
  58693. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc2);
  58694. + break;
  58695. + case(E_FMAN_COUNTERS_DEQ_3):
  58696. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dc3);
  58697. + break;
  58698. + case(E_FMAN_COUNTERS_DEQ_FROM_DEFAULT):
  58699. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dfdc);
  58700. + break;
  58701. + case(E_FMAN_COUNTERS_DEQ_FROM_CONTEXT):
  58702. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dfcc);
  58703. + break;
  58704. + case(E_FMAN_COUNTERS_DEQ_FROM_FD):
  58705. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dffc);
  58706. + break;
  58707. + case(E_FMAN_COUNTERS_DEQ_CONFIRM):
  58708. + iowrite32be(val, &fman_rg->qmi_rg->fmqm_dcc);
  58709. + break;
  58710. + case(E_FMAN_COUNTERS_SEMAPHOR_ENTRY_FULL_REJECT):
  58711. + iowrite32be(val, &fman_rg->dma_rg->fmdmsefrc);
  58712. + break;
  58713. + case(E_FMAN_COUNTERS_SEMAPHOR_QUEUE_FULL_REJECT):
  58714. + iowrite32be(val, &fman_rg->dma_rg->fmdmsqfrc);
  58715. + break;
  58716. + case(E_FMAN_COUNTERS_SEMAPHOR_SYNC_REJECT):
  58717. + iowrite32be(val, &fman_rg->dma_rg->fmdmssrc);
  58718. + break;
  58719. + default:
  58720. + break;
  58721. + }
  58722. + return 0;
  58723. +}
  58724. +
  58725. +void fman_set_dma_emergency(struct fman_dma_regs *dma_rg,
  58726. + bool is_write,
  58727. + bool enable)
  58728. +{
  58729. + uint32_t msk;
  58730. +
  58731. + msk = (uint32_t)(is_write ? DMA_MODE_EMER_WRITE : DMA_MODE_EMER_READ);
  58732. +
  58733. + if (enable)
  58734. + iowrite32be(ioread32be(&dma_rg->fmdmmr) | msk,
  58735. + &dma_rg->fmdmmr);
  58736. + else /* disable */
  58737. + iowrite32be(ioread32be(&dma_rg->fmdmmr) & ~msk,
  58738. + &dma_rg->fmdmmr);
  58739. +}
  58740. +
  58741. +void fman_set_dma_ext_bus_pri(struct fman_dma_regs *dma_rg, uint32_t pri)
  58742. +{
  58743. + uint32_t tmp;
  58744. +
  58745. + tmp = ioread32be(&dma_rg->fmdmmr) |
  58746. + (pri << DMA_MODE_BUS_PRI_SHIFT);
  58747. +
  58748. + iowrite32be(tmp, &dma_rg->fmdmmr);
  58749. +}
  58750. +
  58751. +uint32_t fman_get_dma_status(struct fman_dma_regs *dma_rg)
  58752. +{
  58753. + return ioread32be(&dma_rg->fmdmsr);
  58754. +}
  58755. +
  58756. +void fman_force_intr(struct fman_rg *fman_rg,
  58757. + enum fman_exceptions exception)
  58758. +{
  58759. + switch (exception) {
  58760. + case E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID:
  58761. + iowrite32be(QMI_ERR_INTR_EN_DEQ_FROM_DEF,
  58762. + &fman_rg->qmi_rg->fmqm_eif);
  58763. + break;
  58764. + case E_FMAN_EX_QMI_SINGLE_ECC:
  58765. + iowrite32be(QMI_INTR_EN_SINGLE_ECC,
  58766. + &fman_rg->qmi_rg->fmqm_if);
  58767. + break;
  58768. + case E_FMAN_EX_QMI_DOUBLE_ECC:
  58769. + iowrite32be(QMI_ERR_INTR_EN_DOUBLE_ECC,
  58770. + &fman_rg->qmi_rg->fmqm_eif);
  58771. + break;
  58772. + case E_FMAN_EX_BMI_LIST_RAM_ECC:
  58773. + iowrite32be(BMI_ERR_INTR_EN_LIST_RAM_ECC,
  58774. + &fman_rg->bmi_rg->fmbm_ifr);
  58775. + break;
  58776. + case E_FMAN_EX_BMI_STORAGE_PROFILE_ECC:
  58777. + iowrite32be(BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC,
  58778. + &fman_rg->bmi_rg->fmbm_ifr);
  58779. + break;
  58780. + case E_FMAN_EX_BMI_STATISTICS_RAM_ECC:
  58781. + iowrite32be(BMI_ERR_INTR_EN_STATISTICS_RAM_ECC,
  58782. + &fman_rg->bmi_rg->fmbm_ifr);
  58783. + break;
  58784. + case E_FMAN_EX_BMI_DISPATCH_RAM_ECC:
  58785. + iowrite32be(BMI_ERR_INTR_EN_DISPATCH_RAM_ECC,
  58786. + &fman_rg->bmi_rg->fmbm_ifr);
  58787. + break;
  58788. + default:
  58789. + break;
  58790. + }
  58791. +}
  58792. +
  58793. +bool fman_is_qmi_halt_not_busy_state(struct fman_qmi_regs *qmi_rg)
  58794. +{
  58795. + return (bool)!!(ioread32be(&qmi_rg->fmqm_gs) & QMI_GS_HALT_NOT_BUSY);
  58796. +}
  58797. +void fman_resume(struct fman_fpm_regs *fpm_rg)
  58798. +{
  58799. + uint32_t tmp;
  58800. +
  58801. + tmp = ioread32be(&fpm_rg->fmfp_ee);
  58802. + /* clear tmp_reg event bits in order not to clear standing events */
  58803. + tmp &= ~(FPM_EV_MASK_DOUBLE_ECC |
  58804. + FPM_EV_MASK_STALL |
  58805. + FPM_EV_MASK_SINGLE_ECC);
  58806. + tmp |= FPM_EV_MASK_RELEASE_FM;
  58807. +
  58808. + iowrite32be(tmp, &fpm_rg->fmfp_ee);
  58809. +}
  58810. --- /dev/null
  58811. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_common.h
  58812. @@ -0,0 +1,1203 @@
  58813. +/*
  58814. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  58815. + *
  58816. + * Redistribution and use in source and binary forms, with or without
  58817. + * modification, are permitted provided that the following conditions are met:
  58818. + * * Redistributions of source code must retain the above copyright
  58819. + * notice, this list of conditions and the following disclaimer.
  58820. + * * Redistributions in binary form must reproduce the above copyright
  58821. + * notice, this list of conditions and the following disclaimer in the
  58822. + * documentation and/or other materials provided with the distribution.
  58823. + * * Neither the name of Freescale Semiconductor nor the
  58824. + * names of its contributors may be used to endorse or promote products
  58825. + * derived from this software without specific prior written permission.
  58826. + *
  58827. + *
  58828. + * ALTERNATIVELY, this software may be distributed under the terms of the
  58829. + * GNU General Public License ("GPL") as published by the Free Software
  58830. + * Foundation, either version 2 of that License or (at your option) any
  58831. + * later version.
  58832. + *
  58833. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  58834. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  58835. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  58836. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  58837. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  58838. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  58839. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  58840. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  58841. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  58842. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  58843. + */
  58844. +
  58845. +
  58846. +/******************************************************************************
  58847. + @File fm_common.h
  58848. +
  58849. + @Description FM internal structures and definitions.
  58850. +*//***************************************************************************/
  58851. +#ifndef __FM_COMMON_H
  58852. +#define __FM_COMMON_H
  58853. +
  58854. +#include "error_ext.h"
  58855. +#include "std_ext.h"
  58856. +#include "fm_pcd_ext.h"
  58857. +#include "fm_ext.h"
  58858. +#include "fm_port_ext.h"
  58859. +
  58860. +
  58861. +#define e_FM_PORT_TYPE_OH_HOST_COMMAND e_FM_PORT_TYPE_DUMMY
  58862. +
  58863. +#define CLS_PLAN_NUM_PER_GRP 8
  58864. +
  58865. +#define IP_OFFLOAD_PACKAGE_NUMBER 106
  58866. +#define CAPWAP_OFFLOAD_PACKAGE_NUMBER 108
  58867. +#define IS_OFFLOAD_PACKAGE(num) ((num == IP_OFFLOAD_PACKAGE_NUMBER) || (num == CAPWAP_OFFLOAD_PACKAGE_NUMBER))
  58868. +
  58869. +
  58870. +
  58871. +/**************************************************************************//**
  58872. + @Description Modules registers offsets
  58873. +*//***************************************************************************/
  58874. +#define FM_MM_MURAM 0x00000000
  58875. +#define FM_MM_BMI 0x00080000
  58876. +#define FM_MM_QMI 0x00080400
  58877. +#define FM_MM_PRS 0x000c7000
  58878. +#define FM_MM_KG 0x000C1000
  58879. +#define FM_MM_DMA 0x000C2000
  58880. +#define FM_MM_FPM 0x000C3000
  58881. +#define FM_MM_PLCR 0x000C0000
  58882. +#define FM_MM_IMEM 0x000C4000
  58883. +#define FM_MM_CGP 0x000DB000
  58884. +#define FM_MM_TRB(i) (0x000D0200 + 0x400 * (i))
  58885. +#if (DPAA_VERSION >= 11)
  58886. +#define FM_MM_SP 0x000dc000
  58887. +#endif /* (DPAA_VERSION >= 11) */
  58888. +
  58889. +
  58890. +/**************************************************************************//**
  58891. + @Description Enum for inter-module interrupts registration
  58892. +*//***************************************************************************/
  58893. +typedef enum e_FmEventModules{
  58894. + e_FM_MOD_PRS, /**< Parser event */
  58895. + e_FM_MOD_KG, /**< Keygen event */
  58896. + e_FM_MOD_PLCR, /**< Policer event */
  58897. + e_FM_MOD_10G_MAC, /**< 10G MAC event */
  58898. + e_FM_MOD_1G_MAC, /**< 1G MAC event */
  58899. + e_FM_MOD_TMR, /**< Timer event */
  58900. + e_FM_MOD_FMAN_CTRL, /**< FMAN Controller Timer event */
  58901. + e_FM_MOD_MACSEC,
  58902. + e_FM_MOD_DUMMY_LAST
  58903. +} e_FmEventModules;
  58904. +
  58905. +/**************************************************************************//**
  58906. + @Description Enum for interrupts types
  58907. +*//***************************************************************************/
  58908. +typedef enum e_FmIntrType {
  58909. + e_FM_INTR_TYPE_ERR,
  58910. + e_FM_INTR_TYPE_NORMAL
  58911. +} e_FmIntrType;
  58912. +
  58913. +/**************************************************************************//**
  58914. + @Description Enum for inter-module interrupts registration
  58915. +*//***************************************************************************/
  58916. +typedef enum e_FmInterModuleEvent
  58917. +{
  58918. + e_FM_EV_PRS = 0, /**< Parser event */
  58919. + e_FM_EV_ERR_PRS, /**< Parser error event */
  58920. + e_FM_EV_KG, /**< Keygen event */
  58921. + e_FM_EV_ERR_KG, /**< Keygen error event */
  58922. + e_FM_EV_PLCR, /**< Policer event */
  58923. + e_FM_EV_ERR_PLCR, /**< Policer error event */
  58924. + e_FM_EV_ERR_10G_MAC0, /**< 10G MAC 0 error event */
  58925. + e_FM_EV_ERR_10G_MAC1, /**< 10G MAC 1 error event */
  58926. + e_FM_EV_ERR_1G_MAC0, /**< 1G MAC 0 error event */
  58927. + e_FM_EV_ERR_1G_MAC1, /**< 1G MAC 1 error event */
  58928. + e_FM_EV_ERR_1G_MAC2, /**< 1G MAC 2 error event */
  58929. + e_FM_EV_ERR_1G_MAC3, /**< 1G MAC 3 error event */
  58930. + e_FM_EV_ERR_1G_MAC4, /**< 1G MAC 4 error event */
  58931. + e_FM_EV_ERR_1G_MAC5, /**< 1G MAC 5 error event */
  58932. + e_FM_EV_ERR_1G_MAC6, /**< 1G MAC 6 error event */
  58933. + e_FM_EV_ERR_1G_MAC7, /**< 1G MAC 7 error event */
  58934. + e_FM_EV_ERR_MACSEC_MAC0,
  58935. + e_FM_EV_TMR, /**< Timer event */
  58936. + e_FM_EV_10G_MAC0, /**< 10G MAC 0 event (Magic packet detection)*/
  58937. + e_FM_EV_10G_MAC1, /**< 10G MAC 1 event (Magic packet detection)*/
  58938. + e_FM_EV_1G_MAC0, /**< 1G MAC 0 event (Magic packet detection)*/
  58939. + e_FM_EV_1G_MAC1, /**< 1G MAC 1 event (Magic packet detection)*/
  58940. + e_FM_EV_1G_MAC2, /**< 1G MAC 2 (Magic packet detection)*/
  58941. + e_FM_EV_1G_MAC3, /**< 1G MAC 3 (Magic packet detection)*/
  58942. + e_FM_EV_1G_MAC4, /**< 1G MAC 4 (Magic packet detection)*/
  58943. + e_FM_EV_1G_MAC5, /**< 1G MAC 5 (Magic packet detection)*/
  58944. + e_FM_EV_1G_MAC6, /**< 1G MAC 6 (Magic packet detection)*/
  58945. + e_FM_EV_1G_MAC7, /**< 1G MAC 7 (Magic packet detection)*/
  58946. + e_FM_EV_MACSEC_MAC0, /**< MACSEC MAC 0 event */
  58947. + e_FM_EV_FMAN_CTRL_0, /**< Fman controller event 0 */
  58948. + e_FM_EV_FMAN_CTRL_1, /**< Fman controller event 1 */
  58949. + e_FM_EV_FMAN_CTRL_2, /**< Fman controller event 2 */
  58950. + e_FM_EV_FMAN_CTRL_3, /**< Fman controller event 3 */
  58951. + e_FM_EV_DUMMY_LAST
  58952. +} e_FmInterModuleEvent;
  58953. +
  58954. +
  58955. +#if defined(__MWERKS__) && !defined(__GNUC__)
  58956. +#pragma pack(push,1)
  58957. +#endif /* defined(__MWERKS__) && ... */
  58958. +
  58959. +/**************************************************************************//**
  58960. + @Description PCD KG scheme registers
  58961. +*//***************************************************************************/
  58962. +typedef _Packed struct t_FmPcdPlcrProfileRegs {
  58963. + volatile uint32_t fmpl_pemode; /* 0x090 FMPL_PEMODE - FM Policer Profile Entry Mode*/
  58964. + volatile uint32_t fmpl_pegnia; /* 0x094 FMPL_PEGNIA - FM Policer Profile Entry GREEN Next Invoked Action*/
  58965. + volatile uint32_t fmpl_peynia; /* 0x098 FMPL_PEYNIA - FM Policer Profile Entry YELLOW Next Invoked Action*/
  58966. + volatile uint32_t fmpl_pernia; /* 0x09C FMPL_PERNIA - FM Policer Profile Entry RED Next Invoked Action*/
  58967. + volatile uint32_t fmpl_pecir; /* 0x0A0 FMPL_PECIR - FM Policer Profile Entry Committed Information Rate*/
  58968. + volatile uint32_t fmpl_pecbs; /* 0x0A4 FMPL_PECBS - FM Policer Profile Entry Committed Burst Size*/
  58969. + volatile uint32_t fmpl_pepepir_eir; /* 0x0A8 FMPL_PEPIR_EIR - FM Policer Profile Entry Peak/Excess Information Rate*/
  58970. + volatile uint32_t fmpl_pepbs_ebs; /* 0x0AC FMPL_PEPBS_EBS - FM Policer Profile Entry Peak/Excess Information Rate*/
  58971. + volatile uint32_t fmpl_pelts; /* 0x0B0 FMPL_PELTS - FM Policer Profile Entry Last TimeStamp*/
  58972. + volatile uint32_t fmpl_pects; /* 0x0B4 FMPL_PECTS - FM Policer Profile Entry Committed Token Status*/
  58973. + volatile uint32_t fmpl_pepts_ets; /* 0x0B8 FMPL_PEPTS_ETS - FM Policer Profile Entry Peak/Excess Token Status*/
  58974. + volatile uint32_t fmpl_pegpc; /* 0x0BC FMPL_PEGPC - FM Policer Profile Entry GREEN Packet Counter*/
  58975. + volatile uint32_t fmpl_peypc; /* 0x0C0 FMPL_PEYPC - FM Policer Profile Entry YELLOW Packet Counter*/
  58976. + volatile uint32_t fmpl_perpc; /* 0x0C4 FMPL_PERPC - FM Policer Profile Entry RED Packet Counter */
  58977. + volatile uint32_t fmpl_perypc; /* 0x0C8 FMPL_PERYPC - FM Policer Profile Entry Recolored YELLOW Packet Counter*/
  58978. + volatile uint32_t fmpl_perrpc; /* 0x0CC FMPL_PERRPC - FM Policer Profile Entry Recolored RED Packet Counter*/
  58979. + volatile uint32_t fmpl_res1[12]; /* 0x0D0-0x0FF Reserved */
  58980. +} _PackedType t_FmPcdPlcrProfileRegs;
  58981. +
  58982. +
  58983. +typedef _Packed struct t_FmPcdCcCapwapReassmTimeoutParams {
  58984. + volatile uint32_t portIdAndCapwapReassmTbl;
  58985. + volatile uint32_t fqidForTimeOutFrames;
  58986. + volatile uint32_t timeoutRequestTime;
  58987. +}_PackedType t_FmPcdCcCapwapReassmTimeoutParams;
  58988. +
  58989. +/**************************************************************************//**
  58990. + @Description PCD CTRL Parameters Page
  58991. +*//***************************************************************************/
  58992. +typedef _Packed struct t_FmPcdCtrlParamsPage {
  58993. + volatile uint8_t reserved0[16];
  58994. + volatile uint32_t iprIpv4Nia;
  58995. + volatile uint32_t iprIpv6Nia;
  58996. + volatile uint8_t reserved1[24];
  58997. + volatile uint32_t ipfOptionsCounter;
  58998. + volatile uint8_t reserved2[12];
  58999. + volatile uint32_t misc;
  59000. + volatile uint32_t errorsDiscardMask;
  59001. + volatile uint32_t discardMask;
  59002. + volatile uint8_t reserved3[4];
  59003. + volatile uint32_t postBmiFetchNia;
  59004. + volatile uint8_t reserved4[172];
  59005. +} _PackedType t_FmPcdCtrlParamsPage;
  59006. +
  59007. +
  59008. +
  59009. +#if defined(__MWERKS__) && !defined(__GNUC__)
  59010. +#pragma pack(pop)
  59011. +#endif /* defined(__MWERKS__) && ... */
  59012. +
  59013. +
  59014. +/*for UNDER_CONSTRUCTION_FM_RMU_USE_SEC its defined in fm_ext.h*/
  59015. +typedef uint32_t t_FmFmanCtrl;
  59016. +
  59017. +#define FPM_PORT_FM_CTL1 0x00000001
  59018. +#define FPM_PORT_FM_CTL2 0x00000002
  59019. +
  59020. +
  59021. +
  59022. +typedef struct t_FmPcdCcFragScratchPoolCmdParams {
  59023. + uint32_t numOfBuffers;
  59024. + uint8_t bufferPoolId;
  59025. +} t_FmPcdCcFragScratchPoolCmdParams;
  59026. +
  59027. +typedef struct t_FmPcdCcReassmTimeoutParams {
  59028. + bool activate;
  59029. + uint8_t tsbs;
  59030. + uint32_t iprcpt;
  59031. +} t_FmPcdCcReassmTimeoutParams;
  59032. +
  59033. +typedef struct {
  59034. + uint8_t baseEntry;
  59035. + uint16_t numOfClsPlanEntries;
  59036. + uint32_t vectors[FM_PCD_MAX_NUM_OF_CLS_PLANS];
  59037. +} t_FmPcdKgInterModuleClsPlanSet;
  59038. +
  59039. +/**************************************************************************//**
  59040. + @Description Structure for binding a port to keygen schemes.
  59041. +*//***************************************************************************/
  59042. +typedef struct t_FmPcdKgInterModuleBindPortToSchemes {
  59043. + uint8_t hardwarePortId;
  59044. + uint8_t netEnvId;
  59045. + bool useClsPlan; /**< TRUE if this port uses the clsPlan mechanism */
  59046. + uint8_t numOfSchemes;
  59047. + uint8_t schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];
  59048. +} t_FmPcdKgInterModuleBindPortToSchemes;
  59049. +
  59050. +typedef struct {
  59051. + uint32_t nextCcNodeInfo;
  59052. + t_List node;
  59053. +} t_CcNodeInfo;
  59054. +
  59055. +typedef struct
  59056. +{
  59057. + t_Handle h_CcNode;
  59058. + uint16_t index;
  59059. + t_List node;
  59060. +}t_CcNodeInformation;
  59061. +#define CC_NODE_F_OBJECT(ptr) LIST_OBJECT(ptr, t_CcNodeInformation, node)
  59062. +
  59063. +typedef enum e_ModifyState
  59064. +{
  59065. + e_MODIFY_STATE_ADD = 0,
  59066. + e_MODIFY_STATE_REMOVE,
  59067. + e_MODIFY_STATE_CHANGE
  59068. +} e_ModifyState;
  59069. +
  59070. +typedef struct
  59071. +{
  59072. + t_Handle h_Manip;
  59073. + t_List node;
  59074. +}t_ManipInfo;
  59075. +#define CC_NEXT_NODE_F_OBJECT(ptr) LIST_OBJECT(ptr, t_CcNodeInfo, node)
  59076. +
  59077. +typedef struct {
  59078. + uint32_t type;
  59079. + uint8_t prOffset;
  59080. + uint16_t dataOffset;
  59081. + uint8_t internalBufferOffset;
  59082. + uint8_t numOfTasks;
  59083. + uint8_t numOfExtraTasks;
  59084. + uint8_t hardwarePortId;
  59085. + t_FmRevisionInfo revInfo;
  59086. + uint32_t nia;
  59087. + uint32_t discardMask;
  59088. +} t_GetCcParams;
  59089. +
  59090. +typedef struct {
  59091. + uint32_t type;
  59092. + int psoSize;
  59093. + uint32_t nia;
  59094. + t_FmFmanCtrl orFmanCtrl;
  59095. + bool overwrite;
  59096. + uint8_t ofpDpde;
  59097. +} t_SetCcParams;
  59098. +
  59099. +typedef struct {
  59100. + t_GetCcParams getCcParams;
  59101. + t_SetCcParams setCcParams;
  59102. +} t_FmPortGetSetCcParams;
  59103. +
  59104. +typedef struct {
  59105. + uint32_t type;
  59106. + bool sleep;
  59107. +} t_FmSetParams;
  59108. +
  59109. +typedef struct {
  59110. + uint32_t type;
  59111. + uint32_t fmqm_gs;
  59112. + uint32_t fm_npi;
  59113. + uint32_t fm_cld;
  59114. + uint32_t fmfp_extc;
  59115. +} t_FmGetParams;
  59116. +
  59117. +typedef struct {
  59118. + t_FmSetParams setParams;
  59119. + t_FmGetParams getParams;
  59120. +} t_FmGetSetParams;
  59121. +
  59122. +t_Error FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_Params);
  59123. +
  59124. +static __inline__ bool TRY_LOCK(t_Handle h_Spinlock, volatile bool *p_Flag)
  59125. +{
  59126. + uint32_t intFlags;
  59127. + if (h_Spinlock)
  59128. + intFlags = XX_LockIntrSpinlock(h_Spinlock);
  59129. + else
  59130. + intFlags = XX_DisableAllIntr();
  59131. +
  59132. + if (*p_Flag)
  59133. + {
  59134. + if (h_Spinlock)
  59135. + XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
  59136. + else
  59137. + XX_RestoreAllIntr(intFlags);
  59138. + return FALSE;
  59139. + }
  59140. + *p_Flag = TRUE;
  59141. +
  59142. + if (h_Spinlock)
  59143. + XX_UnlockIntrSpinlock(h_Spinlock, intFlags);
  59144. + else
  59145. + XX_RestoreAllIntr(intFlags);
  59146. +
  59147. + return TRUE;
  59148. +}
  59149. +
  59150. +#define RELEASE_LOCK(_flag) _flag = FALSE;
  59151. +
  59152. +/**************************************************************************//**
  59153. + @Collection Defines used for manipulation CC and BMI
  59154. + @{
  59155. +*//***************************************************************************/
  59156. +#define INTERNAL_CONTEXT_OFFSET 0x80000000
  59157. +#define OFFSET_OF_PR 0x40000000
  59158. +#define MANIP_EXTRA_SPACE 0x20000000
  59159. +#define NUM_OF_TASKS 0x10000000
  59160. +#define OFFSET_OF_DATA 0x08000000
  59161. +#define HW_PORT_ID 0x04000000
  59162. +#define FM_REV 0x02000000
  59163. +#define GET_NIA_FPNE 0x01000000
  59164. +#define GET_NIA_PNDN 0x00800000
  59165. +#define NUM_OF_EXTRA_TASKS 0x00400000
  59166. +#define DISCARD_MASK 0x00200000
  59167. +
  59168. +#define UPDATE_NIA_PNEN 0x80000000
  59169. +#define UPDATE_PSO 0x40000000
  59170. +#define UPDATE_NIA_PNDN 0x20000000
  59171. +#define UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY 0x10000000
  59172. +#define UPDATE_OFP_DPTE 0x08000000
  59173. +#define UPDATE_NIA_FENE 0x04000000
  59174. +#define UPDATE_NIA_CMNE 0x02000000
  59175. +#define UPDATE_NIA_FPNE 0x01000000
  59176. +/* @} */
  59177. +
  59178. +/**************************************************************************//**
  59179. + @Collection Defines used for manipulation CC and CC
  59180. + @{
  59181. +*//***************************************************************************/
  59182. +#define UPDATE_NIA_ENQ_WITHOUT_DMA 0x80000000
  59183. +#define UPDATE_CC_WITH_TREE 0x40000000
  59184. +#define UPDATE_CC_WITH_DELETE_TREE 0x20000000
  59185. +#define UPDATE_KG_NIA_CC_WA 0x10000000
  59186. +#define UPDATE_KG_OPT_MODE 0x08000000
  59187. +#define UPDATE_KG_NIA 0x04000000
  59188. +#define UPDATE_CC_SHADOW_CLEAR 0x02000000
  59189. +/* @} */
  59190. +
  59191. +#define UPDATE_FPM_BRKC_SLP 0x80000000
  59192. +#define UPDATE_FPM_EXTC 0x40000000
  59193. +#define UPDATE_FPM_EXTC_CLEAR 0x20000000
  59194. +#define GET_FMQM_GS 0x10000000
  59195. +#define GET_FM_NPI 0x08000000
  59196. +#define GET_FMFP_EXTC 0x04000000
  59197. +#define CLEAR_IRAM_READY 0x02000000
  59198. +#define UPDATE_FM_CLD 0x01000000
  59199. +#define GET_FM_CLD 0x00800000
  59200. +#define FM_MAX_NUM_OF_PORTS (FM_MAX_NUM_OF_OH_PORTS + \
  59201. + FM_MAX_NUM_OF_1G_RX_PORTS + \
  59202. + FM_MAX_NUM_OF_10G_RX_PORTS + \
  59203. + FM_MAX_NUM_OF_1G_TX_PORTS + \
  59204. + FM_MAX_NUM_OF_10G_TX_PORTS)
  59205. +
  59206. +#define MODULE_NAME_SIZE 30
  59207. +#define DUMMY_PORT_ID 0
  59208. +
  59209. +#define FM_LIODN_OFFSET_MASK 0x3FF
  59210. +
  59211. +/**************************************************************************//**
  59212. + @Description NIA Description
  59213. +*//***************************************************************************/
  59214. +#define NIA_ENG_MASK 0x007C0000
  59215. +#define NIA_AC_MASK 0x0003ffff
  59216. +
  59217. +#define NIA_ORDER_RESTOR 0x00800000
  59218. +#define NIA_ENG_FM_CTL 0x00000000
  59219. +#define NIA_ENG_PRS 0x00440000
  59220. +#define NIA_ENG_KG 0x00480000
  59221. +#define NIA_ENG_PLCR 0x004C0000
  59222. +#define NIA_ENG_BMI 0x00500000
  59223. +#define NIA_ENG_QMI_ENQ 0x00540000
  59224. +#define NIA_ENG_QMI_DEQ 0x00580000
  59225. +
  59226. +#define NIA_FM_CTL_AC_CC 0x00000006
  59227. +#define NIA_FM_CTL_AC_HC 0x0000000C
  59228. +#define NIA_FM_CTL_AC_IND_MODE_TX 0x00000008
  59229. +#define NIA_FM_CTL_AC_IND_MODE_RX 0x0000000A
  59230. +#define NIA_FM_CTL_AC_POP_TO_N_STEP 0x0000000e
  59231. +#define NIA_FM_CTL_AC_PRE_BMI_FETCH_HEADER 0x00000010
  59232. +#define NIA_FM_CTL_AC_PRE_BMI_FETCH_FULL_FRAME 0x00000018
  59233. +#define NIA_FM_CTL_AC_POST_BMI_FETCH 0x00000012
  59234. +#define NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME 0x0000001A
  59235. +#define NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME 0x0000001E
  59236. +#define NIA_FM_CTL_AC_POST_BMI_ENQ_ORR 0x00000014
  59237. +#define NIA_FM_CTL_AC_POST_BMI_ENQ 0x00000022
  59238. +#define NIA_FM_CTL_AC_PRE_CC 0x00000020
  59239. +#define NIA_FM_CTL_AC_POST_TX 0x00000024
  59240. +/* V3 only */
  59241. +#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME 0x00000028
  59242. +#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_DISCARD_FRAME 0x0000002A
  59243. +#define NIA_FM_CTL_AC_NO_IPACC_POP_TO_N_STEP 0x0000002C
  59244. +
  59245. +#define NIA_BMI_AC_ENQ_FRAME 0x00000002
  59246. +#define NIA_BMI_AC_TX_RELEASE 0x000002C0
  59247. +#define NIA_BMI_AC_RELEASE 0x000000C0
  59248. +#define NIA_BMI_AC_DISCARD 0x000000C1
  59249. +#define NIA_BMI_AC_TX 0x00000274
  59250. +#define NIA_BMI_AC_FETCH 0x00000208
  59251. +#define NIA_BMI_AC_MASK 0x000003FF
  59252. +
  59253. +#define NIA_KG_DIRECT 0x00000100
  59254. +#define NIA_KG_CC_EN 0x00000200
  59255. +#define NIA_PLCR_ABSOLUTE 0x00008000
  59256. +
  59257. +#define NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA 0x00000202
  59258. +
  59259. +#if defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || defined(FM_ERROR_VSP_NO_MATCH_SW006)
  59260. +#define GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd) \
  59261. + (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
  59262. + (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME) : \
  59263. + (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME))
  59264. +#define GET_NIA_BMI_AC_DISCARD_FRAME(h_FmPcd) \
  59265. + (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
  59266. + (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME) : \
  59267. + (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_DISCARD_FRAME))
  59268. +#define GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME() \
  59269. + (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME)
  59270. +#else
  59271. +#define GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd) \
  59272. + (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
  59273. + (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME) : \
  59274. + (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME))
  59275. +#define GET_NIA_BMI_AC_DISCARD_FRAME(h_FmPcd) \
  59276. + (uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \
  59277. + (NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME) : \
  59278. + (NIA_ENG_BMI | NIA_BMI_AC_DISCARD))
  59279. +#define GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME() \
  59280. + (NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)
  59281. +#endif /* defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || ... */
  59282. +
  59283. +/**************************************************************************//**
  59284. + @Description CTRL Parameters Page defines
  59285. +*//***************************************************************************/
  59286. +#define FM_CTL_PARAMS_PAGE_OP_FIX_EN 0x80000000
  59287. +#define FM_CTL_PARAMS_PAGE_OFFLOAD_SUPPORT_EN 0x40000000
  59288. +#define FM_CTL_PARAMS_PAGE_ALWAYS_ON 0x00000100
  59289. +
  59290. +#define FM_CTL_PARAMS_PAGE_ERROR_VSP_MASK 0x0000003f
  59291. +
  59292. +/**************************************************************************//**
  59293. + @Description Port Id defines
  59294. +*//***************************************************************************/
  59295. +#if (DPAA_VERSION == 10)
  59296. +#define BASE_OH_PORTID 1
  59297. +#else
  59298. +#define BASE_OH_PORTID 2
  59299. +#endif /* (DPAA_VERSION == 10) */
  59300. +#define BASE_1G_RX_PORTID 8
  59301. +#define BASE_10G_RX_PORTID 0x10
  59302. +#define BASE_1G_TX_PORTID 0x28
  59303. +#define BASE_10G_TX_PORTID 0x30
  59304. +
  59305. +#define FM_PCD_PORT_OH_BASE_INDX 0
  59306. +#define FM_PCD_PORT_1G_RX_BASE_INDX (FM_PCD_PORT_OH_BASE_INDX+FM_MAX_NUM_OF_OH_PORTS)
  59307. +#define FM_PCD_PORT_10G_RX_BASE_INDX (FM_PCD_PORT_1G_RX_BASE_INDX+FM_MAX_NUM_OF_1G_RX_PORTS)
  59308. +#define FM_PCD_PORT_1G_TX_BASE_INDX (FM_PCD_PORT_10G_RX_BASE_INDX+FM_MAX_NUM_OF_10G_RX_PORTS)
  59309. +#define FM_PCD_PORT_10G_TX_BASE_INDX (FM_PCD_PORT_1G_TX_BASE_INDX+FM_MAX_NUM_OF_1G_TX_PORTS)
  59310. +
  59311. +#if (FM_MAX_NUM_OF_OH_PORTS > 0)
  59312. +#define CHECK_PORT_ID_OH_PORTS(_relativePortId) \
  59313. + if ((_relativePortId) >= FM_MAX_NUM_OF_OH_PORTS) \
  59314. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal OH_PORT port id"))
  59315. +#else
  59316. +#define CHECK_PORT_ID_OH_PORTS(_relativePortId) \
  59317. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal OH_PORT port id"))
  59318. +#endif
  59319. +#if (FM_MAX_NUM_OF_1G_RX_PORTS > 0)
  59320. +#define CHECK_PORT_ID_1G_RX_PORTS(_relativePortId) \
  59321. + if ((_relativePortId) >= FM_MAX_NUM_OF_1G_RX_PORTS) \
  59322. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_RX_PORT port id"))
  59323. +#else
  59324. +#define CHECK_PORT_ID_1G_RX_PORTS(_relativePortId) \
  59325. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_RX_PORT port id"))
  59326. +#endif
  59327. +#if (FM_MAX_NUM_OF_10G_RX_PORTS > 0)
  59328. +#define CHECK_PORT_ID_10G_RX_PORTS(_relativePortId) \
  59329. + if ((_relativePortId) >= FM_MAX_NUM_OF_10G_RX_PORTS) \
  59330. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_RX_PORT port id"))
  59331. +#else
  59332. +#define CHECK_PORT_ID_10G_RX_PORTS(_relativePortId) \
  59333. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_RX_PORT port id"))
  59334. +#endif
  59335. +#if (FM_MAX_NUM_OF_1G_TX_PORTS > 0)
  59336. +#define CHECK_PORT_ID_1G_TX_PORTS(_relativePortId) \
  59337. + if ((_relativePortId) >= FM_MAX_NUM_OF_1G_TX_PORTS) \
  59338. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_TX_PORT port id"))
  59339. +#else
  59340. +#define CHECK_PORT_ID_1G_TX_PORTS(_relativePortId) \
  59341. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_TX_PORT port id"))
  59342. +#endif
  59343. +#if (FM_MAX_NUM_OF_10G_TX_PORTS > 0)
  59344. +#define CHECK_PORT_ID_10G_TX_PORTS(_relativePortId) \
  59345. + if ((_relativePortId) >= FM_MAX_NUM_OF_10G_TX_PORTS) \
  59346. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_TX_PORT port id"))
  59347. +#else
  59348. +#define CHECK_PORT_ID_10G_TX_PORTS(_relativePortId) \
  59349. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_TX_PORT port id"))
  59350. +#endif
  59351. +
  59352. +uint8_t SwPortIdToHwPortId(e_FmPortType type, uint8_t relativePortId, uint8_t majorRev, uint8_t minorRev);
  59353. +
  59354. +#define HW_PORT_ID_TO_SW_PORT_ID(_relativePortId, hardwarePortId) \
  59355. +{ if (((hardwarePortId) >= BASE_OH_PORTID) && \
  59356. + ((hardwarePortId) < BASE_OH_PORTID+FM_MAX_NUM_OF_OH_PORTS)) \
  59357. + _relativePortId = (uint8_t)((hardwarePortId)-BASE_OH_PORTID); \
  59358. + else if (((hardwarePortId) >= BASE_10G_TX_PORTID) && \
  59359. + ((hardwarePortId) < BASE_10G_TX_PORTID+FM_MAX_NUM_OF_10G_TX_PORTS)) \
  59360. + _relativePortId = (uint8_t)((hardwarePortId)-BASE_10G_TX_PORTID); \
  59361. + else if (((hardwarePortId) >= BASE_1G_TX_PORTID) && \
  59362. + ((hardwarePortId) < BASE_1G_TX_PORTID+FM_MAX_NUM_OF_1G_TX_PORTS)) \
  59363. + _relativePortId = (uint8_t)((hardwarePortId)-BASE_1G_TX_PORTID); \
  59364. + else if (((hardwarePortId) >= BASE_10G_RX_PORTID) && \
  59365. + ((hardwarePortId) < BASE_10G_RX_PORTID+FM_MAX_NUM_OF_10G_RX_PORTS)) \
  59366. + _relativePortId = (uint8_t)((hardwarePortId)-BASE_10G_RX_PORTID); \
  59367. + else if (((hardwarePortId) >= BASE_1G_RX_PORTID) && \
  59368. + ((hardwarePortId) < BASE_1G_RX_PORTID+FM_MAX_NUM_OF_1G_RX_PORTS)) \
  59369. + _relativePortId = (uint8_t)((hardwarePortId)-BASE_1G_RX_PORTID); \
  59370. + else { \
  59371. + _relativePortId = (uint8_t)DUMMY_PORT_ID; \
  59372. + ASSERT_COND(TRUE); \
  59373. + } \
  59374. +}
  59375. +
  59376. +#define HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId) \
  59377. +do { \
  59378. + if (((hardwarePortId) >= BASE_OH_PORTID) && ((hardwarePortId) < BASE_OH_PORTID+FM_MAX_NUM_OF_OH_PORTS)) \
  59379. + swPortIndex = (uint8_t)((hardwarePortId)-BASE_OH_PORTID+FM_PCD_PORT_OH_BASE_INDX); \
  59380. + else if (((hardwarePortId) >= BASE_1G_RX_PORTID) && \
  59381. + ((hardwarePortId) < BASE_1G_RX_PORTID+FM_MAX_NUM_OF_1G_RX_PORTS)) \
  59382. + swPortIndex = (uint8_t)((hardwarePortId)-BASE_1G_RX_PORTID+FM_PCD_PORT_1G_RX_BASE_INDX); \
  59383. + else if (((hardwarePortId) >= BASE_10G_RX_PORTID) && \
  59384. + ((hardwarePortId) < BASE_10G_RX_PORTID+FM_MAX_NUM_OF_10G_RX_PORTS)) \
  59385. + swPortIndex = (uint8_t)((hardwarePortId)-BASE_10G_RX_PORTID+FM_PCD_PORT_10G_RX_BASE_INDX); \
  59386. + else if (((hardwarePortId) >= BASE_1G_TX_PORTID) && \
  59387. + ((hardwarePortId) < BASE_1G_TX_PORTID+FM_MAX_NUM_OF_1G_TX_PORTS)) \
  59388. + swPortIndex = (uint8_t)((hardwarePortId)-BASE_1G_TX_PORTID+FM_PCD_PORT_1G_TX_BASE_INDX); \
  59389. + else if (((hardwarePortId) >= BASE_10G_TX_PORTID) && \
  59390. + ((hardwarePortId) < BASE_10G_TX_PORTID+FM_MAX_NUM_OF_10G_TX_PORTS)) \
  59391. + swPortIndex = (uint8_t)((hardwarePortId)-BASE_10G_TX_PORTID+FM_PCD_PORT_10G_TX_BASE_INDX); \
  59392. + else ASSERT_COND(FALSE); \
  59393. +} while (0)
  59394. +
  59395. +#define SW_PORT_INDX_TO_HW_PORT_ID(hardwarePortId, swPortIndex) \
  59396. +do { \
  59397. + if (((swPortIndex) >= FM_PCD_PORT_OH_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_1G_RX_BASE_INDX)) \
  59398. + hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_OH_BASE_INDX+BASE_OH_PORTID); \
  59399. + else if (((swPortIndex) >= FM_PCD_PORT_1G_RX_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_10G_RX_BASE_INDX)) \
  59400. + hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_1G_RX_BASE_INDX+BASE_1G_RX_PORTID); \
  59401. + else if (((swPortIndex) >= FM_PCD_PORT_10G_RX_BASE_INDX) && ((swPortIndex) < FM_MAX_NUM_OF_PORTS)) \
  59402. + hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_10G_RX_BASE_INDX+BASE_10G_RX_PORTID); \
  59403. + else if (((swPortIndex) >= FM_PCD_PORT_1G_TX_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_10G_TX_BASE_INDX)) \
  59404. + hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_1G_TX_BASE_INDX+BASE_1G_TX_PORTID); \
  59405. + else if (((swPortIndex) >= FM_PCD_PORT_10G_TX_BASE_INDX) && ((swPortIndex) < FM_MAX_NUM_OF_PORTS)) \
  59406. + hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_10G_TX_BASE_INDX+BASE_10G_TX_PORTID); \
  59407. + else ASSERT_COND(FALSE); \
  59408. +} while (0)
  59409. +
  59410. +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)
  59411. +#define BMI_FIFO_UNITS 0x100
  59412. +
  59413. +typedef struct {
  59414. + void (*f_Isr) (t_Handle h_Arg);
  59415. + t_Handle h_SrcHandle;
  59416. + uint8_t guestId;
  59417. +} t_FmIntrSrc;
  59418. +
  59419. +#define ILLEGAL_HDR_NUM 0xFF
  59420. +#define NO_HDR_NUM FM_PCD_PRS_NUM_OF_HDRS
  59421. +
  59422. +#define IS_PRIVATE_HEADER(hdr) (((hdr) == HEADER_TYPE_USER_DEFINED_SHIM1) || \
  59423. + ((hdr) == HEADER_TYPE_USER_DEFINED_SHIM2))
  59424. +#define IS_SPECIAL_HEADER(hdr) ((hdr) == HEADER_TYPE_MACSEC)
  59425. +
  59426. +static __inline__ uint8_t GetPrsHdrNum(e_NetHeaderType hdr)
  59427. +{
  59428. + switch (hdr)
  59429. + { case (HEADER_TYPE_ETH): return 0;
  59430. + case (HEADER_TYPE_LLC_SNAP): return 1;
  59431. + case (HEADER_TYPE_VLAN): return 2;
  59432. + case (HEADER_TYPE_PPPoE): return 3;
  59433. + case (HEADER_TYPE_PPP): return 3;
  59434. + case (HEADER_TYPE_MPLS): return 4;
  59435. + case (HEADER_TYPE_IPv4): return 5;
  59436. + case (HEADER_TYPE_IPv6): return 6;
  59437. + case (HEADER_TYPE_GRE): return 7;
  59438. + case (HEADER_TYPE_MINENCAP): return 8;
  59439. + case (HEADER_TYPE_USER_DEFINED_L3): return 9;
  59440. + case (HEADER_TYPE_TCP): return 10;
  59441. + case (HEADER_TYPE_UDP): return 11;
  59442. + case (HEADER_TYPE_IPSEC_AH):
  59443. + case (HEADER_TYPE_IPSEC_ESP): return 12;
  59444. + case (HEADER_TYPE_SCTP): return 13;
  59445. + case (HEADER_TYPE_DCCP): return 14;
  59446. + case (HEADER_TYPE_USER_DEFINED_L4): return 15;
  59447. + case (HEADER_TYPE_USER_DEFINED_SHIM1):
  59448. + case (HEADER_TYPE_USER_DEFINED_SHIM2):
  59449. + case (HEADER_TYPE_MACSEC): return NO_HDR_NUM;
  59450. + default:
  59451. + return ILLEGAL_HDR_NUM;
  59452. + }
  59453. +}
  59454. +
  59455. +#define FM_PCD_MAX_NUM_OF_OPTIONS(clsPlanEntries) ((clsPlanEntries==256)? 8:((clsPlanEntries==128)? 7: ((clsPlanEntries==64)? 6: ((clsPlanEntries==32)? 5:0))))
  59456. +
  59457. +
  59458. +/**************************************************************************//**
  59459. + @Description A structure for initializing a keygen classification plan group
  59460. +*//***************************************************************************/
  59461. +typedef struct t_FmPcdKgInterModuleClsPlanGrpParams {
  59462. + uint8_t netEnvId; /* IN */
  59463. + bool grpExists; /* OUT (unused in FmPcdKgBuildClsPlanGrp)*/
  59464. + uint8_t clsPlanGrpId; /* OUT */
  59465. + bool emptyClsPlanGrp; /* OUT */
  59466. + uint8_t numOfOptions; /* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/
  59467. + protocolOpt_t options[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
  59468. + /* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/
  59469. + uint32_t optVectors[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];
  59470. + /* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/
  59471. +} t_FmPcdKgInterModuleClsPlanGrpParams;
  59472. +
  59473. +typedef struct t_FmPcdLock {
  59474. + t_Handle h_Spinlock;
  59475. + volatile bool flag;
  59476. + t_List node;
  59477. +} t_FmPcdLock;
  59478. +#define FM_PCD_LOCK_OBJ(ptr) LIST_OBJECT(ptr, t_FmPcdLock, node)
  59479. +
  59480. +
  59481. +typedef t_Error (t_FmPortGetSetCcParamsCallback) (t_Handle h_FmPort,
  59482. + t_FmPortGetSetCcParams *p_FmPortGetSetCcParams);
  59483. +
  59484. +
  59485. +/***********************************************************************/
  59486. +/* Common API for FM-PCD module */
  59487. +/***********************************************************************/
  59488. +t_Handle FmPcdGetHcHandle(t_Handle h_FmPcd);
  59489. +uint32_t FmPcdGetSwPrsOffset(t_Handle h_FmPcd, e_NetHeaderType hdr, uint8_t indexPerHdr);
  59490. +uint32_t FmPcdGetLcv(t_Handle h_FmPcd, uint32_t netEnvId, uint8_t hdrNum);
  59491. +uint32_t FmPcdGetMacsecLcv(t_Handle h_FmPcd, uint32_t netEnvId);
  59492. +void FmPcdIncNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId);
  59493. +void FmPcdDecNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId);
  59494. +uint8_t FmPcdGetNetEnvId(t_Handle h_NetEnv);
  59495. +void FmPcdPortRegister(t_Handle h_FmPcd, t_Handle h_FmPort, uint8_t hardwarePortId);
  59496. +uint32_t FmPcdLock(t_Handle h_FmPcd);
  59497. +void FmPcdUnlock(t_Handle h_FmPcd, uint32_t intFlags);
  59498. +bool FmPcdNetEnvIsHdrExist(t_Handle h_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);
  59499. +t_Error FmPcdFragHcScratchPoolInit(t_Handle h_FmPcd, uint8_t scratchBpid);
  59500. +t_Error FmPcdRegisterReassmPort(t_Handle h_FmPcd, t_Handle h_IpReasmCommonPramTbl);
  59501. +t_Error FmPcdUnregisterReassmPort(t_Handle h_FmPcd, t_Handle h_IpReasmCommonPramTbl);
  59502. +bool FmPcdIsAdvancedOffloadSupported(t_Handle h_FmPcd);
  59503. +bool FmPcdLockTryLockAll(t_Handle h_FmPcd);
  59504. +void FmPcdLockUnlockAll(t_Handle h_FmPcd);
  59505. +t_Error FmPcdHcSync(t_Handle h_FmPcd);
  59506. +t_Handle FmGetPcd(t_Handle h_Fm);
  59507. +/***********************************************************************/
  59508. +/* Common API for FM-PCD KG module */
  59509. +/***********************************************************************/
  59510. +uint8_t FmPcdKgGetClsPlanGrpBase(t_Handle h_FmPcd, uint8_t clsPlanGrp);
  59511. +uint16_t FmPcdKgGetClsPlanGrpSize(t_Handle h_FmPcd, uint8_t clsPlanGrp);
  59512. +t_Error FmPcdKgBuildClsPlanGrp(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_Grp, t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet);
  59513. +
  59514. +uint8_t FmPcdKgGetSchemeId(t_Handle h_Scheme);
  59515. +#if (DPAA_VERSION >= 11)
  59516. +bool FmPcdKgGetVspe(t_Handle h_Scheme);
  59517. +#endif /* (DPAA_VERSION >= 11) */
  59518. +uint8_t FmPcdKgGetRelativeSchemeId(t_Handle h_FmPcd, uint8_t schemeId);
  59519. +void FmPcdKgDestroyClsPlanGrp(t_Handle h_FmPcd, uint8_t grpId);
  59520. +t_Error FmPcdKgCheckInvalidateSchemeSw(t_Handle h_Scheme);
  59521. +t_Error FmPcdKgBuildBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_BindPortToSchemes, uint32_t *p_SpReg, bool add);
  59522. +bool FmPcdKgHwSchemeIsValid(uint32_t schemeModeReg);
  59523. +uint32_t FmPcdKgBuildWriteSchemeActionReg(uint8_t schemeId, bool updateCounter);
  59524. +uint32_t FmPcdKgBuildReadSchemeActionReg(uint8_t schemeId);
  59525. +uint32_t FmPcdKgBuildWriteClsPlanBlockActionReg(uint8_t grpId);
  59526. +uint32_t FmPcdKgBuildWritePortSchemeBindActionReg(uint8_t hardwarePortId);
  59527. +uint32_t FmPcdKgBuildReadPortSchemeBindActionReg(uint8_t hardwarePortId);
  59528. +uint32_t FmPcdKgBuildWritePortClsPlanBindActionReg(uint8_t hardwarePortId);
  59529. +bool FmPcdKgIsSchemeValidSw(t_Handle h_Scheme);
  59530. +
  59531. +t_Error FmPcdKgBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind);
  59532. +t_Error FmPcdKgUnbindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind);
  59533. +uint32_t FmPcdKgGetRequiredAction(t_Handle h_FmPcd, uint8_t schemeId);
  59534. +uint32_t FmPcdKgGetRequiredActionFlag(t_Handle h_FmPcd, uint8_t schemeId);
  59535. +e_FmPcdDoneAction FmPcdKgGetDoneAction(t_Handle h_FmPcd, uint8_t schemeId);
  59536. +e_FmPcdEngine FmPcdKgGetNextEngine(t_Handle h_FmPcd, uint8_t schemeId);
  59537. +void FmPcdKgUpdateRequiredAction(t_Handle h_Scheme, uint32_t requiredAction);
  59538. +bool FmPcdKgIsDirectPlcr(t_Handle h_FmPcd, uint8_t schemeId);
  59539. +bool FmPcdKgIsDistrOnPlcrProfile(t_Handle h_FmPcd, uint8_t schemeId);
  59540. +uint16_t FmPcdKgGetRelativeProfileId(t_Handle h_FmPcd, uint8_t schemeId);
  59541. +t_Handle FmPcdKgGetSchemeHandle(t_Handle h_FmPcd, uint8_t relativeSchemeId);
  59542. +bool FmPcdKgIsSchemeHasOwners(t_Handle h_Scheme);
  59543. +t_Error FmPcdKgCcGetSetParams(t_Handle h_FmPcd, t_Handle h_Scheme, uint32_t requiredAction, uint32_t value);
  59544. +t_Error FmPcdKgSetOrBindToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t netEnvId, protocolOpt_t *p_OptArray, uint8_t *p_ClsPlanGrpId, bool *p_IsEmptyClsPlanGrp);
  59545. +t_Error FmPcdKgDeleteOrUnbindPortToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t clsPlanGrpId);
  59546. +
  59547. +/***********************************************************************/
  59548. +/* Common API for FM-PCD parser module */
  59549. +/***********************************************************************/
  59550. +t_Error FmPcdPrsIncludePortInStatistics(t_Handle p_FmPcd, uint8_t hardwarePortId, bool include);
  59551. +
  59552. +/***********************************************************************/
  59553. +/* Common API for FM-PCD policer module */
  59554. +/***********************************************************************/
  59555. +t_Error FmPcdPlcrAllocProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId, uint16_t numOfProfiles);
  59556. +t_Error FmPcdPlcrFreeProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId);
  59557. +bool FmPcdPlcrIsProfileValid(t_Handle h_FmPcd, uint16_t absoluteProfileId);
  59558. +uint16_t FmPcdPlcrGetPortProfilesBase(t_Handle h_FmPcd, uint8_t hardwarePortId);
  59559. +uint16_t FmPcdPlcrGetPortNumOfProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId);
  59560. +uint32_t FmPcdPlcrBuildWritePlcrActionRegs(uint16_t absoluteProfileId);
  59561. +uint32_t FmPcdPlcrBuildCounterProfileReg(e_FmPcdPlcrProfileCounters counter);
  59562. +uint32_t FmPcdPlcrBuildWritePlcrActionReg(uint16_t absoluteProfileId);
  59563. +uint32_t FmPcdPlcrBuildReadPlcrActionReg(uint16_t absoluteProfileId);
  59564. +uint16_t FmPcdPlcrProfileGetAbsoluteId(t_Handle h_Profile);
  59565. +t_Error FmPcdPlcrGetAbsoluteIdByProfileParams(t_Handle h_FmPcd,
  59566. + e_FmPcdProfileTypeSelection profileType,
  59567. + t_Handle h_FmPort,
  59568. + uint16_t relativeProfile,
  59569. + uint16_t *p_AbsoluteId);
  59570. +void FmPcdPlcrInvalidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
  59571. +void FmPcdPlcrValidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
  59572. +bool FmPcdPlcrHwProfileIsValid(uint32_t profileModeReg);
  59573. +uint32_t FmPcdPlcrGetRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId);
  59574. +uint32_t FmPcdPlcrGetRequiredActionFlag(t_Handle h_FmPcd, uint16_t absoluteProfileId);
  59575. +uint32_t FmPcdPlcrBuildNiaProfileReg(bool green, bool yellow, bool red);
  59576. +void FmPcdPlcrUpdateRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId, uint32_t requiredAction);
  59577. +t_Error FmPcdPlcrCcGetSetParams(t_Handle h_FmPcd, uint16_t profileIndx,uint32_t requiredAction);
  59578. +
  59579. +/***********************************************************************/
  59580. +/* Common API for FM-PCD CC module */
  59581. +/***********************************************************************/
  59582. +uint8_t FmPcdCcGetParseCode(t_Handle h_CcNode);
  59583. +uint8_t FmPcdCcGetOffset(t_Handle h_CcNode);
  59584. +t_Error FmPcdCcRemoveKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex);
  59585. +t_Error FmPcdCcAddKey(t_Handle h_FmPcd, t_Handle h_CcNode, uint16_t keyIndex, uint8_t keySize, t_FmPcdCcKeyParams *p_FmPCdCcKeyParams);
  59586. +t_Error FmPcdCcModifyKey(t_Handle h_FmPcd, t_Handle h_CcNode, uint16_t keyIndex, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask);
  59587. +t_Error FmPcdCcModifyKeyAndNextEngine(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex, uint8_t keySize, t_FmPcdCcKeyParams *p_FmPcdCcKeyParams);
  59588. +t_Error FmPcdCcModifyMissNextEngineParamNode(t_Handle h_FmPcd,t_Handle h_FmPcdCcNode, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  59589. +t_Error FmPcdCcModifyNextEngineParamTree(t_Handle h_FmPcd, t_Handle h_FmPcdCcTree, uint8_t grpId, uint8_t index, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  59590. +uint32_t FmPcdCcGetNodeAddrOffsetFromNodeInfo(t_Handle h_FmPcd, t_Handle h_Pointer);
  59591. +t_Handle FmPcdCcTreeGetSavedManipParams(t_Handle h_FmTree);
  59592. +void FmPcdCcTreeSetSavedManipParams(t_Handle h_FmTree, t_Handle h_SavedManipParams);
  59593. +t_Error FmPcdCcTreeAddIPR(t_Handle h_FmPcd, t_Handle h_FmTree, t_Handle h_NetEnv, t_Handle h_ReassemblyManip, bool schemes);
  59594. +t_Error FmPcdCcTreeAddCPR(t_Handle h_FmPcd, t_Handle h_FmTree, t_Handle h_NetEnv, t_Handle h_ReassemblyManip, bool schemes);
  59595. +t_Error FmPcdCcBindTree(t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_CcTree, uint32_t *p_Offset,t_Handle h_FmPort);
  59596. +t_Error FmPcdCcUnbindTree(t_Handle h_FmPcd, t_Handle h_CcTree);
  59597. +
  59598. +/***********************************************************************/
  59599. +/* Common API for FM-PCD Manip module */
  59600. +/***********************************************************************/
  59601. +t_Error FmPcdManipUpdate(t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_FmPort, t_Handle h_Manip, t_Handle h_Ad, bool validate, int level, t_Handle h_FmTree, bool modify);
  59602. +
  59603. +/***********************************************************************/
  59604. +/* Common API for FM-Port module */
  59605. +/***********************************************************************/
  59606. +#if (DPAA_VERSION >= 11)
  59607. +typedef enum e_FmPortGprFuncType
  59608. +{
  59609. + e_FM_PORT_GPR_EMPTY = 0,
  59610. + e_FM_PORT_GPR_MURAM_PAGE
  59611. +} e_FmPortGprFuncType;
  59612. +
  59613. +t_Error FmPortSetGprFunc(t_Handle h_FmPort, e_FmPortGprFuncType gprFunc, void **p_Value);
  59614. +#endif /* DPAA_VERSION >= 11) */
  59615. +t_Error FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_FmGetSetParams);
  59616. +t_Error FmPortGetSetCcParams(t_Handle h_FmPort, t_FmPortGetSetCcParams *p_FmPortGetSetCcParams);
  59617. +uint8_t FmPortGetNetEnvId(t_Handle h_FmPort);
  59618. +uint8_t FmPortGetHardwarePortId(t_Handle h_FmPort);
  59619. +uint32_t FmPortGetPcdEngines(t_Handle h_FmPort);
  59620. +void FmPortPcdKgSwUnbindClsPlanGrp (t_Handle h_FmPort);
  59621. +
  59622. +
  59623. +#if (DPAA_VERSION >= 11)
  59624. +t_Error FmPcdFrmReplicUpdate(t_Handle h_FmPcd, t_Handle h_FmPort, t_Handle h_FrmReplic);
  59625. +#endif /* (DPAA_VERSION >= 11) */
  59626. +
  59627. +/**************************************************************************//**
  59628. + @Function FmRegisterIntr
  59629. +
  59630. + @Description Used to register an inter-module event handler to be processed by FM
  59631. +
  59632. + @Param[in] h_Fm A handle to an FM Module.
  59633. + @Param[in] mod The module that causes the event
  59634. + @Param[in] modId Module id - if more than 1 instansiation of this
  59635. + mode exists,0 otherwise.
  59636. + @Param[in] intrType Interrupt type (error/normal) selection.
  59637. + @Param[in] f_Isr The interrupt service routine.
  59638. + @Param[in] h_Arg Argument to be passed to f_Isr.
  59639. +
  59640. + @Return None.
  59641. +*//***************************************************************************/
  59642. +void FmRegisterIntr(t_Handle h_Fm,
  59643. + e_FmEventModules mod,
  59644. + uint8_t modId,
  59645. + e_FmIntrType intrType,
  59646. + void (*f_Isr) (t_Handle h_Arg),
  59647. + t_Handle h_Arg);
  59648. +
  59649. +/**************************************************************************//**
  59650. + @Function FmUnregisterIntr
  59651. +
  59652. + @Description Used to un-register an inter-module event handler that was processed by FM
  59653. +
  59654. + @Param[in] h_Fm A handle to an FM Module.
  59655. + @Param[in] mod The module that causes the event
  59656. + @Param[in] modId Module id - if more than 1 instansiation of this
  59657. + mode exists,0 otherwise.
  59658. + @Param[in] intrType Interrupt type (error/normal) selection.
  59659. +
  59660. + @Return None.
  59661. +*//***************************************************************************/
  59662. +void FmUnregisterIntr(t_Handle h_Fm,
  59663. + e_FmEventModules mod,
  59664. + uint8_t modId,
  59665. + e_FmIntrType intrType);
  59666. +
  59667. +/**************************************************************************//**
  59668. + @Function FmRegisterFmCtlIntr
  59669. +
  59670. + @Description Used to register to one of the fmCtl events in the FM module
  59671. +
  59672. + @Param[in] h_Fm A handle to an FM Module.
  59673. + @Param[in] eventRegId FmCtl event id (0-7).
  59674. + @Param[in] f_Isr The interrupt service routine.
  59675. +
  59676. + @Return E_OK on success; Error code otherwise.
  59677. +
  59678. + @Cautions Allowed only following FM_Init().
  59679. +*//***************************************************************************/
  59680. +void FmRegisterFmCtlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Fm, uint32_t event));
  59681. +
  59682. +
  59683. +/**************************************************************************//**
  59684. + @Description enum for defining MAC types
  59685. +*//***************************************************************************/
  59686. +typedef enum e_FmMacType {
  59687. + e_FM_MAC_10G = 0, /**< 10G MAC */
  59688. + e_FM_MAC_1G /**< 1G MAC */
  59689. +} e_FmMacType;
  59690. +
  59691. +/**************************************************************************//**
  59692. + @Description Structure for port-FM communication during FM_PORT_Init.
  59693. + Fields commented 'IN' are passed by the port module to be used
  59694. + by the FM module.
  59695. + Fields commented 'OUT' will be filled by FM before returning to port.
  59696. + Some fields are optional (depending on configuration) and
  59697. + will be analized by the port and FM modules accordingly.
  59698. +*//***************************************************************************/
  59699. +typedef struct t_FmInterModulePortInitParams {
  59700. + uint8_t hardwarePortId; /**< IN. port Id */
  59701. + e_FmPortType portType; /**< IN. Port type */
  59702. + bool independentMode; /**< IN. TRUE if FM Port operates in independent mode */
  59703. + uint16_t liodnOffset; /**< IN. Port's requested resource */
  59704. + uint8_t numOfTasks; /**< IN. Port's requested resource */
  59705. + uint8_t numOfExtraTasks; /**< IN. Port's requested resource */
  59706. + uint8_t numOfOpenDmas; /**< IN. Port's requested resource */
  59707. + uint8_t numOfExtraOpenDmas; /**< IN. Port's requested resource */
  59708. + uint32_t sizeOfFifo; /**< IN. Port's requested resource */
  59709. + uint32_t extraSizeOfFifo; /**< IN. Port's requested resource */
  59710. + uint8_t deqPipelineDepth; /**< IN. Port's requested resource */
  59711. + uint16_t maxFrameLength; /**< IN. Port's max frame length. */
  59712. + uint16_t liodnBase; /**< IN. Irrelevant for P4080 rev 1.
  59713. + LIODN base for this port, to be
  59714. + used together with LIODN offset. */
  59715. + t_FmPhysAddr fmMuramPhysBaseAddr;/**< OUT. FM-MURAM physical address*/
  59716. +} t_FmInterModulePortInitParams;
  59717. +
  59718. +/**************************************************************************//**
  59719. + @Description Structure for port-FM communication during FM_PORT_Free.
  59720. +*//***************************************************************************/
  59721. +typedef struct t_FmInterModulePortFreeParams {
  59722. + uint8_t hardwarePortId; /**< IN. port Id */
  59723. + e_FmPortType portType; /**< IN. Port type */
  59724. + uint8_t deqPipelineDepth; /**< IN. Port's requested resource */
  59725. +} t_FmInterModulePortFreeParams;
  59726. +
  59727. +/**************************************************************************//**
  59728. + @Function FmGetPcdPrsBaseAddr
  59729. +
  59730. + @Description Get the base address of the Parser from the FM module
  59731. +
  59732. + @Param[in] h_Fm A handle to an FM Module.
  59733. +
  59734. + @Return Base address.
  59735. +*//***************************************************************************/
  59736. +uintptr_t FmGetPcdPrsBaseAddr(t_Handle h_Fm);
  59737. +
  59738. +/**************************************************************************//**
  59739. + @Function FmGetPcdKgBaseAddr
  59740. +
  59741. + @Description Get the base address of the Keygen from the FM module
  59742. +
  59743. + @Param[in] h_Fm A handle to an FM Module.
  59744. +
  59745. + @Return Base address.
  59746. +*//***************************************************************************/
  59747. +uintptr_t FmGetPcdKgBaseAddr(t_Handle h_Fm);
  59748. +
  59749. +/**************************************************************************//**
  59750. + @Function FmGetPcdPlcrBaseAddr
  59751. +
  59752. + @Description Get the base address of the Policer from the FM module
  59753. +
  59754. + @Param[in] h_Fm A handle to an FM Module.
  59755. +
  59756. + @Return Base address.
  59757. +*//***************************************************************************/
  59758. +uintptr_t FmGetPcdPlcrBaseAddr(t_Handle h_Fm);
  59759. +
  59760. +/**************************************************************************//**
  59761. + @Function FmGetMuramHandle
  59762. +
  59763. + @Description Get the handle of the MURAM from the FM module
  59764. +
  59765. + @Param[in] h_Fm A handle to an FM Module.
  59766. +
  59767. + @Return MURAM module handle.
  59768. +*//***************************************************************************/
  59769. +t_Handle FmGetMuramHandle(t_Handle h_Fm);
  59770. +
  59771. +/**************************************************************************//**
  59772. + @Function FmGetPhysicalMuramBase
  59773. +
  59774. + @Description Get the physical base address of the MURAM from the FM module
  59775. +
  59776. + @Param[in] h_Fm A handle to an FM Module.
  59777. + @Param[in] fmPhysAddr Physical MURAM base
  59778. +
  59779. + @Return Physical base address.
  59780. +*//***************************************************************************/
  59781. +void FmGetPhysicalMuramBase(t_Handle h_Fm, t_FmPhysAddr *fmPhysAddr);
  59782. +
  59783. +/**************************************************************************//**
  59784. + @Function FmGetTimeStampScale
  59785. +
  59786. + @Description Used internally by other modules in order to get the timeStamp
  59787. + period as requested by the application.
  59788. +
  59789. + This function returns bit number that is incremented every 1 usec.
  59790. + To calculate timestamp period in nsec, use
  59791. + 1000 / (1 << FmGetTimeStampScale()).
  59792. +
  59793. + @Param[in] h_Fm A handle to an FM Module.
  59794. +
  59795. + @Return Bit that counts 1 usec.
  59796. +
  59797. + @Cautions Allowed only following FM_Init().
  59798. +*//***************************************************************************/
  59799. +uint32_t FmGetTimeStampScale(t_Handle h_Fm);
  59800. +
  59801. +/**************************************************************************//**
  59802. + @Function FmResumeStalledPort
  59803. +
  59804. + @Description Used internally by FM port to release a stalled port.
  59805. +
  59806. + @Param[in] h_Fm A handle to an FM Module.
  59807. + @Param[in] hardwarePortId HW port id.
  59808. +
  59809. + @Return E_OK on success; Error code otherwise.
  59810. +
  59811. + @Cautions Allowed only following FM_Init().
  59812. +*//***************************************************************************/
  59813. +t_Error FmResumeStalledPort(t_Handle h_Fm, uint8_t hardwarePortId);
  59814. +
  59815. +/**************************************************************************//**
  59816. + @Function FmIsPortStalled
  59817. +
  59818. + @Description Used internally by FM port to read the port's status.
  59819. +
  59820. + @Param[in] h_Fm A handle to an FM Module.
  59821. + @Param[in] hardwarePortId HW port id.
  59822. + @Param[in] p_IsStalled A pointer to the boolean port stalled state
  59823. +
  59824. + @Return E_OK on success; Error code otherwise.
  59825. +
  59826. + @Cautions Allowed only following FM_Init().
  59827. +*//***************************************************************************/
  59828. +t_Error FmIsPortStalled(t_Handle h_Fm, uint8_t hardwarePortId, bool *p_IsStalled);
  59829. +
  59830. +/**************************************************************************//**
  59831. + @Function FmResetMac
  59832. +
  59833. + @Description Used by MAC driver to reset the MAC registers
  59834. +
  59835. + @Param[in] h_Fm A handle to an FM Module.
  59836. + @Param[in] type MAC type.
  59837. + @Param[in] macId MAC id - according to type.
  59838. +
  59839. + @Return E_OK on success; Error code otherwise.
  59840. +
  59841. + @Cautions Allowed only following FM_Init().
  59842. +*//***************************************************************************/
  59843. +t_Error FmResetMac(t_Handle h_Fm, e_FmMacType type, uint8_t macId);
  59844. +
  59845. +/**************************************************************************//**
  59846. + @Function FmGetClockFreq
  59847. +
  59848. + @Description Used by MAC driver to get the FM clock frequency
  59849. +
  59850. + @Param[in] h_Fm A handle to an FM Module.
  59851. +
  59852. + @Return clock-freq on success; 0 otherwise.
  59853. +
  59854. + @Cautions Allowed only following FM_Init().
  59855. +*//***************************************************************************/
  59856. +uint16_t FmGetClockFreq(t_Handle h_Fm);
  59857. +
  59858. +/**************************************************************************//**
  59859. + @Function FmGetMacClockFreq
  59860. +
  59861. + @Description Used by MAC driver to get the MAC clock frequency
  59862. +
  59863. + @Param[in] h_Fm A handle to an FM Module.
  59864. +
  59865. + @Return clock-freq on success; 0 otherwise.
  59866. +
  59867. + @Cautions Allowed only following FM_Init().
  59868. +*//***************************************************************************/
  59869. +uint16_t FmGetMacClockFreq(t_Handle h_Fm);
  59870. +
  59871. +/**************************************************************************//**
  59872. + @Function FmGetId
  59873. +
  59874. + @Description Used by PCD driver to read rhe FM id
  59875. +
  59876. + @Param[in] h_Fm A handle to an FM Module.
  59877. +
  59878. + @Return E_OK on success; Error code otherwise.
  59879. +
  59880. + @Cautions Allowed only following FM_Init().
  59881. +*//***************************************************************************/
  59882. +uint8_t FmGetId(t_Handle h_Fm);
  59883. +
  59884. +/**************************************************************************//**
  59885. + @Function FmGetSetPortParams
  59886. +
  59887. + @Description Used by FM-PORT driver to pass and receive parameters between
  59888. + PORT and FM modules.
  59889. +
  59890. + @Param[in] h_Fm A handle to an FM Module.
  59891. + @Param[in,out] p_PortParams A structure of FM Port parameters.
  59892. +
  59893. + @Return E_OK on success; Error code otherwise.
  59894. +
  59895. + @Cautions Allowed only following FM_Init().
  59896. +*//***************************************************************************/
  59897. +t_Error FmGetSetPortParams(t_Handle h_Fm,t_FmInterModulePortInitParams *p_PortParams);
  59898. +
  59899. +/**************************************************************************//**
  59900. + @Function FmFreePortParams
  59901. +
  59902. + @Description Used by FM-PORT driver to free port's resources within the FM.
  59903. +
  59904. + @Param[in] h_Fm A handle to an FM Module.
  59905. + @Param[in,out] p_PortParams A structure of FM Port parameters.
  59906. +
  59907. + @Return None.
  59908. +
  59909. + @Cautions Allowed only following FM_Init().
  59910. +*//***************************************************************************/
  59911. +void FmFreePortParams(t_Handle h_Fm,t_FmInterModulePortFreeParams *p_PortParams);
  59912. +
  59913. +/**************************************************************************//**
  59914. + @Function FmSetNumOfRiscsPerPort
  59915. +
  59916. + @Description Used by FM-PORT driver to pass parameter between
  59917. + PORT and FM modules for working with number of RISC..
  59918. +
  59919. + @Param[in] h_Fm A handle to an FM Module.
  59920. + @Param[in] hardwarePortId hardware port Id.
  59921. + @Param[in] numOfFmanCtrls number of Fman Controllers.
  59922. + @Param[in] orFmanCtrl Fman Controller for order restoration.
  59923. +
  59924. + @Return None.
  59925. +
  59926. + @Cautions Allowed only following FM_Init().
  59927. +*//***************************************************************************/
  59928. +t_Error FmSetNumOfRiscsPerPort(t_Handle h_Fm, uint8_t hardwarePortId, uint8_t numOfFmanCtrls, t_FmFmanCtrl orFmanCtrl);
  59929. +
  59930. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  59931. +/**************************************************************************//*
  59932. + @Function FmDumpPortRegs
  59933. +
  59934. + @Description Dumps FM port registers which are part of FM common registers
  59935. +
  59936. + @Param[in] h_Fm A handle to an FM Module.
  59937. + @Param[in] hardwarePortId HW port id.
  59938. +
  59939. + @Return E_OK on success; Error code otherwise.
  59940. +
  59941. + @Cautions Allowed only FM_Init().
  59942. +*//***************************************************************************/
  59943. +t_Error FmDumpPortRegs(t_Handle h_Fm,uint8_t hardwarePortId);
  59944. +#endif /* (defined(DEBUG_ERRORS) && ... */
  59945. +
  59946. +void FmRegisterPcd(t_Handle h_Fm, t_Handle h_FmPcd);
  59947. +void FmUnregisterPcd(t_Handle h_Fm);
  59948. +t_Handle FmGetPcdHandle(t_Handle h_Fm);
  59949. +t_Error FmEnableRamsEcc(t_Handle h_Fm);
  59950. +t_Error FmDisableRamsEcc(t_Handle h_Fm);
  59951. +void FmGetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo);
  59952. +t_Error FmAllocFmanCtrlEventReg(t_Handle h_Fm, uint8_t *p_EventId);
  59953. +void FmFreeFmanCtrlEventReg(t_Handle h_Fm, uint8_t eventId);
  59954. +void FmSetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, uint32_t enableEvents);
  59955. +uint32_t FmGetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId);
  59956. +void FmRegisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Fm, uint32_t event), t_Handle h_Arg);
  59957. +void FmUnregisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId);
  59958. +t_Error FmSetMacMaxFrame(t_Handle h_Fm, e_FmMacType type, uint8_t macId, uint16_t mtu);
  59959. +bool FmIsMaster(t_Handle h_Fm);
  59960. +uint8_t FmGetGuestId(t_Handle h_Fm);
  59961. +uint16_t FmGetTnumAgingPeriod(t_Handle h_Fm);
  59962. +t_Error FmSetPortPreFetchConfiguration(t_Handle h_Fm, uint8_t portNum, bool preFetchConfigured);
  59963. +t_Error FmGetPortPreFetchConfiguration(t_Handle h_Fm, uint8_t portNum, bool *p_PortConfigured, bool *p_PreFetchConfigured);
  59964. +
  59965. +
  59966. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  59967. +t_Error Fm10GTxEccWorkaround(t_Handle h_Fm, uint8_t macId);
  59968. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  59969. +
  59970. +void FmMuramClear(t_Handle h_FmMuram);
  59971. +t_Error FmSetNumOfOpenDmas(t_Handle h_Fm,
  59972. + uint8_t hardwarePortId,
  59973. + uint8_t *p_NumOfOpenDmas,
  59974. + uint8_t *p_NumOfExtraOpenDmas,
  59975. + bool initialConfig);
  59976. +t_Error FmSetNumOfTasks(t_Handle h_Fm,
  59977. + uint8_t hardwarePortId,
  59978. + uint8_t *p_NumOfTasks,
  59979. + uint8_t *p_NumOfExtraTasks,
  59980. + bool initialConfig);
  59981. +t_Error FmSetSizeOfFifo(t_Handle h_Fm,
  59982. + uint8_t hardwarePortId,
  59983. + uint32_t *p_SizeOfFifo,
  59984. + uint32_t *p_ExtraSizeOfFifo,
  59985. + bool initialConfig);
  59986. +
  59987. +t_Error FmSetCongestionGroupPFCpriority(t_Handle h_Fm,
  59988. + uint32_t congestionGroupId,
  59989. + uint8_t priorityBitMap);
  59990. +
  59991. +#if (DPAA_VERSION >= 11)
  59992. +t_Error FmVSPAllocForPort(t_Handle h_Fm,
  59993. + e_FmPortType portType,
  59994. + uint8_t portId,
  59995. + uint8_t numOfStorageProfiles);
  59996. +
  59997. +t_Error FmVSPFreeForPort(t_Handle h_Fm,
  59998. + e_FmPortType portType,
  59999. + uint8_t portId);
  60000. +
  60001. +t_Error FmVSPGetAbsoluteProfileId(t_Handle h_Fm,
  60002. + e_FmPortType portType,
  60003. + uint8_t portId,
  60004. + uint16_t relativeProfile,
  60005. + uint16_t *p_AbsoluteId);
  60006. +t_Error FmVSPCheckRelativeProfile(t_Handle h_Fm,
  60007. + e_FmPortType portType,
  60008. + uint8_t portId,
  60009. + uint16_t relativeProfile);
  60010. +
  60011. +uintptr_t FmGetVSPBaseAddr(t_Handle h_Fm);
  60012. +#endif /* (DPAA_VERSION >= 11) */
  60013. +
  60014. +
  60015. +#endif /* __FM_COMMON_H */
  60016. --- /dev/null
  60017. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_hc.h
  60018. @@ -0,0 +1,93 @@
  60019. +/*
  60020. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  60021. + *
  60022. + * Redistribution and use in source and binary forms, with or without
  60023. + * modification, are permitted provided that the following conditions are met:
  60024. + * * Redistributions of source code must retain the above copyright
  60025. + * notice, this list of conditions and the following disclaimer.
  60026. + * * Redistributions in binary form must reproduce the above copyright
  60027. + * notice, this list of conditions and the following disclaimer in the
  60028. + * documentation and/or other materials provided with the distribution.
  60029. + * * Neither the name of Freescale Semiconductor nor the
  60030. + * names of its contributors may be used to endorse or promote products
  60031. + * derived from this software without specific prior written permission.
  60032. + *
  60033. + *
  60034. + * ALTERNATIVELY, this software may be distributed under the terms of the
  60035. + * GNU General Public License ("GPL") as published by the Free Software
  60036. + * Foundation, either version 2 of that License or (at your option) any
  60037. + * later version.
  60038. + *
  60039. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  60040. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  60041. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  60042. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  60043. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  60044. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60045. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  60046. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60047. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  60048. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60049. + */
  60050. +
  60051. +
  60052. +#ifndef __FM_HC_H
  60053. +#define __FM_HC_H
  60054. +
  60055. +#include "std_ext.h"
  60056. +#include "error_ext.h"
  60057. +#include "fsl_fman_kg.h"
  60058. +
  60059. +#define __ERR_MODULE__ MODULE_FM_PCD
  60060. +
  60061. +
  60062. +typedef struct t_FmHcParams {
  60063. + t_Handle h_Fm;
  60064. + t_Handle h_FmPcd;
  60065. + t_FmPcdHcParams params;
  60066. +} t_FmHcParams;
  60067. +
  60068. +
  60069. +t_Handle FmHcConfigAndInit(t_FmHcParams *p_FmHcParams);
  60070. +void FmHcFree(t_Handle h_FmHc);
  60071. +t_Error FmHcSetFramesDataMemory(t_Handle h_FmHc,
  60072. + uint8_t memId);
  60073. +t_Error FmHcDumpRegs(t_Handle h_FmHc);
  60074. +
  60075. +void FmHcTxConf(t_Handle h_FmHc, t_DpaaFD *p_Fd);
  60076. +
  60077. +t_Error FmHcPcdKgSetScheme(t_Handle h_FmHc,
  60078. + t_Handle h_Scheme,
  60079. + struct fman_kg_scheme_regs *p_SchemeRegs,
  60080. + bool updateCounter);
  60081. +t_Error FmHcPcdKgDeleteScheme(t_Handle h_FmHc, t_Handle h_Scheme);
  60082. +t_Error FmHcPcdCcCapwapTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcCapwapReassmTimeoutParams *p_CcCapwapReassmTimeoutParams );
  60083. +t_Error FmHcPcdCcIpFragScratchPollCmd(t_Handle h_FmHc, bool fill, t_FmPcdCcFragScratchPoolCmdParams *p_FmPcdCcFragScratchPoolCmdParams);
  60084. +t_Error FmHcPcdCcTimeoutReassm(t_Handle h_FmHc, t_FmPcdCcReassmTimeoutParams *p_CcReassmTimeoutParams, uint8_t *p_Result);
  60085. +t_Error FmHcPcdKgSetClsPlan(t_Handle h_FmHc, t_FmPcdKgInterModuleClsPlanSet *p_Set);
  60086. +t_Error FmHcPcdKgDeleteClsPlan(t_Handle h_FmHc, uint8_t clsPlanGrpId);
  60087. +
  60088. +t_Error FmHcPcdKgSetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme, uint32_t value);
  60089. +uint32_t FmHcPcdKgGetSchemeCounter(t_Handle h_FmHc, t_Handle h_Scheme);
  60090. +
  60091. +t_Error FmHcPcdCcDoDynamicChange(t_Handle h_FmHc, uint32_t oldAdAddrOffset, uint32_t newAdAddrOffset);
  60092. +
  60093. +t_Error FmHcPcdPlcrSetProfile(t_Handle h_FmHc, t_Handle h_Profile, t_FmPcdPlcrProfileRegs *p_PlcrRegs);
  60094. +t_Error FmHcPcdPlcrDeleteProfile(t_Handle h_FmHc, t_Handle h_Profile);
  60095. +
  60096. +t_Error FmHcPcdPlcrSetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter, uint32_t value);
  60097. +uint32_t FmHcPcdPlcrGetProfileCounter(t_Handle h_FmHc, t_Handle h_Profile, e_FmPcdPlcrProfileCounters counter);
  60098. +
  60099. +t_Error FmHcKgWriteSp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t spReg, bool add);
  60100. +t_Error FmHcKgWriteCpp(t_Handle h_FmHc, uint8_t hardwarePortId, uint32_t cppReg);
  60101. +
  60102. +t_Error FmHcPcdKgCcGetSetParams(t_Handle h_FmHc, t_Handle h_Scheme, uint32_t requiredAction, uint32_t value);
  60103. +t_Error FmHcPcdPlcrCcGetSetParams(t_Handle h_FmHc,uint16_t absoluteProfileId, uint32_t requiredAction);
  60104. +
  60105. +t_Error FmHcPcdSync(t_Handle h_FmHc);
  60106. +t_Handle FmHcGetPort(t_Handle h_FmHc);
  60107. +
  60108. +
  60109. +
  60110. +
  60111. +#endif /* __FM_HC_H */
  60112. --- /dev/null
  60113. +++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc/fm_sp_common.h
  60114. @@ -0,0 +1,117 @@
  60115. +/*
  60116. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  60117. + *
  60118. + * Redistribution and use in source and binary forms, with or without
  60119. + * modification, are permitted provided that the following conditions are met:
  60120. + * * Redistributions of source code must retain the above copyright
  60121. + * notice, this list of conditions and the following disclaimer.
  60122. + * * Redistributions in binary form must reproduce the above copyright
  60123. + * notice, this list of conditions and the following disclaimer in the
  60124. + * documentation and/or other materials provided with the distribution.
  60125. + * * Neither the name of Freescale Semiconductor nor the
  60126. + * names of its contributors may be used to endorse or promote products
  60127. + * derived from this software without specific prior written permission.
  60128. + *
  60129. + *
  60130. + * ALTERNATIVELY, this software may be distributed under the terms of the
  60131. + * GNU General Public License ("GPL") as published by the Free Software
  60132. + * Foundation, either version 2 of that License or (at your option) any
  60133. + * later version.
  60134. + *
  60135. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  60136. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  60137. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  60138. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  60139. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  60140. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60141. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  60142. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60143. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  60144. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60145. + */
  60146. +
  60147. +
  60148. +/******************************************************************************
  60149. + @File fm_sp_common.h
  60150. +
  60151. + @Description FM SP ...
  60152. +*//***************************************************************************/
  60153. +#ifndef __FM_SP_COMMON_H
  60154. +#define __FM_SP_COMMON_H
  60155. +
  60156. +#include "std_ext.h"
  60157. +#include "error_ext.h"
  60158. +#include "list_ext.h"
  60159. +
  60160. +#include "fm_ext.h"
  60161. +#include "fm_pcd_ext.h"
  60162. +#include "fsl_fman.h"
  60163. +
  60164. +/**************************************************************************//**
  60165. + @Description defaults
  60166. +*//***************************************************************************/
  60167. +#define DEFAULT_FM_SP_bufferPrefixContent_privDataSize 0
  60168. +#define DEFAULT_FM_SP_bufferPrefixContent_passPrsResult FALSE
  60169. +#define DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp FALSE
  60170. +#define DEFAULT_FM_SP_bufferPrefixContent_allOtherPCDInfo FALSE
  60171. +#define DEFAULT_FM_SP_bufferPrefixContent_dataAlign 64
  60172. +
  60173. +/**************************************************************************//**
  60174. + @Description structure for defining internal context copying
  60175. +*//***************************************************************************/
  60176. +typedef struct
  60177. +{
  60178. + uint16_t extBufOffset; /**< Offset in External buffer to which internal
  60179. + context is copied to (Rx) or taken from (Tx, Op). */
  60180. + uint8_t intContextOffset; /**< Offset within internal context to copy from
  60181. + (Rx) or to copy to (Tx, Op). */
  60182. + uint16_t size; /**< Internal offset size to be copied */
  60183. +} t_FmSpIntContextDataCopy;
  60184. +
  60185. +/**************************************************************************//**
  60186. + @Description struct for defining external buffer margins
  60187. +*//***************************************************************************/
  60188. +typedef struct {
  60189. + uint16_t startMargins; /**< Number of bytes to be left at the beginning
  60190. + of the external buffer (must be divisible by 16) */
  60191. + uint16_t endMargins; /**< number of bytes to be left at the end
  60192. + of the external buffer(must be divisible by 16) */
  60193. +} t_FmSpBufMargins;
  60194. +
  60195. +typedef struct {
  60196. + uint32_t dataOffset;
  60197. + uint32_t prsResultOffset;
  60198. + uint32_t timeStampOffset;
  60199. + uint32_t hashResultOffset;
  60200. + uint32_t pcdInfoOffset;
  60201. + uint32_t manipOffset;
  60202. +} t_FmSpBufferOffsets;
  60203. +
  60204. +
  60205. +t_Error FmSpBuildBufferStructure(t_FmSpIntContextDataCopy *p_FmPortIntContextDataCopy,
  60206. + t_FmBufferPrefixContent *p_BufferPrefixContent,
  60207. + t_FmSpBufMargins *p_FmPortBufMargins,
  60208. + t_FmSpBufferOffsets *p_FmPortBufferOffsets,
  60209. + uint8_t *internalBufferOffset);
  60210. +
  60211. +t_Error FmSpCheckIntContextParams(t_FmSpIntContextDataCopy *p_FmSpIntContextDataCopy);
  60212. +t_Error FmSpCheckBufPoolsParams(t_FmExtPools *p_FmExtPools,
  60213. + t_FmBackupBmPools *p_FmBackupBmPools,
  60214. + t_FmBufPoolDepletion *p_FmBufPoolDepletion);
  60215. +t_Error FmSpCheckBufMargins(t_FmSpBufMargins *p_FmSpBufMargins);
  60216. +void FmSpSetBufPoolsInAscOrderOfBufSizes(t_FmExtPools *p_FmExtPools, uint8_t *orderedArray, uint16_t *sizesArray);
  60217. +
  60218. +t_Error FmPcdSpAllocProfiles(t_Handle h_FmPcd,
  60219. + uint8_t hardwarePortId,
  60220. + uint16_t numOfStorageProfiles,
  60221. + uint16_t *base,
  60222. + uint8_t *log2Num);
  60223. +t_Error FmPcdSpGetAbsoluteProfileId(t_Handle h_FmPcd,
  60224. + t_Handle h_FmPort,
  60225. + uint16_t relativeProfile,
  60226. + uint16_t *p_AbsoluteId);
  60227. +void SpInvalidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
  60228. +void SpValidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);
  60229. +
  60230. +
  60231. +#endif /* __FM_SP_COMMON_H */
  60232. --- /dev/null
  60233. +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/Makefile
  60234. @@ -0,0 +1,12 @@
  60235. +#
  60236. +# Makefile for the Freescale Ethernet controllers
  60237. +#
  60238. +ccflags-y += -DVERSION=\"\"
  60239. +#
  60240. +#Include netcomm SW specific definitions
  60241. +
  60242. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  60243. +
  60244. +obj-y += fsl-ncsw-etc.o
  60245. +
  60246. +fsl-ncsw-etc-objs := mm.o memcpy.o sprint.o list.o error.o
  60247. --- /dev/null
  60248. +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/error.c
  60249. @@ -0,0 +1,95 @@
  60250. +/*
  60251. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  60252. + *
  60253. + * Redistribution and use in source and binary forms, with or without
  60254. + * modification, are permitted provided that the following conditions are met:
  60255. + * * Redistributions of source code must retain the above copyright
  60256. + * notice, this list of conditions and the following disclaimer.
  60257. + * * Redistributions in binary form must reproduce the above copyright
  60258. + * notice, this list of conditions and the following disclaimer in the
  60259. + * documentation and/or other materials provided with the distribution.
  60260. + * * Neither the name of Freescale Semiconductor nor the
  60261. + * names of its contributors may be used to endorse or promote products
  60262. + * derived from this software without specific prior written permission.
  60263. + *
  60264. + *
  60265. + * ALTERNATIVELY, this software may be distributed under the terms of the
  60266. + * GNU General Public License ("GPL") as published by the Free Software
  60267. + * Foundation, either version 2 of that License or (at your option) any
  60268. + * later version.
  60269. + *
  60270. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  60271. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  60272. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  60273. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  60274. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  60275. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60276. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  60277. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60278. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  60279. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60280. + */
  60281. +
  60282. +
  60283. +/*
  60284. +
  60285. + @File error.c
  60286. +
  60287. + @Description General errors and events reporting utilities.
  60288. +*//***************************************************************************/
  60289. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  60290. +#include "error_ext.h"
  60291. +
  60292. +
  60293. +const char *dbgLevelStrings[] =
  60294. +{
  60295. + "CRITICAL"
  60296. + ,"MAJOR"
  60297. + ,"MINOR"
  60298. + ,"WARNING"
  60299. + ,"INFO"
  60300. + ,"TRACE"
  60301. +};
  60302. +
  60303. +
  60304. +char * ErrTypeStrings (e_ErrorType err)
  60305. +{
  60306. + switch (err)
  60307. + {
  60308. + case (E_OK): return "OK";
  60309. + case (E_WRITE_FAILED): return "Write Access Failed";
  60310. + case (E_NO_DEVICE): return "No Device";
  60311. + case (E_NOT_AVAILABLE): return "Resource Is Unavailable";
  60312. + case (E_NO_MEMORY): return "Memory Allocation Failed";
  60313. + case (E_INVALID_ADDRESS): return "Invalid Address";
  60314. + case (E_BUSY): return "Resource Is Busy";
  60315. + case (E_ALREADY_EXISTS): return "Resource Already Exists";
  60316. + case (E_INVALID_OPERATION): return "Invalid Operation";
  60317. + case (E_INVALID_VALUE): return "Invalid Value";
  60318. + case (E_NOT_IN_RANGE): return "Value Out Of Range";
  60319. + case (E_NOT_SUPPORTED): return "Unsupported Operation";
  60320. + case (E_INVALID_STATE): return "Invalid State";
  60321. + case (E_INVALID_HANDLE): return "Invalid Handle";
  60322. + case (E_INVALID_ID): return "Invalid ID";
  60323. + case (E_NULL_POINTER): return "Unexpected NULL Pointer";
  60324. + case (E_INVALID_SELECTION): return "Invalid Selection";
  60325. + case (E_INVALID_COMM_MODE): return "Invalid Communication Mode";
  60326. + case (E_INVALID_MEMORY_TYPE): return "Invalid Memory Type";
  60327. + case (E_INVALID_CLOCK): return "Invalid Clock";
  60328. + case (E_CONFLICT): return "Conflict In Settings";
  60329. + case (E_NOT_ALIGNED): return "Incorrect Alignment";
  60330. + case (E_NOT_FOUND): return "Resource Not Found";
  60331. + case (E_FULL): return "Resource Is Full";
  60332. + case (E_EMPTY): return "Resource Is Empty";
  60333. + case (E_ALREADY_FREE): return "Resource Already Free";
  60334. + case (E_READ_FAILED): return "Read Access Failed";
  60335. + case (E_INVALID_FRAME): return "Invalid Frame";
  60336. + case (E_SEND_FAILED): return "Send Operation Failed";
  60337. + case (E_RECEIVE_FAILED): return "Receive Operation Failed";
  60338. + case (E_TIMEOUT): return "Operation Timed Out";
  60339. + default:
  60340. + break;
  60341. + }
  60342. + return NULL;
  60343. +}
  60344. +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
  60345. --- /dev/null
  60346. +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/list.c
  60347. @@ -0,0 +1,71 @@
  60348. +/*
  60349. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  60350. + *
  60351. + * Redistribution and use in source and binary forms, with or without
  60352. + * modification, are permitted provided that the following conditions are met:
  60353. + * * Redistributions of source code must retain the above copyright
  60354. + * notice, this list of conditions and the following disclaimer.
  60355. + * * Redistributions in binary form must reproduce the above copyright
  60356. + * notice, this list of conditions and the following disclaimer in the
  60357. + * documentation and/or other materials provided with the distribution.
  60358. + * * Neither the name of Freescale Semiconductor nor the
  60359. + * names of its contributors may be used to endorse or promote products
  60360. + * derived from this software without specific prior written permission.
  60361. + *
  60362. + *
  60363. + * ALTERNATIVELY, this software may be distributed under the terms of the
  60364. + * GNU General Public License ("GPL") as published by the Free Software
  60365. + * Foundation, either version 2 of that License or (at your option) any
  60366. + * later version.
  60367. + *
  60368. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  60369. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  60370. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  60371. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  60372. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  60373. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60374. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  60375. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60376. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  60377. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60378. + */
  60379. +
  60380. +
  60381. +/**************************************************************************//**
  60382. +
  60383. + @File list.c
  60384. +
  60385. + @Description Implementation of list.
  60386. +*//***************************************************************************/
  60387. +#include "std_ext.h"
  60388. +#include "list_ext.h"
  60389. +
  60390. +
  60391. +void LIST_Append(t_List *p_NewList, t_List *p_Head)
  60392. +{
  60393. + t_List *p_First = LIST_FIRST(p_NewList);
  60394. +
  60395. + if (p_First != p_NewList)
  60396. + {
  60397. + t_List *p_Last = LIST_LAST(p_NewList);
  60398. + t_List *p_Cur = LIST_NEXT(p_Head);
  60399. +
  60400. + LIST_PREV(p_First) = p_Head;
  60401. + LIST_FIRST(p_Head) = p_First;
  60402. + LIST_NEXT(p_Last) = p_Cur;
  60403. + LIST_LAST(p_Cur) = p_Last;
  60404. + }
  60405. +}
  60406. +
  60407. +
  60408. +int LIST_NumOfObjs(t_List *p_List)
  60409. +{
  60410. + t_List *p_Tmp;
  60411. + int numOfObjs = 0;
  60412. +
  60413. + if (!LIST_IsEmpty(p_List))
  60414. + LIST_FOR_EACH(p_Tmp, p_List)
  60415. + numOfObjs++;
  60416. +
  60417. + return numOfObjs;
  60418. +}
  60419. --- /dev/null
  60420. +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/memcpy.c
  60421. @@ -0,0 +1,620 @@
  60422. +/*
  60423. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  60424. + *
  60425. + * Redistribution and use in source and binary forms, with or without
  60426. + * modification, are permitted provided that the following conditions are met:
  60427. + * * Redistributions of source code must retain the above copyright
  60428. + * notice, this list of conditions and the following disclaimer.
  60429. + * * Redistributions in binary form must reproduce the above copyright
  60430. + * notice, this list of conditions and the following disclaimer in the
  60431. + * documentation and/or other materials provided with the distribution.
  60432. + * * Neither the name of Freescale Semiconductor nor the
  60433. + * names of its contributors may be used to endorse or promote products
  60434. + * derived from this software without specific prior written permission.
  60435. + *
  60436. + *
  60437. + * ALTERNATIVELY, this software may be distributed under the terms of the
  60438. + * GNU General Public License ("GPL") as published by the Free Software
  60439. + * Foundation, either version 2 of that License or (at your option) any
  60440. + * later version.
  60441. + *
  60442. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  60443. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  60444. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  60445. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  60446. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  60447. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60448. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  60449. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60450. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  60451. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60452. + */
  60453. +
  60454. +
  60455. +
  60456. +#include "std_ext.h"
  60457. +#include "xx_ext.h"
  60458. +#include "memcpy_ext.h"
  60459. +
  60460. +void * MemCpy8(void* pDst, void* pSrc, uint32_t size)
  60461. +{
  60462. + int i;
  60463. +
  60464. + for(i = 0; i < size; ++i)
  60465. + *(((uint8_t*)(pDst)) + i) = *(((uint8_t*)(pSrc)) + i);
  60466. +
  60467. + return pDst;
  60468. +}
  60469. +
  60470. +void * MemSet8(void* pDst, int c, uint32_t size)
  60471. +{
  60472. + int i;
  60473. +
  60474. + for(i = 0; i < size; ++i)
  60475. + *(((uint8_t*)(pDst)) + i) = (uint8_t)(c);
  60476. +
  60477. + return pDst;
  60478. +}
  60479. +
  60480. +void * MemCpy32(void* pDst,void* pSrc, uint32_t size)
  60481. +{
  60482. + uint32_t leftAlign;
  60483. + uint32_t rightAlign;
  60484. + uint32_t lastWord;
  60485. + uint32_t currWord;
  60486. + uint32_t *p_Src32;
  60487. + uint32_t *p_Dst32;
  60488. + uint8_t *p_Src8;
  60489. + uint8_t *p_Dst8;
  60490. +
  60491. + p_Src8 = (uint8_t*)(pSrc);
  60492. + p_Dst8 = (uint8_t*)(pDst);
  60493. + /* first copy byte by byte till the source first alignment
  60494. + * this step is necessary to ensure we do not even try to access
  60495. + * data which is before the source buffer, hence it is not ours.
  60496. + */
  60497. + while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
  60498. + {
  60499. + *p_Dst8++ = *p_Src8++;
  60500. + size--;
  60501. + }
  60502. +
  60503. + /* align destination (possibly disaligning source)*/
  60504. + while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
  60505. + {
  60506. + *p_Dst8++ = *p_Src8++;
  60507. + size--;
  60508. + }
  60509. +
  60510. + /* dest is aligned and source is not necessarily aligned */
  60511. + leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
  60512. + rightAlign = 32 - leftAlign;
  60513. +
  60514. +
  60515. + if (leftAlign == 0)
  60516. + {
  60517. + /* source is also aligned */
  60518. + p_Src32 = (uint32_t*)(p_Src8);
  60519. + p_Dst32 = (uint32_t*)(p_Dst8);
  60520. + while (size >> 2) /* size >= 4 */
  60521. + {
  60522. + *p_Dst32++ = *p_Src32++;
  60523. + size -= 4;
  60524. + }
  60525. + p_Src8 = (uint8_t*)(p_Src32);
  60526. + p_Dst8 = (uint8_t*)(p_Dst32);
  60527. + }
  60528. + else
  60529. + {
  60530. + /* source is not aligned (destination is aligned)*/
  60531. + p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
  60532. + p_Dst32 = (uint32_t*)(p_Dst8);
  60533. + lastWord = *p_Src32++;
  60534. + while(size >> 3) /* size >= 8 */
  60535. + {
  60536. + currWord = *p_Src32;
  60537. + *p_Dst32 = (lastWord << leftAlign) | (currWord >> rightAlign);
  60538. + lastWord = currWord;
  60539. + p_Src32++;
  60540. + p_Dst32++;
  60541. + size -= 4;
  60542. + }
  60543. + p_Dst8 = (uint8_t*)(p_Dst32);
  60544. + p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
  60545. + }
  60546. +
  60547. + /* complete the left overs */
  60548. + while (size--)
  60549. + *p_Dst8++ = *p_Src8++;
  60550. +
  60551. + return pDst;
  60552. +}
  60553. +
  60554. +void * IO2IOCpy32(void* pDst,void* pSrc, uint32_t size)
  60555. +{
  60556. + uint32_t leftAlign;
  60557. + uint32_t rightAlign;
  60558. + uint32_t lastWord;
  60559. + uint32_t currWord;
  60560. + uint32_t *p_Src32;
  60561. + uint32_t *p_Dst32;
  60562. + uint8_t *p_Src8;
  60563. + uint8_t *p_Dst8;
  60564. +
  60565. + p_Src8 = (uint8_t*)(pSrc);
  60566. + p_Dst8 = (uint8_t*)(pDst);
  60567. + /* first copy byte by byte till the source first alignment
  60568. + * this step is necessary to ensure we do not even try to access
  60569. + * data which is before the source buffer, hence it is not ours.
  60570. + */
  60571. + while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
  60572. + {
  60573. + WRITE_UINT8(*p_Dst8, GET_UINT8(*p_Src8));
  60574. + p_Dst8++;p_Src8++;
  60575. + size--;
  60576. + }
  60577. +
  60578. + /* align destination (possibly disaligning source)*/
  60579. + while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
  60580. + {
  60581. + WRITE_UINT8(*p_Dst8, GET_UINT8(*p_Src8));
  60582. + p_Dst8++;p_Src8++;
  60583. + size--;
  60584. + }
  60585. +
  60586. + /* dest is aligned and source is not necessarily aligned */
  60587. + leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
  60588. + rightAlign = 32 - leftAlign;
  60589. +
  60590. + if (leftAlign == 0)
  60591. + {
  60592. + /* source is also aligned */
  60593. + p_Src32 = (uint32_t*)(p_Src8);
  60594. + p_Dst32 = (uint32_t*)(p_Dst8);
  60595. + while (size >> 2) /* size >= 4 */
  60596. + {
  60597. + WRITE_UINT32(*p_Dst32, GET_UINT32(*p_Src32));
  60598. + p_Dst32++;p_Src32++;
  60599. + size -= 4;
  60600. + }
  60601. + p_Src8 = (uint8_t*)(p_Src32);
  60602. + p_Dst8 = (uint8_t*)(p_Dst32);
  60603. + }
  60604. + else
  60605. + {
  60606. + /* source is not aligned (destination is aligned)*/
  60607. + p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
  60608. + p_Dst32 = (uint32_t*)(p_Dst8);
  60609. + lastWord = GET_UINT32(*p_Src32);
  60610. + p_Src32++;
  60611. + while(size >> 3) /* size >= 8 */
  60612. + {
  60613. + currWord = GET_UINT32(*p_Src32);
  60614. + WRITE_UINT32(*p_Dst32, (lastWord << leftAlign) | (currWord >> rightAlign));
  60615. + lastWord = currWord;
  60616. + p_Src32++;p_Dst32++;
  60617. + size -= 4;
  60618. + }
  60619. + p_Dst8 = (uint8_t*)(p_Dst32);
  60620. + p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
  60621. + }
  60622. +
  60623. + /* complete the left overs */
  60624. + while (size--)
  60625. + {
  60626. + WRITE_UINT8(*p_Dst8, GET_UINT8(*p_Src8));
  60627. + p_Dst8++;p_Src8++;
  60628. + }
  60629. +
  60630. + return pDst;
  60631. +}
  60632. +
  60633. +void * Mem2IOCpy32(void* pDst,void* pSrc, uint32_t size)
  60634. +{
  60635. + uint32_t leftAlign;
  60636. + uint32_t rightAlign;
  60637. + uint32_t lastWord;
  60638. + uint32_t currWord;
  60639. + uint32_t *p_Src32;
  60640. + uint32_t *p_Dst32;
  60641. + uint8_t *p_Src8;
  60642. + uint8_t *p_Dst8;
  60643. +
  60644. + p_Src8 = (uint8_t*)(pSrc);
  60645. + p_Dst8 = (uint8_t*)(pDst);
  60646. + /* first copy byte by byte till the source first alignment
  60647. + * this step is necessary to ensure we do not even try to access
  60648. + * data which is before the source buffer, hence it is not ours.
  60649. + */
  60650. + while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
  60651. + {
  60652. + WRITE_UINT8(*p_Dst8, *p_Src8);
  60653. + p_Dst8++;p_Src8++;
  60654. + size--;
  60655. + }
  60656. +
  60657. + /* align destination (possibly disaligning source)*/
  60658. + while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
  60659. + {
  60660. + WRITE_UINT8(*p_Dst8, *p_Src8);
  60661. + p_Dst8++;p_Src8++;
  60662. + size--;
  60663. + }
  60664. +
  60665. + /* dest is aligned and source is not necessarily aligned */
  60666. + leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
  60667. + rightAlign = 32 - leftAlign;
  60668. +
  60669. + if (leftAlign == 0)
  60670. + {
  60671. + /* source is also aligned */
  60672. + p_Src32 = (uint32_t*)(p_Src8);
  60673. + p_Dst32 = (uint32_t*)(p_Dst8);
  60674. + while (size >> 2) /* size >= 4 */
  60675. + {
  60676. + WRITE_UINT32(*p_Dst32, *p_Src32);
  60677. + p_Dst32++;p_Src32++;
  60678. + size -= 4;
  60679. + }
  60680. + p_Src8 = (uint8_t*)(p_Src32);
  60681. + p_Dst8 = (uint8_t*)(p_Dst32);
  60682. + }
  60683. + else
  60684. + {
  60685. + /* source is not aligned (destination is aligned)*/
  60686. + p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
  60687. + p_Dst32 = (uint32_t*)(p_Dst8);
  60688. + lastWord = *p_Src32++;
  60689. + while(size >> 3) /* size >= 8 */
  60690. + {
  60691. + currWord = *p_Src32;
  60692. + WRITE_UINT32(*p_Dst32, (lastWord << leftAlign) | (currWord >> rightAlign));
  60693. + lastWord = currWord;
  60694. + p_Src32++;p_Dst32++;
  60695. + size -= 4;
  60696. + }
  60697. + p_Dst8 = (uint8_t*)(p_Dst32);
  60698. + p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
  60699. + }
  60700. +
  60701. + /* complete the left overs */
  60702. + while (size--)
  60703. + {
  60704. + WRITE_UINT8(*p_Dst8, *p_Src8);
  60705. + p_Dst8++;p_Src8++;
  60706. + }
  60707. +
  60708. + return pDst;
  60709. +}
  60710. +
  60711. +void * IO2MemCpy32(void* pDst,void* pSrc, uint32_t size)
  60712. +{
  60713. + uint32_t leftAlign;
  60714. + uint32_t rightAlign;
  60715. + uint32_t lastWord;
  60716. + uint32_t currWord;
  60717. + uint32_t *p_Src32;
  60718. + uint32_t *p_Dst32;
  60719. + uint8_t *p_Src8;
  60720. + uint8_t *p_Dst8;
  60721. +
  60722. + p_Src8 = (uint8_t*)(pSrc);
  60723. + p_Dst8 = (uint8_t*)(pDst);
  60724. + /* first copy byte by byte till the source first alignment
  60725. + * this step is necessary to ensure we do not even try to access
  60726. + * data which is before the source buffer, hence it is not ours.
  60727. + */
  60728. + while((PTR_TO_UINT(p_Src8) & 3) && size) /* (pSrc mod 4) > 0 and size > 0 */
  60729. + {
  60730. + *p_Dst8 = GET_UINT8(*p_Src8);
  60731. + p_Dst8++;p_Src8++;
  60732. + size--;
  60733. + }
  60734. +
  60735. + /* align destination (possibly disaligning source)*/
  60736. + while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
  60737. + {
  60738. + *p_Dst8 = GET_UINT8(*p_Src8);
  60739. + p_Dst8++;p_Src8++;
  60740. + size--;
  60741. + }
  60742. +
  60743. + /* dest is aligned and source is not necessarily aligned */
  60744. + leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 3) << 3); /* leftAlign = (pSrc mod 4)*8 */
  60745. + rightAlign = 32 - leftAlign;
  60746. +
  60747. + if (leftAlign == 0)
  60748. + {
  60749. + /* source is also aligned */
  60750. + p_Src32 = (uint32_t*)(p_Src8);
  60751. + p_Dst32 = (uint32_t*)(p_Dst8);
  60752. + while (size >> 2) /* size >= 4 */
  60753. + {
  60754. + *p_Dst32 = GET_UINT32(*p_Src32);
  60755. + p_Dst32++;p_Src32++;
  60756. + size -= 4;
  60757. + }
  60758. + p_Src8 = (uint8_t*)(p_Src32);
  60759. + p_Dst8 = (uint8_t*)(p_Dst32);
  60760. + }
  60761. + else
  60762. + {
  60763. + /* source is not aligned (destination is aligned)*/
  60764. + p_Src32 = (uint32_t*)(p_Src8 - (leftAlign >> 3));
  60765. + p_Dst32 = (uint32_t*)(p_Dst8);
  60766. + lastWord = GET_UINT32(*p_Src32);
  60767. + p_Src32++;
  60768. + while(size >> 3) /* size >= 8 */
  60769. + {
  60770. + currWord = GET_UINT32(*p_Src32);
  60771. + *p_Dst32 = (lastWord << leftAlign) | (currWord >> rightAlign);
  60772. + lastWord = currWord;
  60773. + p_Src32++;p_Dst32++;
  60774. + size -= 4;
  60775. + }
  60776. + p_Dst8 = (uint8_t*)(p_Dst32);
  60777. + p_Src8 = (uint8_t*)(p_Src32) - 4 + (leftAlign >> 3);
  60778. + }
  60779. +
  60780. + /* complete the left overs */
  60781. + while (size--)
  60782. + {
  60783. + *p_Dst8 = GET_UINT8(*p_Src8);
  60784. + p_Dst8++;p_Src8++;
  60785. + }
  60786. +
  60787. + return pDst;
  60788. +}
  60789. +
  60790. +void * MemCpy64(void* pDst,void* pSrc, uint32_t size)
  60791. +{
  60792. + uint32_t leftAlign;
  60793. + uint32_t rightAlign;
  60794. + uint64_t lastWord;
  60795. + uint64_t currWord;
  60796. + uint64_t *pSrc64;
  60797. + uint64_t *pDst64;
  60798. + uint8_t *p_Src8;
  60799. + uint8_t *p_Dst8;
  60800. +
  60801. + p_Src8 = (uint8_t*)(pSrc);
  60802. + p_Dst8 = (uint8_t*)(pDst);
  60803. + /* first copy byte by byte till the source first alignment
  60804. + * this step is necessarily to ensure we do not even try to access
  60805. + * data which is before the source buffer, hence it is not ours.
  60806. + */
  60807. + while((PTR_TO_UINT(p_Src8) & 7) && size) /* (pSrc mod 8) > 0 and size > 0 */
  60808. + {
  60809. + *p_Dst8++ = *p_Src8++;
  60810. + size--;
  60811. + }
  60812. +
  60813. + /* align destination (possibly disaligning source)*/
  60814. + while((PTR_TO_UINT(p_Dst8) & 7) && size) /* (pDst mod 8) > 0 and size > 0 */
  60815. + {
  60816. + *p_Dst8++ = *p_Src8++;
  60817. + size--;
  60818. + }
  60819. +
  60820. + /* dest is aligned and source is not necessarily aligned */
  60821. + leftAlign = (uint32_t)((PTR_TO_UINT(p_Src8) & 7) << 3); /* leftAlign = (pSrc mod 8)*8 */
  60822. + rightAlign = 64 - leftAlign;
  60823. +
  60824. +
  60825. + if (leftAlign == 0)
  60826. + {
  60827. + /* source is also aligned */
  60828. + pSrc64 = (uint64_t*)(p_Src8);
  60829. + pDst64 = (uint64_t*)(p_Dst8);
  60830. + while (size >> 3) /* size >= 8 */
  60831. + {
  60832. + *pDst64++ = *pSrc64++;
  60833. + size -= 8;
  60834. + }
  60835. + p_Src8 = (uint8_t*)(pSrc64);
  60836. + p_Dst8 = (uint8_t*)(pDst64);
  60837. + }
  60838. + else
  60839. + {
  60840. + /* source is not aligned (destination is aligned)*/
  60841. + pSrc64 = (uint64_t*)(p_Src8 - (leftAlign >> 3));
  60842. + pDst64 = (uint64_t*)(p_Dst8);
  60843. + lastWord = *pSrc64++;
  60844. + while(size >> 4) /* size >= 16 */
  60845. + {
  60846. + currWord = *pSrc64;
  60847. + *pDst64 = (lastWord << leftAlign) | (currWord >> rightAlign);
  60848. + lastWord = currWord;
  60849. + pSrc64++;
  60850. + pDst64++;
  60851. + size -= 8;
  60852. + }
  60853. + p_Dst8 = (uint8_t*)(pDst64);
  60854. + p_Src8 = (uint8_t*)(pSrc64) - 8 + (leftAlign >> 3);
  60855. + }
  60856. +
  60857. + /* complete the left overs */
  60858. + while (size--)
  60859. + *p_Dst8++ = *p_Src8++;
  60860. +
  60861. + return pDst;
  60862. +}
  60863. +
  60864. +void * MemSet32(void* pDst, uint8_t val, uint32_t size)
  60865. +{
  60866. + uint32_t val32;
  60867. + uint32_t *p_Dst32;
  60868. + uint8_t *p_Dst8;
  60869. +
  60870. + p_Dst8 = (uint8_t*)(pDst);
  60871. +
  60872. + /* generate four 8-bit val's in 32-bit container */
  60873. + val32 = (uint32_t) val;
  60874. + val32 |= (val32 << 8);
  60875. + val32 |= (val32 << 16);
  60876. +
  60877. + /* align destination to 32 */
  60878. + while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
  60879. + {
  60880. + *p_Dst8++ = val;
  60881. + size--;
  60882. + }
  60883. +
  60884. + /* 32-bit chunks */
  60885. + p_Dst32 = (uint32_t*)(p_Dst8);
  60886. + while (size >> 2) /* size >= 4 */
  60887. + {
  60888. + *p_Dst32++ = val32;
  60889. + size -= 4;
  60890. + }
  60891. +
  60892. + /* complete the leftovers */
  60893. + p_Dst8 = (uint8_t*)(p_Dst32);
  60894. + while (size--)
  60895. + *p_Dst8++ = val;
  60896. +
  60897. + return pDst;
  60898. +}
  60899. +
  60900. +void * IOMemSet32(void* pDst, uint8_t val, uint32_t size)
  60901. +{
  60902. + uint32_t val32;
  60903. + uint32_t *p_Dst32;
  60904. + uint8_t *p_Dst8;
  60905. +
  60906. + p_Dst8 = (uint8_t*)(pDst);
  60907. +
  60908. + /* generate four 8-bit val's in 32-bit container */
  60909. + val32 = (uint32_t) val;
  60910. + val32 |= (val32 << 8);
  60911. + val32 |= (val32 << 16);
  60912. +
  60913. + /* align destination to 32 */
  60914. + while((PTR_TO_UINT(p_Dst8) & 3) && size) /* (pDst mod 4) > 0 and size > 0 */
  60915. + {
  60916. + WRITE_UINT8(*p_Dst8, val);
  60917. + p_Dst8++;
  60918. + size--;
  60919. + }
  60920. +
  60921. + /* 32-bit chunks */
  60922. + p_Dst32 = (uint32_t*)(p_Dst8);
  60923. + while (size >> 2) /* size >= 4 */
  60924. + {
  60925. + WRITE_UINT32(*p_Dst32, val32);
  60926. + p_Dst32++;
  60927. + size -= 4;
  60928. + }
  60929. +
  60930. + /* complete the leftovers */
  60931. + p_Dst8 = (uint8_t*)(p_Dst32);
  60932. + while (size--)
  60933. + {
  60934. + WRITE_UINT8(*p_Dst8, val);
  60935. + p_Dst8++;
  60936. + }
  60937. +
  60938. + return pDst;
  60939. +}
  60940. +
  60941. +void * MemSet64(void* pDst, uint8_t val, uint32_t size)
  60942. +{
  60943. + uint64_t val64;
  60944. + uint64_t *pDst64;
  60945. + uint8_t *p_Dst8;
  60946. +
  60947. + p_Dst8 = (uint8_t*)(pDst);
  60948. +
  60949. + /* generate four 8-bit val's in 32-bit container */
  60950. + val64 = (uint64_t) val;
  60951. + val64 |= (val64 << 8);
  60952. + val64 |= (val64 << 16);
  60953. + val64 |= (val64 << 24);
  60954. + val64 |= (val64 << 32);
  60955. +
  60956. + /* align destination to 64 */
  60957. + while((PTR_TO_UINT(p_Dst8) & 7) && size) /* (pDst mod 8) > 0 and size > 0 */
  60958. + {
  60959. + *p_Dst8++ = val;
  60960. + size--;
  60961. + }
  60962. +
  60963. + /* 64-bit chunks */
  60964. + pDst64 = (uint64_t*)(p_Dst8);
  60965. + while (size >> 4) /* size >= 8 */
  60966. + {
  60967. + *pDst64++ = val64;
  60968. + size -= 8;
  60969. + }
  60970. +
  60971. + /* complete the leftovers */
  60972. + p_Dst8 = (uint8_t*)(pDst64);
  60973. + while (size--)
  60974. + *p_Dst8++ = val;
  60975. +
  60976. + return pDst;
  60977. +}
  60978. +
  60979. +void MemDisp(uint8_t *p, int size)
  60980. +{
  60981. + uint32_t space = (uint32_t)(PTR_TO_UINT(p) & 0x3);
  60982. + uint8_t *p_Limit;
  60983. +
  60984. + if (space)
  60985. + {
  60986. + p_Limit = (p - space + 4);
  60987. +
  60988. + XX_Print("0x%08X: ", (p - space));
  60989. +
  60990. + while (space--)
  60991. + {
  60992. + XX_Print("--");
  60993. + }
  60994. + while (size && (p < p_Limit))
  60995. + {
  60996. + XX_Print("%02x", *(uint8_t*)p);
  60997. + size--;
  60998. + p++;
  60999. + }
  61000. +
  61001. + XX_Print(" ");
  61002. + p_Limit += 12;
  61003. +
  61004. + while ((size > 3) && (p < p_Limit))
  61005. + {
  61006. + XX_Print("%08x ", *(uint32_t*)p);
  61007. + size -= 4;
  61008. + p += 4;
  61009. + }
  61010. + XX_Print("\r\n");
  61011. + }
  61012. +
  61013. + while (size > 15)
  61014. + {
  61015. + XX_Print("0x%08X: %08x %08x %08x %08x\r\n",
  61016. + p, *(uint32_t *)p, *(uint32_t *)(p + 4),
  61017. + *(uint32_t *)(p + 8), *(uint32_t *)(p + 12));
  61018. + size -= 16;
  61019. + p += 16;
  61020. + }
  61021. +
  61022. + if (size)
  61023. + {
  61024. + XX_Print("0x%08X: ", p);
  61025. +
  61026. + while (size > 3)
  61027. + {
  61028. + XX_Print("%08x ", *(uint32_t *)p);
  61029. + size -= 4;
  61030. + p += 4;
  61031. + }
  61032. + while (size)
  61033. + {
  61034. + XX_Print("%02x", *(uint8_t *)p);
  61035. + size--;
  61036. + p++;
  61037. + }
  61038. +
  61039. + XX_Print("\r\n");
  61040. + }
  61041. +}
  61042. --- /dev/null
  61043. +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/mm.c
  61044. @@ -0,0 +1,1155 @@
  61045. +/*
  61046. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  61047. + *
  61048. + * Redistribution and use in source and binary forms, with or without
  61049. + * modification, are permitted provided that the following conditions are met:
  61050. + * * Redistributions of source code must retain the above copyright
  61051. + * notice, this list of conditions and the following disclaimer.
  61052. + * * Redistributions in binary form must reproduce the above copyright
  61053. + * notice, this list of conditions and the following disclaimer in the
  61054. + * documentation and/or other materials provided with the distribution.
  61055. + * * Neither the name of Freescale Semiconductor nor the
  61056. + * names of its contributors may be used to endorse or promote products
  61057. + * derived from this software without specific prior written permission.
  61058. + *
  61059. + *
  61060. + * ALTERNATIVELY, this software may be distributed under the terms of the
  61061. + * GNU General Public License ("GPL") as published by the Free Software
  61062. + * Foundation, either version 2 of that License or (at your option) any
  61063. + * later version.
  61064. + *
  61065. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  61066. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  61067. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  61068. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  61069. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  61070. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  61071. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  61072. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  61073. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  61074. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61075. + */
  61076. +
  61077. +
  61078. +#include "string_ext.h"
  61079. +#include "error_ext.h"
  61080. +#include "std_ext.h"
  61081. +#include "part_ext.h"
  61082. +#include "xx_ext.h"
  61083. +
  61084. +#include "mm.h"
  61085. +
  61086. +
  61087. +
  61088. +
  61089. +/**********************************************************************
  61090. + * MM internal routines set *
  61091. + **********************************************************************/
  61092. +
  61093. +/****************************************************************
  61094. + * Routine: CreateBusyBlock
  61095. + *
  61096. + * Description:
  61097. + * Initializes a new busy block of "size" bytes and started
  61098. + * rom "base" address. Each busy block has a name that
  61099. + * specified the purpose of the memory allocation.
  61100. + *
  61101. + * Arguments:
  61102. + * base - base address of the busy block
  61103. + * size - size of the busy block
  61104. + * name - name that specified the busy block
  61105. + *
  61106. + * Return value:
  61107. + * A pointer to new created structure returned on success;
  61108. + * Otherwise, NULL.
  61109. + ****************************************************************/
  61110. +static t_BusyBlock * CreateBusyBlock(uint64_t base, uint64_t size, char *name)
  61111. +{
  61112. + t_BusyBlock *p_BusyBlock;
  61113. + uint32_t n;
  61114. +
  61115. + p_BusyBlock = (t_BusyBlock *)XX_Malloc(sizeof(t_BusyBlock));
  61116. + if ( !p_BusyBlock )
  61117. + {
  61118. + REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61119. + return NULL;
  61120. + }
  61121. +
  61122. + p_BusyBlock->base = base;
  61123. + p_BusyBlock->end = base + size;
  61124. +
  61125. + n = strlen(name);
  61126. + if (n >= MM_MAX_NAME_LEN)
  61127. + n = MM_MAX_NAME_LEN - 1;
  61128. + strncpy(p_BusyBlock->name, name, MM_MAX_NAME_LEN-1);
  61129. + p_BusyBlock->name[n] = '\0';
  61130. + p_BusyBlock->p_Next = 0;
  61131. +
  61132. + return p_BusyBlock;
  61133. +}
  61134. +
  61135. +/****************************************************************
  61136. + * Routine: CreateNewBlock
  61137. + *
  61138. + * Description:
  61139. + * Initializes a new memory block of "size" bytes and started
  61140. + * from "base" address.
  61141. + *
  61142. + * Arguments:
  61143. + * base - base address of the memory block
  61144. + * size - size of the memory block
  61145. + *
  61146. + * Return value:
  61147. + * A pointer to new created structure returned on success;
  61148. + * Otherwise, NULL.
  61149. + ****************************************************************/
  61150. +static t_MemBlock * CreateNewBlock(uint64_t base, uint64_t size)
  61151. +{
  61152. + t_MemBlock *p_MemBlock;
  61153. +
  61154. + p_MemBlock = (t_MemBlock *)XX_Malloc(sizeof(t_MemBlock));
  61155. + if ( !p_MemBlock )
  61156. + {
  61157. + REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61158. + return NULL;
  61159. + }
  61160. +
  61161. + p_MemBlock->base = base;
  61162. + p_MemBlock->end = base+size;
  61163. + p_MemBlock->p_Next = 0;
  61164. +
  61165. + return p_MemBlock;
  61166. +}
  61167. +
  61168. +/****************************************************************
  61169. + * Routine: CreateFreeBlock
  61170. + *
  61171. + * Description:
  61172. + * Initializes a new free block of of "size" bytes and
  61173. + * started from "base" address.
  61174. + *
  61175. + * Arguments:
  61176. + * base - base address of the free block
  61177. + * size - size of the free block
  61178. + *
  61179. + * Return value:
  61180. + * A pointer to new created structure returned on success;
  61181. + * Otherwise, NULL.
  61182. + ****************************************************************/
  61183. +static t_FreeBlock * CreateFreeBlock(uint64_t base, uint64_t size)
  61184. +{
  61185. + t_FreeBlock *p_FreeBlock;
  61186. +
  61187. + p_FreeBlock = (t_FreeBlock *)XX_Malloc(sizeof(t_FreeBlock));
  61188. + if ( !p_FreeBlock )
  61189. + {
  61190. + REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61191. + return NULL;
  61192. + }
  61193. +
  61194. + p_FreeBlock->base = base;
  61195. + p_FreeBlock->end = base + size;
  61196. + p_FreeBlock->p_Next = 0;
  61197. +
  61198. + return p_FreeBlock;
  61199. +}
  61200. +
  61201. +/****************************************************************
  61202. + * Routine: AddFree
  61203. + *
  61204. + * Description:
  61205. + * Adds a new free block to the free lists. It updates each
  61206. + * free list to include a new free block.
  61207. + * Note, that all free block in each free list are ordered
  61208. + * by their base address.
  61209. + *
  61210. + * Arguments:
  61211. + * p_MM - pointer to the MM object
  61212. + * base - base address of a given free block
  61213. + * end - end address of a given free block
  61214. + *
  61215. + * Return value:
  61216. + *
  61217. + *
  61218. + ****************************************************************/
  61219. +static t_Error AddFree(t_MM *p_MM, uint64_t base, uint64_t end)
  61220. +{
  61221. + t_FreeBlock *p_PrevB, *p_CurrB, *p_NewB;
  61222. + uint64_t alignment;
  61223. + uint64_t alignBase;
  61224. + int i;
  61225. +
  61226. + /* Updates free lists to include a just released block */
  61227. + for (i=0; i <= MM_MAX_ALIGNMENT; i++)
  61228. + {
  61229. + p_PrevB = p_NewB = 0;
  61230. + p_CurrB = p_MM->freeBlocks[i];
  61231. +
  61232. + alignment = (uint64_t)(0x1 << i);
  61233. + alignBase = MAKE_ALIGNED(base, alignment);
  61234. +
  61235. + /* Goes to the next free list if there is no block to free */
  61236. + if (alignBase >= end)
  61237. + continue;
  61238. +
  61239. + /* Looks for a free block that should be updated */
  61240. + while ( p_CurrB )
  61241. + {
  61242. + if ( alignBase <= p_CurrB->end )
  61243. + {
  61244. + if ( end > p_CurrB->end )
  61245. + {
  61246. + t_FreeBlock *p_NextB;
  61247. + while ( p_CurrB->p_Next && end > p_CurrB->p_Next->end )
  61248. + {
  61249. + p_NextB = p_CurrB->p_Next;
  61250. + p_CurrB->p_Next = p_CurrB->p_Next->p_Next;
  61251. + XX_Free(p_NextB);
  61252. + }
  61253. +
  61254. + p_NextB = p_CurrB->p_Next;
  61255. + if ( !p_NextB || (p_NextB && end < p_NextB->base) )
  61256. + {
  61257. + p_CurrB->end = end;
  61258. + }
  61259. + else
  61260. + {
  61261. + p_CurrB->end = p_NextB->end;
  61262. + p_CurrB->p_Next = p_NextB->p_Next;
  61263. + XX_Free(p_NextB);
  61264. + }
  61265. + }
  61266. + else if ( (end < p_CurrB->base) && ((end-alignBase) >= alignment) )
  61267. + {
  61268. + if ((p_NewB = CreateFreeBlock(alignBase, end-alignBase)) == NULL)
  61269. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61270. +
  61271. + p_NewB->p_Next = p_CurrB;
  61272. + if (p_PrevB)
  61273. + p_PrevB->p_Next = p_NewB;
  61274. + else
  61275. + p_MM->freeBlocks[i] = p_NewB;
  61276. + break;
  61277. + }
  61278. +
  61279. + if ((alignBase < p_CurrB->base) && (end >= p_CurrB->base))
  61280. + {
  61281. + p_CurrB->base = alignBase;
  61282. + }
  61283. +
  61284. + /* if size of the free block is less then alignment
  61285. + * deletes that free block from the free list. */
  61286. + if ( (p_CurrB->end - p_CurrB->base) < alignment)
  61287. + {
  61288. + if ( p_PrevB )
  61289. + p_PrevB->p_Next = p_CurrB->p_Next;
  61290. + else
  61291. + p_MM->freeBlocks[i] = p_CurrB->p_Next;
  61292. + XX_Free(p_CurrB);
  61293. + p_CurrB = NULL;
  61294. + }
  61295. + break;
  61296. + }
  61297. + else
  61298. + {
  61299. + p_PrevB = p_CurrB;
  61300. + p_CurrB = p_CurrB->p_Next;
  61301. + }
  61302. + }
  61303. +
  61304. + /* If no free block found to be updated, insert a new free block
  61305. + * to the end of the free list.
  61306. + */
  61307. + if ( !p_CurrB && ((((uint64_t)(end-base)) & ((uint64_t)(alignment-1))) == 0) )
  61308. + {
  61309. + if ((p_NewB = CreateFreeBlock(alignBase, end-base)) == NULL)
  61310. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61311. +
  61312. + if (p_PrevB)
  61313. + p_PrevB->p_Next = p_NewB;
  61314. + else
  61315. + p_MM->freeBlocks[i] = p_NewB;
  61316. + }
  61317. +
  61318. + /* Update boundaries of the new free block */
  61319. + if ((alignment == 1) && !p_NewB)
  61320. + {
  61321. + if ( p_CurrB && base > p_CurrB->base )
  61322. + base = p_CurrB->base;
  61323. + if ( p_CurrB && end < p_CurrB->end )
  61324. + end = p_CurrB->end;
  61325. + }
  61326. + }
  61327. +
  61328. + return (E_OK);
  61329. +}
  61330. +
  61331. +/****************************************************************
  61332. + * Routine: CutFree
  61333. + *
  61334. + * Description:
  61335. + * Cuts a free block from holdBase to holdEnd from the free lists.
  61336. + * That is, it updates all free lists of the MM object do
  61337. + * not include a block of memory from holdBase to holdEnd.
  61338. + * For each free lists it seek for a free block that holds
  61339. + * either holdBase or holdEnd. If such block is found it updates it.
  61340. + *
  61341. + * Arguments:
  61342. + * p_MM - pointer to the MM object
  61343. + * holdBase - base address of the allocated block
  61344. + * holdEnd - end address of the allocated block
  61345. + *
  61346. + * Return value:
  61347. + * E_OK is returned on success,
  61348. + * otherwise returns an error code.
  61349. + *
  61350. + ****************************************************************/
  61351. +static t_Error CutFree(t_MM *p_MM, uint64_t holdBase, uint64_t holdEnd)
  61352. +{
  61353. + t_FreeBlock *p_PrevB, *p_CurrB, *p_NewB;
  61354. + uint64_t alignBase, base, end;
  61355. + uint64_t alignment;
  61356. + int i;
  61357. +
  61358. + for (i=0; i <= MM_MAX_ALIGNMENT; i++)
  61359. + {
  61360. + p_PrevB = p_NewB = 0;
  61361. + p_CurrB = p_MM->freeBlocks[i];
  61362. +
  61363. + alignment = (uint64_t)(0x1 << i);
  61364. + alignBase = MAKE_ALIGNED(holdEnd, alignment);
  61365. +
  61366. + while ( p_CurrB )
  61367. + {
  61368. + base = p_CurrB->base;
  61369. + end = p_CurrB->end;
  61370. +
  61371. + if ( (holdBase <= base) && (holdEnd <= end) && (holdEnd > base) )
  61372. + {
  61373. + if ( alignBase >= end ||
  61374. + (alignBase < end && ((end-alignBase) < alignment)) )
  61375. + {
  61376. + if (p_PrevB)
  61377. + p_PrevB->p_Next = p_CurrB->p_Next;
  61378. + else
  61379. + p_MM->freeBlocks[i] = p_CurrB->p_Next;
  61380. + XX_Free(p_CurrB);
  61381. + }
  61382. + else
  61383. + {
  61384. + p_CurrB->base = alignBase;
  61385. + }
  61386. + break;
  61387. + }
  61388. + else if ( (holdBase > base) && (holdEnd <= end) )
  61389. + {
  61390. + if ( (holdBase-base) >= alignment )
  61391. + {
  61392. + if ( (alignBase < end) && ((end-alignBase) >= alignment) )
  61393. + {
  61394. + if ((p_NewB = CreateFreeBlock(alignBase, end-alignBase)) == NULL)
  61395. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61396. + p_NewB->p_Next = p_CurrB->p_Next;
  61397. + p_CurrB->p_Next = p_NewB;
  61398. + }
  61399. + p_CurrB->end = holdBase;
  61400. + }
  61401. + else if ( (alignBase < end) && ((end-alignBase) >= alignment) )
  61402. + {
  61403. + p_CurrB->base = alignBase;
  61404. + }
  61405. + else
  61406. + {
  61407. + if (p_PrevB)
  61408. + p_PrevB->p_Next = p_CurrB->p_Next;
  61409. + else
  61410. + p_MM->freeBlocks[i] = p_CurrB->p_Next;
  61411. + XX_Free(p_CurrB);
  61412. + }
  61413. + break;
  61414. + }
  61415. + else
  61416. + {
  61417. + p_PrevB = p_CurrB;
  61418. + p_CurrB = p_CurrB->p_Next;
  61419. + }
  61420. + }
  61421. + }
  61422. +
  61423. + return (E_OK);
  61424. +}
  61425. +
  61426. +/****************************************************************
  61427. + * Routine: AddBusy
  61428. + *
  61429. + * Description:
  61430. + * Adds a new busy block to the list of busy blocks. Note,
  61431. + * that all busy blocks are ordered by their base address in
  61432. + * the busy list.
  61433. + *
  61434. + * Arguments:
  61435. + * MM - handler to the MM object
  61436. + * p_NewBusyB - pointer to the a busy block
  61437. + *
  61438. + * Return value:
  61439. + * None.
  61440. + *
  61441. + ****************************************************************/
  61442. +static void AddBusy(t_MM *p_MM, t_BusyBlock *p_NewBusyB)
  61443. +{
  61444. + t_BusyBlock *p_CurrBusyB, *p_PrevBusyB;
  61445. +
  61446. + /* finds a place of a new busy block in the list of busy blocks */
  61447. + p_PrevBusyB = 0;
  61448. + p_CurrBusyB = p_MM->busyBlocks;
  61449. +
  61450. + while ( p_CurrBusyB && p_NewBusyB->base > p_CurrBusyB->base )
  61451. + {
  61452. + p_PrevBusyB = p_CurrBusyB;
  61453. + p_CurrBusyB = p_CurrBusyB->p_Next;
  61454. + }
  61455. +
  61456. + /* insert the new busy block into the list of busy blocks */
  61457. + if ( p_CurrBusyB )
  61458. + p_NewBusyB->p_Next = p_CurrBusyB;
  61459. + if ( p_PrevBusyB )
  61460. + p_PrevBusyB->p_Next = p_NewBusyB;
  61461. + else
  61462. + p_MM->busyBlocks = p_NewBusyB;
  61463. +}
  61464. +
  61465. +/****************************************************************
  61466. + * Routine: CutBusy
  61467. + *
  61468. + * Description:
  61469. + * Cuts a block from base to end from the list of busy blocks.
  61470. + * This is done by updating the list of busy blocks do not
  61471. + * include a given block, that block is going to be free. If a
  61472. + * given block is a part of some other busy block, so that
  61473. + * busy block is updated. If there are number of busy blocks
  61474. + * included in the given block, so all that blocks are removed
  61475. + * from the busy list and the end blocks are updated.
  61476. + * If the given block devides some block into two parts, a new
  61477. + * busy block is added to the busy list.
  61478. + *
  61479. + * Arguments:
  61480. + * p_MM - pointer to the MM object
  61481. + * base - base address of a given busy block
  61482. + * end - end address of a given busy block
  61483. + *
  61484. + * Return value:
  61485. + * E_OK on success, E_NOMEMORY otherwise.
  61486. + *
  61487. + ****************************************************************/
  61488. +static t_Error CutBusy(t_MM *p_MM, uint64_t base, uint64_t end)
  61489. +{
  61490. + t_BusyBlock *p_CurrB, *p_PrevB, *p_NewB;
  61491. +
  61492. + p_CurrB = p_MM->busyBlocks;
  61493. + p_PrevB = p_NewB = 0;
  61494. +
  61495. + while ( p_CurrB )
  61496. + {
  61497. + if ( base < p_CurrB->end )
  61498. + {
  61499. + if ( end > p_CurrB->end )
  61500. + {
  61501. + t_BusyBlock *p_NextB;
  61502. + while ( p_CurrB->p_Next && end >= p_CurrB->p_Next->end )
  61503. + {
  61504. + p_NextB = p_CurrB->p_Next;
  61505. + p_CurrB->p_Next = p_CurrB->p_Next->p_Next;
  61506. + XX_Free(p_NextB);
  61507. + }
  61508. +
  61509. + p_NextB = p_CurrB->p_Next;
  61510. + if ( p_NextB && end > p_NextB->base )
  61511. + {
  61512. + p_NextB->base = end;
  61513. + }
  61514. + }
  61515. +
  61516. + if ( base <= p_CurrB->base )
  61517. + {
  61518. + if ( end < p_CurrB->end && end > p_CurrB->base )
  61519. + {
  61520. + p_CurrB->base = end;
  61521. + }
  61522. + else if ( end >= p_CurrB->end )
  61523. + {
  61524. + if ( p_PrevB )
  61525. + p_PrevB->p_Next = p_CurrB->p_Next;
  61526. + else
  61527. + p_MM->busyBlocks = p_CurrB->p_Next;
  61528. + XX_Free(p_CurrB);
  61529. + }
  61530. + }
  61531. + else
  61532. + {
  61533. + if ( end < p_CurrB->end && end > p_CurrB->base )
  61534. + {
  61535. + if ((p_NewB = CreateBusyBlock(end,
  61536. + p_CurrB->end-end,
  61537. + p_CurrB->name)) == NULL)
  61538. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61539. + p_NewB->p_Next = p_CurrB->p_Next;
  61540. + p_CurrB->p_Next = p_NewB;
  61541. + }
  61542. + p_CurrB->end = base;
  61543. + }
  61544. + break;
  61545. + }
  61546. + else
  61547. + {
  61548. + p_PrevB = p_CurrB;
  61549. + p_CurrB = p_CurrB->p_Next;
  61550. + }
  61551. + }
  61552. +
  61553. + return (E_OK);
  61554. +}
  61555. +
  61556. +/****************************************************************
  61557. + * Routine: MmGetGreaterAlignment
  61558. + *
  61559. + * Description:
  61560. + * Allocates a block of memory according to the given size
  61561. + * and the alignment. That routine is called from the MM_Get
  61562. + * routine if the required alignment is greater then MM_MAX_ALIGNMENT.
  61563. + * In that case, it goes over free blocks of 64 byte align list
  61564. + * and checks if it has the required size of bytes of the required
  61565. + * alignment. If no blocks found returns ILLEGAL_BASE.
  61566. + * After the block is found and data is allocated, it calls
  61567. + * the internal CutFree routine to update all free lists
  61568. + * do not include a just allocated block. Of course, each
  61569. + * free list contains a free blocks with the same alignment.
  61570. + * It is also creates a busy block that holds
  61571. + * information about an allocated block.
  61572. + *
  61573. + * Arguments:
  61574. + * MM - handle to the MM object
  61575. + * size - size of the MM
  61576. + * alignment - index as a power of two defines
  61577. + * a required alignment that is greater then 64.
  61578. + * name - the name that specifies an allocated block.
  61579. + *
  61580. + * Return value:
  61581. + * base address of an allocated block.
  61582. + * ILLEGAL_BASE if can't allocate a block
  61583. + *
  61584. + ****************************************************************/
  61585. +static uint64_t MmGetGreaterAlignment(t_MM *p_MM, uint64_t size, uint64_t alignment, char* name)
  61586. +{
  61587. + t_FreeBlock *p_FreeB;
  61588. + t_BusyBlock *p_NewBusyB;
  61589. + uint64_t holdBase, holdEnd, alignBase = 0;
  61590. +
  61591. + /* goes over free blocks of the 64 byte alignment list
  61592. + and look for a block of the suitable size and
  61593. + base address according to the alignment. */
  61594. + p_FreeB = p_MM->freeBlocks[MM_MAX_ALIGNMENT];
  61595. +
  61596. + while ( p_FreeB )
  61597. + {
  61598. + alignBase = MAKE_ALIGNED(p_FreeB->base, alignment);
  61599. +
  61600. + /* the block is found if the aligned base inside the block
  61601. + * and has the anough size. */
  61602. + if ( alignBase >= p_FreeB->base &&
  61603. + alignBase < p_FreeB->end &&
  61604. + size <= (p_FreeB->end - alignBase) )
  61605. + break;
  61606. + else
  61607. + p_FreeB = p_FreeB->p_Next;
  61608. + }
  61609. +
  61610. + /* If such block isn't found */
  61611. + if ( !p_FreeB )
  61612. + return (uint64_t)(ILLEGAL_BASE);
  61613. +
  61614. + holdBase = alignBase;
  61615. + holdEnd = alignBase + size;
  61616. +
  61617. + /* init a new busy block */
  61618. + if ((p_NewBusyB = CreateBusyBlock(holdBase, size, name)) == NULL)
  61619. + return (uint64_t)(ILLEGAL_BASE);
  61620. +
  61621. + /* calls Update routine to update a lists of free blocks */
  61622. + if ( CutFree ( p_MM, holdBase, holdEnd ) != E_OK )
  61623. + {
  61624. + XX_Free(p_NewBusyB);
  61625. + return (uint64_t)(ILLEGAL_BASE);
  61626. + }
  61627. +
  61628. + /* insert the new busy block into the list of busy blocks */
  61629. + AddBusy ( p_MM, p_NewBusyB );
  61630. +
  61631. + return (holdBase);
  61632. +}
  61633. +
  61634. +
  61635. +/**********************************************************************
  61636. + * MM API routines set *
  61637. + **********************************************************************/
  61638. +
  61639. +/*****************************************************************************/
  61640. +t_Error MM_Init(t_Handle *h_MM, uint64_t base, uint64_t size)
  61641. +{
  61642. + t_MM *p_MM;
  61643. + uint64_t newBase, newSize;
  61644. + int i;
  61645. +
  61646. + if (!size)
  61647. + {
  61648. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Size (should be positive)"));
  61649. + }
  61650. +
  61651. + /* Initializes a new MM object */
  61652. + p_MM = (t_MM *)XX_Malloc(sizeof(t_MM));
  61653. + if (!p_MM)
  61654. + {
  61655. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61656. + }
  61657. +
  61658. + p_MM->h_Spinlock = XX_InitSpinlock();
  61659. + if (!p_MM->h_Spinlock)
  61660. + {
  61661. + XX_Free(p_MM);
  61662. + RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MM spinlock!"));
  61663. + }
  61664. +
  61665. + /* Initializes counter of free memory to total size */
  61666. + p_MM->freeMemSize = size;
  61667. +
  61668. + /* A busy list is empty */
  61669. + p_MM->busyBlocks = 0;
  61670. +
  61671. + /* Initializes a new memory block */
  61672. + if ((p_MM->memBlocks = CreateNewBlock(base, size)) == NULL)
  61673. + {
  61674. + MM_Free(p_MM);
  61675. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61676. + }
  61677. +
  61678. + /* Initializes a new free block for each free list*/
  61679. + for (i=0; i <= MM_MAX_ALIGNMENT; i++)
  61680. + {
  61681. + newBase = MAKE_ALIGNED( base, (0x1 << i) );
  61682. + newSize = size - (newBase - base);
  61683. +
  61684. + if ((p_MM->freeBlocks[i] = CreateFreeBlock(newBase, newSize)) == NULL)
  61685. + {
  61686. + MM_Free(p_MM);
  61687. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  61688. + }
  61689. + }
  61690. +
  61691. + *h_MM = p_MM;
  61692. +
  61693. + return (E_OK);
  61694. +}
  61695. +
  61696. +/*****************************************************************************/
  61697. +void MM_Free(t_Handle h_MM)
  61698. +{
  61699. + t_MM *p_MM = (t_MM *)h_MM;
  61700. + t_MemBlock *p_MemBlock;
  61701. + t_BusyBlock *p_BusyBlock;
  61702. + t_FreeBlock *p_FreeBlock;
  61703. + void *p_Block;
  61704. + int i;
  61705. +
  61706. + ASSERT_COND(p_MM);
  61707. +
  61708. + /* release memory allocated for busy blocks */
  61709. + p_BusyBlock = p_MM->busyBlocks;
  61710. + while ( p_BusyBlock )
  61711. + {
  61712. + p_Block = p_BusyBlock;
  61713. + p_BusyBlock = p_BusyBlock->p_Next;
  61714. + XX_Free(p_Block);
  61715. + }
  61716. +
  61717. + /* release memory allocated for free blocks */
  61718. + for (i=0; i <= MM_MAX_ALIGNMENT; i++)
  61719. + {
  61720. + p_FreeBlock = p_MM->freeBlocks[i];
  61721. + while ( p_FreeBlock )
  61722. + {
  61723. + p_Block = p_FreeBlock;
  61724. + p_FreeBlock = p_FreeBlock->p_Next;
  61725. + XX_Free(p_Block);
  61726. + }
  61727. + }
  61728. +
  61729. + /* release memory allocated for memory blocks */
  61730. + p_MemBlock = p_MM->memBlocks;
  61731. + while ( p_MemBlock )
  61732. + {
  61733. + p_Block = p_MemBlock;
  61734. + p_MemBlock = p_MemBlock->p_Next;
  61735. + XX_Free(p_Block);
  61736. + }
  61737. +
  61738. + if (p_MM->h_Spinlock)
  61739. + XX_FreeSpinlock(p_MM->h_Spinlock);
  61740. +
  61741. + /* release memory allocated for MM object itself */
  61742. + XX_Free(p_MM);
  61743. +}
  61744. +
  61745. +/*****************************************************************************/
  61746. +uint64_t MM_Get(t_Handle h_MM, uint64_t size, uint64_t alignment, char* name)
  61747. +{
  61748. + t_MM *p_MM = (t_MM *)h_MM;
  61749. + t_FreeBlock *p_FreeB;
  61750. + t_BusyBlock *p_NewBusyB;
  61751. + uint64_t holdBase, holdEnd, j, i = 0;
  61752. + uint32_t intFlags;
  61753. +
  61754. + SANITY_CHECK_RETURN_VALUE(p_MM, E_INVALID_HANDLE, (uint64_t)ILLEGAL_BASE);
  61755. +
  61756. + /* checks that alignment value is greater then zero */
  61757. + if (alignment == 0)
  61758. + {
  61759. + alignment = 1;
  61760. + }
  61761. +
  61762. + j = alignment;
  61763. +
  61764. + /* checks if alignment is a power of two, if it correct and if the
  61765. + required size is multiple of the given alignment. */
  61766. + while ((j & 0x1) == 0)
  61767. + {
  61768. + i++;
  61769. + j = j >> 1;
  61770. + }
  61771. +
  61772. + /* if the given alignment isn't power of two, returns an error */
  61773. + if (j != 1)
  61774. + {
  61775. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("alignment (should be power of 2)"));
  61776. + return (uint64_t)ILLEGAL_BASE;
  61777. + }
  61778. +
  61779. + if (i > MM_MAX_ALIGNMENT)
  61780. + {
  61781. + return (MmGetGreaterAlignment(p_MM, size, alignment, name));
  61782. + }
  61783. +
  61784. + intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
  61785. + /* look for a block of the size greater or equal to the required size. */
  61786. + p_FreeB = p_MM->freeBlocks[i];
  61787. + while ( p_FreeB && (p_FreeB->end - p_FreeB->base) < size )
  61788. + p_FreeB = p_FreeB->p_Next;
  61789. +
  61790. + /* If such block is found */
  61791. + if ( !p_FreeB )
  61792. + {
  61793. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61794. + return (uint64_t)(ILLEGAL_BASE);
  61795. + }
  61796. +
  61797. + holdBase = p_FreeB->base;
  61798. + holdEnd = holdBase + size;
  61799. +
  61800. + /* init a new busy block */
  61801. + if ((p_NewBusyB = CreateBusyBlock(holdBase, size, name)) == NULL)
  61802. + {
  61803. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61804. + return (uint64_t)(ILLEGAL_BASE);
  61805. + }
  61806. +
  61807. + /* calls Update routine to update a lists of free blocks */
  61808. + if ( CutFree ( p_MM, holdBase, holdEnd ) != E_OK )
  61809. + {
  61810. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61811. + XX_Free(p_NewBusyB);
  61812. + return (uint64_t)(ILLEGAL_BASE);
  61813. + }
  61814. +
  61815. + /* Decreasing the allocated memory size from free memory size */
  61816. + p_MM->freeMemSize -= size;
  61817. +
  61818. + /* insert the new busy block into the list of busy blocks */
  61819. + AddBusy ( p_MM, p_NewBusyB );
  61820. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61821. +
  61822. + return (holdBase);
  61823. +}
  61824. +
  61825. +/*****************************************************************************/
  61826. +uint64_t MM_GetForce(t_Handle h_MM, uint64_t base, uint64_t size, char* name)
  61827. +{
  61828. + t_MM *p_MM = (t_MM *)h_MM;
  61829. + t_FreeBlock *p_FreeB;
  61830. + t_BusyBlock *p_NewBusyB;
  61831. + uint32_t intFlags;
  61832. + bool blockIsFree = FALSE;
  61833. +
  61834. + ASSERT_COND(p_MM);
  61835. +
  61836. + intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
  61837. + p_FreeB = p_MM->freeBlocks[0]; /* The biggest free blocks are in the
  61838. + free list with alignment 1 */
  61839. +
  61840. + while ( p_FreeB )
  61841. + {
  61842. + if ( base >= p_FreeB->base && (base+size) <= p_FreeB->end )
  61843. + {
  61844. + blockIsFree = TRUE;
  61845. + break;
  61846. + }
  61847. + else
  61848. + p_FreeB = p_FreeB->p_Next;
  61849. + }
  61850. +
  61851. + if ( !blockIsFree )
  61852. + {
  61853. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61854. + return (uint64_t)(ILLEGAL_BASE);
  61855. + }
  61856. +
  61857. + /* init a new busy block */
  61858. + if ((p_NewBusyB = CreateBusyBlock(base, size, name)) == NULL)
  61859. + {
  61860. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61861. + return (uint64_t)(ILLEGAL_BASE);
  61862. + }
  61863. +
  61864. + /* calls Update routine to update a lists of free blocks */
  61865. + if ( CutFree ( p_MM, base, base+size ) != E_OK )
  61866. + {
  61867. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61868. + XX_Free(p_NewBusyB);
  61869. + return (uint64_t)(ILLEGAL_BASE);
  61870. + }
  61871. +
  61872. + /* Decreasing the allocated memory size from free memory size */
  61873. + p_MM->freeMemSize -= size;
  61874. +
  61875. + /* insert the new busy block into the list of busy blocks */
  61876. + AddBusy ( p_MM, p_NewBusyB );
  61877. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61878. +
  61879. + return (base);
  61880. +}
  61881. +
  61882. +/*****************************************************************************/
  61883. +uint64_t MM_GetForceMin(t_Handle h_MM, uint64_t size, uint64_t alignment, uint64_t min, char* name)
  61884. +{
  61885. + t_MM *p_MM = (t_MM *)h_MM;
  61886. + t_FreeBlock *p_FreeB;
  61887. + t_BusyBlock *p_NewBusyB;
  61888. + uint64_t holdBase, holdEnd, j = alignment, i=0;
  61889. + uint32_t intFlags;
  61890. +
  61891. + ASSERT_COND(p_MM);
  61892. +
  61893. + /* checks if alignment is a power of two, if it correct and if the
  61894. + required size is multiple of the given alignment. */
  61895. + while ((j & 0x1) == 0)
  61896. + {
  61897. + i++;
  61898. + j = j >> 1;
  61899. + }
  61900. +
  61901. + if ( (j != 1) || (i > MM_MAX_ALIGNMENT) )
  61902. + {
  61903. + return (uint64_t)(ILLEGAL_BASE);
  61904. + }
  61905. +
  61906. + intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
  61907. + p_FreeB = p_MM->freeBlocks[i];
  61908. +
  61909. + /* look for the first block that contains the minimum
  61910. + base address. If the whole required size may be fit
  61911. + into it, use that block, otherwise look for the next
  61912. + block of size greater or equal to the required size. */
  61913. + while ( p_FreeB && (min >= p_FreeB->end))
  61914. + p_FreeB = p_FreeB->p_Next;
  61915. +
  61916. + /* If such block is found */
  61917. + if ( !p_FreeB )
  61918. + {
  61919. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61920. + return (uint64_t)(ILLEGAL_BASE);
  61921. + }
  61922. +
  61923. + /* if this block is large enough, use this block */
  61924. + holdBase = ( min <= p_FreeB->base ) ? p_FreeB->base : min;
  61925. + if ((holdBase + size) <= p_FreeB->end )
  61926. + {
  61927. + holdEnd = holdBase + size;
  61928. + }
  61929. + else
  61930. + {
  61931. + p_FreeB = p_FreeB->p_Next;
  61932. + while ( p_FreeB && ((p_FreeB->end - p_FreeB->base) < size) )
  61933. + p_FreeB = p_FreeB->p_Next;
  61934. +
  61935. + /* If such block is found */
  61936. + if ( !p_FreeB )
  61937. + {
  61938. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61939. + return (uint64_t)(ILLEGAL_BASE);
  61940. + }
  61941. +
  61942. + holdBase = p_FreeB->base;
  61943. + holdEnd = holdBase + size;
  61944. + }
  61945. +
  61946. + /* init a new busy block */
  61947. + if ((p_NewBusyB = CreateBusyBlock(holdBase, size, name)) == NULL)
  61948. + {
  61949. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61950. + return (uint64_t)(ILLEGAL_BASE);
  61951. + }
  61952. +
  61953. + /* calls Update routine to update a lists of free blocks */
  61954. + if ( CutFree( p_MM, holdBase, holdEnd ) != E_OK )
  61955. + {
  61956. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61957. + XX_Free(p_NewBusyB);
  61958. + return (uint64_t)(ILLEGAL_BASE);
  61959. + }
  61960. +
  61961. + /* Decreasing the allocated memory size from free memory size */
  61962. + p_MM->freeMemSize -= size;
  61963. +
  61964. + /* insert the new busy block into the list of busy blocks */
  61965. + AddBusy( p_MM, p_NewBusyB );
  61966. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61967. +
  61968. + return (holdBase);
  61969. +}
  61970. +
  61971. +/*****************************************************************************/
  61972. +uint64_t MM_Put(t_Handle h_MM, uint64_t base)
  61973. +{
  61974. + t_MM *p_MM = (t_MM *)h_MM;
  61975. + t_BusyBlock *p_BusyB, *p_PrevBusyB;
  61976. + uint64_t size;
  61977. + uint32_t intFlags;
  61978. +
  61979. + ASSERT_COND(p_MM);
  61980. +
  61981. + /* Look for a busy block that have the given base value.
  61982. + * That block will be returned back to the memory.
  61983. + */
  61984. + p_PrevBusyB = 0;
  61985. +
  61986. + intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
  61987. + p_BusyB = p_MM->busyBlocks;
  61988. + while ( p_BusyB && base != p_BusyB->base )
  61989. + {
  61990. + p_PrevBusyB = p_BusyB;
  61991. + p_BusyB = p_BusyB->p_Next;
  61992. + }
  61993. +
  61994. + if ( !p_BusyB )
  61995. + {
  61996. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  61997. + return (uint64_t)(0);
  61998. + }
  61999. +
  62000. + if ( AddFree( p_MM, p_BusyB->base, p_BusyB->end ) != E_OK )
  62001. + {
  62002. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62003. + return (uint64_t)(0);
  62004. + }
  62005. +
  62006. + /* removes a busy block form the list of busy blocks */
  62007. + if ( p_PrevBusyB )
  62008. + p_PrevBusyB->p_Next = p_BusyB->p_Next;
  62009. + else
  62010. + p_MM->busyBlocks = p_BusyB->p_Next;
  62011. +
  62012. + size = p_BusyB->end - p_BusyB->base;
  62013. +
  62014. + /* Adding the deallocated memory size to free memory size */
  62015. + p_MM->freeMemSize += size;
  62016. +
  62017. + XX_Free(p_BusyB);
  62018. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62019. +
  62020. + return (size);
  62021. +}
  62022. +
  62023. +/*****************************************************************************/
  62024. +uint64_t MM_PutForce(t_Handle h_MM, uint64_t base, uint64_t size)
  62025. +{
  62026. + t_MM *p_MM = (t_MM *)h_MM;
  62027. + uint64_t end = base + size;
  62028. + uint32_t intFlags;
  62029. +
  62030. + ASSERT_COND(p_MM);
  62031. +
  62032. + intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
  62033. +
  62034. + if ( CutBusy( p_MM, base, end ) != E_OK )
  62035. + {
  62036. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62037. + return (uint64_t)(0);
  62038. + }
  62039. +
  62040. + if ( AddFree ( p_MM, base, end ) != E_OK )
  62041. + {
  62042. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62043. + return (uint64_t)(0);
  62044. + }
  62045. +
  62046. + /* Adding the deallocated memory size to free memory size */
  62047. + p_MM->freeMemSize += size;
  62048. +
  62049. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62050. +
  62051. + return (size);
  62052. +}
  62053. +
  62054. +/*****************************************************************************/
  62055. +t_Error MM_Add(t_Handle h_MM, uint64_t base, uint64_t size)
  62056. +{
  62057. + t_MM *p_MM = (t_MM *)h_MM;
  62058. + t_MemBlock *p_MemB, *p_NewMemB;
  62059. + t_Error errCode;
  62060. + uint32_t intFlags;
  62061. +
  62062. + ASSERT_COND(p_MM);
  62063. +
  62064. + /* find a last block in the list of memory blocks to insert a new
  62065. + * memory block
  62066. + */
  62067. + intFlags = XX_LockIntrSpinlock(p_MM->h_Spinlock);
  62068. +
  62069. + p_MemB = p_MM->memBlocks;
  62070. + while ( p_MemB->p_Next )
  62071. + {
  62072. + if ( base >= p_MemB->base && base < p_MemB->end )
  62073. + {
  62074. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62075. + RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
  62076. + }
  62077. + p_MemB = p_MemB->p_Next;
  62078. + }
  62079. + /* check for a last memory block */
  62080. + if ( base >= p_MemB->base && base < p_MemB->end )
  62081. + {
  62082. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62083. + RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
  62084. + }
  62085. +
  62086. + /* create a new memory block */
  62087. + if ((p_NewMemB = CreateNewBlock(base, size)) == NULL)
  62088. + {
  62089. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62090. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  62091. + }
  62092. +
  62093. + /* append a new memory block to the end of the list of memory blocks */
  62094. + p_MemB->p_Next = p_NewMemB;
  62095. +
  62096. + /* add a new free block to the free lists */
  62097. + errCode = AddFree(p_MM, base, base+size);
  62098. + if (errCode)
  62099. + {
  62100. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62101. + p_MemB->p_Next = 0;
  62102. + XX_Free(p_NewMemB);
  62103. + return ((t_Error)errCode);
  62104. + }
  62105. +
  62106. + /* Adding the new block size to free memory size */
  62107. + p_MM->freeMemSize += size;
  62108. +
  62109. + XX_UnlockIntrSpinlock(p_MM->h_Spinlock, intFlags);
  62110. +
  62111. + return (E_OK);
  62112. +}
  62113. +
  62114. +/*****************************************************************************/
  62115. +uint64_t MM_GetMemBlock(t_Handle h_MM, int index)
  62116. +{
  62117. + t_MM *p_MM = (t_MM*)h_MM;
  62118. + t_MemBlock *p_MemBlock;
  62119. + int i;
  62120. +
  62121. + ASSERT_COND(p_MM);
  62122. +
  62123. + p_MemBlock = p_MM->memBlocks;
  62124. + for (i=0; i < index; i++)
  62125. + p_MemBlock = p_MemBlock->p_Next;
  62126. +
  62127. + if ( p_MemBlock )
  62128. + return (p_MemBlock->base);
  62129. + else
  62130. + return (uint64_t)ILLEGAL_BASE;
  62131. +}
  62132. +
  62133. +/*****************************************************************************/
  62134. +uint64_t MM_GetBase(t_Handle h_MM)
  62135. +{
  62136. + t_MM *p_MM = (t_MM*)h_MM;
  62137. + t_MemBlock *p_MemBlock;
  62138. +
  62139. + ASSERT_COND(p_MM);
  62140. +
  62141. + p_MemBlock = p_MM->memBlocks;
  62142. + return p_MemBlock->base;
  62143. +}
  62144. +
  62145. +/*****************************************************************************/
  62146. +bool MM_InRange(t_Handle h_MM, uint64_t addr)
  62147. +{
  62148. + t_MM *p_MM = (t_MM*)h_MM;
  62149. + t_MemBlock *p_MemBlock;
  62150. +
  62151. + ASSERT_COND(p_MM);
  62152. +
  62153. + p_MemBlock = p_MM->memBlocks;
  62154. +
  62155. + if ((addr >= p_MemBlock->base) && (addr < p_MemBlock->end))
  62156. + return TRUE;
  62157. + else
  62158. + return FALSE;
  62159. +}
  62160. +
  62161. +/*****************************************************************************/
  62162. +uint64_t MM_GetFreeMemSize(t_Handle h_MM)
  62163. +{
  62164. + t_MM *p_MM = (t_MM*)h_MM;
  62165. +
  62166. + ASSERT_COND(p_MM);
  62167. +
  62168. + return p_MM->freeMemSize;
  62169. +}
  62170. +
  62171. +/*****************************************************************************/
  62172. +void MM_Dump(t_Handle h_MM)
  62173. +{
  62174. + t_MM *p_MM = (t_MM *)h_MM;
  62175. + t_FreeBlock *p_FreeB;
  62176. + t_BusyBlock *p_BusyB;
  62177. + int i;
  62178. +
  62179. + p_BusyB = p_MM->busyBlocks;
  62180. + XX_Print("List of busy blocks:\n");
  62181. + while (p_BusyB)
  62182. + {
  62183. + XX_Print("\t0x%p: (%s: b=0x%llx, e=0x%llx)\n", p_BusyB, p_BusyB->name, p_BusyB->base, p_BusyB->end );
  62184. + p_BusyB = p_BusyB->p_Next;
  62185. + }
  62186. +
  62187. + XX_Print("\nLists of free blocks according to alignment:\n");
  62188. + for (i=0; i <= MM_MAX_ALIGNMENT; i++)
  62189. + {
  62190. + XX_Print("%d alignment:\n", (0x1 << i));
  62191. + p_FreeB = p_MM->freeBlocks[i];
  62192. + while (p_FreeB)
  62193. + {
  62194. + XX_Print("\t0x%p: (b=0x%llx, e=0x%llx)\n", p_FreeB, p_FreeB->base, p_FreeB->end);
  62195. + p_FreeB = p_FreeB->p_Next;
  62196. + }
  62197. + XX_Print("\n");
  62198. + }
  62199. +}
  62200. --- /dev/null
  62201. +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/mm.h
  62202. @@ -0,0 +1,105 @@
  62203. +/*
  62204. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  62205. + *
  62206. + * Redistribution and use in source and binary forms, with or without
  62207. + * modification, are permitted provided that the following conditions are met:
  62208. + * * Redistributions of source code must retain the above copyright
  62209. + * notice, this list of conditions and the following disclaimer.
  62210. + * * Redistributions in binary form must reproduce the above copyright
  62211. + * notice, this list of conditions and the following disclaimer in the
  62212. + * documentation and/or other materials provided with the distribution.
  62213. + * * Neither the name of Freescale Semiconductor nor the
  62214. + * names of its contributors may be used to endorse or promote products
  62215. + * derived from this software without specific prior written permission.
  62216. + *
  62217. + *
  62218. + * ALTERNATIVELY, this software may be distributed under the terms of the
  62219. + * GNU General Public License ("GPL") as published by the Free Software
  62220. + * Foundation, either version 2 of that License or (at your option) any
  62221. + * later version.
  62222. + *
  62223. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  62224. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  62225. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  62226. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  62227. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  62228. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  62229. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  62230. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62231. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  62232. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62233. + */
  62234. +
  62235. +
  62236. +/****************************************************************
  62237. + *
  62238. + * File: mm.h
  62239. + *
  62240. + *
  62241. + * Description:
  62242. + * MM (Memory Management) object definitions.
  62243. + * It also includes definitions of the Free Block, Busy Block
  62244. + * and Memory Block structures used by the MM object.
  62245. + *
  62246. + ****************************************************************/
  62247. +
  62248. +#ifndef __MM_H
  62249. +#define __MM_H
  62250. +
  62251. +
  62252. +#include "mm_ext.h"
  62253. +
  62254. +#define __ERR_MODULE__ MODULE_MM
  62255. +
  62256. +
  62257. +#define MAKE_ALIGNED(addr, align) \
  62258. + (((uint64_t)(addr) + ((align) - 1)) & (~(((uint64_t)align) - 1)))
  62259. +
  62260. +
  62261. +/* t_MemBlock data structure defines parameters of the Memory Block */
  62262. +typedef struct t_MemBlock
  62263. +{
  62264. + struct t_MemBlock *p_Next; /* Pointer to the next memory block */
  62265. +
  62266. + uint64_t base; /* Base address of the memory block */
  62267. + uint64_t end; /* End address of the memory block */
  62268. +} t_MemBlock;
  62269. +
  62270. +
  62271. +/* t_FreeBlock data structure defines parameters of the Free Block */
  62272. +typedef struct t_FreeBlock
  62273. +{
  62274. + struct t_FreeBlock *p_Next; /* Pointer to the next free block */
  62275. +
  62276. + uint64_t base; /* Base address of the block */
  62277. + uint64_t end; /* End address of the block */
  62278. +} t_FreeBlock;
  62279. +
  62280. +
  62281. +/* t_BusyBlock data structure defines parameters of the Busy Block */
  62282. +typedef struct t_BusyBlock
  62283. +{
  62284. + struct t_BusyBlock *p_Next; /* Pointer to the next free block */
  62285. +
  62286. + uint64_t base; /* Base address of the block */
  62287. + uint64_t end; /* End address of the block */
  62288. + char name[MM_MAX_NAME_LEN]; /* That block of memory was allocated for
  62289. + something specified by the Name */
  62290. +} t_BusyBlock;
  62291. +
  62292. +
  62293. +/* t_MM data structure defines parameters of the MM object */
  62294. +typedef struct t_MM
  62295. +{
  62296. + t_Handle h_Spinlock;
  62297. +
  62298. + t_MemBlock *memBlocks; /* List of memory blocks (Memory list) */
  62299. + t_BusyBlock *busyBlocks; /* List of busy blocks (Busy list) */
  62300. + t_FreeBlock *freeBlocks[MM_MAX_ALIGNMENT + 1];
  62301. + /* Alignment lists of free blocks (Free lists) */
  62302. +
  62303. + uint64_t freeMemSize; /* Total size of free memory (in bytes) */
  62304. +} t_MM;
  62305. +
  62306. +
  62307. +#endif /* __MM_H */
  62308. --- /dev/null
  62309. +++ b/drivers/net/ethernet/freescale/sdk_fman/etc/sprint.c
  62310. @@ -0,0 +1,81 @@
  62311. +/*
  62312. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  62313. + *
  62314. + * Redistribution and use in source and binary forms, with or without
  62315. + * modification, are permitted provided that the following conditions are met:
  62316. + * * Redistributions of source code must retain the above copyright
  62317. + * notice, this list of conditions and the following disclaimer.
  62318. + * * Redistributions in binary form must reproduce the above copyright
  62319. + * notice, this list of conditions and the following disclaimer in the
  62320. + * documentation and/or other materials provided with the distribution.
  62321. + * * Neither the name of Freescale Semiconductor nor the
  62322. + * names of its contributors may be used to endorse or promote products
  62323. + * derived from this software without specific prior written permission.
  62324. + *
  62325. + *
  62326. + * ALTERNATIVELY, this software may be distributed under the terms of the
  62327. + * GNU General Public License ("GPL") as published by the Free Software
  62328. + * Foundation, either version 2 of that License or (at your option) any
  62329. + * later version.
  62330. + *
  62331. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  62332. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  62333. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  62334. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  62335. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  62336. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  62337. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  62338. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62339. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  62340. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62341. + */
  62342. +
  62343. +
  62344. +/*------------------------------------------------------*/
  62345. +/* File: sprint.c */
  62346. +/* */
  62347. +/* Description: */
  62348. +/* Debug routines (externals) */
  62349. +/*------------------------------------------------------*/
  62350. +#include "string_ext.h"
  62351. +#include "stdlib_ext.h"
  62352. +#include "stdarg_ext.h"
  62353. +#include "sprint_ext.h"
  62354. +#include "std_ext.h"
  62355. +#include "xx_ext.h"
  62356. +
  62357. +
  62358. +int Sprint(char * buf, const char *fmt, ...)
  62359. +{
  62360. + va_list args;
  62361. + int i;
  62362. +
  62363. + va_start(args, fmt);
  62364. + i=vsprintf(buf,fmt,args);
  62365. + va_end(args);
  62366. + return i;
  62367. +}
  62368. +
  62369. +int Snprint(char * buf, uint32_t size, const char *fmt, ...)
  62370. +{
  62371. + va_list args;
  62372. + int i;
  62373. +
  62374. + va_start(args, fmt);
  62375. + i=vsnprintf(buf,size,fmt,args);
  62376. + va_end(args);
  62377. + return i;
  62378. +}
  62379. +
  62380. +#ifndef NCSW_VXWORKS
  62381. +int Sscan(const char * buf, const char * fmt, ...)
  62382. +{
  62383. + va_list args;
  62384. + int i;
  62385. +
  62386. + va_start(args,fmt);
  62387. + i = vsscanf(buf,fmt,args);
  62388. + va_end(args);
  62389. + return i;
  62390. +}
  62391. +#endif /* NCSW_VXWORKS */
  62392. --- /dev/null
  62393. +++ b/drivers/net/ethernet/freescale/sdk_fman/fmanv3h_dflags.h
  62394. @@ -0,0 +1,57 @@
  62395. +/*
  62396. + * Copyright 2012 Freescale Semiconductor Inc.
  62397. + *
  62398. + * Redistribution and use in source and binary forms, with or without
  62399. + * modification, are permitted provided that the following conditions are met:
  62400. + * * Redistributions of source code must retain the above copyright
  62401. + * notice, this list of conditions and the following disclaimer.
  62402. + * * Redistributions in binary form must reproduce the above copyright
  62403. + * notice, this list of conditions and the following disclaimer in the
  62404. + * documentation and/or other materials provided with the distribution.
  62405. + * * Neither the name of Freescale Semiconductor nor the
  62406. + * names of its contributors may be used to endorse or promote products
  62407. + * derived from this software without specific prior written permission.
  62408. + *
  62409. + *
  62410. + * ALTERNATIVELY, this software may be distributed under the terms of the
  62411. + * GNU General Public License ("GPL") as published by the Free Software
  62412. + * Foundation, either version 2 of that License or (at your option) any
  62413. + * later version.
  62414. + *
  62415. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  62416. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  62417. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  62418. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  62419. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  62420. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  62421. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  62422. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62423. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  62424. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62425. + */
  62426. +
  62427. +#ifndef __dflags_h
  62428. +#define __dflags_h
  62429. +
  62430. +
  62431. +#define NCSW_LINUX
  62432. +
  62433. +#define T4240
  62434. +#define NCSW_PPC_CORE
  62435. +
  62436. +#define DEBUG_ERRORS 1
  62437. +
  62438. +#if defined(DEBUG)
  62439. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO
  62440. +
  62441. +#define DEBUG_XX_MALLOC
  62442. +#define DEBUG_MEM_LEAKS
  62443. +
  62444. +#else
  62445. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING
  62446. +#endif /* (DEBUG) */
  62447. +
  62448. +#define REPORT_EVENTS 1
  62449. +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR
  62450. +
  62451. +#endif /* __dflags_h */
  62452. --- /dev/null
  62453. +++ b/drivers/net/ethernet/freescale/sdk_fman/fmanv3l_dflags.h
  62454. @@ -0,0 +1,56 @@
  62455. +/*
  62456. + * Copyright 2012 Freescale Semiconductor Inc.
  62457. + *
  62458. + * Redistribution and use in source and binary forms, with or without
  62459. + * modification, are permitted provided that the following conditions are met:
  62460. + * * Redistributions of source code must retain the above copyright
  62461. + * notice, this list of conditions and the following disclaimer.
  62462. + * * Redistributions in binary form must reproduce the above copyright
  62463. + * notice, this list of conditions and the following disclaimer in the
  62464. + * documentation and/or other materials provided with the distribution.
  62465. + * * Neither the name of Freescale Semiconductor nor the
  62466. + * names of its contributors may be used to endorse or promote products
  62467. + * derived from this software without specific prior written permission.
  62468. + *
  62469. + *
  62470. + * ALTERNATIVELY, this software may be distributed under the terms of the
  62471. + * GNU General Public License ("GPL") as published by the Free Software
  62472. + * Foundation, either version 2 of that License or (at your option) any
  62473. + * later version.
  62474. + *
  62475. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  62476. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  62477. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  62478. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  62479. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  62480. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  62481. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  62482. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62483. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  62484. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62485. + */
  62486. +
  62487. +#ifndef __dflags_h
  62488. +#define __dflags_h
  62489. +
  62490. +
  62491. +#define NCSW_LINUX
  62492. +
  62493. +#define NCSW_PPC_CORE
  62494. +
  62495. +#define DEBUG_ERRORS 1
  62496. +
  62497. +#if defined(DEBUG)
  62498. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO
  62499. +
  62500. +#define DEBUG_XX_MALLOC
  62501. +#define DEBUG_MEM_LEAKS
  62502. +
  62503. +#else
  62504. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING
  62505. +#endif /* (DEBUG) */
  62506. +
  62507. +#define REPORT_EVENTS 1
  62508. +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR
  62509. +
  62510. +#endif /* __dflags_h */
  62511. --- /dev/null
  62512. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/crc_mac_addr_ext.h
  62513. @@ -0,0 +1,364 @@
  62514. +/*
  62515. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  62516. + *
  62517. + * Redistribution and use in source and binary forms, with or without
  62518. + * modification, are permitted provided that the following conditions are met:
  62519. + * * Redistributions of source code must retain the above copyright
  62520. + * notice, this list of conditions and the following disclaimer.
  62521. + * * Redistributions in binary form must reproduce the above copyright
  62522. + * notice, this list of conditions and the following disclaimer in the
  62523. + * documentation and/or other materials provided with the distribution.
  62524. + * * Neither the name of Freescale Semiconductor nor the
  62525. + * names of its contributors may be used to endorse or promote products
  62526. + * derived from this software without specific prior written permission.
  62527. + *
  62528. + *
  62529. + * ALTERNATIVELY, this software may be distributed under the terms of the
  62530. + * GNU General Public License ("GPL") as published by the Free Software
  62531. + * Foundation, either version 2 of that License or (at your option) any
  62532. + * later version.
  62533. + *
  62534. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  62535. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  62536. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  62537. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  62538. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  62539. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  62540. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  62541. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62542. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  62543. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62544. + */
  62545. +
  62546. +
  62547. +/*------------------------------------------------------*/
  62548. +/* */
  62549. +/* File: crc_mac_addr_ext.h */
  62550. +/* */
  62551. +/* Description: */
  62552. +/* Define a macro that calculate the crc value of */
  62553. +/* an Ethernet MAC address (48 bitd address */
  62554. +/*------------------------------------------------------*/
  62555. +
  62556. +#ifndef __crc_mac_addr_ext_h
  62557. +#define __crc_mac_addr_ext_h
  62558. +
  62559. +#include "std_ext.h"
  62560. +
  62561. +
  62562. +static uint32_t crc_table[256] =
  62563. +{
  62564. + 0x00000000,
  62565. + 0x77073096,
  62566. + 0xee0e612c,
  62567. + 0x990951ba,
  62568. + 0x076dc419,
  62569. + 0x706af48f,
  62570. + 0xe963a535,
  62571. + 0x9e6495a3,
  62572. + 0x0edb8832,
  62573. + 0x79dcb8a4,
  62574. + 0xe0d5e91e,
  62575. + 0x97d2d988,
  62576. + 0x09b64c2b,
  62577. + 0x7eb17cbd,
  62578. + 0xe7b82d07,
  62579. + 0x90bf1d91,
  62580. + 0x1db71064,
  62581. + 0x6ab020f2,
  62582. + 0xf3b97148,
  62583. + 0x84be41de,
  62584. + 0x1adad47d,
  62585. + 0x6ddde4eb,
  62586. + 0xf4d4b551,
  62587. + 0x83d385c7,
  62588. + 0x136c9856,
  62589. + 0x646ba8c0,
  62590. + 0xfd62f97a,
  62591. + 0x8a65c9ec,
  62592. + 0x14015c4f,
  62593. + 0x63066cd9,
  62594. + 0xfa0f3d63,
  62595. + 0x8d080df5,
  62596. + 0x3b6e20c8,
  62597. + 0x4c69105e,
  62598. + 0xd56041e4,
  62599. + 0xa2677172,
  62600. + 0x3c03e4d1,
  62601. + 0x4b04d447,
  62602. + 0xd20d85fd,
  62603. + 0xa50ab56b,
  62604. + 0x35b5a8fa,
  62605. + 0x42b2986c,
  62606. + 0xdbbbc9d6,
  62607. + 0xacbcf940,
  62608. + 0x32d86ce3,
  62609. + 0x45df5c75,
  62610. + 0xdcd60dcf,
  62611. + 0xabd13d59,
  62612. + 0x26d930ac,
  62613. + 0x51de003a,
  62614. + 0xc8d75180,
  62615. + 0xbfd06116,
  62616. + 0x21b4f4b5,
  62617. + 0x56b3c423,
  62618. + 0xcfba9599,
  62619. + 0xb8bda50f,
  62620. + 0x2802b89e,
  62621. + 0x5f058808,
  62622. + 0xc60cd9b2,
  62623. + 0xb10be924,
  62624. + 0x2f6f7c87,
  62625. + 0x58684c11,
  62626. + 0xc1611dab,
  62627. + 0xb6662d3d,
  62628. + 0x76dc4190,
  62629. + 0x01db7106,
  62630. + 0x98d220bc,
  62631. + 0xefd5102a,
  62632. + 0x71b18589,
  62633. + 0x06b6b51f,
  62634. + 0x9fbfe4a5,
  62635. + 0xe8b8d433,
  62636. + 0x7807c9a2,
  62637. + 0x0f00f934,
  62638. + 0x9609a88e,
  62639. + 0xe10e9818,
  62640. + 0x7f6a0dbb,
  62641. + 0x086d3d2d,
  62642. + 0x91646c97,
  62643. + 0xe6635c01,
  62644. + 0x6b6b51f4,
  62645. + 0x1c6c6162,
  62646. + 0x856530d8,
  62647. + 0xf262004e,
  62648. + 0x6c0695ed,
  62649. + 0x1b01a57b,
  62650. + 0x8208f4c1,
  62651. + 0xf50fc457,
  62652. + 0x65b0d9c6,
  62653. + 0x12b7e950,
  62654. + 0x8bbeb8ea,
  62655. + 0xfcb9887c,
  62656. + 0x62dd1ddf,
  62657. + 0x15da2d49,
  62658. + 0x8cd37cf3,
  62659. + 0xfbd44c65,
  62660. + 0x4db26158,
  62661. + 0x3ab551ce,
  62662. + 0xa3bc0074,
  62663. + 0xd4bb30e2,
  62664. + 0x4adfa541,
  62665. + 0x3dd895d7,
  62666. + 0xa4d1c46d,
  62667. + 0xd3d6f4fb,
  62668. + 0x4369e96a,
  62669. + 0x346ed9fc,
  62670. + 0xad678846,
  62671. + 0xda60b8d0,
  62672. + 0x44042d73,
  62673. + 0x33031de5,
  62674. + 0xaa0a4c5f,
  62675. + 0xdd0d7cc9,
  62676. + 0x5005713c,
  62677. + 0x270241aa,
  62678. + 0xbe0b1010,
  62679. + 0xc90c2086,
  62680. + 0x5768b525,
  62681. + 0x206f85b3,
  62682. + 0xb966d409,
  62683. + 0xce61e49f,
  62684. + 0x5edef90e,
  62685. + 0x29d9c998,
  62686. + 0xb0d09822,
  62687. + 0xc7d7a8b4,
  62688. + 0x59b33d17,
  62689. + 0x2eb40d81,
  62690. + 0xb7bd5c3b,
  62691. + 0xc0ba6cad,
  62692. + 0xedb88320,
  62693. + 0x9abfb3b6,
  62694. + 0x03b6e20c,
  62695. + 0x74b1d29a,
  62696. + 0xead54739,
  62697. + 0x9dd277af,
  62698. + 0x04db2615,
  62699. + 0x73dc1683,
  62700. + 0xe3630b12,
  62701. + 0x94643b84,
  62702. + 0x0d6d6a3e,
  62703. + 0x7a6a5aa8,
  62704. + 0xe40ecf0b,
  62705. + 0x9309ff9d,
  62706. + 0x0a00ae27,
  62707. + 0x7d079eb1,
  62708. + 0xf00f9344,
  62709. + 0x8708a3d2,
  62710. + 0x1e01f268,
  62711. + 0x6906c2fe,
  62712. + 0xf762575d,
  62713. + 0x806567cb,
  62714. + 0x196c3671,
  62715. + 0x6e6b06e7,
  62716. + 0xfed41b76,
  62717. + 0x89d32be0,
  62718. + 0x10da7a5a,
  62719. + 0x67dd4acc,
  62720. + 0xf9b9df6f,
  62721. + 0x8ebeeff9,
  62722. + 0x17b7be43,
  62723. + 0x60b08ed5,
  62724. + 0xd6d6a3e8,
  62725. + 0xa1d1937e,
  62726. + 0x38d8c2c4,
  62727. + 0x4fdff252,
  62728. + 0xd1bb67f1,
  62729. + 0xa6bc5767,
  62730. + 0x3fb506dd,
  62731. + 0x48b2364b,
  62732. + 0xd80d2bda,
  62733. + 0xaf0a1b4c,
  62734. + 0x36034af6,
  62735. + 0x41047a60,
  62736. + 0xdf60efc3,
  62737. + 0xa867df55,
  62738. + 0x316e8eef,
  62739. + 0x4669be79,
  62740. + 0xcb61b38c,
  62741. + 0xbc66831a,
  62742. + 0x256fd2a0,
  62743. + 0x5268e236,
  62744. + 0xcc0c7795,
  62745. + 0xbb0b4703,
  62746. + 0x220216b9,
  62747. + 0x5505262f,
  62748. + 0xc5ba3bbe,
  62749. + 0xb2bd0b28,
  62750. + 0x2bb45a92,
  62751. + 0x5cb36a04,
  62752. + 0xc2d7ffa7,
  62753. + 0xb5d0cf31,
  62754. + 0x2cd99e8b,
  62755. + 0x5bdeae1d,
  62756. + 0x9b64c2b0,
  62757. + 0xec63f226,
  62758. + 0x756aa39c,
  62759. + 0x026d930a,
  62760. + 0x9c0906a9,
  62761. + 0xeb0e363f,
  62762. + 0x72076785,
  62763. + 0x05005713,
  62764. + 0x95bf4a82,
  62765. + 0xe2b87a14,
  62766. + 0x7bb12bae,
  62767. + 0x0cb61b38,
  62768. + 0x92d28e9b,
  62769. + 0xe5d5be0d,
  62770. + 0x7cdcefb7,
  62771. + 0x0bdbdf21,
  62772. + 0x86d3d2d4,
  62773. + 0xf1d4e242,
  62774. + 0x68ddb3f8,
  62775. + 0x1fda836e,
  62776. + 0x81be16cd,
  62777. + 0xf6b9265b,
  62778. + 0x6fb077e1,
  62779. + 0x18b74777,
  62780. + 0x88085ae6,
  62781. + 0xff0f6a70,
  62782. + 0x66063bca,
  62783. + 0x11010b5c,
  62784. + 0x8f659eff,
  62785. + 0xf862ae69,
  62786. + 0x616bffd3,
  62787. + 0x166ccf45,
  62788. + 0xa00ae278,
  62789. + 0xd70dd2ee,
  62790. + 0x4e048354,
  62791. + 0x3903b3c2,
  62792. + 0xa7672661,
  62793. + 0xd06016f7,
  62794. + 0x4969474d,
  62795. + 0x3e6e77db,
  62796. + 0xaed16a4a,
  62797. + 0xd9d65adc,
  62798. + 0x40df0b66,
  62799. + 0x37d83bf0,
  62800. + 0xa9bcae53,
  62801. + 0xdebb9ec5,
  62802. + 0x47b2cf7f,
  62803. + 0x30b5ffe9,
  62804. + 0xbdbdf21c,
  62805. + 0xcabac28a,
  62806. + 0x53b39330,
  62807. + 0x24b4a3a6,
  62808. + 0xbad03605,
  62809. + 0xcdd70693,
  62810. + 0x54de5729,
  62811. + 0x23d967bf,
  62812. + 0xb3667a2e,
  62813. + 0xc4614ab8,
  62814. + 0x5d681b02,
  62815. + 0x2a6f2b94,
  62816. + 0xb40bbe37,
  62817. + 0xc30c8ea1,
  62818. + 0x5a05df1b,
  62819. + 0x2d02ef8d
  62820. +};
  62821. +
  62822. +
  62823. +#define GET_MAC_ADDR_CRC(addr, crc) \
  62824. +{ \
  62825. + uint32_t i; \
  62826. + uint8_t data; \
  62827. + \
  62828. + /* CRC calculation */ \
  62829. + crc = 0xffffffff; \
  62830. + for (i=0; i < 6; i++) \
  62831. + { \
  62832. + data = (uint8_t)(addr >> ((5-i)*8)); \
  62833. + crc = crc^data; \
  62834. + crc = crc_table[crc&0xff] ^ (crc>>8); \
  62835. + } \
  62836. +} \
  62837. +
  62838. +/* Define a macro for getting the mirrored value of */
  62839. +/* a byte size number. (0x11010011 --> 0x11001011) */
  62840. +/* Sometimes the mirrored value of the CRC is required */
  62841. +static __inline__ uint8_t GetMirror(uint8_t n)
  62842. +{
  62843. + uint8_t mirror[16] =
  62844. + {
  62845. + 0x00,
  62846. + 0x08,
  62847. + 0x04,
  62848. + 0x0c,
  62849. + 0x02,
  62850. + 0x0a,
  62851. + 0x06,
  62852. + 0x0e,
  62853. + 0x01,
  62854. + 0x09,
  62855. + 0x05,
  62856. + 0x0d,
  62857. + 0x03,
  62858. + 0x0b,
  62859. + 0x07,
  62860. + 0x0f
  62861. + };
  62862. + return ((uint8_t)(((mirror[n & 0x0f] << 4) | (mirror[n >> 4]))));
  62863. +}
  62864. +
  62865. +static __inline__ uint32_t GetMirror32(uint32_t n)
  62866. +{
  62867. + return (((uint32_t)GetMirror((uint8_t)(n))<<24) |
  62868. + ((uint32_t)GetMirror((uint8_t)(n>>8))<<16) |
  62869. + ((uint32_t)GetMirror((uint8_t)(n>>16))<<8) |
  62870. + ((uint32_t)GetMirror((uint8_t)(n>>24))));
  62871. +}
  62872. +
  62873. +#define MIRROR GetMirror
  62874. +#define MIRROR_32 GetMirror32
  62875. +
  62876. +
  62877. +#endif /* __crc_mac_addr_ext_h */
  62878. --- /dev/null
  62879. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/dpaa_ext.h
  62880. @@ -0,0 +1,207 @@
  62881. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  62882. + * All rights reserved.
  62883. + *
  62884. + * Redistribution and use in source and binary forms, with or without
  62885. + * modification, are permitted provided that the following conditions are met:
  62886. + * * Redistributions of source code must retain the above copyright
  62887. + * notice, this list of conditions and the following disclaimer.
  62888. + * * Redistributions in binary form must reproduce the above copyright
  62889. + * notice, this list of conditions and the following disclaimer in the
  62890. + * documentation and/or other materials provided with the distribution.
  62891. + * * Neither the name of Freescale Semiconductor nor the
  62892. + * names of its contributors may be used to endorse or promote products
  62893. + * derived from this software without specific prior written permission.
  62894. + *
  62895. + *
  62896. + * ALTERNATIVELY, this software may be distributed under the terms of the
  62897. + * GNU General Public License ("GPL") as published by the Free Software
  62898. + * Foundation, either version 2 of that License or (at your option) any
  62899. + * later version.
  62900. + *
  62901. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  62902. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  62903. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  62904. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  62905. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  62906. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  62907. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  62908. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62909. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  62910. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62911. + */
  62912. +
  62913. +
  62914. +/**************************************************************************//**
  62915. + @File dpaa_ext.h
  62916. +
  62917. + @Description DPAA Application Programming Interface.
  62918. +*//***************************************************************************/
  62919. +#ifndef __DPAA_EXT_H
  62920. +#define __DPAA_EXT_H
  62921. +
  62922. +#include "std_ext.h"
  62923. +#include "error_ext.h"
  62924. +
  62925. +
  62926. +/**************************************************************************//**
  62927. + @Group DPAA_grp Data Path Acceleration Architecture API
  62928. +
  62929. + @Description DPAA API functions, definitions and enums.
  62930. +
  62931. + @{
  62932. +*//***************************************************************************/
  62933. +
  62934. +#if defined(__MWERKS__) && !defined(__GNUC__)
  62935. +#pragma pack(push,1)
  62936. +#endif /* defined(__MWERKS__) && ... */
  62937. +
  62938. +/**************************************************************************//**
  62939. + @Description Frame descriptor
  62940. +*//***************************************************************************/
  62941. +typedef _Packed struct t_DpaaFD {
  62942. + volatile uint32_t id; /**< FD id */
  62943. + volatile uint32_t addrl; /**< Data Address */
  62944. + volatile uint32_t length; /**< Frame length */
  62945. + volatile uint32_t status; /**< FD status */
  62946. +} _PackedType t_DpaaFD;
  62947. +
  62948. +/**************************************************************************//**
  62949. + @Description enum for defining frame format
  62950. +*//***************************************************************************/
  62951. +typedef enum e_DpaaFDFormatType {
  62952. + e_DPAA_FD_FORMAT_TYPE_SHORT_SBSF = 0x0, /**< Simple frame Single buffer; Offset and
  62953. + small length (9b OFFSET, 20b LENGTH) */
  62954. + e_DPAA_FD_FORMAT_TYPE_LONG_SBSF = 0x2, /**< Simple frame, single buffer; big length
  62955. + (29b LENGTH ,No OFFSET) */
  62956. + e_DPAA_FD_FORMAT_TYPE_SHORT_MBSF = 0x4, /**< Simple frame, Scatter Gather table; Offset
  62957. + and small length (9b OFFSET, 20b LENGTH) */
  62958. + e_DPAA_FD_FORMAT_TYPE_LONG_MBSF = 0x6, /**< Simple frame, Scatter Gather table;
  62959. + big length (29b LENGTH ,No OFFSET) */
  62960. + e_DPAA_FD_FORMAT_TYPE_COMPOUND = 0x1, /**< Compound Frame (29b CONGESTION-WEIGHT
  62961. + No LENGTH or OFFSET) */
  62962. + e_DPAA_FD_FORMAT_TYPE_DUMMY
  62963. +} e_DpaaFDFormatType;
  62964. +
  62965. +/**************************************************************************//**
  62966. + @Collection Frame descriptor macros
  62967. +*//***************************************************************************/
  62968. +#define DPAA_FD_DD_MASK 0xc0000000 /**< FD DD field mask */
  62969. +#define DPAA_FD_PID_MASK 0x3f000000 /**< FD PID field mask */
  62970. +#define DPAA_FD_ELIODN_MASK 0x0000f000 /**< FD ELIODN field mask */
  62971. +#define DPAA_FD_BPID_MASK 0x00ff0000 /**< FD BPID field mask */
  62972. +#define DPAA_FD_ADDRH_MASK 0x000000ff /**< FD ADDRH field mask */
  62973. +#define DPAA_FD_ADDRL_MASK 0xffffffff /**< FD ADDRL field mask */
  62974. +#define DPAA_FD_FORMAT_MASK 0xe0000000 /**< FD FORMAT field mask */
  62975. +#define DPAA_FD_OFFSET_MASK 0x1ff00000 /**< FD OFFSET field mask */
  62976. +#define DPAA_FD_LENGTH_MASK 0x000fffff /**< FD LENGTH field mask */
  62977. +
  62978. +#define DPAA_FD_GET_DD(fd) ((((t_DpaaFD *)fd)->id & DPAA_FD_DD_MASK) >> (31-1)) /**< Macro to get FD DD field */
  62979. +#define DPAA_FD_GET_PID(fd) (((((t_DpaaFD *)fd)->id & DPAA_FD_PID_MASK) >> (31-7)) | \
  62980. + ((((t_DpaaFD *)fd)->id & DPAA_FD_ELIODN_MASK) >> (31-19-6))) /**< Macro to get FD PID field */
  62981. +#define DPAA_FD_GET_BPID(fd) ((((t_DpaaFD *)fd)->id & DPAA_FD_BPID_MASK) >> (31-15)) /**< Macro to get FD BPID field */
  62982. +#define DPAA_FD_GET_ADDRH(fd) (((t_DpaaFD *)fd)->id & DPAA_FD_ADDRH_MASK) /**< Macro to get FD ADDRH field */
  62983. +#define DPAA_FD_GET_ADDRL(fd) ((t_DpaaFD *)fd)->addrl /**< Macro to get FD ADDRL field */
  62984. +#define DPAA_FD_GET_PHYS_ADDR(fd) ((physAddress_t)(((uint64_t)DPAA_FD_GET_ADDRH(fd) << 32) | (uint64_t)DPAA_FD_GET_ADDRL(fd))) /**< Macro to get FD ADDR field */
  62985. +#define DPAA_FD_GET_FORMAT(fd) ((((t_DpaaFD *)fd)->length & DPAA_FD_FORMAT_MASK) >> (31-2)) /**< Macro to get FD FORMAT field */
  62986. +#define DPAA_FD_GET_OFFSET(fd) ((((t_DpaaFD *)fd)->length & DPAA_FD_OFFSET_MASK) >> (31-11)) /**< Macro to get FD OFFSET field */
  62987. +#define DPAA_FD_GET_LENGTH(fd) (((t_DpaaFD *)fd)->length & DPAA_FD_LENGTH_MASK) /**< Macro to get FD LENGTH field */
  62988. +#define DPAA_FD_GET_STATUS(fd) ((t_DpaaFD *)fd)->status /**< Macro to get FD STATUS field */
  62989. +#define DPAA_FD_GET_ADDR(fd) XX_PhysToVirt(DPAA_FD_GET_PHYS_ADDR(fd)) /**< Macro to get FD ADDR (virtual) */
  62990. +
  62991. +#define DPAA_FD_SET_DD(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_DD_MASK) | (((val) << (31-1)) & DPAA_FD_DD_MASK ))) /**< Macro to set FD DD field */
  62992. + /**< Macro to set FD PID field or LIODN offset*/
  62993. +#define DPAA_FD_SET_PID(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~(DPAA_FD_PID_MASK|DPAA_FD_ELIODN_MASK)) | ((((val) << (31-7)) & DPAA_FD_PID_MASK) | ((((val)>>6) << (31-19)) & DPAA_FD_ELIODN_MASK))))
  62994. +#define DPAA_FD_SET_BPID(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_BPID_MASK) | (((val) << (31-15)) & DPAA_FD_BPID_MASK))) /**< Macro to set FD BPID field */
  62995. +#define DPAA_FD_SET_ADDRH(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_ADDRH_MASK) | ((val) & DPAA_FD_ADDRH_MASK))) /**< Macro to set FD ADDRH field */
  62996. +#define DPAA_FD_SET_ADDRL(fd,val) ((t_DpaaFD *)fd)->addrl = (val) /**< Macro to set FD ADDRL field */
  62997. +#define DPAA_FD_SET_ADDR(fd,val) \
  62998. +do { \
  62999. + uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val)); \
  63000. + DPAA_FD_SET_ADDRH(fd, ((uint32_t)(physAddr >> 32))); \
  63001. + DPAA_FD_SET_ADDRL(fd, (uint32_t)physAddr); \
  63002. +} while (0) /**< Macro to set FD ADDR field */
  63003. +#define DPAA_FD_SET_FORMAT(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_FORMAT_MASK) | (((val) << (31-2))& DPAA_FD_FORMAT_MASK))) /**< Macro to set FD FORMAT field */
  63004. +#define DPAA_FD_SET_OFFSET(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPAA_FD_OFFSET_MASK) | (((val) << (31-11))& DPAA_FD_OFFSET_MASK) )) /**< Macro to set FD OFFSET field */
  63005. +#define DPAA_FD_SET_LENGTH(fd,val) (((t_DpaaFD *)fd)->length = (((t_DpaaFD *)fd)->length & ~DPAA_FD_LENGTH_MASK) | ((val) & DPAA_FD_LENGTH_MASK)) /**< Macro to set FD LENGTH field */
  63006. +#define DPAA_FD_SET_STATUS(fd,val) ((t_DpaaFD *)fd)->status = (val) /**< Macro to set FD STATUS field */
  63007. +/* @} */
  63008. +
  63009. +/**************************************************************************//**
  63010. + @Description Frame Scatter/Gather Table Entry
  63011. +*//***************************************************************************/
  63012. +typedef _Packed struct t_DpaaSGTE {
  63013. + volatile uint32_t addrh; /**< Buffer Address high */
  63014. + volatile uint32_t addrl; /**< Buffer Address low */
  63015. + volatile uint32_t length; /**< Buffer length */
  63016. + volatile uint32_t offset; /**< SGTE offset */
  63017. +} _PackedType t_DpaaSGTE;
  63018. +
  63019. +#define DPAA_NUM_OF_SG_TABLE_ENTRY 16
  63020. +
  63021. +/**************************************************************************//**
  63022. + @Description Frame Scatter/Gather Table
  63023. +*//***************************************************************************/
  63024. +typedef _Packed struct t_DpaaSGT {
  63025. + t_DpaaSGTE tableEntry[DPAA_NUM_OF_SG_TABLE_ENTRY];
  63026. + /**< Structure that holds information about
  63027. + a single S/G entry. */
  63028. +} _PackedType t_DpaaSGT;
  63029. +
  63030. +/**************************************************************************//**
  63031. + @Description Compound Frame Table
  63032. +*//***************************************************************************/
  63033. +typedef _Packed struct t_DpaaCompTbl {
  63034. + t_DpaaSGTE outputBuffInfo; /**< Structure that holds information about
  63035. + the compound-frame output buffer;
  63036. + NOTE: this may point to a S/G table */
  63037. + t_DpaaSGTE inputBuffInfo; /**< Structure that holds information about
  63038. + the compound-frame input buffer;
  63039. + NOTE: this may point to a S/G table */
  63040. +} _PackedType t_DpaaCompTbl;
  63041. +
  63042. +/**************************************************************************//**
  63043. + @Collection Frame Scatter/Gather Table Entry macros
  63044. +*//***************************************************************************/
  63045. +#define DPAA_SGTE_ADDRH_MASK 0x000000ff /**< SGTE ADDRH field mask */
  63046. +#define DPAA_SGTE_ADDRL_MASK 0xffffffff /**< SGTE ADDRL field mask */
  63047. +#define DPAA_SGTE_E_MASK 0x80000000 /**< SGTE Extension field mask */
  63048. +#define DPAA_SGTE_F_MASK 0x40000000 /**< SGTE Final field mask */
  63049. +#define DPAA_SGTE_LENGTH_MASK 0x3fffffff /**< SGTE LENGTH field mask */
  63050. +#define DPAA_SGTE_BPID_MASK 0x00ff0000 /**< SGTE BPID field mask */
  63051. +#define DPAA_SGTE_OFFSET_MASK 0x00001fff /**< SGTE OFFSET field mask */
  63052. +
  63053. +#define DPAA_SGTE_GET_ADDRH(sgte) (((t_DpaaSGTE *)sgte)->addrh & DPAA_SGTE_ADDRH_MASK) /**< Macro to get SGTE ADDRH field */
  63054. +#define DPAA_SGTE_GET_ADDRL(sgte) ((t_DpaaSGTE *)sgte)->addrl /**< Macro to get SGTE ADDRL field */
  63055. +#define DPAA_SGTE_GET_PHYS_ADDR(sgte) ((physAddress_t)(((uint64_t)DPAA_SGTE_GET_ADDRH(sgte) << 32) | (uint64_t)DPAA_SGTE_GET_ADDRL(sgte))) /**< Macro to get FD ADDR field */
  63056. +#define DPAA_SGTE_GET_EXTENSION(sgte) ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_E_MASK) >> (31-0)) /**< Macro to get SGTE EXTENSION field */
  63057. +#define DPAA_SGTE_GET_FINAL(sgte) ((((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_F_MASK) >> (31-1)) /**< Macro to get SGTE FINAL field */
  63058. +#define DPAA_SGTE_GET_LENGTH(sgte) (((t_DpaaSGTE *)sgte)->length & DPAA_SGTE_LENGTH_MASK) /**< Macro to get SGTE LENGTH field */
  63059. +#define DPAA_SGTE_GET_BPID(sgte) ((((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_BPID_MASK) >> (31-15)) /**< Macro to get SGTE BPID field */
  63060. +#define DPAA_SGTE_GET_OFFSET(sgte) (((t_DpaaSGTE *)sgte)->offset & DPAA_SGTE_OFFSET_MASK) /**< Macro to get SGTE OFFSET field */
  63061. +#define DPAA_SGTE_GET_ADDR(sgte) XX_PhysToVirt(DPAA_SGTE_GET_PHYS_ADDR(sgte))
  63062. +
  63063. +#define DPAA_SGTE_SET_ADDRH(sgte,val) (((t_DpaaSGTE *)sgte)->addrh = ((((t_DpaaSGTE *)sgte)->addrh & ~DPAA_SGTE_ADDRH_MASK) | ((val) & DPAA_SGTE_ADDRH_MASK))) /**< Macro to set SGTE ADDRH field */
  63064. +#define DPAA_SGTE_SET_ADDRL(sgte,val) ((t_DpaaSGTE *)sgte)->addrl = (val) /**< Macro to set SGTE ADDRL field */
  63065. +#define DPAA_SGTE_SET_ADDR(sgte,val) \
  63066. +do { \
  63067. + uint64_t physAddr = (uint64_t)(XX_VirtToPhys(val)); \
  63068. + DPAA_SGTE_SET_ADDRH(sgte, ((uint32_t)(physAddr >> 32))); \
  63069. + DPAA_SGTE_SET_ADDRL(sgte, (uint32_t)physAddr); \
  63070. +} while (0) /**< Macro to set SGTE ADDR field */
  63071. +#define DPAA_SGTE_SET_EXTENSION(sgte,val) (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_E_MASK) | (((val) << (31-0))& DPAA_SGTE_E_MASK))) /**< Macro to set SGTE EXTENSION field */
  63072. +#define DPAA_SGTE_SET_FINAL(sgte,val) (((t_DpaaSGTE *)sgte)->length = ((((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_F_MASK) | (((val) << (31-1))& DPAA_SGTE_F_MASK))) /**< Macro to set SGTE FINAL field */
  63073. +#define DPAA_SGTE_SET_LENGTH(sgte,val) (((t_DpaaSGTE *)sgte)->length = (((t_DpaaSGTE *)sgte)->length & ~DPAA_SGTE_LENGTH_MASK) | ((val) & DPAA_SGTE_LENGTH_MASK)) /**< Macro to set SGTE LENGTH field */
  63074. +#define DPAA_SGTE_SET_BPID(sgte,val) (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_BPID_MASK) | (((val) << (31-15))& DPAA_SGTE_BPID_MASK))) /**< Macro to set SGTE BPID field */
  63075. +#define DPAA_SGTE_SET_OFFSET(sgte,val) (((t_DpaaSGTE *)sgte)->offset = ((((t_DpaaSGTE *)sgte)->offset & ~DPAA_SGTE_OFFSET_MASK) | (((val) << (31-31))& DPAA_SGTE_OFFSET_MASK) )) /**< Macro to set SGTE OFFSET field */
  63076. +/* @} */
  63077. +
  63078. +#if defined(__MWERKS__) && !defined(__GNUC__)
  63079. +#pragma pack(pop)
  63080. +#endif /* defined(__MWERKS__) && ... */
  63081. +
  63082. +#define DPAA_LIODN_DONT_OVERRIDE (-1)
  63083. +
  63084. +/** @} */ /* end of DPAA_grp group */
  63085. +
  63086. +
  63087. +#endif /* __DPAA_EXT_H */
  63088. --- /dev/null
  63089. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_ext.h
  63090. @@ -0,0 +1,1705 @@
  63091. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  63092. + * All rights reserved.
  63093. + *
  63094. + * Redistribution and use in source and binary forms, with or without
  63095. + * modification, are permitted provided that the following conditions are met:
  63096. + * * Redistributions of source code must retain the above copyright
  63097. + * notice, this list of conditions and the following disclaimer.
  63098. + * * Redistributions in binary form must reproduce the above copyright
  63099. + * notice, this list of conditions and the following disclaimer in the
  63100. + * documentation and/or other materials provided with the distribution.
  63101. + * * Neither the name of Freescale Semiconductor nor the
  63102. + * names of its contributors may be used to endorse or promote products
  63103. + * derived from this software without specific prior written permission.
  63104. + *
  63105. + *
  63106. + * ALTERNATIVELY, this software may be distributed under the terms of the
  63107. + * GNU General Public License ("GPL") as published by the Free Software
  63108. + * Foundation, either version 2 of that License or (at your option) any
  63109. + * later version.
  63110. + *
  63111. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  63112. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  63113. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  63114. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  63115. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  63116. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  63117. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  63118. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63119. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  63120. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  63121. + */
  63122. +
  63123. +
  63124. +/**************************************************************************//**
  63125. + @File fm_ext.h
  63126. +
  63127. + @Description FM Application Programming Interface.
  63128. +*//***************************************************************************/
  63129. +#ifndef __FM_EXT
  63130. +#define __FM_EXT
  63131. +
  63132. +#include "error_ext.h"
  63133. +#include "std_ext.h"
  63134. +#include "dpaa_ext.h"
  63135. +#include "fsl_fman_sp.h"
  63136. +
  63137. +/**************************************************************************//**
  63138. + @Group FM_grp Frame Manager API
  63139. +
  63140. + @Description FM API functions, definitions and enums.
  63141. +
  63142. + @{
  63143. +*//***************************************************************************/
  63144. +
  63145. +/**************************************************************************//**
  63146. + @Group FM_lib_grp FM library
  63147. +
  63148. + @Description FM API functions, definitions and enums.
  63149. +
  63150. + The FM module is the main driver module and is a mandatory module
  63151. + for FM driver users. This module must be initialized first prior
  63152. + to any other drivers modules.
  63153. + The FM is a "singleton" module. It is responsible of the common
  63154. + HW modules: FPM, DMA, common QMI and common BMI initializations and
  63155. + run-time control routines. This module must be initialized always
  63156. + when working with any of the FM modules.
  63157. + NOTE - We assume that the FM library will be initialized only by core No. 0!
  63158. +
  63159. + @{
  63160. +*//***************************************************************************/
  63161. +
  63162. +/**************************************************************************//**
  63163. + @Description Enum for defining port types
  63164. +*//***************************************************************************/
  63165. +typedef enum e_FmPortType {
  63166. + e_FM_PORT_TYPE_OH_OFFLINE_PARSING = 0, /**< Offline parsing port */
  63167. + e_FM_PORT_TYPE_RX, /**< 1G Rx port */
  63168. + e_FM_PORT_TYPE_RX_10G, /**< 10G Rx port */
  63169. + e_FM_PORT_TYPE_TX, /**< 1G Tx port */
  63170. + e_FM_PORT_TYPE_TX_10G, /**< 10G Tx port */
  63171. + e_FM_PORT_TYPE_DUMMY
  63172. +} e_FmPortType;
  63173. +
  63174. +/**************************************************************************//**
  63175. + @Collection General FM defines
  63176. +*//***************************************************************************/
  63177. +#define FM_MAX_NUM_OF_PARTITIONS 64 /**< Maximum number of partitions */
  63178. +#define FM_PHYS_ADDRESS_SIZE 6 /**< FM Physical address size */
  63179. +/* @} */
  63180. +
  63181. +
  63182. +#if defined(__MWERKS__) && !defined(__GNUC__)
  63183. +#pragma pack(push,1)
  63184. +#endif /* defined(__MWERKS__) && ... */
  63185. +
  63186. +/**************************************************************************//**
  63187. + @Description FM physical Address
  63188. +*//***************************************************************************/
  63189. +typedef _Packed struct t_FmPhysAddr {
  63190. + volatile uint8_t high; /**< High part of the physical address */
  63191. + volatile uint32_t low; /**< Low part of the physical address */
  63192. +} _PackedType t_FmPhysAddr;
  63193. +
  63194. +/**************************************************************************//**
  63195. + @Description Parse results memory layout
  63196. +*//***************************************************************************/
  63197. +typedef _Packed struct t_FmPrsResult {
  63198. + volatile uint8_t lpid; /**< Logical port id */
  63199. + volatile uint8_t shimr; /**< Shim header result */
  63200. + volatile uint16_t l2r; /**< Layer 2 result */
  63201. + volatile uint16_t l3r; /**< Layer 3 result */
  63202. + volatile uint8_t l4r; /**< Layer 4 result */
  63203. + volatile uint8_t cplan; /**< Classification plan id */
  63204. + volatile uint16_t nxthdr; /**< Next Header */
  63205. + volatile uint16_t cksum; /**< Running-sum */
  63206. + volatile uint16_t flags_frag_off; /**< Flags & fragment-offset field of the last IP-header */
  63207. + volatile uint8_t route_type; /**< Routing type field of a IPv6 routing extension header */
  63208. + volatile uint8_t rhp_ip_valid; /**< Routing Extension Header Present; last bit is IP valid */
  63209. + volatile uint8_t shim_off[2]; /**< Shim offset */
  63210. + volatile uint8_t ip_pid_off; /**< IP PID (last IP-proto) offset */
  63211. + volatile uint8_t eth_off; /**< ETH offset */
  63212. + volatile uint8_t llc_snap_off; /**< LLC_SNAP offset */
  63213. + volatile uint8_t vlan_off[2]; /**< VLAN offset */
  63214. + volatile uint8_t etype_off; /**< ETYPE offset */
  63215. + volatile uint8_t pppoe_off; /**< PPP offset */
  63216. + volatile uint8_t mpls_off[2]; /**< MPLS offset */
  63217. + volatile uint8_t ip_off[2]; /**< IP offset */
  63218. + volatile uint8_t gre_off; /**< GRE offset */
  63219. + volatile uint8_t l4_off; /**< Layer 4 offset */
  63220. + volatile uint8_t nxthdr_off; /**< Parser end point */
  63221. +} _PackedType t_FmPrsResult;
  63222. +
  63223. +/**************************************************************************//**
  63224. + @Collection FM Parser results
  63225. +*//***************************************************************************/
  63226. +#define FM_PR_L2_VLAN_STACK 0x00000100 /**< Parse Result: VLAN stack */
  63227. +#define FM_PR_L2_ETHERNET 0x00008000 /**< Parse Result: Ethernet*/
  63228. +#define FM_PR_L2_VLAN 0x00004000 /**< Parse Result: VLAN */
  63229. +#define FM_PR_L2_LLC_SNAP 0x00002000 /**< Parse Result: LLC_SNAP */
  63230. +#define FM_PR_L2_MPLS 0x00001000 /**< Parse Result: MPLS */
  63231. +#define FM_PR_L2_PPPoE 0x00000800 /**< Parse Result: PPPoE */
  63232. +/* @} */
  63233. +
  63234. +/**************************************************************************//**
  63235. + @Collection FM Frame descriptor macros
  63236. +*//***************************************************************************/
  63237. +#define FM_FD_CMD_FCO 0x80000000 /**< Frame queue Context Override */
  63238. +#define FM_FD_CMD_RPD 0x40000000 /**< Read Prepended Data */
  63239. +#define FM_FD_CMD_UPD 0x20000000 /**< Update Prepended Data */
  63240. +#define FM_FD_CMD_DTC 0x10000000 /**< Do L4 Checksum */
  63241. +#define FM_FD_CMD_DCL4C 0x10000000 /**< Didn't calculate L4 Checksum */
  63242. +#define FM_FD_CMD_CFQ 0x00ffffff /**< Confirmation Frame Queue */
  63243. +
  63244. +#define FM_FD_ERR_UNSUPPORTED_FORMAT 0x04000000 /**< Not for Rx-Port! Unsupported Format */
  63245. +#define FM_FD_ERR_LENGTH 0x02000000 /**< Not for Rx-Port! Length Error */
  63246. +#define FM_FD_ERR_DMA 0x01000000 /**< DMA Data error */
  63247. +
  63248. +#define FM_FD_IPR 0x00000001 /**< IPR frame (not error) */
  63249. +
  63250. +#define FM_FD_ERR_IPR_NCSP (0x00100000 | FM_FD_IPR) /**< IPR non-consistent-sp */
  63251. +#define FM_FD_ERR_IPR (0x00200000 | FM_FD_IPR) /**< IPR error */
  63252. +#define FM_FD_ERR_IPR_TO (0x00300000 | FM_FD_IPR) /**< IPR timeout */
  63253. +
  63254. +#ifdef FM_CAPWAP_SUPPORT
  63255. +#define FM_FD_ERR_CRE 0x00200000
  63256. +#define FM_FD_ERR_CHE 0x00100000
  63257. +#endif /* FM_CAPWAP_SUPPORT */
  63258. +
  63259. +#define FM_FD_ERR_PHYSICAL 0x00080000 /**< Rx FIFO overflow, FCS error, code error, running disparity
  63260. + error (SGMII and TBI modes), FIFO parity error. PHY
  63261. + Sequence error, PHY error control character detected. */
  63262. +#define FM_FD_ERR_SIZE 0x00040000 /**< Frame too long OR Frame size exceeds max_length_frame */
  63263. +#define FM_FD_ERR_CLS_DISCARD 0x00020000 /**< classification discard */
  63264. +#define FM_FD_ERR_EXTRACTION 0x00008000 /**< Extract Out of Frame */
  63265. +#define FM_FD_ERR_NO_SCHEME 0x00004000 /**< No Scheme Selected */
  63266. +#define FM_FD_ERR_KEYSIZE_OVERFLOW 0x00002000 /**< Keysize Overflow */
  63267. +#define FM_FD_ERR_COLOR_RED 0x00000800 /**< Frame color is red */
  63268. +#define FM_FD_ERR_COLOR_YELLOW 0x00000400 /**< Frame color is yellow */
  63269. +#define FM_FD_ERR_ILL_PLCR 0x00000200 /**< Illegal Policer Profile selected */
  63270. +#define FM_FD_ERR_PLCR_FRAME_LEN 0x00000100 /**< Policer frame length error */
  63271. +#define FM_FD_ERR_PRS_TIMEOUT 0x00000080 /**< Parser Time out Exceed */
  63272. +#define FM_FD_ERR_PRS_ILL_INSTRUCT 0x00000040 /**< Invalid Soft Parser instruction */
  63273. +#define FM_FD_ERR_PRS_HDR_ERR 0x00000020 /**< Header error was identified during parsing */
  63274. +#define FM_FD_ERR_BLOCK_LIMIT_EXCEEDED 0x00000008 /**< Frame parsed beyind 256 first bytes */
  63275. +
  63276. +#define FM_FD_TX_STATUS_ERR_MASK (FM_FD_ERR_UNSUPPORTED_FORMAT | \
  63277. + FM_FD_ERR_LENGTH | \
  63278. + FM_FD_ERR_DMA) /**< TX Error FD bits */
  63279. +
  63280. +#define FM_FD_RX_STATUS_ERR_MASK (FM_FD_ERR_UNSUPPORTED_FORMAT | \
  63281. + FM_FD_ERR_LENGTH | \
  63282. + FM_FD_ERR_DMA | \
  63283. + FM_FD_ERR_IPR | \
  63284. + FM_FD_ERR_IPR_TO | \
  63285. + FM_FD_ERR_IPR_NCSP | \
  63286. + FM_FD_ERR_PHYSICAL | \
  63287. + FM_FD_ERR_SIZE | \
  63288. + FM_FD_ERR_CLS_DISCARD | \
  63289. + FM_FD_ERR_COLOR_RED | \
  63290. + FM_FD_ERR_COLOR_YELLOW | \
  63291. + FM_FD_ERR_ILL_PLCR | \
  63292. + FM_FD_ERR_PLCR_FRAME_LEN | \
  63293. + FM_FD_ERR_EXTRACTION | \
  63294. + FM_FD_ERR_NO_SCHEME | \
  63295. + FM_FD_ERR_KEYSIZE_OVERFLOW | \
  63296. + FM_FD_ERR_PRS_TIMEOUT | \
  63297. + FM_FD_ERR_PRS_ILL_INSTRUCT | \
  63298. + FM_FD_ERR_PRS_HDR_ERR | \
  63299. + FM_FD_ERR_BLOCK_LIMIT_EXCEEDED) /**< RX Error FD bits */
  63300. +
  63301. +#define FM_FD_RX_STATUS_ERR_NON_FM 0x00400000 /**< non Frame-Manager error */
  63302. +/* @} */
  63303. +
  63304. +/**************************************************************************//**
  63305. + @Description Context A
  63306. +*//***************************************************************************/
  63307. +typedef _Packed struct t_FmContextA {
  63308. + volatile uint32_t command; /**< ContextA Command */
  63309. + volatile uint8_t res0[4]; /**< ContextA Reserved bits */
  63310. +} _PackedType t_FmContextA;
  63311. +
  63312. +/**************************************************************************//**
  63313. + @Description Context B
  63314. +*//***************************************************************************/
  63315. +typedef uint32_t t_FmContextB;
  63316. +
  63317. +/**************************************************************************//**
  63318. + @Collection Special Operation options
  63319. +*//***************************************************************************/
  63320. +typedef uint32_t fmSpecialOperations_t; /**< typedef for defining Special Operation options */
  63321. +
  63322. +#define FM_SP_OP_IPSEC 0x80000000 /**< activate features that related to IPSec (e.g fix Eth-type) */
  63323. +#define FM_SP_OP_IPSEC_UPDATE_UDP_LEN 0x40000000 /**< update the UDP-Len after Encryption */
  63324. +#define FM_SP_OP_IPSEC_MANIP 0x20000000 /**< handle the IPSec-manip options */
  63325. +#define FM_SP_OP_RPD 0x10000000 /**< Set the RPD bit */
  63326. +#define FM_SP_OP_DCL4C 0x08000000 /**< Set the DCL4C bit */
  63327. +#define FM_SP_OP_CHECK_SEC_ERRORS 0x04000000 /**< Check SEC errors */
  63328. +#define FM_SP_OP_CLEAR_RPD 0x02000000 /**< Clear the RPD bit */
  63329. +#define FM_SP_OP_CAPWAP_DTLS_ENC 0x01000000 /**< activate features that related to CAPWAP-DTLS post Encryption */
  63330. +#define FM_SP_OP_CAPWAP_DTLS_DEC 0x00800000 /**< activate features that related to CAPWAP-DTLS post Decryption */
  63331. +#define FM_SP_OP_IPSEC_NO_ETH_HDR 0x00400000 /**< activate features that related to IPSec without Eth hdr */
  63332. +/* @} */
  63333. +
  63334. +/**************************************************************************//**
  63335. + @Collection Context A macros
  63336. +*//***************************************************************************/
  63337. +#define FM_CONTEXTA_OVERRIDE_MASK 0x80000000
  63338. +#define FM_CONTEXTA_ICMD_MASK 0x40000000
  63339. +#define FM_CONTEXTA_A1_VALID_MASK 0x20000000
  63340. +#define FM_CONTEXTA_MACCMD_MASK 0x00ff0000
  63341. +#define FM_CONTEXTA_MACCMD_VALID_MASK 0x00800000
  63342. +#define FM_CONTEXTA_MACCMD_SECURED_MASK 0x00100000
  63343. +#define FM_CONTEXTA_MACCMD_SC_MASK 0x000f0000
  63344. +#define FM_CONTEXTA_A1_MASK 0x0000ffff
  63345. +
  63346. +#define FM_CONTEXTA_GET_OVERRIDE(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_OVERRIDE_MASK) >> (31-0))
  63347. +#define FM_CONTEXTA_GET_ICMD(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_ICMD_MASK) >> (31-1))
  63348. +#define FM_CONTEXTA_GET_A1_VALID(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_A1_VALID_MASK) >> (31-2))
  63349. +#define FM_CONTEXTA_GET_A1(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_A1_MASK) >> (31-31))
  63350. +#define FM_CONTEXTA_GET_MACCMD(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_MASK) >> (31-15))
  63351. +#define FM_CONTEXTA_GET_MACCMD_VALID(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_VALID_MASK) >> (31-8))
  63352. +#define FM_CONTEXTA_GET_MACCMD_SECURED(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_SECURED_MASK) >> (31-11))
  63353. +#define FM_CONTEXTA_GET_MACCMD_SECURE_CHANNEL(contextA) ((((t_FmContextA *)contextA)->command & FM_CONTEXTA_MACCMD_SC_MASK) >> (31-15))
  63354. +
  63355. +#define FM_CONTEXTA_SET_OVERRIDE(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_OVERRIDE_MASK) | (((uint32_t)(val) << (31-0)) & FM_CONTEXTA_OVERRIDE_MASK) ))
  63356. +#define FM_CONTEXTA_SET_ICMD(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_ICMD_MASK) | (((val) << (31-1)) & FM_CONTEXTA_ICMD_MASK) ))
  63357. +#define FM_CONTEXTA_SET_A1_VALID(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_A1_VALID_MASK) | (((val) << (31-2)) & FM_CONTEXTA_A1_VALID_MASK) ))
  63358. +#define FM_CONTEXTA_SET_A1(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_A1_MASK) | (((val) << (31-31)) & FM_CONTEXTA_A1_MASK) ))
  63359. +#define FM_CONTEXTA_SET_MACCMD(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_MASK) | (((val) << (31-15)) & FM_CONTEXTA_MACCMD_MASK) ))
  63360. +#define FM_CONTEXTA_SET_MACCMD_VALID(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_VALID_MASK) | (((val) << (31-8)) & FM_CONTEXTA_MACCMD_VALID_MASK) ))
  63361. +#define FM_CONTEXTA_SET_MACCMD_SECURED(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_SECURED_MASK) | (((val) << (31-11)) & FM_CONTEXTA_MACCMD_SECURED_MASK) ))
  63362. +#define FM_CONTEXTA_SET_MACCMD_SECURE_CHANNEL(contextA,val) (((t_FmContextA *)contextA)->command = (uint32_t)((((t_FmContextA *)contextA)->command & ~FM_CONTEXTA_MACCMD_SC_MASK) | (((val) << (31-15)) & FM_CONTEXTA_MACCMD_SC_MASK) ))
  63363. +/* @} */
  63364. +
  63365. +/**************************************************************************//**
  63366. + @Collection Context B macros
  63367. +*//***************************************************************************/
  63368. +#define FM_CONTEXTB_FQID_MASK 0x00ffffff
  63369. +
  63370. +#define FM_CONTEXTB_GET_FQID(contextB) (*((t_FmContextB *)contextB) & FM_CONTEXTB_FQID_MASK)
  63371. +#define FM_CONTEXTB_SET_FQID(contextB,val) (*((t_FmContextB *)contextB) = ((*((t_FmContextB *)contextB) & ~FM_CONTEXTB_FQID_MASK) | ((val) & FM_CONTEXTB_FQID_MASK)))
  63372. +/* @} */
  63373. +
  63374. +#if defined(__MWERKS__) && !defined(__GNUC__)
  63375. +#pragma pack(pop)
  63376. +#endif /* defined(__MWERKS__) && ... */
  63377. +
  63378. +
  63379. +/**************************************************************************//**
  63380. + @Description FM Exceptions
  63381. +*//***************************************************************************/
  63382. +typedef enum e_FmExceptions {
  63383. + e_FM_EX_DMA_BUS_ERROR = 0, /**< DMA bus error. */
  63384. + e_FM_EX_DMA_READ_ECC, /**< Read Buffer ECC error (Valid for FM rev < 6)*/
  63385. + e_FM_EX_DMA_SYSTEM_WRITE_ECC, /**< Write Buffer ECC error on system side (Valid for FM rev < 6)*/
  63386. + e_FM_EX_DMA_FM_WRITE_ECC, /**< Write Buffer ECC error on FM side (Valid for FM rev < 6)*/
  63387. + e_FM_EX_DMA_SINGLE_PORT_ECC, /**< Single Port ECC error on FM side (Valid for FM rev > 6)*/
  63388. + e_FM_EX_FPM_STALL_ON_TASKS, /**< Stall of tasks on FPM */
  63389. + e_FM_EX_FPM_SINGLE_ECC, /**< Single ECC on FPM. */
  63390. + e_FM_EX_FPM_DOUBLE_ECC, /**< Double ECC error on FPM ram access */
  63391. + e_FM_EX_QMI_SINGLE_ECC, /**< Single ECC on QMI. */
  63392. + e_FM_EX_QMI_DOUBLE_ECC, /**< Double bit ECC occurred on QMI */
  63393. + e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< Dequeue from unknown port id */
  63394. + e_FM_EX_BMI_LIST_RAM_ECC, /**< Linked List RAM ECC error */
  63395. + e_FM_EX_BMI_STORAGE_PROFILE_ECC, /**< Storage Profile ECC Error */
  63396. + e_FM_EX_BMI_STATISTICS_RAM_ECC, /**< Statistics Count RAM ECC Error Enable */
  63397. + e_FM_EX_BMI_DISPATCH_RAM_ECC, /**< Dispatch RAM ECC Error Enable */
  63398. + e_FM_EX_IRAM_ECC, /**< Double bit ECC occurred on IRAM*/
  63399. + e_FM_EX_MURAM_ECC /**< Double bit ECC occurred on MURAM*/
  63400. +} e_FmExceptions;
  63401. +
  63402. +/**************************************************************************//**
  63403. + @Description Enum for defining port DMA swap mode
  63404. +*//***************************************************************************/
  63405. +typedef enum e_FmDmaSwapOption {
  63406. + e_FM_DMA_NO_SWP = FMAN_DMA_NO_SWP, /**< No swap, transfer data as is.*/
  63407. + e_FM_DMA_SWP_PPC_LE = FMAN_DMA_SWP_PPC_LE, /**< The transferred data should be swapped
  63408. + in PowerPc Little Endian mode. */
  63409. + e_FM_DMA_SWP_BE = FMAN_DMA_SWP_BE /**< The transferred data should be swapped
  63410. + in Big Endian mode */
  63411. +} e_FmDmaSwapOption;
  63412. +
  63413. +/**************************************************************************//**
  63414. + @Description Enum for defining port DMA cache attributes
  63415. +*//***************************************************************************/
  63416. +typedef enum e_FmDmaCacheOption {
  63417. + e_FM_DMA_NO_STASH = FMAN_DMA_NO_STASH, /**< Cacheable, no Allocate (No Stashing) */
  63418. + e_FM_DMA_STASH = FMAN_DMA_STASH /**< Cacheable and Allocate (Stashing on) */
  63419. +} e_FmDmaCacheOption;
  63420. +
  63421. +
  63422. +/**************************************************************************//**
  63423. + @Group FM_init_grp FM Initialization Unit
  63424. +
  63425. + @Description FM Initialization Unit
  63426. +
  63427. + Initialization Flow
  63428. + Initialization of the FM Module will be carried out by the application
  63429. + according to the following sequence:
  63430. + - Calling the configuration routine with basic parameters.
  63431. + - Calling the advance initialization routines to change driver's defaults.
  63432. + - Calling the initialization routine.
  63433. +
  63434. + @{
  63435. +*//***************************************************************************/
  63436. +
  63437. +/**************************************************************************//**
  63438. + @Function t_FmExceptionsCallback
  63439. +
  63440. + @Description Exceptions user callback routine, will be called upon an
  63441. + exception passing the exception identification.
  63442. +
  63443. + @Param[in] h_App - User's application descriptor.
  63444. + @Param[in] exception - The exception.
  63445. +*//***************************************************************************/
  63446. +typedef void (t_FmExceptionsCallback)(t_Handle h_App,
  63447. + e_FmExceptions exception);
  63448. +
  63449. +
  63450. +/**************************************************************************//**
  63451. + @Function t_FmBusErrorCallback
  63452. +
  63453. + @Description Bus error user callback routine, will be called upon a
  63454. + bus error, passing parameters describing the errors and the owner.
  63455. +
  63456. + @Param[in] h_App - User's application descriptor.
  63457. + @Param[in] portType - Port type (e_FmPortType)
  63458. + @Param[in] portId - Port id - relative to type.
  63459. + @Param[in] addr - Address that caused the error
  63460. + @Param[in] tnum - Owner of error
  63461. + @Param[in] liodn - Logical IO device number
  63462. +*//***************************************************************************/
  63463. +typedef void (t_FmBusErrorCallback) (t_Handle h_App,
  63464. + e_FmPortType portType,
  63465. + uint8_t portId,
  63466. + uint64_t addr,
  63467. + uint8_t tnum,
  63468. + uint16_t liodn);
  63469. +
  63470. +/**************************************************************************//**
  63471. + @Description A structure for defining buffer prefix area content.
  63472. +*//***************************************************************************/
  63473. +typedef struct t_FmBufferPrefixContent {
  63474. + uint16_t privDataSize; /**< Number of bytes to be left at the beginning
  63475. + of the external buffer; Note that the private-area will
  63476. + start from the base of the buffer address. */
  63477. + bool passPrsResult; /**< TRUE to pass the parse result to/from the FM;
  63478. + User may use FM_PORT_GetBufferPrsResult() in order to
  63479. + get the parser-result from a buffer. */
  63480. + bool passTimeStamp; /**< TRUE to pass the timeStamp to/from the FM
  63481. + User may use FM_PORT_GetBufferTimeStamp() in order to
  63482. + get the parser-result from a buffer. */
  63483. + bool passHashResult; /**< TRUE to pass the KG hash result to/from the FM
  63484. + User may use FM_PORT_GetBufferHashResult() in order to
  63485. + get the parser-result from a buffer. */
  63486. + bool passAllOtherPCDInfo;/**< Add all other Internal-Context information:
  63487. + AD, hash-result, key, etc. */
  63488. + uint16_t dataAlign; /**< 0 to use driver's default alignment [DEFAULT_FM_SP_bufferPrefixContent_dataAlign],
  63489. + other value for selecting a data alignment (must be a power of 2);
  63490. + if write optimization is used, must be >= 16. */
  63491. + uint8_t manipExtraSpace; /**< Maximum extra size needed (insertion-size minus removal-size);
  63492. + Note that this field impacts the size of the buffer-prefix
  63493. + (i.e. it pushes the data offset);
  63494. + This field is irrelevant if DPAA_VERSION==10 */
  63495. +} t_FmBufferPrefixContent;
  63496. +
  63497. +/**************************************************************************//**
  63498. + @Description A structure of information about each of the external
  63499. + buffer pools used by a port or storage-profile.
  63500. +*//***************************************************************************/
  63501. +typedef struct t_FmExtPoolParams {
  63502. + uint8_t id; /**< External buffer pool id */
  63503. + uint16_t size; /**< External buffer pool buffer size */
  63504. +} t_FmExtPoolParams;
  63505. +
  63506. +/**************************************************************************//**
  63507. + @Description A structure for informing the driver about the external
  63508. + buffer pools allocated in the BM and used by a port or a
  63509. + storage-profile.
  63510. +*//***************************************************************************/
  63511. +typedef struct t_FmExtPools {
  63512. + uint8_t numOfPoolsUsed; /**< Number of pools use by this port */
  63513. + t_FmExtPoolParams extBufPool[FM_PORT_MAX_NUM_OF_EXT_POOLS];
  63514. + /**< Parameters for each port */
  63515. +} t_FmExtPools;
  63516. +
  63517. +/**************************************************************************//**
  63518. + @Description A structure for defining backup BM Pools.
  63519. +*//***************************************************************************/
  63520. +typedef struct t_FmBackupBmPools {
  63521. + uint8_t numOfBackupPools; /**< Number of BM backup pools -
  63522. + must be smaller than the total number of
  63523. + pools defined for the specified port.*/
  63524. + uint8_t poolIds[FM_PORT_MAX_NUM_OF_EXT_POOLS];
  63525. + /**< numOfBackupPools pool id's, specifying which
  63526. + pools should be used only as backup. Pool
  63527. + id's specified here must be a subset of the
  63528. + pools used by the specified port.*/
  63529. +} t_FmBackupBmPools;
  63530. +
  63531. +/**************************************************************************//**
  63532. + @Description A structure for defining BM pool depletion criteria
  63533. +*//***************************************************************************/
  63534. +typedef struct t_FmBufPoolDepletion {
  63535. + bool poolsGrpModeEnable; /**< select mode in which pause frames will be sent after
  63536. + a number of pools (all together!) are depleted */
  63537. + uint8_t numOfPools; /**< the number of depleted pools that will invoke
  63538. + pause frames transmission. */
  63539. + bool poolsToConsider[BM_MAX_NUM_OF_POOLS];
  63540. + /**< For each pool, TRUE if it should be considered for
  63541. + depletion (Note - this pool must be used by this port!). */
  63542. + bool singlePoolModeEnable; /**< select mode in which pause frames will be sent after
  63543. + a single-pool is depleted; */
  63544. + bool poolsToConsiderForSingleMode[BM_MAX_NUM_OF_POOLS];
  63545. + /**< For each pool, TRUE if it should be considered for
  63546. + depletion (Note - this pool must be used by this port!) */
  63547. +#if (DPAA_VERSION >= 11)
  63548. + bool pfcPrioritiesEn[FM_MAX_NUM_OF_PFC_PRIORITIES];
  63549. + /**< This field is used by the MAC as the Priority Enable Vector in the PFC frame which is transmitted */
  63550. +#endif /* (DPAA_VERSION >= 11) */
  63551. +} t_FmBufPoolDepletion;
  63552. +
  63553. +/**************************************************************************//**
  63554. + @Description A Structure for defining Ucode patch for loading.
  63555. +*//***************************************************************************/
  63556. +typedef struct t_FmFirmwareParams {
  63557. + uint32_t size; /**< Size of uCode */
  63558. + uint32_t *p_Code; /**< A pointer to the uCode */
  63559. +} t_FmFirmwareParams;
  63560. +
  63561. +/**************************************************************************//**
  63562. + @Description A Structure for defining FM initialization parameters
  63563. +*//***************************************************************************/
  63564. +typedef struct t_FmParams {
  63565. + uint8_t fmId; /**< Index of the FM */
  63566. + uint8_t guestId; /**< FM Partition Id */
  63567. + uintptr_t baseAddr; /**< A pointer to base of memory mapped FM registers (virtual);
  63568. + this field is optional when the FM runs in "guest-mode"
  63569. + (i.e. guestId != NCSW_MASTER_ID); in that case, the driver will
  63570. + use the memory-map instead of calling the IPC where possible;
  63571. + NOTE that this should include ALL common registers of the FM including
  63572. + the PCD registers area (i.e. until the VSP pages - 880KB). */
  63573. + t_Handle h_FmMuram; /**< A handle of an initialized MURAM object,
  63574. + to be used by the FM. */
  63575. + uint16_t fmClkFreq; /**< In Mhz;
  63576. + Relevant when FM not runs in "guest-mode". */
  63577. + uint16_t fmMacClkRatio; /**< FM MAC Clock ratio, for backward comparability:
  63578. + when fmMacClkRatio = 0, ratio is 2:1
  63579. + when fmMacClkRatio = 1, ratio is 1:1 */
  63580. + t_FmExceptionsCallback *f_Exception; /**< An application callback routine to handle exceptions;
  63581. + Relevant when FM not runs in "guest-mode". */
  63582. + t_FmBusErrorCallback *f_BusError; /**< An application callback routine to handle exceptions;
  63583. + Relevant when FM not runs in "guest-mode". */
  63584. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  63585. + be passed by the driver upon calling the above callbacks;
  63586. + Relevant when FM not runs in "guest-mode". */
  63587. + int irq; /**< FM interrupt source for normal events;
  63588. + Relevant when FM not runs in "guest-mode". */
  63589. + int errIrq; /**< FM interrupt source for errors;
  63590. + Relevant when FM not runs in "guest-mode". */
  63591. + t_FmFirmwareParams firmware; /**< The firmware parameters structure;
  63592. + Relevant when FM not runs in "guest-mode". */
  63593. +
  63594. +#if (DPAA_VERSION >= 11)
  63595. + uintptr_t vspBaseAddr; /**< A pointer to base of memory mapped FM VSP registers (virtual);
  63596. + i.e. up to 24KB, depending on the specific chip. */
  63597. + uint8_t partVSPBase; /**< The first Virtual-Storage-Profile-id dedicated to this partition.
  63598. + NOTE: this parameter relevant only when working with multiple partitions. */
  63599. + uint8_t partNumOfVSPs; /**< Number of VSPs dedicated to this partition.
  63600. + NOTE: this parameter relevant only when working with multiple partitions. */
  63601. +#endif /* (DPAA_VERSION >= 11) */
  63602. +} t_FmParams;
  63603. +
  63604. +
  63605. +/**************************************************************************//**
  63606. + @Function FM_Config
  63607. +
  63608. + @Description Creates the FM module and returns its handle (descriptor).
  63609. + This descriptor must be passed as first parameter to all other
  63610. + FM function calls.
  63611. +
  63612. + No actual initialization or configuration of FM hardware is
  63613. + done by this routine. All FM parameters get default values that
  63614. + may be changed by calling one or more of the advance config routines.
  63615. +
  63616. + @Param[in] p_FmParams - A pointer to a data structure of mandatory FM parameters
  63617. +
  63618. + @Return A handle to the FM object, or NULL for Failure.
  63619. +*//***************************************************************************/
  63620. +t_Handle FM_Config(t_FmParams *p_FmParams);
  63621. +
  63622. +/**************************************************************************//**
  63623. + @Function FM_Init
  63624. +
  63625. + @Description Initializes the FM module by defining the software structure
  63626. + and configuring the hardware registers.
  63627. +
  63628. + @Param[in] h_Fm - FM module descriptor
  63629. +
  63630. + @Return E_OK on success; Error code otherwise.
  63631. +*//***************************************************************************/
  63632. +t_Error FM_Init(t_Handle h_Fm);
  63633. +
  63634. +/**************************************************************************//**
  63635. + @Function FM_Free
  63636. +
  63637. + @Description Frees all resources that were assigned to FM module.
  63638. +
  63639. + Calling this routine invalidates the descriptor.
  63640. +
  63641. + @Param[in] h_Fm - FM module descriptor
  63642. +
  63643. + @Return E_OK on success; Error code otherwise.
  63644. +*//***************************************************************************/
  63645. +t_Error FM_Free(t_Handle h_Fm);
  63646. +
  63647. +
  63648. +/**************************************************************************//**
  63649. + @Group FM_advanced_init_grp FM Advanced Configuration Unit
  63650. +
  63651. + @Description Advanced configuration routines are optional routines that may
  63652. + be called in order to change the default driver settings.
  63653. +
  63654. + Note: Advanced configuration routines are not available for guest partition.
  63655. + @{
  63656. +*//***************************************************************************/
  63657. +
  63658. +/**************************************************************************//**
  63659. + @Description Enum for selecting DMA debug mode
  63660. +*//***************************************************************************/
  63661. +typedef enum e_FmDmaDbgCntMode {
  63662. + e_FM_DMA_DBG_NO_CNT = 0, /**< No counting */
  63663. + e_FM_DMA_DBG_CNT_DONE, /**< Count DONE commands */
  63664. + e_FM_DMA_DBG_CNT_COMM_Q_EM, /**< count command queue emergency signals */
  63665. + e_FM_DMA_DBG_CNT_INT_READ_EM, /**< Count Internal Read buffer emergency signal */
  63666. + e_FM_DMA_DBG_CNT_INT_WRITE_EM, /**< Count Internal Write buffer emergency signal */
  63667. + e_FM_DMA_DBG_CNT_FPM_WAIT, /**< Count FPM WAIT signal */
  63668. + e_FM_DMA_DBG_CNT_SIGLE_BIT_ECC, /**< Single bit ECC errors. */
  63669. + e_FM_DMA_DBG_CNT_RAW_WAR_PROT /**< Number of times there was a need for RAW & WAR protection. */
  63670. +} e_FmDmaDbgCntMode;
  63671. +
  63672. +/**************************************************************************//**
  63673. + @Description Enum for selecting DMA Cache Override
  63674. +*//***************************************************************************/
  63675. +typedef enum e_FmDmaCacheOverride {
  63676. + e_FM_DMA_NO_CACHE_OR = 0, /**< No override of the Cache field */
  63677. + e_FM_DMA_NO_STASH_DATA, /**< Data should not be stashed in system level cache */
  63678. + e_FM_DMA_MAY_STASH_DATA, /**< Data may be stashed in system level cache */
  63679. + e_FM_DMA_STASH_DATA /**< Data should be stashed in system level cache */
  63680. +} e_FmDmaCacheOverride;
  63681. +
  63682. +/**************************************************************************//**
  63683. + @Description Enum for selecting DMA External Bus Priority
  63684. +*//***************************************************************************/
  63685. +typedef enum e_FmDmaExtBusPri {
  63686. + e_FM_DMA_EXT_BUS_NORMAL = 0, /**< Normal priority */
  63687. + e_FM_DMA_EXT_BUS_EBS, /**< AXI extended bus service priority */
  63688. + e_FM_DMA_EXT_BUS_SOS, /**< AXI sos priority */
  63689. + e_FM_DMA_EXT_BUS_EBS_AND_SOS /**< AXI ebs + sos priority */
  63690. +} e_FmDmaExtBusPri;
  63691. +
  63692. +/**************************************************************************//**
  63693. + @Description Enum for choosing the field that will be output on AID
  63694. +*//***************************************************************************/
  63695. +typedef enum e_FmDmaAidMode {
  63696. + e_FM_DMA_AID_OUT_PORT_ID = 0, /**< 4 LSB of PORT_ID */
  63697. + e_FM_DMA_AID_OUT_TNUM /**< 4 LSB of TNUM */
  63698. +} e_FmDmaAidMode;
  63699. +
  63700. +/**************************************************************************//**
  63701. + @Description Enum for selecting FPM Catastrophic error behavior
  63702. +*//***************************************************************************/
  63703. +typedef enum e_FmCatastrophicErr {
  63704. + e_FM_CATASTROPHIC_ERR_STALL_PORT = 0, /**< Port_ID is stalled (only reset can release it) */
  63705. + e_FM_CATASTROPHIC_ERR_STALL_TASK /**< Only erroneous task is stalled */
  63706. +} e_FmCatastrophicErr;
  63707. +
  63708. +/**************************************************************************//**
  63709. + @Description Enum for selecting FPM DMA Error behavior
  63710. +*//***************************************************************************/
  63711. +typedef enum e_FmDmaErr {
  63712. + e_FM_DMA_ERR_CATASTROPHIC = 0, /**< Dma error is treated as a catastrophic
  63713. + error (e_FmCatastrophicErr)*/
  63714. + e_FM_DMA_ERR_REPORT /**< Dma error is just reported */
  63715. +} e_FmDmaErr;
  63716. +
  63717. +/**************************************************************************//**
  63718. + @Description Enum for selecting DMA Emergency level by BMI emergency signal
  63719. +*//***************************************************************************/
  63720. +typedef enum e_FmDmaEmergencyLevel {
  63721. + e_FM_DMA_EM_EBS = 0, /**< EBS emergency */
  63722. + e_FM_DMA_EM_SOS /**< SOS emergency */
  63723. +} e_FmDmaEmergencyLevel;
  63724. +
  63725. +/**************************************************************************//**
  63726. + @Collection Enum for selecting DMA Emergency options
  63727. +*//***************************************************************************/
  63728. +typedef uint32_t fmEmergencyBus_t; /**< DMA emergency options */
  63729. +
  63730. +#define FM_DMA_MURAM_READ_EMERGENCY 0x00800000 /**< Enable emergency for MURAM1 */
  63731. +#define FM_DMA_MURAM_WRITE_EMERGENCY 0x00400000 /**< Enable emergency for MURAM2 */
  63732. +#define FM_DMA_EXT_BUS_EMERGENCY 0x00100000 /**< Enable emergency for external bus */
  63733. +/* @} */
  63734. +
  63735. +/**************************************************************************//**
  63736. + @Description A structure for defining DMA emergency level
  63737. +*//***************************************************************************/
  63738. +typedef struct t_FmDmaEmergency {
  63739. + fmEmergencyBus_t emergencyBusSelect; /**< An OR of the busses where emergency
  63740. + should be enabled */
  63741. + e_FmDmaEmergencyLevel emergencyLevel; /**< EBS/SOS */
  63742. +} t_FmDmaEmergency;
  63743. +
  63744. +/**************************************************************************//*
  63745. + @Description structure for defining FM threshold
  63746. +*//***************************************************************************/
  63747. +typedef struct t_FmThresholds {
  63748. + uint8_t dispLimit; /**< The number of times a frames may
  63749. + be passed in the FM before assumed to
  63750. + be looping. */
  63751. + uint8_t prsDispTh; /**< This is the number pf packets that may be
  63752. + queued in the parser dispatch queue*/
  63753. + uint8_t plcrDispTh; /**< This is the number pf packets that may be
  63754. + queued in the policer dispatch queue*/
  63755. + uint8_t kgDispTh; /**< This is the number pf packets that may be
  63756. + queued in the keygen dispatch queue*/
  63757. + uint8_t bmiDispTh; /**< This is the number pf packets that may be
  63758. + queued in the BMI dispatch queue*/
  63759. + uint8_t qmiEnqDispTh; /**< This is the number pf packets that may be
  63760. + queued in the QMI enqueue dispatch queue*/
  63761. + uint8_t qmiDeqDispTh; /**< This is the number pf packets that may be
  63762. + queued in the QMI dequeue dispatch queue*/
  63763. + uint8_t fmCtl1DispTh; /**< This is the number pf packets that may be
  63764. + queued in fmCtl1 dispatch queue*/
  63765. + uint8_t fmCtl2DispTh; /**< This is the number pf packets that may be
  63766. + queued in fmCtl2 dispatch queue*/
  63767. +} t_FmThresholds;
  63768. +
  63769. +/**************************************************************************//*
  63770. + @Description structure for defining DMA thresholds
  63771. +*//***************************************************************************/
  63772. +typedef struct t_FmDmaThresholds {
  63773. + uint8_t assertEmergency; /**< When this value is reached,
  63774. + assert emergency (Threshold)*/
  63775. + uint8_t clearEmergency; /**< After emergency is asserted, it is held
  63776. + until this value is reached (Hystheresis) */
  63777. +} t_FmDmaThresholds;
  63778. +
  63779. +
  63780. +/**************************************************************************//**
  63781. + @Function FM_ConfigResetOnInit
  63782. +
  63783. + @Description Define whether to reset the FM before initialization.
  63784. + Change the default configuration [DEFAULT_resetOnInit].
  63785. +
  63786. + @Param[in] h_Fm A handle to an FM Module.
  63787. + @Param[in] enable When TRUE, FM will be reset before any initialization.
  63788. +
  63789. + @Return E_OK on success; Error code otherwise.
  63790. +
  63791. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63792. + This routine should NOT be called from guest-partition
  63793. + (i.e. guestId != NCSW_MASTER_ID)
  63794. +*//***************************************************************************/
  63795. +t_Error FM_ConfigResetOnInit(t_Handle h_Fm, bool enable);
  63796. +
  63797. +/**************************************************************************//**
  63798. + @Function FM_ConfigTotalFifoSize
  63799. +
  63800. + @Description Define Total FIFO size for the whole FM.
  63801. + Calling this routine changes the total Fifo size in the internal driver
  63802. + data base from its default configuration [DEFAULT_totalFifoSize]
  63803. +
  63804. + @Param[in] h_Fm A handle to an FM Module.
  63805. + @Param[in] totalFifoSize The selected new value.
  63806. +
  63807. + @Return E_OK on success; Error code otherwise.
  63808. +
  63809. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63810. + This routine should NOT be called from guest-partition
  63811. + (i.e. guestId != NCSW_MASTER_ID)
  63812. +*//***************************************************************************/
  63813. +t_Error FM_ConfigTotalFifoSize(t_Handle h_Fm, uint32_t totalFifoSize);
  63814. +
  63815. + /**************************************************************************//**
  63816. + @Function FM_ConfigDmaCacheOverride
  63817. +
  63818. + @Description Define cache override mode.
  63819. + Calling this routine changes the cache override mode
  63820. + in the internal driver data base from its default configuration [DEFAULT_cacheOverride]
  63821. +
  63822. + @Param[in] h_Fm A handle to an FM Module.
  63823. + @Param[in] cacheOverride The selected new value.
  63824. +
  63825. + @Return E_OK on success; Error code otherwise.
  63826. +
  63827. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63828. + This routine should NOT be called from guest-partition
  63829. + (i.e. guestId != NCSW_MASTER_ID)
  63830. +*//***************************************************************************/
  63831. +t_Error FM_ConfigDmaCacheOverride(t_Handle h_Fm, e_FmDmaCacheOverride cacheOverride);
  63832. +
  63833. +/**************************************************************************//**
  63834. + @Function FM_ConfigDmaAidOverride
  63835. +
  63836. + @Description Define DMA AID override mode.
  63837. + Calling this routine changes the AID override mode
  63838. + in the internal driver data base from its default configuration [DEFAULT_aidOverride]
  63839. +
  63840. + @Param[in] h_Fm A handle to an FM Module.
  63841. + @Param[in] aidOverride The selected new value.
  63842. +
  63843. + @Return E_OK on success; Error code otherwise.
  63844. +
  63845. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63846. + This routine should NOT be called from guest-partition
  63847. + (i.e. guestId != NCSW_MASTER_ID)
  63848. +*//***************************************************************************/
  63849. +t_Error FM_ConfigDmaAidOverride(t_Handle h_Fm, bool aidOverride);
  63850. +
  63851. +/**************************************************************************//**
  63852. + @Function FM_ConfigDmaAidMode
  63853. +
  63854. + @Description Define DMA AID mode.
  63855. + Calling this routine changes the AID mode in the internal
  63856. + driver data base from its default configuration [DEFAULT_aidMode]
  63857. +
  63858. + @Param[in] h_Fm A handle to an FM Module.
  63859. + @Param[in] aidMode The selected new value.
  63860. +
  63861. + @Return E_OK on success; Error code otherwise.
  63862. +
  63863. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63864. + This routine should NOT be called from guest-partition
  63865. + (i.e. guestId != NCSW_MASTER_ID)
  63866. +*//***************************************************************************/
  63867. +t_Error FM_ConfigDmaAidMode(t_Handle h_Fm, e_FmDmaAidMode aidMode);
  63868. +
  63869. +/**************************************************************************//**
  63870. + @Function FM_ConfigDmaAxiDbgNumOfBeats
  63871. +
  63872. + @Description Define DMA AXI number of beats.
  63873. + Calling this routine changes the AXI number of beats in the internal
  63874. + driver data base from its default configuration [DEFAULT_axiDbgNumOfBeats]
  63875. +
  63876. + @Param[in] h_Fm A handle to an FM Module.
  63877. + @Param[in] axiDbgNumOfBeats The selected new value.
  63878. +
  63879. + @Return E_OK on success; Error code otherwise.
  63880. +
  63881. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63882. + This routine should NOT be called from guest-partition
  63883. + (i.e. guestId != NCSW_MASTER_ID)
  63884. +*//***************************************************************************/
  63885. +t_Error FM_ConfigDmaAxiDbgNumOfBeats(t_Handle h_Fm, uint8_t axiDbgNumOfBeats);
  63886. +
  63887. +/**************************************************************************//**
  63888. + @Function FM_ConfigDmaCamNumOfEntries
  63889. +
  63890. + @Description Define number of CAM entries.
  63891. + Calling this routine changes the number of CAM entries in the internal
  63892. + driver data base from its default configuration [DEFAULT_dmaCamNumOfEntries].
  63893. +
  63894. + @Param[in] h_Fm A handle to an FM Module.
  63895. + @Param[in] numOfEntries The selected new value.
  63896. +
  63897. + @Return E_OK on success; Error code otherwise.
  63898. +
  63899. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63900. + This routine should NOT be called from guest-partition
  63901. + (i.e. guestId != NCSW_MASTER_ID)
  63902. +*//***************************************************************************/
  63903. +t_Error FM_ConfigDmaCamNumOfEntries(t_Handle h_Fm, uint8_t numOfEntries);
  63904. +
  63905. +/**************************************************************************//**
  63906. + @Function FM_ConfigEnableCounters
  63907. +
  63908. + @Description Obsolete, always return E_OK.
  63909. +
  63910. + @Param[in] h_Fm A handle to an FM Module.
  63911. +
  63912. + @Return E_OK on success; Error code otherwise.
  63913. +*//***************************************************************************/
  63914. +t_Error FM_ConfigEnableCounters(t_Handle h_Fm);
  63915. +
  63916. +/**************************************************************************//**
  63917. + @Function FM_ConfigDmaDbgCounter
  63918. +
  63919. + @Description Define DMA debug counter.
  63920. + Calling this routine changes the number of the DMA debug counter in the internal
  63921. + driver data base from its default configuration [DEFAULT_dmaDbgCntMode].
  63922. +
  63923. + @Param[in] h_Fm A handle to an FM Module.
  63924. + @Param[in] fmDmaDbgCntMode An enum selecting the debug counter mode.
  63925. +
  63926. + @Return E_OK on success; Error code otherwise.
  63927. +
  63928. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63929. + This routine should NOT be called from guest-partition
  63930. + (i.e. guestId != NCSW_MASTER_ID)
  63931. +*//***************************************************************************/
  63932. +t_Error FM_ConfigDmaDbgCounter(t_Handle h_Fm, e_FmDmaDbgCntMode fmDmaDbgCntMode);
  63933. +
  63934. +/**************************************************************************//**
  63935. + @Function FM_ConfigDmaStopOnBusErr
  63936. +
  63937. + @Description Define bus error behavior.
  63938. + Calling this routine changes the bus error behavior definition
  63939. + in the internal driver data base from its default
  63940. + configuration [DEFAULT_dmaStopOnBusError].
  63941. +
  63942. + @Param[in] h_Fm A handle to an FM Module.
  63943. + @Param[in] stop TRUE to stop on bus error, FALSE to continue.
  63944. +
  63945. + @Return E_OK on success; Error code otherwise.
  63946. +
  63947. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63948. + Only if bus error is enabled.
  63949. + This routine should NOT be called from guest-partition
  63950. + (i.e. guestId != NCSW_MASTER_ID)
  63951. +*//***************************************************************************/
  63952. +t_Error FM_ConfigDmaStopOnBusErr(t_Handle h_Fm, bool stop);
  63953. +
  63954. +/**************************************************************************//**
  63955. + @Function FM_ConfigDmaEmergency
  63956. +
  63957. + @Description Define DMA emergency.
  63958. + Calling this routine changes the DMA emergency definition
  63959. + in the internal driver data base from its default
  63960. + configuration where's it's disabled.
  63961. +
  63962. + @Param[in] h_Fm A handle to an FM Module.
  63963. + @Param[in] p_Emergency An OR mask of all required options.
  63964. +
  63965. + @Return E_OK on success; Error code otherwise.
  63966. +
  63967. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63968. + This routine should NOT be called from guest-partition
  63969. + (i.e. guestId != NCSW_MASTER_ID)
  63970. +*//***************************************************************************/
  63971. +t_Error FM_ConfigDmaEmergency(t_Handle h_Fm, t_FmDmaEmergency *p_Emergency);
  63972. +
  63973. +/**************************************************************************//**
  63974. + @Function FM_ConfigDmaErr
  63975. +
  63976. + @Description DMA error treatment.
  63977. + Calling this routine changes the DMA error treatment
  63978. + in the internal driver data base from its default
  63979. + configuration [DEFAULT_dmaErr].
  63980. +
  63981. + @Param[in] h_Fm A handle to an FM Module.
  63982. + @Param[in] dmaErr The selected new choice.
  63983. +
  63984. + @Return E_OK on success; Error code otherwise.
  63985. +
  63986. + @Cautions Allowed only following FM_Config() and before FM_Init().
  63987. + This routine should NOT be called from guest-partition
  63988. + (i.e. guestId != NCSW_MASTER_ID)
  63989. +*//***************************************************************************/
  63990. +t_Error FM_ConfigDmaErr(t_Handle h_Fm, e_FmDmaErr dmaErr);
  63991. +
  63992. +/**************************************************************************//**
  63993. + @Function FM_ConfigCatastrophicErr
  63994. +
  63995. + @Description Define FM behavior on catastrophic error.
  63996. + Calling this routine changes the FM behavior on catastrophic
  63997. + error in the internal driver data base from its default
  63998. + [DEFAULT_catastrophicErr].
  63999. +
  64000. + @Param[in] h_Fm A handle to an FM Module.
  64001. + @Param[in] catastrophicErr The selected new choice.
  64002. +
  64003. + @Return E_OK on success; Error code otherwise.
  64004. +
  64005. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64006. + This routine should NOT be called from guest-partition
  64007. + (i.e. guestId != NCSW_MASTER_ID)
  64008. +*//***************************************************************************/
  64009. +t_Error FM_ConfigCatastrophicErr(t_Handle h_Fm, e_FmCatastrophicErr catastrophicErr);
  64010. +
  64011. +/**************************************************************************//**
  64012. + @Function FM_ConfigEnableMuramTestMode
  64013. +
  64014. + @Description Enable MURAM test mode.
  64015. + Calling this routine changes the internal driver data base
  64016. + from its default selection of test mode where it's disabled.
  64017. + This routine is only avaiable on old FM revisions (FMan v2).
  64018. +
  64019. + @Param[in] h_Fm A handle to an FM Module.
  64020. +
  64021. + @Return E_OK on success; Error code otherwise.
  64022. +
  64023. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64024. + This routine should NOT be called from guest-partition
  64025. + (i.e. guestId != NCSW_MASTER_ID)
  64026. +*//***************************************************************************/
  64027. +t_Error FM_ConfigEnableMuramTestMode(t_Handle h_Fm);
  64028. +
  64029. +/**************************************************************************//**
  64030. + @Function FM_ConfigEnableIramTestMode
  64031. +
  64032. + @Description Enable IRAM test mode.
  64033. + Calling this routine changes the internal driver data base
  64034. + from its default selection of test mode where it's disabled.
  64035. + This routine is only avaiable on old FM revisions (FMan v2).
  64036. +
  64037. + @Param[in] h_Fm A handle to an FM Module.
  64038. +
  64039. + @Return E_OK on success; Error code otherwise.
  64040. +
  64041. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64042. + This routine should NOT be called from guest-partition
  64043. + (i.e. guestId != NCSW_MASTER_ID)
  64044. +*//***************************************************************************/
  64045. +t_Error FM_ConfigEnableIramTestMode(t_Handle h_Fm);
  64046. +
  64047. +/**************************************************************************//**
  64048. + @Function FM_ConfigHaltOnExternalActivation
  64049. +
  64050. + @Description Define FM behavior on external halt activation.
  64051. + Calling this routine changes the FM behavior on external halt
  64052. + activation in the internal driver data base from its default
  64053. + [DEFAULT_haltOnExternalActivation].
  64054. +
  64055. + @Param[in] h_Fm A handle to an FM Module.
  64056. + @Param[in] enable TRUE to enable halt on external halt
  64057. + activation.
  64058. +
  64059. + @Return E_OK on success; Error code otherwise.
  64060. +
  64061. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64062. + This routine should NOT be called from guest-partition
  64063. + (i.e. guestId != NCSW_MASTER_ID)
  64064. +*//***************************************************************************/
  64065. +t_Error FM_ConfigHaltOnExternalActivation(t_Handle h_Fm, bool enable);
  64066. +
  64067. +/**************************************************************************//**
  64068. + @Function FM_ConfigHaltOnUnrecoverableEccError
  64069. +
  64070. + @Description Define FM behavior on external halt activation.
  64071. + Calling this routine changes the FM behavior on unrecoverable
  64072. + ECC error in the internal driver data base from its default
  64073. + [DEFAULT_haltOnUnrecoverableEccError].
  64074. + This routine is only avaiable on old FM revisions (FMan v2).
  64075. +
  64076. + @Param[in] h_Fm A handle to an FM Module.
  64077. + @Param[in] enable TRUE to enable halt on unrecoverable Ecc error
  64078. +
  64079. + @Return E_OK on success; Error code otherwise.
  64080. +
  64081. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64082. + This routine should NOT be called from guest-partition
  64083. + (i.e. guestId != NCSW_MASTER_ID)
  64084. +*//***************************************************************************/
  64085. +t_Error FM_ConfigHaltOnUnrecoverableEccError(t_Handle h_Fm, bool enable);
  64086. +
  64087. +/**************************************************************************//**
  64088. + @Function FM_ConfigException
  64089. +
  64090. + @Description Define FM exceptions.
  64091. + Calling this routine changes the exceptions defaults in the
  64092. + internal driver data base where all exceptions are enabled.
  64093. +
  64094. + @Param[in] h_Fm A handle to an FM Module.
  64095. + @Param[in] exception The exception to be selected.
  64096. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  64097. +
  64098. + @Return E_OK on success; Error code otherwise.
  64099. +
  64100. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64101. + This routine should NOT be called from guest-partition
  64102. + (i.e. guestId != NCSW_MASTER_ID)
  64103. +*//***************************************************************************/
  64104. +t_Error FM_ConfigException(t_Handle h_Fm, e_FmExceptions exception, bool enable);
  64105. +
  64106. +/**************************************************************************//**
  64107. + @Function FM_ConfigExternalEccRamsEnable
  64108. +
  64109. + @Description Select external ECC enabling.
  64110. + Calling this routine changes the ECC enabling control in the internal
  64111. + driver data base from its default [DEFAULT_externalEccRamsEnable].
  64112. + When this option is enabled Rams ECC enabling is not effected
  64113. + by FM_EnableRamsEcc/FM_DisableRamsEcc, but by a JTAG.
  64114. +
  64115. + @Param[in] h_Fm A handle to an FM Module.
  64116. + @Param[in] enable TRUE to enable this option.
  64117. +
  64118. + @Return E_OK on success; Error code otherwise.
  64119. +
  64120. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64121. + This routine should NOT be called from guest-partition
  64122. + (i.e. guestId != NCSW_MASTER_ID)
  64123. +*//***************************************************************************/
  64124. +t_Error FM_ConfigExternalEccRamsEnable(t_Handle h_Fm, bool enable);
  64125. +
  64126. +/**************************************************************************//**
  64127. + @Function FM_ConfigTnumAgingPeriod
  64128. +
  64129. + @Description Define Tnum aging period.
  64130. + Calling this routine changes the Tnum aging of dequeue TNUMs
  64131. + in the QMI in the internal driver data base from its default
  64132. + [DEFAULT_tnumAgingPeriod].
  64133. +
  64134. + @Param[in] h_Fm A handle to an FM Module.
  64135. + @Param[in] tnumAgingPeriod Tnum Aging Period in microseconds.
  64136. + Note that period is recalculated in units of
  64137. + 64 FM clocks. Driver will pick the closest
  64138. + possible period.
  64139. +
  64140. + @Return E_OK on success; Error code otherwise.
  64141. +
  64142. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64143. + This routine should NOT be called from guest-partition
  64144. + (i.e. guestId != NCSW_MASTER_ID)
  64145. + NOTE that if some MAC is configured for PFC, '0' value is NOT
  64146. + allowed.
  64147. +*//***************************************************************************/
  64148. +t_Error FM_ConfigTnumAgingPeriod(t_Handle h_Fm, uint16_t tnumAgingPeriod);
  64149. +
  64150. +/**************************************************************************//*
  64151. + @Function FM_ConfigDmaEmergencySmoother
  64152. +
  64153. + @Description Define DMA emergency smoother.
  64154. + Calling this routine changes the definition of the minimum
  64155. + amount of DATA beats transferred on the AXI READ and WRITE
  64156. + ports before lowering the emergency level.
  64157. + By default smoother is disabled.
  64158. +
  64159. + @Param[in] h_Fm A handle to an FM Module.
  64160. + @Param[in] emergencyCnt emergency switching counter.
  64161. +
  64162. + @Return E_OK on success; Error code otherwise.
  64163. +
  64164. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64165. + This routine should NOT be called from guest-partition
  64166. + (i.e. guestId != NCSW_MASTER_ID)
  64167. +*//***************************************************************************/
  64168. +t_Error FM_ConfigDmaEmergencySmoother(t_Handle h_Fm, uint32_t emergencyCnt);
  64169. +
  64170. +/**************************************************************************//*
  64171. + @Function FM_ConfigThresholds
  64172. +
  64173. + @Description Calling this routine changes the internal driver data base
  64174. + from its default FM threshold configuration:
  64175. + dispLimit: [DEFAULT_dispLimit]
  64176. + prsDispTh: [DEFAULT_prsDispTh]
  64177. + plcrDispTh: [DEFAULT_plcrDispTh]
  64178. + kgDispTh: [DEFAULT_kgDispTh]
  64179. + bmiDispTh: [DEFAULT_bmiDispTh]
  64180. + qmiEnqDispTh: [DEFAULT_qmiEnqDispTh]
  64181. + qmiDeqDispTh: [DEFAULT_qmiDeqDispTh]
  64182. + fmCtl1DispTh: [DEFAULT_fmCtl1DispTh]
  64183. + fmCtl2DispTh: [DEFAULT_fmCtl2DispTh]
  64184. +
  64185. +
  64186. + @Param[in] h_Fm A handle to an FM Module.
  64187. + @Param[in] p_FmThresholds A structure of threshold parameters.
  64188. +
  64189. + @Return E_OK on success; Error code otherwise.
  64190. +
  64191. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64192. + This routine should NOT be called from guest-partition
  64193. + (i.e. guestId != NCSW_MASTER_ID)
  64194. +*//***************************************************************************/
  64195. +t_Error FM_ConfigThresholds(t_Handle h_Fm, t_FmThresholds *p_FmThresholds);
  64196. +
  64197. +/**************************************************************************//*
  64198. + @Function FM_ConfigDmaSosEmergencyThreshold
  64199. +
  64200. + @Description Calling this routine changes the internal driver data base
  64201. + from its default dma SOS emergency configuration [DEFAULT_dmaSosEmergency]
  64202. +
  64203. + @Param[in] h_Fm A handle to an FM Module.
  64204. + @Param[in] dmaSosEmergency The selected new value.
  64205. +
  64206. + @Return E_OK on success; Error code otherwise.
  64207. +
  64208. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64209. + This routine should NOT be called from guest-partition
  64210. + (i.e. guestId != NCSW_MASTER_ID)
  64211. +*//***************************************************************************/
  64212. +t_Error FM_ConfigDmaSosEmergencyThreshold(t_Handle h_Fm, uint32_t dmaSosEmergency);
  64213. +
  64214. +/**************************************************************************//*
  64215. + @Function FM_ConfigDmaWriteBufThresholds
  64216. +
  64217. + @Description Calling this routine changes the internal driver data base
  64218. + from its default configuration of DMA write buffer threshold
  64219. + assertEmergency: [DEFAULT_dmaWriteIntBufLow]
  64220. + clearEmergency: [DEFAULT_dmaWriteIntBufHigh]
  64221. + This routine is only avaiable on old FM revisions (FMan v2).
  64222. +
  64223. + @Param[in] h_Fm A handle to an FM Module.
  64224. + @Param[in] p_FmDmaThresholds A structure of thresholds to define emergency behavior -
  64225. + When 'assertEmergency' value is reached, emergency is asserted,
  64226. + then it is held until 'clearEmergency' value is reached.
  64227. +
  64228. + @Return E_OK on success; Error code otherwise.
  64229. +
  64230. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64231. + This routine should NOT be called from guest-partition
  64232. + (i.e. guestId != NCSW_MASTER_ID)
  64233. +*//***************************************************************************/
  64234. +t_Error FM_ConfigDmaWriteBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds);
  64235. +
  64236. + /**************************************************************************//*
  64237. + @Function FM_ConfigDmaCommQThresholds
  64238. +
  64239. + @Description Calling this routine changes the internal driver data base
  64240. + from its default configuration of DMA command queue threshold
  64241. + assertEmergency: [DEFAULT_dmaCommQLow]
  64242. + clearEmergency: [DEFAULT_dmaCommQHigh]
  64243. +
  64244. + @Param[in] h_Fm A handle to an FM Module.
  64245. + @Param[in] p_FmDmaThresholds A structure of thresholds to define emergency behavior -
  64246. + When 'assertEmergency' value is reached, emergency is asserted,
  64247. + then it is held until 'clearEmergency' value is reached..
  64248. +
  64249. + @Return E_OK on success; Error code otherwise.
  64250. +
  64251. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64252. + This routine should NOT be called from guest-partition
  64253. + (i.e. guestId != NCSW_MASTER_ID)
  64254. +*//***************************************************************************/
  64255. +t_Error FM_ConfigDmaCommQThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds);
  64256. +
  64257. +/**************************************************************************//*
  64258. + @Function FM_ConfigDmaReadBufThresholds
  64259. +
  64260. + @Description Calling this routine changes the internal driver data base
  64261. + from its default configuration of DMA read buffer threshold
  64262. + assertEmergency: [DEFAULT_dmaReadIntBufLow]
  64263. + clearEmergency: [DEFAULT_dmaReadIntBufHigh]
  64264. + This routine is only avaiable on old FM revisions (FMan v2).
  64265. +
  64266. + @Param[in] h_Fm A handle to an FM Module.
  64267. + @Param[in] p_FmDmaThresholds A structure of thresholds to define emergency behavior -
  64268. + When 'assertEmergency' value is reached, emergency is asserted,
  64269. + then it is held until 'clearEmergency' value is reached..
  64270. +
  64271. + @Return E_OK on success; Error code otherwise.
  64272. +
  64273. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64274. + This routine should NOT be called from guest-partition
  64275. + (i.e. guestId != NCSW_MASTER_ID)
  64276. +*//***************************************************************************/
  64277. +t_Error FM_ConfigDmaReadBufThresholds(t_Handle h_Fm, t_FmDmaThresholds *p_FmDmaThresholds);
  64278. +
  64279. +/**************************************************************************//*
  64280. + @Function FM_ConfigDmaWatchdog
  64281. +
  64282. + @Description Calling this routine changes the internal driver data base
  64283. + from its default watchdog configuration, which is disabled
  64284. + [DEFAULT_dmaWatchdog].
  64285. +
  64286. + @Param[in] h_Fm A handle to an FM Module.
  64287. + @Param[in] watchDogValue The selected new value - in microseconds.
  64288. +
  64289. + @Return E_OK on success; Error code otherwise.
  64290. +
  64291. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64292. + This routine should NOT be called from guest-partition
  64293. + (i.e. guestId != NCSW_MASTER_ID)
  64294. +*//***************************************************************************/
  64295. +t_Error FM_ConfigDmaWatchdog(t_Handle h_Fm, uint32_t watchDogValue);
  64296. +
  64297. +/** @} */ /* end of FM_advanced_init_grp group */
  64298. +/** @} */ /* end of FM_init_grp group */
  64299. +
  64300. +
  64301. +/**************************************************************************//**
  64302. + @Group FM_runtime_control_grp FM Runtime Control Unit
  64303. +
  64304. + @Description FM Runtime control unit API functions, definitions and enums.
  64305. + The FM driver provides a set of control routines.
  64306. + These routines may only be called after the module was fully
  64307. + initialized (both configuration and initialization routines were
  64308. + called). They are typically used to get information from hardware
  64309. + (status, counters/statistics, revision etc.), to modify a current
  64310. + state or to force/enable a required action. Run-time control may
  64311. + be called whenever necessary and as many times as needed.
  64312. + @{
  64313. +*//***************************************************************************/
  64314. +
  64315. +/**************************************************************************//**
  64316. + @Collection General FM defines.
  64317. +*//***************************************************************************/
  64318. +#define FM_MAX_NUM_OF_VALID_PORTS (FM_MAX_NUM_OF_OH_PORTS + \
  64319. + FM_MAX_NUM_OF_1G_RX_PORTS + \
  64320. + FM_MAX_NUM_OF_10G_RX_PORTS + \
  64321. + FM_MAX_NUM_OF_1G_TX_PORTS + \
  64322. + FM_MAX_NUM_OF_10G_TX_PORTS) /**< Number of available FM ports */
  64323. +/* @} */
  64324. +
  64325. +/**************************************************************************//*
  64326. + @Description A Structure for Port bandwidth requirement. Port is identified
  64327. + by type and relative id.
  64328. +*//***************************************************************************/
  64329. +typedef struct t_FmPortBandwidth {
  64330. + e_FmPortType type; /**< FM port type */
  64331. + uint8_t relativePortId; /**< Type relative port id */
  64332. + uint8_t bandwidth; /**< bandwidth - (in term of percents) */
  64333. +} t_FmPortBandwidth;
  64334. +
  64335. +/**************************************************************************//*
  64336. + @Description A Structure containing an array of Port bandwidth requirements.
  64337. + The user should state the ports requiring bandwidth in terms of
  64338. + percentage - i.e. all port's bandwidths in the array must add
  64339. + up to 100.
  64340. +*//***************************************************************************/
  64341. +typedef struct t_FmPortsBandwidthParams {
  64342. + uint8_t numOfPorts; /**< The number of relevant ports, which is the
  64343. + number of valid entries in the array below */
  64344. + t_FmPortBandwidth portsBandwidths[FM_MAX_NUM_OF_VALID_PORTS];
  64345. + /**< for each port, it's bandwidth (all port's
  64346. + bandwidths must add up to 100.*/
  64347. +} t_FmPortsBandwidthParams;
  64348. +
  64349. +/**************************************************************************//**
  64350. + @Description DMA Emergency control on MURAM
  64351. +*//***************************************************************************/
  64352. +typedef enum e_FmDmaMuramPort {
  64353. + e_FM_DMA_MURAM_PORT_WRITE, /**< MURAM write port */
  64354. + e_FM_DMA_MURAM_PORT_READ /**< MURAM read port */
  64355. +} e_FmDmaMuramPort;
  64356. +
  64357. +/**************************************************************************//**
  64358. + @Description Enum for defining FM counters
  64359. +*//***************************************************************************/
  64360. +typedef enum e_FmCounters {
  64361. + e_FM_COUNTERS_ENQ_TOTAL_FRAME = 0, /**< QMI total enqueued frames counter */
  64362. + e_FM_COUNTERS_DEQ_TOTAL_FRAME, /**< QMI total dequeued frames counter */
  64363. + e_FM_COUNTERS_DEQ_0, /**< QMI 0 frames from QMan counter */
  64364. + e_FM_COUNTERS_DEQ_1, /**< QMI 1 frames from QMan counter */
  64365. + e_FM_COUNTERS_DEQ_2, /**< QMI 2 frames from QMan counter */
  64366. + e_FM_COUNTERS_DEQ_3, /**< QMI 3 frames from QMan counter */
  64367. + e_FM_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI dequeue from default queue counter */
  64368. + e_FM_COUNTERS_DEQ_FROM_CONTEXT, /**< QMI dequeue from FQ context counter */
  64369. + e_FM_COUNTERS_DEQ_FROM_FD, /**< QMI dequeue from FD command field counter */
  64370. + e_FM_COUNTERS_DEQ_CONFIRM /**< QMI dequeue confirm counter */
  64371. +} e_FmCounters;
  64372. +
  64373. +/**************************************************************************//**
  64374. + @Description A Structure for returning FM revision information
  64375. +*//***************************************************************************/
  64376. +typedef struct t_FmRevisionInfo {
  64377. + uint8_t majorRev; /**< Major revision */
  64378. + uint8_t minorRev; /**< Minor revision */
  64379. +} t_FmRevisionInfo;
  64380. +
  64381. +/**************************************************************************//**
  64382. + @Description A Structure for returning FM ctrl code revision information
  64383. +*//***************************************************************************/
  64384. +typedef struct t_FmCtrlCodeRevisionInfo {
  64385. + uint16_t packageRev; /**< Package revision */
  64386. + uint8_t majorRev; /**< Major revision */
  64387. + uint8_t minorRev; /**< Minor revision */
  64388. +} t_FmCtrlCodeRevisionInfo;
  64389. +
  64390. +/**************************************************************************//**
  64391. + @Description A Structure for defining DMA status
  64392. +*//***************************************************************************/
  64393. +typedef struct t_FmDmaStatus {
  64394. + bool cmqNotEmpty; /**< Command queue is not empty */
  64395. + bool busError; /**< Bus error occurred */
  64396. + bool readBufEccError; /**< Double ECC error on buffer Read (Valid for FM rev < 6)*/
  64397. + bool writeBufEccSysError; /**< Double ECC error on buffer write from system side (Valid for FM rev < 6)*/
  64398. + bool writeBufEccFmError; /**< Double ECC error on buffer write from FM side (Valid for FM rev < 6) */
  64399. + bool singlePortEccError; /**< Single Port ECC error from FM side (Valid for FM rev >= 6)*/
  64400. +} t_FmDmaStatus;
  64401. +
  64402. +/**************************************************************************//**
  64403. + @Description A Structure for obtaining FM controller monitor values
  64404. +*//***************************************************************************/
  64405. +typedef struct t_FmCtrlMon {
  64406. + uint8_t percentCnt[2]; /**< Percentage value */
  64407. +} t_FmCtrlMon;
  64408. +
  64409. +
  64410. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  64411. +/**************************************************************************//**
  64412. + @Function FM_DumpRegs
  64413. +
  64414. + @Description Dumps all FM registers
  64415. +
  64416. + @Param[in] h_Fm A handle to an FM Module.
  64417. +
  64418. + @Return E_OK on success;
  64419. +
  64420. + @Cautions Allowed only following FM_Init().
  64421. +*//***************************************************************************/
  64422. +t_Error FM_DumpRegs(t_Handle h_Fm);
  64423. +#endif /* (defined(DEBUG_ERRORS) && ... */
  64424. +
  64425. +/**************************************************************************//**
  64426. + @Function FM_SetException
  64427. +
  64428. + @Description Calling this routine enables/disables the specified exception.
  64429. +
  64430. + @Param[in] h_Fm A handle to an FM Module.
  64431. + @Param[in] exception The exception to be selected.
  64432. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  64433. +
  64434. + @Return E_OK on success; Error code otherwise.
  64435. +
  64436. + @Cautions Allowed only following FM_Init().
  64437. + This routine should NOT be called from guest-partition
  64438. + (i.e. guestId != NCSW_MASTER_ID)
  64439. +*//***************************************************************************/
  64440. +t_Error FM_SetException(t_Handle h_Fm, e_FmExceptions exception, bool enable);
  64441. +
  64442. +/**************************************************************************//**
  64443. + @Function FM_EnableRamsEcc
  64444. +
  64445. + @Description Enables ECC mechanism for all the different FM RAM's; E.g. IRAM,
  64446. + MURAM, Parser, Keygen, Policer, etc.
  64447. + Note:
  64448. + If FM_ConfigExternalEccRamsEnable was called to enable external
  64449. + setting of ECC, this routine effects IRAM ECC only.
  64450. + This routine is also called by the driver if an ECC exception is
  64451. + enabled.
  64452. +
  64453. + @Param[in] h_Fm A handle to an FM Module.
  64454. +
  64455. + @Return E_OK on success; Error code otherwise.
  64456. +
  64457. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64458. + This routine should NOT be called from guest-partition
  64459. + (i.e. guestId != NCSW_MASTER_ID)
  64460. +*//***************************************************************************/
  64461. +t_Error FM_EnableRamsEcc(t_Handle h_Fm);
  64462. +
  64463. +/**************************************************************************//**
  64464. + @Function FM_DisableRamsEcc
  64465. +
  64466. + @Description Disables ECC mechanism for all the different FM RAM's; E.g. IRAM,
  64467. + MURAM, Parser, Keygen, Policer, etc.
  64468. + Note:
  64469. + If FM_ConfigExternalEccRamsEnable was called to enable external
  64470. + setting of ECC, this routine effects IRAM ECC only.
  64471. + In opposed to FM_EnableRamsEcc, this routine must be called
  64472. + explicitly to disable all Rams ECC.
  64473. +
  64474. + @Param[in] h_Fm A handle to an FM Module.
  64475. +
  64476. + @Return E_OK on success; Error code otherwise.
  64477. +
  64478. + @Cautions Allowed only following FM_Config() and before FM_Init().
  64479. + This routine should NOT be called from guest-partition
  64480. + (i.e. guestId != NCSW_MASTER_ID)
  64481. +*//***************************************************************************/
  64482. +t_Error FM_DisableRamsEcc(t_Handle h_Fm);
  64483. +
  64484. +/**************************************************************************//**
  64485. + @Function FM_GetRevision
  64486. +
  64487. + @Description Returns the FM revision
  64488. +
  64489. + @Param[in] h_Fm A handle to an FM Module.
  64490. + @Param[out] p_FmRevisionInfo A structure of revision information parameters.
  64491. +
  64492. + @Return E_OK on success; Error code otherwise.
  64493. +
  64494. + @Cautions Allowed only following FM_Init().
  64495. +*//***************************************************************************/
  64496. +t_Error FM_GetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo);
  64497. +
  64498. +/**************************************************************************//**
  64499. + @Function FM_GetFmanCtrlCodeRevision
  64500. +
  64501. + @Description Returns the Fman controller code revision
  64502. +
  64503. + @Param[in] h_Fm A handle to an FM Module.
  64504. + @Param[out] p_RevisionInfo A structure of revision information parameters.
  64505. +
  64506. + @Return E_OK on success; Error code otherwise.
  64507. +
  64508. + @Cautions Allowed only following FM_Init().
  64509. +*//***************************************************************************/
  64510. +t_Error FM_GetFmanCtrlCodeRevision(t_Handle h_Fm, t_FmCtrlCodeRevisionInfo *p_RevisionInfo);
  64511. +
  64512. +/**************************************************************************//**
  64513. + @Function FM_GetCounter
  64514. +
  64515. + @Description Reads one of the FM counters.
  64516. +
  64517. + @Param[in] h_Fm A handle to an FM Module.
  64518. + @Param[in] counter The requested counter.
  64519. +
  64520. + @Return Counter's current value.
  64521. +
  64522. + @Cautions Allowed only following FM_Init().
  64523. + Note that it is user's responsibility to call this routine only
  64524. + for enabled counters, and there will be no indication if a
  64525. + disabled counter is accessed.
  64526. +*//***************************************************************************/
  64527. +uint32_t FM_GetCounter(t_Handle h_Fm, e_FmCounters counter);
  64528. +
  64529. +/**************************************************************************//**
  64530. + @Function FM_ModifyCounter
  64531. +
  64532. + @Description Sets a value to an enabled counter. Use "0" to reset the counter.
  64533. +
  64534. + @Param[in] h_Fm A handle to an FM Module.
  64535. + @Param[in] counter The requested counter.
  64536. + @Param[in] val The requested value to be written into the counter.
  64537. +
  64538. + @Return E_OK on success; Error code otherwise.
  64539. +
  64540. + @Cautions Allowed only following FM_Init().
  64541. + This routine should NOT be called from guest-partition
  64542. + (i.e. guestId != NCSW_MASTER_ID)
  64543. +*//***************************************************************************/
  64544. +t_Error FM_ModifyCounter(t_Handle h_Fm, e_FmCounters counter, uint32_t val);
  64545. +
  64546. +/**************************************************************************//**
  64547. + @Function FM_Resume
  64548. +
  64549. + @Description Release FM after halt FM command or after unrecoverable ECC error.
  64550. +
  64551. + @Param[in] h_Fm A handle to an FM Module.
  64552. +
  64553. + @Return E_OK on success; Error code otherwise.
  64554. +
  64555. + @Cautions Allowed only following FM_Init().
  64556. + This routine should NOT be called from guest-partition
  64557. + (i.e. guestId != NCSW_MASTER_ID)
  64558. +*//***************************************************************************/
  64559. +void FM_Resume(t_Handle h_Fm);
  64560. +
  64561. +/**************************************************************************//**
  64562. + @Function FM_SetDmaEmergency
  64563. +
  64564. + @Description Manual emergency set
  64565. +
  64566. + @Param[in] h_Fm A handle to an FM Module.
  64567. + @Param[in] muramPort MURAM direction select.
  64568. + @Param[in] enable TRUE to manually enable emergency, FALSE to disable.
  64569. +
  64570. + @Return None.
  64571. +
  64572. + @Cautions Allowed only following FM_Init().
  64573. + This routine should NOT be called from guest-partition
  64574. + (i.e. guestId != NCSW_MASTER_ID)
  64575. +*//***************************************************************************/
  64576. +void FM_SetDmaEmergency(t_Handle h_Fm, e_FmDmaMuramPort muramPort, bool enable);
  64577. +
  64578. +/**************************************************************************//**
  64579. + @Function FM_SetDmaExtBusPri
  64580. +
  64581. + @Description Set the DMA external bus priority
  64582. +
  64583. + @Param[in] h_Fm A handle to an FM Module.
  64584. + @Param[in] pri External bus priority select
  64585. +
  64586. + @Return None.
  64587. +
  64588. + @Cautions Allowed only following FM_Init().
  64589. + This routine should NOT be called from guest-partition
  64590. + (i.e. guestId != NCSW_MASTER_ID)
  64591. +*//***************************************************************************/
  64592. +void FM_SetDmaExtBusPri(t_Handle h_Fm, e_FmDmaExtBusPri pri);
  64593. +
  64594. +/**************************************************************************//**
  64595. + @Function FM_GetDmaStatus
  64596. +
  64597. + @Description Reads the DMA current status
  64598. +
  64599. + @Param[in] h_Fm A handle to an FM Module.
  64600. + @Param[out] p_FmDmaStatus A structure of DMA status parameters.
  64601. +
  64602. + @Cautions Allowed only following FM_Init().
  64603. +*//***************************************************************************/
  64604. +void FM_GetDmaStatus(t_Handle h_Fm, t_FmDmaStatus *p_FmDmaStatus);
  64605. +
  64606. +/**************************************************************************//**
  64607. + @Function FM_ErrorIsr
  64608. +
  64609. + @Description FM interrupt-service-routine for errors.
  64610. +
  64611. + @Param[in] h_Fm A handle to an FM Module.
  64612. +
  64613. + @Return E_OK on success; E_EMPTY if no errors found in register, other
  64614. + error code otherwise.
  64615. +
  64616. + @Cautions Allowed only following FM_Init().
  64617. + This routine should NOT be called from guest-partition
  64618. + (i.e. guestId != NCSW_MASTER_ID)
  64619. +*//***************************************************************************/
  64620. +t_Error FM_ErrorIsr(t_Handle h_Fm);
  64621. +
  64622. +/**************************************************************************//**
  64623. + @Function FM_EventIsr
  64624. +
  64625. + @Description FM interrupt-service-routine for normal events.
  64626. +
  64627. + @Param[in] h_Fm A handle to an FM Module.
  64628. +
  64629. + @Cautions Allowed only following FM_Init().
  64630. + This routine should NOT be called from guest-partition
  64631. + (i.e. guestId != NCSW_MASTER_ID)
  64632. +*//***************************************************************************/
  64633. +void FM_EventIsr(t_Handle h_Fm);
  64634. +
  64635. +/**************************************************************************//**
  64636. + @Function FM_GetSpecialOperationCoding
  64637. +
  64638. + @Description Return a specific coding according to the input mask.
  64639. +
  64640. + @Param[in] h_Fm A handle to an FM Module.
  64641. + @Param[in] spOper special operation mask.
  64642. + @Param[out] p_SpOperCoding special operation code.
  64643. +
  64644. + @Return E_OK on success; Error code otherwise.
  64645. +
  64646. + @Cautions Allowed only following FM_Init().
  64647. +*//***************************************************************************/
  64648. +t_Error FM_GetSpecialOperationCoding(t_Handle h_Fm,
  64649. + fmSpecialOperations_t spOper,
  64650. + uint8_t *p_SpOperCoding);
  64651. +
  64652. +/**************************************************************************//**
  64653. + @Function FM_CtrlMonStart
  64654. +
  64655. + @Description Start monitoring utilization of all available FM controllers.
  64656. +
  64657. + In order to obtain FM controllers utilization the following sequence
  64658. + should be used:
  64659. + -# FM_CtrlMonStart()
  64660. + -# FM_CtrlMonStop()
  64661. + -# FM_CtrlMonGetCounters() - issued for each FM controller
  64662. +
  64663. + @Param[in] h_Fm A handle to an FM Module.
  64664. +
  64665. + @Return E_OK on success; Error code otherwise.
  64666. +
  64667. + @Cautions Allowed only following FM_Init().
  64668. + This routine should NOT be called from guest-partition
  64669. + (i.e. guestId != NCSW_MASTER_ID).
  64670. +*//***************************************************************************/
  64671. +t_Error FM_CtrlMonStart(t_Handle h_Fm);
  64672. +
  64673. +/**************************************************************************//**
  64674. + @Function FM_CtrlMonStop
  64675. +
  64676. + @Description Stop monitoring utilization of all available FM controllers.
  64677. +
  64678. + In order to obtain FM controllers utilization the following sequence
  64679. + should be used:
  64680. + -# FM_CtrlMonStart()
  64681. + -# FM_CtrlMonStop()
  64682. + -# FM_CtrlMonGetCounters() - issued for each FM controller
  64683. +
  64684. + @Param[in] h_Fm A handle to an FM Module.
  64685. +
  64686. + @Return E_OK on success; Error code otherwise.
  64687. +
  64688. + @Cautions Allowed only following FM_Init().
  64689. + This routine should NOT be called from guest-partition
  64690. + (i.e. guestId != NCSW_MASTER_ID).
  64691. +*//***************************************************************************/
  64692. +t_Error FM_CtrlMonStop(t_Handle h_Fm);
  64693. +
  64694. +/**************************************************************************//**
  64695. + @Function FM_CtrlMonGetCounters
  64696. +
  64697. + @Description Obtain FM controller utilization parameters.
  64698. +
  64699. + In order to obtain FM controllers utilization the following sequence
  64700. + should be used:
  64701. + -# FM_CtrlMonStart()
  64702. + -# FM_CtrlMonStop()
  64703. + -# FM_CtrlMonGetCounters() - issued for each FM controller
  64704. +
  64705. + @Param[in] h_Fm A handle to an FM Module.
  64706. + @Param[in] fmCtrlIndex FM Controller index for that utilization results
  64707. + are requested.
  64708. + @Param[in] p_Mon Pointer to utilization results structure.
  64709. +
  64710. + @Return E_OK on success; Error code otherwise.
  64711. +
  64712. + @Cautions Allowed only following FM_Init().
  64713. + This routine should NOT be called from guest-partition
  64714. + (i.e. guestId != NCSW_MASTER_ID).
  64715. +*//***************************************************************************/
  64716. +t_Error FM_CtrlMonGetCounters(t_Handle h_Fm, uint8_t fmCtrlIndex, t_FmCtrlMon *p_Mon);
  64717. +
  64718. +
  64719. +/**************************************************************************//*
  64720. + @Function FM_ForceIntr
  64721. +
  64722. + @Description Causes an interrupt event on the requested source.
  64723. +
  64724. + @Param[in] h_Fm A handle to an FM Module.
  64725. + @Param[in] exception An exception to be forced.
  64726. +
  64727. + @Return E_OK on success; Error code if the exception is not enabled,
  64728. + or is not able to create interrupt.
  64729. +
  64730. + @Cautions Allowed only following FM_Init().
  64731. + This routine should NOT be called from guest-partition
  64732. + (i.e. guestId != NCSW_MASTER_ID)
  64733. +*//***************************************************************************/
  64734. +t_Error FM_ForceIntr (t_Handle h_Fm, e_FmExceptions exception);
  64735. +
  64736. +/**************************************************************************//*
  64737. + @Function FM_SetPortsBandwidth
  64738. +
  64739. + @Description Sets relative weights between ports when accessing common resources.
  64740. +
  64741. + @Param[in] h_Fm A handle to an FM Module.
  64742. + @Param[in] p_PortsBandwidth A structure of ports bandwidths in percentage, i.e.
  64743. + total must equal 100.
  64744. +
  64745. + @Return E_OK on success; Error code otherwise.
  64746. +
  64747. + @Cautions Allowed only following FM_Init().
  64748. + This routine should NOT be called from guest-partition
  64749. + (i.e. guestId != NCSW_MASTER_ID)
  64750. +*//***************************************************************************/
  64751. +t_Error FM_SetPortsBandwidth(t_Handle h_Fm, t_FmPortsBandwidthParams *p_PortsBandwidth);
  64752. +
  64753. +/**************************************************************************//*
  64754. + @Function FM_GetMuramHandle
  64755. +
  64756. + @Description Gets the corresponding MURAM handle
  64757. +
  64758. + @Param[in] h_Fm A handle to an FM Module.
  64759. +
  64760. + @Return MURAM handle; NULL otherwise.
  64761. +
  64762. + @Cautions Allowed only following FM_Init().
  64763. + This routine should NOT be called from guest-partition
  64764. + (i.e. guestId != NCSW_MASTER_ID)
  64765. +*//***************************************************************************/
  64766. +t_Handle FM_GetMuramHandle(t_Handle h_Fm);
  64767. +
  64768. +/** @} */ /* end of FM_runtime_control_grp group */
  64769. +/** @} */ /* end of FM_lib_grp group */
  64770. +/** @} */ /* end of FM_grp group */
  64771. +
  64772. +
  64773. +#ifdef NCSW_BACKWARD_COMPATIBLE_API
  64774. +typedef t_FmFirmwareParams t_FmPcdFirmwareParams;
  64775. +typedef t_FmBufferPrefixContent t_FmPortBufferPrefixContent;
  64776. +typedef t_FmExtPoolParams t_FmPortExtPoolParams;
  64777. +typedef t_FmExtPools t_FmPortExtPools;
  64778. +typedef t_FmBackupBmPools t_FmPortBackupBmPools;
  64779. +typedef t_FmBufPoolDepletion t_FmPortBufPoolDepletion;
  64780. +typedef e_FmDmaSwapOption e_FmPortDmaSwapOption;
  64781. +typedef e_FmDmaCacheOption e_FmPortDmaCacheOption;
  64782. +
  64783. +#define FM_CONTEXTA_GET_OVVERIDE FM_CONTEXTA_GET_OVERRIDE
  64784. +#define FM_CONTEXTA_SET_OVVERIDE FM_CONTEXTA_SET_OVERRIDE
  64785. +
  64786. +#define e_FM_EX_BMI_PIPELINE_ECC e_FM_EX_BMI_STORAGE_PROFILE_ECC
  64787. +#define e_FM_PORT_DMA_NO_SWP e_FM_DMA_NO_SWP
  64788. +#define e_FM_PORT_DMA_SWP_PPC_LE e_FM_DMA_SWP_PPC_LE
  64789. +#define e_FM_PORT_DMA_SWP_BE e_FM_DMA_SWP_BE
  64790. +#define e_FM_PORT_DMA_NO_STASH e_FM_DMA_NO_STASH
  64791. +#define e_FM_PORT_DMA_STASH e_FM_DMA_STASH
  64792. +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
  64793. +
  64794. +
  64795. +#endif /* __FM_EXT */
  64796. --- /dev/null
  64797. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_mac_ext.h
  64798. @@ -0,0 +1,846 @@
  64799. +/*
  64800. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  64801. + *
  64802. + * Redistribution and use in source and binary forms, with or without
  64803. + * modification, are permitted provided that the following conditions are met:
  64804. + * * Redistributions of source code must retain the above copyright
  64805. + * notice, this list of conditions and the following disclaimer.
  64806. + * * Redistributions in binary form must reproduce the above copyright
  64807. + * notice, this list of conditions and the following disclaimer in the
  64808. + * documentation and/or other materials provided with the distribution.
  64809. + * * Neither the name of Freescale Semiconductor nor the
  64810. + * names of its contributors may be used to endorse or promote products
  64811. + * derived from this software without specific prior written permission.
  64812. + *
  64813. + *
  64814. + * ALTERNATIVELY, this software may be distributed under the terms of the
  64815. + * GNU General Public License ("GPL") as published by the Free Software
  64816. + * Foundation, either version 2 of that License or (at your option) any
  64817. + * later version.
  64818. + *
  64819. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  64820. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  64821. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  64822. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  64823. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  64824. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  64825. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  64826. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  64827. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  64828. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  64829. + */
  64830. +
  64831. +
  64832. +/**************************************************************************//**
  64833. + @File fm_mac_ext.h
  64834. +
  64835. + @Description FM MAC ...
  64836. +*//***************************************************************************/
  64837. +#ifndef __FM_MAC_EXT_H
  64838. +#define __FM_MAC_EXT_H
  64839. +
  64840. +#include "std_ext.h"
  64841. +#include "enet_ext.h"
  64842. +
  64843. +
  64844. +/**************************************************************************//**
  64845. +
  64846. + @Group FM_grp Frame Manager API
  64847. +
  64848. + @Description FM API functions, definitions and enums
  64849. +
  64850. + @{
  64851. +*//***************************************************************************/
  64852. +
  64853. +/**************************************************************************//**
  64854. + @Group FM_mac_grp FM MAC
  64855. +
  64856. + @Description FM MAC API functions, definitions and enums
  64857. +
  64858. + @{
  64859. +*//***************************************************************************/
  64860. +
  64861. +#define FM_MAC_NO_PFC 0xff
  64862. +
  64863. +
  64864. +/**************************************************************************//**
  64865. + @Description FM MAC Exceptions
  64866. +*//***************************************************************************/
  64867. +typedef enum e_FmMacExceptions {
  64868. + e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO = 0 /**< 10GEC MDIO scan event interrupt */
  64869. + ,e_FM_MAC_EX_10G_MDIO_CMD_CMPL /**< 10GEC MDIO command completion interrupt */
  64870. + ,e_FM_MAC_EX_10G_REM_FAULT /**< 10GEC, mEMAC Remote fault interrupt */
  64871. + ,e_FM_MAC_EX_10G_LOC_FAULT /**< 10GEC, mEMAC Local fault interrupt */
  64872. + ,e_FM_MAC_EX_10G_1TX_ECC_ER /**< 10GEC, mEMAC Transmit frame ECC error interrupt */
  64873. + ,e_FM_MAC_EX_10G_TX_FIFO_UNFL /**< 10GEC, mEMAC Transmit FIFO underflow interrupt */
  64874. + ,e_FM_MAC_EX_10G_TX_FIFO_OVFL /**< 10GEC, mEMAC Transmit FIFO overflow interrupt */
  64875. + ,e_FM_MAC_EX_10G_TX_ER /**< 10GEC Transmit frame error interrupt */
  64876. + ,e_FM_MAC_EX_10G_RX_FIFO_OVFL /**< 10GEC, mEMAC Receive FIFO overflow interrupt */
  64877. + ,e_FM_MAC_EX_10G_RX_ECC_ER /**< 10GEC, mEMAC Receive frame ECC error interrupt */
  64878. + ,e_FM_MAC_EX_10G_RX_JAB_FRM /**< 10GEC Receive jabber frame interrupt */
  64879. + ,e_FM_MAC_EX_10G_RX_OVRSZ_FRM /**< 10GEC Receive oversized frame interrupt */
  64880. + ,e_FM_MAC_EX_10G_RX_RUNT_FRM /**< 10GEC Receive runt frame interrupt */
  64881. + ,e_FM_MAC_EX_10G_RX_FRAG_FRM /**< 10GEC Receive fragment frame interrupt */
  64882. + ,e_FM_MAC_EX_10G_RX_LEN_ER /**< 10GEC Receive payload length error interrupt */
  64883. + ,e_FM_MAC_EX_10G_RX_CRC_ER /**< 10GEC Receive CRC error interrupt */
  64884. + ,e_FM_MAC_EX_10G_RX_ALIGN_ER /**< 10GEC Receive alignment error interrupt */
  64885. + ,e_FM_MAC_EX_1G_BAB_RX /**< dTSEC Babbling receive error */
  64886. + ,e_FM_MAC_EX_1G_RX_CTL /**< dTSEC Receive control (pause frame) interrupt */
  64887. + ,e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET /**< dTSEC Graceful transmit stop complete */
  64888. + ,e_FM_MAC_EX_1G_BAB_TX /**< dTSEC Babbling transmit error */
  64889. + ,e_FM_MAC_EX_1G_TX_CTL /**< dTSEC Transmit control (pause frame) interrupt */
  64890. + ,e_FM_MAC_EX_1G_TX_ERR /**< dTSEC Transmit error */
  64891. + ,e_FM_MAC_EX_1G_LATE_COL /**< dTSEC Late collision */
  64892. + ,e_FM_MAC_EX_1G_COL_RET_LMT /**< dTSEC Collision retry limit */
  64893. + ,e_FM_MAC_EX_1G_TX_FIFO_UNDRN /**< dTSEC Transmit FIFO underrun */
  64894. + ,e_FM_MAC_EX_1G_MAG_PCKT /**< dTSEC Magic Packet detection */
  64895. + ,e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET /**< dTSEC MII management read completion */
  64896. + ,e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET /**< dTSEC MII management write completion */
  64897. + ,e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET /**< dTSEC Graceful receive stop complete */
  64898. + ,e_FM_MAC_EX_1G_TX_DATA_ERR /**< dTSEC Internal data error on transmit */
  64899. + ,e_FM_MAC_EX_1G_RX_DATA_ERR /**< dTSEC Internal data error on receive */
  64900. + ,e_FM_MAC_EX_1G_1588_TS_RX_ERR /**< dTSEC Time-Stamp Receive Error */
  64901. + ,e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL /**< dTSEC MIB counter overflow */
  64902. + ,e_FM_MAC_EX_TS_FIFO_ECC_ERR /**< mEMAC Time-stamp FIFO ECC error interrupt;
  64903. + not supported on T4240/B4860 rev1 chips */
  64904. + ,e_FM_MAC_EX_MAGIC_PACKET_INDICATION = e_FM_MAC_EX_1G_MAG_PCKT
  64905. + /**< mEMAC Magic Packet Indication Interrupt */
  64906. +} e_FmMacExceptions;
  64907. +
  64908. +/**************************************************************************//**
  64909. + @Description TM MAC statistics level
  64910. +*//***************************************************************************/
  64911. +typedef enum e_FmMacStatisticsLevel {
  64912. + e_FM_MAC_NONE_STATISTICS = 0, /**< No statistics */
  64913. + e_FM_MAC_PARTIAL_STATISTICS, /**< Only error counters are available; Optimized for performance */
  64914. + e_FM_MAC_FULL_STATISTICS /**< All counters available; Not optimized for performance */
  64915. +} e_FmMacStatisticsLevel;
  64916. +
  64917. +
  64918. +#if (DPAA_VERSION >= 11)
  64919. +/**************************************************************************//**
  64920. + @Description Priority Flow Control Parameters
  64921. +*//***************************************************************************/
  64922. +typedef struct t_FmMacPfcParams {
  64923. + bool pfcEnable; /**< Enable/Disable PFC */
  64924. +
  64925. + uint16_t pauseQuanta[FM_MAX_NUM_OF_PFC_PRIORITIES]; /**< Pause Quanta per priority to be sent in a pause frame. Each quanta represents a 512 bit-times*/
  64926. +
  64927. + uint16_t pauseThresholdQuanta[FM_MAX_NUM_OF_PFC_PRIORITIES];/**< Pause threshold per priority, when timer passes this threshold time a PFC frames is sent again if the port is still congested or BM pool in depletion*/
  64928. +
  64929. +
  64930. +} t_FmMacPfcParams;
  64931. +#endif /* (DPAA_VERSION >= 11) */
  64932. +
  64933. +/**************************************************************************//**
  64934. + @Function t_FmMacExceptionCallback
  64935. +
  64936. + @Description Fm Mac Exception Callback from FM MAC to the user
  64937. +
  64938. + @Param[in] h_App - Handle to the upper layer handler
  64939. +
  64940. + @Param[in] exceptions - The exception that occurred
  64941. +
  64942. + @Return void.
  64943. +*//***************************************************************************/
  64944. +typedef void (t_FmMacExceptionCallback)(t_Handle h_App, e_FmMacExceptions exceptions);
  64945. +
  64946. +
  64947. +/**************************************************************************//**
  64948. + @Description TM MAC statistics rfc3635
  64949. +*//***************************************************************************/
  64950. +typedef struct t_FmMacStatistics {
  64951. +/* RMON */
  64952. + uint64_t eStatPkts64; /**< r-10G tr-DT 64 byte frame counter */
  64953. + uint64_t eStatPkts65to127; /**< r-10G 65 to 127 byte frame counter */
  64954. + uint64_t eStatPkts128to255; /**< r-10G 128 to 255 byte frame counter */
  64955. + uint64_t eStatPkts256to511; /**< r-10G 256 to 511 byte frame counter */
  64956. + uint64_t eStatPkts512to1023; /**< r-10G 512 to 1023 byte frame counter */
  64957. + uint64_t eStatPkts1024to1518; /**< r-10G 1024 to 1518 byte frame counter */
  64958. + uint64_t eStatPkts1519to1522; /**< r-10G 1519 to 1522 byte good frame count */
  64959. +/* */
  64960. + uint64_t eStatFragments; /**< Total number of packets that were less than 64 octets long with a wrong CRC.*/
  64961. + uint64_t eStatJabbers; /**< Total number of packets longer than valid maximum length octets */
  64962. + uint64_t eStatsDropEvents; /**< number of dropped packets due to internal errors of the MAC Client (during receive). */
  64963. + uint64_t eStatCRCAlignErrors; /**< Incremented when frames of correct length but with CRC error are received.*/
  64964. + uint64_t eStatUndersizePkts; /**< Incremented for frames under 64 bytes with a valid FCS and otherwise well formed;
  64965. + This count does not include range length errors */
  64966. + uint64_t eStatOversizePkts; /**< Incremented for frames which exceed 1518 (non VLAN) or 1522 (VLAN) and contains
  64967. + a valid FCS and otherwise well formed */
  64968. +/* Pause */
  64969. + uint64_t teStatPause; /**< Pause MAC Control received */
  64970. + uint64_t reStatPause; /**< Pause MAC Control sent */
  64971. +/* MIB II */
  64972. + uint64_t ifInOctets; /**< Total number of byte received. */
  64973. + uint64_t ifInPkts; /**< Total number of packets received.*/
  64974. + uint64_t ifInUcastPkts; /**< Total number of unicast frame received;
  64975. + NOTE: this counter is not supported on dTSEC MAC */
  64976. + uint64_t ifInMcastPkts; /**< Total number of multicast frame received*/
  64977. + uint64_t ifInBcastPkts; /**< Total number of broadcast frame received */
  64978. + uint64_t ifInDiscards; /**< Frames received, but discarded due to problems within the MAC RX. */
  64979. + uint64_t ifInErrors; /**< Number of frames received with error:
  64980. + - FIFO Overflow Error
  64981. + - CRC Error
  64982. + - Frame Too Long Error
  64983. + - Alignment Error
  64984. + - The dedicated Error Code (0xfe, not a code error) was received */
  64985. + uint64_t ifOutOctets; /**< Total number of byte sent. */
  64986. + uint64_t ifOutPkts; /**< Total number of packets sent .*/
  64987. + uint64_t ifOutUcastPkts; /**< Total number of unicast frame sent;
  64988. + NOTE: this counter is not supported on dTSEC MAC */
  64989. + uint64_t ifOutMcastPkts; /**< Total number of multicast frame sent */
  64990. + uint64_t ifOutBcastPkts; /**< Total number of multicast frame sent */
  64991. + uint64_t ifOutDiscards; /**< Frames received, but discarded due to problems within the MAC TX N/A!.*/
  64992. + uint64_t ifOutErrors; /**< Number of frames transmitted with error:
  64993. + - FIFO Overflow Error
  64994. + - FIFO Underflow Error
  64995. + - Other */
  64996. +} t_FmMacStatistics;
  64997. +
  64998. +
  64999. +/**************************************************************************//**
  65000. + @Group FM_mac_init_grp FM MAC Initialization Unit
  65001. +
  65002. + @Description FM MAC Initialization Unit
  65003. +
  65004. + @{
  65005. +*//***************************************************************************/
  65006. +
  65007. +/**************************************************************************//**
  65008. + @Description FM MAC config input
  65009. +*//***************************************************************************/
  65010. +typedef struct t_FmMacParams {
  65011. + uintptr_t baseAddr; /**< Base of memory mapped FM MAC registers */
  65012. + t_EnetAddr addr; /**< MAC address of device; First octet is sent first */
  65013. + uint8_t macId; /**< MAC ID;
  65014. + numbering of dTSEC and 1G-mEMAC:
  65015. + 0 - FM_MAX_NUM_OF_1G_MACS;
  65016. + numbering of 10G-MAC (TGEC) and 10G-mEMAC:
  65017. + 0 - FM_MAX_NUM_OF_10G_MACS */
  65018. + e_EnetMode enetMode; /**< Ethernet operation mode (MAC-PHY interface and speed);
  65019. + Note that the speed should indicate the maximum rate that
  65020. + this MAC should support rather than the actual speed;
  65021. + i.e. user should use the FM_MAC_AdjustLink() routine to
  65022. + provide accurate speed;
  65023. + In case of mEMAC RGMII mode, the MAC is configured to RGMII
  65024. + automatic mode, where actual speed/duplex mode information
  65025. + is provided by PHY automatically in-band; FM_MAC_AdjustLink()
  65026. + function should be used to switch to manual RGMII speed/duplex mode
  65027. + configuration if RGMII PHY doesn't support in-band status signaling;
  65028. + In addition, in mEMAC, in case where user is using the higher MACs
  65029. + (i.e. the MACs that should support 10G), user should pass here
  65030. + speed=10000 even if the interface is not allowing that (e.g. SGMII). */
  65031. + t_Handle h_Fm; /**< A handle to the FM object this port related to */
  65032. + int mdioIrq; /**< MDIO exceptions interrupt source - not valid for all
  65033. + MACs; MUST be set to 'NO_IRQ' for MACs that don't have
  65034. + mdio-irq, or for polling */
  65035. + t_FmMacExceptionCallback *f_Event; /**< MDIO Events Callback Routine */
  65036. + t_FmMacExceptionCallback *f_Exception; /**< Exception Callback Routine */
  65037. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  65038. + be passed by the driver upon calling the above callbacks */
  65039. +} t_FmMacParams;
  65040. +
  65041. +
  65042. +/**************************************************************************//**
  65043. + @Function FM_MAC_Config
  65044. +
  65045. + @Description Creates descriptor for the FM MAC module.
  65046. +
  65047. + The routine returns a handle (descriptor) to the FM MAC object.
  65048. + This descriptor must be passed as first parameter to all other
  65049. + FM MAC function calls.
  65050. +
  65051. + No actual initialization or configuration of FM MAC hardware is
  65052. + done by this routine.
  65053. +
  65054. + @Param[in] p_FmMacParam - Pointer to data structure of parameters
  65055. +
  65056. + @Retval Handle to FM MAC object, or NULL for Failure.
  65057. +*//***************************************************************************/
  65058. +t_Handle FM_MAC_Config(t_FmMacParams *p_FmMacParam);
  65059. +
  65060. +/**************************************************************************//**
  65061. + @Function FM_MAC_Init
  65062. +
  65063. + @Description Initializes the FM MAC module
  65064. +
  65065. + @Param[in] h_FmMac - FM module descriptor
  65066. +
  65067. + @Return E_OK on success; Error code otherwise.
  65068. +*//***************************************************************************/
  65069. +t_Error FM_MAC_Init(t_Handle h_FmMac);
  65070. +
  65071. +/**************************************************************************//**
  65072. + @Function FM_Free
  65073. +
  65074. + @Description Frees all resources that were assigned to FM MAC module.
  65075. +
  65076. + Calling this routine invalidates the descriptor.
  65077. +
  65078. + @Param[in] h_FmMac - FM module descriptor
  65079. +
  65080. + @Return E_OK on success; Error code otherwise.
  65081. +*//***************************************************************************/
  65082. +t_Error FM_MAC_Free(t_Handle h_FmMac);
  65083. +
  65084. +
  65085. +/**************************************************************************//**
  65086. + @Group FM_mac_advanced_init_grp FM MAC Advanced Configuration Unit
  65087. +
  65088. + @Description Configuration functions used to change default values.
  65089. +
  65090. + @{
  65091. +*//***************************************************************************/
  65092. +
  65093. +/**************************************************************************//**
  65094. + @Function FM_MAC_ConfigResetOnInit
  65095. +
  65096. + @Description Tell the driver whether to reset the FM MAC before initialization or
  65097. + not. It changes the default configuration [DEFAULT_resetOnInit].
  65098. +
  65099. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65100. + @Param[in] enable When TRUE, FM will be reset before any initialization.
  65101. +
  65102. + @Return E_OK on success; Error code otherwise.
  65103. +
  65104. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65105. +*//***************************************************************************/
  65106. +t_Error FM_MAC_ConfigResetOnInit(t_Handle h_FmMac, bool enable);
  65107. +
  65108. +/**************************************************************************//**
  65109. + @Function FM_MAC_ConfigLoopback
  65110. +
  65111. + @Description Enable/Disable internal loopback mode
  65112. +
  65113. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65114. + @Param[in] enable TRUE to enable or FALSE to disable.
  65115. +
  65116. + @Return E_OK on success; Error code otherwise.
  65117. +
  65118. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65119. +*//***************************************************************************/
  65120. +t_Error FM_MAC_ConfigLoopback(t_Handle h_FmMac, bool enable);
  65121. +
  65122. +/**************************************************************************//**
  65123. + @Function FM_MAC_ConfigMaxFrameLength
  65124. +
  65125. + @Description Setup maximum Rx Frame Length (in 1G MAC, effects also Tx)
  65126. +
  65127. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65128. + @Param[in] newVal MAX Frame length
  65129. +
  65130. + @Return E_OK on success; Error code otherwise.
  65131. +
  65132. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65133. +*//***************************************************************************/
  65134. +t_Error FM_MAC_ConfigMaxFrameLength(t_Handle h_FmMac, uint16_t newVal);
  65135. +
  65136. +/**************************************************************************//**
  65137. + @Function FM_MAC_ConfigWan
  65138. +
  65139. + @Description ENABLE WAN mode in 10G-MAC
  65140. +
  65141. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65142. + @Param[in] enable TRUE to enable or FALSE to disable.
  65143. +
  65144. + @Return E_OK on success; Error code otherwise.
  65145. +
  65146. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65147. +*//***************************************************************************/
  65148. +t_Error FM_MAC_ConfigWan(t_Handle h_FmMac, bool enable);
  65149. +
  65150. +/**************************************************************************//**
  65151. + @Function FM_MAC_ConfigPadAndCrc
  65152. +
  65153. + @Description Config PAD and CRC mode
  65154. +
  65155. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65156. + @Param[in] enable TRUE to enable or FALSE to disable.
  65157. +
  65158. + @Return E_OK on success; Error code otherwise.
  65159. +
  65160. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65161. + Not supported on 10G-MAC (i.e. CRC & PAD are added automatically
  65162. + by HW); on mEMAC, this routine supports only PAD (i.e. CRC is
  65163. + added automatically by HW).
  65164. +*//***************************************************************************/
  65165. +t_Error FM_MAC_ConfigPadAndCrc(t_Handle h_FmMac, bool enable);
  65166. +
  65167. +/**************************************************************************//**
  65168. + @Function FM_MAC_ConfigHalfDuplex
  65169. +
  65170. + @Description Config Half Duplex Mode
  65171. +
  65172. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65173. + @Param[in] enable TRUE to enable or FALSE to disable.
  65174. +
  65175. + @Return E_OK on success; Error code otherwise.
  65176. +
  65177. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65178. +*//***************************************************************************/
  65179. +t_Error FM_MAC_ConfigHalfDuplex(t_Handle h_FmMac, bool enable);
  65180. +
  65181. +/**************************************************************************//**
  65182. + @Function FM_MAC_ConfigTbiPhyAddr
  65183. +
  65184. + @Description Configures the address of internal TBI PHY.
  65185. +
  65186. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65187. + @Param[in] newVal TBI PHY address (1-31).
  65188. +
  65189. + @Return E_OK on success; Error code otherwise.
  65190. +
  65191. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65192. +*//***************************************************************************/
  65193. +t_Error FM_MAC_ConfigTbiPhyAddr(t_Handle h_FmMac, uint8_t newVal);
  65194. +
  65195. +/**************************************************************************//**
  65196. + @Function FM_MAC_ConfigLengthCheck
  65197. +
  65198. + @Description Configure the frame length checking.
  65199. +
  65200. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65201. + @Param[in] enable TRUE to enable or FALSE to disable.
  65202. +
  65203. + @Return E_OK on success; Error code otherwise.
  65204. +
  65205. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65206. +*//***************************************************************************/
  65207. +t_Error FM_MAC_ConfigLengthCheck(t_Handle h_FmMac, bool enable);
  65208. +
  65209. +/**************************************************************************//**
  65210. + @Function FM_MAC_ConfigException
  65211. +
  65212. + @Description Change Exception selection from default
  65213. +
  65214. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65215. + @Param[in] ex Type of the desired exceptions
  65216. + @Param[in] enable TRUE to enable the specified exception, FALSE to disable it.
  65217. +
  65218. + @Return E_OK on success; Error code otherwise.
  65219. +
  65220. + @Cautions Allowed only following FM_MAC_Config() and before FM_MAC_Init().
  65221. +*//***************************************************************************/
  65222. +t_Error FM_MAC_ConfigException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable);
  65223. +
  65224. +#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  65225. +t_Error FM_MAC_ConfigSkipFman11Workaround (t_Handle h_FmMac);
  65226. +#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */
  65227. +/** @} */ /* end of FM_mac_advanced_init_grp group */
  65228. +/** @} */ /* end of FM_mac_init_grp group */
  65229. +
  65230. +
  65231. +/**************************************************************************//**
  65232. + @Group FM_mac_runtime_control_grp FM MAC Runtime Control Unit
  65233. +
  65234. + @Description FM MAC Runtime control unit API functions, definitions and enums.
  65235. +
  65236. + @{
  65237. +*//***************************************************************************/
  65238. +
  65239. +/**************************************************************************//**
  65240. + @Function FM_MAC_Enable
  65241. +
  65242. + @Description Enable the MAC
  65243. +
  65244. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65245. + @Param[in] mode Mode of operation (RX, TX, Both)
  65246. +
  65247. + @Return E_OK on success; Error code otherwise.
  65248. +
  65249. + @Cautions Allowed only following FM_MAC_Init().
  65250. +*//***************************************************************************/
  65251. +t_Error FM_MAC_Enable(t_Handle h_FmMac, e_CommMode mode);
  65252. +
  65253. +/**************************************************************************//**
  65254. + @Function FM_MAC_Disable
  65255. +
  65256. + @Description DISABLE the MAC
  65257. +
  65258. + @Param[in] h_FmMac A handle to a FM MAC Module.
  65259. + @Param[in] mode Define what part to Disable (RX, TX or BOTH)
  65260. +
  65261. + @Return E_OK on success; Error code otherwise.
  65262. +
  65263. + @Cautions Allowed only following FM_MAC_Init().
  65264. +*//***************************************************************************/
  65265. +t_Error FM_MAC_Disable(t_Handle h_FmMac, e_CommMode mode);
  65266. +
  65267. +/**************************************************************************//**
  65268. + @Function FM_MAC_Enable1588TimeStamp
  65269. +
  65270. + @Description Enables the TSU operation.
  65271. +
  65272. + @Param[in] h_Fm - Handle to the PTP as returned from the FM_MAC_PtpConfig.
  65273. +
  65274. + @Return E_OK on success; Error code otherwise.
  65275. +
  65276. + @Cautions Allowed only following FM_MAC_Init().
  65277. +*//***************************************************************************/
  65278. +t_Error FM_MAC_Enable1588TimeStamp(t_Handle h_Fm);
  65279. +
  65280. +/**************************************************************************//**
  65281. + @Function FM_MAC_Disable1588TimeStamp
  65282. +
  65283. + @Description Disables the TSU operation.
  65284. +
  65285. + @Param[in] h_Fm - Handle to the PTP as returned from the FM_MAC_PtpConfig.
  65286. +
  65287. + @Return E_OK on success; Error code otherwise.
  65288. +
  65289. + @Cautions Allowed only following FM_MAC_Init().
  65290. +*//***************************************************************************/
  65291. +t_Error FM_MAC_Disable1588TimeStamp(t_Handle h_Fm);
  65292. +
  65293. +/**************************************************************************//**
  65294. + @Function FM_MAC_SetTxAutoPauseFrames
  65295. +
  65296. + @Description Enable/Disable transmission of Pause-Frames.
  65297. + The routine changes the default configuration [DEFAULT_TX_PAUSE_TIME].
  65298. +
  65299. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65300. + @Param[in] pauseTime - Pause quanta value used with transmitted pause frames.
  65301. + Each quanta represents a 512 bit-times; Note that '0'
  65302. + as an input here will be used as disabling the
  65303. + transmission of the pause-frames.
  65304. +
  65305. + @Return E_OK on success; Error code otherwise.
  65306. +
  65307. + @Cautions Allowed only following FM_MAC_Init().
  65308. +*//***************************************************************************/
  65309. +t_Error FM_MAC_SetTxAutoPauseFrames(t_Handle h_FmMac,
  65310. + uint16_t pauseTime);
  65311. +
  65312. + /**************************************************************************//**
  65313. + @Function FM_MAC_SetTxPauseFrames
  65314. +
  65315. + @Description Enable/Disable transmission of Pause-Frames.
  65316. + The routine changes the default configuration:
  65317. + pause-time - [DEFAULT_TX_PAUSE_TIME]
  65318. + threshold-time - [0]
  65319. +
  65320. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65321. + @Param[in] priority - the PFC class of service; use 'FM_MAC_NO_PFC'
  65322. + to indicate legacy pause support (i.e. no PFC).
  65323. + @Param[in] pauseTime - Pause quanta value used with transmitted pause frames.
  65324. + Each quanta represents a 512 bit-times;
  65325. + Note that '0' as an input here will be used as disabling the
  65326. + transmission of the pause-frames.
  65327. + @Param[in] threshTime - Pause Threshold equanta value used by the MAC to retransmit pause frame.
  65328. + if the situation causing a pause frame to be sent didn't finish when the timer
  65329. + reached the threshold quanta, the MAC will retransmit the pause frame.
  65330. + Each quanta represents a 512 bit-times.
  65331. +
  65332. + @Return E_OK on success; Error code otherwise.
  65333. +
  65334. + @Cautions Allowed only following FM_MAC_Init().
  65335. + In order for PFC to work properly the user must configure
  65336. + TNUM-aging in the tx-port it is recommended that pre-fetch and
  65337. + rate limit in the tx port should be disabled;
  65338. + PFC is supported only on new mEMAC; i.e. in MACs that don't have
  65339. + PFC support (10G-MAC and dTSEC), user should use 'FM_MAC_NO_PFC'
  65340. + in the 'priority' field.
  65341. +*//***************************************************************************/
  65342. +t_Error FM_MAC_SetTxPauseFrames(t_Handle h_FmMac,
  65343. + uint8_t priority,
  65344. + uint16_t pauseTime,
  65345. + uint16_t threshTime);
  65346. +
  65347. +/**************************************************************************//**
  65348. + @Function FM_MAC_SetRxIgnorePauseFrames
  65349. +
  65350. + @Description Enable/Disable ignoring of Pause-Frames.
  65351. +
  65352. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65353. + @Param[in] en - boolean indicates whether to ignore the incoming pause
  65354. + frames or not.
  65355. +
  65356. + @Return E_OK on success; Error code otherwise.
  65357. +
  65358. + @Cautions Allowed only following FM_MAC_Init().
  65359. +*//***************************************************************************/
  65360. +t_Error FM_MAC_SetRxIgnorePauseFrames(t_Handle h_FmMac, bool en);
  65361. +
  65362. +/**************************************************************************//**
  65363. + @Function FM_MAC_SetWakeOnLan
  65364. +
  65365. + @Description Enable/Disable Wake On Lan support
  65366. +
  65367. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65368. + @Param[in] en - boolean indicates whether to enable Wake On Lan
  65369. + support or not.
  65370. +
  65371. + @Return E_OK on success; Error code otherwise.
  65372. +
  65373. + @Cautions Allowed only following FM_MAC_Init().
  65374. +*//***************************************************************************/
  65375. +t_Error FM_MAC_SetWakeOnLan(t_Handle h_FmMac, bool en);
  65376. +
  65377. +/**************************************************************************//**
  65378. + @Function FM_MAC_ResetCounters
  65379. +
  65380. + @Description reset all statistics counters
  65381. +
  65382. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65383. +
  65384. + @Return E_OK on success; Error code otherwise.
  65385. +
  65386. + @Cautions Allowed only following FM_MAC_Init().
  65387. +*//***************************************************************************/
  65388. +t_Error FM_MAC_ResetCounters(t_Handle h_FmMac);
  65389. +
  65390. +/**************************************************************************//**
  65391. + @Function FM_MAC_SetException
  65392. +
  65393. + @Description Enable/Disable a specific Exception
  65394. +
  65395. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65396. + @Param[in] ex - Type of the desired exceptions
  65397. + @Param[in] enable - TRUE to enable the specified exception, FALSE to disable it.
  65398. +
  65399. +
  65400. + @Return E_OK on success; Error code otherwise.
  65401. +
  65402. + @Cautions Allowed only following FM_MAC_Init().
  65403. +*//***************************************************************************/
  65404. +t_Error FM_MAC_SetException(t_Handle h_FmMac, e_FmMacExceptions ex, bool enable);
  65405. +
  65406. +/**************************************************************************//**
  65407. + @Function FM_MAC_SetStatistics
  65408. +
  65409. + @Description Define Statistics level.
  65410. + Where applicable, the routine also enables the MIB counters
  65411. + overflow interrupt in order to keep counters accurate
  65412. + and account for overflows.
  65413. + This routine is relevant only for dTSEC.
  65414. +
  65415. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65416. + @Param[in] statisticsLevel - Full statistics level provides all standard counters but may
  65417. + reduce performance. Partial statistics provides only special
  65418. + event counters (errors etc.). If selected, regular counters (such as
  65419. + byte/packet) will be invalid and will return -1.
  65420. +
  65421. + @Return E_OK on success; Error code otherwise.
  65422. +
  65423. + @Cautions Allowed only following FM_MAC_Init().
  65424. +*//***************************************************************************/
  65425. +t_Error FM_MAC_SetStatistics(t_Handle h_FmMac, e_FmMacStatisticsLevel statisticsLevel);
  65426. +
  65427. +/**************************************************************************//**
  65428. + @Function FM_MAC_GetStatistics
  65429. +
  65430. + @Description get all statistics counters
  65431. +
  65432. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65433. + @Param[in] p_Statistics - Structure with statistics
  65434. +
  65435. + @Return E_OK on success; Error code otherwise.
  65436. +
  65437. + @Cautions Allowed only following FM_Init().
  65438. +*//***************************************************************************/
  65439. +t_Error FM_MAC_GetStatistics(t_Handle h_FmMac, t_FmMacStatistics *p_Statistics);
  65440. +
  65441. +/**************************************************************************//**
  65442. + @Function FM_MAC_ModifyMacAddr
  65443. +
  65444. + @Description Replace the main MAC Address
  65445. +
  65446. + @Param[in] h_FmMac - A handle to a FM Module.
  65447. + @Param[in] p_EnetAddr - Ethernet Mac address
  65448. +
  65449. + @Return E_OK on success; Error code otherwise.
  65450. +
  65451. + @Cautions Allowed only after FM_MAC_Init().
  65452. +*//***************************************************************************/
  65453. +t_Error FM_MAC_ModifyMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  65454. +
  65455. +/**************************************************************************//**
  65456. + @Function FM_MAC_AddHashMacAddr
  65457. +
  65458. + @Description Add an Address to the hash table. This is for filter purpose only.
  65459. +
  65460. + @Param[in] h_FmMac - A handle to a FM Module.
  65461. + @Param[in] p_EnetAddr - Ethernet Mac address
  65462. +
  65463. + @Return E_OK on success; Error code otherwise.
  65464. +
  65465. + @Cautions Allowed only following FM_MAC_Init(). It is a filter only address.
  65466. + @Cautions Some address need to be filterd out in upper FM blocks.
  65467. +*//***************************************************************************/
  65468. +t_Error FM_MAC_AddHashMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  65469. +
  65470. +/**************************************************************************//**
  65471. + @Function FM_MAC_RemoveHashMacAddr
  65472. +
  65473. + @Description Delete an Address to the hash table. This is for filter purpose only.
  65474. +
  65475. + @Param[in] h_FmMac - A handle to a FM Module.
  65476. + @Param[in] p_EnetAddr - Ethernet Mac address
  65477. +
  65478. + @Return E_OK on success; Error code otherwise.
  65479. +
  65480. + @Cautions Allowed only following FM_MAC_Init().
  65481. +*//***************************************************************************/
  65482. +t_Error FM_MAC_RemoveHashMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  65483. +
  65484. +/**************************************************************************//**
  65485. + @Function FM_MAC_AddExactMatchMacAddr
  65486. +
  65487. + @Description Add a unicast or multicast mac address for exact-match filtering
  65488. + (8 on dTSEC, 2 for 10G-MAC)
  65489. +
  65490. + @Param[in] h_FmMac - A handle to a FM Module.
  65491. + @Param[in] p_EnetAddr - MAC Address to ADD
  65492. +
  65493. + @Return E_OK on success; Error code otherwise.
  65494. +
  65495. + @Cautions Allowed only after FM_MAC_Init().
  65496. +*//***************************************************************************/
  65497. +t_Error FM_MAC_AddExactMatchMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  65498. +
  65499. +/**************************************************************************//**
  65500. + @Function FM_MAC_RemovelExactMatchMacAddr
  65501. +
  65502. + @Description Remove a uni cast or multi cast mac address.
  65503. +
  65504. + @Param[in] h_FmMac - A handle to a FM Module.
  65505. + @Param[in] p_EnetAddr - MAC Address to remove
  65506. +
  65507. + @Return E_OK on success; Error code otherwise..
  65508. +
  65509. + @Cautions Allowed only after FM_MAC_Init().
  65510. +*//***************************************************************************/
  65511. +t_Error FM_MAC_RemovelExactMatchMacAddr(t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
  65512. +
  65513. +/**************************************************************************//**
  65514. + @Function FM_MAC_SetPromiscuous
  65515. +
  65516. + @Description Enable/Disable MAC Promiscuous mode for ALL mac addresses.
  65517. +
  65518. + @Param[in] h_FmMac - A handle to a FM MAC Module.
  65519. + @Param[in] enable - TRUE to enable or FALSE to disable.
  65520. +
  65521. + @Return E_OK on success; Error code otherwise.
  65522. +
  65523. + @Cautions Allowed only after FM_MAC_Init().
  65524. +*//***************************************************************************/
  65525. +t_Error FM_MAC_SetPromiscuous(t_Handle h_FmMac, bool enable);
  65526. +
  65527. +/**************************************************************************//**
  65528. + @Function FM_MAC_AdjustLink
  65529. +
  65530. + @Description Adjusts the Ethernet link with new speed/duplex setup.
  65531. + This routine is relevant for dTSEC and mEMAC.
  65532. + In case of mEMAC, this routine is also used for manual
  65533. + re-configuration of RGMII speed and duplex mode for
  65534. + RGMII PHYs not supporting in-band status information
  65535. + to MAC.
  65536. +
  65537. + @Param[in] h_FmMac - A handle to a FM Module.
  65538. + @Param[in] speed - Ethernet speed.
  65539. + @Param[in] fullDuplex - TRUE for full-duplex mode;
  65540. + FALSE for half-duplex mode.
  65541. +
  65542. + @Return E_OK on success; Error code otherwise.
  65543. +*//***************************************************************************/
  65544. +t_Error FM_MAC_AdjustLink(t_Handle h_FmMac, e_EnetSpeed speed, bool fullDuplex);
  65545. +
  65546. +/**************************************************************************//**
  65547. + @Function FM_MAC_RestartAutoneg
  65548. +
  65549. + @Description Restarts the auto-negotiation process.
  65550. + When auto-negotiation process is invoked under traffic the
  65551. + auto-negotiation process between the internal SGMII PHY and the
  65552. + external PHY does not always complete successfully. Calling this
  65553. + function will restart the auto-negotiation process that will end
  65554. + successfully. It is recommended to call this function after issuing
  65555. + auto-negotiation restart command to the Eth Phy.
  65556. + This routine is relevant only for dTSEC.
  65557. +
  65558. + @Param[in] h_FmMac - A handle to a FM Module.
  65559. +
  65560. + @Return E_OK on success; Error code otherwise.
  65561. +*//***************************************************************************/
  65562. +t_Error FM_MAC_RestartAutoneg(t_Handle h_FmMac);
  65563. +
  65564. +/**************************************************************************//**
  65565. + @Function FM_MAC_GetId
  65566. +
  65567. + @Description Return the MAC ID
  65568. +
  65569. + @Param[in] h_FmMac - A handle to a FM Module.
  65570. + @Param[out] p_MacId - MAC ID of device
  65571. +
  65572. + @Return E_OK on success; Error code otherwise.
  65573. +
  65574. + @Cautions Allowed only after FM_MAC_Init().
  65575. +*//***************************************************************************/
  65576. +t_Error FM_MAC_GetId(t_Handle h_FmMac, uint32_t *p_MacId);
  65577. +
  65578. +/**************************************************************************//**
  65579. + @Function FM_MAC_GetVesrion
  65580. +
  65581. + @Description Return Mac HW chip version
  65582. +
  65583. + @Param[in] h_FmMac - A handle to a FM Module.
  65584. + @Param[out] p_MacVresion - Mac version as defined by the chip
  65585. +
  65586. + @Return E_OK on success; Error code otherwise.
  65587. +
  65588. + @Cautions Allowed only after FM_MAC_Init().
  65589. +*//***************************************************************************/
  65590. +t_Error FM_MAC_GetVesrion(t_Handle h_FmMac, uint32_t *p_MacVresion);
  65591. +
  65592. +/**************************************************************************//**
  65593. + @Function FM_MAC_MII_WritePhyReg
  65594. +
  65595. + @Description Write data into Phy Register
  65596. +
  65597. + @Param[in] h_FmMac - A handle to a FM Module.
  65598. + @Param[in] phyAddr - Phy Address on the MII bus
  65599. + @Param[in] reg - Register Number.
  65600. + @Param[in] data - Data to write.
  65601. +
  65602. + @Return E_OK on success; Error code otherwise.
  65603. +
  65604. + @Cautions Allowed only after FM_MAC_Init().
  65605. +*//***************************************************************************/
  65606. +t_Error FM_MAC_MII_WritePhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data);
  65607. +
  65608. +/**************************************************************************//**
  65609. + @Function FM_MAC_MII_ReadPhyReg
  65610. +
  65611. + @Description Read data from Phy Register
  65612. +
  65613. + @Param[in] h_FmMac - A handle to a FM Module.
  65614. + @Param[in] phyAddr - Phy Address on the MII bus
  65615. + @Param[in] reg - Register Number.
  65616. + @Param[out] p_Data - Data from PHY.
  65617. +
  65618. + @Return E_OK on success; Error code otherwise.
  65619. +
  65620. + @Cautions Allowed only after FM_MAC_Init().
  65621. +*//***************************************************************************/
  65622. +t_Error FM_MAC_MII_ReadPhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
  65623. +
  65624. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  65625. +/**************************************************************************//**
  65626. + @Function FM_MAC_DumpRegs
  65627. +
  65628. + @Description Dump internal registers
  65629. +
  65630. + @Param[in] h_FmMac - A handle to a FM Module.
  65631. +
  65632. + @Return E_OK on success; Error code otherwise.
  65633. +
  65634. + @Cautions Allowed only after FM_MAC_Init().
  65635. +*//***************************************************************************/
  65636. +t_Error FM_MAC_DumpRegs(t_Handle h_FmMac);
  65637. +#endif /* (defined(DEBUG_ERRORS) && ... */
  65638. +
  65639. +/** @} */ /* end of FM_mac_runtime_control_grp group */
  65640. +/** @} */ /* end of FM_mac_grp group */
  65641. +/** @} */ /* end of FM_grp group */
  65642. +
  65643. +
  65644. +#endif /* __FM_MAC_EXT_H */
  65645. --- /dev/null
  65646. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_macsec_ext.h
  65647. @@ -0,0 +1,1271 @@
  65648. +/*
  65649. + * Copyright 2008-2015 Freescale Semiconductor Inc.
  65650. + *
  65651. + * Redistribution and use in source and binary forms, with or without
  65652. + * modification, are permitted provided that the following conditions are met:
  65653. + * * Redistributions of source code must retain the above copyright
  65654. + * notice, this list of conditions and the following disclaimer.
  65655. + * * Redistributions in binary form must reproduce the above copyright
  65656. + * notice, this list of conditions and the following disclaimer in the
  65657. + * documentation and/or other materials provided with the distribution.
  65658. + * * Neither the name of Freescale Semiconductor nor the
  65659. + * names of its contributors may be used to endorse or promote products
  65660. + * derived from this software without specific prior written permission.
  65661. + *
  65662. + *
  65663. + * ALTERNATIVELY, this software may be distributed under the terms of the
  65664. + * GNU General Public License ("GPL") as published by the Free Software
  65665. + * Foundation, either version 2 of that License or (at your option) any
  65666. + * later version.
  65667. + *
  65668. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  65669. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  65670. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  65671. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  65672. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  65673. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  65674. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  65675. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  65676. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  65677. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65678. + */
  65679. +
  65680. +/**************************************************************************//**
  65681. + @File fm_macsec_ext.h
  65682. +
  65683. + @Description FM MACSEC ...
  65684. +*//***************************************************************************/
  65685. +#ifndef __FM_MACSEC_EXT_H
  65686. +#define __FM_MACSEC_EXT_H
  65687. +
  65688. +#include "std_ext.h"
  65689. +
  65690. +
  65691. +/**************************************************************************//**
  65692. + @Group FM_grp Frame Manager API
  65693. +
  65694. + @Description FM API functions, definitions and enums
  65695. +
  65696. + @{
  65697. +*//***************************************************************************/
  65698. +
  65699. +/**************************************************************************//**
  65700. + @Group FM_MACSEC_grp FM MACSEC
  65701. +
  65702. + @Description FM MACSEC API functions, definitions and enums
  65703. +
  65704. + @{
  65705. +*//***************************************************************************/
  65706. +
  65707. +/**************************************************************************//**
  65708. + @Description MACSEC Exceptions
  65709. +*//***************************************************************************/
  65710. +typedef enum e_FmMacsecExceptions {
  65711. + e_FM_MACSEC_EX_SINGLE_BIT_ECC, /**< Single bit ECC error */
  65712. + e_FM_MACSEC_EX_MULTI_BIT_ECC /**< Multi bit ECC error */
  65713. +} e_FmMacsecExceptions;
  65714. +
  65715. +
  65716. +/**************************************************************************//**
  65717. + @Group FM_MACSEC_init_grp FM-MACSEC Initialization Unit
  65718. +
  65719. + @Description FM MACSEC Initialization Unit
  65720. +
  65721. + @{
  65722. +*//***************************************************************************/
  65723. +
  65724. +/**************************************************************************//**
  65725. + @Function t_FmMacsecExceptionsCallback
  65726. +
  65727. + @Description Exceptions user callback routine, will be called upon an
  65728. + exception passing the exception identification.
  65729. +
  65730. + @Param[in] h_App A handle to an application layer object; This handle
  65731. + will be passed by the driver upon calling this callback.
  65732. + @Param[in] exception The exception.
  65733. +*//***************************************************************************/
  65734. +typedef void (t_FmMacsecExceptionsCallback) ( t_Handle h_App,
  65735. + e_FmMacsecExceptions exception);
  65736. +
  65737. +
  65738. +/**************************************************************************//**
  65739. + @Description FM MACSEC config input
  65740. +*//***************************************************************************/
  65741. +typedef struct t_FmMacsecParams {
  65742. + t_Handle h_Fm; /**< A handle to the FM object related to */
  65743. + bool guestMode; /**< Partition-id */
  65744. + union {
  65745. + struct {
  65746. + uint8_t fmMacId; /**< FM MAC id */
  65747. + } guestParams;
  65748. +
  65749. + struct {
  65750. + uintptr_t baseAddr; /**< Base of memory mapped FM MACSEC registers */
  65751. + t_Handle h_FmMac; /**< A handle to the FM MAC object related to */
  65752. + t_FmMacsecExceptionsCallback *f_Exception; /**< Exception Callback Routine */
  65753. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  65754. + be passed by the driver upon calling the above callbacks */
  65755. + } nonGuestParams;
  65756. + };
  65757. +} t_FmMacsecParams;
  65758. +
  65759. +/**************************************************************************//**
  65760. + @Function FM_MACSEC_Config
  65761. +
  65762. + @Description Creates descriptor for the FM MACSEC module;
  65763. +
  65764. + The routine returns a handle (descriptor) to the FM MACSEC object;
  65765. + This descriptor must be passed as first parameter to all other
  65766. + FM MACSEC function calls;
  65767. +
  65768. + No actual initialization or configuration of FM MACSEC hardware is
  65769. + done by this routine.
  65770. +
  65771. + @Param[in] p_FmMacsecParam Pointer to data structure of parameters.
  65772. +
  65773. + @Retval Handle to FM MACSEC object, or NULL for Failure.
  65774. +*//***************************************************************************/
  65775. +t_Handle FM_MACSEC_Config(t_FmMacsecParams *p_FmMacsecParam);
  65776. +
  65777. +/**************************************************************************//**
  65778. + @Function FM_MACSEC_Init
  65779. +
  65780. + @Description Initializes the FM MACSEC module.
  65781. +
  65782. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65783. +
  65784. + @Return E_OK on success; Error code otherwise.
  65785. +*//***************************************************************************/
  65786. +t_Error FM_MACSEC_Init(t_Handle h_FmMacsec);
  65787. +
  65788. +/**************************************************************************//**
  65789. + @Function FM_MACSEC_Free
  65790. +
  65791. + @Description Frees all resources that were assigned to FM MACSEC module;
  65792. +
  65793. + Calling this routine invalidates the descriptor.
  65794. +
  65795. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65796. +
  65797. + @Return E_OK on success; Error code otherwise.
  65798. +*//***************************************************************************/
  65799. +t_Error FM_MACSEC_Free(t_Handle h_FmMacsec);
  65800. +
  65801. +
  65802. +/**************************************************************************//**
  65803. + @Group FM_MACSEC_advanced_init_grp FM-MACSEC Advanced Configuration Unit
  65804. +
  65805. + @Description Configuration functions used to change default values.
  65806. +
  65807. + @{
  65808. +*//***************************************************************************/
  65809. +
  65810. +/**************************************************************************//**
  65811. + @Description enum for unknown sci frame treatment
  65812. +*//***************************************************************************/
  65813. +typedef enum e_FmMacsecUnknownSciFrameTreatment {
  65814. + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH = 0, /**< Controlled port - Strict mode */
  65815. + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED, /**< If C bit clear deliver on controlled port, else discard
  65816. + Controlled port - Check or Disable mode */
  65817. + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED, /**< Controlled port - Strict mode */
  65818. + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_OR_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED /**< If C bit set deliver on uncontrolled port and discard on controlled port,
  65819. + else discard on uncontrolled port and deliver on controlled port
  65820. + Controlled port - Check or Disable mode */
  65821. +} e_FmMacsecUnknownSciFrameTreatment;
  65822. +
  65823. +/**************************************************************************//**
  65824. + @Description enum for untag frame treatment
  65825. +*//***************************************************************************/
  65826. +typedef enum e_FmMacsecUntagFrameTreatment {
  65827. + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED = 0, /**< Controlled port - Strict mode */
  65828. + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_BOTH, /**< Controlled port - Strict mode */
  65829. + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_CONTROLLED_UNMODIFIED /**< Controlled port - Strict mode */
  65830. +} e_FmMacsecUntagFrameTreatment;
  65831. +
  65832. +/**************************************************************************//**
  65833. + @Function FM_MACSEC_ConfigUnknownSciFrameTreatment
  65834. +
  65835. + @Description Change the treatment for received frames with unknown sci from its default
  65836. + configuration [DEFAULT_unknownSciFrameTreatment].
  65837. +
  65838. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65839. + @Param[in] treatMode The selected mode.
  65840. +
  65841. + @Return E_OK on success; Error code otherwise.
  65842. +
  65843. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65844. +*//***************************************************************************/
  65845. +t_Error FM_MACSEC_ConfigUnknownSciFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUnknownSciFrameTreatment treatMode);
  65846. +
  65847. +/**************************************************************************//**
  65848. + @Function FM_MACSEC_ConfigInvalidTagsFrameTreatment
  65849. +
  65850. + @Description Change the treatment for received frames with invalid tags or
  65851. + a zero value PN or an invalid ICV from its default configuration
  65852. + [DEFAULT_invalidTagsFrameTreatment].
  65853. +
  65854. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65855. + @Param[in] deliverUncontrolled If True deliver on the uncontrolled port, else discard;
  65856. + In both cases discard on the controlled port;
  65857. + this provide Strict, Check or Disable mode.
  65858. +
  65859. + @Return E_OK on success; Error code otherwise.
  65860. +
  65861. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65862. +*//***************************************************************************/
  65863. +t_Error FM_MACSEC_ConfigInvalidTagsFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled);
  65864. +
  65865. +/**************************************************************************//**
  65866. + @Function FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment
  65867. +
  65868. + @Description Change the treatment for received frames with the Encryption bit
  65869. + set and the Changed Text bit clear from its default configuration
  65870. + [DEFAULT_encryptWithNoChangedTextFrameTreatment].
  65871. +
  65872. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65873. + @Param[in] discardUncontrolled If True discard on the uncontrolled port, else deliver;
  65874. + In both cases discard on the controlled port;
  65875. + this provide Strict, Check or Disable mode.
  65876. +
  65877. + @Return E_OK on success; Error code otherwise.
  65878. +
  65879. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65880. +*//***************************************************************************/
  65881. +t_Error FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(t_Handle h_FmMacsec, bool discardUncontrolled);
  65882. +
  65883. +/**************************************************************************//**
  65884. + @Function FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment
  65885. +
  65886. + @Description Change the treatment for received frames with the Encryption bit
  65887. + clear and the Changed Text bit set from its default configuration
  65888. + [DEFAULT_changedTextWithNoEncryptFrameTreatment].
  65889. +
  65890. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65891. + @Param[in] deliverUncontrolled If True deliver on the uncontrolled port, else discard;
  65892. + In both cases discard on the controlled port;
  65893. + this provide Strict, Check or Disable mode.
  65894. +
  65895. + @Return E_OK on success; Error code otherwise.
  65896. +
  65897. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65898. +*//***************************************************************************/
  65899. +t_Error FM_MACSEC_ConfigChangedTextWithNoEncryptFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled);
  65900. +
  65901. +/**************************************************************************//**
  65902. + @Function FM_MACSEC_ConfigUntagFrameTreatment
  65903. +
  65904. + @Description Change the treatment for received frames without the MAC security tag (SecTAG)
  65905. + from its default configuration [DEFAULT_untagFrameTreatment].
  65906. +
  65907. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65908. + @Param[in] treatMode The selected mode.
  65909. +
  65910. + @Return E_OK on success; Error code otherwise.
  65911. +
  65912. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65913. +*//***************************************************************************/
  65914. +t_Error FM_MACSEC_ConfigUntagFrameTreatment(t_Handle h_FmMacsec, e_FmMacsecUntagFrameTreatment treatMode);
  65915. +
  65916. +/**************************************************************************//**
  65917. + @Function FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment
  65918. +
  65919. + @Description Change the treatment for received frames with only SCB bit set
  65920. + from its default configuration [DEFAULT_onlyScbIsSetFrameTreatment].
  65921. +
  65922. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65923. + @Param[in] deliverUncontrolled If True deliver on the uncontrolled port, else discard;
  65924. + In both cases discard on the controlled port;
  65925. + this provide Strict, Check or Disable mode.
  65926. +
  65927. + @Return E_OK on success; Error code otherwise.
  65928. +
  65929. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65930. +*//***************************************************************************/
  65931. +t_Error FM_MACSEC_ConfigOnlyScbIsSetFrameTreatment(t_Handle h_FmMacsec, bool deliverUncontrolled);
  65932. +
  65933. +/**************************************************************************//**
  65934. + @Function FM_MACSEC_ConfigPnExhaustionThreshold
  65935. +
  65936. + @Description It's provide the ability to configure a PN exhaustion threshold;
  65937. + When the NextPn crosses this value an interrupt event
  65938. + is asserted to warn that the active SA should re-key.
  65939. +
  65940. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65941. + @Param[in] pnExhThr If the threshold is reached, an interrupt event
  65942. + is asserted to re-key.
  65943. +
  65944. + @Return E_OK on success; Error code otherwise.
  65945. +
  65946. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65947. +*//***************************************************************************/
  65948. +t_Error FM_MACSEC_ConfigPnExhaustionThreshold(t_Handle h_FmMacsec, uint32_t pnExhThr);
  65949. +
  65950. +/**************************************************************************//**
  65951. + @Function FM_MACSEC_ConfigKeysUnreadable
  65952. +
  65953. + @Description Turn on privacy mode; All the keys and their hash values can't be read any more;
  65954. + Can not be cleared unless hard reset.
  65955. +
  65956. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65957. +
  65958. + @Return E_OK on success; Error code otherwise.
  65959. +
  65960. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65961. +*//***************************************************************************/
  65962. +t_Error FM_MACSEC_ConfigKeysUnreadable(t_Handle h_FmMacsec);
  65963. +
  65964. +/**************************************************************************//**
  65965. + @Function FM_MACSEC_ConfigSectagWithoutSCI
  65966. +
  65967. + @Description Promise that all generated Sectag will be without SCI included.
  65968. +
  65969. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65970. +
  65971. + @Return E_OK on success; Error code otherwise.
  65972. +
  65973. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65974. +*//***************************************************************************/
  65975. +t_Error FM_MACSEC_ConfigSectagWithoutSCI(t_Handle h_FmMacsec);
  65976. +
  65977. +/**************************************************************************//**
  65978. + @Function FM_MACSEC_ConfigException
  65979. +
  65980. + @Description Calling this routine changes the internal driver data base
  65981. + from its default selection of exceptions enablement;
  65982. + By default all exceptions are enabled.
  65983. +
  65984. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  65985. + @Param[in] exception The exception to be selected.
  65986. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  65987. +
  65988. + @Return E_OK on success; Error code otherwise.
  65989. +
  65990. + @Cautions Allowed only following FM_MACSEC_Config() and before FM_MACSEC_Init().
  65991. +*//***************************************************************************/
  65992. +t_Error FM_MACSEC_ConfigException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
  65993. +
  65994. +/** @} */ /* end of FM_MACSEC_advanced_init_grp group */
  65995. +/** @} */ /* end of FM_MACSEC_init_grp group */
  65996. +
  65997. +
  65998. +/**************************************************************************//**
  65999. + @Group FM_MACSEC_runtime_control_grp FM-MACSEC Runtime Control Data Unit
  66000. +
  66001. + @Description FM MACSEC runtime control data unit API functions, definitions and enums.
  66002. +
  66003. + @{
  66004. +*//***************************************************************************/
  66005. +
  66006. +/**************************************************************************//**
  66007. + @Function FM_MACSEC_GetRevision
  66008. +
  66009. + @Description Return MACSEC HW chip revision
  66010. +
  66011. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  66012. + @Param[out] p_MacsecRevision MACSEC revision as defined by the chip.
  66013. +
  66014. + @Return E_OK on success; Error code otherwise.
  66015. +
  66016. + @Cautions Allowed only after FM_MACSEC_Init().
  66017. +*//***************************************************************************/
  66018. +t_Error FM_MACSEC_GetRevision(t_Handle h_FmMacsec, uint32_t *p_MacsecRevision);
  66019. +
  66020. +/**************************************************************************//**
  66021. + @Function FM_MACSEC_Enable
  66022. +
  66023. + @Description This routine should be called after MACSEC is initialized for enabling all
  66024. + MACSEC engines according to their existing configuration.
  66025. +
  66026. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  66027. +
  66028. + @Return E_OK on success; Error code otherwise.
  66029. +
  66030. + @Cautions Allowed only following FM_MACSEC_Init() and when MACSEC is disabled.
  66031. +*//***************************************************************************/
  66032. +t_Error FM_MACSEC_Enable(t_Handle h_FmMacsec);
  66033. +
  66034. +/**************************************************************************//**
  66035. + @Function FM_MACSEC_Disable
  66036. +
  66037. + @Description This routine may be called when MACSEC is enabled in order to
  66038. + disable all MACSEC engines; The MACSEC is working in bypass mode.
  66039. +
  66040. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  66041. +
  66042. + @Return E_OK on success; Error code otherwise.
  66043. +
  66044. + @Cautions Allowed only following FM_MACSEC_Init() and when MACSEC is enabled.
  66045. +*//***************************************************************************/
  66046. +t_Error FM_MACSEC_Disable(t_Handle h_FmMacsec);
  66047. +
  66048. +/**************************************************************************//**
  66049. + @Function FM_MACSEC_SetException
  66050. +
  66051. + @Description Calling this routine enables/disables the specified exception.
  66052. +
  66053. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  66054. + @Param[in] exception The exception to be selected.
  66055. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  66056. +
  66057. + @Return E_OK on success; Error code otherwise.
  66058. +
  66059. + @Cautions Allowed only following FM_MACSEC_Init().
  66060. +*//***************************************************************************/
  66061. +t_Error FM_MACSEC_SetException(t_Handle h_FmMacsec, e_FmMacsecExceptions exception, bool enable);
  66062. +
  66063. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  66064. +/**************************************************************************//**
  66065. + @Function FM_MACSEC_DumpRegs
  66066. +
  66067. + @Description Dump internal registers.
  66068. +
  66069. + @Param[in] h_FmMacsec - FM MACSEC module descriptor.
  66070. +
  66071. + @Return E_OK on success; Error code otherwise.
  66072. +
  66073. + @Cautions Allowed only after FM_MACSEC_Init().
  66074. +*//***************************************************************************/
  66075. +t_Error FM_MACSEC_DumpRegs(t_Handle h_FmMacsec);
  66076. +#endif /* (defined(DEBUG_ERRORS) && ... */
  66077. +
  66078. +#ifdef VERIFICATION_SUPPORT
  66079. +/********************* VERIFICATION ONLY ********************************/
  66080. +/**************************************************************************//**
  66081. + @Function FM_MACSEC_BackdoorSet
  66082. +
  66083. + @Description Set register of the MACSEC memory map
  66084. +
  66085. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  66086. + @Param[out] offset Register offset.
  66087. + @Param[out] value Value to write.
  66088. +
  66089. +
  66090. + @Return None
  66091. +
  66092. + @Cautions Allowed only following FM_MACSEC_Init().
  66093. +*//***************************************************************************/
  66094. +t_Error FM_MACSEC_BackdoorSet(t_Handle h_FmMacsec, uint32_t offset, uint32_t value);
  66095. +
  66096. +/**************************************************************************//**
  66097. + @Function FM_MACSEC_BackdoorGet
  66098. +
  66099. + @Description Read from register of the MACSEC memory map.
  66100. +
  66101. + @Param[in] h_FmMacsec FM MACSEC module descriptor.
  66102. + @Param[out] offset Register offset.
  66103. +
  66104. + @Return Value read
  66105. +
  66106. + @Cautions Allowed only following FM_MACSEC_Init().
  66107. +*//***************************************************************************/
  66108. +uint32_t FM_MACSEC_BackdoorGet(t_Handle h_FmMacsec, uint32_t offset);
  66109. +#endif /* VERIFICATION_SUPPORT */
  66110. +
  66111. +/** @} */ /* end of FM_MACSEC_runtime_control_grp group */
  66112. +
  66113. +
  66114. +/**************************************************************************//**
  66115. + @Group FM_MACSEC_SECY_grp FM-MACSEC SecY
  66116. +
  66117. + @Description FM-MACSEC SecY API functions, definitions and enums
  66118. +
  66119. + @{
  66120. +*//***************************************************************************/
  66121. +
  66122. +typedef uint8_t macsecSAKey_t[32];
  66123. +typedef uint64_t macsecSCI_t;
  66124. +typedef uint8_t macsecAN_t;
  66125. +
  66126. +/**************************************************************************//**
  66127. +@Description MACSEC SECY Cipher Suite
  66128. +*//***************************************************************************/
  66129. +typedef enum e_FmMacsecSecYCipherSuite {
  66130. + e_FM_MACSEC_SECY_GCM_AES_128 = 0, /**< GCM-AES-128 */
  66131. +#if (DPAA_VERSION >= 11)
  66132. + e_FM_MACSEC_SECY_GCM_AES_256 /**< GCM-AES-256 */
  66133. +#endif /* (DPAA_VERSION >= 11) */
  66134. +} e_FmMacsecSecYCipherSuite;
  66135. +
  66136. +/**************************************************************************//**
  66137. + @Description MACSEC SECY Exceptions
  66138. +*//***************************************************************************/
  66139. +typedef enum e_FmMacsecSecYExceptions {
  66140. + e_FM_MACSEC_SECY_EX_FRAME_DISCARDED /**< Frame Discarded */
  66141. +} e_FmMacsecSecYExceptions;
  66142. +
  66143. +/**************************************************************************//**
  66144. + @Description MACSEC SECY Events
  66145. +*//***************************************************************************/
  66146. +typedef enum e_FmMacsecSecYEvents {
  66147. + e_FM_MACSEC_SECY_EV_NEXT_PN /**< Next Packet Number exhaustion threshold reached */
  66148. +} e_FmMacsecSecYEvents;
  66149. +
  66150. +/**************************************************************************//**
  66151. + @Collection MACSEC SECY Frame Discarded Descriptor error
  66152. +*//***************************************************************************/
  66153. +typedef uint8_t macsecTxScFrameDiscardedErrSelect_t; /**< typedef for defining Frame Discarded Descriptor errors */
  66154. +
  66155. +#define FM_MACSEC_SECY_TX_SC_FRM_DISCAR_ERR_NEXT_PN_ZERO 0x8000 /**< NextPn == 0 */
  66156. +#define FM_MACSEC_SECY_TX_SC_FRM_DISCAR_ERR_SC_DISBALE 0x4000 /**< SC is disable */
  66157. +/* @} */
  66158. +
  66159. +/**************************************************************************//**
  66160. + @Function t_FmMacsecSecYExceptionsCallback
  66161. +
  66162. + @Description Exceptions user callback routine, will be called upon an
  66163. + exception passing the exception identification.
  66164. +
  66165. + @Param[in] h_App A handle to an application layer object; This handle
  66166. + will be passed by the driver upon calling this callback.
  66167. + @Param[in] exception The exception.
  66168. +*//***************************************************************************/
  66169. +typedef void (t_FmMacsecSecYExceptionsCallback) ( t_Handle h_App,
  66170. + e_FmMacsecSecYExceptions exception);
  66171. +
  66172. +/**************************************************************************//**
  66173. + @Function t_FmMacsecSecYEventsCallback
  66174. +
  66175. + @Description Events user callback routine, will be called upon an
  66176. + event passing the event identification.
  66177. +
  66178. + @Param[in] h_App A handle to an application layer object; This handle
  66179. + will be passed by the driver upon calling this callback.
  66180. + @Param[in] event The event.
  66181. +*//***************************************************************************/
  66182. +typedef void (t_FmMacsecSecYEventsCallback) ( t_Handle h_App,
  66183. + e_FmMacsecSecYEvents event);
  66184. +
  66185. +/**************************************************************************//**
  66186. + @Description RFC2863 MIB
  66187. +*//***************************************************************************/
  66188. +typedef struct t_MIBStatistics {
  66189. + uint64_t ifInOctets; /**< Total number of byte received */
  66190. + uint64_t ifInPkts; /**< Total number of packets received */
  66191. + uint64_t ifInMcastPkts; /**< Total number of multicast frame received */
  66192. + uint64_t ifInBcastPkts; /**< Total number of broadcast frame received */
  66193. + uint64_t ifInDiscards; /**< Frames received, but discarded due to problems within the MAC RX :
  66194. + - InPktsNoTag,
  66195. + - InPktsLate,
  66196. + - InPktsOverrun */
  66197. + uint64_t ifInErrors; /**< Number of frames received with error:
  66198. + - InPktsBadTag,
  66199. + - InPktsNoSCI,
  66200. + - InPktsNotUsingSA
  66201. + - InPktsNotValid */
  66202. + uint64_t ifOutOctets; /**< Total number of byte sent */
  66203. + uint64_t ifOutPkts; /**< Total number of packets sent */
  66204. + uint64_t ifOutMcastPkts; /**< Total number of multicast frame sent */
  66205. + uint64_t ifOutBcastPkts; /**< Total number of multicast frame sent */
  66206. + uint64_t ifOutDiscards; /**< Frames received, but discarded due to problems within the MAC TX N/A! */
  66207. + uint64_t ifOutErrors; /**< Number of frames transmitted with error:
  66208. + - FIFO Overflow Error
  66209. + - FIFO Underflow Error
  66210. + - Other */
  66211. +} t_MIBStatistics;
  66212. +
  66213. +/**************************************************************************//**
  66214. + @Description MACSEC SecY Rx SA Statistics
  66215. +*//***************************************************************************/
  66216. +typedef struct t_FmMacsecSecYRxSaStatistics {
  66217. + uint32_t inPktsOK; /**< The number of frames with resolved SCI, have passed all
  66218. + frame validation frame validation with the validateFrame not set to disable */
  66219. + uint32_t inPktsInvalid; /**< The number of frames with resolved SCI, that have failed frame
  66220. + validation with the validateFrame set to check */
  66221. + uint32_t inPktsNotValid; /**< The number of frames with resolved SCI, discarded on the controlled port,
  66222. + that have failed frame validation with the validateFrame set to strict or the c bit is set */
  66223. + uint32_t inPktsNotUsingSA; /**< The number of frames received with resolved SCI and discarded on disabled or
  66224. + not provisioned SA with validateFrame in the strict mode or the C bit is set */
  66225. + uint32_t inPktsUnusedSA; /**< The number of frames received with resolved SCI on disabled or not provisioned SA
  66226. + with validateFrame not in the strict mode and the C bit is cleared */
  66227. +} t_FmMacsecSecYRxSaStatistics;
  66228. +
  66229. +/**************************************************************************//**
  66230. + @Description MACSEC SecY Tx SA Statistics
  66231. +*//***************************************************************************/
  66232. +typedef struct t_FmMacsecSecYTxSaStatistics {
  66233. + uint64_t outPktsProtected; /**< The number of frames, that the user of the controlled port requested to
  66234. + be transmitted, which were integrity protected */
  66235. + uint64_t outPktsEncrypted; /**< The number of frames, that the user of the controlled port requested to
  66236. + be transmitted, which were confidentiality protected */
  66237. +} t_FmMacsecSecYTxSaStatistics;
  66238. +
  66239. +/**************************************************************************//**
  66240. + @Description MACSEC SecY Rx SC Statistics
  66241. +*//***************************************************************************/
  66242. +typedef struct t_FmMacsecSecYRxScStatistics {
  66243. + uint64_t inPktsUnchecked; /**< The number of frames with resolved SCI, delivered to the user of a controlled port,
  66244. + that are not validated with the validateFrame set to disable */
  66245. + uint64_t inPktsDelayed; /**< The number of frames with resolved SCI, delivered to the user of a controlled port,
  66246. + that have their PN smaller than the lowest_PN with the validateFrame set to
  66247. + disable or replayProtect disabled */
  66248. + uint64_t inPktsLate; /**< The number of frames with resolved SCI, discarded on the controlled port,
  66249. + that have their PN smaller than the lowest_PN with the validateFrame set to
  66250. + Check or Strict and replayProtect enabled */
  66251. + uint64_t inPktsOK; /**< The number of frames with resolved SCI, have passed all
  66252. + frame validation frame validation with the validateFrame not set to disable */
  66253. + uint64_t inPktsInvalid; /**< The number of frames with resolved SCI, that have failed frame
  66254. + validation with the validateFrame set to check */
  66255. + uint64_t inPktsNotValid; /**< The number of frames with resolved SCI, discarded on the controlled port,
  66256. + that have failed frame validation with the validateFrame set to strict or the c bit is set */
  66257. + uint64_t inPktsNotUsingSA; /**< The number of frames received with resolved SCI and discarded on disabled or
  66258. + not provisioned SA with validateFrame in the strict mode or the C bit is set */
  66259. + uint64_t inPktsUnusedSA; /**< The number of frames received with resolved SCI on disabled or not provisioned SA
  66260. + with validateFrame not in the strict mode and the C bit is cleared */
  66261. +} t_FmMacsecSecYRxScStatistics;
  66262. +
  66263. +/**************************************************************************//**
  66264. + @Description MACSEC SecY Tx SC Statistics
  66265. +*//***************************************************************************/
  66266. +typedef struct t_FmMacsecSecYTxScStatistics {
  66267. + uint64_t outPktsProtected; /**< The number of frames, that the user of the controlled port requested to
  66268. + be transmitted, which were integrity protected */
  66269. + uint64_t outPktsEncrypted; /**< The number of frames, that the user of the controlled port requested to
  66270. + be transmitted, which were confidentiality protected */
  66271. +} t_FmMacsecSecYTxScStatistics;
  66272. +
  66273. +/**************************************************************************//**
  66274. + @Description MACSEC SecY Statistics
  66275. +*//***************************************************************************/
  66276. +typedef struct t_FmMacsecSecYStatistics {
  66277. + t_MIBStatistics mibCtrlStatistics; /**< Controlled port MIB statistics */
  66278. + t_MIBStatistics mibNonCtrlStatistics; /**< Uncontrolled port MIB statistics */
  66279. +/* Frame verification statistics */
  66280. + uint64_t inPktsUntagged; /**< The number of received packets without the MAC security tag
  66281. + (SecTAG) with validateFrames which is not in the strict mode */
  66282. + uint64_t inPktsNoTag; /**< The number of received packets discarded without the
  66283. + MAC security tag (SecTAG) with validateFrames which is in the strict mode */
  66284. + uint64_t inPktsBadTag; /**< The number of received packets discarded with an invalid
  66285. + SecTAG or a zero value PN or an invalid ICV */
  66286. + uint64_t inPktsUnknownSCI; /**< The number of received packets with unknown SCI with the
  66287. + condition : validateFrames is not in the strict mode and the
  66288. + C bit in the SecTAG is not set */
  66289. + uint64_t inPktsNoSCI; /**< The number of received packets discarded with unknown SCI
  66290. + information with the condition : validateFrames is in the strict mode
  66291. + or the C bit in the SecTAG is set */
  66292. + uint64_t inPktsOverrun; /**< The number of packets discarded because the number of
  66293. + received packets exceeded the cryptographic performance capabilities */
  66294. +/* Frame validation statistics */
  66295. + uint64_t inOctetsValidated; /**< The number of octets of plaintext recovered from received frames with
  66296. + resolved SCI that were integrity protected but not encrypted */
  66297. + uint64_t inOctetsDecrypted; /**< The number of octets of plaintext recovered from received frames with
  66298. + resolved SCI that were integrity protected and encrypted */
  66299. +/* Frame generation statistics */
  66300. + uint64_t outPktsUntagged; /**< The number of frames, that the user of the controlled port requested to
  66301. + be transmitted, with protectFrame false */
  66302. + uint64_t outPktsTooLong; /**< The number of frames, that the user of the controlled port requested to
  66303. + be transmitted, discarded due to length being larger than Maximum Frame Length (MACSEC_MFL) */
  66304. +/* Frame protection statistics */
  66305. + uint64_t outOctetsProtected; /**< The number of octets of User Data in transmitted frames that were
  66306. + integrity protected but not encrypted */
  66307. + uint64_t outOctetsEncrypted; /**< The number of octets of User Data in transmitted frames that were
  66308. + both integrity protected and encrypted */
  66309. +} t_FmMacsecSecYStatistics;
  66310. +
  66311. +
  66312. +/**************************************************************************//**
  66313. + @Description MACSEC SecY SC Params
  66314. +*//***************************************************************************/
  66315. +typedef struct t_FmMacsecSecYSCParams {
  66316. + macsecSCI_t sci; /**< The secure channel identification of the SC */
  66317. + e_FmMacsecSecYCipherSuite cipherSuite; /**< Cipher suite to be used for the SC */
  66318. +} t_FmMacsecSecYSCParams;
  66319. +
  66320. +/**************************************************************************//**
  66321. + @Group FM_MACSEC_SECY_init_grp FM-MACSEC SecY Initialization Unit
  66322. +
  66323. + @Description FM-MACSEC SecY Initialization Unit
  66324. +
  66325. + @{
  66326. +*//***************************************************************************/
  66327. +
  66328. +/**************************************************************************//**
  66329. + @Description enum for validate frames
  66330. +*//***************************************************************************/
  66331. +typedef enum e_FmMacsecValidFrameBehavior {
  66332. + e_FM_MACSEC_VALID_FRAME_BEHAVIOR_DISABLE = 0, /**< disable the validation function */
  66333. + e_FM_MACSEC_VALID_FRAME_BEHAVIOR_CHECK, /**< enable the validation function but only for checking
  66334. + without filtering out invalid frames */
  66335. + e_FM_MACSEC_VALID_FRAME_BEHAVIOR_STRICT /**< enable the validation function and also strictly filter
  66336. + out those invalid frames */
  66337. +} e_FmMacsecValidFrameBehavior;
  66338. +
  66339. +/**************************************************************************//**
  66340. + @Description enum for sci insertion
  66341. +*//***************************************************************************/
  66342. +typedef enum e_FmMacsecSciInsertionMode {
  66343. + e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG = 0, /**< explicit sci in the sectag */
  66344. + e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_MAC_SA, /**< mac sa is overwritten with the sci*/
  66345. + e_FM_MACSEC_SCI_INSERTION_MODE_IMPLICT_PTP /**< implicit point-to-point sci (pre-shared) */
  66346. +} e_FmMacsecSciInsertionMode;
  66347. +
  66348. +/**************************************************************************//**
  66349. + @Description FM MACSEC SecY config input
  66350. +*//***************************************************************************/
  66351. +typedef struct t_FmMacsecSecYParams {
  66352. + t_Handle h_FmMacsec; /**< A handle to the FM MACSEC object */
  66353. + t_FmMacsecSecYSCParams txScParams; /**< Tx SC Params */
  66354. + uint32_t numReceiveChannels; /**< Number of receive channels dedicated to this SecY */
  66355. + t_FmMacsecSecYExceptionsCallback *f_Exception; /**< Callback routine to be called by the driver upon SecY exception */
  66356. + t_FmMacsecSecYEventsCallback *f_Event; /**< Callback routine to be called by the driver upon SecY event */
  66357. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  66358. + be passed by the driver upon calling the above callbacks */
  66359. +} t_FmMacsecSecYParams;
  66360. +
  66361. +/**************************************************************************//**
  66362. + @Function FM_MACSEC_SECY_Config
  66363. +
  66364. + @Description Creates descriptor for the FM MACSEC SECY module;
  66365. +
  66366. + The routine returns a handle (descriptor) to the FM MACSEC SECY object;
  66367. + This descriptor must be passed as first parameter to all other
  66368. + FM MACSEC SECY function calls;
  66369. + No actual initialization or configuration of FM MACSEC SecY hardware is
  66370. + done by this routine.
  66371. +
  66372. + @Param[in] p_FmMacsecSecYParam Pointer to data structure of parameters.
  66373. +
  66374. + @Return Handle to FM MACSEC SECY object, or NULL for Failure.
  66375. +*//***************************************************************************/
  66376. +t_Handle FM_MACSEC_SECY_Config(t_FmMacsecSecYParams *p_FmMacsecSecYParam);
  66377. +
  66378. +/**************************************************************************//**
  66379. + @Function FM_MACSEC_SECY_Init
  66380. +
  66381. + @Description Initializes the FM MACSEC SECY module.
  66382. +
  66383. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66384. +
  66385. + @Return E_OK on success; Error code otherwise.
  66386. +*//***************************************************************************/
  66387. +t_Error FM_MACSEC_SECY_Init(t_Handle h_FmMacsecSecY);
  66388. +
  66389. +/**************************************************************************//**
  66390. + @Function FM_MACSEC_SECY_Free
  66391. +
  66392. + @Description Frees all resources that were assigned to FM MACSEC SECY module.
  66393. +
  66394. + Calling this routine invalidates the descriptor.
  66395. +
  66396. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66397. +
  66398. + @Return E_OK on success; Error code otherwise.
  66399. +*//***************************************************************************/
  66400. +t_Error FM_MACSEC_SECY_Free(t_Handle h_FmMacsecSecY);
  66401. +
  66402. +/**************************************************************************//**
  66403. + @Group FM_MACSEC_SECY_advanced_init_grp FM-MACSEC SecY Advanced Configuration Unit
  66404. +
  66405. + @Description Configuration functions used to change default values.
  66406. +
  66407. + @{
  66408. +*//***************************************************************************/
  66409. +
  66410. +/**************************************************************************//**
  66411. + @Function FM_MACSEC_SECY_ConfigSciInsertionMode
  66412. +
  66413. + @Description Calling this routine changes the SCI-insertion-mode in the
  66414. + internal driver data base from its default configuration
  66415. + [DEFAULT_sciInsertionMode]
  66416. +
  66417. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66418. + @Param[in] sciInsertionMode Sci insertion mode
  66419. +
  66420. + @Return E_OK on success; Error code otherwise.
  66421. +
  66422. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
  66423. +
  66424. +*//***************************************************************************/
  66425. +t_Error FM_MACSEC_SECY_ConfigSciInsertionMode(t_Handle h_FmMacsecSecY, e_FmMacsecSciInsertionMode sciInsertionMode);
  66426. +
  66427. +/**************************************************************************//**
  66428. + @Function FM_MACSEC_SECY_ConfigProtectFrames
  66429. +
  66430. + @Description Calling this routine changes the protect-frame mode in the
  66431. + internal driver data base from its default configuration
  66432. + [DEFAULT_protectFrames]
  66433. +
  66434. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66435. + @Param[in] protectFrames If FALSE, frames are transmitted without modification
  66436. +
  66437. + @Return E_OK on success; Error code otherwise.
  66438. +
  66439. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
  66440. +
  66441. +*//***************************************************************************/
  66442. +t_Error FM_MACSEC_SECY_ConfigProtectFrames(t_Handle h_FmMacsecSecY, bool protectFrames);
  66443. +
  66444. +/**************************************************************************//**
  66445. + @Function FM_MACSEC_SECY_ConfigReplayWindow
  66446. +
  66447. + @Description Calling this routine changes the replay-window settings in the
  66448. + internal driver data base from its default configuration
  66449. + [DEFAULT_replayEnable], [DEFAULT_replayWindow]
  66450. +
  66451. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66452. + @Param[in] replayProtect; Replay protection function mode
  66453. + @Param[in] replayWindow; The size of the replay window
  66454. +
  66455. + @Return E_OK on success; Error code otherwise.
  66456. +
  66457. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
  66458. +
  66459. +*//***************************************************************************/
  66460. +t_Error FM_MACSEC_SECY_ConfigReplayWindow(t_Handle h_FmMacsecSecY, bool replayProtect, uint32_t replayWindow);
  66461. +
  66462. +/**************************************************************************//**
  66463. + @Function FM_MACSEC_SECY_ConfigValidationMode
  66464. +
  66465. + @Description Calling this routine changes the frame-validation-behavior mode
  66466. + in the internal driver data base from its default configuration
  66467. + [DEFAULT_validateFrames]
  66468. +
  66469. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66470. + @Param[in] validateFrames Validation function mode
  66471. +
  66472. + @Return E_OK on success; Error code otherwise.
  66473. +
  66474. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
  66475. +
  66476. +*//***************************************************************************/
  66477. +t_Error FM_MACSEC_SECY_ConfigValidationMode(t_Handle h_FmMacsecSecY, e_FmMacsecValidFrameBehavior validateFrames);
  66478. +
  66479. +/**************************************************************************//**
  66480. + @Function FM_MACSEC_SECY_ConfigConfidentiality
  66481. +
  66482. + @Description Calling this routine changes the confidentiality settings in the
  66483. + internal driver data base from its default configuration
  66484. + [DEFAULT_confidentialityEnable], [DEFAULT_confidentialityOffset]
  66485. +
  66486. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66487. + @Param[in] confidentialityEnable TRUE - confidentiality protection and integrity protection
  66488. + FALSE - no confidentiality protection, only integrity protection
  66489. + @Param[in] confidentialityOffset The number of initial octets of each MSDU without confidentiality protection
  66490. + common values are 0, 30, and 50
  66491. +
  66492. + @Return E_OK on success; Error code otherwise.
  66493. +
  66494. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
  66495. +
  66496. +*//***************************************************************************/
  66497. +t_Error FM_MACSEC_SECY_ConfigConfidentiality(t_Handle h_FmMacsecSecY, bool confidentialityEnable, uint16_t confidentialityOffset);
  66498. +
  66499. +/**************************************************************************//**
  66500. + @Function FM_MACSEC_SECY_ConfigPointToPoint
  66501. +
  66502. + @Description configure this SecY to work in point-to-point mode, means that
  66503. + it will have only one rx sc;
  66504. +
  66505. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66506. +
  66507. + @Return E_OK on success; Error code otherwise.
  66508. +
  66509. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init();
  66510. + Can be called only once in a system; only the first secY that will call this
  66511. + routine will be able to operate in Point-To-Point mode.
  66512. +*//***************************************************************************/
  66513. +t_Error FM_MACSEC_SECY_ConfigPointToPoint(t_Handle h_FmMacsecSecY);
  66514. +
  66515. +/**************************************************************************//**
  66516. + @Function FM_MACSEC_SECY_ConfigException
  66517. +
  66518. + @Description Calling this routine changes the internal driver data base
  66519. + from its default selection of exceptions enablement;
  66520. + By default all exceptions are enabled.
  66521. +
  66522. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66523. + @Param[in] exception The exception to be selected.
  66524. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  66525. +
  66526. + @Return E_OK on success; Error code otherwise.
  66527. +
  66528. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init().
  66529. +*//***************************************************************************/
  66530. +t_Error FM_MACSEC_SECY_ConfigException(t_Handle h_FmMacsecSecY, e_FmMacsecSecYExceptions exception, bool enable);
  66531. +
  66532. +/**************************************************************************//**
  66533. + @Function FM_MACSEC_SECY_ConfigEvent
  66534. +
  66535. + @Description Calling this routine changes the internal driver data base
  66536. + from its default selection of events enablement;
  66537. + By default all events are enabled.
  66538. +
  66539. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66540. + @Param[in] event The event to be selected.
  66541. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  66542. +
  66543. + @Return E_OK on success; Error code otherwise.
  66544. +
  66545. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init().
  66546. +*//***************************************************************************/
  66547. +t_Error FM_MACSEC_SECY_ConfigEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable);
  66548. +
  66549. +/** @} */ /* end of FM_MACSEC_SECY_advanced_init_grp group */
  66550. +/** @} */ /* end of FM_MACSEC_SECY_init_grp group */
  66551. +
  66552. +
  66553. +/**************************************************************************//**
  66554. + @Group FM_MACSEC_SECY_runtime_control_grp FM-MACSEC SecY Runtime Control Unit
  66555. +
  66556. + @Description FM MACSEC SECY Runtime control unit API functions, definitions and enums.
  66557. +
  66558. + @{
  66559. +*//***************************************************************************/
  66560. +
  66561. +/**************************************************************************//**
  66562. + @Function FM_MACSEC_SECY_CreateRxSc
  66563. +
  66564. + @Description Create a receive secure channel.
  66565. +
  66566. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66567. + @Param[in] scParams secure channel params.
  66568. +
  66569. + @Return E_OK on success; Error code otherwise.
  66570. +
  66571. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66572. +*//***************************************************************************/
  66573. +t_Handle FM_MACSEC_SECY_CreateRxSc(t_Handle h_FmMacsecSecY, t_FmMacsecSecYSCParams *p_ScParams);
  66574. +
  66575. +/**************************************************************************//**
  66576. + @Function FM_MACSEC_SECY_DeleteRxSc
  66577. +
  66578. + @Description Deleting an initialized secure channel.
  66579. +
  66580. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66581. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66582. +
  66583. + @Return E_OK on success; Error code otherwise.
  66584. +
  66585. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSc().
  66586. +*//***************************************************************************/
  66587. +t_Error FM_MACSEC_SECY_DeleteRxSc(t_Handle h_FmMacsecSecY, t_Handle h_Sc);
  66588. +
  66589. +/**************************************************************************//**
  66590. + @Function FM_MACSEC_SECY_CreateRxSa
  66591. +
  66592. + @Description Create a receive secure association for the secure channel;
  66593. + the SA cannot be used to receive frames until FM_MACSEC_SECY_RxSaEnableReceive is called.
  66594. +
  66595. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66596. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66597. + @Param[in] an association number represent the SA.
  66598. + @Param[in] lowestPn the lowest acceptable PN value for a received frame.
  66599. + @Param[in] key the desired key for this SA.
  66600. +
  66601. + @Return E_OK on success; Error code otherwise.
  66602. +
  66603. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSc().
  66604. +*//***************************************************************************/
  66605. +t_Error FM_MACSEC_SECY_CreateRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t lowestPn, macsecSAKey_t key);
  66606. +
  66607. +/**************************************************************************//**
  66608. + @Function FM_MACSEC_SECY_DeleteRxSa
  66609. +
  66610. + @Description Deleting an initialized secure association.
  66611. +
  66612. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66613. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66614. + @Param[in] an association number represent the SA.
  66615. +
  66616. + @Return E_OK on success; Error code otherwise.
  66617. +
  66618. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66619. +*//***************************************************************************/
  66620. +t_Error FM_MACSEC_SECY_DeleteRxSa(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an);
  66621. +
  66622. +/**************************************************************************//**
  66623. + @Function FM_MACSEC_SECY_RxSaEnableReceive
  66624. +
  66625. + @Description Enabling the SA to receive frames.
  66626. +
  66627. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66628. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66629. + @Param[in] an association number represent the SA.
  66630. +
  66631. + @Return E_OK on success; Error code otherwise.
  66632. +
  66633. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa().
  66634. +*//***************************************************************************/
  66635. +t_Error FM_MACSEC_SECY_RxSaEnableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an);
  66636. +
  66637. +/**************************************************************************//**
  66638. + @Function FM_MACSEC_SECY_RxSaDisableReceive
  66639. +
  66640. + @Description Disabling the SA from receive frames.
  66641. +
  66642. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66643. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66644. + @Param[in] an association number represent the SA.
  66645. +
  66646. + @Return E_OK on success; Error code otherwise.
  66647. +
  66648. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa().
  66649. +*//***************************************************************************/
  66650. +t_Error FM_MACSEC_SECY_RxSaDisableReceive(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an);
  66651. +
  66652. +/**************************************************************************//**
  66653. + @Function FM_MACSEC_SECY_RxSaUpdateNextPn
  66654. +
  66655. + @Description Update the next packet number expected on RX;
  66656. + The value of nextPN shall be set to the greater of its existing value and the
  66657. + supplied of updtNextPN (802.1AE-2006 10.7.15).
  66658. +
  66659. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66660. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66661. + @Param[in] an association number represent the SA.
  66662. + @Param[in] updtNextPN the next PN value for a received frame.
  66663. +
  66664. + @Return E_OK on success; Error code otherwise.
  66665. +
  66666. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa().
  66667. +*//***************************************************************************/
  66668. +t_Error FM_MACSEC_SECY_RxSaUpdateNextPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtNextPN);
  66669. +
  66670. +/**************************************************************************//**
  66671. + @Function FM_MACSEC_SECY_RxSaUpdateLowestPn
  66672. +
  66673. + @Description Update the lowest packet number expected on RX;
  66674. + The value of lowestPN shall be set to the greater of its existing value and the
  66675. + supplied of updtLowestPN (802.1AE-2006 10.7.15).
  66676. +
  66677. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66678. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66679. + @Param[in] an association number represent the SA.
  66680. + @Param[in] updtLowestPN the lowest PN acceptable value for a received frame.
  66681. +
  66682. + @Return E_OK on success; Error code otherwise.
  66683. +
  66684. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa().
  66685. +*//***************************************************************************/
  66686. +t_Error FM_MACSEC_SECY_RxSaUpdateLowestPn(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, uint32_t updtLowestPN);
  66687. +
  66688. +/**************************************************************************//**
  66689. + @Function FM_MACSEC_SECY_RxSaModifyKey
  66690. +
  66691. + @Description Modify the current key of the SA with a new one.
  66692. +
  66693. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66694. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66695. + @Param[in] an association number represent the SA.
  66696. + @Param[in] key new key to replace the current key.
  66697. +
  66698. + @Return E_OK on success; Error code otherwise.
  66699. +
  66700. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSa().
  66701. +*//***************************************************************************/
  66702. +t_Error FM_MACSEC_SECY_RxSaModifyKey(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, macsecSAKey_t key);
  66703. +
  66704. +/**************************************************************************//**
  66705. + @Function FM_MACSEC_SECY_CreateTxSa
  66706. +
  66707. + @Description Create a transmit secure association for the secure channel;
  66708. + the SA cannot be used to transmit frames until FM_MACSEC_SECY_TxSaSetActivate is called;
  66709. + Only one SA can be active at a time.
  66710. +
  66711. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66712. + @Param[in] an association number represent the SA.
  66713. + @Param[in] key the desired key for this SA.
  66714. +
  66715. + @Return E_OK on success; Error code otherwise.
  66716. +
  66717. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66718. +*//***************************************************************************/
  66719. +t_Error FM_MACSEC_SECY_CreateTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an, macsecSAKey_t key);
  66720. +
  66721. +/**************************************************************************//**
  66722. + @Function FM_MACSEC_SECY_DeleteTxSa
  66723. +
  66724. + @Description Deleting an initialized secure association.
  66725. +
  66726. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66727. + @Param[in] an association number represent the SA.
  66728. +
  66729. + @Return E_OK on success; Error code otherwise.
  66730. +
  66731. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66732. +*//***************************************************************************/
  66733. +t_Error FM_MACSEC_SECY_DeleteTxSa(t_Handle h_FmMacsecSecY, macsecAN_t an);
  66734. +
  66735. +/**************************************************************************//**
  66736. + @Function FM_MACSEC_SECY_TxSaModifyKey
  66737. +
  66738. + @Description Modify the key of the inactive SA with a new one.
  66739. +
  66740. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66741. + @Param[in] nextActiveAn association number represent the next SA to be activated.
  66742. + @Param[in] key new key to replace the current key.
  66743. +
  66744. + @Return E_OK on success; Error code otherwise.
  66745. +
  66746. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66747. +*//***************************************************************************/
  66748. +t_Error FM_MACSEC_SECY_TxSaModifyKey(t_Handle h_FmMacsecSecY, macsecAN_t nextActiveAn, macsecSAKey_t key);
  66749. +
  66750. +/**************************************************************************//**
  66751. + @Function FM_MACSEC_SECY_TxSaSetActive
  66752. +
  66753. + @Description Set this SA to the active SA to be used on TX for SC;
  66754. + only one SA can be active at a time.
  66755. +
  66756. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66757. + @Param[in] an association number represent the SA.
  66758. +
  66759. + @Return E_OK on success; Error code otherwise.
  66760. +
  66761. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66762. +*//***************************************************************************/
  66763. +t_Error FM_MACSEC_SECY_TxSaSetActive(t_Handle h_FmMacsecSecY, macsecAN_t an);
  66764. +
  66765. +/**************************************************************************//**
  66766. + @Function FM_MACSEC_SECY_TxSaGetActive
  66767. +
  66768. + @Description Get the active SA that being used for TX.
  66769. +
  66770. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66771. + @Param[out] p_An the active an.
  66772. +
  66773. + @Return E_OK on success; Error code otherwise.
  66774. +
  66775. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66776. +*//***************************************************************************/
  66777. +t_Error FM_MACSEC_SECY_TxSaGetActive(t_Handle h_FmMacsecSecY, macsecAN_t *p_An);
  66778. +
  66779. +/**************************************************************************//**
  66780. + @Function FM_MACSEC_SECY_GetStatistics
  66781. +
  66782. + @Description get all statistics counters.
  66783. +
  66784. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66785. + @Param[in] p_Statistics Structure with statistics.
  66786. +
  66787. + @Return E_OK on success; Error code otherwise.
  66788. +
  66789. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66790. +*//***************************************************************************/
  66791. +t_Error FM_MACSEC_SECY_GetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYStatistics *p_Statistics);
  66792. +
  66793. +/**************************************************************************//**
  66794. + @Function FM_MACSEC_SECY_RxScGetStatistics
  66795. +
  66796. + @Description get all statistics counters.
  66797. +
  66798. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66799. + @Param[in] h_Sc Rx Sc handle.
  66800. + @Param[in] p_Statistics Structure with statistics.
  66801. +
  66802. + @Return E_OK on success; Error code otherwise.
  66803. +
  66804. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66805. +*//***************************************************************************/
  66806. +t_Error FM_MACSEC_SECY_RxScGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, t_FmMacsecSecYRxScStatistics *p_Statistics);
  66807. +
  66808. +/**************************************************************************//**
  66809. + @Function FM_MACSEC_SECY_RxSaGetStatistics
  66810. +
  66811. + @Description get all statistics counters
  66812. +
  66813. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66814. + @Param[in] h_Sc Rx Sc handle.
  66815. + @Param[in] an association number represent the SA.
  66816. + @Param[in] p_Statistics Structure with statistics.
  66817. +
  66818. + @Return E_OK on success; Error code otherwise.
  66819. +
  66820. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66821. +*//***************************************************************************/
  66822. +t_Error FM_MACSEC_SECY_RxSaGetStatistics(t_Handle h_FmMacsecSecY, t_Handle h_Sc, macsecAN_t an, t_FmMacsecSecYRxSaStatistics *p_Statistics);
  66823. +
  66824. +/**************************************************************************//**
  66825. + @Function FM_MACSEC_SECY_TxScGetStatistics
  66826. +
  66827. + @Description get all statistics counters.
  66828. +
  66829. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66830. + @Param[in] p_Statistics Structure with statistics.
  66831. +
  66832. + @Return E_OK on success; Error code otherwise.
  66833. +
  66834. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66835. +*//***************************************************************************/
  66836. +t_Error FM_MACSEC_SECY_TxScGetStatistics(t_Handle h_FmMacsecSecY, t_FmMacsecSecYTxScStatistics *p_Statistics);
  66837. +
  66838. +/**************************************************************************//**
  66839. + @Function FM_MACSEC_SECY_TxSaGetStatistics
  66840. +
  66841. + @Description get all statistics counters.
  66842. +
  66843. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66844. + @Param[in] an association number represent the SA.
  66845. + @Param[in] p_Statistics Structure with statistics.
  66846. +
  66847. + @Return E_OK on success; Error code otherwise.
  66848. +
  66849. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66850. +*//***************************************************************************/
  66851. +t_Error FM_MACSEC_SECY_TxSaGetStatistics(t_Handle h_FmMacsecSecY, macsecAN_t an, t_FmMacsecSecYTxSaStatistics *p_Statistics);
  66852. +
  66853. +/**************************************************************************//**
  66854. + @Function FM_MACSEC_SECY_SetException
  66855. +
  66856. + @Description Calling this routine enables/disables the specified exception.
  66857. +
  66858. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66859. + @Param[in] exception The exception to be selected.
  66860. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  66861. +
  66862. + @Return E_OK on success; Error code otherwise.
  66863. +
  66864. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66865. +*//***************************************************************************/
  66866. +t_Error FM_MACSEC_SECY_SetException(t_Handle h_FmMacsecSecY, e_FmMacsecExceptions exception, bool enable);
  66867. +
  66868. +/**************************************************************************//**
  66869. + @Function FM_MACSEC_SECY_SetEvent
  66870. +
  66871. + @Description Calling this routine enables/disables the specified event.
  66872. +
  66873. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66874. + @Param[in] event The event to be selected.
  66875. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  66876. +
  66877. + @Return E_OK on success; Error code otherwise.
  66878. +
  66879. + @Cautions Allowed only following FM_MACSEC_SECY_Config() and before FM_MACSEC_SECY_Init().
  66880. +*//***************************************************************************/
  66881. +t_Error FM_MACSEC_SECY_SetEvent(t_Handle h_FmMacsecSecY, e_FmMacsecSecYEvents event, bool enable);
  66882. +
  66883. +/**************************************************************************//**
  66884. + @Function FM_MACSEC_SECY_GetRxScPhysId
  66885. +
  66886. + @Description return the physical id of the Secure Channel.
  66887. +
  66888. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66889. + @Param[in] h_Sc SC handle as returned by FM_MACSEC_SECY_CreateRxSc.
  66890. + @Param[out] p_ScPhysId the SC physical id.
  66891. +
  66892. + @Return E_OK on success; Error code otherwise.
  66893. +
  66894. + @Cautions Allowed only following FM_MACSEC_SECY_CreateRxSc().
  66895. +*//***************************************************************************/
  66896. +t_Error FM_MACSEC_SECY_GetRxScPhysId(t_Handle h_FmMacsecSecY, t_Handle h_Sc, uint32_t *p_ScPhysId);
  66897. +
  66898. +/**************************************************************************//**
  66899. + @Function FM_MACSEC_SECY_GetTxScPhysId
  66900. +
  66901. + @Description return the physical id of the Secure Channel.
  66902. +
  66903. + @Param[in] h_FmMacsecSecY FM MACSEC SECY module descriptor.
  66904. + @Param[out] p_ScPhysId the SC physical id.
  66905. +
  66906. + @Return E_OK on success; Error code otherwise.
  66907. +
  66908. + @Cautions Allowed only following FM_MACSEC_SECY_Init().
  66909. +*//***************************************************************************/
  66910. +t_Error FM_MACSEC_SECY_GetTxScPhysId(t_Handle h_FmMacsecSecY, uint32_t *p_ScPhysId);
  66911. +
  66912. +/** @} */ /* end of FM_MACSEC_SECY_runtime_control_grp group */
  66913. +/** @} */ /* end of FM_MACSEC_SECY_grp group */
  66914. +/** @} */ /* end of FM_MACSEC_grp group */
  66915. +/** @} */ /* end of FM_grp group */
  66916. +
  66917. +
  66918. +#endif /* __FM_MACSEC_EXT_H */
  66919. --- /dev/null
  66920. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_muram_ext.h
  66921. @@ -0,0 +1,170 @@
  66922. +/*
  66923. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  66924. + *
  66925. + * Redistribution and use in source and binary forms, with or without
  66926. + * modification, are permitted provided that the following conditions are met:
  66927. + * * Redistributions of source code must retain the above copyright
  66928. + * notice, this list of conditions and the following disclaimer.
  66929. + * * Redistributions in binary form must reproduce the above copyright
  66930. + * notice, this list of conditions and the following disclaimer in the
  66931. + * documentation and/or other materials provided with the distribution.
  66932. + * * Neither the name of Freescale Semiconductor nor the
  66933. + * names of its contributors may be used to endorse or promote products
  66934. + * derived from this software without specific prior written permission.
  66935. + *
  66936. + *
  66937. + * ALTERNATIVELY, this software may be distributed under the terms of the
  66938. + * GNU General Public License ("GPL") as published by the Free Software
  66939. + * Foundation, either version 2 of that License or (at your option) any
  66940. + * later version.
  66941. + *
  66942. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  66943. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  66944. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  66945. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  66946. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  66947. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  66948. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  66949. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  66950. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  66951. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  66952. + */
  66953. +
  66954. +
  66955. +/**************************************************************************//**
  66956. + @File fm_muram_ext.h
  66957. +
  66958. + @Description FM MURAM Application Programming Interface.
  66959. +*//***************************************************************************/
  66960. +#ifndef __FM_MURAM_EXT
  66961. +#define __FM_MURAM_EXT
  66962. +
  66963. +#include "error_ext.h"
  66964. +#include "std_ext.h"
  66965. +
  66966. +
  66967. +/**************************************************************************//**
  66968. +
  66969. + @Group FM_grp Frame Manager API
  66970. +
  66971. + @Description FM API functions, definitions and enums
  66972. +
  66973. + @{
  66974. +*//***************************************************************************/
  66975. +
  66976. +/**************************************************************************//**
  66977. + @Group FM_muram_grp FM MURAM
  66978. +
  66979. + @Description FM MURAM API functions, definitions and enums
  66980. +
  66981. + @{
  66982. +*//***************************************************************************/
  66983. +
  66984. +/**************************************************************************//**
  66985. + @Group FM_muram_init_grp FM MURAM Initialization Unit
  66986. +
  66987. + @Description FM MURAM initialization API functions, definitions and enums
  66988. +
  66989. + @{
  66990. +*//***************************************************************************/
  66991. +
  66992. +/**************************************************************************//**
  66993. + @Function FM_MURAM_ConfigAndInit
  66994. +
  66995. + @Description Creates partition in the MURAM.
  66996. +
  66997. + The routine returns a handle (descriptor) to the MURAM partition.
  66998. + This descriptor must be passed as first parameter to all other
  66999. + FM-MURAM function calls.
  67000. +
  67001. + No actual initialization or configuration of FM_MURAM hardware is
  67002. + done by this routine.
  67003. +
  67004. + @Param[in] baseAddress - Pointer to base of memory mapped FM-MURAM.
  67005. + @Param[in] size - Size of the FM-MURAM partition.
  67006. +
  67007. + @Return Handle to FM-MURAM object, or NULL for Failure.
  67008. +*//***************************************************************************/
  67009. +t_Handle FM_MURAM_ConfigAndInit(uintptr_t baseAddress, uint32_t size);
  67010. +
  67011. +/**************************************************************************//**
  67012. + @Function FM_MURAM_Free
  67013. +
  67014. + @Description Frees all resources that were assigned to FM-MURAM module.
  67015. +
  67016. + Calling this routine invalidates the descriptor.
  67017. +
  67018. + @Param[in] h_FmMuram - FM-MURAM module descriptor.
  67019. +
  67020. + @Return E_OK on success; Error code otherwise.
  67021. +*//***************************************************************************/
  67022. +t_Error FM_MURAM_Free(t_Handle h_FmMuram);
  67023. +
  67024. +/** @} */ /* end of FM_muram_init_grp group */
  67025. +
  67026. +
  67027. +/**************************************************************************//**
  67028. + @Group FM_muram_ctrl_grp FM MURAM Control Unit
  67029. +
  67030. + @Description FM MURAM control API functions, definitions and enums
  67031. +
  67032. + @{
  67033. +*//***************************************************************************/
  67034. +
  67035. +/**************************************************************************//**
  67036. + @Function FM_MURAM_AllocMem
  67037. +
  67038. + @Description Allocate some memory from FM-MURAM partition.
  67039. +
  67040. + @Param[in] h_FmMuram - FM-MURAM module descriptor.
  67041. + @Param[in] size - size of the memory to be allocated.
  67042. + @Param[in] align - Alignment of the memory.
  67043. +
  67044. + @Return address of the allocated memory; NULL otherwise.
  67045. +*//***************************************************************************/
  67046. +void * FM_MURAM_AllocMem(t_Handle h_FmMuram, uint32_t size, uint32_t align);
  67047. +
  67048. +/**************************************************************************//**
  67049. + @Function FM_MURAM_AllocMemForce
  67050. +
  67051. + @Description Allocate some specific memory from FM-MURAM partition (according
  67052. + to base).
  67053. +
  67054. + @Param[in] h_FmMuram - FM-MURAM module descriptor.
  67055. + @Param[in] base - the desired base-address to be allocated.
  67056. + @Param[in] size - size of the memory to be allocated.
  67057. +
  67058. + @Return address of the allocated memory; NULL otherwise.
  67059. +*//***************************************************************************/
  67060. +void * FM_MURAM_AllocMemForce(t_Handle h_FmMuram, uint64_t base, uint32_t size);
  67061. +
  67062. +/**************************************************************************//**
  67063. + @Function FM_MURAM_FreeMem
  67064. +
  67065. + @Description Free an allocated memory from FM-MURAM partition.
  67066. +
  67067. + @Param[in] h_FmMuram - FM-MURAM module descriptor.
  67068. + @Param[in] ptr - A pointer to an allocated memory.
  67069. +
  67070. + @Return E_OK on success; Error code otherwise.
  67071. +*//***************************************************************************/
  67072. +t_Error FM_MURAM_FreeMem(t_Handle h_FmMuram, void *ptr);
  67073. +
  67074. +/**************************************************************************//**
  67075. + @Function FM_MURAM_GetFreeMemSize
  67076. +
  67077. + @Description Returns the size (in bytes) of free MURAM memory.
  67078. +
  67079. + @Param[in] h_FmMuram - FM-MURAM module descriptor.
  67080. +
  67081. + @Return Free MURAM memory size in bytes.
  67082. +*//***************************************************************************/
  67083. +uint64_t FM_MURAM_GetFreeMemSize(t_Handle h_FmMuram);
  67084. +
  67085. +/** @} */ /* end of FM_muram_ctrl_grp group */
  67086. +/** @} */ /* end of FM_muram_grp group */
  67087. +/** @} */ /* end of FM_grp group */
  67088. +
  67089. +
  67090. +
  67091. +#endif /* __FM_MURAM_EXT */
  67092. --- /dev/null
  67093. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_pcd_ext.h
  67094. @@ -0,0 +1,3974 @@
  67095. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  67096. + * All rights reserved.
  67097. + *
  67098. + * Redistribution and use in source and binary forms, with or without
  67099. + * modification, are permitted provided that the following conditions are met:
  67100. + * * Redistributions of source code must retain the above copyright
  67101. + * notice, this list of conditions and the following disclaimer.
  67102. + * * Redistributions in binary form must reproduce the above copyright
  67103. + * notice, this list of conditions and the following disclaimer in the
  67104. + * documentation and/or other materials provided with the distribution.
  67105. + * * Neither the name of Freescale Semiconductor nor the
  67106. + * names of its contributors may be used to endorse or promote products
  67107. + * derived from this software without specific prior written permission.
  67108. + *
  67109. + *
  67110. + * ALTERNATIVELY, this software may be distributed under the terms of the
  67111. + * GNU General Public License ("GPL") as published by the Free Software
  67112. + * Foundation, either version 2 of that License or (at your option) any
  67113. + * later version.
  67114. + *
  67115. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  67116. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  67117. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  67118. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  67119. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  67120. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  67121. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  67122. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  67123. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  67124. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  67125. + */
  67126. +
  67127. +
  67128. +/**************************************************************************//**
  67129. + @File fm_pcd_ext.h
  67130. +
  67131. + @Description FM PCD API definitions
  67132. +*//***************************************************************************/
  67133. +#ifndef __FM_PCD_EXT
  67134. +#define __FM_PCD_EXT
  67135. +
  67136. +#include "std_ext.h"
  67137. +#include "net_ext.h"
  67138. +#include "list_ext.h"
  67139. +#include "fm_ext.h"
  67140. +#include "fsl_fman_kg.h"
  67141. +
  67142. +
  67143. +/**************************************************************************//**
  67144. + @Group FM_grp Frame Manager API
  67145. +
  67146. + @Description Frame Manager Application Programming Interface
  67147. +
  67148. + @{
  67149. +*//***************************************************************************/
  67150. +
  67151. +/**************************************************************************//**
  67152. + @Group FM_PCD_grp FM PCD
  67153. +
  67154. + @Description Frame Manager PCD (Parse-Classify-Distribute) API.
  67155. +
  67156. + The FM PCD module is responsible for the initialization of all
  67157. + global classifying FM modules. This includes the parser general and
  67158. + common registers, the key generator global and common registers,
  67159. + and the policer global and common registers.
  67160. + In addition, the FM PCD SW module will initialize all required
  67161. + key generator schemes, coarse classification flows, and policer
  67162. + profiles. When FM module is configured to work with one of these
  67163. + entities, it will register to it using the FM PORT API. The PCD
  67164. + module will manage the PCD resources - i.e. resource management of
  67165. + KeyGen schemes, etc.
  67166. +
  67167. + @{
  67168. +*//***************************************************************************/
  67169. +
  67170. +/**************************************************************************//**
  67171. + @Collection General PCD defines
  67172. +*//***************************************************************************/
  67173. +#define FM_PCD_MAX_NUM_OF_PRIVATE_HDRS 2 /**< Number of units/headers saved for user */
  67174. +
  67175. +#define FM_PCD_PRS_NUM_OF_HDRS 16 /**< Number of headers supported by HW parser */
  67176. +#define FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS (32 - FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
  67177. + /**< Number of distinction units is limited by
  67178. + register size (32 bits) minus reserved bits
  67179. + for private headers. */
  67180. +#define FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS 4 /**< Maximum number of interchangeable headers
  67181. + in a distinction unit */
  67182. +#define FM_PCD_KG_NUM_OF_GENERIC_REGS FM_KG_NUM_OF_GENERIC_REGS /**< Total number of generic KeyGen registers */
  67183. +#define FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY 35 /**< Max number allowed on any configuration;
  67184. + For HW implementation reasons, in most
  67185. + cases less than this will be allowed; The
  67186. + driver will return an initialization error
  67187. + if resource is unavailable. */
  67188. +#define FM_PCD_KG_NUM_OF_EXTRACT_MASKS 4 /**< Total number of masks allowed on KeyGen extractions. */
  67189. +#define FM_PCD_KG_NUM_OF_DEFAULT_GROUPS 16 /**< Number of default value logical groups */
  67190. +
  67191. +#define FM_PCD_PRS_NUM_OF_LABELS 32 /**< Maximum number of SW parser labels */
  67192. +#define FM_SW_PRS_MAX_IMAGE_SIZE (FM_PCD_SW_PRS_SIZE /*- FM_PCD_PRS_SW_OFFSET -FM_PCD_PRS_SW_TAIL_SIZE*/-FM_PCD_PRS_SW_PATCHES_SIZE)
  67193. + /**< Maximum size of SW parser code */
  67194. +
  67195. +#define FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE 128 /**< Maximum size of insertion template for
  67196. + insert manipulation */
  67197. +
  67198. +#if (DPAA_VERSION >= 11)
  67199. +#define FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES 64 /**< Maximum possible entries for frame replicator group */
  67200. +#endif /* (DPAA_VERSION >= 11) */
  67201. +/* @} */
  67202. +
  67203. +
  67204. +/**************************************************************************//**
  67205. + @Group FM_PCD_init_grp FM PCD Initialization Unit
  67206. +
  67207. + @Description Frame Manager PCD Initialization Unit API
  67208. +
  67209. + @{
  67210. +*//***************************************************************************/
  67211. +
  67212. +/**************************************************************************//**
  67213. + @Description PCD counters
  67214. +*//***************************************************************************/
  67215. +typedef enum e_FmPcdCounters {
  67216. + e_FM_PCD_KG_COUNTERS_TOTAL, /**< KeyGen counter */
  67217. + e_FM_PCD_PLCR_COUNTERS_RED, /**< Policer counter - counts the total number of RED packets that exit the Policer. */
  67218. + e_FM_PCD_PLCR_COUNTERS_YELLOW, /**< Policer counter - counts the total number of YELLOW packets that exit the Policer. */
  67219. + e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED, /**< Policer counter - counts the number of packets that changed color to RED by the Policer;
  67220. + This is a subset of e_FM_PCD_PLCR_COUNTERS_RED packet count, indicating active color changes. */
  67221. + e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW, /**< Policer counter - counts the number of packets that changed color to YELLOW by the Policer;
  67222. + This is a subset of e_FM_PCD_PLCR_COUNTERS_YELLOW packet count, indicating active color changes. */
  67223. + e_FM_PCD_PLCR_COUNTERS_TOTAL, /**< Policer counter - counts the total number of packets passed in the Policer. */
  67224. + e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH, /**< Policer counter - counts the number of packets with length mismatch. */
  67225. + e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH, /**< Parser counter - counts the number of times the parser block is dispatched. */
  67226. + e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L2 parse result is returned (including errors). */
  67227. + e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L3 parse result is returned (including errors). */
  67228. + e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L4 parse result is returned (including errors). */
  67229. + e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times SHIM parse result is returned (including errors). */
  67230. + e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L2 parse result is returned with errors. */
  67231. + e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L3 parse result is returned with errors. */
  67232. + e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L4 parse result is returned with errors. */
  67233. + e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times SHIM parse result is returned with errors. */
  67234. + e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES, /**< Parser counter - counts the number of cycles spent executing soft parser instruction (including stall cycles). */
  67235. + e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES, /**< Parser counter - counts the number of cycles stalled waiting for parser internal memory reads while executing soft parser instruction. */
  67236. + e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES, /**< Parser counter - counts the number of cycles spent executing hard parser (including stall cycles). */
  67237. + e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES, /**< MURAM counter - counts the number of cycles while performing FMan Memory read. */
  67238. + e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES, /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory read. */
  67239. + e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES, /**< MURAM counter - counts the number of cycles while performing FMan Memory write. */
  67240. + e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES, /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory write. */
  67241. + e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES /**< FPM counter - counts the number of cycles stalled while performing a FPM Command. */
  67242. +} e_FmPcdCounters;
  67243. +
  67244. +/**************************************************************************//**
  67245. + @Description PCD interrupts
  67246. +*//***************************************************************************/
  67247. +typedef enum e_FmPcdExceptions {
  67248. + e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC, /**< KeyGen double-bit ECC error is detected on internal memory read access. */
  67249. + e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW, /**< KeyGen scheme configuration error indicating a key size larger than 56 bytes. */
  67250. + e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC, /**< Policer double-bit ECC error has been detected on PRAM read access. */
  67251. + e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR, /**< Policer access to a non-initialized profile has been detected. */
  67252. + e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE, /**< Policer RAM self-initialization complete */
  67253. + e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE, /**< Policer atomic action complete */
  67254. + e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC, /**< Parser double-bit ECC error */
  67255. + e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC /**< Parser single-bit ECC error */
  67256. +} e_FmPcdExceptions;
  67257. +
  67258. +
  67259. +/**************************************************************************//**
  67260. + @Description Exceptions user callback routine, will be called upon an
  67261. + exception passing the exception identification.
  67262. +
  67263. + @Param[in] h_App - User's application descriptor.
  67264. + @Param[in] exception - The exception.
  67265. + *//***************************************************************************/
  67266. +typedef void (t_FmPcdExceptionCallback) (t_Handle h_App, e_FmPcdExceptions exception);
  67267. +
  67268. +/**************************************************************************//**
  67269. + @Description Exceptions user callback routine, will be called upon an exception
  67270. + passing the exception identification.
  67271. +
  67272. + @Param[in] h_App - User's application descriptor.
  67273. + @Param[in] exception - The exception.
  67274. + @Param[in] index - id of the relevant source (may be scheme or profile id).
  67275. + *//***************************************************************************/
  67276. +typedef void (t_FmPcdIdExceptionCallback) ( t_Handle h_App,
  67277. + e_FmPcdExceptions exception,
  67278. + uint16_t index);
  67279. +
  67280. +/**************************************************************************//**
  67281. + @Description A callback for enqueuing frame onto a QM queue.
  67282. +
  67283. + @Param[in] h_QmArg - Application's handle passed to QM module on enqueue.
  67284. + @Param[in] p_Fd - Frame descriptor for the frame.
  67285. +
  67286. + @Return E_OK on success; Error code otherwise.
  67287. + *//***************************************************************************/
  67288. +typedef t_Error (t_FmPcdQmEnqueueCallback) (t_Handle h_QmArg, void *p_Fd);
  67289. +
  67290. +/**************************************************************************//**
  67291. + @Description Host-Command parameters structure.
  67292. +
  67293. + When using Host command for PCD functionalities, a dedicated port
  67294. + must be used. If this routine is called for a PCD in a single partition
  67295. + environment, or it is the Master partition in a Multi-partition
  67296. + environment, The port will be initialized by the PCD driver
  67297. + initialization routine.
  67298. + *//***************************************************************************/
  67299. +typedef struct t_FmPcdHcParams {
  67300. + uintptr_t portBaseAddr; /**< Virtual Address of Host-Command Port memory mapped registers.*/
  67301. + uint8_t portId; /**< Port Id (0-6 relative to Host-Command/Offline-Parsing ports);
  67302. + NOTE: When configuring Host Command port for
  67303. + FMANv3 devices (DPAA_VERSION 11 and higher),
  67304. + portId=0 MUST be used. */
  67305. + uint16_t liodnBase; /**< LIODN base for this port, to be used together with LIODN offset
  67306. + (irrelevant for P4080 revision 1.0) */
  67307. + uint32_t errFqid; /**< Host-Command Port error queue Id. */
  67308. + uint32_t confFqid; /**< Host-Command Port confirmation queue Id. */
  67309. + uint32_t qmChannel; /**< QM channel dedicated to this Host-Command port;
  67310. + will be used by the FM for dequeue. */
  67311. + t_FmPcdQmEnqueueCallback *f_QmEnqueue; /**< Callback routine for enqueuing a frame to the QM */
  67312. + t_Handle h_QmArg; /**< Application's handle passed to QM module on enqueue */
  67313. +} t_FmPcdHcParams;
  67314. +
  67315. +/**************************************************************************//**
  67316. + @Description The main structure for PCD initialization
  67317. + *//***************************************************************************/
  67318. +typedef struct t_FmPcdParams {
  67319. + bool prsSupport; /**< TRUE if Parser will be used for any of the FM ports. */
  67320. + bool ccSupport; /**< TRUE if Coarse Classification will be used for any
  67321. + of the FM ports. */
  67322. + bool kgSupport; /**< TRUE if KeyGen will be used for any of the FM ports. */
  67323. + bool plcrSupport; /**< TRUE if Policer will be used for any of the FM ports. */
  67324. + t_Handle h_Fm; /**< A handle to the FM module. */
  67325. + uint8_t numOfSchemes; /**< Number of schemes dedicated to this partition.
  67326. + this parameter is relevant if 'kgSupport'=TRUE. */
  67327. + bool useHostCommand; /**< Optional for single partition, Mandatory for Multi partition */
  67328. + t_FmPcdHcParams hc; /**< Host Command parameters, relevant only if 'useHostCommand'=TRUE;
  67329. + Relevant when FM not runs in "guest-mode". */
  67330. +
  67331. + t_FmPcdExceptionCallback *f_Exception; /**< Callback routine for general PCD exceptions;
  67332. + Relevant when FM not runs in "guest-mode". */
  67333. + t_FmPcdIdExceptionCallback *f_ExceptionId; /**< Callback routine for specific KeyGen scheme or
  67334. + Policer profile exceptions;
  67335. + Relevant when FM not runs in "guest-mode". */
  67336. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  67337. + be passed by the driver upon calling the above callbacks;
  67338. + Relevant when FM not runs in "guest-mode". */
  67339. + uint8_t partPlcrProfilesBase; /**< The first policer-profile-id dedicated to this partition.
  67340. + this parameter is relevant if 'plcrSupport'=TRUE.
  67341. + NOTE: this parameter relevant only when working with multiple partitions. */
  67342. + uint16_t partNumOfPlcrProfiles; /**< Number of policer-profiles dedicated to this partition.
  67343. + this parameter is relevant if 'plcrSupport'=TRUE.
  67344. + NOTE: this parameter relevant only when working with multiple partitions. */
  67345. +} t_FmPcdParams;
  67346. +
  67347. +
  67348. +/**************************************************************************//**
  67349. + @Function FM_PCD_Config
  67350. +
  67351. + @Description Basic configuration of the PCD module.
  67352. + Creates descriptor for the FM PCD module.
  67353. +
  67354. + @Param[in] p_FmPcdParams A structure of parameters for the initialization of PCD.
  67355. +
  67356. + @Return A handle to the initialized module.
  67357. +*//***************************************************************************/
  67358. +t_Handle FM_PCD_Config(t_FmPcdParams *p_FmPcdParams);
  67359. +
  67360. +/**************************************************************************//**
  67361. + @Function FM_PCD_Init
  67362. +
  67363. + @Description Initialization of the PCD module.
  67364. +
  67365. + @Param[in] h_FmPcd - FM PCD module descriptor.
  67366. +
  67367. + @Return E_OK on success; Error code otherwise.
  67368. +*//***************************************************************************/
  67369. +t_Error FM_PCD_Init(t_Handle h_FmPcd);
  67370. +
  67371. +/**************************************************************************//**
  67372. + @Function FM_PCD_Free
  67373. +
  67374. + @Description Frees all resources that were assigned to FM module.
  67375. +
  67376. + Calling this routine invalidates the descriptor.
  67377. +
  67378. + @Param[in] h_FmPcd - FM PCD module descriptor.
  67379. +
  67380. + @Return E_OK on success; Error code otherwise.
  67381. +*//***************************************************************************/
  67382. +t_Error FM_PCD_Free(t_Handle h_FmPcd);
  67383. +
  67384. +/**************************************************************************//**
  67385. + @Group FM_PCD_advanced_cfg_grp FM PCD Advanced Configuration Unit
  67386. +
  67387. + @Description Frame Manager PCD Advanced Configuration API.
  67388. +
  67389. + @{
  67390. +*//***************************************************************************/
  67391. +
  67392. +/**************************************************************************//**
  67393. + @Function FM_PCD_ConfigException
  67394. +
  67395. + @Description Calling this routine changes the internal driver data base
  67396. + from its default selection of exceptions enabling.
  67397. + [DEFAULT_numOfSharedPlcrProfiles].
  67398. +
  67399. + @Param[in] h_FmPcd FM PCD module descriptor.
  67400. + @Param[in] exception The exception to be selected.
  67401. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  67402. +
  67403. + @Return E_OK on success; Error code otherwise.
  67404. +
  67405. + @Cautions This routine should NOT be called from guest-partition
  67406. + (i.e. guestId != NCSW_MASTER_ID)
  67407. +*//***************************************************************************/
  67408. +t_Error FM_PCD_ConfigException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable);
  67409. +
  67410. +/**************************************************************************//**
  67411. + @Function FM_PCD_ConfigHcFramesDataMemory
  67412. +
  67413. + @Description Configures memory-partition-id for FMan-Controller Host-Command
  67414. + frames. Calling this routine changes the internal driver data
  67415. + base from its default configuration [0].
  67416. +
  67417. + @Param[in] h_FmPcd FM PCD module descriptor.
  67418. + @Param[in] memId Memory partition ID.
  67419. +
  67420. + @Return E_OK on success; Error code otherwise.
  67421. +
  67422. + @Cautions This routine may be called only if 'useHostCommand' was TRUE
  67423. + when FM_PCD_Config() routine was called.
  67424. +*//***************************************************************************/
  67425. +t_Error FM_PCD_ConfigHcFramesDataMemory(t_Handle h_FmPcd, uint8_t memId);
  67426. +
  67427. +/**************************************************************************//**
  67428. + @Function FM_PCD_ConfigPlcrNumOfSharedProfiles
  67429. +
  67430. + @Description Calling this routine changes the internal driver data base
  67431. + from its default selection of exceptions enablement.
  67432. + [DEFAULT_numOfSharedPlcrProfiles].
  67433. +
  67434. + @Param[in] h_FmPcd FM PCD module descriptor.
  67435. + @Param[in] numOfSharedPlcrProfiles Number of profiles to
  67436. + be shared between ports on this partition
  67437. +
  67438. + @Return E_OK on success; Error code otherwise.
  67439. +*//***************************************************************************/
  67440. +t_Error FM_PCD_ConfigPlcrNumOfSharedProfiles(t_Handle h_FmPcd, uint16_t numOfSharedPlcrProfiles);
  67441. +
  67442. +/**************************************************************************//**
  67443. + @Function FM_PCD_ConfigPlcrAutoRefreshMode
  67444. +
  67445. + @Description Calling this routine changes the internal driver data base
  67446. + from its default selection of exceptions enablement.
  67447. + By default auto-refresh is [DEFAULT_plcrAutoRefresh].
  67448. +
  67449. + @Param[in] h_FmPcd FM PCD module descriptor.
  67450. + @Param[in] enable TRUE to enable, FALSE to disable
  67451. +
  67452. + @Return E_OK on success; Error code otherwise.
  67453. +
  67454. + @Cautions This routine should NOT be called from guest-partition
  67455. + (i.e. guestId != NCSW_MASTER_ID)
  67456. +*//***************************************************************************/
  67457. +t_Error FM_PCD_ConfigPlcrAutoRefreshMode(t_Handle h_FmPcd, bool enable);
  67458. +
  67459. +/**************************************************************************//**
  67460. + @Function FM_PCD_ConfigPrsMaxCycleLimit
  67461. +
  67462. + @Description Calling this routine changes the internal data structure for
  67463. + the maximum parsing time from its default value
  67464. + [DEFAULT_MAX_PRS_CYC_LIM].
  67465. +
  67466. + @Param[in] h_FmPcd FM PCD module descriptor.
  67467. + @Param[in] value 0 to disable the mechanism, or new
  67468. + maximum parsing time.
  67469. +
  67470. + @Return E_OK on success; Error code otherwise.
  67471. +
  67472. + @Cautions This routine should NOT be called from guest-partition
  67473. + (i.e. guestId != NCSW_MASTER_ID)
  67474. +*//***************************************************************************/
  67475. +t_Error FM_PCD_ConfigPrsMaxCycleLimit(t_Handle h_FmPcd,uint16_t value);
  67476. +
  67477. +/** @} */ /* end of FM_PCD_advanced_cfg_grp group */
  67478. +/** @} */ /* end of FM_PCD_init_grp group */
  67479. +
  67480. +
  67481. +/**************************************************************************//**
  67482. + @Group FM_PCD_Runtime_grp FM PCD Runtime Unit
  67483. +
  67484. + @Description Frame Manager PCD Runtime Unit API
  67485. +
  67486. + The runtime control allows creation of PCD infrastructure modules
  67487. + such as Network Environment Characteristics, Classification Plan
  67488. + Groups and Coarse Classification Trees.
  67489. + It also allows on-the-fly initialization, modification and removal
  67490. + of PCD modules such as KeyGen schemes, coarse classification nodes
  67491. + and Policer profiles.
  67492. +
  67493. + In order to explain the programming model of the PCD driver interface
  67494. + a few terms should be explained, and will be used below.
  67495. + - Distinction Header - One of the 16 protocols supported by the FM parser,
  67496. + or one of the SHIM headers (1 or 2). May be a header with a special
  67497. + option (see below).
  67498. + - Interchangeable Headers Group - This is a group of Headers recognized
  67499. + by either one of them. For example, if in a specific context the user
  67500. + chooses to treat IPv4 and IPV6 in the same way, they may create an
  67501. + interchangeable Headers Unit consisting of these 2 headers.
  67502. + - A Distinction Unit - a Distinction Header or an Interchangeable Headers
  67503. + Group.
  67504. + - Header with special option - applies to Ethernet, MPLS, VLAN, IPv4 and
  67505. + IPv6, includes multicast, broadcast and other protocol specific options.
  67506. + In terms of hardware it relates to the options available in the classification
  67507. + plan.
  67508. + - Network Environment Characteristics - a set of Distinction Units that define
  67509. + the total recognizable header selection for a certain environment. This is
  67510. + NOT the list of all headers that will ever appear in a flow, but rather
  67511. + everything that needs distinction in a flow, where distinction is made by KeyGen
  67512. + schemes and coarse classification action descriptors.
  67513. +
  67514. + The PCD runtime modules initialization is done in stages. The first stage after
  67515. + initializing the PCD module itself is to establish a Network Flows Environment
  67516. + Definition. The application may choose to establish one or more such environments.
  67517. + Later, when needed, the application will have to state, for some of its modules,
  67518. + to which single environment it belongs.
  67519. +
  67520. + @{
  67521. +*//***************************************************************************/
  67522. +
  67523. +/**************************************************************************//**
  67524. + @Description A structure for SW parser labels
  67525. + *//***************************************************************************/
  67526. +typedef struct t_FmPcdPrsLabelParams {
  67527. + uint32_t instructionOffset; /**< SW parser label instruction offset (2 bytes
  67528. + resolution), relative to Parser RAM. */
  67529. + e_NetHeaderType hdr; /**< The existence of this header will invoke
  67530. + the SW parser code; Use HEADER_TYPE_NONE
  67531. + to indicate that sw parser is to run
  67532. + independent of the existence of any protocol
  67533. + (run before HW parser). */
  67534. + uint8_t indexPerHdr; /**< Normally 0, if more than one SW parser
  67535. + attachments for the same header, use this
  67536. + index to distinguish between them. */
  67537. +} t_FmPcdPrsLabelParams;
  67538. +
  67539. +/**************************************************************************//**
  67540. + @Description A structure for SW parser
  67541. + *//***************************************************************************/
  67542. +typedef struct t_FmPcdPrsSwParams {
  67543. + bool override; /**< FALSE to invoke a check that nothing else
  67544. + was loaded to this address, including
  67545. + internal patches.
  67546. + TRUE to override any existing code.*/
  67547. + uint32_t size; /**< SW parser code size */
  67548. + uint16_t base; /**< SW parser base (in instruction counts!
  67549. + must be larger than 0x20)*/
  67550. + uint8_t *p_Code; /**< SW parser code */
  67551. + uint32_t swPrsDataParams[FM_PCD_PRS_NUM_OF_HDRS];
  67552. + /**< SW parser data (parameters) */
  67553. + uint8_t numOfLabels; /**< Number of labels for SW parser. */
  67554. + t_FmPcdPrsLabelParams labelsTable[FM_PCD_PRS_NUM_OF_LABELS];
  67555. + /**< SW parser labels table, containing
  67556. + numOfLabels entries */
  67557. +} t_FmPcdPrsSwParams;
  67558. +
  67559. +
  67560. +/**************************************************************************//**
  67561. + @Function FM_PCD_Enable
  67562. +
  67563. + @Description This routine should be called after PCD is initialized for enabling all
  67564. + PCD engines according to their existing configuration.
  67565. +
  67566. + @Param[in] h_FmPcd FM PCD module descriptor.
  67567. +
  67568. + @Return E_OK on success; Error code otherwise.
  67569. +
  67570. + @Cautions Allowed only following FM_PCD_Init() and when PCD is disabled.
  67571. +*//***************************************************************************/
  67572. +t_Error FM_PCD_Enable(t_Handle h_FmPcd);
  67573. +
  67574. +/**************************************************************************//**
  67575. + @Function FM_PCD_Disable
  67576. +
  67577. + @Description This routine may be called when PCD is enabled in order to
  67578. + disable all PCD engines. It may be called
  67579. + only when none of the ports in the system are using the PCD.
  67580. +
  67581. + @Param[in] h_FmPcd FM PCD module descriptor.
  67582. +
  67583. + @Return E_OK on success; Error code otherwise.
  67584. +
  67585. + @Cautions Allowed only following FM_PCD_Init() and when PCD is enabled.
  67586. +*//***************************************************************************/
  67587. +t_Error FM_PCD_Disable(t_Handle h_FmPcd);
  67588. +
  67589. +/**************************************************************************//**
  67590. + @Function FM_PCD_GetCounter
  67591. +
  67592. + @Description Reads one of the FM PCD counters.
  67593. +
  67594. + @Param[in] h_FmPcd FM PCD module descriptor.
  67595. + @Param[in] counter The requested counter.
  67596. +
  67597. + @Return Counter's current value.
  67598. +
  67599. + @Cautions Allowed only following FM_PCD_Init().
  67600. + Note that it is user's responsibility to call this routine only
  67601. + for enabled counters, and there will be no indication if a
  67602. + disabled counter is accessed.
  67603. +*//***************************************************************************/
  67604. +uint32_t FM_PCD_GetCounter(t_Handle h_FmPcd, e_FmPcdCounters counter);
  67605. +
  67606. +/**************************************************************************//**
  67607. +@Function FM_PCD_PrsLoadSw
  67608. +
  67609. +@Description This routine may be called in order to load software parsing code.
  67610. +
  67611. +
  67612. +@Param[in] h_FmPcd FM PCD module descriptor.
  67613. +@Param[in] p_SwPrs A pointer to a structure of software
  67614. + parser parameters, including the software
  67615. + parser image.
  67616. +
  67617. +@Return E_OK on success; Error code otherwise.
  67618. +
  67619. +@Cautions Allowed only following FM_PCD_Init() and when PCD is disabled.
  67620. + This routine should NOT be called from guest-partition
  67621. + (i.e. guestId != NCSW_MASTER_ID)
  67622. +*//***************************************************************************/
  67623. +t_Error FM_PCD_PrsLoadSw(t_Handle h_FmPcd, t_FmPcdPrsSwParams *p_SwPrs);
  67624. +
  67625. +/**************************************************************************//**
  67626. +@Function FM_PCD_SetAdvancedOffloadSupport
  67627. +
  67628. +@Description This routine must be called in order to support the following features:
  67629. + IP-fragmentation, IP-reassembly, IPsec, Header-manipulation, frame-replicator.
  67630. +
  67631. +@Param[in] h_FmPcd FM PCD module descriptor.
  67632. +
  67633. +@Return E_OK on success; Error code otherwise.
  67634. +
  67635. +@Cautions Allowed only following FM_PCD_Init() and when PCD is disabled.
  67636. + This routine should NOT be called from guest-partition
  67637. + (i.e. guestId != NCSW_MASTER_ID)
  67638. +*//***************************************************************************/
  67639. +t_Error FM_PCD_SetAdvancedOffloadSupport(t_Handle h_FmPcd);
  67640. +
  67641. +/**************************************************************************//**
  67642. + @Function FM_PCD_KgSetDfltValue
  67643. +
  67644. + @Description Calling this routine sets a global default value to be used
  67645. + by the KeyGen when parser does not recognize a required
  67646. + field/header.
  67647. + By default default values are 0.
  67648. +
  67649. + @Param[in] h_FmPcd FM PCD module descriptor.
  67650. + @Param[in] valueId 0,1 - one of 2 global default values.
  67651. + @Param[in] value The requested default value.
  67652. +
  67653. + @Return E_OK on success; Error code otherwise.
  67654. +
  67655. + @Cautions Allowed only following FM_PCD_Init() and when PCD is disabled.
  67656. + This routine should NOT be called from guest-partition
  67657. + (i.e. guestId != NCSW_MASTER_ID)
  67658. +*//***************************************************************************/
  67659. +t_Error FM_PCD_KgSetDfltValue(t_Handle h_FmPcd, uint8_t valueId, uint32_t value);
  67660. +
  67661. +/**************************************************************************//**
  67662. + @Function FM_PCD_KgSetAdditionalDataAfterParsing
  67663. +
  67664. + @Description Calling this routine allows the KeyGen to access data past
  67665. + the parser finishing point.
  67666. +
  67667. + @Param[in] h_FmPcd FM PCD module descriptor.
  67668. + @Param[in] payloadOffset the number of bytes beyond the parser location.
  67669. +
  67670. + @Return E_OK on success; Error code otherwise.
  67671. +
  67672. + @Cautions Allowed only following FM_PCD_Init() and when PCD is disabled.
  67673. + This routine should NOT be called from guest-partition
  67674. + (i.e. guestId != NCSW_MASTER_ID)
  67675. +*//***************************************************************************/
  67676. +t_Error FM_PCD_KgSetAdditionalDataAfterParsing(t_Handle h_FmPcd, uint8_t payloadOffset);
  67677. +
  67678. +/**************************************************************************//**
  67679. + @Function FM_PCD_SetException
  67680. +
  67681. + @Description Calling this routine enables/disables PCD interrupts.
  67682. +
  67683. + @Param[in] h_FmPcd FM PCD module descriptor.
  67684. + @Param[in] exception The exception to be selected.
  67685. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  67686. +
  67687. + @Return E_OK on success; Error code otherwise.
  67688. +
  67689. + @Cautions Allowed only following FM_PCD_Init().
  67690. + This routine should NOT be called from guest-partition
  67691. + (i.e. guestId != NCSW_MASTER_ID)
  67692. +*//***************************************************************************/
  67693. +t_Error FM_PCD_SetException(t_Handle h_FmPcd, e_FmPcdExceptions exception, bool enable);
  67694. +
  67695. +/**************************************************************************//**
  67696. + @Function FM_PCD_ModifyCounter
  67697. +
  67698. + @Description Sets a value to an enabled counter. Use "0" to reset the counter.
  67699. +
  67700. + @Param[in] h_FmPcd FM PCD module descriptor.
  67701. + @Param[in] counter The requested counter.
  67702. + @Param[in] value The requested value to be written into the counter.
  67703. +
  67704. + @Return E_OK on success; Error code otherwise.
  67705. +
  67706. + @Cautions Allowed only following FM_PCD_Init().
  67707. + This routine should NOT be called from guest-partition
  67708. + (i.e. guestId != NCSW_MASTER_ID)
  67709. +*//***************************************************************************/
  67710. +t_Error FM_PCD_ModifyCounter(t_Handle h_FmPcd, e_FmPcdCounters counter, uint32_t value);
  67711. +
  67712. +/**************************************************************************//**
  67713. + @Function FM_PCD_SetPlcrStatistics
  67714. +
  67715. + @Description This routine may be used to enable/disable policer statistics
  67716. + counter. By default the statistics is enabled.
  67717. +
  67718. + @Param[in] h_FmPcd FM PCD module descriptor
  67719. + @Param[in] enable TRUE to enable, FALSE to disable.
  67720. +
  67721. + @Return E_OK on success; Error code otherwise.
  67722. +
  67723. + @Cautions Allowed only following FM_PCD_Init().
  67724. + This routine should NOT be called from guest-partition
  67725. + (i.e. guestId != NCSW_MASTER_ID)
  67726. +*//***************************************************************************/
  67727. +t_Error FM_PCD_SetPlcrStatistics(t_Handle h_FmPcd, bool enable);
  67728. +
  67729. +/**************************************************************************//**
  67730. + @Function FM_PCD_SetPrsStatistics
  67731. +
  67732. + @Description Defines whether to gather parser statistics including all ports.
  67733. +
  67734. + @Param[in] h_FmPcd FM PCD module descriptor.
  67735. + @Param[in] enable TRUE to enable, FALSE to disable.
  67736. +
  67737. + @Return None
  67738. +
  67739. + @Cautions Allowed only following FM_PCD_Init().
  67740. + This routine should NOT be called from guest-partition
  67741. + (i.e. guestId != NCSW_MASTER_ID)
  67742. +*//***************************************************************************/
  67743. +void FM_PCD_SetPrsStatistics(t_Handle h_FmPcd, bool enable);
  67744. +
  67745. +/**************************************************************************//**
  67746. + @Function FM_PCD_HcTxConf
  67747. +
  67748. + @Description This routine should be called to confirm frames that were
  67749. + received on the HC confirmation queue.
  67750. +
  67751. + @Param[in] h_FmPcd A handle to an FM PCD Module.
  67752. + @Param[in] p_Fd Frame descriptor of the received frame.
  67753. +
  67754. + @Cautions Allowed only following FM_PCD_Init(). Allowed only if 'useHostCommand'
  67755. + option was selected in the initialization.
  67756. +*//***************************************************************************/
  67757. +void FM_PCD_HcTxConf(t_Handle h_FmPcd, t_DpaaFD *p_Fd);
  67758. +
  67759. +/**************************************************************************//*
  67760. + @Function FM_PCD_ForceIntr
  67761. +
  67762. + @Description Causes an interrupt event on the requested source.
  67763. +
  67764. + @Param[in] h_FmPcd FM PCD module descriptor.
  67765. + @Param[in] exception An exception to be forced.
  67766. +
  67767. + @Return E_OK on success; Error code if the exception is not enabled,
  67768. + or is not able to create interrupt.
  67769. +
  67770. + @Cautions Allowed only following FM_PCD_Init().
  67771. + This routine should NOT be called from guest-partition
  67772. + (i.e. guestId != NCSW_MASTER_ID)
  67773. +*//***************************************************************************/
  67774. +t_Error FM_PCD_ForceIntr (t_Handle h_FmPcd, e_FmPcdExceptions exception);
  67775. +
  67776. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  67777. +/**************************************************************************//**
  67778. + @Function FM_PCD_DumpRegs
  67779. +
  67780. + @Description Dumps all PCD registers
  67781. +
  67782. + @Param[in] h_FmPcd A handle to an FM PCD Module.
  67783. +
  67784. + @Return E_OK on success; Error code otherwise.
  67785. +
  67786. + @Cautions Allowed only following FM_PCD_Init().
  67787. + NOTE: this routine may be called only for FM in master mode
  67788. + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
  67789. + are mapped.
  67790. +*//***************************************************************************/
  67791. +t_Error FM_PCD_DumpRegs(t_Handle h_FmPcd);
  67792. +
  67793. +/**************************************************************************//**
  67794. + @Function FM_PCD_KgDumpRegs
  67795. +
  67796. + @Description Dumps all PCD KG registers
  67797. +
  67798. + @Param[in] h_FmPcd A handle to an FM PCD Module.
  67799. +
  67800. + @Return E_OK on success; Error code otherwise.
  67801. +
  67802. + @Cautions Allowed only following FM_PCD_Init().
  67803. + NOTE: this routine may be called only for FM in master mode
  67804. + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
  67805. + are mapped.
  67806. +*//***************************************************************************/
  67807. +t_Error FM_PCD_KgDumpRegs(t_Handle h_FmPcd);
  67808. +
  67809. +/**************************************************************************//**
  67810. + @Function FM_PCD_PlcrDumpRegs
  67811. +
  67812. + @Description Dumps all PCD Policer registers
  67813. +
  67814. + @Param[in] h_FmPcd A handle to an FM PCD Module.
  67815. +
  67816. + @Return E_OK on success; Error code otherwise.
  67817. +
  67818. + @Cautions Allowed only following FM_PCD_Init().
  67819. + NOTE: this routine may be called only for FM in master mode
  67820. + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
  67821. + are mapped.
  67822. +*//***************************************************************************/
  67823. +t_Error FM_PCD_PlcrDumpRegs(t_Handle h_FmPcd);
  67824. +
  67825. +/**************************************************************************//**
  67826. + @Function FM_PCD_PlcrProfileDumpRegs
  67827. +
  67828. + @Description Dumps all PCD Policer profile registers
  67829. +
  67830. + @Param[in] h_Profile A handle to a Policer profile.
  67831. +
  67832. + @Return E_OK on success; Error code otherwise.
  67833. +
  67834. + @Cautions Allowed only following FM_PCD_Init().
  67835. + NOTE: this routine may be called only for FM in master mode
  67836. + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
  67837. + are mapped.
  67838. +*//***************************************************************************/
  67839. +t_Error FM_PCD_PlcrProfileDumpRegs(t_Handle h_Profile);
  67840. +
  67841. +/**************************************************************************//**
  67842. + @Function FM_PCD_PrsDumpRegs
  67843. +
  67844. + @Description Dumps all PCD Parser registers
  67845. +
  67846. + @Param[in] h_FmPcd A handle to an FM PCD Module.
  67847. +
  67848. + @Return E_OK on success; Error code otherwise.
  67849. +
  67850. + @Cautions Allowed only following FM_PCD_Init().
  67851. + NOTE: this routine may be called only for FM in master mode
  67852. + (i.e. 'guestId'=NCSW_MASTER_ID) or in a case that the registers
  67853. + are mapped.
  67854. +*//***************************************************************************/
  67855. +t_Error FM_PCD_PrsDumpRegs(t_Handle h_FmPcd);
  67856. +
  67857. +/**************************************************************************//**
  67858. + @Function FM_PCD_HcDumpRegs
  67859. +
  67860. + @Description Dumps HC Port registers
  67861. +
  67862. + @Param[in] h_FmPcd A handle to an FM PCD Module.
  67863. +
  67864. + @Return E_OK on success; Error code otherwise.
  67865. +
  67866. + @Cautions Allowed only following FM_PCD_Init().
  67867. + NOTE: this routine may be called only for FM in master mode
  67868. + (i.e. 'guestId'=NCSW_MASTER_ID).
  67869. +*//***************************************************************************/
  67870. +t_Error FM_PCD_HcDumpRegs(t_Handle h_FmPcd);
  67871. +#endif /* (defined(DEBUG_ERRORS) && ... */
  67872. +
  67873. +
  67874. +
  67875. +/**************************************************************************//**
  67876. + KeyGen FM_PCD_Runtime_build_grp FM PCD Runtime Building Unit
  67877. +
  67878. + @Description Frame Manager PCD Runtime Building API
  67879. +
  67880. + This group contains routines for setting, deleting and modifying
  67881. + PCD resources, for defining the total PCD tree.
  67882. + @{
  67883. +*//***************************************************************************/
  67884. +
  67885. +/**************************************************************************//**
  67886. + @Collection Definitions of coarse classification
  67887. + parameters as required by KeyGen (when coarse classification
  67888. + is the next engine after this scheme).
  67889. +*//***************************************************************************/
  67890. +#define FM_PCD_MAX_NUM_OF_CC_TREES 8
  67891. +#define FM_PCD_MAX_NUM_OF_CC_GROUPS 16
  67892. +#define FM_PCD_MAX_NUM_OF_CC_UNITS 4
  67893. +#define FM_PCD_MAX_NUM_OF_KEYS 256
  67894. +#define FM_PCD_MAX_NUM_OF_FLOWS (4*KILOBYTE)
  67895. +#define FM_PCD_MAX_SIZE_OF_KEY 56
  67896. +#define FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP 16
  67897. +#define FM_PCD_LAST_KEY_INDEX 0xffff
  67898. +
  67899. +#define FM_PCD_MAX_NUM_OF_CC_NODES 255 /* Obsolete, not used - will be removed in the future */
  67900. +/* @} */
  67901. +
  67902. +/**************************************************************************//**
  67903. + @Collection A set of definitions to allow protocol
  67904. + special option description.
  67905. +*//***************************************************************************/
  67906. +typedef uint32_t protocolOpt_t; /**< A general type to define a protocol option. */
  67907. +
  67908. +typedef protocolOpt_t ethProtocolOpt_t; /**< Ethernet protocol options. */
  67909. +#define ETH_BROADCAST 0x80000000 /**< Ethernet Broadcast. */
  67910. +#define ETH_MULTICAST 0x40000000 /**< Ethernet Multicast. */
  67911. +
  67912. +typedef protocolOpt_t vlanProtocolOpt_t; /**< VLAN protocol options. */
  67913. +#define VLAN_STACKED 0x20000000 /**< Stacked VLAN. */
  67914. +
  67915. +typedef protocolOpt_t mplsProtocolOpt_t; /**< MPLS protocol options. */
  67916. +#define MPLS_STACKED 0x10000000 /**< Stacked MPLS. */
  67917. +
  67918. +typedef protocolOpt_t ipv4ProtocolOpt_t; /**< IPv4 protocol options. */
  67919. +#define IPV4_BROADCAST_1 0x08000000 /**< IPv4 Broadcast. */
  67920. +#define IPV4_MULTICAST_1 0x04000000 /**< IPv4 Multicast. */
  67921. +#define IPV4_UNICAST_2 0x02000000 /**< Tunneled IPv4 - Unicast. */
  67922. +#define IPV4_MULTICAST_BROADCAST_2 0x01000000 /**< Tunneled IPv4 - Broadcast/Multicast. */
  67923. +
  67924. +#define IPV4_FRAG_1 0x00000008 /**< IPV4 reassembly option.
  67925. + IPV4 Reassembly manipulation requires network
  67926. + environment with IPV4 header and IPV4_FRAG_1 option */
  67927. +
  67928. +typedef protocolOpt_t ipv6ProtocolOpt_t; /**< IPv6 protocol options. */
  67929. +#define IPV6_MULTICAST_1 0x00800000 /**< IPv6 Multicast. */
  67930. +#define IPV6_UNICAST_2 0x00400000 /**< Tunneled IPv6 - Unicast. */
  67931. +#define IPV6_MULTICAST_2 0x00200000 /**< Tunneled IPv6 - Multicast. */
  67932. +
  67933. +#define IPV6_FRAG_1 0x00000004 /**< IPV6 reassembly option.
  67934. + IPV6 Reassembly manipulation requires network
  67935. + environment with IPV6 header and IPV6_FRAG_1 option;
  67936. + in case where fragment found, the fragment-extension offset
  67937. + may be found at 'shim2' (in parser-result). */
  67938. +#if (DPAA_VERSION >= 11)
  67939. +typedef protocolOpt_t capwapProtocolOpt_t; /**< CAPWAP protocol options. */
  67940. +#define CAPWAP_FRAG_1 0x00000008 /**< CAPWAP reassembly option.
  67941. + CAPWAP Reassembly manipulation requires network
  67942. + environment with CAPWAP header and CAPWAP_FRAG_1 option;
  67943. + in case where fragment found, the fragment-extension offset
  67944. + may be found at 'shim2' (in parser-result). */
  67945. +#endif /* (DPAA_VERSION >= 11) */
  67946. +
  67947. +
  67948. +/* @} */
  67949. +
  67950. +#define FM_PCD_MANIP_MAX_HDR_SIZE 256
  67951. +#define FM_PCD_MANIP_DSCP_TO_VLAN_TRANS 64
  67952. +
  67953. +/**************************************************************************//**
  67954. + @Collection A set of definitions to support Header Manipulation selection.
  67955. +*//***************************************************************************/
  67956. +typedef uint32_t hdrManipFlags_t; /**< A general type to define a HMan update command flags. */
  67957. +
  67958. +typedef hdrManipFlags_t ipv4HdrManipUpdateFlags_t; /**< IPv4 protocol HMan update command flags. */
  67959. +
  67960. +#define HDR_MANIP_IPV4_TOS 0x80000000 /**< update TOS with the given value ('tos' field
  67961. + of t_FmPcdManipHdrFieldUpdateIpv4) */
  67962. +#define HDR_MANIP_IPV4_ID 0x40000000 /**< update IP ID with the given value ('id' field
  67963. + of t_FmPcdManipHdrFieldUpdateIpv4) */
  67964. +#define HDR_MANIP_IPV4_TTL 0x20000000 /**< Decrement TTL by 1 */
  67965. +#define HDR_MANIP_IPV4_SRC 0x10000000 /**< update IP source address with the given value
  67966. + ('src' field of t_FmPcdManipHdrFieldUpdateIpv4) */
  67967. +#define HDR_MANIP_IPV4_DST 0x08000000 /**< update IP destination address with the given value
  67968. + ('dst' field of t_FmPcdManipHdrFieldUpdateIpv4) */
  67969. +
  67970. +typedef hdrManipFlags_t ipv6HdrManipUpdateFlags_t; /**< IPv6 protocol HMan update command flags. */
  67971. +
  67972. +#define HDR_MANIP_IPV6_TC 0x80000000 /**< update Traffic Class address with the given value
  67973. + ('trafficClass' field of t_FmPcdManipHdrFieldUpdateIpv6) */
  67974. +#define HDR_MANIP_IPV6_HL 0x40000000 /**< Decrement Hop Limit by 1 */
  67975. +#define HDR_MANIP_IPV6_SRC 0x20000000 /**< update IP source address with the given value
  67976. + ('src' field of t_FmPcdManipHdrFieldUpdateIpv6) */
  67977. +#define HDR_MANIP_IPV6_DST 0x10000000 /**< update IP destination address with the given value
  67978. + ('dst' field of t_FmPcdManipHdrFieldUpdateIpv6) */
  67979. +
  67980. +typedef hdrManipFlags_t tcpUdpHdrManipUpdateFlags_t;/**< TCP/UDP protocol HMan update command flags. */
  67981. +
  67982. +#define HDR_MANIP_TCP_UDP_SRC 0x80000000 /**< update TCP/UDP source address with the given value
  67983. + ('src' field of t_FmPcdManipHdrFieldUpdateTcpUdp) */
  67984. +#define HDR_MANIP_TCP_UDP_DST 0x40000000 /**< update TCP/UDP destination address with the given value
  67985. + ('dst' field of t_FmPcdManipHdrFieldUpdateTcpUdp) */
  67986. +#define HDR_MANIP_TCP_UDP_CHECKSUM 0x20000000 /**< update TCP/UDP checksum */
  67987. +
  67988. +/* @} */
  67989. +
  67990. +/**************************************************************************//**
  67991. + @Description A type used for returning the order of the key extraction.
  67992. + each value in this array represents the index of the extraction
  67993. + command as defined by the user in the initialization extraction array.
  67994. + The valid size of this array is the user define number of extractions
  67995. + required (also marked by the second '0' in this array).
  67996. +*//***************************************************************************/
  67997. +typedef uint8_t t_FmPcdKgKeyOrder [FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
  67998. +
  67999. +/**************************************************************************//**
  68000. + @Description All PCD engines
  68001. +*//***************************************************************************/
  68002. +typedef enum e_FmPcdEngine {
  68003. + e_FM_PCD_INVALID = 0, /**< Invalid PCD engine */
  68004. + e_FM_PCD_DONE, /**< No PCD Engine indicated */
  68005. + e_FM_PCD_KG, /**< KeyGen */
  68006. + e_FM_PCD_CC, /**< Coarse classifier */
  68007. + e_FM_PCD_PLCR, /**< Policer */
  68008. + e_FM_PCD_PRS, /**< Parser */
  68009. +#if (DPAA_VERSION >= 11)
  68010. + e_FM_PCD_FR, /**< Frame-Replicator */
  68011. +#endif /* (DPAA_VERSION >= 11) */
  68012. + e_FM_PCD_HASH /**< Hash table */
  68013. +} e_FmPcdEngine;
  68014. +
  68015. +/**************************************************************************//**
  68016. + @Description Enumeration type for selecting extraction by header types
  68017. +*//***************************************************************************/
  68018. +typedef enum e_FmPcdExtractByHdrType {
  68019. + e_FM_PCD_EXTRACT_FROM_HDR, /**< Extract bytes from header */
  68020. + e_FM_PCD_EXTRACT_FROM_FIELD, /**< Extract bytes from header field */
  68021. + e_FM_PCD_EXTRACT_FULL_FIELD /**< Extract a full field */
  68022. +} e_FmPcdExtractByHdrType;
  68023. +
  68024. +/**************************************************************************//**
  68025. + @Description Enumeration type for selecting extraction source
  68026. + (when it is not the header)
  68027. +*//***************************************************************************/
  68028. +typedef enum e_FmPcdExtractFrom {
  68029. + e_FM_PCD_EXTRACT_FROM_FRAME_START, /**< KG & CC: Extract from beginning of frame */
  68030. + e_FM_PCD_EXTRACT_FROM_DFLT_VALUE, /**< KG only: Extract from a default value */
  68031. + e_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE, /**< KG & CC: Extract from the point where parsing had finished */
  68032. + e_FM_PCD_EXTRACT_FROM_KEY, /**< CC only: Field where saved KEY */
  68033. + e_FM_PCD_EXTRACT_FROM_HASH, /**< CC only: Field where saved HASH */
  68034. + e_FM_PCD_EXTRACT_FROM_PARSE_RESULT, /**< KG only: Extract from the parser result */
  68035. + e_FM_PCD_EXTRACT_FROM_ENQ_FQID, /**< KG & CC: Extract from enqueue FQID */
  68036. + e_FM_PCD_EXTRACT_FROM_FLOW_ID /**< CC only: Field where saved Dequeue FQID */
  68037. +} e_FmPcdExtractFrom;
  68038. +
  68039. +/**************************************************************************//**
  68040. + @Description Enumeration type for selecting extraction type
  68041. +*//***************************************************************************/
  68042. +typedef enum e_FmPcdExtractType {
  68043. + e_FM_PCD_EXTRACT_BY_HDR, /**< Extract according to header */
  68044. + e_FM_PCD_EXTRACT_NON_HDR, /**< Extract from data that is not the header */
  68045. + e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO /**< Extract private info as specified by user */
  68046. +} e_FmPcdExtractType;
  68047. +
  68048. +/**************************************************************************//**
  68049. + @Description Enumeration type for selecting default extraction value
  68050. +*//***************************************************************************/
  68051. +typedef enum e_FmPcdKgExtractDfltSelect {
  68052. + e_FM_PCD_KG_DFLT_GBL_0, /**< Default selection is KG register 0 */
  68053. + e_FM_PCD_KG_DFLT_GBL_1, /**< Default selection is KG register 1 */
  68054. + e_FM_PCD_KG_DFLT_PRIVATE_0, /**< Default selection is a per scheme register 0 */
  68055. + e_FM_PCD_KG_DFLT_PRIVATE_1, /**< Default selection is a per scheme register 1 */
  68056. + e_FM_PCD_KG_DFLT_ILLEGAL /**< Illegal selection */
  68057. +} e_FmPcdKgExtractDfltSelect;
  68058. +
  68059. +/**************************************************************************//**
  68060. + @Description Enumeration type defining all default groups - each group shares
  68061. + a default value, one of four user-initialized values.
  68062. +*//***************************************************************************/
  68063. +typedef enum e_FmPcdKgKnownFieldsDfltTypes {
  68064. + e_FM_PCD_KG_MAC_ADDR, /**< MAC Address */
  68065. + e_FM_PCD_KG_TCI, /**< TCI field */
  68066. + e_FM_PCD_KG_ENET_TYPE, /**< ENET Type */
  68067. + e_FM_PCD_KG_PPP_SESSION_ID, /**< PPP Session id */
  68068. + e_FM_PCD_KG_PPP_PROTOCOL_ID, /**< PPP Protocol id */
  68069. + e_FM_PCD_KG_MPLS_LABEL, /**< MPLS label */
  68070. + e_FM_PCD_KG_IP_ADDR, /**< IP address */
  68071. + e_FM_PCD_KG_PROTOCOL_TYPE, /**< Protocol type */
  68072. + e_FM_PCD_KG_IP_TOS_TC, /**< TOS or TC */
  68073. + e_FM_PCD_KG_IPV6_FLOW_LABEL, /**< IPV6 flow label */
  68074. + e_FM_PCD_KG_IPSEC_SPI, /**< IPSEC SPI */
  68075. + e_FM_PCD_KG_L4_PORT, /**< L4 Port */
  68076. + e_FM_PCD_KG_TCP_FLAG, /**< TCP Flag */
  68077. + e_FM_PCD_KG_GENERIC_FROM_DATA, /**< grouping implemented by SW,
  68078. + any data extraction that is not the full
  68079. + field described above */
  68080. + e_FM_PCD_KG_GENERIC_FROM_DATA_NO_V, /**< grouping implemented by SW,
  68081. + any data extraction without validation */
  68082. + e_FM_PCD_KG_GENERIC_NOT_FROM_DATA /**< grouping implemented by SW,
  68083. + extraction from parser result or
  68084. + direct use of default value */
  68085. +} e_FmPcdKgKnownFieldsDfltTypes;
  68086. +
  68087. +/**************************************************************************//**
  68088. + @Description Enumeration type for defining header index for scenarios with
  68089. + multiple (tunneled) headers
  68090. +*//***************************************************************************/
  68091. +typedef enum e_FmPcdHdrIndex {
  68092. + e_FM_PCD_HDR_INDEX_NONE = 0, /**< used when multiple headers not used, also
  68093. + to specify regular IP (not tunneled). */
  68094. + e_FM_PCD_HDR_INDEX_1, /**< may be used for VLAN, MPLS, tunneled IP */
  68095. + e_FM_PCD_HDR_INDEX_2, /**< may be used for MPLS, tunneled IP */
  68096. + e_FM_PCD_HDR_INDEX_3, /**< may be used for MPLS */
  68097. + e_FM_PCD_HDR_INDEX_LAST = 0xFF /**< may be used for VLAN, MPLS */
  68098. +} e_FmPcdHdrIndex;
  68099. +
  68100. +/**************************************************************************//**
  68101. + @Description Enumeration type for selecting the policer profile functional type
  68102. +*//***************************************************************************/
  68103. +typedef enum e_FmPcdProfileTypeSelection {
  68104. + e_FM_PCD_PLCR_PORT_PRIVATE, /**< Port dedicated profile */
  68105. + e_FM_PCD_PLCR_SHARED /**< Shared profile (shared within partition) */
  68106. +} e_FmPcdProfileTypeSelection;
  68107. +
  68108. +/**************************************************************************//**
  68109. + @Description Enumeration type for selecting the policer profile algorithm
  68110. +*//***************************************************************************/
  68111. +typedef enum e_FmPcdPlcrAlgorithmSelection {
  68112. + e_FM_PCD_PLCR_PASS_THROUGH, /**< Policer pass through */
  68113. + e_FM_PCD_PLCR_RFC_2698, /**< Policer algorithm RFC 2698 */
  68114. + e_FM_PCD_PLCR_RFC_4115 /**< Policer algorithm RFC 4115 */
  68115. +} e_FmPcdPlcrAlgorithmSelection;
  68116. +
  68117. +/**************************************************************************//**
  68118. + @Description Enumeration type for selecting a policer profile color mode
  68119. +*//***************************************************************************/
  68120. +typedef enum e_FmPcdPlcrColorMode {
  68121. + e_FM_PCD_PLCR_COLOR_BLIND, /**< Color blind */
  68122. + e_FM_PCD_PLCR_COLOR_AWARE /**< Color aware */
  68123. +} e_FmPcdPlcrColorMode;
  68124. +
  68125. +/**************************************************************************//**
  68126. + @Description Enumeration type for selecting a policer profile color
  68127. +*//***************************************************************************/
  68128. +typedef enum e_FmPcdPlcrColor {
  68129. + e_FM_PCD_PLCR_GREEN, /**< Green color code */
  68130. + e_FM_PCD_PLCR_YELLOW, /**< Yellow color code */
  68131. + e_FM_PCD_PLCR_RED, /**< Red color code */
  68132. + e_FM_PCD_PLCR_OVERRIDE /**< Color override code */
  68133. +} e_FmPcdPlcrColor;
  68134. +
  68135. +/**************************************************************************//**
  68136. + @Description Enumeration type for selecting the policer profile packet frame length selector
  68137. +*//***************************************************************************/
  68138. +typedef enum e_FmPcdPlcrFrameLengthSelect {
  68139. + e_FM_PCD_PLCR_L2_FRM_LEN, /**< L2 frame length */
  68140. + e_FM_PCD_PLCR_L3_FRM_LEN, /**< L3 frame length */
  68141. + e_FM_PCD_PLCR_L4_FRM_LEN, /**< L4 frame length */
  68142. + e_FM_PCD_PLCR_FULL_FRM_LEN /**< Full frame length */
  68143. +} e_FmPcdPlcrFrameLengthSelect;
  68144. +
  68145. +/**************************************************************************//**
  68146. + @Description Enumeration type for selecting roll-back frame
  68147. +*//***************************************************************************/
  68148. +typedef enum e_FmPcdPlcrRollBackFrameSelect {
  68149. + e_FM_PCD_PLCR_ROLLBACK_L2_FRM_LEN, /**< Roll-back L2 frame length */
  68150. + e_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN /**< Roll-back Full frame length */
  68151. +} e_FmPcdPlcrRollBackFrameSelect;
  68152. +
  68153. +/**************************************************************************//**
  68154. + @Description Enumeration type for selecting the policer profile packet or byte mode
  68155. +*//***************************************************************************/
  68156. +typedef enum e_FmPcdPlcrRateMode {
  68157. + e_FM_PCD_PLCR_BYTE_MODE, /**< Byte mode */
  68158. + e_FM_PCD_PLCR_PACKET_MODE /**< Packet mode */
  68159. +} e_FmPcdPlcrRateMode;
  68160. +
  68161. +/**************************************************************************//**
  68162. + @Description Enumeration type for defining action of frame
  68163. +*//***************************************************************************/
  68164. +typedef enum e_FmPcdDoneAction {
  68165. + e_FM_PCD_ENQ_FRAME = 0, /**< Enqueue frame */
  68166. + e_FM_PCD_DROP_FRAME /**< Mark this frame as error frame and continue
  68167. + to error flow; 'FM_PORT_FRM_ERR_CLS_DISCARD'
  68168. + flag will be set for this frame. */
  68169. +} e_FmPcdDoneAction;
  68170. +
  68171. +/**************************************************************************//**
  68172. + @Description Enumeration type for selecting the policer counter
  68173. +*//***************************************************************************/
  68174. +typedef enum e_FmPcdPlcrProfileCounters {
  68175. + e_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER, /**< Green packets counter */
  68176. + e_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER, /**< Yellow packets counter */
  68177. + e_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER, /**< Red packets counter */
  68178. + e_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER, /**< Recolored yellow packets counter */
  68179. + e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER /**< Recolored red packets counter */
  68180. +} e_FmPcdPlcrProfileCounters;
  68181. +
  68182. +/**************************************************************************//**
  68183. + @Description Enumeration type for selecting the PCD action after extraction
  68184. +*//***************************************************************************/
  68185. +typedef enum e_FmPcdAction {
  68186. + e_FM_PCD_ACTION_NONE, /**< NONE */
  68187. + e_FM_PCD_ACTION_EXACT_MATCH, /**< Exact match on the selected extraction */
  68188. + e_FM_PCD_ACTION_INDEXED_LOOKUP /**< Indexed lookup on the selected extraction */
  68189. +} e_FmPcdAction;
  68190. +
  68191. +/**************************************************************************//**
  68192. + @Description Enumeration type for selecting type of insert manipulation
  68193. +*//***************************************************************************/
  68194. +typedef enum e_FmPcdManipHdrInsrtType {
  68195. + e_FM_PCD_MANIP_INSRT_GENERIC, /**< Insert according to offset & size */
  68196. + e_FM_PCD_MANIP_INSRT_BY_HDR, /**< Insert according to protocol */
  68197. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  68198. + e_FM_PCD_MANIP_INSRT_BY_TEMPLATE /**< Insert template to start of frame */
  68199. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  68200. +} e_FmPcdManipHdrInsrtType;
  68201. +
  68202. +/**************************************************************************//**
  68203. + @Description Enumeration type for selecting type of remove manipulation
  68204. +*//***************************************************************************/
  68205. +typedef enum e_FmPcdManipHdrRmvType {
  68206. + e_FM_PCD_MANIP_RMV_GENERIC, /**< Remove according to offset & size */
  68207. + e_FM_PCD_MANIP_RMV_BY_HDR /**< Remove according to offset & size */
  68208. +} e_FmPcdManipHdrRmvType;
  68209. +
  68210. +/**************************************************************************//**
  68211. + @Description Enumeration type for selecting specific L2 fields removal
  68212. +*//***************************************************************************/
  68213. +typedef enum e_FmPcdManipHdrRmvSpecificL2 {
  68214. + e_FM_PCD_MANIP_HDR_RMV_ETHERNET, /**< Ethernet/802.3 MAC */
  68215. + e_FM_PCD_MANIP_HDR_RMV_STACKED_QTAGS, /**< stacked QTags */
  68216. + e_FM_PCD_MANIP_HDR_RMV_ETHERNET_AND_MPLS, /**< MPLS and Ethernet/802.3 MAC header until
  68217. + the header which follows the MPLS header */
  68218. + e_FM_PCD_MANIP_HDR_RMV_MPLS, /**< Remove MPLS header (Unlimited MPLS labels) */
  68219. + e_FM_PCD_MANIP_HDR_RMV_PPPOE /**< Remove the PPPoE header and PPP protocol field. */
  68220. +} e_FmPcdManipHdrRmvSpecificL2;
  68221. +
  68222. +/**************************************************************************//**
  68223. + @Description Enumeration type for selecting specific fields updates
  68224. +*//***************************************************************************/
  68225. +typedef enum e_FmPcdManipHdrFieldUpdateType {
  68226. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN, /**< VLAN updates */
  68227. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4, /**< IPV4 updates */
  68228. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6, /**< IPV6 updates */
  68229. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP, /**< TCP_UDP updates */
  68230. +} e_FmPcdManipHdrFieldUpdateType;
  68231. +
  68232. +/**************************************************************************//**
  68233. + @Description Enumeration type for selecting VLAN updates
  68234. +*//***************************************************************************/
  68235. +typedef enum e_FmPcdManipHdrFieldUpdateVlan {
  68236. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI, /**< Replace VPri of outer most VLAN tag. */
  68237. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN /**< DSCP to VLAN priority bits translation */
  68238. +} e_FmPcdManipHdrFieldUpdateVlan;
  68239. +
  68240. +/**************************************************************************//**
  68241. + @Description Enumeration type for selecting specific L2 header insertion
  68242. +*//***************************************************************************/
  68243. +typedef enum e_FmPcdManipHdrInsrtSpecificL2 {
  68244. + e_FM_PCD_MANIP_HDR_INSRT_MPLS, /**< Insert MPLS header (Unlimited MPLS labels) */
  68245. + e_FM_PCD_MANIP_HDR_INSRT_PPPOE /**< Insert PPPOE */
  68246. +} e_FmPcdManipHdrInsrtSpecificL2;
  68247. +
  68248. +#if (DPAA_VERSION >= 11)
  68249. +/**************************************************************************//**
  68250. + @Description Enumeration type for selecting QoS mapping mode
  68251. +
  68252. + Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE'
  68253. + User should instruct the port to read the hash-result
  68254. +*//***************************************************************************/
  68255. +typedef enum e_FmPcdManipHdrQosMappingMode {
  68256. + e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE = 0, /**< No mapping, QoS field will not be changed */
  68257. + e_FM_PCD_MANIP_HDR_QOS_MAPPING_AS_IS, /**< QoS field will be overwritten by the last byte in the hash-result. */
  68258. +} e_FmPcdManipHdrQosMappingMode;
  68259. +
  68260. +/**************************************************************************//**
  68261. + @Description Enumeration type for selecting QoS source
  68262. +
  68263. + Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_SRC_NONE'
  68264. + User should left room for the hash-result on input/output buffer
  68265. + and instruct the port to read/write the hash-result to the buffer (RPD should be set)
  68266. +*//***************************************************************************/
  68267. +typedef enum e_FmPcdManipHdrQosSrc {
  68268. + e_FM_PCD_MANIP_HDR_QOS_SRC_NONE = 0, /**< TODO */
  68269. + e_FM_PCD_MANIP_HDR_QOS_SRC_USER_DEFINED, /**< QoS will be taken from the last byte in the hash-result. */
  68270. +} e_FmPcdManipHdrQosSrc;
  68271. +#endif /* (DPAA_VERSION >= 11) */
  68272. +
  68273. +/**************************************************************************//**
  68274. + @Description Enumeration type for selecting type of header insertion
  68275. +*//***************************************************************************/
  68276. +typedef enum e_FmPcdManipHdrInsrtByHdrType {
  68277. + e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2, /**< Specific L2 fields insertion */
  68278. +#if (DPAA_VERSION >= 11)
  68279. + e_FM_PCD_MANIP_INSRT_BY_HDR_IP, /**< IP insertion */
  68280. + e_FM_PCD_MANIP_INSRT_BY_HDR_UDP, /**< UDP insertion */
  68281. + e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, /**< UDP lite insertion */
  68282. + e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP /**< CAPWAP insertion */
  68283. +#endif /* (DPAA_VERSION >= 11) */
  68284. +} e_FmPcdManipHdrInsrtByHdrType;
  68285. +
  68286. +/**************************************************************************//**
  68287. + @Description Enumeration type for selecting specific customCommand
  68288. +*//***************************************************************************/
  68289. +typedef enum e_FmPcdManipHdrCustomType {
  68290. + e_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE, /**< Replace IPv4/IPv6 */
  68291. + e_FM_PCD_MANIP_HDR_CUSTOM_GEN_FIELD_REPLACE, /**< Replace IPv4/IPv6 */
  68292. +} e_FmPcdManipHdrCustomType;
  68293. +
  68294. +/**************************************************************************//**
  68295. + @Description Enumeration type for selecting specific customCommand
  68296. +*//***************************************************************************/
  68297. +typedef enum e_FmPcdManipHdrCustomIpReplace {
  68298. + e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV4_BY_IPV6, /**< Replace IPv4 by IPv6 */
  68299. + e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 /**< Replace IPv6 by IPv4 */
  68300. +} e_FmPcdManipHdrCustomIpReplace;
  68301. +
  68302. +/**************************************************************************//**
  68303. + @Description Enumeration type for selecting type of header removal
  68304. +*//***************************************************************************/
  68305. +typedef enum e_FmPcdManipHdrRmvByHdrType {
  68306. + e_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2 = 0, /**< Specific L2 fields removal */
  68307. +#if (DPAA_VERSION >= 11)
  68308. + e_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP, /**< CAPWAP removal */
  68309. +#endif /* (DPAA_VERSION >= 11) */
  68310. +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  68311. + e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START, /**< Locate from data that is not the header */
  68312. +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  68313. +} e_FmPcdManipHdrRmvByHdrType;
  68314. +
  68315. +/**************************************************************************//**
  68316. + @Description Enumeration type for selecting type of timeout mode
  68317. +*//***************************************************************************/
  68318. +typedef enum e_FmPcdManipReassemTimeOutMode {
  68319. + e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES, /**< Limits the time of the reassembly process
  68320. + from the first fragment to the last */
  68321. + e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG /**< Limits the time of receiving the fragment */
  68322. +} e_FmPcdManipReassemTimeOutMode;
  68323. +
  68324. +/**************************************************************************//**
  68325. + @Description Enumeration type for selecting type of WaysNumber mode
  68326. +*//***************************************************************************/
  68327. +typedef enum e_FmPcdManipReassemWaysNumber {
  68328. + e_FM_PCD_MANIP_ONE_WAY_HASH = 1, /**< One way hash */
  68329. + e_FM_PCD_MANIP_TWO_WAYS_HASH, /**< Two ways hash */
  68330. + e_FM_PCD_MANIP_THREE_WAYS_HASH, /**< Three ways hash */
  68331. + e_FM_PCD_MANIP_FOUR_WAYS_HASH, /**< Four ways hash */
  68332. + e_FM_PCD_MANIP_FIVE_WAYS_HASH, /**< Five ways hash */
  68333. + e_FM_PCD_MANIP_SIX_WAYS_HASH, /**< Six ways hash */
  68334. + e_FM_PCD_MANIP_SEVEN_WAYS_HASH, /**< Seven ways hash */
  68335. + e_FM_PCD_MANIP_EIGHT_WAYS_HASH /**< Eight ways hash */
  68336. +} e_FmPcdManipReassemWaysNumber;
  68337. +
  68338. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  68339. +/**************************************************************************//**
  68340. + @Description Enumeration type for selecting type of statistics mode
  68341. +*//***************************************************************************/
  68342. +typedef enum e_FmPcdStatsType {
  68343. + e_FM_PCD_STATS_PER_FLOWID = 0 /**< Flow ID is used as index for getting statistics */
  68344. +} e_FmPcdStatsType;
  68345. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  68346. +
  68347. +/**************************************************************************//**
  68348. + @Description Enumeration type for selecting manipulation type
  68349. +*//***************************************************************************/
  68350. +typedef enum e_FmPcdManipType {
  68351. + e_FM_PCD_MANIP_HDR = 0, /**< Header manipulation */
  68352. + e_FM_PCD_MANIP_REASSEM, /**< Reassembly */
  68353. + e_FM_PCD_MANIP_FRAG, /**< Fragmentation */
  68354. + e_FM_PCD_MANIP_SPECIAL_OFFLOAD /**< Special Offloading */
  68355. +} e_FmPcdManipType;
  68356. +
  68357. +/**************************************************************************//**
  68358. + @Description Enumeration type for selecting type of statistics mode
  68359. +*//***************************************************************************/
  68360. +typedef enum e_FmPcdCcStatsMode {
  68361. + e_FM_PCD_CC_STATS_MODE_NONE = 0, /**< No statistics support */
  68362. + e_FM_PCD_CC_STATS_MODE_FRAME, /**< Frame count statistics */
  68363. + e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME, /**< Byte and frame count statistics */
  68364. +#if (DPAA_VERSION >= 11)
  68365. + e_FM_PCD_CC_STATS_MODE_RMON, /**< Byte and frame length range count statistics;
  68366. + This mode is supported only on B4860 device */
  68367. +#endif /* (DPAA_VERSION >= 11) */
  68368. +} e_FmPcdCcStatsMode;
  68369. +
  68370. +/**************************************************************************//**
  68371. + @Description Enumeration type for determining the action in case an IP packet
  68372. + is larger than MTU but its DF (Don't Fragment) bit is set.
  68373. +*//***************************************************************************/
  68374. +typedef enum e_FmPcdManipDontFragAction {
  68375. + e_FM_PCD_MANIP_DISCARD_PACKET = 0, /**< Discard packet */
  68376. + e_FM_PCD_MANIP_ENQ_TO_ERR_Q_OR_DISCARD_PACKET = e_FM_PCD_MANIP_DISCARD_PACKET,
  68377. + /**< Obsolete, cannot enqueue to error queue;
  68378. + In practice, selects to discard packets;
  68379. + Will be removed in the future */
  68380. + e_FM_PCD_MANIP_FRAGMENT_PACKET, /**< Fragment packet and continue normal processing */
  68381. + e_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG /**< Continue normal processing without fragmenting the packet */
  68382. +} e_FmPcdManipDontFragAction;
  68383. +
  68384. +/**************************************************************************//**
  68385. + @Description Enumeration type for selecting type of special offload manipulation
  68386. +*//***************************************************************************/
  68387. +typedef enum e_FmPcdManipSpecialOffloadType {
  68388. + e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC, /**< IPSec offload manipulation */
  68389. +#if (DPAA_VERSION >= 11)
  68390. + e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP /**< CAPWAP offload manipulation */
  68391. +#endif /* (DPAA_VERSION >= 11) */
  68392. +} e_FmPcdManipSpecialOffloadType;
  68393. +
  68394. +
  68395. +/**************************************************************************//**
  68396. + @Description A Union of protocol dependent special options
  68397. +*//***************************************************************************/
  68398. +typedef union u_FmPcdHdrProtocolOpt {
  68399. + ethProtocolOpt_t ethOpt; /**< Ethernet options */
  68400. + vlanProtocolOpt_t vlanOpt; /**< VLAN options */
  68401. + mplsProtocolOpt_t mplsOpt; /**< MPLS options */
  68402. + ipv4ProtocolOpt_t ipv4Opt; /**< IPv4 options */
  68403. + ipv6ProtocolOpt_t ipv6Opt; /**< IPv6 options */
  68404. +#if (DPAA_VERSION >= 11)
  68405. + capwapProtocolOpt_t capwapOpt; /**< CAPWAP options */
  68406. +#endif /* (DPAA_VERSION >= 11) */
  68407. +} u_FmPcdHdrProtocolOpt;
  68408. +
  68409. +/**************************************************************************//**
  68410. + @Description A union holding protocol fields
  68411. +
  68412. +
  68413. + Fields supported as "full fields":
  68414. + HEADER_TYPE_ETH:
  68415. + NET_HEADER_FIELD_ETH_DA
  68416. + NET_HEADER_FIELD_ETH_SA
  68417. + NET_HEADER_FIELD_ETH_TYPE
  68418. +
  68419. + HEADER_TYPE_LLC_SNAP:
  68420. + NET_HEADER_FIELD_LLC_SNAP_TYPE
  68421. +
  68422. + HEADER_TYPE_VLAN:
  68423. + NET_HEADER_FIELD_VLAN_TCI
  68424. + (index may apply:
  68425. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
  68426. + e_FM_PCD_HDR_INDEX_LAST)
  68427. +
  68428. + HEADER_TYPE_MPLS:
  68429. + NET_HEADER_FIELD_MPLS_LABEL_STACK
  68430. + (index may apply:
  68431. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
  68432. + e_FM_PCD_HDR_INDEX_2,
  68433. + e_FM_PCD_HDR_INDEX_LAST)
  68434. +
  68435. + HEADER_TYPE_IPv4:
  68436. + NET_HEADER_FIELD_IPv4_SRC_IP
  68437. + NET_HEADER_FIELD_IPv4_DST_IP
  68438. + NET_HEADER_FIELD_IPv4_PROTO
  68439. + NET_HEADER_FIELD_IPv4_TOS
  68440. + (index may apply:
  68441. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
  68442. + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
  68443. +
  68444. + HEADER_TYPE_IPv6:
  68445. + NET_HEADER_FIELD_IPv6_SRC_IP
  68446. + NET_HEADER_FIELD_IPv6_DST_IP
  68447. + NET_HEADER_FIELD_IPv6_NEXT_HDR
  68448. + NET_HEADER_FIELD_IPv6_VER | NET_HEADER_FIELD_IPv6_FL | NET_HEADER_FIELD_IPv6_TC (must come together!)
  68449. + (index may apply:
  68450. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
  68451. + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
  68452. +
  68453. + (Note that starting from DPAA 1-1, NET_HEADER_FIELD_IPv6_NEXT_HDR applies to
  68454. + the last next header indication, meaning the next L4, which may be
  68455. + present at the Ipv6 last extension. On earlier revisions this field
  68456. + applies to the Next-Header field of the main IPv6 header)
  68457. +
  68458. + HEADER_TYPE_IP:
  68459. + NET_HEADER_FIELD_IP_PROTO
  68460. + (index may apply:
  68461. + e_FM_PCD_HDR_INDEX_LAST)
  68462. + NET_HEADER_FIELD_IP_DSCP
  68463. + (index may apply:
  68464. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1)
  68465. + HEADER_TYPE_GRE:
  68466. + NET_HEADER_FIELD_GRE_TYPE
  68467. +
  68468. + HEADER_TYPE_MINENCAP
  68469. + NET_HEADER_FIELD_MINENCAP_SRC_IP
  68470. + NET_HEADER_FIELD_MINENCAP_DST_IP
  68471. + NET_HEADER_FIELD_MINENCAP_TYPE
  68472. +
  68473. + HEADER_TYPE_TCP:
  68474. + NET_HEADER_FIELD_TCP_PORT_SRC
  68475. + NET_HEADER_FIELD_TCP_PORT_DST
  68476. + NET_HEADER_FIELD_TCP_FLAGS
  68477. +
  68478. + HEADER_TYPE_UDP:
  68479. + NET_HEADER_FIELD_UDP_PORT_SRC
  68480. + NET_HEADER_FIELD_UDP_PORT_DST
  68481. +
  68482. + HEADER_TYPE_UDP_LITE:
  68483. + NET_HEADER_FIELD_UDP_LITE_PORT_SRC
  68484. + NET_HEADER_FIELD_UDP_LITE_PORT_DST
  68485. +
  68486. + HEADER_TYPE_IPSEC_AH:
  68487. + NET_HEADER_FIELD_IPSEC_AH_SPI
  68488. + NET_HEADER_FIELD_IPSEC_AH_NH
  68489. +
  68490. + HEADER_TYPE_IPSEC_ESP:
  68491. + NET_HEADER_FIELD_IPSEC_ESP_SPI
  68492. +
  68493. + HEADER_TYPE_SCTP:
  68494. + NET_HEADER_FIELD_SCTP_PORT_SRC
  68495. + NET_HEADER_FIELD_SCTP_PORT_DST
  68496. +
  68497. + HEADER_TYPE_DCCP:
  68498. + NET_HEADER_FIELD_DCCP_PORT_SRC
  68499. + NET_HEADER_FIELD_DCCP_PORT_DST
  68500. +
  68501. + HEADER_TYPE_PPPoE:
  68502. + NET_HEADER_FIELD_PPPoE_PID
  68503. + NET_HEADER_FIELD_PPPoE_SID
  68504. +
  68505. + *****************************************************************
  68506. + Fields supported as "from fields":
  68507. + HEADER_TYPE_ETH (with or without validation):
  68508. + NET_HEADER_FIELD_ETH_TYPE
  68509. +
  68510. + HEADER_TYPE_VLAN (with or without validation):
  68511. + NET_HEADER_FIELD_VLAN_TCI
  68512. + (index may apply:
  68513. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
  68514. + e_FM_PCD_HDR_INDEX_LAST)
  68515. +
  68516. + HEADER_TYPE_IPv4 (without validation):
  68517. + NET_HEADER_FIELD_IPv4_PROTO
  68518. + (index may apply:
  68519. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
  68520. + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
  68521. +
  68522. + HEADER_TYPE_IPv6 (without validation):
  68523. + NET_HEADER_FIELD_IPv6_NEXT_HDR
  68524. + (index may apply:
  68525. + e_FM_PCD_HDR_INDEX_NONE/e_FM_PCD_HDR_INDEX_1,
  68526. + e_FM_PCD_HDR_INDEX_2/e_FM_PCD_HDR_INDEX_LAST)
  68527. +
  68528. +*//***************************************************************************/
  68529. +typedef union t_FmPcdFields {
  68530. + headerFieldEth_t eth; /**< Ethernet */
  68531. + headerFieldVlan_t vlan; /**< VLAN */
  68532. + headerFieldLlcSnap_t llcSnap; /**< LLC SNAP */
  68533. + headerFieldPppoe_t pppoe; /**< PPPoE */
  68534. + headerFieldMpls_t mpls; /**< MPLS */
  68535. + headerFieldIp_t ip; /**< IP */
  68536. + headerFieldIpv4_t ipv4; /**< IPv4 */
  68537. + headerFieldIpv6_t ipv6; /**< IPv6 */
  68538. + headerFieldUdp_t udp; /**< UDP */
  68539. + headerFieldUdpLite_t udpLite; /**< UDP Lite */
  68540. + headerFieldTcp_t tcp; /**< TCP */
  68541. + headerFieldSctp_t sctp; /**< SCTP */
  68542. + headerFieldDccp_t dccp; /**< DCCP */
  68543. + headerFieldGre_t gre; /**< GRE */
  68544. + headerFieldMinencap_t minencap; /**< Minimal Encapsulation */
  68545. + headerFieldIpsecAh_t ipsecAh; /**< IPSec AH */
  68546. + headerFieldIpsecEsp_t ipsecEsp; /**< IPSec ESP */
  68547. + headerFieldUdpEncapEsp_t udpEncapEsp; /**< UDP Encapsulation ESP */
  68548. +} t_FmPcdFields;
  68549. +
  68550. +/**************************************************************************//**
  68551. + @Description Parameters for defining header extraction for key generation
  68552. +*//***************************************************************************/
  68553. +typedef struct t_FmPcdFromHdr {
  68554. + uint8_t size; /**< Size in byte */
  68555. + uint8_t offset; /**< Byte offset */
  68556. +} t_FmPcdFromHdr;
  68557. +
  68558. +/**************************************************************************//**
  68559. + @Description Parameters for defining field extraction for key generation
  68560. +*//***************************************************************************/
  68561. +typedef struct t_FmPcdFromField {
  68562. + t_FmPcdFields field; /**< Field selection */
  68563. + uint8_t size; /**< Size in byte */
  68564. + uint8_t offset; /**< Byte offset */
  68565. +} t_FmPcdFromField;
  68566. +
  68567. +/**************************************************************************//**
  68568. + @Description Parameters for defining a single network environment unit
  68569. +
  68570. + A distinction unit should be defined if it will later be used
  68571. + by one or more PCD engines to distinguish between flows.
  68572. +*//***************************************************************************/
  68573. +typedef struct t_FmPcdDistinctionUnit {
  68574. + struct {
  68575. + e_NetHeaderType hdr; /**< One of the headers supported by the FM */
  68576. + u_FmPcdHdrProtocolOpt opt; /**< Select only one option ! */
  68577. + } hdrs[FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];
  68578. +} t_FmPcdDistinctionUnit;
  68579. +
  68580. +/**************************************************************************//**
  68581. + @Description Parameters for defining all different distinction units supported
  68582. + by a specific PCD Network Environment Characteristics module.
  68583. +
  68584. + Each unit represent a protocol or a group of protocols that may
  68585. + be used later by the different PCD engines to distinguish
  68586. + between flows.
  68587. +*//***************************************************************************/
  68588. +typedef struct t_FmPcdNetEnvParams {
  68589. + uint8_t numOfDistinctionUnits; /**< Number of different units to be identified */
  68590. + t_FmPcdDistinctionUnit units[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /**< An array of numOfDistinctionUnits of the
  68591. + different units to be identified */
  68592. +} t_FmPcdNetEnvParams;
  68593. +
  68594. +/**************************************************************************//**
  68595. + @Description Parameters for defining a single extraction action when
  68596. + creating a key
  68597. +*//***************************************************************************/
  68598. +typedef struct t_FmPcdExtractEntry {
  68599. + e_FmPcdExtractType type; /**< Extraction type select */
  68600. + union {
  68601. + struct {
  68602. + e_NetHeaderType hdr; /**< Header selection */
  68603. + bool ignoreProtocolValidation;
  68604. + /**< Ignore protocol validation */
  68605. + e_FmPcdHdrIndex hdrIndex; /**< Relevant only for MPLS, VLAN and tunneled
  68606. + IP. Otherwise should be cleared. */
  68607. + e_FmPcdExtractByHdrType type; /**< Header extraction type select */
  68608. + union {
  68609. + t_FmPcdFromHdr fromHdr; /**< Extract bytes from header parameters */
  68610. + t_FmPcdFromField fromField; /**< Extract bytes from field parameters */
  68611. + t_FmPcdFields fullField; /**< Extract full filed parameters */
  68612. + } extractByHdrType;
  68613. + } extractByHdr; /**< used when type = e_FM_PCD_KG_EXTRACT_BY_HDR */
  68614. + struct {
  68615. + e_FmPcdExtractFrom src; /**< Non-header extraction source */
  68616. + e_FmPcdAction action; /**< Relevant for CC Only */
  68617. + uint16_t icIndxMask; /**< Relevant only for CC when
  68618. + action = e_FM_PCD_ACTION_INDEXED_LOOKUP;
  68619. + Note that the number of bits that are set within
  68620. + this mask must be log2 of the CC-node 'numOfKeys'.
  68621. + Note that the mask cannot be set on the lower bits. */
  68622. + uint8_t offset; /**< Byte offset */
  68623. + uint8_t size; /**< Size in byte */
  68624. + } extractNonHdr; /**< used when type = e_FM_PCD_KG_EXTRACT_NON_HDR */
  68625. + };
  68626. +} t_FmPcdExtractEntry;
  68627. +
  68628. +/**************************************************************************//**
  68629. + @Description Parameters for defining masks for each extracted field in the key.
  68630. +*//***************************************************************************/
  68631. +typedef struct t_FmPcdKgExtractMask {
  68632. + uint8_t extractArrayIndex; /**< Index in the extraction array, as initialized by user */
  68633. + uint8_t offset; /**< Byte offset */
  68634. + uint8_t mask; /**< A byte mask (selected bits will be used) */
  68635. +} t_FmPcdKgExtractMask;
  68636. +
  68637. +/**************************************************************************//**
  68638. + @Description Parameters for defining default selection per groups of fields
  68639. +*//***************************************************************************/
  68640. +typedef struct t_FmPcdKgExtractDflt {
  68641. + e_FmPcdKgKnownFieldsDfltTypes type; /**< Default type select */
  68642. + e_FmPcdKgExtractDfltSelect dfltSelect; /**< Default register select */
  68643. +} t_FmPcdKgExtractDflt;
  68644. +
  68645. +/**************************************************************************//**
  68646. + @Description Parameters for defining key extraction and hashing
  68647. +*//***************************************************************************/
  68648. +typedef struct t_FmPcdKgKeyExtractAndHashParams {
  68649. + uint32_t privateDflt0; /**< Scheme default register 0 */
  68650. + uint32_t privateDflt1; /**< Scheme default register 1 */
  68651. + uint8_t numOfUsedExtracts; /**< defines the valid size of the following array */
  68652. + t_FmPcdExtractEntry extractArray [FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY]; /**< An array of extractions definition. */
  68653. + uint8_t numOfUsedDflts; /**< defines the valid size of the following array */
  68654. + t_FmPcdKgExtractDflt dflts[FM_PCD_KG_NUM_OF_DEFAULT_GROUPS];
  68655. + /**< For each extraction used in this scheme, specify the required
  68656. + default register to be used when header is not found.
  68657. + types not specified in this array will get undefined value. */
  68658. + uint8_t numOfUsedMasks; /**< defines the valid size of the following array */
  68659. + t_FmPcdKgExtractMask masks[FM_PCD_KG_NUM_OF_EXTRACT_MASKS];
  68660. + uint8_t hashShift; /**< hash result right shift. Select the 24 bits out of the 64 hash
  68661. + result. 0 means using the 24 LSB's, otherwise use the
  68662. + 24 LSB's after shifting right.*/
  68663. + uint32_t hashDistributionNumOfFqids; /**< must be > 1 and a power of 2. Represents the range
  68664. + of queues for the key and hash functionality */
  68665. + uint8_t hashDistributionFqidsShift; /**< selects the FQID bits that will be effected by the hash */
  68666. + bool symmetricHash; /**< TRUE to generate the same hash for frames with swapped source and
  68667. + destination fields on all layers; If TRUE, driver will check that for
  68668. + all layers, if SRC extraction is selected, DST extraction must also be
  68669. + selected, and vice versa. */
  68670. +} t_FmPcdKgKeyExtractAndHashParams;
  68671. +
  68672. +/**************************************************************************//**
  68673. + @Description Parameters for defining a single FQID mask (extracted OR).
  68674. +*//***************************************************************************/
  68675. +typedef struct t_FmPcdKgExtractedOrParams {
  68676. + e_FmPcdExtractType type; /**< Extraction type select */
  68677. + union {
  68678. + struct { /**< used when type = e_FM_PCD_KG_EXTRACT_BY_HDR */
  68679. + e_NetHeaderType hdr;
  68680. + e_FmPcdHdrIndex hdrIndex; /**< Relevant only for MPLS, VLAN and tunneled
  68681. + IP. Otherwise should be cleared.*/
  68682. + bool ignoreProtocolValidation;
  68683. + /**< continue extraction even if protocol is not recognized */
  68684. + } extractByHdr; /**< Header to extract by */
  68685. + e_FmPcdExtractFrom src; /**< used when type = e_FM_PCD_KG_EXTRACT_NON_HDR */
  68686. + };
  68687. + uint8_t extractionOffset; /**< Offset for extraction (in bytes). */
  68688. + e_FmPcdKgExtractDfltSelect dfltValue; /**< Select register from which extraction is taken if
  68689. + field not found */
  68690. + uint8_t mask; /**< Extraction mask (specified bits are used) */
  68691. + uint8_t bitOffsetInFqid; /**< 0-31, Selects which bits of the 24 FQID bits to effect using
  68692. + the extracted byte; Assume byte is placed as the 8 MSB's in
  68693. + a 32 bit word where the lower bits
  68694. + are the FQID; i.e if bitOffsetInFqid=1 than its LSB
  68695. + will effect the FQID MSB, if bitOffsetInFqid=24 than the
  68696. + extracted byte will effect the 8 LSB's of the FQID,
  68697. + if bitOffsetInFqid=31 than the byte's MSB will effect
  68698. + the FQID's LSB; 0 means - no effect on FQID;
  68699. + Note that one, and only one of
  68700. + bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
  68701. + extracted byte must effect either FQID or Policer profile).*/
  68702. + uint8_t bitOffsetInPlcrProfile;
  68703. + /**< 0-15, Selects which bits of the 8 policer profile id bits to
  68704. + effect using the extracted byte; Assume byte is placed
  68705. + as the 8 MSB's in a 16 bit word where the lower bits
  68706. + are the policer profile id; i.e if bitOffsetInPlcrProfile=1
  68707. + than its LSB will effect the profile MSB, if bitOffsetInFqid=8
  68708. + than the extracted byte will effect the whole policer profile id,
  68709. + if bitOffsetInFqid=15 than the byte's MSB will effect
  68710. + the Policer Profile id's LSB;
  68711. + 0 means - no effect on policer profile; Note that one, and only one of
  68712. + bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
  68713. + extracted byte must effect either FQID or Policer profile).*/
  68714. +} t_FmPcdKgExtractedOrParams;
  68715. +
  68716. +/**************************************************************************//**
  68717. + @Description Parameters for configuring a scheme counter
  68718. +*//***************************************************************************/
  68719. +typedef struct t_FmPcdKgSchemeCounter {
  68720. + bool update; /**< FALSE to keep the current counter state
  68721. + and continue from that point, TRUE to update/reset
  68722. + the counter when the scheme is written. */
  68723. + uint32_t value; /**< If update=TRUE, this value will be written into the
  68724. + counter. clear this field to reset the counter. */
  68725. +} t_FmPcdKgSchemeCounter;
  68726. +
  68727. +/**************************************************************************//**
  68728. + @Description Parameters for configuring a policer profile for a KeyGen scheme
  68729. + (when policer is the next engine after this scheme).
  68730. +*//***************************************************************************/
  68731. +typedef struct t_FmPcdKgPlcrProfile {
  68732. + bool sharedProfile; /**< TRUE if this profile is shared between ports
  68733. + (managed by master partition); Must not be TRUE
  68734. + if profile is after Coarse Classification*/
  68735. + bool direct; /**< if TRUE, directRelativeProfileId only selects the profile
  68736. + id, if FALSE fqidOffsetRelativeProfileIdBase is used
  68737. + together with fqidOffsetShift and numOfProfiles
  68738. + parameters, to define a range of profiles from
  68739. + which the KeyGen result will determine the
  68740. + destination policer profile. */
  68741. + union {
  68742. + uint16_t directRelativeProfileId; /**< Used if 'direct' is TRUE, to select policer profile.
  68743. + should indicate the policer profile offset within the
  68744. + port's policer profiles or shared window. */
  68745. + struct {
  68746. + uint8_t fqidOffsetShift; /**< Shift on the KeyGen create FQID offset (i.e. not the
  68747. + final FQID - without the FQID base). */
  68748. + uint8_t fqidOffsetRelativeProfileIdBase;
  68749. + /**< The base of the FMan Port's relative Storage-Profile ID;
  68750. + this value will be "OR'ed" with the KeyGen create FQID
  68751. + offset (i.e. not the final FQID - without the FQID base);
  68752. + the final result should indicate the Storage-Profile offset
  68753. + within the FMan Port's relative Storage-Profiles window/
  68754. + (or the SHARED window depends on 'sharedProfile'). */
  68755. + uint8_t numOfProfiles; /**< Range of profiles starting at base */
  68756. + } indirectProfile; /**< Indirect profile parameters */
  68757. + } profileSelect; /**< Direct/indirect profile selection and parameters */
  68758. +} t_FmPcdKgPlcrProfile;
  68759. +
  68760. +#if (DPAA_VERSION >= 11)
  68761. +/**************************************************************************//**
  68762. + @Description Parameters for configuring a storage profile for a KeyGen scheme.
  68763. +*//***************************************************************************/
  68764. +typedef struct t_FmPcdKgStorageProfile {
  68765. + bool direct; /**< If TRUE, directRelativeProfileId only selects the
  68766. + profile id;
  68767. + If FALSE, fqidOffsetRelativeProfileIdBase is used
  68768. + together with fqidOffsetShift and numOfProfiles
  68769. + parameters to define a range of profiles from which
  68770. + the KeyGen result will determine the destination
  68771. + storage profile. */
  68772. + union {
  68773. + uint16_t directRelativeProfileId; /**< Used when 'direct' is TRUE, to select a storage profile;
  68774. + should indicate the storage profile offset within the
  68775. + port's storage profiles window. */
  68776. + struct {
  68777. + uint8_t fqidOffsetShift; /**< Shift on the KeyGen create FQID offset (i.e. not the
  68778. + final FQID - without the FQID base). */
  68779. + uint8_t fqidOffsetRelativeProfileIdBase;
  68780. + /**< The base of the FMan Port's relative Storage-Profile ID;
  68781. + this value will be "OR'ed" with the KeyGen create FQID
  68782. + offset (i.e. not the final FQID - without the FQID base);
  68783. + the final result should indicate the Storage-Profile offset
  68784. + within the FMan Port's relative Storage-Profiles window. */
  68785. + uint8_t numOfProfiles; /**< Range of profiles starting at base. */
  68786. + } indirectProfile; /**< Indirect profile parameters. */
  68787. + } profileSelect; /**< Direct/indirect profile selection and parameters. */
  68788. +} t_FmPcdKgStorageProfile;
  68789. +#endif /* (DPAA_VERSION >= 11) */
  68790. +
  68791. +/**************************************************************************//**
  68792. + @Description Parameters for defining CC as the next engine after KeyGen
  68793. +*//***************************************************************************/
  68794. +typedef struct t_FmPcdKgCc {
  68795. + t_Handle h_CcTree; /**< A handle to a CC Tree */
  68796. + uint8_t grpId; /**< CC group id within the CC tree */
  68797. + bool plcrNext; /**< TRUE if after CC, in case of data frame,
  68798. + policing is required. */
  68799. + bool bypassPlcrProfileGeneration; /**< TRUE to bypass KeyGen policer profile generation;
  68800. + selected profile is the one set at port initialization. */
  68801. + t_FmPcdKgPlcrProfile plcrProfile; /**< Valid only if plcrNext = TRUE and
  68802. + bypassPlcrProfileGeneration = FALSE */
  68803. +} t_FmPcdKgCc;
  68804. +
  68805. +/**************************************************************************//**
  68806. + @Description Parameters for defining initializing a KeyGen scheme
  68807. +*//***************************************************************************/
  68808. +typedef struct t_FmPcdKgSchemeParams {
  68809. + bool modify; /**< TRUE to change an existing scheme */
  68810. + union
  68811. + {
  68812. + uint8_t relativeSchemeId; /**< if modify=FALSE:Partition relative scheme id */
  68813. + t_Handle h_Scheme; /**< if modify=TRUE: a handle of the existing scheme */
  68814. + } id;
  68815. + bool alwaysDirect; /**< This scheme is reached only directly, i.e. no need
  68816. + for match vector; KeyGen will ignore it when matching */
  68817. + struct { /**< HL Relevant only if alwaysDirect = FALSE */
  68818. + t_Handle h_NetEnv; /**< A handle to the Network environment as returned
  68819. + by FM_PCD_NetEnvCharacteristicsSet() */
  68820. + uint8_t numOfDistinctionUnits; /**< Number of NetEnv units listed in unitIds array */
  68821. + uint8_t unitIds[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
  68822. + /**< Indexes as passed to SetNetEnvCharacteristics array*/
  68823. + } netEnvParams;
  68824. + bool useHash; /**< use the KeyGen Hash functionality */
  68825. + t_FmPcdKgKeyExtractAndHashParams keyExtractAndHashParams;
  68826. + /**< used only if useHash = TRUE */
  68827. + bool bypassFqidGeneration; /**< Normally - FALSE, TRUE to avoid FQID update in the IC;
  68828. + In such a case FQID after KeyGen will be the default FQID
  68829. + defined for the relevant port, or the FQID defined by CC
  68830. + in cases where CC was the previous engine. */
  68831. + uint32_t baseFqid; /**< Base FQID; Relevant only if bypassFqidGeneration = FALSE;
  68832. + If hash is used and an even distribution is expected
  68833. + according to hashDistributionNumOfFqids, baseFqid must be aligned to
  68834. + hashDistributionNumOfFqids. */
  68835. + uint8_t numOfUsedExtractedOrs; /**< Number of FQID masks listed in extractedOrs array */
  68836. + t_FmPcdKgExtractedOrParams extractedOrs[FM_PCD_KG_NUM_OF_GENERIC_REGS];
  68837. + /**< FM_PCD_KG_NUM_OF_GENERIC_REGS
  68838. + registers are shared between qidMasks
  68839. + functionality and some of the extraction
  68840. + actions; Normally only some will be used
  68841. + for qidMask. Driver will return error if
  68842. + resource is full at initialization time. */
  68843. +
  68844. +#if (DPAA_VERSION >= 11)
  68845. + bool overrideStorageProfile; /**< TRUE if KeyGen override previously decided storage profile */
  68846. + t_FmPcdKgStorageProfile storageProfile; /**< Used when overrideStorageProfile TRUE */
  68847. +#endif /* (DPAA_VERSION >= 11) */
  68848. +
  68849. + e_FmPcdEngine nextEngine; /**< may be BMI, PLCR or CC */
  68850. + union { /**< depends on nextEngine */
  68851. + e_FmPcdDoneAction doneAction; /**< Used when next engine is BMI (done) */
  68852. + t_FmPcdKgPlcrProfile plcrProfile; /**< Used when next engine is PLCR */
  68853. + t_FmPcdKgCc cc; /**< Used when next engine is CC */
  68854. + } kgNextEngineParams;
  68855. + t_FmPcdKgSchemeCounter schemeCounter; /**< A structure of parameters for updating
  68856. + the scheme counter */
  68857. +} t_FmPcdKgSchemeParams;
  68858. +
  68859. +/**************************************************************************//**
  68860. + @Collection Definitions for CC statistics
  68861. +*//***************************************************************************/
  68862. +#if (DPAA_VERSION >= 11)
  68863. +#define FM_PCD_CC_STATS_MAX_NUM_OF_FLR 10 /* Maximal supported number of frame length ranges */
  68864. +#define FM_PCD_CC_STATS_FLR_SIZE 2 /* Size in bytes of a frame length range limit */
  68865. +#endif /* (DPAA_VERSION >= 11) */
  68866. +#define FM_PCD_CC_STATS_COUNTER_SIZE 4 /* Size in bytes of a frame length range counter */
  68867. +/* @} */
  68868. +
  68869. +/**************************************************************************//**
  68870. + @Description Parameters for defining CC as the next engine after a CC node.
  68871. +*//***************************************************************************/
  68872. +typedef struct t_FmPcdCcNextCcParams {
  68873. + t_Handle h_CcNode; /**< A handle of the next CC node */
  68874. +} t_FmPcdCcNextCcParams;
  68875. +
  68876. +#if (DPAA_VERSION >= 11)
  68877. +/**************************************************************************//**
  68878. + @Description Parameters for defining Frame replicator as the next engine after a CC node.
  68879. +*//***************************************************************************/
  68880. +typedef struct t_FmPcdCcNextFrParams {
  68881. + t_Handle h_FrmReplic; /**< A handle of the next frame replicator group */
  68882. +} t_FmPcdCcNextFrParams;
  68883. +#endif /* (DPAA_VERSION >= 11) */
  68884. +
  68885. +/**************************************************************************//**
  68886. + @Description Parameters for defining Policer as the next engine after a CC node.
  68887. +*//***************************************************************************/
  68888. +typedef struct t_FmPcdCcNextPlcrParams {
  68889. + bool overrideParams; /**< TRUE if CC override previously decided parameters*/
  68890. + bool sharedProfile; /**< Relevant only if overrideParams=TRUE:
  68891. + TRUE if this profile is shared between ports */
  68892. + uint16_t newRelativeProfileId; /**< Relevant only if overrideParams=TRUE:
  68893. + (otherwise profile id is taken from KeyGen);
  68894. + This parameter should indicate the policer
  68895. + profile offset within the port's
  68896. + policer profiles or from SHARED window.*/
  68897. + uint32_t newFqid; /**< Relevant only if overrideParams=TRUE:
  68898. + FQID for enqueuing the frame;
  68899. + In earlier chips if policer next engine is KEYGEN,
  68900. + this parameter can be 0, because the KEYGEN
  68901. + always decides the enqueue FQID.*/
  68902. +#if (DPAA_VERSION >= 11)
  68903. + uint8_t newRelativeStorageProfileId;
  68904. + /**< Indicates the relative storage profile offset within
  68905. + the port's storage profiles window;
  68906. + Relevant only if the port was configured with VSP. */
  68907. +#endif /* (DPAA_VERSION >= 11) */
  68908. +} t_FmPcdCcNextPlcrParams;
  68909. +
  68910. +/**************************************************************************//**
  68911. + @Description Parameters for defining enqueue as the next action after a CC node.
  68912. +*//***************************************************************************/
  68913. +typedef struct t_FmPcdCcNextEnqueueParams {
  68914. + e_FmPcdDoneAction action; /**< Action - when next engine is BMI (done) */
  68915. + bool overrideFqid; /**< TRUE if CC override previously decided fqid and vspid,
  68916. + relevant if action = e_FM_PCD_ENQ_FRAME */
  68917. + uint32_t newFqid; /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
  68918. + (otherwise FQID is taken from KeyGen),
  68919. + relevant if action = e_FM_PCD_ENQ_FRAME */
  68920. +#if (DPAA_VERSION >= 11)
  68921. + uint8_t newRelativeStorageProfileId;
  68922. + /**< Valid if overrideFqid=TRUE, Indicates the relative virtual
  68923. + storage profile offset within the port's storage profiles
  68924. + window; Relevant only if the port was configured with VSP. */
  68925. +#endif /* (DPAA_VERSION >= 11) */
  68926. +} t_FmPcdCcNextEnqueueParams;
  68927. +
  68928. +/**************************************************************************//**
  68929. + @Description Parameters for defining KeyGen as the next engine after a CC node.
  68930. +*//***************************************************************************/
  68931. +typedef struct t_FmPcdCcNextKgParams {
  68932. + bool overrideFqid; /**< TRUE if CC override previously decided fqid and vspid,
  68933. + Note - this parameters irrelevant for earlier chips */
  68934. + uint32_t newFqid; /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
  68935. + (otherwise FQID is taken from KeyGen),
  68936. + Note - this parameters irrelevant for earlier chips */
  68937. +#if (DPAA_VERSION >= 11)
  68938. + uint8_t newRelativeStorageProfileId;
  68939. + /**< Valid if overrideFqid=TRUE, Indicates the relative virtual
  68940. + storage profile offset within the port's storage profiles
  68941. + window; Relevant only if the port was configured with VSP. */
  68942. +#endif /* (DPAA_VERSION >= 11) */
  68943. +
  68944. + t_Handle h_DirectScheme; /**< Direct scheme handle to go to. */
  68945. +} t_FmPcdCcNextKgParams;
  68946. +
  68947. +/**************************************************************************//**
  68948. + @Description Parameters for defining the next engine after a CC node.
  68949. +*//***************************************************************************/
  68950. +typedef struct t_FmPcdCcNextEngineParams {
  68951. + e_FmPcdEngine nextEngine; /**< User has to initialize parameters
  68952. + according to nextEngine definition */
  68953. + union {
  68954. + t_FmPcdCcNextCcParams ccParams; /**< Parameters in case next engine is CC */
  68955. + t_FmPcdCcNextPlcrParams plcrParams; /**< Parameters in case next engine is PLCR */
  68956. + t_FmPcdCcNextEnqueueParams enqueueParams; /**< Parameters in case next engine is BMI */
  68957. + t_FmPcdCcNextKgParams kgParams; /**< Parameters in case next engine is KG */
  68958. +#if (DPAA_VERSION >= 11)
  68959. + t_FmPcdCcNextFrParams frParams; /**< Parameters in case next engine is FR */
  68960. +#endif /* (DPAA_VERSION >= 11) */
  68961. + } params; /**< union used for all the next-engine parameters options */
  68962. +
  68963. + t_Handle h_Manip; /**< Handle to Manipulation object.
  68964. + Relevant if next engine is of type result
  68965. + (e_FM_PCD_PLCR, e_FM_PCD_KG, e_FM_PCD_DONE) */
  68966. +
  68967. + bool statisticsEn; /**< If TRUE, statistics counters are incremented
  68968. + for each frame passing through this
  68969. + Coarse Classification entry. */
  68970. +} t_FmPcdCcNextEngineParams;
  68971. +
  68972. +/**************************************************************************//**
  68973. + @Description Parameters for defining a single CC key
  68974. +*//***************************************************************************/
  68975. +typedef struct t_FmPcdCcKeyParams {
  68976. + uint8_t *p_Key; /**< Relevant only if 'action' = e_FM_PCD_ACTION_EXACT_MATCH;
  68977. + pointer to the key of the size defined in keySize */
  68978. + uint8_t *p_Mask; /**< Relevant only if 'action' = e_FM_PCD_ACTION_EXACT_MATCH;
  68979. + pointer to the Mask per key of the size defined
  68980. + in keySize. p_Key and p_Mask (if defined) has to be
  68981. + of the same size defined in the keySize;
  68982. + NOTE that if this value is equal for all entries whithin
  68983. + this table, the driver will automatically use global-mask
  68984. + (i.e. one common mask for all entries) instead of private
  68985. + one; that is done in order to spare some memory and for
  68986. + better performance. */
  68987. + t_FmPcdCcNextEngineParams ccNextEngineParams;
  68988. + /**< parameters for the next for the defined Key in
  68989. + the p_Key */
  68990. +} t_FmPcdCcKeyParams;
  68991. +
  68992. +/**************************************************************************//**
  68993. + @Description Parameters for defining CC keys parameters
  68994. + The driver supports two methods for CC node allocation: dynamic and static.
  68995. + Static mode was created in order to prevent runtime alloc/free
  68996. + of FMan memory (MURAM), which may cause fragmentation; in this mode,
  68997. + the driver automatically allocates the memory according to
  68998. + 'maxNumOfKeys' parameter. The driver calculates the maximal memory
  68999. + size that may be used for this CC-Node taking into consideration
  69000. + 'maskSupport' and 'statisticsMode' parameters.
  69001. + When 'action' = e_FM_PCD_ACTION_INDEXED_LOOKUP in the extraction
  69002. + parameters of this node, 'maxNumOfKeys' must be equal to 'numOfKeys'.
  69003. + In dynamic mode, 'maxNumOfKeys' must be zero. At initialization,
  69004. + all required structures are allocated according to 'numOfKeys'
  69005. + parameter. During runtime modification, these structures are
  69006. + re-allocated according to the updated number of keys.
  69007. +
  69008. + Please note that 'action' and 'icIndxMask' mentioned in the
  69009. + specific parameter explanations are passed in the extraction
  69010. + parameters of the node (fields of extractCcParams.extractNonHdr).
  69011. +*//***************************************************************************/
  69012. +typedef struct t_KeysParams {
  69013. + uint16_t maxNumOfKeys; /**< Maximum number of keys that will (ever) be used in this CC-Node;
  69014. + A value of zero may be used for dynamic memory allocation. */
  69015. + bool maskSupport; /**< This parameter is relevant only if a node is initialized with
  69016. + 'action' = e_FM_PCD_ACTION_EXACT_MATCH and maxNumOfKeys > 0;
  69017. + Should be TRUE to reserve table memory for key masks, even if
  69018. + initial keys do not contain masks, or if the node was initialized
  69019. + as 'empty' (without keys); this will allow user to add keys with
  69020. + masks at runtime.
  69021. + NOTE that if user want to use only global-masks (i.e. one common mask
  69022. + for all the entries within this table, this parameter should set to 'FALSE'. */
  69023. + e_FmPcdCcStatsMode statisticsMode; /**< Determines the supported statistics mode for all node's keys.
  69024. + To enable statistics gathering, statistics should be enabled per
  69025. + every key, using 'statisticsEn' in next engine parameters structure
  69026. + of that key;
  69027. + If 'maxNumOfKeys' is set, all required structures will be
  69028. + preallocated for all keys. */
  69029. +#if (DPAA_VERSION >= 11)
  69030. + uint16_t frameLengthRanges[FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
  69031. + /**< Relevant only for 'RMON' statistics mode
  69032. + (this feature is supported only on B4860 device);
  69033. + Holds a list of programmable thresholds - for each received frame,
  69034. + its length in bytes is examined against these range thresholds and
  69035. + the appropriate counter is incremented by 1 - for example, to belong
  69036. + to range i, the following should hold:
  69037. + range i-1 threshold < frame length <= range i threshold
  69038. + Each range threshold must be larger then its preceding range
  69039. + threshold, and last range threshold must be 0xFFFF. */
  69040. +#endif /* (DPAA_VERSION >= 11) */
  69041. + uint16_t numOfKeys; /**< Number of initial keys;
  69042. + Note that in case of 'action' = e_FM_PCD_ACTION_INDEXED_LOOKUP,
  69043. + this field should be power-of-2 of the number of bits that are
  69044. + set in 'icIndxMask'. */
  69045. + uint8_t keySize; /**< Size of key - for extraction of type FULL_FIELD, 'keySize' has
  69046. + to be the standard size of the selected key; For other extraction
  69047. + types, 'keySize' has to be as size of extraction; When 'action' =
  69048. + e_FM_PCD_ACTION_INDEXED_LOOKUP, 'keySize' must be 2. */
  69049. + t_FmPcdCcKeyParams keyParams[FM_PCD_MAX_NUM_OF_KEYS];
  69050. + /**< An array with 'numOfKeys' entries, each entry specifies the
  69051. + corresponding key parameters;
  69052. + When 'action' = e_FM_PCD_ACTION_EXACT_MATCH, this value must not
  69053. + exceed 255 (FM_PCD_MAX_NUM_OF_KEYS-1) as the last entry is saved
  69054. + for the 'miss' entry. */
  69055. + t_FmPcdCcNextEngineParams ccNextEngineParamsForMiss;
  69056. + /**< Parameters for defining the next engine when a key is not matched;
  69057. + Not relevant if action = e_FM_PCD_ACTION_INDEXED_LOOKUP. */
  69058. +} t_KeysParams;
  69059. +
  69060. +
  69061. +/**************************************************************************//**
  69062. + @Description Parameters for defining a CC node
  69063. +*//***************************************************************************/
  69064. +typedef struct t_FmPcdCcNodeParams {
  69065. + t_FmPcdExtractEntry extractCcParams; /**< Extraction parameters */
  69066. + t_KeysParams keysParams; /**< Keys definition matching the selected extraction */
  69067. +} t_FmPcdCcNodeParams;
  69068. +
  69069. +/**************************************************************************//**
  69070. + @Description Parameters for defining a hash table
  69071. +*//***************************************************************************/
  69072. +typedef struct t_FmPcdHashTableParams {
  69073. + uint16_t maxNumOfKeys; /**< Maximum Number Of Keys that will (ever) be used in this Hash-table */
  69074. + e_FmPcdCcStatsMode statisticsMode; /**< If not e_FM_PCD_CC_STATS_MODE_NONE, the required structures for the
  69075. + requested statistics mode will be allocated according to maxNumOfKeys. */
  69076. + uint8_t kgHashShift; /**< KG-Hash-shift as it was configured in the KG-scheme
  69077. + that leads to this hash-table. */
  69078. + uint16_t hashResMask; /**< Mask that will be used on the hash-result;
  69079. + The number-of-sets for this hash will be calculated
  69080. + as (2^(number of bits set in 'hashResMask'));
  69081. + The 4 lower bits must be cleared. */
  69082. + uint8_t hashShift; /**< Byte offset from the beginning of the KeyGen hash result to the
  69083. + 2-bytes to be used as hash index. */
  69084. + uint8_t matchKeySize; /**< Size of the exact match keys held by the hash buckets */
  69085. +
  69086. + t_FmPcdCcNextEngineParams ccNextEngineParamsForMiss; /**< Parameters for defining the next engine when a key is not matched */
  69087. +
  69088. +} t_FmPcdHashTableParams;
  69089. +
  69090. +/**************************************************************************//**
  69091. + @Description Parameters for defining a CC tree group.
  69092. +
  69093. + This structure defines a CC group in terms of NetEnv units
  69094. + and the action to be taken in each case. The unitIds list must
  69095. + be given in order from low to high indices.
  69096. +
  69097. + t_FmPcdCcNextEngineParams is a list of 2^numOfDistinctionUnits
  69098. + structures where each defines the next action to be taken for
  69099. + each units combination. for example:
  69100. + numOfDistinctionUnits = 2
  69101. + unitIds = {1,3}
  69102. + p_NextEnginePerEntriesInGrp[0] = t_FmPcdCcNextEngineParams for the case that
  69103. + unit 1 - not found; unit 3 - not found;
  69104. + p_NextEnginePerEntriesInGrp[1] = t_FmPcdCcNextEngineParams for the case that
  69105. + unit 1 - not found; unit 3 - found;
  69106. + p_NextEnginePerEntriesInGrp[2] = t_FmPcdCcNextEngineParams for the case that
  69107. + unit 1 - found; unit 3 - not found;
  69108. + p_NextEnginePerEntriesInGrp[3] = t_FmPcdCcNextEngineParams for the case that
  69109. + unit 1 - found; unit 3 - found;
  69110. +*//***************************************************************************/
  69111. +typedef struct t_FmPcdCcGrpParams {
  69112. + uint8_t numOfDistinctionUnits; /**< Up to 4 */
  69113. + uint8_t unitIds[FM_PCD_MAX_NUM_OF_CC_UNITS];
  69114. + /**< Indices of the units as defined in
  69115. + FM_PCD_NetEnvCharacteristicsSet() */
  69116. + t_FmPcdCcNextEngineParams nextEnginePerEntriesInGrp[FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP];
  69117. + /**< Maximum entries per group is 16 */
  69118. +} t_FmPcdCcGrpParams;
  69119. +
  69120. +/**************************************************************************//**
  69121. + @Description Parameters for defining CC tree groups
  69122. +*//***************************************************************************/
  69123. +typedef struct t_FmPcdCcTreeParams {
  69124. + t_Handle h_NetEnv; /**< A handle to the Network environment as returned
  69125. + by FM_PCD_NetEnvCharacteristicsSet() */
  69126. + uint8_t numOfGrps; /**< Number of CC groups within the CC tree */
  69127. + t_FmPcdCcGrpParams ccGrpParams[FM_PCD_MAX_NUM_OF_CC_GROUPS];
  69128. + /**< Parameters for each group. */
  69129. +} t_FmPcdCcTreeParams;
  69130. +
  69131. +
  69132. +/**************************************************************************//**
  69133. + @Description CC key statistics structure
  69134. +*//***************************************************************************/
  69135. +typedef struct t_FmPcdCcKeyStatistics {
  69136. + uint32_t byteCount; /**< This counter reflects byte count of frames that
  69137. + were matched by this key. */
  69138. + uint32_t frameCount; /**< This counter reflects count of frames that
  69139. + were matched by this key. */
  69140. +#if (DPAA_VERSION >= 11)
  69141. + uint32_t frameLengthRangeCount[FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
  69142. + /**< These counters reflect how many frames matched
  69143. + this key in 'RMON' statistics mode:
  69144. + Each counter holds the number of frames of a
  69145. + specific frames length range, according to the
  69146. + ranges provided at initialization. */
  69147. +#endif /* (DPAA_VERSION >= 11) */
  69148. +} t_FmPcdCcKeyStatistics;
  69149. +
  69150. +/**************************************************************************//**
  69151. + @Description Parameters for defining policer byte rate
  69152. +*//***************************************************************************/
  69153. +typedef struct t_FmPcdPlcrByteRateModeParams {
  69154. + e_FmPcdPlcrFrameLengthSelect frameLengthSelection; /**< Frame length selection */
  69155. + e_FmPcdPlcrRollBackFrameSelect rollBackFrameSelection; /**< relevant option only e_FM_PCD_PLCR_L2_FRM_LEN,
  69156. + e_FM_PCD_PLCR_FULL_FRM_LEN */
  69157. +} t_FmPcdPlcrByteRateModeParams;
  69158. +
  69159. +/**************************************************************************//**
  69160. + @Description Parameters for defining the policer profile (based on
  69161. + RFC-2698 or RFC-4115 attributes).
  69162. +*//***************************************************************************/
  69163. +typedef struct t_FmPcdPlcrNonPassthroughAlgParams {
  69164. + e_FmPcdPlcrRateMode rateMode; /**< Byte mode or Packet mode */
  69165. + t_FmPcdPlcrByteRateModeParams byteModeParams; /**< Valid for Byte NULL for Packet */
  69166. + uint32_t committedInfoRate; /**< KBits/Second or Packets/Second */
  69167. + uint32_t committedBurstSize; /**< Bytes/Packets */
  69168. + uint32_t peakOrExcessInfoRate; /**< KBits/Second or Packets/Second */
  69169. + uint32_t peakOrExcessBurstSize; /**< Bytes/Packets */
  69170. +} t_FmPcdPlcrNonPassthroughAlgParams;
  69171. +
  69172. +/**************************************************************************//**
  69173. + @Description Parameters for defining the next engine after policer
  69174. +*//***************************************************************************/
  69175. +typedef union u_FmPcdPlcrNextEngineParams {
  69176. + e_FmPcdDoneAction action; /**< Action - when next engine is BMI (done) */
  69177. + t_Handle h_Profile; /**< Policer profile handle - used when next engine
  69178. + is Policer, must be a SHARED profile */
  69179. + t_Handle h_DirectScheme; /**< Direct scheme select - when next engine is KeyGen */
  69180. +} u_FmPcdPlcrNextEngineParams;
  69181. +
  69182. +/**************************************************************************//**
  69183. + @Description Parameters for defining the policer profile entry
  69184. +*//***************************************************************************/
  69185. +typedef struct t_FmPcdPlcrProfileParams {
  69186. + bool modify; /**< TRUE to change an existing profile */
  69187. + union {
  69188. + struct {
  69189. + e_FmPcdProfileTypeSelection profileType; /**< Type of policer profile */
  69190. + t_Handle h_FmPort; /**< Relevant for per-port profiles only */
  69191. + uint16_t relativeProfileId; /**< Profile id - relative to shared group or to port */
  69192. + } newParams; /**< use it when modify = FALSE */
  69193. + t_Handle h_Profile; /**< A handle to a profile - use it when modify=TRUE */
  69194. + } id;
  69195. + e_FmPcdPlcrAlgorithmSelection algSelection; /**< Profile Algorithm PASS_THROUGH, RFC_2698, RFC_4115 */
  69196. + e_FmPcdPlcrColorMode colorMode; /**< COLOR_BLIND, COLOR_AWARE */
  69197. +
  69198. + union {
  69199. + e_FmPcdPlcrColor dfltColor; /**< For Color-Blind Pass-Through mode; the policer will re-color
  69200. + any incoming packet with the default value. */
  69201. + e_FmPcdPlcrColor override; /**< For Color-Aware modes; the profile response to a
  69202. + pre-color value of 2'b11. */
  69203. + } color;
  69204. +
  69205. + t_FmPcdPlcrNonPassthroughAlgParams nonPassthroughAlgParams; /**< RFC2698 or RFC4115 parameters */
  69206. +
  69207. + e_FmPcdEngine nextEngineOnGreen; /**< Next engine for green-colored frames */
  69208. + u_FmPcdPlcrNextEngineParams paramsOnGreen; /**< Next engine parameters for green-colored frames */
  69209. +
  69210. + e_FmPcdEngine nextEngineOnYellow; /**< Next engine for yellow-colored frames */
  69211. + u_FmPcdPlcrNextEngineParams paramsOnYellow; /**< Next engine parameters for yellow-colored frames */
  69212. +
  69213. + e_FmPcdEngine nextEngineOnRed; /**< Next engine for red-colored frames */
  69214. + u_FmPcdPlcrNextEngineParams paramsOnRed; /**< Next engine parameters for red-colored frames */
  69215. +
  69216. + bool trapProfileOnFlowA; /**< Obsolete - do not use */
  69217. + bool trapProfileOnFlowB; /**< Obsolete - do not use */
  69218. + bool trapProfileOnFlowC; /**< Obsolete - do not use */
  69219. +} t_FmPcdPlcrProfileParams;
  69220. +
  69221. +/**************************************************************************//**
  69222. + @Description Parameters for selecting a location for requested manipulation
  69223. +*//***************************************************************************/
  69224. +typedef struct t_FmManipHdrInfo {
  69225. + e_NetHeaderType hdr; /**< Header selection */
  69226. + e_FmPcdHdrIndex hdrIndex; /**< Relevant only for MPLS, VLAN and tunneled IP. Otherwise should be cleared. */
  69227. + bool byField; /**< TRUE if the location of manipulation is according to some field in the specific header*/
  69228. + t_FmPcdFields fullField; /**< Relevant only when byField = TRUE: Extract field */
  69229. +} t_FmManipHdrInfo;
  69230. +
  69231. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  69232. +/**************************************************************************//**
  69233. + @Description Parameters for defining an insertion manipulation
  69234. + of type e_FM_PCD_MANIP_INSRT_TO_START_OF_FRAME_TEMPLATE
  69235. +*//***************************************************************************/
  69236. +typedef struct t_FmPcdManipHdrInsrtByTemplateParams {
  69237. + uint8_t size; /**< Size of insert template to the start of the frame. */
  69238. + uint8_t hdrTemplate[FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE];
  69239. + /**< Array of the insertion template. */
  69240. +
  69241. + bool modifyOuterIp; /**< TRUE if user want to modify some fields in outer IP. */
  69242. + struct {
  69243. + uint16_t ipOuterOffset; /**< Offset of outer IP in the insert template, relevant if modifyOuterIp = TRUE.*/
  69244. + uint16_t dscpEcn; /**< value of dscpEcn in IP outer, relevant if modifyOuterIp = TRUE.
  69245. + in IPV4 dscpEcn only byte - it has to be adjusted to the right*/
  69246. + bool udpPresent; /**< TRUE if UDP is present in the insert template, relevant if modifyOuterIp = TRUE.*/
  69247. + uint8_t udpOffset; /**< Offset in the insert template of UDP, relevant if modifyOuterIp = TRUE and udpPresent=TRUE.*/
  69248. + uint8_t ipIdentGenId; /**< Used by FMan-CTRL to calculate IP-identification field,relevant if modifyOuterIp = TRUE.*/
  69249. + bool recalculateLength; /**< TRUE if recalculate length has to be performed due to the engines in the path which can change the frame later, relevant if modifyOuterIp = TRUE.*/
  69250. + struct {
  69251. + uint8_t blockSize; /**< The CAAM block-size; Used by FMan-CTRL to calculate the IP Total Length field.*/
  69252. + uint8_t extraBytesAddedAlignedToBlockSize; /**< Used by FMan-CTRL to calculate the IP Total Length field and UDP length*/
  69253. + uint8_t extraBytesAddedNotAlignedToBlockSize;/**< Used by FMan-CTRL to calculate the IP Total Length field and UDP length.*/
  69254. + } recalculateLengthParams; /**< Recalculate length parameters - relevant if modifyOuterIp = TRUE and recalculateLength = TRUE */
  69255. + } modifyOuterIpParams; /**< Outer IP modification parameters - ignored if modifyOuterIp is FALSE */
  69256. +
  69257. + bool modifyOuterVlan; /**< TRUE if user wants to modify VPri field in the outer VLAN header*/
  69258. + struct {
  69259. + uint8_t vpri; /**< Value of VPri, relevant if modifyOuterVlan = TRUE
  69260. + VPri only 3 bits, it has to be adjusted to the right*/
  69261. + } modifyOuterVlanParams;
  69262. +} t_FmPcdManipHdrInsrtByTemplateParams;
  69263. +
  69264. +/**************************************************************************//**
  69265. + @Description Parameters for defining CAPWAP fragmentation
  69266. +*//***************************************************************************/
  69267. +typedef struct t_CapwapFragmentationParams {
  69268. + uint16_t sizeForFragmentation; /**< if length of the frame is greater than this value, CAPWAP fragmentation will be executed.*/
  69269. + bool headerOptionsCompr; /**< TRUE - first fragment include the CAPWAP header options field,
  69270. + and all other fragments exclude the CAPWAP options field,
  69271. + FALSE - all fragments include CAPWAP header options field. */
  69272. +} t_CapwapFragmentationParams;
  69273. +
  69274. +/**************************************************************************//**
  69275. + @Description Parameters for defining CAPWAP reassembly
  69276. +*//***************************************************************************/
  69277. +typedef struct t_CapwapReassemblyParams {
  69278. + uint16_t maxNumFramesInProcess; /**< Number of frames which can be reassembled concurrently; must be power of 2.
  69279. + In case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
  69280. + maxNumFramesInProcess has to be in the range of 4 - 512,
  69281. + In case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
  69282. + maxNumFramesInProcess has to be in the range of 8 - 2048 */
  69283. + bool haltOnDuplicationFrag; /**< If TRUE, reassembly process will be halted due to duplicated fragment,
  69284. + and all processed fragments will be enqueued with error indication;
  69285. + If FALSE, only duplicated fragments will be enqueued with error indication. */
  69286. +
  69287. + e_FmPcdManipReassemTimeOutMode timeOutMode; /**< Expiration delay initialized by the reassembly process */
  69288. + uint32_t fqidForTimeOutFrames; /**< FQID in which time out frames will enqueue during Time Out Process */
  69289. + uint32_t timeoutRoutineRequestTime;
  69290. + /**< Represents the time interval in microseconds between consecutive
  69291. + timeout routine requests It has to be power of 2. */
  69292. + uint32_t timeoutThresholdForReassmProcess;
  69293. + /**< Time interval (microseconds) for marking frames in process as too old;
  69294. + Frames in process are those for which at least one fragment was received
  69295. + but not all fragments. */
  69296. +
  69297. + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry;/**< Number of frames per hash entry (needed for the reassembly process) */
  69298. +} t_CapwapReassemblyParams;
  69299. +
  69300. +/**************************************************************************//**
  69301. + @Description Parameters for defining fragmentation/reassembly manipulation
  69302. +*//***************************************************************************/
  69303. +typedef struct t_FmPcdManipFragOrReasmParams {
  69304. + bool frag; /**< TRUE if using the structure for fragmentation,
  69305. + otherwise this structure is used for reassembly */
  69306. + uint8_t sgBpid; /**< Scatter/Gather buffer pool id;
  69307. + Same LIODN number is used for these buffers as for
  69308. + the received frames buffers, so buffers of this pool
  69309. + need to be allocated in the same memory area as the
  69310. + received buffers. If the received buffers arrive
  69311. + from different sources, the Scatter/Gather BP id
  69312. + should be mutual to all these sources. */
  69313. + e_NetHeaderType hdr; /**< Header selection */
  69314. + union {
  69315. + t_CapwapFragmentationParams capwapFragParams; /**< Structure for CAPWAP fragmentation,
  69316. + relevant if 'frag' = TRUE, 'hdr' = HEADER_TYPE_CAPWAP */
  69317. + t_CapwapReassemblyParams capwapReasmParams; /**< Structure for CAPWAP reassembly,
  69318. + relevant if 'frag' = FALSE, 'hdr' = HEADER_TYPE_CAPWAP */
  69319. + } u;
  69320. +} t_FmPcdManipFragOrReasmParams;
  69321. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  69322. +
  69323. +
  69324. +/**************************************************************************//**
  69325. + @Description Parameters for defining header removal by header type
  69326. +*//***************************************************************************/
  69327. +typedef struct t_FmPcdManipHdrRmvByHdrParams {
  69328. + e_FmPcdManipHdrRmvByHdrType type; /**< Selection of header removal location */
  69329. + union {
  69330. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  69331. + struct {
  69332. + bool include; /**< If FALSE, remove until the specified header (not including the header);
  69333. + If TRUE, remove also the specified header. */
  69334. + t_FmManipHdrInfo hdrInfo;
  69335. + } fromStartByHdr; /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
  69336. +#endif /* (DPAA_VERSION >= 11) || ... */
  69337. +#if (DPAA_VERSION >= 11)
  69338. + t_FmManipHdrInfo hdrInfo; /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
  69339. +#endif /* (DPAA_VERSION >= 11) */
  69340. + e_FmPcdManipHdrRmvSpecificL2 specificL2; /**< Relevant when type = e_FM_PCD_MANIP_BY_HDR_SPECIFIC_L2;
  69341. + Defines which L2 headers to remove. */
  69342. + } u;
  69343. +} t_FmPcdManipHdrRmvByHdrParams;
  69344. +
  69345. +/**************************************************************************//**
  69346. + @Description Parameters for configuring IP fragmentation manipulation
  69347. +
  69348. + Restrictions:
  69349. + - IP Fragmentation output fragments must not be forwarded to application directly.
  69350. + - Maximum number of fragments per frame is 16.
  69351. + - Fragmentation of IP fragments is not supported.
  69352. + - IPv4 packets containing header Option fields are fragmented by copying all option
  69353. + fields to each fragment, regardless of the copy bit value.
  69354. + - Transmit confirmation is not supported.
  69355. + - Fragmentation after SEC can't handle S/G frames.
  69356. + - Fragmentation nodes must be set as the last PCD action (i.e. the
  69357. + corresponding CC node key must have next engine set to e_FM_PCD_DONE).
  69358. + - Only BMan buffers shall be used for frames to be fragmented.
  69359. + - IPF does not support VSP. Therefore, on the same port where we have IPF
  69360. + we cannot support VSP.
  69361. + - NOTE: The following comment is relevant only for FMAN v3 devices: IPF
  69362. + does not support VSP. Therefore, on the same port where we have IPF we
  69363. + cannot support VSP.
  69364. +*//***************************************************************************/
  69365. +typedef struct t_FmPcdManipFragIpParams {
  69366. + uint16_t sizeForFragmentation; /**< If length of the frame is greater than this value,
  69367. + IP fragmentation will be executed.*/
  69368. +#if (DPAA_VERSION == 10)
  69369. + uint8_t scratchBpid; /**< Absolute buffer pool id according to BM configuration.*/
  69370. +#endif /* (DPAA_VERSION == 10) */
  69371. + bool sgBpidEn; /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
  69372. + If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
  69373. + received frame's buffer. */
  69374. + uint8_t sgBpid; /**< Scatter/Gather buffer pool id;
  69375. + This parameters is relevant when 'sgBpidEn=TRUE';
  69376. + Same LIODN number is used for these buffers as for the received frames buffers, so buffers
  69377. + of this pool need to be allocated in the same memory area as the received buffers.
  69378. + If the received buffers arrive from different sources, the Scatter/Gather BP id should be
  69379. + mutual to all these sources. */
  69380. + e_FmPcdManipDontFragAction dontFragAction; /**< Don't Fragment Action - If an IP packet is larger
  69381. + than MTU and its DF bit is set, then this field will
  69382. + determine the action to be taken.*/
  69383. +} t_FmPcdManipFragIpParams;
  69384. +
  69385. +/**************************************************************************//**
  69386. + @Description Parameters for configuring IP reassembly manipulation.
  69387. +
  69388. + This is a common structure for both IPv4 and IPv6 reassembly
  69389. + manipulation. For reassembly of both IPv4 and IPv6, make sure to
  69390. + set the 'hdr' field in t_FmPcdManipReassemParams to HEADER_TYPE_IPv6.
  69391. +
  69392. + Restrictions:
  69393. + - Application must define at least one scheme to catch the reassembled frames.
  69394. + - Maximum number of fragments per frame is 16.
  69395. + - Reassembly of IPv4 fragments containing Option fields is supported.
  69396. +
  69397. +*//***************************************************************************/
  69398. +typedef struct t_FmPcdManipReassemIpParams {
  69399. + uint8_t relativeSchemeId[2]; /**< Partition relative scheme id:
  69400. + relativeSchemeId[0] - Relative scheme ID for IPV4 Reassembly manipulation;
  69401. + relativeSchemeId[1] - Relative scheme ID for IPV6 Reassembly manipulation;
  69402. + NOTE: The following comment is relevant only for FMAN v2 devices:
  69403. + Relative scheme ID for IPv4/IPv6 Reassembly manipulation must be smaller than
  69404. + the user schemes id to ensure that the reassembly schemes will be first match;
  69405. + Rest schemes, if defined, should have higher relative scheme ID. */
  69406. +#if (DPAA_VERSION >= 11)
  69407. + uint32_t nonConsistentSpFqid; /**< In case that other fragments of the frame corresponds to different storage
  69408. + profile than the opening fragment (Non-Consistent-SP state)
  69409. + then one of two possible scenarios occurs:
  69410. + if 'nonConsistentSpFqid != 0', the reassembled frame will be enqueued to
  69411. + this fqid, otherwise a 'Non Consistent SP' bit will be set in the FD[status].*/
  69412. +#else
  69413. + uint8_t sgBpid; /**< Buffer pool id for the S/G frame created by the reassembly process */
  69414. +#endif /* (DPAA_VERSION >= 11) */
  69415. + uint8_t dataMemId; /**< Memory partition ID for the IPR's external tables structure */
  69416. + uint16_t dataLiodnOffset; /**< LIODN offset for access the IPR's external tables structure. */
  69417. + uint16_t minFragSize[2]; /**< Minimum fragment size:
  69418. + minFragSize[0] - for ipv4, minFragSize[1] - for ipv6 */
  69419. + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry[2];
  69420. + /**< Number of frames per hash entry needed for reassembly process:
  69421. + numOfFramesPerHashEntry[0] - for ipv4 (max value is e_FM_PCD_MANIP_EIGHT_WAYS_HASH);
  69422. + numOfFramesPerHashEntry[1] - for ipv6 (max value is e_FM_PCD_MANIP_SIX_WAYS_HASH). */
  69423. + uint16_t maxNumFramesInProcess; /**< Number of frames which can be processed by Reassembly in the same time;
  69424. + Must be power of 2;
  69425. + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
  69426. + maxNumFramesInProcess has to be in the range of 4 - 512;
  69427. + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
  69428. + maxNumFramesInProcess has to be in the range of 8 - 2048. */
  69429. + e_FmPcdManipReassemTimeOutMode timeOutMode; /**< Expiration delay initialized by Reassembly process */
  69430. + uint32_t fqidForTimeOutFrames; /**< FQID in which time out frames will enqueue during Time Out Process;
  69431. + Recommended value for this field is 0; in this way timed-out frames will be discarded */
  69432. + uint32_t timeoutThresholdForReassmProcess;
  69433. + /**< Represents the time interval in microseconds which defines
  69434. + if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
  69435. +} t_FmPcdManipReassemIpParams;
  69436. +
  69437. +/**************************************************************************//**
  69438. + @Description structure for defining IPSEC manipulation
  69439. +*//***************************************************************************/
  69440. +typedef struct t_FmPcdManipSpecialOffloadIPSecParams {
  69441. + bool decryption; /**< TRUE if being used in decryption direction;
  69442. + FALSE if being used in encryption direction. */
  69443. + bool ecnCopy; /**< TRUE to copy the ECN bits from inner/outer to outer/inner
  69444. + (direction depends on the 'decryption' field). */
  69445. + bool dscpCopy; /**< TRUE to copy the DSCP bits from inner/outer to outer/inner
  69446. + (direction depends on the 'decryption' field). */
  69447. + bool variableIpHdrLen; /**< TRUE for supporting variable IP header length in decryption. */
  69448. + bool variableIpVersion; /**< TRUE for supporting both IP version on the same SA in encryption */
  69449. + uint8_t outerIPHdrLen; /**< if 'variableIpVersion == TRUE' then this field must be set to non-zero value;
  69450. + It is specifies the length of the outer IP header that was configured in the
  69451. + corresponding SA. */
  69452. + uint16_t arwSize; /**< if <> '0' then will perform ARW check for this SA;
  69453. + The value must be a multiplication of 16 */
  69454. + uintptr_t arwAddr; /**< if arwSize <> '0' then this field must be set to non-zero value;
  69455. + MUST be allocated from FMAN's MURAM that the post-sec op-port belongs to;
  69456. + Must be 4B aligned. Required MURAM size is 'NEXT_POWER_OF_2(arwSize+32))/8+4' Bytes */
  69457. +} t_FmPcdManipSpecialOffloadIPSecParams;
  69458. +
  69459. +#if (DPAA_VERSION >= 11)
  69460. +/**************************************************************************//**
  69461. + @Description Parameters for configuring CAPWAP fragmentation manipulation
  69462. +
  69463. + Restrictions:
  69464. + - Maximum number of fragments per frame is 16.
  69465. + - Transmit confirmation is not supported.
  69466. + - Fragmentation nodes must be set as the last PCD action (i.e. the
  69467. + corresponding CC node key must have next engine set to e_FM_PCD_DONE).
  69468. + - Only BMan buffers shall be used for frames to be fragmented.
  69469. + - NOTE: The following comment is relevant only for FMAN v3 devices: IPF
  69470. + does not support VSP. Therefore, on the same port where we have IPF we
  69471. + cannot support VSP.
  69472. +*//***************************************************************************/
  69473. +typedef struct t_FmPcdManipFragCapwapParams {
  69474. + uint16_t sizeForFragmentation; /**< If length of the frame is greater than this value,
  69475. + CAPWAP fragmentation will be executed.*/
  69476. + bool sgBpidEn; /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
  69477. + If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
  69478. + received frame's buffer. */
  69479. + uint8_t sgBpid; /**< Scatter/Gather buffer pool id;
  69480. + This parameters is relevant when 'sgBpidEn=TRUE';
  69481. + Same LIODN number is used for these buffers as for the received frames buffers, so buffers
  69482. + of this pool need to be allocated in the same memory area as the received buffers.
  69483. + If the received buffers arrive from different sources, the Scatter/Gather BP id should be
  69484. + mutual to all these sources. */
  69485. + bool compressModeEn; /**< CAPWAP Header Options Compress Enable mode;
  69486. + When this mode is enabled then only the first fragment include the CAPWAP header options
  69487. + field (if user provides it in the input frame) and all other fragments exclude the CAPWAP
  69488. + options field (CAPWAP header is updated accordingly).*/
  69489. +} t_FmPcdManipFragCapwapParams;
  69490. +
  69491. +/**************************************************************************//**
  69492. + @Description Parameters for configuring CAPWAP reassembly manipulation.
  69493. +
  69494. + Restrictions:
  69495. + - Application must define one scheme to catch the reassembled frames.
  69496. + - Maximum number of fragments per frame is 16.
  69497. +
  69498. +*//***************************************************************************/
  69499. +typedef struct t_FmPcdManipReassemCapwapParams {
  69500. + uint8_t relativeSchemeId; /**< Partition relative scheme id;
  69501. + NOTE: this id must be smaller than the user schemes id to ensure that the reassembly scheme will be first match;
  69502. + Rest schemes, if defined, should have higher relative scheme ID. */
  69503. + uint8_t dataMemId; /**< Memory partition ID for the IPR's external tables structure */
  69504. + uint16_t dataLiodnOffset; /**< LIODN offset for access the IPR's external tables structure. */
  69505. + uint16_t maxReassembledFrameLength;/**< The maximum CAPWAP reassembled frame length in bytes;
  69506. + If maxReassembledFrameLength == 0, any successful reassembled frame length is
  69507. + considered as a valid length;
  69508. + if maxReassembledFrameLength > 0, a successful reassembled frame which its length
  69509. + exceeds this value is considered as an error frame (FD status[CRE] bit is set). */
  69510. + e_FmPcdManipReassemWaysNumber numOfFramesPerHashEntry;
  69511. + /**< Number of frames per hash entry needed for reassembly process */
  69512. + uint16_t maxNumFramesInProcess; /**< Number of frames which can be processed by reassembly in the same time;
  69513. + Must be power of 2;
  69514. + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
  69515. + maxNumFramesInProcess has to be in the range of 4 - 512;
  69516. + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
  69517. + maxNumFramesInProcess has to be in the range of 8 - 2048. */
  69518. + e_FmPcdManipReassemTimeOutMode timeOutMode; /**< Expiration delay initialized by Reassembly process */
  69519. + uint32_t fqidForTimeOutFrames; /**< FQID in which time out frames will enqueue during Time Out Process;
  69520. + Recommended value for this field is 0; in this way timed-out frames will be discarded */
  69521. + uint32_t timeoutThresholdForReassmProcess;
  69522. + /**< Represents the time interval in microseconds which defines
  69523. + if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
  69524. +} t_FmPcdManipReassemCapwapParams;
  69525. +
  69526. +/**************************************************************************//**
  69527. + @Description structure for defining CAPWAP manipulation
  69528. +*//***************************************************************************/
  69529. +typedef struct t_FmPcdManipSpecialOffloadCapwapParams {
  69530. + bool dtls; /**< TRUE if continue to SEC DTLS encryption */
  69531. + e_FmPcdManipHdrQosSrc qosSrc; /**< TODO */
  69532. +} t_FmPcdManipSpecialOffloadCapwapParams;
  69533. +
  69534. +#endif /* (DPAA_VERSION >= 11) */
  69535. +
  69536. +
  69537. +/**************************************************************************//**
  69538. + @Description Parameters for defining special offload manipulation
  69539. +*//***************************************************************************/
  69540. +typedef struct t_FmPcdManipSpecialOffloadParams {
  69541. + e_FmPcdManipSpecialOffloadType type; /**< Type of special offload manipulation */
  69542. + union
  69543. + {
  69544. + t_FmPcdManipSpecialOffloadIPSecParams ipsec; /**< Parameters for IPSec; Relevant when
  69545. + type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC */
  69546. +#if (DPAA_VERSION >= 11)
  69547. + t_FmPcdManipSpecialOffloadCapwapParams capwap; /**< Parameters for CAPWAP; Relevant when
  69548. + type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP */
  69549. +#endif /* (DPAA_VERSION >= 11) */
  69550. + } u;
  69551. +} t_FmPcdManipSpecialOffloadParams;
  69552. +
  69553. +/**************************************************************************//**
  69554. + @Description Parameters for defining insertion manipulation
  69555. +*//***************************************************************************/
  69556. +typedef struct t_FmPcdManipHdrInsrt {
  69557. + uint8_t size; /**< size of inserted section */
  69558. + uint8_t *p_Data; /**< data to be inserted */
  69559. +} t_FmPcdManipHdrInsrt;
  69560. +
  69561. +
  69562. +/**************************************************************************//**
  69563. + @Description Parameters for defining generic removal manipulation
  69564. +*//***************************************************************************/
  69565. +typedef struct t_FmPcdManipHdrRmvGenericParams {
  69566. + uint8_t offset; /**< Offset from beginning of header to the start
  69567. + location of the removal */
  69568. + uint8_t size; /**< Size of removed section */
  69569. +} t_FmPcdManipHdrRmvGenericParams;
  69570. +
  69571. +/**************************************************************************//**
  69572. + @Description Parameters for defining generic insertion manipulation
  69573. +*//***************************************************************************/
  69574. +typedef struct t_FmPcdManipHdrInsrtGenericParams {
  69575. + uint8_t offset; /**< Offset from beginning of header to the start
  69576. + location of the insertion */
  69577. + uint8_t size; /**< Size of inserted section */
  69578. + bool replace; /**< TRUE to override (replace) existing data at
  69579. + 'offset', FALSE to insert */
  69580. + uint8_t *p_Data; /**< Pointer to data to be inserted */
  69581. +} t_FmPcdManipHdrInsrtGenericParams;
  69582. +
  69583. +/**************************************************************************//**
  69584. + @Description Parameters for defining header manipulation VLAN DSCP To Vpri translation
  69585. +*//***************************************************************************/
  69586. +typedef struct t_FmPcdManipHdrFieldUpdateVlanDscpToVpri {
  69587. + uint8_t dscpToVpriTable[FM_PCD_MANIP_DSCP_TO_VLAN_TRANS];
  69588. + /**< A table of VPri values for each DSCP value;
  69589. + The index is the DSCP value (0-0x3F) and the
  69590. + value is the corresponding VPRI (0-15). */
  69591. + uint8_t vpriDefVal; /**< 0-7, Relevant only if if updateType =
  69592. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN,
  69593. + this field is the Q Tag default value if the
  69594. + IP header is not found. */
  69595. +} t_FmPcdManipHdrFieldUpdateVlanDscpToVpri;
  69596. +
  69597. +/**************************************************************************//**
  69598. + @Description Parameters for defining header manipulation VLAN fields updates
  69599. +*//***************************************************************************/
  69600. +typedef struct t_FmPcdManipHdrFieldUpdateVlan {
  69601. + e_FmPcdManipHdrFieldUpdateVlan updateType; /**< Selects VLAN update type */
  69602. + union {
  69603. + uint8_t vpri; /**< 0-7, Relevant only if If updateType =
  69604. + e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_PRI, this
  69605. + is the new VLAN pri. */
  69606. + t_FmPcdManipHdrFieldUpdateVlanDscpToVpri dscpToVpri; /**< Parameters structure, Relevant only if updateType
  69607. + = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN. */
  69608. + } u;
  69609. +} t_FmPcdManipHdrFieldUpdateVlan;
  69610. +
  69611. +/**************************************************************************//**
  69612. + @Description Parameters for defining header manipulation IPV4 fields updates
  69613. +*//***************************************************************************/
  69614. +typedef struct t_FmPcdManipHdrFieldUpdateIpv4 {
  69615. + ipv4HdrManipUpdateFlags_t validUpdates; /**< ORed flag, selecting the required updates */
  69616. + uint8_t tos; /**< 8 bit New TOS; Relevant if validUpdates contains
  69617. + HDR_MANIP_IPV4_TOS */
  69618. + uint16_t id; /**< 16 bit New IP ID; Relevant only if validUpdates
  69619. + contains HDR_MANIP_IPV4_ID */
  69620. + uint32_t src; /**< 32 bit New IP SRC; Relevant only if validUpdates
  69621. + contains HDR_MANIP_IPV4_SRC */
  69622. + uint32_t dst; /**< 32 bit New IP DST; Relevant only if validUpdates
  69623. + contains HDR_MANIP_IPV4_DST */
  69624. +} t_FmPcdManipHdrFieldUpdateIpv4;
  69625. +
  69626. +/**************************************************************************//**
  69627. + @Description Parameters for defining header manipulation IPV6 fields updates
  69628. +*//***************************************************************************/
  69629. +typedef struct t_FmPcdManipHdrFieldUpdateIpv6 {
  69630. + ipv6HdrManipUpdateFlags_t validUpdates; /**< ORed flag, selecting the required updates */
  69631. + uint8_t trafficClass; /**< 8 bit New Traffic Class; Relevant if validUpdates contains
  69632. + HDR_MANIP_IPV6_TC */
  69633. + uint8_t src[NET_HEADER_FIELD_IPv6_ADDR_SIZE];
  69634. + /**< 16 byte new IP SRC; Relevant only if validUpdates
  69635. + contains HDR_MANIP_IPV6_SRC */
  69636. + uint8_t dst[NET_HEADER_FIELD_IPv6_ADDR_SIZE];
  69637. + /**< 16 byte new IP DST; Relevant only if validUpdates
  69638. + contains HDR_MANIP_IPV6_DST */
  69639. +} t_FmPcdManipHdrFieldUpdateIpv6;
  69640. +
  69641. +/**************************************************************************//**
  69642. + @Description Parameters for defining header manipulation TCP/UDP fields updates
  69643. +*//***************************************************************************/
  69644. +typedef struct t_FmPcdManipHdrFieldUpdateTcpUdp {
  69645. + tcpUdpHdrManipUpdateFlags_t validUpdates; /**< ORed flag, selecting the required updates */
  69646. + uint16_t src; /**< 16 bit New TCP/UDP SRC; Relevant only if validUpdates
  69647. + contains HDR_MANIP_TCP_UDP_SRC */
  69648. + uint16_t dst; /**< 16 bit New TCP/UDP DST; Relevant only if validUpdates
  69649. + contains HDR_MANIP_TCP_UDP_DST */
  69650. +} t_FmPcdManipHdrFieldUpdateTcpUdp;
  69651. +
  69652. +/**************************************************************************//**
  69653. + @Description Parameters for defining header manipulation fields updates
  69654. +*//***************************************************************************/
  69655. +typedef struct t_FmPcdManipHdrFieldUpdateParams {
  69656. + e_FmPcdManipHdrFieldUpdateType type; /**< Type of header field update manipulation */
  69657. + union {
  69658. + t_FmPcdManipHdrFieldUpdateVlan vlan; /**< Parameters for VLAN update. Relevant when
  69659. + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN */
  69660. + t_FmPcdManipHdrFieldUpdateIpv4 ipv4; /**< Parameters for IPv4 update. Relevant when
  69661. + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4 */
  69662. + t_FmPcdManipHdrFieldUpdateIpv6 ipv6; /**< Parameters for IPv6 update. Relevant when
  69663. + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6 */
  69664. + t_FmPcdManipHdrFieldUpdateTcpUdp tcpUdp; /**< Parameters for TCP/UDP update. Relevant when
  69665. + type = e_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP */
  69666. + } u;
  69667. +} t_FmPcdManipHdrFieldUpdateParams;
  69668. +
  69669. +
  69670. +
  69671. +/**************************************************************************//**
  69672. + @Description Parameters for defining custom header manipulation for generic field replacement
  69673. +*//***************************************************************************/
  69674. +typedef struct t_FmPcdManipHdrCustomGenFieldReplace {
  69675. + uint8_t srcOffset; /**< Location of new data - Offset from
  69676. + Parse Result (>= 16, srcOffset+size <= 32, ) */
  69677. + uint8_t dstOffset; /**< Location of data to be overwritten - Offset from
  69678. + start of frame (dstOffset + size <= 256). */
  69679. + uint8_t size; /**< The number of bytes (<=16) to be replaced */
  69680. + uint8_t mask; /**< Optional 1 byte mask. Set to select bits for
  69681. + replacement (1 - bit will be replaced);
  69682. + Clear to use field as is. */
  69683. + uint8_t maskOffset; /**< Relevant if mask != 0;
  69684. + Mask offset within the replaces "size" */
  69685. +} t_FmPcdManipHdrCustomGenFieldReplace;
  69686. +
  69687. +/**************************************************************************//**
  69688. + @Description Parameters for defining custom header manipulation for IP replacement
  69689. +*//***************************************************************************/
  69690. +typedef struct t_FmPcdManipHdrCustomIpHdrReplace {
  69691. + e_FmPcdManipHdrCustomIpReplace replaceType; /**< Selects replace update type */
  69692. + bool decTtlHl; /**< Decrement TTL (IPV4) or Hop limit (IPV6) by 1 */
  69693. + bool updateIpv4Id; /**< Relevant when replaceType =
  69694. + e_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 */
  69695. + uint16_t id; /**< 16 bit New IP ID; Relevant only if
  69696. + updateIpv4Id = TRUE */
  69697. + uint8_t hdrSize; /**< The size of the new IP header */
  69698. + uint8_t hdr[FM_PCD_MANIP_MAX_HDR_SIZE];
  69699. + /**< The new IP header */
  69700. +} t_FmPcdManipHdrCustomIpHdrReplace;
  69701. +
  69702. +/**************************************************************************//**
  69703. + @Description Parameters for defining custom header manipulation
  69704. +*//***************************************************************************/
  69705. +typedef struct t_FmPcdManipHdrCustomParams {
  69706. + e_FmPcdManipHdrCustomType type; /**< Type of header field update manipulation */
  69707. + union {
  69708. + t_FmPcdManipHdrCustomIpHdrReplace ipHdrReplace; /**< Parameters IP header replacement */
  69709. + t_FmPcdManipHdrCustomGenFieldReplace genFieldReplace; /**< Parameters IP header replacement */
  69710. + } u;
  69711. +} t_FmPcdManipHdrCustomParams;
  69712. +
  69713. +/**************************************************************************//**
  69714. + @Description Parameters for defining specific L2 insertion manipulation
  69715. +*//***************************************************************************/
  69716. +typedef struct t_FmPcdManipHdrInsrtSpecificL2Params {
  69717. + e_FmPcdManipHdrInsrtSpecificL2 specificL2; /**< Selects which L2 headers to insert */
  69718. + bool update; /**< TRUE to update MPLS header */
  69719. + uint8_t size; /**< size of inserted section */
  69720. + uint8_t *p_Data; /**< data to be inserted */
  69721. +} t_FmPcdManipHdrInsrtSpecificL2Params;
  69722. +
  69723. +#if (DPAA_VERSION >= 11)
  69724. +/**************************************************************************//**
  69725. + @Description Parameters for defining IP insertion manipulation
  69726. +*//***************************************************************************/
  69727. +typedef struct t_FmPcdManipHdrInsrtIpParams {
  69728. + bool calcL4Checksum; /**< Calculate L4 checksum. */
  69729. + e_FmPcdManipHdrQosMappingMode mappingMode; /**< TODO */
  69730. + uint8_t lastPidOffset; /**< the offset of the last Protocol within
  69731. + the inserted header */
  69732. + uint16_t id; /**< 16 bit New IP ID */
  69733. + bool dontFragOverwrite;
  69734. + /**< IPv4 only. DF is overwritten with the hash-result next-to-last byte.
  69735. + * This byte is configured to be overwritten when RPD is set. */
  69736. + uint8_t lastDstOffset;
  69737. + /**< IPv6 only. if routing extension exist, user should set the offset of the destination address
  69738. + * in order to calculate UDP checksum pseudo header;
  69739. + * Otherwise set it to '0'. */
  69740. + t_FmPcdManipHdrInsrt insrt; /**< size and data to be inserted. */
  69741. +} t_FmPcdManipHdrInsrtIpParams;
  69742. +#endif /* (DPAA_VERSION >= 11) */
  69743. +
  69744. +/**************************************************************************//**
  69745. + @Description Parameters for defining header insertion manipulation by header type
  69746. +*//***************************************************************************/
  69747. +typedef struct t_FmPcdManipHdrInsrtByHdrParams {
  69748. + e_FmPcdManipHdrInsrtByHdrType type; /**< Selects manipulation type */
  69749. + union {
  69750. +
  69751. + t_FmPcdManipHdrInsrtSpecificL2Params specificL2Params;
  69752. + /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2:
  69753. + Selects which L2 headers to insert */
  69754. +#if (DPAA_VERSION >= 11)
  69755. + t_FmPcdManipHdrInsrtIpParams ipParams; /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_IP */
  69756. + t_FmPcdManipHdrInsrt insrt; /**< Used when type is one of e_FM_PCD_MANIP_INSRT_BY_HDR_UDP,
  69757. + e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, or
  69758. + e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP */
  69759. +#endif /* (DPAA_VERSION >= 11) */
  69760. + } u;
  69761. +} t_FmPcdManipHdrInsrtByHdrParams;
  69762. +
  69763. +/**************************************************************************//**
  69764. + @Description Parameters for defining header insertion manipulation
  69765. +*//***************************************************************************/
  69766. +typedef struct t_FmPcdManipHdrInsrtParams {
  69767. + e_FmPcdManipHdrInsrtType type; /**< Type of insertion manipulation */
  69768. + union {
  69769. + t_FmPcdManipHdrInsrtByHdrParams byHdr; /**< Parameters for defining header insertion manipulation by header type,
  69770. + relevant if 'type' = e_FM_PCD_MANIP_INSRT_BY_HDR */
  69771. + t_FmPcdManipHdrInsrtGenericParams generic; /**< Parameters for defining generic header insertion manipulation,
  69772. + relevant if 'type' = e_FM_PCD_MANIP_INSRT_GENERIC */
  69773. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  69774. + t_FmPcdManipHdrInsrtByTemplateParams byTemplate; /**< Parameters for defining header insertion manipulation by template,
  69775. + relevant if 'type' = e_FM_PCD_MANIP_INSRT_BY_TEMPLATE */
  69776. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  69777. + } u;
  69778. +} t_FmPcdManipHdrInsrtParams;
  69779. +
  69780. +/**************************************************************************//**
  69781. + @Description Parameters for defining header removal manipulation
  69782. +*//***************************************************************************/
  69783. +typedef struct t_FmPcdManipHdrRmvParams {
  69784. + e_FmPcdManipHdrRmvType type; /**< Type of header removal manipulation */
  69785. + union {
  69786. + t_FmPcdManipHdrRmvByHdrParams byHdr; /**< Parameters for defining header removal manipulation by header type,
  69787. + relevant if type = e_FM_PCD_MANIP_RMV_BY_HDR */
  69788. + t_FmPcdManipHdrRmvGenericParams generic; /**< Parameters for defining generic header removal manipulation,
  69789. + relevant if type = e_FM_PCD_MANIP_RMV_GENERIC */
  69790. + } u;
  69791. +} t_FmPcdManipHdrRmvParams;
  69792. +
  69793. +/**************************************************************************//**
  69794. + @Description Parameters for defining header manipulation node
  69795. +*//***************************************************************************/
  69796. +typedef struct t_FmPcdManipHdrParams {
  69797. + bool rmv; /**< TRUE, to define removal manipulation */
  69798. + t_FmPcdManipHdrRmvParams rmvParams; /**< Parameters for removal manipulation, relevant if 'rmv' = TRUE */
  69799. +
  69800. + bool insrt; /**< TRUE, to define insertion manipulation */
  69801. + t_FmPcdManipHdrInsrtParams insrtParams; /**< Parameters for insertion manipulation, relevant if 'insrt' = TRUE */
  69802. +
  69803. + bool fieldUpdate; /**< TRUE, to define field update manipulation */
  69804. + t_FmPcdManipHdrFieldUpdateParams fieldUpdateParams; /**< Parameters for field update manipulation, relevant if 'fieldUpdate' = TRUE */
  69805. +
  69806. + bool custom; /**< TRUE, to define custom manipulation */
  69807. + t_FmPcdManipHdrCustomParams customParams; /**< Parameters for custom manipulation, relevant if 'custom' = TRUE */
  69808. +
  69809. + bool dontParseAfterManip;/**< TRUE to de-activate the parser after the manipulation defined in this node.
  69810. + Restrictions:
  69811. + 1. MUST be set if the next engine after the CC is not another CC node
  69812. + (but rather Policer or Keygen), and this is the last (no h_NextManip) in a chain
  69813. + of manipulation nodes. This includes single nodes (i.e. no h_NextManip and
  69814. + also never pointed as h_NextManip of other manipulation nodes)
  69815. + 2. MUST be set if the next engine after the CC is another CC node, and
  69816. + this is NOT the last manipulation node (i.e. it has h_NextManip).*/
  69817. +} t_FmPcdManipHdrParams;
  69818. +
  69819. +/**************************************************************************//**
  69820. + @Description Parameters for defining fragmentation manipulation
  69821. +*//***************************************************************************/
  69822. +typedef struct t_FmPcdManipFragParams {
  69823. + e_NetHeaderType hdr; /**< Header selection */
  69824. + union {
  69825. +#if (DPAA_VERSION >= 11)
  69826. + t_FmPcdManipFragCapwapParams capwapFrag; /**< Parameters for defining CAPWAP fragmentation,
  69827. + relevant if 'hdr' = HEADER_TYPE_CAPWAP */
  69828. +#endif /* (DPAA_VERSION >= 11) */
  69829. + t_FmPcdManipFragIpParams ipFrag; /**< Parameters for defining IP fragmentation,
  69830. + relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
  69831. + } u;
  69832. +} t_FmPcdManipFragParams;
  69833. +
  69834. +/**************************************************************************//**
  69835. + @Description Parameters for defining reassembly manipulation
  69836. +*//***************************************************************************/
  69837. +typedef struct t_FmPcdManipReassemParams {
  69838. + e_NetHeaderType hdr; /**< Header selection */
  69839. + union {
  69840. +#if (DPAA_VERSION >= 11)
  69841. + t_FmPcdManipReassemCapwapParams capwapReassem; /**< Parameters for defining CAPWAP reassembly,
  69842. + relevant if 'hdr' = HEADER_TYPE_CAPWAP */
  69843. +#endif /* (DPAA_VERSION >= 11) */
  69844. +
  69845. + t_FmPcdManipReassemIpParams ipReassem; /**< Parameters for defining IP reassembly,
  69846. + relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
  69847. + } u;
  69848. +} t_FmPcdManipReassemParams;
  69849. +
  69850. +/**************************************************************************//**
  69851. + @Description Parameters for defining a manipulation node
  69852. +*//***************************************************************************/
  69853. +typedef struct t_FmPcdManipParams {
  69854. + e_FmPcdManipType type; /**< Selects type of manipulation node */
  69855. + union{
  69856. + t_FmPcdManipHdrParams hdr; /**< Parameters for defining header manipulation node */
  69857. + t_FmPcdManipReassemParams reassem; /**< Parameters for defining reassembly manipulation node */
  69858. + t_FmPcdManipFragParams frag; /**< Parameters for defining fragmentation manipulation node */
  69859. + t_FmPcdManipSpecialOffloadParams specialOffload; /**< Parameters for defining special offload manipulation node */
  69860. + } u;
  69861. +
  69862. + t_Handle h_NextManip; /**< Supported for Header Manipulation only;
  69863. + Handle to another (previously defined) manipulation node;
  69864. + Allows concatenation of manipulation actions;
  69865. + This parameter is optional and may be NULL. */
  69866. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  69867. + bool fragOrReasm; /**< TRUE, if defined fragmentation/reassembly manipulation */
  69868. + t_FmPcdManipFragOrReasmParams fragOrReasmParams; /**< Parameters for fragmentation/reassembly manipulation,
  69869. + relevant if fragOrReasm = TRUE */
  69870. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  69871. +} t_FmPcdManipParams;
  69872. +
  69873. +/**************************************************************************//**
  69874. + @Description Structure for retrieving IP reassembly statistics
  69875. +*//***************************************************************************/
  69876. +typedef struct t_FmPcdManipReassemIpStats {
  69877. + /* common counters for both IPv4 and IPv6 */
  69878. + uint32_t timeout; /**< Counts the number of timeout occurrences */
  69879. + uint32_t rfdPoolBusy; /**< Counts the number of failed attempts to allocate
  69880. + a Reassembly Frame Descriptor */
  69881. + uint32_t internalBufferBusy; /**< Counts the number of times an internal buffer busy occurred */
  69882. + uint32_t externalBufferBusy; /**< Counts the number of times external buffer busy occurred */
  69883. + uint32_t sgFragments; /**< Counts the number of Scatter/Gather fragments */
  69884. + uint32_t dmaSemaphoreDepletion; /**< Counts the number of failed attempts to allocate a DMA semaphore */
  69885. +#if (DPAA_VERSION >= 11)
  69886. + uint32_t nonConsistentSp; /**< Counts the number of Non Consistent Storage Profile events for
  69887. + successfully reassembled frames */
  69888. +#endif /* (DPAA_VERSION >= 11) */
  69889. + struct {
  69890. + uint32_t successfullyReassembled; /**< Counts the number of successfully reassembled frames */
  69891. + uint32_t validFragments; /**< Counts the total number of valid fragments that
  69892. + have been processed for all frames */
  69893. + uint32_t processedFragments; /**< Counts the number of processed fragments
  69894. + (valid and error fragments) for all frames */
  69895. + uint32_t malformedFragments; /**< Counts the number of malformed fragments processed for all frames */
  69896. + uint32_t discardedFragments; /**< Counts the number of fragments discarded by the reassembly process */
  69897. + uint32_t autoLearnBusy; /**< Counts the number of times a busy condition occurs when attempting
  69898. + to access an IP-Reassembly Automatic Learning Hash set */
  69899. + uint32_t moreThan16Fragments; /**< Counts the fragment occurrences in which the number of fragments-per-frame
  69900. + exceeds 16 */
  69901. + } specificHdrStatistics[2]; /**< slot '0' is for IPv4, slot '1' is for IPv6 */
  69902. +} t_FmPcdManipReassemIpStats;
  69903. +
  69904. +/**************************************************************************//**
  69905. + @Description Structure for retrieving IP fragmentation statistics
  69906. +*//***************************************************************************/
  69907. +typedef struct t_FmPcdManipFragIpStats {
  69908. + uint32_t totalFrames; /**< Number of frames that passed through the manipulation node */
  69909. + uint32_t fragmentedFrames; /**< Number of frames that were fragmented */
  69910. + uint32_t generatedFragments; /**< Number of fragments that were generated */
  69911. +} t_FmPcdManipFragIpStats;
  69912. +
  69913. +#if (DPAA_VERSION >= 11)
  69914. +/**************************************************************************//**
  69915. + @Description Structure for retrieving CAPWAP reassembly statistics
  69916. +*//***************************************************************************/
  69917. +typedef struct t_FmPcdManipReassemCapwapStats {
  69918. + uint32_t timeout; /**< Counts the number of timeout occurrences */
  69919. + uint32_t rfdPoolBusy; /**< Counts the number of failed attempts to allocate
  69920. + a Reassembly Frame Descriptor */
  69921. + uint32_t internalBufferBusy; /**< Counts the number of times an internal buffer busy occurred */
  69922. + uint32_t externalBufferBusy; /**< Counts the number of times external buffer busy occurred */
  69923. + uint32_t sgFragments; /**< Counts the number of Scatter/Gather fragments */
  69924. + uint32_t dmaSemaphoreDepletion; /**< Counts the number of failed attempts to allocate a DMA semaphore */
  69925. + uint32_t successfullyReassembled; /**< Counts the number of successfully reassembled frames */
  69926. + uint32_t validFragments; /**< Counts the total number of valid fragments that
  69927. + have been processed for all frames */
  69928. + uint32_t processedFragments; /**< Counts the number of processed fragments
  69929. + (valid and error fragments) for all frames */
  69930. + uint32_t malformedFragments; /**< Counts the number of malformed fragments processed for all frames */
  69931. + uint32_t autoLearnBusy; /**< Counts the number of times a busy condition occurs when attempting
  69932. + to access an Reassembly Automatic Learning Hash set */
  69933. + uint32_t discardedFragments; /**< Counts the number of fragments discarded by the reassembly process */
  69934. + uint32_t moreThan16Fragments; /**< Counts the fragment occurrences in which the number of fragments-per-frame
  69935. + exceeds 16 */
  69936. + uint32_t exceedMaxReassemblyFrameLen;/**< ounts the number of times that a successful reassembled frame
  69937. + length exceeds MaxReassembledFrameLength value */
  69938. +} t_FmPcdManipReassemCapwapStats;
  69939. +
  69940. +/**************************************************************************//**
  69941. + @Description Structure for retrieving CAPWAP fragmentation statistics
  69942. +*//***************************************************************************/
  69943. +typedef struct t_FmPcdManipFragCapwapStats {
  69944. + uint32_t totalFrames; /**< Number of frames that passed through the manipulation node */
  69945. + uint32_t fragmentedFrames; /**< Number of frames that were fragmented */
  69946. + uint32_t generatedFragments; /**< Number of fragments that were generated */
  69947. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  69948. + uint8_t sgAllocationFailure; /**< Number of allocation failure of s/g buffers */
  69949. +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
  69950. +} t_FmPcdManipFragCapwapStats;
  69951. +#endif /* (DPAA_VERSION >= 11) */
  69952. +
  69953. +/**************************************************************************//**
  69954. + @Description Structure for retrieving reassembly statistics
  69955. +*//***************************************************************************/
  69956. +typedef struct t_FmPcdManipReassemStats {
  69957. + union {
  69958. + t_FmPcdManipReassemIpStats ipReassem; /**< Structure for IP reassembly statistics */
  69959. +#if (DPAA_VERSION >= 11)
  69960. + t_FmPcdManipReassemCapwapStats capwapReassem; /**< Structure for CAPWAP reassembly statistics */
  69961. +#endif /* (DPAA_VERSION >= 11) */
  69962. + } u;
  69963. +} t_FmPcdManipReassemStats;
  69964. +
  69965. +/**************************************************************************//**
  69966. + @Description Structure for retrieving fragmentation statistics
  69967. +*//***************************************************************************/
  69968. +typedef struct t_FmPcdManipFragStats {
  69969. + union {
  69970. + t_FmPcdManipFragIpStats ipFrag; /**< Structure for IP fragmentation statistics */
  69971. +#if (DPAA_VERSION >= 11)
  69972. + t_FmPcdManipFragCapwapStats capwapFrag; /**< Structure for CAPWAP fragmentation statistics */
  69973. +#endif /* (DPAA_VERSION >= 11) */
  69974. + } u;
  69975. +} t_FmPcdManipFragStats;
  69976. +
  69977. +/**************************************************************************//**
  69978. + @Description Structure for selecting manipulation statistics
  69979. +*//***************************************************************************/
  69980. +typedef struct t_FmPcdManipStats {
  69981. + union {
  69982. + t_FmPcdManipReassemStats reassem; /**< Structure for reassembly statistics */
  69983. + t_FmPcdManipFragStats frag; /**< Structure for fragmentation statistics */
  69984. + } u;
  69985. +} t_FmPcdManipStats;
  69986. +
  69987. +#if (DPAA_VERSION >= 11)
  69988. +/**************************************************************************//**
  69989. + @Description Parameters for defining frame replicator group and its members
  69990. +*//***************************************************************************/
  69991. +typedef struct t_FmPcdFrmReplicGroupParams {
  69992. + uint8_t maxNumOfEntries; /**< Maximal number of members in the group;
  69993. + Must be at least 2. */
  69994. + uint8_t numOfEntries; /**< Number of members in the group;
  69995. + Must be at least 1. */
  69996. + t_FmPcdCcNextEngineParams nextEngineParams[FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES];
  69997. + /**< Array of members' parameters */
  69998. +} t_FmPcdFrmReplicGroupParams;
  69999. +#endif /* (DPAA_VERSION >= 11) */
  70000. +
  70001. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  70002. +/**************************************************************************//**
  70003. + @Description structure for defining statistics node
  70004. +*//***************************************************************************/
  70005. +typedef struct t_FmPcdStatsParams {
  70006. + e_FmPcdStatsType type; /**< type of statistics node */
  70007. +} t_FmPcdStatsParams;
  70008. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  70009. +
  70010. +/**************************************************************************//**
  70011. + @Function FM_PCD_NetEnvCharacteristicsSet
  70012. +
  70013. + @Description Define a set of Network Environment Characteristics.
  70014. +
  70015. + When setting an environment it is important to understand its
  70016. + application. It is not meant to describe the flows that will run
  70017. + on the ports using this environment, but what the user means TO DO
  70018. + with the PCD mechanisms in order to parse-classify-distribute those
  70019. + frames.
  70020. + By specifying a distinction unit, the user means it would use that option
  70021. + for distinction between frames at either a KeyGen scheme or a coarse
  70022. + classification action descriptor. Using interchangeable headers to define a
  70023. + unit means that the user is indifferent to which of the interchangeable
  70024. + headers is present in the frame, and wants the distinction to be based
  70025. + on the presence of either one of them.
  70026. +
  70027. + Depending on context, there are limitations to the use of environments. A
  70028. + port using the PCD functionality is bound to an environment. Some or even
  70029. + all ports may share an environment but also an environment per port is
  70030. + possible. When initializing a scheme, a classification plan group (see below),
  70031. + or a coarse classification tree, one of the initialized environments must be
  70032. + stated and related to. When a port is bound to a scheme, a classification
  70033. + plan group, or a coarse classification tree, it MUST be bound to the same
  70034. + environment.
  70035. +
  70036. + The different PCD modules, may relate (for flows definition) ONLY on
  70037. + distinction units as defined by their environment. When initializing a
  70038. + scheme for example, it may not choose to select IPV4 as a match for
  70039. + recognizing flows unless it was defined in the relating environment. In
  70040. + fact, to guide the user through the configuration of the PCD, each module's
  70041. + characterization in terms of flows is not done using protocol names, but using
  70042. + environment indexes.
  70043. +
  70044. + In terms of HW implementation, the list of distinction units sets the LCV vectors
  70045. + and later used for match vector, classification plan vectors and coarse classification
  70046. + indexing.
  70047. +
  70048. + @Param[in] h_FmPcd FM PCD module descriptor.
  70049. + @Param[in] p_NetEnvParams A structure of parameters for the initialization of
  70050. + the network environment.
  70051. +
  70052. + @Return A handle to the initialized object on success; NULL code otherwise.
  70053. +
  70054. + @Cautions Allowed only following FM_PCD_Init().
  70055. +*//***************************************************************************/
  70056. +t_Handle FM_PCD_NetEnvCharacteristicsSet(t_Handle h_FmPcd, t_FmPcdNetEnvParams *p_NetEnvParams);
  70057. +
  70058. +/**************************************************************************//**
  70059. + @Function FM_PCD_NetEnvCharacteristicsDelete
  70060. +
  70061. + @Description Deletes a set of Network Environment Characteristics.
  70062. +
  70063. + @Param[in] h_NetEnv A handle to the Network environment.
  70064. +
  70065. + @Return E_OK on success; Error code otherwise.
  70066. +*//***************************************************************************/
  70067. +t_Error FM_PCD_NetEnvCharacteristicsDelete(t_Handle h_NetEnv);
  70068. +
  70069. +/**************************************************************************//**
  70070. + @Function FM_PCD_KgSchemeSet
  70071. +
  70072. + @Description Initializing or modifying and enabling a scheme for the KeyGen.
  70073. + This routine should be called for adding or modifying a scheme.
  70074. + When a scheme needs modifying, the API requires that it will be
  70075. + rewritten. In such a case 'modify' should be TRUE. If the
  70076. + routine is called for a valid scheme and 'modify' is FALSE,
  70077. + it will return error.
  70078. +
  70079. + @Param[in] h_FmPcd If this is a new scheme - A handle to an FM PCD Module.
  70080. + Otherwise NULL (ignored by driver).
  70081. + @Param[in,out] p_SchemeParams A structure of parameters for defining the scheme
  70082. +
  70083. + @Return A handle to the initialized scheme on success; NULL code otherwise.
  70084. + When used as "modify" (rather than for setting a new scheme),
  70085. + p_SchemeParams->id.h_Scheme will return NULL if action fails due to scheme
  70086. + BUSY state.
  70087. +
  70088. + @Cautions Allowed only following FM_PCD_Init().
  70089. +*//***************************************************************************/
  70090. +t_Handle FM_PCD_KgSchemeSet(t_Handle h_FmPcd,
  70091. + t_FmPcdKgSchemeParams *p_SchemeParams);
  70092. +
  70093. +/**************************************************************************//**
  70094. + @Function FM_PCD_KgSchemeDelete
  70095. +
  70096. + @Description Deleting an initialized scheme.
  70097. +
  70098. + @Param[in] h_Scheme scheme handle as returned by FM_PCD_KgSchemeSet()
  70099. +
  70100. + @Return E_OK on success; Error code otherwise.
  70101. +
  70102. + @Cautions Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
  70103. +*//***************************************************************************/
  70104. +t_Error FM_PCD_KgSchemeDelete(t_Handle h_Scheme);
  70105. +
  70106. +/**************************************************************************//**
  70107. + @Function FM_PCD_KgSchemeGetCounter
  70108. +
  70109. + @Description Reads scheme packet counter.
  70110. +
  70111. + @Param[in] h_Scheme scheme handle as returned by FM_PCD_KgSchemeSet().
  70112. +
  70113. + @Return Counter's current value.
  70114. +
  70115. + @Cautions Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
  70116. +*//***************************************************************************/
  70117. +uint32_t FM_PCD_KgSchemeGetCounter(t_Handle h_Scheme);
  70118. +
  70119. +/**************************************************************************//**
  70120. + @Function FM_PCD_KgSchemeSetCounter
  70121. +
  70122. + @Description Writes scheme packet counter.
  70123. +
  70124. + @Param[in] h_Scheme scheme handle as returned by FM_PCD_KgSchemeSet().
  70125. + @Param[in] value New scheme counter value - typically '0' for
  70126. + resetting the counter.
  70127. +
  70128. + @Return E_OK on success; Error code otherwise.
  70129. +
  70130. + @Cautions Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
  70131. +*//***************************************************************************/
  70132. +t_Error FM_PCD_KgSchemeSetCounter(t_Handle h_Scheme, uint32_t value);
  70133. +
  70134. +/**************************************************************************//**
  70135. + @Function FM_PCD_PlcrProfileSet
  70136. +
  70137. + @Description Sets a profile entry in the policer profile table.
  70138. + The routine overrides any existing value.
  70139. +
  70140. + @Param[in] h_FmPcd A handle to an FM PCD Module.
  70141. + @Param[in] p_Profile A structure of parameters for defining a
  70142. + policer profile entry.
  70143. +
  70144. + @Return A handle to the initialized object on success; NULL code otherwise.
  70145. + When used as "modify" (rather than for setting a new profile),
  70146. + p_Profile->id.h_Profile will return NULL if action fails due to profile
  70147. + BUSY state.
  70148. + @Cautions Allowed only following FM_PCD_Init().
  70149. +*//***************************************************************************/
  70150. +t_Handle FM_PCD_PlcrProfileSet(t_Handle h_FmPcd,
  70151. + t_FmPcdPlcrProfileParams *p_Profile);
  70152. +
  70153. +/**************************************************************************//**
  70154. + @Function FM_PCD_PlcrProfileDelete
  70155. +
  70156. + @Description Delete a profile entry in the policer profile table.
  70157. + The routine set entry to invalid.
  70158. +
  70159. + @Param[in] h_Profile A handle to the profile.
  70160. +
  70161. + @Return E_OK on success; Error code otherwise.
  70162. +
  70163. + @Cautions Allowed only following FM_PCD_Init().
  70164. +*//***************************************************************************/
  70165. +t_Error FM_PCD_PlcrProfileDelete(t_Handle h_Profile);
  70166. +
  70167. +/**************************************************************************//**
  70168. + @Function FM_PCD_PlcrProfileGetCounter
  70169. +
  70170. + @Description Sets an entry in the classification plan.
  70171. + The routine overrides any existing value.
  70172. +
  70173. + @Param[in] h_Profile A handle to the profile.
  70174. + @Param[in] counter Counter selector.
  70175. +
  70176. + @Return specific counter value.
  70177. +
  70178. + @Cautions Allowed only following FM_PCD_Init().
  70179. +*//***************************************************************************/
  70180. +uint32_t FM_PCD_PlcrProfileGetCounter(t_Handle h_Profile,
  70181. + e_FmPcdPlcrProfileCounters counter);
  70182. +
  70183. +/**************************************************************************//**
  70184. + @Function FM_PCD_PlcrProfileSetCounter
  70185. +
  70186. + @Description Sets an entry in the classification plan.
  70187. + The routine overrides any existing value.
  70188. +
  70189. + @Param[in] h_Profile A handle to the profile.
  70190. + @Param[in] counter Counter selector.
  70191. + @Param[in] value value to set counter with.
  70192. +
  70193. + @Return E_OK on success; Error code otherwise.
  70194. +
  70195. + @Cautions Allowed only following FM_PCD_Init().
  70196. +*//***************************************************************************/
  70197. +t_Error FM_PCD_PlcrProfileSetCounter(t_Handle h_Profile,
  70198. + e_FmPcdPlcrProfileCounters counter,
  70199. + uint32_t value);
  70200. +
  70201. +/**************************************************************************//**
  70202. + @Function FM_PCD_CcRootBuild
  70203. +
  70204. + @Description This routine must be called to define a complete coarse
  70205. + classification tree. This is the way to define coarse
  70206. + classification to a certain flow - the KeyGen schemes
  70207. + may point only to trees defined in this way.
  70208. +
  70209. + @Param[in] h_FmPcd FM PCD module descriptor.
  70210. + @Param[in] p_Params A structure of parameters to define the tree.
  70211. +
  70212. + @Return A handle to the initialized object on success; NULL code otherwise.
  70213. +
  70214. + @Cautions Allowed only following FM_PCD_Init().
  70215. +*//***************************************************************************/
  70216. +t_Handle FM_PCD_CcRootBuild (t_Handle h_FmPcd,
  70217. + t_FmPcdCcTreeParams *p_Params);
  70218. +
  70219. +/**************************************************************************//**
  70220. + @Function FM_PCD_CcRootDelete
  70221. +
  70222. + @Description Deleting an built tree.
  70223. +
  70224. + @Param[in] h_CcTree A handle to a CC tree.
  70225. +
  70226. + @Return E_OK on success; Error code otherwise.
  70227. +
  70228. + @Cautions Allowed only following FM_PCD_Init().
  70229. +*//***************************************************************************/
  70230. +t_Error FM_PCD_CcRootDelete(t_Handle h_CcTree);
  70231. +
  70232. +/**************************************************************************//**
  70233. + @Function FM_PCD_CcRootModifyNextEngine
  70234. +
  70235. + @Description Modify the Next Engine Parameters in the entry of the tree.
  70236. +
  70237. + @Param[in] h_CcTree A handle to the tree
  70238. + @Param[in] grpId A Group index in the tree
  70239. + @Param[in] index Entry index in the group defined by grpId
  70240. + @Param[in] p_FmPcdCcNextEngineParams Pointer to new next engine parameters
  70241. +
  70242. + @Return E_OK on success; Error code otherwise.
  70243. +
  70244. + @Cautions Allowed only following FM_PCD_CcBuildTree().
  70245. +*//***************************************************************************/
  70246. +t_Error FM_PCD_CcRootModifyNextEngine(t_Handle h_CcTree,
  70247. + uint8_t grpId,
  70248. + uint8_t index,
  70249. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70250. +
  70251. +/**************************************************************************//**
  70252. + @Function FM_PCD_MatchTableSet
  70253. +
  70254. + @Description This routine should be called for each CC (coarse classification)
  70255. + node. The whole CC tree should be built bottom up so that each
  70256. + node points to already defined nodes.
  70257. +
  70258. + @Param[in] h_FmPcd FM PCD module descriptor.
  70259. + @Param[in] p_Param A structure of parameters defining the CC node
  70260. +
  70261. + @Return A handle to the initialized object on success; NULL code otherwise.
  70262. +
  70263. + @Cautions Allowed only following FM_PCD_Init().
  70264. +*//***************************************************************************/
  70265. +t_Handle FM_PCD_MatchTableSet(t_Handle h_FmPcd, t_FmPcdCcNodeParams *p_Param);
  70266. +
  70267. +/**************************************************************************//**
  70268. + @Function FM_PCD_MatchTableDelete
  70269. +
  70270. + @Description Deleting an built node.
  70271. +
  70272. + @Param[in] h_CcNode A handle to a CC node.
  70273. +
  70274. + @Return E_OK on success; Error code otherwise.
  70275. +
  70276. + @Cautions Allowed only following FM_PCD_Init().
  70277. +*//***************************************************************************/
  70278. +t_Error FM_PCD_MatchTableDelete(t_Handle h_CcNode);
  70279. +
  70280. +/**************************************************************************//**
  70281. + @Function FM_PCD_MatchTableModifyMissNextEngine
  70282. +
  70283. + @Description Modify the Next Engine Parameters of the Miss key case of the node.
  70284. +
  70285. + @Param[in] h_CcNode A handle to the node
  70286. + @Param[in] p_FmPcdCcNextEngineParams Parameters for defining next engine
  70287. +
  70288. + @Return E_OK on success; Error code otherwise.
  70289. +
  70290. + @Cautions Allowed only following FM_PCD_MatchTableSet();
  70291. + Not relevant in the case the node is of type 'INDEXED_LOOKUP'.
  70292. + When configuring nextEngine = e_FM_PCD_CC, note that
  70293. + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
  70294. + from the currently changed table.
  70295. +
  70296. +*//***************************************************************************/
  70297. +t_Error FM_PCD_MatchTableModifyMissNextEngine(t_Handle h_CcNode,
  70298. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70299. +
  70300. +/**************************************************************************//**
  70301. + @Function FM_PCD_MatchTableRemoveKey
  70302. +
  70303. + @Description Remove the key (including next engine parameters of this key)
  70304. + defined by the index of the relevant node.
  70305. +
  70306. + @Param[in] h_CcNode A handle to the node
  70307. + @Param[in] keyIndex Key index for removing
  70308. +
  70309. + @Return E_OK on success; Error code otherwise.
  70310. +
  70311. + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this
  70312. + node and the nodes that lead to it.
  70313. +*//***************************************************************************/
  70314. +t_Error FM_PCD_MatchTableRemoveKey(t_Handle h_CcNode, uint16_t keyIndex);
  70315. +
  70316. +/**************************************************************************//**
  70317. + @Function FM_PCD_MatchTableAddKey
  70318. +
  70319. + @Description Add the key (including next engine parameters of this key in the
  70320. + index defined by the keyIndex. Note that 'FM_PCD_LAST_KEY_INDEX'
  70321. + may be used by user that don't care about the position of the
  70322. + key in the table - in that case, the key will be automatically
  70323. + added by the driver in the last available entry.
  70324. +
  70325. + @Param[in] h_CcNode A handle to the node
  70326. + @Param[in] keyIndex Key index for adding.
  70327. + @Param[in] keySize Key size of added key
  70328. + @Param[in] p_KeyParams A pointer to the parameters includes
  70329. + new key with Next Engine Parameters
  70330. +
  70331. + @Return E_OK on success; Error code otherwise.
  70332. +
  70333. + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this
  70334. + node and the nodes that lead to it.
  70335. +*//***************************************************************************/
  70336. +t_Error FM_PCD_MatchTableAddKey(t_Handle h_CcNode,
  70337. + uint16_t keyIndex,
  70338. + uint8_t keySize,
  70339. + t_FmPcdCcKeyParams *p_KeyParams);
  70340. +
  70341. +/**************************************************************************//**
  70342. + @Function FM_PCD_MatchTableModifyNextEngine
  70343. +
  70344. + @Description Modify the Next Engine Parameters in the relevant key entry of the node.
  70345. +
  70346. + @Param[in] h_CcNode A handle to the node
  70347. + @Param[in] keyIndex Key index for Next Engine modifications
  70348. + @Param[in] p_FmPcdCcNextEngineParams Parameters for defining next engine
  70349. +
  70350. + @Return E_OK on success; Error code otherwise.
  70351. +
  70352. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  70353. + When configuring nextEngine = e_FM_PCD_CC, note that
  70354. + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
  70355. + from the currently changed table.
  70356. +
  70357. +*//***************************************************************************/
  70358. +t_Error FM_PCD_MatchTableModifyNextEngine(t_Handle h_CcNode,
  70359. + uint16_t keyIndex,
  70360. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70361. +
  70362. +/**************************************************************************//**
  70363. + @Function FM_PCD_MatchTableModifyKeyAndNextEngine
  70364. +
  70365. + @Description Modify the key and Next Engine Parameters of this key in the
  70366. + index defined by the keyIndex.
  70367. +
  70368. + @Param[in] h_CcNode A handle to the node
  70369. + @Param[in] keyIndex Key index for adding
  70370. + @Param[in] keySize Key size of added key
  70371. + @Param[in] p_KeyParams A pointer to the parameters includes
  70372. + modified key and modified Next Engine Parameters
  70373. +
  70374. + @Return E_OK on success; Error code otherwise.
  70375. +
  70376. + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this
  70377. + node and the nodes that lead to it.
  70378. + When configuring nextEngine = e_FM_PCD_CC, note that
  70379. + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
  70380. + from the currently changed table.
  70381. +*//***************************************************************************/
  70382. +t_Error FM_PCD_MatchTableModifyKeyAndNextEngine(t_Handle h_CcNode,
  70383. + uint16_t keyIndex,
  70384. + uint8_t keySize,
  70385. + t_FmPcdCcKeyParams *p_KeyParams);
  70386. +
  70387. +/**************************************************************************//**
  70388. + @Function FM_PCD_MatchTableModifyKey
  70389. +
  70390. + @Description Modify the key in the index defined by the keyIndex.
  70391. +
  70392. + @Param[in] h_CcNode A handle to the node
  70393. + @Param[in] keyIndex Key index for adding
  70394. + @Param[in] keySize Key size of added key
  70395. + @Param[in] p_Key A pointer to the new key
  70396. + @Param[in] p_Mask A pointer to the new mask if relevant,
  70397. + otherwise pointer to NULL
  70398. +
  70399. + @Return E_OK on success; Error code otherwise.
  70400. +
  70401. + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this
  70402. + node and the nodes that lead to it.
  70403. +*//***************************************************************************/
  70404. +t_Error FM_PCD_MatchTableModifyKey(t_Handle h_CcNode,
  70405. + uint16_t keyIndex,
  70406. + uint8_t keySize,
  70407. + uint8_t *p_Key,
  70408. + uint8_t *p_Mask);
  70409. +
  70410. +/**************************************************************************//**
  70411. + @Function FM_PCD_MatchTableFindNRemoveKey
  70412. +
  70413. + @Description Remove the key (including next engine parameters of this key)
  70414. + defined by the key and mask. Note that this routine will search
  70415. + the node to locate the index of the required key (& mask) to remove.
  70416. +
  70417. + @Param[in] h_CcNode A handle to the node
  70418. + @Param[in] keySize Key size of the one to remove.
  70419. + @Param[in] p_Key A pointer to the requested key to remove.
  70420. + @Param[in] p_Mask A pointer to the mask if relevant,
  70421. + otherwise pointer to NULL
  70422. +
  70423. + @Return E_OK on success; Error code otherwise.
  70424. +
  70425. + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this
  70426. + node and the nodes that lead to it.
  70427. +*//***************************************************************************/
  70428. +t_Error FM_PCD_MatchTableFindNRemoveKey(t_Handle h_CcNode,
  70429. + uint8_t keySize,
  70430. + uint8_t *p_Key,
  70431. + uint8_t *p_Mask);
  70432. +
  70433. +/**************************************************************************//**
  70434. + @Function FM_PCD_MatchTableFindNModifyNextEngine
  70435. +
  70436. + @Description Modify the Next Engine Parameters in the relevant key entry of
  70437. + the node. Note that this routine will search the node to locate
  70438. + the index of the required key (& mask) to modify.
  70439. +
  70440. + @Param[in] h_CcNode A handle to the node
  70441. + @Param[in] keySize Key size of the one to modify.
  70442. + @Param[in] p_Key A pointer to the requested key to modify.
  70443. + @Param[in] p_Mask A pointer to the mask if relevant,
  70444. + otherwise pointer to NULL
  70445. + @Param[in] p_FmPcdCcNextEngineParams Parameters for defining next engine
  70446. +
  70447. + @Return E_OK on success; Error code otherwise.
  70448. +
  70449. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  70450. + When configuring nextEngine = e_FM_PCD_CC, note that
  70451. + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
  70452. + from the currently changed table.
  70453. +*//***************************************************************************/
  70454. +t_Error FM_PCD_MatchTableFindNModifyNextEngine(t_Handle h_CcNode,
  70455. + uint8_t keySize,
  70456. + uint8_t *p_Key,
  70457. + uint8_t *p_Mask,
  70458. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70459. +
  70460. +/**************************************************************************//**
  70461. + @Function FM_PCD_MatchTableFindNModifyKeyAndNextEngine
  70462. +
  70463. + @Description Modify the key and Next Engine Parameters of this key in the
  70464. + index defined by the keyIndex. Note that this routine will search
  70465. + the node to locate the index of the required key (& mask) to modify.
  70466. +
  70467. + @Param[in] h_CcNode A handle to the node
  70468. + @Param[in] keySize Key size of the one to modify.
  70469. + @Param[in] p_Key A pointer to the requested key to modify.
  70470. + @Param[in] p_Mask A pointer to the mask if relevant,
  70471. + otherwise pointer to NULL
  70472. + @Param[in] p_KeyParams A pointer to the parameters includes
  70473. + modified key and modified Next Engine Parameters
  70474. +
  70475. + @Return E_OK on success; Error code otherwise.
  70476. +
  70477. + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this
  70478. + node and the nodes that lead to it.
  70479. + When configuring nextEngine = e_FM_PCD_CC, note that
  70480. + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
  70481. + from the currently changed table.
  70482. +*//***************************************************************************/
  70483. +t_Error FM_PCD_MatchTableFindNModifyKeyAndNextEngine(t_Handle h_CcNode,
  70484. + uint8_t keySize,
  70485. + uint8_t *p_Key,
  70486. + uint8_t *p_Mask,
  70487. + t_FmPcdCcKeyParams *p_KeyParams);
  70488. +
  70489. +/**************************************************************************//**
  70490. + @Function FM_PCD_MatchTableFindNModifyKey
  70491. +
  70492. + @Description Modify the key in the index defined by the keyIndex. Note that
  70493. + this routine will search the node to locate the index of the
  70494. + required key (& mask) to modify.
  70495. +
  70496. + @Param[in] h_CcNode A handle to the node
  70497. + @Param[in] keySize Key size of the one to modify.
  70498. + @Param[in] p_Key A pointer to the requested key to modify.
  70499. + @Param[in] p_Mask A pointer to the mask if relevant,
  70500. + otherwise pointer to NULL
  70501. + @Param[in] p_NewKey A pointer to the new key
  70502. + @Param[in] p_NewMask A pointer to the new mask if relevant,
  70503. + otherwise pointer to NULL
  70504. +
  70505. + @Return E_OK on success; Error code otherwise.
  70506. +
  70507. + @Cautions Allowed only following FM_PCD_MatchTableSet() was called for this
  70508. + node and the nodes that lead to it.
  70509. +*//***************************************************************************/
  70510. +t_Error FM_PCD_MatchTableFindNModifyKey(t_Handle h_CcNode,
  70511. + uint8_t keySize,
  70512. + uint8_t *p_Key,
  70513. + uint8_t *p_Mask,
  70514. + uint8_t *p_NewKey,
  70515. + uint8_t *p_NewMask);
  70516. +
  70517. +/**************************************************************************//**
  70518. + @Function FM_PCD_MatchTableGetKeyCounter
  70519. +
  70520. + @Description This routine may be used to get a counter of specific key in a CC
  70521. + Node; This counter reflects how many frames passed that were matched
  70522. + this key.
  70523. +
  70524. + @Param[in] h_CcNode A handle to the node
  70525. + @Param[in] keyIndex Key index for adding
  70526. +
  70527. + @Return The specific key counter.
  70528. +
  70529. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  70530. +*//***************************************************************************/
  70531. +uint32_t FM_PCD_MatchTableGetKeyCounter(t_Handle h_CcNode, uint16_t keyIndex);
  70532. +
  70533. +/**************************************************************************//**
  70534. + @Function FM_PCD_MatchTableGetKeyStatistics
  70535. +
  70536. + @Description This routine may be used to get statistics counters of specific key
  70537. + in a CC Node.
  70538. +
  70539. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  70540. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  70541. + these counters reflect how many frames passed that were matched
  70542. + this key; The total frames count will be returned in the counter
  70543. + of the first range (as only one frame length range was defined).
  70544. + If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
  70545. + frame count will be separated to frame length counters, based on
  70546. + provided frame length ranges.
  70547. +
  70548. + @Param[in] h_CcNode A handle to the node
  70549. + @Param[in] keyIndex Key index for adding
  70550. + @Param[out] p_KeyStatistics Key statistics counters
  70551. +
  70552. + @Return The specific key statistics.
  70553. +
  70554. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  70555. +*//***************************************************************************/
  70556. +t_Error FM_PCD_MatchTableGetKeyStatistics(t_Handle h_CcNode,
  70557. + uint16_t keyIndex,
  70558. + t_FmPcdCcKeyStatistics *p_KeyStatistics);
  70559. +
  70560. +/**************************************************************************//**
  70561. + @Function FM_PCD_MatchTableGetMissStatistics
  70562. +
  70563. + @Description This routine may be used to get statistics counters of miss entry
  70564. + in a CC Node.
  70565. +
  70566. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  70567. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  70568. + these counters reflect how many frames were not matched to any
  70569. + existing key and therefore passed through the miss entry; The
  70570. + total frames count will be returned in the counter of the
  70571. + first range (as only one frame length range was defined).
  70572. +
  70573. + @Param[in] h_CcNode A handle to the node
  70574. + @Param[out] p_MissStatistics Statistics counters for 'miss'
  70575. +
  70576. + @Return The statistics for 'miss'.
  70577. +
  70578. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  70579. +*//***************************************************************************/
  70580. +t_Error FM_PCD_MatchTableGetMissStatistics(t_Handle h_CcNode,
  70581. + t_FmPcdCcKeyStatistics *p_MissStatistics);
  70582. +
  70583. +/**************************************************************************//**
  70584. + @Function FM_PCD_MatchTableFindNGetKeyStatistics
  70585. +
  70586. + @Description This routine may be used to get statistics counters of specific key
  70587. + in a CC Node.
  70588. +
  70589. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  70590. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  70591. + these counters reflect how many frames passed that were matched
  70592. + this key; The total frames count will be returned in the counter
  70593. + of the first range (as only one frame length range was defined).
  70594. + If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
  70595. + frame count will be separated to frame length counters, based on
  70596. + provided frame length ranges.
  70597. + Note that this routine will search the node to locate the index
  70598. + of the required key based on received key parameters.
  70599. +
  70600. + @Param[in] h_CcNode A handle to the node
  70601. + @Param[in] keySize Size of the requested key
  70602. + @Param[in] p_Key A pointer to the requested key
  70603. + @Param[in] p_Mask A pointer to the mask if relevant,
  70604. + otherwise pointer to NULL
  70605. + @Param[out] p_KeyStatistics Key statistics counters
  70606. +
  70607. + @Return The specific key statistics.
  70608. +
  70609. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  70610. +*//***************************************************************************/
  70611. +t_Error FM_PCD_MatchTableFindNGetKeyStatistics(t_Handle h_CcNode,
  70612. + uint8_t keySize,
  70613. + uint8_t *p_Key,
  70614. + uint8_t *p_Mask,
  70615. + t_FmPcdCcKeyStatistics *p_KeyStatistics);
  70616. +
  70617. +/**************************************************************************//*
  70618. + @Function FM_PCD_MatchTableGetNextEngine
  70619. +
  70620. + @Description Gets NextEngine of the relevant keyIndex.
  70621. +
  70622. + @Param[in] h_CcNode A handle to the node.
  70623. + @Param[in] keyIndex keyIndex in the relevant node.
  70624. + @Param[out] p_FmPcdCcNextEngineParams here updated nextEngine parameters for
  70625. + the relevant keyIndex of the CC Node
  70626. + received as parameter to this function
  70627. +
  70628. + @Return E_OK on success; Error code otherwise.
  70629. +
  70630. + @Cautions Allowed only following FM_PCD_Init().
  70631. +*//***************************************************************************/
  70632. +t_Error FM_PCD_MatchTableGetNextEngine(t_Handle h_CcNode,
  70633. + uint16_t keyIndex,
  70634. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70635. +
  70636. +/**************************************************************************//*
  70637. + @Function FM_PCD_MatchTableGetIndexedHashBucket
  70638. +
  70639. + @Description This routine simulates KeyGen operation on the provided key and
  70640. + calculates to which hash bucket it will be mapped.
  70641. +
  70642. + @Param[in] h_CcNode A handle to the node.
  70643. + @Param[in] kgKeySize Key size as it was configured in the KG
  70644. + scheme that leads to this hash.
  70645. + @Param[in] p_KgKey Pointer to the key; must be like the key
  70646. + that the KG is generated, i.e. the same
  70647. + extraction and with mask if exist.
  70648. + @Param[in] kgHashShift Hash-shift as it was configured in the KG
  70649. + scheme that leads to this hash.
  70650. + @Param[out] p_CcNodeBucketHandle Pointer to the bucket of the provided key.
  70651. + @Param[out] p_BucketIndex Index to the bucket of the provided key
  70652. + @Param[out] p_LastIndex Pointer to last index in the bucket of the
  70653. + provided key.
  70654. +
  70655. + @Return E_OK on success; Error code otherwise.
  70656. +
  70657. + @Cautions Allowed only following FM_PCD_HashTableSet()
  70658. +*//***************************************************************************/
  70659. +t_Error FM_PCD_MatchTableGetIndexedHashBucket(t_Handle h_CcNode,
  70660. + uint8_t kgKeySize,
  70661. + uint8_t *p_KgKey,
  70662. + uint8_t kgHashShift,
  70663. + t_Handle *p_CcNodeBucketHandle,
  70664. + uint8_t *p_BucketIndex,
  70665. + uint16_t *p_LastIndex);
  70666. +
  70667. +/**************************************************************************//**
  70668. + @Function FM_PCD_HashTableSet
  70669. +
  70670. + @Description This routine initializes a hash table structure.
  70671. + KeyGen hash result determines the hash bucket.
  70672. + Next, KeyGen key is compared against all keys of this
  70673. + bucket (exact match).
  70674. + Number of sets (number of buckets) of the hash equals to the
  70675. + number of 1-s in 'hashResMask' in the provided parameters.
  70676. + Number of hash table ways is then calculated by dividing
  70677. + 'maxNumOfKeys' equally between the hash sets. This is the maximal
  70678. + number of keys that a hash bucket may hold.
  70679. + The hash table is initialized empty and keys may be
  70680. + added to it following the initialization. Keys masks are not
  70681. + supported in current hash table implementation.
  70682. + The initialized hash table can be integrated as a node in a
  70683. + CC tree.
  70684. +
  70685. + @Param[in] h_FmPcd FM PCD module descriptor.
  70686. + @Param[in] p_Param A structure of parameters defining the hash table
  70687. +
  70688. + @Return A handle to the initialized object on success; NULL code otherwise.
  70689. +
  70690. + @Cautions Allowed only following FM_PCD_Init().
  70691. +*//***************************************************************************/
  70692. +t_Handle FM_PCD_HashTableSet(t_Handle h_FmPcd, t_FmPcdHashTableParams *p_Param);
  70693. +
  70694. +/**************************************************************************//**
  70695. + @Function FM_PCD_HashTableDelete
  70696. +
  70697. + @Description This routine deletes the provided hash table and released all
  70698. + its allocated resources.
  70699. +
  70700. + @Param[in] h_HashTbl A handle to a hash table
  70701. +
  70702. + @Return E_OK on success; Error code otherwise.
  70703. +
  70704. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70705. +*//***************************************************************************/
  70706. +t_Error FM_PCD_HashTableDelete(t_Handle h_HashTbl);
  70707. +
  70708. +/**************************************************************************//**
  70709. + @Function FM_PCD_HashTableAddKey
  70710. +
  70711. + @Description This routine adds the provided key (including next engine
  70712. + parameters of this key) to the hash table.
  70713. + The key is added as the last key of the bucket that it is
  70714. + mapped to.
  70715. +
  70716. + @Param[in] h_HashTbl A handle to a hash table
  70717. + @Param[in] keySize Key size of added key
  70718. + @Param[in] p_KeyParams A pointer to the parameters includes
  70719. + new key with next engine parameters; The pointer
  70720. + to the key mask must be NULL, as masks are not
  70721. + supported in hash table implementation.
  70722. +
  70723. + @Return E_OK on success; Error code otherwise.
  70724. +
  70725. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70726. +*//***************************************************************************/
  70727. +t_Error FM_PCD_HashTableAddKey(t_Handle h_HashTbl,
  70728. + uint8_t keySize,
  70729. + t_FmPcdCcKeyParams *p_KeyParams);
  70730. +
  70731. +/**************************************************************************//**
  70732. + @Function FM_PCD_HashTableRemoveKey
  70733. +
  70734. + @Description This routine removes the requested key (including next engine
  70735. + parameters of this key) from the hash table.
  70736. +
  70737. + @Param[in] h_HashTbl A handle to a hash table
  70738. + @Param[in] keySize Key size of the one to remove.
  70739. + @Param[in] p_Key A pointer to the requested key to remove.
  70740. +
  70741. + @Return E_OK on success; Error code otherwise.
  70742. +
  70743. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70744. +*//***************************************************************************/
  70745. +t_Error FM_PCD_HashTableRemoveKey(t_Handle h_HashTbl,
  70746. + uint8_t keySize,
  70747. + uint8_t *p_Key);
  70748. +
  70749. +/**************************************************************************//**
  70750. + @Function FM_PCD_HashTableModifyNextEngine
  70751. +
  70752. + @Description This routine modifies the next engine for the provided key. The
  70753. + key should be previously added to the hash table.
  70754. +
  70755. + @Param[in] h_HashTbl A handle to a hash table
  70756. + @Param[in] keySize Key size of the key to modify.
  70757. + @Param[in] p_Key A pointer to the requested key to modify.
  70758. + @Param[in] p_FmPcdCcNextEngineParams A structure for defining new next engine
  70759. + parameters.
  70760. +
  70761. + @Return E_OK on success; Error code otherwise.
  70762. +
  70763. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70764. + When configuring nextEngine = e_FM_PCD_CC, note that
  70765. + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
  70766. + from the currently changed table.
  70767. +*//***************************************************************************/
  70768. +t_Error FM_PCD_HashTableModifyNextEngine(t_Handle h_HashTbl,
  70769. + uint8_t keySize,
  70770. + uint8_t *p_Key,
  70771. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70772. +
  70773. +/**************************************************************************//**
  70774. + @Function FM_PCD_HashTableModifyMissNextEngine
  70775. +
  70776. + @Description This routine modifies the next engine on key match miss.
  70777. +
  70778. + @Param[in] h_HashTbl A handle to a hash table
  70779. + @Param[in] p_FmPcdCcNextEngineParams A structure for defining new next engine
  70780. + parameters.
  70781. +
  70782. + @Return E_OK on success; Error code otherwise.
  70783. +
  70784. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70785. + When configuring nextEngine = e_FM_PCD_CC, note that
  70786. + p_FmPcdCcNextEngineParams->ccParams.h_CcNode must be different
  70787. + from the currently changed table.
  70788. +*//***************************************************************************/
  70789. +t_Error FM_PCD_HashTableModifyMissNextEngine(t_Handle h_HashTbl,
  70790. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70791. +
  70792. +/**************************************************************************//*
  70793. + @Function FM_PCD_HashTableGetMissNextEngine
  70794. +
  70795. + @Description Gets NextEngine in case of key match miss.
  70796. +
  70797. + @Param[in] h_HashTbl A handle to a hash table
  70798. + @Param[out] p_FmPcdCcNextEngineParams Next engine parameters for the specified
  70799. + hash table.
  70800. +
  70801. + @Return E_OK on success; Error code otherwise.
  70802. +
  70803. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70804. +*//***************************************************************************/
  70805. +t_Error FM_PCD_HashTableGetMissNextEngine(t_Handle h_HashTbl,
  70806. + t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);
  70807. +
  70808. +/**************************************************************************//**
  70809. + @Function FM_PCD_HashTableFindNGetKeyStatistics
  70810. +
  70811. + @Description This routine may be used to get statistics counters of specific key
  70812. + in a hash table.
  70813. +
  70814. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  70815. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  70816. + these counters reflect how many frames passed that were matched
  70817. + this key; The total frames count will be returned in the counter
  70818. + of the first range (as only one frame length range was defined).
  70819. + If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
  70820. + frame count will be separated to frame length counters, based on
  70821. + provided frame length ranges.
  70822. + Note that this routine will identify the bucket of this key in
  70823. + the hash table and will search the bucket to locate the index
  70824. + of the required key based on received key parameters.
  70825. +
  70826. + @Param[in] h_HashTbl A handle to a hash table
  70827. + @Param[in] keySize Size of the requested key
  70828. + @Param[in] p_Key A pointer to the requested key
  70829. + @Param[out] p_KeyStatistics Key statistics counters
  70830. +
  70831. + @Return The specific key statistics.
  70832. +
  70833. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70834. +*//***************************************************************************/
  70835. +t_Error FM_PCD_HashTableFindNGetKeyStatistics(t_Handle h_HashTbl,
  70836. + uint8_t keySize,
  70837. + uint8_t *p_Key,
  70838. + t_FmPcdCcKeyStatistics *p_KeyStatistics);
  70839. +
  70840. +/**************************************************************************//**
  70841. + @Function FM_PCD_HashTableGetMissStatistics
  70842. +
  70843. + @Description This routine may be used to get statistics counters of 'miss'
  70844. + entry of the a hash table.
  70845. +
  70846. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  70847. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  70848. + these counters reflect how many frames were not matched to any
  70849. + existing key and therefore passed through the miss entry;
  70850. +
  70851. + @Param[in] h_HashTbl A handle to a hash table
  70852. + @Param[out] p_MissStatistics Statistics counters for 'miss'
  70853. +
  70854. + @Return The statistics for 'miss'.
  70855. +
  70856. + @Cautions Allowed only following FM_PCD_HashTableSet().
  70857. +*//***************************************************************************/
  70858. +t_Error FM_PCD_HashTableGetMissStatistics(t_Handle h_HashTbl,
  70859. + t_FmPcdCcKeyStatistics *p_MissStatistics);
  70860. +
  70861. +/**************************************************************************//**
  70862. + @Function FM_PCD_ManipNodeSet
  70863. +
  70864. + @Description This routine should be called for defining a manipulation
  70865. + node. A manipulation node must be defined before the CC node
  70866. + that precedes it.
  70867. +
  70868. + @Param[in] h_FmPcd FM PCD module descriptor.
  70869. + @Param[in] p_FmPcdManipParams A structure of parameters defining the manipulation
  70870. +
  70871. + @Return A handle to the initialized object on success; NULL code otherwise.
  70872. +
  70873. + @Cautions Allowed only following FM_PCD_Init().
  70874. +*//***************************************************************************/
  70875. +t_Handle FM_PCD_ManipNodeSet(t_Handle h_FmPcd, t_FmPcdManipParams *p_FmPcdManipParams);
  70876. +
  70877. +/**************************************************************************//**
  70878. + @Function FM_PCD_ManipNodeDelete
  70879. +
  70880. + @Description Delete an existing manipulation node.
  70881. +
  70882. + @Param[in] h_ManipNode A handle to a manipulation node.
  70883. +
  70884. + @Return E_OK on success; Error code otherwise.
  70885. +
  70886. + @Cautions Allowed only following FM_PCD_ManipNodeSet().
  70887. +*//***************************************************************************/
  70888. +t_Error FM_PCD_ManipNodeDelete(t_Handle h_ManipNode);
  70889. +
  70890. +/**************************************************************************//**
  70891. + @Function FM_PCD_ManipGetStatistics
  70892. +
  70893. + @Description Retrieve the manipulation statistics.
  70894. +
  70895. + @Param[in] h_ManipNode A handle to a manipulation node.
  70896. + @Param[out] p_FmPcdManipStats A structure for retrieving the manipulation statistics
  70897. +
  70898. + @Return E_OK on success; Error code otherwise.
  70899. +
  70900. + @Cautions Allowed only following FM_PCD_ManipNodeSet().
  70901. +*//***************************************************************************/
  70902. +t_Error FM_PCD_ManipGetStatistics(t_Handle h_ManipNode, t_FmPcdManipStats *p_FmPcdManipStats);
  70903. +
  70904. +/**************************************************************************//**
  70905. + @Function FM_PCD_ManipNodeReplace
  70906. +
  70907. + @Description Change existing manipulation node to be according to new requirement.
  70908. +
  70909. + @Param[in] h_ManipNode A handle to a manipulation node.
  70910. + @Param[out] p_ManipParams A structure of parameters defining the change requirement
  70911. +
  70912. + @Return E_OK on success; Error code otherwise.
  70913. +
  70914. + @Cautions Allowed only following FM_PCD_ManipNodeSet().
  70915. +*//***************************************************************************/
  70916. +t_Error FM_PCD_ManipNodeReplace(t_Handle h_ManipNode, t_FmPcdManipParams *p_ManipParams);
  70917. +
  70918. +#if (DPAA_VERSION >= 11)
  70919. +/**************************************************************************//**
  70920. + @Function FM_PCD_FrmReplicSetGroup
  70921. +
  70922. + @Description Initialize a Frame Replicator group.
  70923. +
  70924. + @Param[in] h_FmPcd FM PCD module descriptor.
  70925. + @Param[in] p_FrmReplicGroupParam A structure of parameters for the initialization of
  70926. + the frame replicator group.
  70927. +
  70928. + @Return A handle to the initialized object on success; NULL code otherwise.
  70929. +
  70930. + @Cautions Allowed only following FM_PCD_Init().
  70931. +*//***************************************************************************/
  70932. +t_Handle FM_PCD_FrmReplicSetGroup(t_Handle h_FmPcd, t_FmPcdFrmReplicGroupParams *p_FrmReplicGroupParam);
  70933. +
  70934. +/**************************************************************************//**
  70935. + @Function FM_PCD_FrmReplicDeleteGroup
  70936. +
  70937. + @Description Delete a Frame Replicator group.
  70938. +
  70939. + @Param[in] h_FrmReplicGroup A handle to the frame replicator group.
  70940. +
  70941. + @Return E_OK on success; Error code otherwise.
  70942. +
  70943. + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup().
  70944. +*//***************************************************************************/
  70945. +t_Error FM_PCD_FrmReplicDeleteGroup(t_Handle h_FrmReplicGroup);
  70946. +
  70947. +/**************************************************************************//**
  70948. + @Function FM_PCD_FrmReplicAddMember
  70949. +
  70950. + @Description Add the member in the index defined by the memberIndex.
  70951. +
  70952. + @Param[in] h_FrmReplicGroup A handle to the frame replicator group.
  70953. + @Param[in] memberIndex member index for adding.
  70954. + @Param[in] p_MemberParams A pointer to the new member parameters.
  70955. +
  70956. + @Return E_OK on success; Error code otherwise.
  70957. +
  70958. + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
  70959. +*//***************************************************************************/
  70960. +t_Error FM_PCD_FrmReplicAddMember(t_Handle h_FrmReplicGroup,
  70961. + uint16_t memberIndex,
  70962. + t_FmPcdCcNextEngineParams *p_MemberParams);
  70963. +
  70964. +/**************************************************************************//**
  70965. + @Function FM_PCD_FrmReplicRemoveMember
  70966. +
  70967. + @Description Remove the member defined by the index from the relevant group.
  70968. +
  70969. + @Param[in] h_FrmReplicGroup A handle to the frame replicator group.
  70970. + @Param[in] memberIndex member index for removing.
  70971. +
  70972. + @Return E_OK on success; Error code otherwise.
  70973. +
  70974. + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
  70975. +*//***************************************************************************/
  70976. +t_Error FM_PCD_FrmReplicRemoveMember(t_Handle h_FrmReplicGroup,
  70977. + uint16_t memberIndex);
  70978. +#endif /* (DPAA_VERSION >= 11) */
  70979. +
  70980. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  70981. +/**************************************************************************//**
  70982. + @Function FM_PCD_StatisticsSetNode
  70983. +
  70984. + @Description This routine should be called for defining a statistics node.
  70985. +
  70986. + @Param[in] h_FmPcd FM PCD module descriptor.
  70987. + @Param[in] p_FmPcdstatsParams A structure of parameters defining the statistics
  70988. +
  70989. + @Return A handle to the initialized object on success; NULL code otherwise.
  70990. +
  70991. + @Cautions Allowed only following FM_PCD_Init().
  70992. +*//***************************************************************************/
  70993. +t_Handle FM_PCD_StatisticsSetNode(t_Handle h_FmPcd, t_FmPcdStatsParams *p_FmPcdstatsParams);
  70994. +#endif /* ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  70995. +
  70996. +/** @} */ /* end of FM_PCD_Runtime_build_grp group */
  70997. +/** @} */ /* end of FM_PCD_Runtime_grp group */
  70998. +/** @} */ /* end of FM_PCD_grp group */
  70999. +/** @} */ /* end of FM_grp group */
  71000. +
  71001. +
  71002. +#ifdef NCSW_BACKWARD_COMPATIBLE_API
  71003. +#define FM_PCD_MAX_NUM_OF_INTERCHANGABLE_HDRS FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS
  71004. +#define e_FM_PCD_MANIP_ONE_WAYS_HASH e_FM_PCD_MANIP_ONE_WAY_HASH
  71005. +#define e_FM_PCD_MANIP_TOW_WAYS_HASH e_FM_PCD_MANIP_TWO_WAYS_HASH
  71006. +
  71007. +#define e_FM_PCD_MANIP_FRAGMENT_PACKECT e_FM_PCD_MANIP_FRAGMENT_PACKET /* Feb13 */
  71008. +
  71009. +#define FM_PCD_SetNetEnvCharacteristics(_pcd, _params) \
  71010. + FM_PCD_NetEnvCharacteristicsSet(_pcd, _params)
  71011. +#define FM_PCD_KgSetScheme(_pcd, _params) FM_PCD_KgSchemeSet(_pcd, _params)
  71012. +#define FM_PCD_CcBuildTree(_pcd, _params) FM_PCD_CcRootBuild(_pcd, _params)
  71013. +#define FM_PCD_CcSetNode(_pcd, _params) FM_PCD_MatchTableSet(_pcd, _params)
  71014. +#define FM_PCD_PlcrSetProfile(_pcd, _params) FM_PCD_PlcrProfileSet(_pcd, _params)
  71015. +#define FM_PCD_ManipSetNode(_pcd, _params) FM_PCD_ManipNodeSet(_pcd, _params)
  71016. +
  71017. +#define FM_PCD_DeleteNetEnvCharacteristics(_pcd, ...) \
  71018. + FM_PCD_NetEnvCharacteristicsDelete(__VA_ARGS__)
  71019. +#define FM_PCD_KgDeleteScheme(_pcd, ...) \
  71020. + FM_PCD_KgSchemeDelete(__VA_ARGS__)
  71021. +#define FM_PCD_KgGetSchemeCounter(_pcd, ...) \
  71022. + FM_PCD_KgSchemeGetCounter(__VA_ARGS__)
  71023. +#define FM_PCD_KgSetSchemeCounter(_pcd, ...) \
  71024. + FM_PCD_KgSchemeSetCounter(__VA_ARGS__)
  71025. +#define FM_PCD_PlcrDeleteProfile(_pcd, ...) \
  71026. + FM_PCD_PlcrProfileDelete(__VA_ARGS__)
  71027. +#define FM_PCD_PlcrGetProfileCounter(_pcd, ...) \
  71028. + FM_PCD_PlcrProfileGetCounter(__VA_ARGS__)
  71029. +#define FM_PCD_PlcrSetProfileCounter(_pcd, ...) \
  71030. + FM_PCD_PlcrProfileSetCounter(__VA_ARGS__)
  71031. +#define FM_PCD_CcDeleteTree(_pcd, ...) \
  71032. + FM_PCD_CcRootDelete(__VA_ARGS__)
  71033. +#define FM_PCD_CcTreeModifyNextEngine(_pcd, ...) \
  71034. + FM_PCD_CcRootModifyNextEngine(__VA_ARGS__)
  71035. +#define FM_PCD_CcDeleteNode(_pcd, ...) \
  71036. + FM_PCD_MatchTableDelete(__VA_ARGS__)
  71037. +#define FM_PCD_CcNodeModifyMissNextEngine(_pcd, ...) \
  71038. + FM_PCD_MatchTableModifyMissNextEngine(__VA_ARGS__)
  71039. +#define FM_PCD_CcNodeRemoveKey(_pcd, ...) \
  71040. + FM_PCD_MatchTableRemoveKey(__VA_ARGS__)
  71041. +#define FM_PCD_CcNodeAddKey(_pcd, ...) \
  71042. + FM_PCD_MatchTableAddKey(__VA_ARGS__)
  71043. +#define FM_PCD_CcNodeModifyNextEngine(_pcd, ...) \
  71044. + FM_PCD_MatchTableModifyNextEngine(__VA_ARGS__)
  71045. +#define FM_PCD_CcNodeModifyKeyAndNextEngine(_pcd, ...) \
  71046. + FM_PCD_MatchTableModifyKeyAndNextEngine(__VA_ARGS__)
  71047. +#define FM_PCD_CcNodeModifyKey(_pcd, ...) \
  71048. + FM_PCD_MatchTableModifyKey(__VA_ARGS__)
  71049. +#define FM_PCD_CcNodeFindNRemoveKey(_pcd, ...) \
  71050. + FM_PCD_MatchTableFindNRemoveKey(__VA_ARGS__)
  71051. +#define FM_PCD_CcNodeFindNModifyNextEngine(_pcd, ...) \
  71052. + FM_PCD_MatchTableFindNModifyNextEngine(__VA_ARGS__)
  71053. +#define FM_PCD_CcNodeFindNModifyKeyAndNextEngine(_pcd, ...) \
  71054. + FM_PCD_MatchTableFindNModifyKeyAndNextEngine(__VA_ARGS__)
  71055. +#define FM_PCD_CcNodeFindNModifyKey(_pcd, ...) \
  71056. + FM_PCD_MatchTableFindNModifyKey(__VA_ARGS__)
  71057. +#define FM_PCD_CcIndexedHashNodeGetBucket(_pcd, ...) \
  71058. + FM_PCD_MatchTableGetIndexedHashBucket(__VA_ARGS__)
  71059. +#define FM_PCD_CcNodeGetNextEngine(_pcd, ...) \
  71060. + FM_PCD_MatchTableGetNextEngine(__VA_ARGS__)
  71061. +#define FM_PCD_CcNodeGetKeyCounter(_pcd, ...) \
  71062. + FM_PCD_MatchTableGetKeyCounter(__VA_ARGS__)
  71063. +#define FM_PCD_ManipDeleteNode(_pcd, ...) \
  71064. + FM_PCD_ManipNodeDelete(__VA_ARGS__)
  71065. +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
  71066. +
  71067. +
  71068. +#endif /* __FM_PCD_EXT */
  71069. --- /dev/null
  71070. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_port_ext.h
  71071. @@ -0,0 +1,2608 @@
  71072. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  71073. + * All rights reserved.
  71074. + *
  71075. + * Redistribution and use in source and binary forms, with or without
  71076. + * modification, are permitted provided that the following conditions are met:
  71077. + * * Redistributions of source code must retain the above copyright
  71078. + * notice, this list of conditions and the following disclaimer.
  71079. + * * Redistributions in binary form must reproduce the above copyright
  71080. + * notice, this list of conditions and the following disclaimer in the
  71081. + * documentation and/or other materials provided with the distribution.
  71082. + * * Neither the name of Freescale Semiconductor nor the
  71083. + * names of its contributors may be used to endorse or promote products
  71084. + * derived from this software without specific prior written permission.
  71085. + *
  71086. + *
  71087. + * ALTERNATIVELY, this software may be distributed under the terms of the
  71088. + * GNU General Public License ("GPL") as published by the Free Software
  71089. + * Foundation, either version 2 of that License or (at your option) any
  71090. + * later version.
  71091. + *
  71092. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  71093. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  71094. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  71095. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  71096. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  71097. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  71098. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  71099. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  71100. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  71101. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  71102. + */
  71103. +
  71104. +
  71105. +/**************************************************************************//**
  71106. + @File fm_port_ext.h
  71107. +
  71108. + @Description FM-Port Application Programming Interface.
  71109. +*//***************************************************************************/
  71110. +#ifndef __FM_PORT_EXT
  71111. +#define __FM_PORT_EXT
  71112. +
  71113. +#include "error_ext.h"
  71114. +#include "std_ext.h"
  71115. +#include "fm_pcd_ext.h"
  71116. +#include "fm_ext.h"
  71117. +#include "net_ext.h"
  71118. +
  71119. +
  71120. +/**************************************************************************//**
  71121. +
  71122. + @Group FM_grp Frame Manager API
  71123. +
  71124. + @Description FM API functions, definitions and enums
  71125. +
  71126. + @{
  71127. +*//***************************************************************************/
  71128. +
  71129. +/**************************************************************************//**
  71130. + @Group FM_PORT_grp FM Port
  71131. +
  71132. + @Description FM Port API
  71133. +
  71134. + The FM uses a general module called "port" to represent a Tx port
  71135. + (MAC), an Rx port (MAC) or Offline Parsing port.
  71136. + The number of ports in an FM varies between SOCs.
  71137. + The SW driver manages these ports as sub-modules of the FM, i.e.
  71138. + after an FM is initialized, its ports may be initialized and
  71139. + operated upon.
  71140. +
  71141. + The port is initialized aware of its type, but other functions on
  71142. + a port may be indifferent to its type. When necessary, the driver
  71143. + verifies coherence and returns error if applicable.
  71144. +
  71145. + On initialization, user specifies the port type and it's index
  71146. + (relative to the port's type) - always starting at 0.
  71147. +
  71148. + @{
  71149. +*//***************************************************************************/
  71150. +
  71151. +/**************************************************************************//**
  71152. + @Description An enum for defining port PCD modes.
  71153. + This enum defines the superset of PCD engines support - i.e. not
  71154. + all engines have to be used, but all have to be enabled. The real
  71155. + flow of a specific frame depends on the PCD configuration and the
  71156. + frame headers and payload.
  71157. + Note: the first engine and the first engine after the parser (if
  71158. + exists) should be in order, the order is important as it will
  71159. + define the flow of the port. However, as for the rest engines
  71160. + (the ones that follows), the order is not important anymore as
  71161. + it is defined by the PCD graph itself.
  71162. +*//***************************************************************************/
  71163. +typedef enum e_FmPortPcdSupport {
  71164. + e_FM_PORT_PCD_SUPPORT_NONE = 0 /**< BMI to BMI, PCD is not used */
  71165. + , e_FM_PORT_PCD_SUPPORT_PRS_ONLY /**< Use only Parser */
  71166. + , e_FM_PORT_PCD_SUPPORT_PLCR_ONLY /**< Use only Policer */
  71167. + , e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR /**< Use Parser and Policer */
  71168. + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG /**< Use Parser and Keygen */
  71169. + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC /**< Use Parser, Keygen and Coarse Classification */
  71170. + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR
  71171. + /**< Use all PCD engines */
  71172. + , e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR /**< Use Parser, Keygen and Policer */
  71173. + , e_FM_PORT_PCD_SUPPORT_PRS_AND_CC /**< Use Parser and Coarse Classification */
  71174. + , e_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR /**< Use Parser and Coarse Classification and Policer */
  71175. + , e_FM_PORT_PCD_SUPPORT_CC_ONLY /**< Use only Coarse Classification */
  71176. +#ifdef FM_CAPWAP_SUPPORT
  71177. + , e_FM_PORT_PCD_SUPPORT_CC_AND_KG /**< Use Coarse Classification,and Keygen */
  71178. + , e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR /**< Use Coarse Classification, Keygen and Policer */
  71179. +#endif /* FM_CAPWAP_SUPPORT */
  71180. +} e_FmPortPcdSupport;
  71181. +
  71182. +/**************************************************************************//**
  71183. + @Description Port interrupts
  71184. +*//***************************************************************************/
  71185. +typedef enum e_FmPortExceptions {
  71186. + e_FM_PORT_EXCEPTION_IM_BUSY /**< Independent-Mode Rx-BUSY */
  71187. +} e_FmPortExceptions;
  71188. +
  71189. +
  71190. +/**************************************************************************//**
  71191. + @Collection General FM Port defines
  71192. +*//***************************************************************************/
  71193. +#define FM_PORT_PRS_RESULT_NUM_OF_WORDS 8 /**< Number of 4 bytes words in parser result */
  71194. +/* @} */
  71195. +
  71196. +/**************************************************************************//**
  71197. + @Collection FM Frame error
  71198. +*//***************************************************************************/
  71199. +typedef uint32_t fmPortFrameErrSelect_t; /**< typedef for defining Frame Descriptor errors */
  71200. +
  71201. +#define FM_PORT_FRM_ERR_UNSUPPORTED_FORMAT FM_FD_ERR_UNSUPPORTED_FORMAT /**< Not for Rx-Port! Unsupported Format */
  71202. +#define FM_PORT_FRM_ERR_LENGTH FM_FD_ERR_LENGTH /**< Not for Rx-Port! Length Error */
  71203. +#define FM_PORT_FRM_ERR_DMA FM_FD_ERR_DMA /**< DMA Data error */
  71204. +#define FM_PORT_FRM_ERR_NON_FM FM_FD_RX_STATUS_ERR_NON_FM /**< non Frame-Manager error; probably come from SEC that
  71205. + was chained to FM */
  71206. +
  71207. +#define FM_PORT_FRM_ERR_IPRE (FM_FD_ERR_IPR & ~FM_FD_IPR) /**< IPR error */
  71208. +#define FM_PORT_FRM_ERR_IPR_NCSP (FM_FD_ERR_IPR_NCSP & ~FM_FD_IPR) /**< IPR non-consistent-sp */
  71209. +
  71210. +#define FM_PORT_FRM_ERR_IPFE 0 /**< Obsolete; will be removed in the future */
  71211. +
  71212. +#ifdef FM_CAPWAP_SUPPORT
  71213. +#define FM_PORT_FRM_ERR_CRE FM_FD_ERR_CRE
  71214. +#define FM_PORT_FRM_ERR_CHE FM_FD_ERR_CHE
  71215. +#endif /* FM_CAPWAP_SUPPORT */
  71216. +
  71217. +#define FM_PORT_FRM_ERR_PHYSICAL FM_FD_ERR_PHYSICAL /**< Rx FIFO overflow, FCS error, code error, running disparity
  71218. + error (SGMII and TBI modes), FIFO parity error. PHY
  71219. + Sequence error, PHY error control character detected. */
  71220. +#define FM_PORT_FRM_ERR_SIZE FM_FD_ERR_SIZE /**< Frame too long OR Frame size exceeds max_length_frame */
  71221. +#define FM_PORT_FRM_ERR_CLS_DISCARD FM_FD_ERR_CLS_DISCARD /**< indicates a classifier "drop" operation */
  71222. +#define FM_PORT_FRM_ERR_EXTRACTION FM_FD_ERR_EXTRACTION /**< Extract Out of Frame */
  71223. +#define FM_PORT_FRM_ERR_NO_SCHEME FM_FD_ERR_NO_SCHEME /**< No Scheme Selected */
  71224. +#define FM_PORT_FRM_ERR_KEYSIZE_OVERFLOW FM_FD_ERR_KEYSIZE_OVERFLOW /**< Keysize Overflow */
  71225. +#define FM_PORT_FRM_ERR_COLOR_RED FM_FD_ERR_COLOR_RED /**< Frame color is red */
  71226. +#define FM_PORT_FRM_ERR_COLOR_YELLOW FM_FD_ERR_COLOR_YELLOW /**< Frame color is yellow */
  71227. +#define FM_PORT_FRM_ERR_ILL_PLCR FM_FD_ERR_ILL_PLCR /**< Illegal Policer Profile selected */
  71228. +#define FM_PORT_FRM_ERR_PLCR_FRAME_LEN FM_FD_ERR_PLCR_FRAME_LEN /**< Policer frame length error */
  71229. +#define FM_PORT_FRM_ERR_PRS_TIMEOUT FM_FD_ERR_PRS_TIMEOUT /**< Parser Time out Exceed */
  71230. +#define FM_PORT_FRM_ERR_PRS_ILL_INSTRUCT FM_FD_ERR_PRS_ILL_INSTRUCT /**< Invalid Soft Parser instruction */
  71231. +#define FM_PORT_FRM_ERR_PRS_HDR_ERR FM_FD_ERR_PRS_HDR_ERR /**< Header error was identified during parsing */
  71232. +#define FM_PORT_FRM_ERR_BLOCK_LIMIT_EXCEEDED FM_FD_ERR_BLOCK_LIMIT_EXCEEDED /**< Frame parsed beyind 256 first bytes */
  71233. +#define FM_PORT_FRM_ERR_PROCESS_TIMEOUT 0x00000001 /**< FPM Frame Processing Timeout Exceeded */
  71234. +/* @} */
  71235. +
  71236. +
  71237. +
  71238. +/**************************************************************************//**
  71239. + @Group FM_PORT_init_grp FM Port Initialization Unit
  71240. +
  71241. + @Description FM Port Initialization Unit
  71242. +
  71243. + @{
  71244. +*//***************************************************************************/
  71245. +
  71246. +/**************************************************************************//**
  71247. + @Description Exceptions user callback routine, will be called upon an
  71248. + exception passing the exception identification.
  71249. +
  71250. + @Param[in] h_App - User's application descriptor.
  71251. + @Param[in] exception - The exception.
  71252. + *//***************************************************************************/
  71253. +typedef void (t_FmPortExceptionCallback) (t_Handle h_App, e_FmPortExceptions exception);
  71254. +
  71255. +/**************************************************************************//**
  71256. + @Description User callback function called by driver with received data.
  71257. +
  71258. + User provides this function. Driver invokes it.
  71259. +
  71260. + @Param[in] h_App Application's handle originally specified to
  71261. + the API Config function
  71262. + @Param[in] p_Data A pointer to data received
  71263. + @Param[in] length length of received data
  71264. + @Param[in] status receive status and errors
  71265. + @Param[in] position position of buffer in frame
  71266. + @Param[in] h_BufContext A handle of the user acossiated with this buffer
  71267. +
  71268. + @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
  71269. + operation for all ready data.
  71270. + @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation.
  71271. +*//***************************************************************************/
  71272. +typedef e_RxStoreResponse (t_FmPortImRxStoreCallback) (t_Handle h_App,
  71273. + uint8_t *p_Data,
  71274. + uint16_t length,
  71275. + uint16_t status,
  71276. + uint8_t position,
  71277. + t_Handle h_BufContext);
  71278. +
  71279. +/**************************************************************************//**
  71280. + @Description User callback function called by driver when transmit completed.
  71281. +
  71282. + User provides this function. Driver invokes it.
  71283. +
  71284. + @Param[in] h_App Application's handle originally specified to
  71285. + the API Config function
  71286. + @Param[in] p_Data A pointer to data received
  71287. + @Param[in] status transmit status and errors
  71288. + @Param[in] lastBuffer is last buffer in frame
  71289. + @Param[in] h_BufContext A handle of the user acossiated with this buffer
  71290. + *//***************************************************************************/
  71291. +typedef void (t_FmPortImTxConfCallback) (t_Handle h_App,
  71292. + uint8_t *p_Data,
  71293. + uint16_t status,
  71294. + t_Handle h_BufContext);
  71295. +
  71296. +/**************************************************************************//**
  71297. + @Description A structure for additional Rx port parameters
  71298. +*//***************************************************************************/
  71299. +typedef struct t_FmPortRxParams {
  71300. + uint32_t errFqid; /**< Error Queue Id. */
  71301. + uint32_t dfltFqid; /**< Default Queue Id. */
  71302. + uint16_t liodnOffset; /**< Port's LIODN offset. */
  71303. + t_FmExtPools extBufPools; /**< Which external buffer pools are used
  71304. + (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes. */
  71305. +} t_FmPortRxParams;
  71306. +
  71307. +/**************************************************************************//**
  71308. + @Description A structure for additional non-Rx port parameters
  71309. +*//***************************************************************************/
  71310. +typedef struct t_FmPortNonRxParams {
  71311. + uint32_t errFqid; /**< Error Queue Id. */
  71312. + uint32_t dfltFqid; /**< For Tx - Default Confirmation queue,
  71313. + 0 means no Tx confirmation for processed
  71314. + frames. For OP port - default Rx queue. */
  71315. + uint32_t qmChannel; /**< QM-channel dedicated to this port; will be used
  71316. + by the FM for dequeue. */
  71317. +} t_FmPortNonRxParams;
  71318. +
  71319. +/**************************************************************************//**
  71320. + @Description A structure for additional Rx port parameters
  71321. +*//***************************************************************************/
  71322. +typedef struct t_FmPortImRxTxParams {
  71323. + t_Handle h_FmMuram; /**< A handle of the FM-MURAM partition */
  71324. + uint16_t liodnOffset; /**< For Rx ports only. Port's LIODN Offset. */
  71325. + uint8_t dataMemId; /**< Memory partition ID for data buffers */
  71326. + uint32_t dataMemAttributes; /**< Memory attributes for data buffers */
  71327. + t_BufferPoolInfo rxPoolParams; /**< For Rx ports only. */
  71328. + t_FmPortImRxStoreCallback *f_RxStore; /**< For Rx ports only. */
  71329. + t_FmPortImTxConfCallback *f_TxConf; /**< For Tx ports only. */
  71330. +} t_FmPortImRxTxParams;
  71331. +
  71332. +/**************************************************************************//**
  71333. + @Description A union for additional parameters depending on port type
  71334. +*//***************************************************************************/
  71335. +typedef union u_FmPortSpecificParams {
  71336. + t_FmPortImRxTxParams imRxTxParams; /**< Rx/Tx Independent-Mode port parameter structure */
  71337. + t_FmPortRxParams rxParams; /**< Rx port parameters structure */
  71338. + t_FmPortNonRxParams nonRxParams; /**< Non-Rx port parameters structure */
  71339. +} u_FmPortSpecificParams;
  71340. +
  71341. +/**************************************************************************//**
  71342. + @Description A structure representing FM initialization parameters
  71343. +*//***************************************************************************/
  71344. +typedef struct t_FmPortParams {
  71345. + uintptr_t baseAddr; /**< Virtual Address of memory mapped FM Port registers.*/
  71346. + t_Handle h_Fm; /**< A handle to the FM object this port related to */
  71347. + e_FmPortType portType; /**< Port type */
  71348. + uint8_t portId; /**< Port Id - relative to type;
  71349. + NOTE: When configuring Offline Parsing port for
  71350. + FMANv3 devices (DPAA_VERSION 11 and higher),
  71351. + it is highly recommended NOT to use portId=0 due to lack
  71352. + of HW resources on portId=0. */
  71353. + bool independentModeEnable;
  71354. + /**< This port is Independent-Mode - Used for Rx/Tx ports only! */
  71355. + uint16_t liodnBase; /**< Irrelevant for P4080 rev 1. LIODN base for this port, to be
  71356. + used together with LIODN offset. */
  71357. + u_FmPortSpecificParams specificParams; /**< Additional parameters depending on port
  71358. + type. */
  71359. +
  71360. + t_FmPortExceptionCallback *f_Exception; /**< Relevant for IM only Callback routine to be called on BUSY exception */
  71361. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  71362. + be passed by the driver upon calling the above callbacks */
  71363. +} t_FmPortParams;
  71364. +
  71365. +
  71366. +/**************************************************************************//**
  71367. + @Function FM_PORT_Config
  71368. +
  71369. + @Description Creates a descriptor for the FM PORT module.
  71370. +
  71371. + The routine returns a handle (descriptor) to the FM PORT object.
  71372. + This descriptor must be passed as first parameter to all other
  71373. + FM PORT function calls.
  71374. +
  71375. + No actual initialization or configuration of FM hardware is
  71376. + done by this routine.
  71377. +
  71378. + @Param[in] p_FmPortParams - Pointer to data structure of parameters
  71379. +
  71380. + @Retval Handle to FM object, or NULL for Failure.
  71381. +*//***************************************************************************/
  71382. +t_Handle FM_PORT_Config(t_FmPortParams *p_FmPortParams);
  71383. +
  71384. +/**************************************************************************//**
  71385. + @Function FM_PORT_Init
  71386. +
  71387. + @Description Initializes the FM PORT module by defining the software structure
  71388. + and configuring the hardware registers.
  71389. +
  71390. + @Param[in] h_FmPort - FM PORT module descriptor
  71391. +
  71392. + @Return E_OK on success; Error code otherwise.
  71393. +*//***************************************************************************/
  71394. +t_Error FM_PORT_Init(t_Handle h_FmPort);
  71395. +
  71396. +/**************************************************************************//**
  71397. + @Function FM_PORT_Free
  71398. +
  71399. + @Description Frees all resources that were assigned to FM PORT module.
  71400. +
  71401. + Calling this routine invalidates the descriptor.
  71402. +
  71403. + @Param[in] h_FmPort - FM PORT module descriptor
  71404. +
  71405. + @Return E_OK on success; Error code otherwise.
  71406. +*//***************************************************************************/
  71407. +t_Error FM_PORT_Free(t_Handle h_FmPort);
  71408. +
  71409. +
  71410. +/**************************************************************************//**
  71411. + @Group FM_PORT_advanced_init_grp FM Port Advanced Configuration Unit
  71412. +
  71413. + @Description Configuration functions used to change default values.
  71414. +
  71415. + @{
  71416. +*//***************************************************************************/
  71417. +
  71418. +/**************************************************************************//**
  71419. + @Description enum for defining QM frame dequeue
  71420. +*//***************************************************************************/
  71421. +typedef enum e_FmPortDeqType {
  71422. + e_FM_PORT_DEQ_TYPE1, /**< Dequeue from the SP channel - with priority precedence,
  71423. + and Intra-Class Scheduling respected. */
  71424. + e_FM_PORT_DEQ_TYPE2, /**< Dequeue from the SP channel - with active FQ precedence,
  71425. + and Intra-Class Scheduling respected. */
  71426. + e_FM_PORT_DEQ_TYPE3 /**< Dequeue from the SP channel - with active FQ precedence,
  71427. + and override Intra-Class Scheduling */
  71428. +} e_FmPortDeqType;
  71429. +
  71430. +/**************************************************************************//**
  71431. + @Description enum for defining QM frame dequeue
  71432. +*//***************************************************************************/
  71433. +typedef enum e_FmPortDeqPrefetchOption {
  71434. + e_FM_PORT_DEQ_NO_PREFETCH, /**< QMI preforms a dequeue action for a single frame
  71435. + only when a dedicated portID Tnum is waiting. */
  71436. + e_FM_PORT_DEQ_PARTIAL_PREFETCH, /**< QMI preforms a dequeue action for 3 frames when
  71437. + one dedicated portId tnum is waiting. */
  71438. + e_FM_PORT_DEQ_FULL_PREFETCH /**< QMI preforms a dequeue action for 3 frames when
  71439. + no dedicated portId tnums are waiting. */
  71440. +
  71441. +} e_FmPortDeqPrefetchOption;
  71442. +
  71443. +/**************************************************************************//**
  71444. + @Description enum for defining port default color
  71445. +*//***************************************************************************/
  71446. +typedef enum e_FmPortColor {
  71447. + e_FM_PORT_COLOR_GREEN, /**< Default port color is green */
  71448. + e_FM_PORT_COLOR_YELLOW, /**< Default port color is yellow */
  71449. + e_FM_PORT_COLOR_RED, /**< Default port color is red */
  71450. + e_FM_PORT_COLOR_OVERRIDE /**< Ignore color */
  71451. +} e_FmPortColor;
  71452. +
  71453. +/**************************************************************************//**
  71454. + @Description A structure for defining Dual Tx rate limiting scale
  71455. +*//***************************************************************************/
  71456. +typedef enum e_FmPortDualRateLimiterScaleDown {
  71457. + e_FM_PORT_DUAL_RATE_LIMITER_NONE = 0, /**< Use only single rate limiter */
  71458. + e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_2, /**< Divide high rate limiter by 2 */
  71459. + e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_4, /**< Divide high rate limiter by 4 */
  71460. + e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8 /**< Divide high rate limiter by 8 */
  71461. +} e_FmPortDualRateLimiterScaleDown;
  71462. +
  71463. +
  71464. +/**************************************************************************//**
  71465. + @Description A structure for defining FM port resources
  71466. +*//***************************************************************************/
  71467. +typedef struct t_FmPortRsrc {
  71468. + uint32_t num; /**< Committed required resource */
  71469. + uint32_t extra; /**< Extra (not committed) required resource */
  71470. +} t_FmPortRsrc;
  71471. +
  71472. +/**************************************************************************//**
  71473. + @Description A structure for defining observed pool depletion
  71474. +*//***************************************************************************/
  71475. +typedef struct t_FmPortObservedBufPoolDepletion {
  71476. + t_FmBufPoolDepletion poolDepletionParams;/**< parameters to define pool depletion */
  71477. + t_FmExtPools poolsParams; /**< Which external buffer pools are observed
  71478. + (up to FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS),
  71479. + and their sizes. */
  71480. +} t_FmPortObservedBufPoolDepletion;
  71481. +
  71482. +/**************************************************************************//**
  71483. + @Description A structure for defining Tx rate limiting
  71484. +*//***************************************************************************/
  71485. +typedef struct t_FmPortRateLimit {
  71486. + uint16_t maxBurstSize; /**< in KBytes for Tx ports, in frames
  71487. + for OP ports. (note that
  71488. + for early chips burst size is
  71489. + rounded up to a multiply of 1000 frames).*/
  71490. + uint32_t rateLimit; /**< in Kb/sec for Tx ports, in frame/sec for
  71491. + OP ports. Rate limit refers to
  71492. + data rate (rather than line rate). */
  71493. + e_FmPortDualRateLimiterScaleDown rateLimitDivider; /**< For OP ports only. Not-valid
  71494. + for some earlier chip revisions */
  71495. +} t_FmPortRateLimit;
  71496. +
  71497. +/**************************************************************************//**
  71498. + @Description A structure for defining the parameters of
  71499. + the Rx port performance counters
  71500. +*//***************************************************************************/
  71501. +typedef struct t_FmPortPerformanceCnt {
  71502. + uint8_t taskCompVal; /**< Task compare value */
  71503. + uint8_t queueCompVal; /**< Rx queue/Tx confirm queue compare
  71504. + value (unused for H/O) */
  71505. + uint8_t dmaCompVal; /**< Dma compare value */
  71506. + uint32_t fifoCompVal; /**< Fifo compare value (in bytes) */
  71507. +} t_FmPortPerformanceCnt;
  71508. +
  71509. +
  71510. +/**************************************************************************//**
  71511. + @Description A structure for defining the sizes of the Deep Sleep
  71512. + the Auto Response tables
  71513. +*//***************************************************************************/
  71514. +typedef struct t_FmPortDsarTablesSizes
  71515. +{
  71516. + uint16_t maxNumOfArpEntries;
  71517. + uint16_t maxNumOfEchoIpv4Entries;
  71518. + uint16_t maxNumOfNdpEntries;
  71519. + uint16_t maxNumOfEchoIpv6Entries;
  71520. + uint16_t maxNumOfSnmpIPV4Entries;
  71521. + uint16_t maxNumOfSnmpIPV6Entries;
  71522. + uint16_t maxNumOfSnmpOidEntries;
  71523. + uint16_t maxNumOfSnmpOidChar; /* total amount of character needed for the snmp table */
  71524. +
  71525. + uint16_t maxNumOfIpProtFiltering;
  71526. + uint16_t maxNumOfTcpPortFiltering;
  71527. + uint16_t maxNumOfUdpPortFiltering;
  71528. +} t_FmPortDsarTablesSizes;
  71529. +
  71530. +
  71531. +/**************************************************************************//**
  71532. + @Function FM_PORT_ConfigDsarSupport
  71533. +
  71534. + @Description This function will allocate the amount of MURAM needed for
  71535. + this max number of entries for Deep Sleep Auto Response.
  71536. + it will calculate all needed MURAM for autoresponse including
  71537. + necesary common stuff.
  71538. +
  71539. +
  71540. + @Param[in] h_FmPort A handle to a FM Port module.
  71541. + @Param[in] params A pointer to a structure containing the maximum
  71542. + sizes of the auto response tables
  71543. +
  71544. + @Return E_OK on success; Error code otherwise.
  71545. +
  71546. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71547. +*//***************************************************************************/
  71548. +t_Error FM_PORT_ConfigDsarSupport(t_Handle h_FmPortRx, t_FmPortDsarTablesSizes *params);
  71549. +
  71550. +/**************************************************************************//**
  71551. + @Function FM_PORT_ConfigNumOfOpenDmas
  71552. +
  71553. + @Description Calling this routine changes the max number of open DMA's
  71554. + available for this port. It changes this parameter in the
  71555. + internal driver data base from its default configuration
  71556. + [OP: 1]
  71557. + [1G-RX, 1G-TX: 1 (+1)]
  71558. + [10G-RX, 10G-TX: 8 (+8)]
  71559. +
  71560. + @Param[in] h_FmPort A handle to a FM Port module.
  71561. + @Param[in] p_OpenDmas A pointer to a structure of parameters defining
  71562. + the open DMA allocation.
  71563. +
  71564. + @Return E_OK on success; Error code otherwise.
  71565. +
  71566. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71567. +*//***************************************************************************/
  71568. +t_Error FM_PORT_ConfigNumOfOpenDmas(t_Handle h_FmPort, t_FmPortRsrc *p_OpenDmas);
  71569. +
  71570. +/**************************************************************************//**
  71571. + @Function FM_PORT_ConfigNumOfTasks
  71572. +
  71573. + @Description Calling this routine changes the max number of tasks
  71574. + available for this port. It changes this parameter in the
  71575. + internal driver data base from its default configuration
  71576. + [OP: 1]
  71577. + [1G-RX, 1G-TX: 3 (+2)]
  71578. + [10G-RX, 10G-TX: 16 (+8)]
  71579. +
  71580. + @Param[in] h_FmPort A handle to a FM Port module.
  71581. + @Param[in] p_NumOfTasks A pointer to a structure of parameters defining
  71582. + the tasks allocation.
  71583. +
  71584. + @Return E_OK on success; Error code otherwise.
  71585. +
  71586. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71587. +*//***************************************************************************/
  71588. +t_Error FM_PORT_ConfigNumOfTasks(t_Handle h_FmPort, t_FmPortRsrc *p_NumOfTasks);
  71589. +
  71590. +/**************************************************************************//**
  71591. + @Function FM_PORT_ConfigSizeOfFifo
  71592. +
  71593. + @Description Calling this routine changes the max FIFO size configured for this port.
  71594. +
  71595. + This function changes the internal driver data base from its
  71596. + default configuration. Please refer to the driver's User Guide for
  71597. + information on default FIFO sizes in the various devices.
  71598. + [OP: 2KB]
  71599. + [1G-RX, 1G-TX: 11KB]
  71600. + [10G-RX, 10G-TX: 12KB]
  71601. +
  71602. + @Param[in] h_FmPort A handle to a FM Port module.
  71603. + @Param[in] p_SizeOfFifo A pointer to a structure of parameters defining
  71604. + the FIFO allocation.
  71605. +
  71606. + @Return E_OK on success; Error code otherwise.
  71607. +
  71608. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71609. +*//***************************************************************************/
  71610. +t_Error FM_PORT_ConfigSizeOfFifo(t_Handle h_FmPort, t_FmPortRsrc *p_SizeOfFifo);
  71611. +
  71612. +/**************************************************************************//**
  71613. + @Function FM_PORT_ConfigDeqHighPriority
  71614. +
  71615. + @Description Calling this routine changes the dequeue priority in the
  71616. + internal driver data base from its default configuration
  71617. + 1G: [DEFAULT_PORT_deqHighPriority_1G]
  71618. + 10G: [DEFAULT_PORT_deqHighPriority_10G]
  71619. +
  71620. + May be used for Non-Rx ports only
  71621. +
  71622. + @Param[in] h_FmPort A handle to a FM Port module.
  71623. + @Param[in] highPri TRUE to select high priority, FALSE for normal operation.
  71624. +
  71625. + @Return E_OK on success; Error code otherwise.
  71626. +
  71627. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71628. +*//***************************************************************************/
  71629. +t_Error FM_PORT_ConfigDeqHighPriority(t_Handle h_FmPort, bool highPri);
  71630. +
  71631. +/**************************************************************************//**
  71632. + @Function FM_PORT_ConfigDeqType
  71633. +
  71634. + @Description Calling this routine changes the dequeue type parameter in the
  71635. + internal driver data base from its default configuration
  71636. + [DEFAULT_PORT_deqType].
  71637. +
  71638. + May be used for Non-Rx ports only
  71639. +
  71640. + @Param[in] h_FmPort A handle to a FM Port module.
  71641. + @Param[in] deqType According to QM definition.
  71642. +
  71643. + @Return E_OK on success; Error code otherwise.
  71644. +
  71645. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71646. +*//***************************************************************************/
  71647. +t_Error FM_PORT_ConfigDeqType(t_Handle h_FmPort, e_FmPortDeqType deqType);
  71648. +
  71649. +/**************************************************************************//**
  71650. + @Function FM_PORT_ConfigDeqPrefetchOption
  71651. +
  71652. + @Description Calling this routine changes the dequeue prefetch option parameter in the
  71653. + internal driver data base from its default configuration
  71654. + [DEFAULT_PORT_deqPrefetchOption]
  71655. + Note: Available for some chips only
  71656. +
  71657. + May be used for Non-Rx ports only
  71658. +
  71659. + @Param[in] h_FmPort A handle to a FM Port module.
  71660. + @Param[in] deqPrefetchOption New option
  71661. +
  71662. + @Return E_OK on success; Error code otherwise.
  71663. +
  71664. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71665. +*//***************************************************************************/
  71666. +t_Error FM_PORT_ConfigDeqPrefetchOption(t_Handle h_FmPort, e_FmPortDeqPrefetchOption deqPrefetchOption);
  71667. +
  71668. +/**************************************************************************//**
  71669. + @Function FM_PORT_ConfigDeqByteCnt
  71670. +
  71671. + @Description Calling this routine changes the dequeue byte count parameter in
  71672. + the internal driver data base from its default configuration
  71673. + 1G:[DEFAULT_PORT_deqByteCnt_1G].
  71674. + 10G:[DEFAULT_PORT_deqByteCnt_10G].
  71675. +
  71676. + May be used for Non-Rx ports only
  71677. +
  71678. + @Param[in] h_FmPort A handle to a FM Port module.
  71679. + @Param[in] deqByteCnt New byte count
  71680. +
  71681. + @Return E_OK on success; Error code otherwise.
  71682. +
  71683. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71684. +*//***************************************************************************/
  71685. +t_Error FM_PORT_ConfigDeqByteCnt(t_Handle h_FmPort, uint16_t deqByteCnt);
  71686. +
  71687. +/**************************************************************************//**
  71688. + @Function FM_PORT_ConfigBufferPrefixContent
  71689. +
  71690. + @Description Defines the structure, size and content of the application buffer.
  71691. + The prefix will
  71692. + In Tx ports, if 'passPrsResult', the application
  71693. + should set a value to their offsets in the prefix of
  71694. + the FM will save the first 'privDataSize', than,
  71695. + depending on 'passPrsResult' and 'passTimeStamp', copy parse result
  71696. + and timeStamp, and the packet itself (in this order), to the
  71697. + application buffer, and to offset.
  71698. + Calling this routine changes the buffer margins definitions
  71699. + in the internal driver data base from its default
  71700. + configuration: Data size: [DEFAULT_PORT_bufferPrefixContent_privDataSize]
  71701. + Pass Parser result: [DEFAULT_PORT_bufferPrefixContent_passPrsResult].
  71702. + Pass timestamp: [DEFAULT_PORT_bufferPrefixContent_passTimeStamp].
  71703. +
  71704. + May be used for all ports
  71705. +
  71706. + @Param[in] h_FmPort A handle to a FM Port module.
  71707. + @Param[in,out] p_FmBufferPrefixContent A structure of parameters describing the
  71708. + structure of the buffer.
  71709. + Out parameter: Start margin - offset
  71710. + of data from start of external buffer.
  71711. +
  71712. + @Return E_OK on success; Error code otherwise.
  71713. +
  71714. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71715. +*//***************************************************************************/
  71716. +t_Error FM_PORT_ConfigBufferPrefixContent(t_Handle h_FmPort,
  71717. + t_FmBufferPrefixContent *p_FmBufferPrefixContent);
  71718. +
  71719. +/**************************************************************************//**
  71720. + @Function FM_PORT_ConfigCheksumLastBytesIgnore
  71721. +
  71722. + @Description Calling this routine changes the number of checksum bytes to ignore
  71723. + parameter in the internal driver data base from its default configuration
  71724. + [DEFAULT_PORT_cheksumLastBytesIgnore]
  71725. +
  71726. + May be used by Tx & Rx ports only
  71727. +
  71728. + @Param[in] h_FmPort A handle to a FM Port module.
  71729. + @Param[in] cheksumLastBytesIgnore New value
  71730. +
  71731. + @Return E_OK on success; Error code otherwise.
  71732. +
  71733. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71734. +*//***************************************************************************/
  71735. +t_Error FM_PORT_ConfigCheksumLastBytesIgnore(t_Handle h_FmPort, uint8_t cheksumLastBytesIgnore);
  71736. +
  71737. +/**************************************************************************//**
  71738. + @Function FM_PORT_ConfigCutBytesFromEnd
  71739. +
  71740. + @Description Calling this routine changes the number of bytes to cut from a
  71741. + frame's end parameter in the internal driver data base
  71742. + from its default configuration [DEFAULT_PORT_cutBytesFromEnd]
  71743. + Note that if the result of (frame length before chop - cutBytesFromEnd) is
  71744. + less than 14 bytes, the chop operation is not executed.
  71745. +
  71746. + May be used for Rx ports only
  71747. +
  71748. + @Param[in] h_FmPort A handle to a FM Port module.
  71749. + @Param[in] cutBytesFromEnd New value
  71750. +
  71751. + @Return E_OK on success; Error code otherwise.
  71752. +
  71753. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71754. +*//***************************************************************************/
  71755. +t_Error FM_PORT_ConfigCutBytesFromEnd(t_Handle h_FmPort, uint8_t cutBytesFromEnd);
  71756. +
  71757. +/**************************************************************************//**
  71758. + @Function FM_PORT_ConfigPoolDepletion
  71759. +
  71760. + @Description Calling this routine enables pause frame generation depending on the
  71761. + depletion status of BM pools. It also defines the conditions to activate
  71762. + this functionality. By default, this functionality is disabled.
  71763. +
  71764. + May be used for Rx ports only
  71765. +
  71766. + @Param[in] h_FmPort A handle to a FM Port module.
  71767. + @Param[in] p_BufPoolDepletion A structure of pool depletion parameters
  71768. +
  71769. + @Return E_OK on success; Error code otherwise.
  71770. +
  71771. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71772. +*//***************************************************************************/
  71773. +t_Error FM_PORT_ConfigPoolDepletion(t_Handle h_FmPort, t_FmBufPoolDepletion *p_BufPoolDepletion);
  71774. +
  71775. +/**************************************************************************//**
  71776. + @Function FM_PORT_ConfigObservedPoolDepletion
  71777. +
  71778. + @Description Calling this routine enables a mechanism to stop port enqueue
  71779. + depending on the depletion status of selected BM pools.
  71780. + It also defines the conditions to activate
  71781. + this functionality. By default, this functionality is disabled.
  71782. +
  71783. + Note: Available for some chips only
  71784. +
  71785. + May be used for OP ports only
  71786. +
  71787. + @Param[in] h_FmPort A handle to a FM Port module.
  71788. + @Param[in] p_FmPortObservedBufPoolDepletion A structure of parameters for pool depletion.
  71789. +
  71790. + @Return E_OK on success; Error code otherwise.
  71791. +
  71792. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71793. +*//***************************************************************************/
  71794. +t_Error FM_PORT_ConfigObservedPoolDepletion(t_Handle h_FmPort,
  71795. + t_FmPortObservedBufPoolDepletion *p_FmPortObservedBufPoolDepletion);
  71796. +
  71797. +/**************************************************************************//**
  71798. + @Function FM_PORT_ConfigExtBufPools
  71799. +
  71800. + @Description This routine should be called for OP ports
  71801. + that internally use BM buffer pools. In such cases, e.g. for fragmentation and
  71802. + re-assembly, the FM needs new BM buffers. By calling this routine the user
  71803. + specifies the BM buffer pools that should be used.
  71804. +
  71805. + Note: Available for some chips only
  71806. +
  71807. + May be used for OP ports only
  71808. +
  71809. + @Param[in] h_FmPort A handle to a FM Port module.
  71810. + @Param[in] p_FmExtPools A structure of parameters for the external pools.
  71811. +
  71812. + @Return E_OK on success; Error code otherwise.
  71813. +
  71814. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71815. +*//***************************************************************************/
  71816. +t_Error FM_PORT_ConfigExtBufPools(t_Handle h_FmPort, t_FmExtPools *p_FmExtPools);
  71817. +
  71818. +/**************************************************************************//**
  71819. + @Function FM_PORT_ConfigBackupPools
  71820. +
  71821. + @Description Calling this routine allows the configuration of some of the BM pools
  71822. + defined for this port as backup pools.
  71823. + A pool configured to be a backup pool will be used only if all other
  71824. + enabled non-backup pools are depleted.
  71825. +
  71826. + May be used for Rx ports only
  71827. +
  71828. + @Param[in] h_FmPort A handle to a FM Port module.
  71829. + @Param[in] p_FmPortBackupBmPools An array of pool id's. All pools specified here will
  71830. + be defined as backup pools.
  71831. +
  71832. + @Return E_OK on success; Error code otherwise.
  71833. +
  71834. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71835. +*//***************************************************************************/
  71836. +t_Error FM_PORT_ConfigBackupPools(t_Handle h_FmPort, t_FmBackupBmPools *p_FmPortBackupBmPools);
  71837. +
  71838. +/**************************************************************************//**
  71839. + @Function FM_PORT_ConfigFrmDiscardOverride
  71840. +
  71841. + @Description Calling this routine changes the error frames destination parameter
  71842. + in the internal driver data base from its default configuration:
  71843. + override = [DEFAULT_PORT_frmDiscardOverride]
  71844. +
  71845. + May be used for Rx and OP ports only
  71846. +
  71847. + @Param[in] h_FmPort A handle to a FM Port module.
  71848. + @Param[in] override TRUE to override discarding of error frames and
  71849. + enqueueing them to error queue.
  71850. +
  71851. + @Return E_OK on success; Error code otherwise.
  71852. +
  71853. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71854. +*//***************************************************************************/
  71855. +t_Error FM_PORT_ConfigFrmDiscardOverride(t_Handle h_FmPort, bool override);
  71856. +
  71857. +/**************************************************************************//**
  71858. + @Function FM_PORT_ConfigErrorsToDiscard
  71859. +
  71860. + @Description Calling this routine changes the behaviour on error parameter
  71861. + in the internal driver data base from its default configuration:
  71862. + [DEFAULT_PORT_errorsToDiscard].
  71863. + If a requested error was previously defined as "ErrorsToEnqueue" it's
  71864. + definition will change and the frame will be discarded.
  71865. + Errors that were not defined either as "ErrorsToEnqueue" nor as
  71866. + "ErrorsToDiscard", will be forwarded to CPU.
  71867. +
  71868. + May be used for Rx and OP ports only
  71869. +
  71870. + @Param[in] h_FmPort A handle to a FM Port module.
  71871. + @Param[in] errs A list of errors to discard
  71872. +
  71873. + @Return E_OK on success; Error code otherwise.
  71874. +
  71875. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71876. +*//***************************************************************************/
  71877. +t_Error FM_PORT_ConfigErrorsToDiscard(t_Handle h_FmPort, fmPortFrameErrSelect_t errs);
  71878. +
  71879. +/**************************************************************************//**
  71880. + @Function FM_PORT_ConfigDmaSwapData
  71881. +
  71882. + @Description Calling this routine changes the DMA swap data aparameter
  71883. + in the internal driver data base from its default
  71884. + configuration [DEFAULT_PORT_dmaSwapData]
  71885. +
  71886. + May be used for all port types
  71887. +
  71888. + @Param[in] h_FmPort A handle to a FM Port module.
  71889. + @Param[in] swapData New selection
  71890. +
  71891. + @Return E_OK on success; Error code otherwise.
  71892. +
  71893. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71894. +*//***************************************************************************/
  71895. +t_Error FM_PORT_ConfigDmaSwapData(t_Handle h_FmPort, e_FmDmaSwapOption swapData);
  71896. +
  71897. +/**************************************************************************//**
  71898. + @Function FM_PORT_ConfigDmaIcCacheAttr
  71899. +
  71900. + @Description Calling this routine changes the internal context cache
  71901. + attribute parameter in the internal driver data base
  71902. + from its default configuration [DEFAULT_PORT_dmaIntContextCacheAttr]
  71903. +
  71904. + May be used for all port types
  71905. +
  71906. + @Param[in] h_FmPort A handle to a FM Port module.
  71907. + @Param[in] intContextCacheAttr New selection
  71908. +
  71909. + @Return E_OK on success; Error code otherwise.
  71910. +
  71911. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71912. +*//***************************************************************************/
  71913. +t_Error FM_PORT_ConfigDmaIcCacheAttr(t_Handle h_FmPort, e_FmDmaCacheOption intContextCacheAttr);
  71914. +
  71915. +/**************************************************************************//**
  71916. + @Function FM_PORT_ConfigDmaHdrAttr
  71917. +
  71918. + @Description Calling this routine changes the header cache
  71919. + attribute parameter in the internal driver data base
  71920. + from its default configuration [DEFAULT_PORT_dmaHeaderCacheAttr]
  71921. +
  71922. + May be used for all port types
  71923. +
  71924. + @Param[in] h_FmPort A handle to a FM Port module.
  71925. + @Param[in] headerCacheAttr New selection
  71926. +
  71927. + @Return E_OK on success; Error code otherwise.
  71928. +
  71929. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71930. +*//***************************************************************************/
  71931. +t_Error FM_PORT_ConfigDmaHdrAttr(t_Handle h_FmPort, e_FmDmaCacheOption headerCacheAttr);
  71932. +
  71933. +/**************************************************************************//**
  71934. + @Function FM_PORT_ConfigDmaScatterGatherAttr
  71935. +
  71936. + @Description Calling this routine changes the scatter gather cache
  71937. + attribute parameter in the internal driver data base
  71938. + from its default configuration [DEFAULT_PORT_dmaScatterGatherCacheAttr]
  71939. +
  71940. + May be used for all port types
  71941. +
  71942. + @Param[in] h_FmPort A handle to a FM Port module.
  71943. + @Param[in] scatterGatherCacheAttr New selection
  71944. +
  71945. + @Return E_OK on success; Error code otherwise.
  71946. +
  71947. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71948. +*//***************************************************************************/
  71949. +t_Error FM_PORT_ConfigDmaScatterGatherAttr(t_Handle h_FmPort, e_FmDmaCacheOption scatterGatherCacheAttr);
  71950. +
  71951. +/**************************************************************************//**
  71952. + @Function FM_PORT_ConfigDmaWriteOptimize
  71953. +
  71954. + @Description Calling this routine changes the write optimization
  71955. + parameter in the internal driver data base
  71956. + from its default configuration: By default optimize = [DEFAULT_PORT_dmaWriteOptimize].
  71957. + Note:
  71958. +
  71959. + 1. For head optimization, data alignment must be >= 16 (supported by default).
  71960. +
  71961. + 3. For tail optimization, note that the optimization is performed by extending the write transaction
  71962. + of the frame payload at the tail as needed to achieve optimal bus transfers, so that the last write
  71963. + is extended to be on 16/64 bytes aligned block (chip dependent).
  71964. +
  71965. + Relevant for non-Tx port types
  71966. +
  71967. + @Param[in] h_FmPort A handle to a FM Port module.
  71968. + @Param[in] optimize TRUE to enable optimization, FALSE for normal operation
  71969. +
  71970. + @Return E_OK on success; Error code otherwise.
  71971. +
  71972. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71973. +*//***************************************************************************/
  71974. +t_Error FM_PORT_ConfigDmaWriteOptimize(t_Handle h_FmPort, bool optimize);
  71975. +
  71976. +/**************************************************************************//**
  71977. + @Function FM_PORT_ConfigNoScatherGather
  71978. +
  71979. + @Description Calling this routine changes the noScatherGather parameter in internal driver data base
  71980. + from its default configuration.
  71981. +
  71982. + @Param[in] h_FmPort A handle to a FM Port module.
  71983. + @Param[in] noScatherGather (TRUE - frame is discarded if can not be stored in single buffer,
  71984. + FALSE - frame can be stored in scatter gather (S/G) format).
  71985. +
  71986. + @Return E_OK on success; Error code otherwise.
  71987. +
  71988. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  71989. +*//***************************************************************************/
  71990. +t_Error FM_PORT_ConfigNoScatherGather(t_Handle h_FmPort, bool noScatherGather);
  71991. +
  71992. +/**************************************************************************//**
  71993. + @Function FM_PORT_ConfigDfltColor
  71994. +
  71995. + @Description Calling this routine changes the internal default color parameter
  71996. + in the internal driver data base
  71997. + from its default configuration [DEFAULT_PORT_color]
  71998. +
  71999. + May be used for all port types
  72000. +
  72001. + @Param[in] h_FmPort A handle to a FM Port module.
  72002. + @Param[in] color New selection
  72003. +
  72004. + @Return E_OK on success; Error code otherwise.
  72005. +
  72006. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72007. +*//***************************************************************************/
  72008. +t_Error FM_PORT_ConfigDfltColor(t_Handle h_FmPort, e_FmPortColor color);
  72009. +
  72010. +/**************************************************************************//**
  72011. + @Function FM_PORT_ConfigSyncReq
  72012. +
  72013. + @Description Calling this routine changes the synchronization attribute parameter
  72014. + in the internal driver data base from its default configuration:
  72015. + syncReq = [DEFAULT_PORT_syncReq]
  72016. +
  72017. + May be used for all port types
  72018. +
  72019. + @Param[in] h_FmPort A handle to a FM Port module.
  72020. + @Param[in] syncReq TRUE to request synchronization, FALSE otherwize.
  72021. +
  72022. + @Return E_OK on success; Error code otherwise.
  72023. +
  72024. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72025. +*//***************************************************************************/
  72026. +t_Error FM_PORT_ConfigSyncReq(t_Handle h_FmPort, bool syncReq);
  72027. +
  72028. +/**************************************************************************//**
  72029. + @Function FM_PORT_ConfigForwardReuseIntContext
  72030. +
  72031. + @Description This routine is relevant for Rx ports that are routed to OP port.
  72032. + It changes the internal context reuse option in the internal
  72033. + driver data base from its default configuration:
  72034. + reuse = [DEFAULT_PORT_forwardIntContextReuse]
  72035. +
  72036. + May be used for Rx ports only
  72037. +
  72038. + @Param[in] h_FmPort A handle to a FM Port module.
  72039. + @Param[in] reuse TRUE to reuse internal context on frames
  72040. + forwarded to OP port.
  72041. +
  72042. + @Return E_OK on success; Error code otherwise.
  72043. +
  72044. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72045. +*//***************************************************************************/
  72046. +t_Error FM_PORT_ConfigForwardReuseIntContext(t_Handle h_FmPort, bool reuse);
  72047. +
  72048. +/**************************************************************************//**
  72049. + @Function FM_PORT_ConfigDontReleaseTxBufToBM
  72050. +
  72051. + @Description This routine should be called if no Tx confirmation
  72052. + is done, and yet buffers should not be released to the BM.
  72053. + Normally, buffers are returned using the Tx confirmation
  72054. + process. When Tx confirmation is not used (defFqid=0),
  72055. + buffers are typically released to the BM. This routine
  72056. + may be called to avoid this behavior and not release the
  72057. + buffers.
  72058. +
  72059. + May be used for Tx ports only
  72060. +
  72061. + @Param[in] h_FmPort A handle to a FM Port module.
  72062. +
  72063. + @Return E_OK on success; Error code otherwise.
  72064. +
  72065. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72066. +*//***************************************************************************/
  72067. +t_Error FM_PORT_ConfigDontReleaseTxBufToBM(t_Handle h_FmPort);
  72068. +
  72069. +/**************************************************************************//**
  72070. + @Function FM_PORT_ConfigIMMaxRxBufLength
  72071. +
  72072. + @Description Changes the maximum receive buffer length from its default
  72073. + configuration: Closest rounded down power of 2 value of the
  72074. + data buffer size.
  72075. +
  72076. + The maximum receive buffer length directly affects the structure
  72077. + of received frames (single- or multi-buffered) and the performance
  72078. + of both the FM and the driver.
  72079. +
  72080. + The selection between single- or multi-buffered frames should be
  72081. + done according to the characteristics of the specific application.
  72082. + The recommended mode is to use a single data buffer per packet,
  72083. + as this mode provides the best performance. However, the user can
  72084. + select to use multiple data buffers per packet.
  72085. +
  72086. + @Param[in] h_FmPort A handle to a FM Port module.
  72087. + @Param[in] newVal Maximum receive buffer length (in bytes).
  72088. +
  72089. + @Return E_OK on success; Error code otherwise.
  72090. +
  72091. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72092. + This routine is to be used only if Independent-Mode is enabled.
  72093. +*//***************************************************************************/
  72094. +t_Error FM_PORT_ConfigIMMaxRxBufLength(t_Handle h_FmPort, uint16_t newVal);
  72095. +
  72096. +/**************************************************************************//**
  72097. + @Function FM_PORT_ConfigIMRxBdRingLength
  72098. +
  72099. + @Description Changes the receive BD ring length from its default
  72100. + configuration:[DEFAULT_PORT_rxBdRingLength]
  72101. +
  72102. + @Param[in] h_FmPort A handle to a FM Port module.
  72103. + @Param[in] newVal The desired BD ring length.
  72104. +
  72105. + @Return E_OK on success; Error code otherwise.
  72106. +
  72107. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72108. + This routine is to be used only if Independent-Mode is enabled.
  72109. +*//***************************************************************************/
  72110. +t_Error FM_PORT_ConfigIMRxBdRingLength(t_Handle h_FmPort, uint16_t newVal);
  72111. +
  72112. +/**************************************************************************//**
  72113. + @Function FM_PORT_ConfigIMTxBdRingLength
  72114. +
  72115. + @Description Changes the transmit BD ring length from its default
  72116. + configuration:[DEFAULT_PORT_txBdRingLength]
  72117. +
  72118. + @Param[in] h_FmPort A handle to a FM Port module.
  72119. + @Param[in] newVal The desired BD ring length.
  72120. +
  72121. + @Return E_OK on success; Error code otherwise.
  72122. +
  72123. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72124. + This routine is to be used only if Independent-Mode is enabled.
  72125. +*//***************************************************************************/
  72126. +t_Error FM_PORT_ConfigIMTxBdRingLength(t_Handle h_FmPort, uint16_t newVal);
  72127. +
  72128. +/**************************************************************************//**
  72129. + @Function FM_PORT_ConfigIMFmanCtrlExternalStructsMemory
  72130. +
  72131. + @Description Configures memory partition and attributes for FMan-Controller
  72132. + data structures (e.g. BD rings).
  72133. + Calling this routine changes the internal driver data base
  72134. + from its default configuration
  72135. + [DEFAULT_PORT_ImfwExtStructsMemId, DEFAULT_PORT_ImfwExtStructsMemAttr].
  72136. +
  72137. + @Param[in] h_FmPort A handle to a FM Port module.
  72138. + @Param[in] memId Memory partition ID.
  72139. + @Param[in] memAttributes Memory attributes mask (a combination of MEMORY_ATTR_x flags).
  72140. +
  72141. + @Return E_OK on success; Error code otherwise.
  72142. +*//***************************************************************************/
  72143. +t_Error FM_PORT_ConfigIMFmanCtrlExternalStructsMemory(t_Handle h_FmPort,
  72144. + uint8_t memId,
  72145. + uint32_t memAttributes);
  72146. +
  72147. +/**************************************************************************//**
  72148. + @Function FM_PORT_ConfigIMPolling
  72149. +
  72150. + @Description Changes the Rx flow from interrupt driven (default) to polling.
  72151. +
  72152. + @Param[in] h_FmPort A handle to a FM Port module.
  72153. +
  72154. + @Return E_OK on success; Error code otherwise.
  72155. +
  72156. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72157. + This routine is to be used only if Independent-Mode is enabled.
  72158. +*//***************************************************************************/
  72159. +t_Error FM_PORT_ConfigIMPolling(t_Handle h_FmPort);
  72160. +
  72161. +/**************************************************************************//**
  72162. + @Function FM_PORT_ConfigMaxFrameLength
  72163. +
  72164. + @Description Changes the definition of the max size of frame that should be
  72165. + transmitted/received on this port from its default value [DEFAULT_PORT_maxFrameLength].
  72166. + This parameter is used for confirmation of the minimum Fifo
  72167. + size calculations and only for Tx ports or ports working in
  72168. + independent mode. This should be larger than the maximum possible
  72169. + MTU that will be used for this port (i.e. its MAC).
  72170. +
  72171. + @Param[in] h_FmPort A handle to a FM Port module.
  72172. + @Param[in] length Max size of frame
  72173. +
  72174. + @Return E_OK on success; Error code otherwise.
  72175. +
  72176. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72177. + This routine is to be used only if Independent-Mode is enabled.
  72178. +*//***************************************************************************/
  72179. +t_Error FM_PORT_ConfigMaxFrameLength(t_Handle h_FmPort, uint16_t length);
  72180. +
  72181. +/**************************************************************************//*
  72182. + @Function FM_PORT_ConfigTxFifoMinFillLevel
  72183. +
  72184. + @Description Calling this routine changes the fifo minimum
  72185. + fill level parameter in the internal driver data base
  72186. + from its default configuration [DEFAULT_PORT_txFifoMinFillLevel]
  72187. +
  72188. + May be used for Tx ports only
  72189. +
  72190. + @Param[in] h_FmPort A handle to a FM Port module.
  72191. + @Param[in] minFillLevel New value
  72192. +
  72193. + @Return E_OK on success; Error code otherwise.
  72194. +
  72195. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72196. +*//***************************************************************************/
  72197. +t_Error FM_PORT_ConfigTxFifoMinFillLevel(t_Handle h_FmPort, uint32_t minFillLevel);
  72198. +
  72199. +/**************************************************************************//*
  72200. + @Function FM_PORT_ConfigFifoDeqPipelineDepth
  72201. +
  72202. + @Description Calling this routine changes the fifo dequeue
  72203. + pipeline depth parameter in the internal driver data base
  72204. +
  72205. + from its default configuration: 1G ports: [DEFAULT_PORT_fifoDeqPipelineDepth_1G],
  72206. + 10G port: [DEFAULT_PORT_fifoDeqPipelineDepth_10G],
  72207. + OP port: [DEFAULT_PORT_fifoDeqPipelineDepth_OH]
  72208. +
  72209. + May be used for Tx/OP ports only
  72210. +
  72211. + @Param[in] h_FmPort A handle to a FM Port module.
  72212. + @Param[in] deqPipelineDepth New value
  72213. +
  72214. + @Return E_OK on success; Error code otherwise.
  72215. +
  72216. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72217. +*//***************************************************************************/
  72218. +t_Error FM_PORT_ConfigFifoDeqPipelineDepth(t_Handle h_FmPort, uint8_t deqPipelineDepth);
  72219. +
  72220. +/**************************************************************************//*
  72221. + @Function FM_PORT_ConfigTxFifoLowComfLevel
  72222. +
  72223. + @Description Calling this routine changes the fifo low comfort level
  72224. + parameter in internal driver data base
  72225. + from its default configuration [DEFAULT_PORT_txFifoLowComfLevel]
  72226. +
  72227. + May be used for Tx ports only
  72228. +
  72229. + @Param[in] h_FmPort A handle to a FM Port module.
  72230. + @Param[in] fifoLowComfLevel New value
  72231. +
  72232. + @Return E_OK on success; Error code otherwise.
  72233. +
  72234. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72235. +*//***************************************************************************/
  72236. +t_Error FM_PORT_ConfigTxFifoLowComfLevel(t_Handle h_FmPort, uint32_t fifoLowComfLevel);
  72237. +
  72238. +/**************************************************************************//*
  72239. + @Function FM_PORT_ConfigRxFifoThreshold
  72240. +
  72241. + @Description Calling this routine changes the threshold of the FIFO
  72242. + fill level parameter in the internal driver data base
  72243. + from its default configuration [DEFAULT_PORT_rxFifoThreshold]
  72244. +
  72245. + If the total number of buffers which are
  72246. + currently in use and associated with the
  72247. + specific RX port exceed this threshold, the
  72248. + BMI will signal the MAC to send a pause frame
  72249. + over the link.
  72250. +
  72251. + May be used for Rx ports only
  72252. +
  72253. + @Param[in] h_FmPort A handle to a FM Port module.
  72254. + @Param[in] fifoThreshold New value
  72255. +
  72256. + @Return E_OK on success; Error code otherwise.
  72257. +
  72258. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72259. +*//***************************************************************************/
  72260. +t_Error FM_PORT_ConfigRxFifoThreshold(t_Handle h_FmPort, uint32_t fifoThreshold);
  72261. +
  72262. +/**************************************************************************//*
  72263. + @Function FM_PORT_ConfigRxFifoPriElevationLevel
  72264. +
  72265. + @Description Calling this routine changes the priority elevation level
  72266. + parameter in the internal driver data base from its default
  72267. + configuration [DEFAULT_PORT_rxFifoPriElevationLevel]
  72268. +
  72269. + If the total number of buffers which are currently in use and
  72270. + associated with the specific RX port exceed the amount specified
  72271. + in priElevationLevel, BMI will signal the main FM's DMA to
  72272. + elevate the FM priority on the system bus.
  72273. +
  72274. + May be used for Rx ports only
  72275. +
  72276. + @Param[in] h_FmPort A handle to a FM Port module.
  72277. + @Param[in] priElevationLevel New value
  72278. +
  72279. + @Return E_OK on success; Error code otherwise.
  72280. +
  72281. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72282. +*//***************************************************************************/
  72283. +t_Error FM_PORT_ConfigRxFifoPriElevationLevel(t_Handle h_FmPort, uint32_t priElevationLevel);
  72284. +
  72285. +#ifdef FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
  72286. +/**************************************************************************//*
  72287. + @Function FM_PORT_ConfigBCBWorkaround
  72288. +
  72289. + @Description Configures BCB errata workaround.
  72290. +
  72291. + When BCB errata is applicable, the workaround is always
  72292. + performed by FM Controller. Thus, this functions doesn't
  72293. + actually enable errata workaround but rather allows driver
  72294. + to perform adjustments required due to errata workaround
  72295. + execution in FM controller.
  72296. +
  72297. + Applying BCB workaround also configures FM_PORT_FRM_ERR_PHYSICAL
  72298. + errors to be discarded. Thus FM_PORT_FRM_ERR_PHYSICAL can't be
  72299. + set by FM_PORT_SetErrorsRoute() function.
  72300. +
  72301. + @Param[in] h_FmPort A handle to a FM Port module.
  72302. +
  72303. + @Return E_OK on success; Error code otherwise.
  72304. +
  72305. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72306. +*//***************************************************************************/
  72307. +t_Error FM_PORT_ConfigBCBWorkaround(t_Handle h_FmPort);
  72308. +#endif /* FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 */
  72309. +
  72310. +#if (DPAA_VERSION >= 11)
  72311. +/**************************************************************************//*
  72312. + @Function FM_PORT_ConfigInternalBuffOffset
  72313. +
  72314. + @Description Configures internal buffer offset.
  72315. +
  72316. + May be used for Rx and OP ports only
  72317. +
  72318. + @Param[in] h_FmPort A handle to a FM Port module.
  72319. + @Param[in] val New value
  72320. +
  72321. + @Return E_OK on success; Error code otherwise.
  72322. +
  72323. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  72324. +*//***************************************************************************/
  72325. +t_Error FM_PORT_ConfigInternalBuffOffset(t_Handle h_FmPort, uint8_t val);
  72326. +#endif /* (DPAA_VERSION >= 11) */
  72327. +
  72328. +/** @} */ /* end of FM_PORT_advanced_init_grp group */
  72329. +/** @} */ /* end of FM_PORT_init_grp group */
  72330. +
  72331. +
  72332. +/**************************************************************************//**
  72333. + @Group FM_PORT_runtime_control_grp FM Port Runtime Control Unit
  72334. +
  72335. + @Description FM Port Runtime control unit API functions, definitions and enums.
  72336. +
  72337. + @{
  72338. +*//***************************************************************************/
  72339. +
  72340. +/**************************************************************************//**
  72341. + @Description enum for defining FM Port counters
  72342. +*//***************************************************************************/
  72343. +typedef enum e_FmPortCounters {
  72344. + e_FM_PORT_COUNTERS_CYCLE, /**< BMI performance counter */
  72345. + e_FM_PORT_COUNTERS_TASK_UTIL, /**< BMI performance counter */
  72346. + e_FM_PORT_COUNTERS_QUEUE_UTIL, /**< BMI performance counter */
  72347. + e_FM_PORT_COUNTERS_DMA_UTIL, /**< BMI performance counter */
  72348. + e_FM_PORT_COUNTERS_FIFO_UTIL, /**< BMI performance counter */
  72349. + e_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION, /**< BMI Rx only performance counter */
  72350. + e_FM_PORT_COUNTERS_FRAME, /**< BMI statistics counter */
  72351. + e_FM_PORT_COUNTERS_DISCARD_FRAME, /**< BMI statistics counter */
  72352. + e_FM_PORT_COUNTERS_DEALLOC_BUF, /**< BMI deallocate buffer statistics counter */
  72353. + e_FM_PORT_COUNTERS_RX_BAD_FRAME, /**< BMI Rx only statistics counter */
  72354. + e_FM_PORT_COUNTERS_RX_LARGE_FRAME, /**< BMI Rx only statistics counter */
  72355. + e_FM_PORT_COUNTERS_RX_FILTER_FRAME, /**< BMI Rx & OP only statistics counter */
  72356. + e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR, /**< BMI Rx, OP & HC only statistics counter */
  72357. + e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD, /**< BMI Rx, OP & HC statistics counter */
  72358. + e_FM_PORT_COUNTERS_PREPARE_TO_ENQUEUE_COUNTER, /**< BMI Rx, OP & HC only statistics counter */
  72359. + e_FM_PORT_COUNTERS_WRED_DISCARD, /**< BMI OP & HC only statistics counter */
  72360. + e_FM_PORT_COUNTERS_LENGTH_ERR, /**< BMI non-Rx statistics counter */
  72361. + e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT, /**< BMI non-Rx statistics counter */
  72362. + e_FM_PORT_COUNTERS_DEQ_TOTAL, /**< QMI total QM dequeues counter */
  72363. + e_FM_PORT_COUNTERS_ENQ_TOTAL, /**< QMI total QM enqueues counter */
  72364. + e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI counter */
  72365. + e_FM_PORT_COUNTERS_DEQ_CONFIRM /**< QMI counter */
  72366. +} e_FmPortCounters;
  72367. +
  72368. +typedef struct t_FmPortBmiStats {
  72369. + uint32_t cntCycle;
  72370. + uint32_t cntTaskUtil;
  72371. + uint32_t cntQueueUtil;
  72372. + uint32_t cntDmaUtil;
  72373. + uint32_t cntFifoUtil;
  72374. + uint32_t cntRxPauseActivation;
  72375. + uint32_t cntFrame;
  72376. + uint32_t cntDiscardFrame;
  72377. + uint32_t cntDeallocBuf;
  72378. + uint32_t cntRxBadFrame;
  72379. + uint32_t cntRxLargeFrame;
  72380. + uint32_t cntRxFilterFrame;
  72381. + uint32_t cntRxListDmaErr;
  72382. + uint32_t cntRxOutOfBuffersDiscard;
  72383. + uint32_t cntWredDiscard;
  72384. + uint32_t cntLengthErr;
  72385. + uint32_t cntUnsupportedFormat;
  72386. +} t_FmPortBmiStats;
  72387. +
  72388. +/**************************************************************************//**
  72389. + @Description Structure for Port id parameters.
  72390. + Fields commented 'IN' are passed by the port module to be used
  72391. + by the FM module.
  72392. + Fields commented 'OUT' will be filled by FM before returning to port.
  72393. +*//***************************************************************************/
  72394. +typedef struct t_FmPortCongestionGrps {
  72395. + uint16_t numOfCongestionGrpsToConsider; /**< The number of required CGs
  72396. + to define the size of the following array */
  72397. + uint8_t congestionGrpsToConsider[FM_PORT_NUM_OF_CONGESTION_GRPS];
  72398. + /**< An array of CG indexes;
  72399. + Note that the size of the array should be
  72400. + 'numOfCongestionGrpsToConsider'. */
  72401. +#if (DPAA_VERSION >= 11)
  72402. + bool pfcPrioritiesEn[FM_PORT_NUM_OF_CONGESTION_GRPS][FM_MAX_NUM_OF_PFC_PRIORITIES];
  72403. + /**< a matrix that represents the map between the CG ids
  72404. + defined in 'congestionGrpsToConsider' to the priorties
  72405. + mapping array. */
  72406. +#endif /* (DPAA_VERSION >= 11) */
  72407. +} t_FmPortCongestionGrps;
  72408. +
  72409. +/**************************************************************************//**
  72410. + @Description Structure for Deep Sleep Auto Response ARP Entry
  72411. +*//***************************************************************************/
  72412. +typedef struct t_FmPortDsarArpEntry
  72413. +{
  72414. + uint32_t ipAddress;
  72415. + uint8_t mac[6];
  72416. + bool isVlan;
  72417. + uint16_t vid;
  72418. +} t_FmPortDsarArpEntry;
  72419. +
  72420. +/**************************************************************************//**
  72421. + @Description Structure for Deep Sleep Auto Response ARP info
  72422. +*//***************************************************************************/
  72423. +typedef struct t_FmPortDsarArpInfo
  72424. +{
  72425. + uint8_t tableSize;
  72426. + t_FmPortDsarArpEntry *p_AutoResTable;
  72427. + bool enableConflictDetection; /* when TRUE Conflict Detection will be checked and wake the host if needed */
  72428. +} t_FmPortDsarArpInfo;
  72429. +
  72430. +/**************************************************************************//**
  72431. + @Description Structure for Deep Sleep Auto Response NDP Entry
  72432. +*//***************************************************************************/
  72433. +typedef struct t_FmPortDsarNdpEntry
  72434. +{
  72435. + uint32_t ipAddress[4];
  72436. + uint8_t mac[6];
  72437. + bool isVlan;
  72438. + uint16_t vid;
  72439. +} t_FmPortDsarNdpEntry;
  72440. +
  72441. +/**************************************************************************//**
  72442. + @Description Structure for Deep Sleep Auto Response NDP info
  72443. +*//***************************************************************************/
  72444. +typedef struct t_FmPortDsarNdpInfo
  72445. +{
  72446. + uint32_t multicastGroup;
  72447. +
  72448. + uint8_t tableSizeAssigned;
  72449. + t_FmPortDsarNdpEntry *p_AutoResTableAssigned; /* This list refer to solicitation IP addresses.
  72450. + Note that all IP adresses must be from the same multicast group.
  72451. + This will be checked and if not operation will fail. */
  72452. + uint8_t tableSizeTmp;
  72453. + t_FmPortDsarNdpEntry *p_AutoResTableTmp; /* This list refer to temp IP addresses.
  72454. + Note that all temp IP adresses must be from the same multicast group.
  72455. + This will be checked and if not operation will fail. */
  72456. +
  72457. + bool enableConflictDetection; /* when TRUE Conflict Detection will be checked and wake the host if needed */
  72458. +
  72459. +} t_FmPortDsarNdpInfo;
  72460. +
  72461. +/**************************************************************************//**
  72462. + @Description Structure for Deep Sleep Auto Response ICMPV4 info
  72463. +*//***************************************************************************/
  72464. +typedef struct t_FmPortDsarEchoIpv4Info
  72465. +{
  72466. + uint8_t tableSize;
  72467. + t_FmPortDsarArpEntry *p_AutoResTable;
  72468. +} t_FmPortDsarEchoIpv4Info;
  72469. +
  72470. +/**************************************************************************//**
  72471. + @Description Structure for Deep Sleep Auto Response ICMPV6 info
  72472. +*//***************************************************************************/
  72473. +typedef struct t_FmPortDsarEchoIpv6Info
  72474. +{
  72475. + uint8_t tableSize;
  72476. + t_FmPortDsarNdpEntry *p_AutoResTable;
  72477. +} t_FmPortDsarEchoIpv6Info;
  72478. +
  72479. +/**************************************************************************//**
  72480. +@Description Deep Sleep Auto Response SNMP OIDs table entry
  72481. +
  72482. +*//***************************************************************************/
  72483. +typedef struct {
  72484. + uint16_t oidSize;
  72485. + uint8_t *oidVal; /* only the oid string */
  72486. + uint16_t resSize;
  72487. + uint8_t *resVal; /* resVal will be the entire reply,
  72488. + i.e. "Type|Length|Value" */
  72489. +} t_FmPortDsarOidsEntry;
  72490. +
  72491. +/**************************************************************************//**
  72492. + @Description Deep Sleep Auto Response SNMP IPv4 Addresses Table Entry
  72493. + Refer to the FMan Controller spec for more details.
  72494. +*//***************************************************************************/
  72495. +typedef struct
  72496. +{
  72497. + uint32_t ipv4Addr; /*!< 32 bit IPv4 Address. */
  72498. + bool isVlan;
  72499. + uint16_t vid; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  72500. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  72501. +} t_FmPortDsarSnmpIpv4AddrTblEntry;
  72502. +
  72503. +/**************************************************************************//**
  72504. + @Description Deep Sleep Auto Response SNMP IPv6 Addresses Table Entry
  72505. + Refer to the FMan Controller spec for more details.
  72506. +*//***************************************************************************/
  72507. +typedef struct
  72508. +{
  72509. + uint32_t ipv6Addr[4]; /*!< 4 * 32 bit IPv6 Address. */
  72510. + bool isVlan;
  72511. + uint16_t vid; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  72512. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  72513. +} t_FmPortDsarSnmpIpv6AddrTblEntry;
  72514. +
  72515. +/**************************************************************************//**
  72516. + @Description Deep Sleep Auto Response SNMP Descriptor
  72517. +
  72518. +*//***************************************************************************/
  72519. +typedef struct
  72520. +{
  72521. + uint16_t control; /**< Control bits [0-15]. */
  72522. + uint16_t maxSnmpMsgLength; /**< Maximal allowed SNMP message length. */
  72523. + uint16_t numOfIpv4Addresses; /**< Number of entries in IPv4 addresses table. */
  72524. + uint16_t numOfIpv6Addresses; /**< Number of entries in IPv6 addresses table. */
  72525. + t_FmPortDsarSnmpIpv4AddrTblEntry *p_Ipv4AddrTbl; /**< Pointer to IPv4 addresses table. */
  72526. + t_FmPortDsarSnmpIpv6AddrTblEntry *p_Ipv6AddrTbl; /**< Pointer to IPv6 addresses table. */
  72527. + uint8_t *p_RdOnlyCommunityStr; /**< Pointer to the Read Only Community String. */
  72528. + uint8_t *p_RdWrCommunityStr; /**< Pointer to the Read Write Community String. */
  72529. + t_FmPortDsarOidsEntry *p_OidsTbl; /**< Pointer to OIDs table. */
  72530. + uint32_t oidsTblSize; /**< Number of entries in OIDs table. */
  72531. +} t_FmPortDsarSnmpInfo;
  72532. +
  72533. +/**************************************************************************//**
  72534. + @Description Structure for Deep Sleep Auto Response filtering Entry
  72535. +*//***************************************************************************/
  72536. +typedef struct t_FmPortDsarFilteringEntry
  72537. +{
  72538. + uint16_t srcPort;
  72539. + uint16_t dstPort;
  72540. + uint16_t srcPortMask;
  72541. + uint16_t dstPortMask;
  72542. +} t_FmPortDsarFilteringEntry;
  72543. +
  72544. +/**************************************************************************//**
  72545. + @Description Structure for Deep Sleep Auto Response filtering info
  72546. +*//***************************************************************************/
  72547. +typedef struct t_FmPortDsarFilteringInfo
  72548. +{
  72549. + /* IP protocol filtering parameters */
  72550. + uint8_t ipProtTableSize;
  72551. + uint8_t *p_IpProtTablePtr;
  72552. + bool ipProtPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped,
  72553. + hit will pass the packet to UDP/TCP filters if needed and if not
  72554. + to the classification tree. If the classification tree will pass
  72555. + the packet to a queue it will cause a wake interupt.
  72556. + When FALSE it the other way around. */
  72557. + /* UDP port filtering parameters */
  72558. + uint8_t udpPortsTableSize;
  72559. + t_FmPortDsarFilteringEntry *p_UdpPortsTablePtr;
  72560. + bool udpPortPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped,
  72561. + hit will pass the packet to classification tree.
  72562. + If the classification tree will pass the packet to a queue it
  72563. + will cause a wake interupt.
  72564. + When FALSE it the other way around. */
  72565. + /* TCP port filtering parameters */
  72566. + uint16_t tcpFlagsMask;
  72567. + uint8_t tcpPortsTableSize;
  72568. + t_FmPortDsarFilteringEntry *p_TcpPortsTablePtr;
  72569. + bool tcpPortPassOnHit; /* when TRUE, miss in the table will cause the packet to be droped,
  72570. + hit will pass the packet to classification tree.
  72571. + If the classification tree will pass the packet to a queue it
  72572. + will cause a wake interupt.
  72573. + When FALSE it the other way around. */
  72574. +} t_FmPortDsarFilteringInfo;
  72575. +
  72576. +/**************************************************************************//**
  72577. + @Description Structure for Deep Sleep Auto Response parameters
  72578. +*//***************************************************************************/
  72579. +typedef struct t_FmPortDsarParams
  72580. +{
  72581. + t_Handle h_FmPortTx;
  72582. + t_FmPortDsarArpInfo *p_AutoResArpInfo;
  72583. + t_FmPortDsarEchoIpv4Info *p_AutoResEchoIpv4Info;
  72584. + t_FmPortDsarNdpInfo *p_AutoResNdpInfo;
  72585. + t_FmPortDsarEchoIpv6Info *p_AutoResEchoIpv6Info;
  72586. + t_FmPortDsarSnmpInfo *p_AutoResSnmpInfo;
  72587. + t_FmPortDsarFilteringInfo *p_AutoResFilteringInfo;
  72588. +} t_FmPortDsarParams;
  72589. +
  72590. +/**************************************************************************//**
  72591. + @Function FM_PORT_EnterDsar
  72592. +
  72593. + @Description Enter Deep Sleep Auto Response mode.
  72594. + This function write the apropriate values to in the relevant
  72595. + tables in the MURAM.
  72596. +
  72597. + @Param[in] h_FmPortRx - FM PORT module descriptor
  72598. + @Param[in] params - Auto Response parameters
  72599. +
  72600. + @Return E_OK on success; Error code otherwise.
  72601. +
  72602. + @Cautions Allowed only following FM_PORT_Init().
  72603. +*//***************************************************************************/
  72604. +t_Error FM_PORT_EnterDsar(t_Handle h_FmPortRx, t_FmPortDsarParams *params);
  72605. +
  72606. +/**************************************************************************//**
  72607. + @Function FM_PORT_EnterDsarFinal
  72608. +
  72609. + @Description Enter Deep Sleep Auto Response mode.
  72610. + This function sets the Tx port in independent mode as needed
  72611. + and redirect the receive flow to go through the
  72612. + Dsar Fman-ctrl code
  72613. +
  72614. + @Param[in] h_DsarRxPort - FM Rx PORT module descriptor
  72615. + @Param[in] h_DsarTxPort - FM Tx PORT module descriptor
  72616. +
  72617. + @Return E_OK on success; Error code otherwise.
  72618. +
  72619. + @Cautions Allowed only following FM_PORT_Init().
  72620. +*//***************************************************************************/
  72621. +t_Error FM_PORT_EnterDsarFinal(t_Handle h_DsarRxPort, t_Handle h_DsarTxPort);
  72622. +
  72623. +/**************************************************************************//**
  72624. + @Function FM_PORT_ExitDsar
  72625. +
  72626. + @Description Exit Deep Sleep Auto Response mode.
  72627. + This function reverse the AR mode and put the ports back into
  72628. + their original wake mode
  72629. +
  72630. + @Param[in] h_FmPortRx - FM PORT Rx module descriptor
  72631. + @Param[in] h_FmPortTx - FM PORT Tx module descriptor
  72632. +
  72633. + @Return E_OK on success; Error code otherwise.
  72634. +
  72635. + @Cautions Allowed only following FM_PORT_EnterDsar().
  72636. +*//***************************************************************************/
  72637. +void FM_PORT_ExitDsar(t_Handle h_FmPortRx, t_Handle h_FmPortTx);
  72638. +
  72639. +/**************************************************************************//**
  72640. + @Function FM_PORT_IsInDsar
  72641. +
  72642. + @Description This function returns TRUE if the port was set as Auto Response
  72643. + and FALSE if not. Once Exit AR mode it will return FALSE as well
  72644. + until re-enabled once more.
  72645. +
  72646. + @Param[in] h_FmPort - FM PORT module descriptor
  72647. +
  72648. + @Return E_OK on success; Error code otherwise.
  72649. +*//***************************************************************************/
  72650. +bool FM_PORT_IsInDsar(t_Handle h_FmPort);
  72651. +
  72652. +typedef struct t_FmPortDsarStats
  72653. +{
  72654. + uint32_t arpArCnt;
  72655. + uint32_t echoIcmpv4ArCnt;
  72656. + uint32_t ndpArCnt;
  72657. + uint32_t echoIcmpv6ArCnt;
  72658. + uint32_t snmpGetCnt;
  72659. + uint32_t snmpGetNextCnt;
  72660. +} t_FmPortDsarStats;
  72661. +
  72662. +/**************************************************************************//**
  72663. + @Function FM_PORT_GetDsarStats
  72664. +
  72665. + @Description Return statistics for Deep Sleep Auto Response
  72666. +
  72667. + @Param[in] h_FmPortRx - FM PORT module descriptor
  72668. + @Param[out] stats - structure containing the statistics counters
  72669. +
  72670. + @Return E_OK on success; Error code otherwise.
  72671. +*//***************************************************************************/
  72672. +t_Error FM_PORT_GetDsarStats(t_Handle h_FmPortRx, t_FmPortDsarStats *stats);
  72673. +
  72674. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  72675. +/**************************************************************************//**
  72676. + @Function FM_PORT_DumpRegs
  72677. +
  72678. + @Description Dump all regs.
  72679. +
  72680. + Calling this routine invalidates the descriptor.
  72681. +
  72682. + @Param[in] h_FmPort - FM PORT module descriptor
  72683. +
  72684. + @Return E_OK on success; Error code otherwise.
  72685. +
  72686. + @Cautions Allowed only following FM_PORT_Init().
  72687. +*//***************************************************************************/
  72688. +t_Error FM_PORT_DumpRegs(t_Handle h_FmPort);
  72689. +#endif /* (defined(DEBUG_ERRORS) && ... */
  72690. +
  72691. +/**************************************************************************//**
  72692. + @Function FM_PORT_GetBufferDataOffset
  72693. +
  72694. + @Description Relevant for Rx ports.
  72695. + Returns the data offset from the beginning of the data buffer
  72696. +
  72697. + @Param[in] h_FmPort - FM PORT module descriptor
  72698. +
  72699. + @Return data offset.
  72700. +
  72701. + @Cautions Allowed only following FM_PORT_Init().
  72702. +*//***************************************************************************/
  72703. +uint32_t FM_PORT_GetBufferDataOffset(t_Handle h_FmPort);
  72704. +
  72705. +/**************************************************************************//**
  72706. + @Function FM_PORT_GetBufferICInfo
  72707. +
  72708. + @Description Returns the Internal Context offset from the beginning of the data buffer
  72709. +
  72710. + @Param[in] h_FmPort - FM PORT module descriptor
  72711. + @Param[in] p_Data - A pointer to the data buffer.
  72712. +
  72713. + @Return Internal context info pointer on success, NULL if 'allOtherInfo' was not
  72714. + configured for this port.
  72715. +
  72716. + @Cautions Allowed only following FM_PORT_Init().
  72717. +*//***************************************************************************/
  72718. +uint8_t * FM_PORT_GetBufferICInfo(t_Handle h_FmPort, char *p_Data);
  72719. +
  72720. +/**************************************************************************//**
  72721. + @Function FM_PORT_GetBufferPrsResult
  72722. +
  72723. + @Description Returns the pointer to the parse result in the data buffer.
  72724. + In Rx ports this is relevant after reception, if parse
  72725. + result is configured to be part of the data passed to the
  72726. + application. For non Rx ports it may be used to get the pointer
  72727. + of the area in the buffer where parse result should be
  72728. + initialized - if so configured.
  72729. + See FM_PORT_ConfigBufferPrefixContent for data buffer prefix
  72730. + configuration.
  72731. +
  72732. + @Param[in] h_FmPort - FM PORT module descriptor
  72733. + @Param[in] p_Data - A pointer to the data buffer.
  72734. +
  72735. + @Return Parse result pointer on success, NULL if parse result was not
  72736. + configured for this port.
  72737. +
  72738. + @Cautions Allowed only following FM_PORT_Init().
  72739. +*//***************************************************************************/
  72740. +t_FmPrsResult * FM_PORT_GetBufferPrsResult(t_Handle h_FmPort, char *p_Data);
  72741. +
  72742. +/**************************************************************************//**
  72743. + @Function FM_PORT_GetBufferTimeStamp
  72744. +
  72745. + @Description Returns the time stamp in the data buffer.
  72746. + Relevant for Rx ports for getting the buffer time stamp.
  72747. + See FM_PORT_ConfigBufferPrefixContent for data buffer prefix
  72748. + configuration.
  72749. +
  72750. + @Param[in] h_FmPort - FM PORT module descriptor
  72751. + @Param[in] p_Data - A pointer to the data buffer.
  72752. +
  72753. + @Return A pointer to the hash result on success, NULL otherwise.
  72754. +
  72755. + @Cautions Allowed only following FM_PORT_Init().
  72756. +*//***************************************************************************/
  72757. +uint64_t * FM_PORT_GetBufferTimeStamp(t_Handle h_FmPort, char *p_Data);
  72758. +
  72759. +/**************************************************************************//**
  72760. + @Function FM_PORT_GetBufferHashResult
  72761. +
  72762. + @Description Given a data buffer, on the condition that hash result was defined
  72763. + as a part of the buffer content (see FM_PORT_ConfigBufferPrefixContent)
  72764. + this routine will return the pointer to the hash result location in the
  72765. + buffer prefix.
  72766. +
  72767. + @Param[in] h_FmPort - FM PORT module descriptor
  72768. + @Param[in] p_Data - A pointer to the data buffer.
  72769. +
  72770. + @Return A pointer to the hash result on success, NULL otherwise.
  72771. +
  72772. + @Cautions Allowed only following FM_PORT_Init().
  72773. +*//***************************************************************************/
  72774. +uint8_t * FM_PORT_GetBufferHashResult(t_Handle h_FmPort, char *p_Data);
  72775. +
  72776. +/**************************************************************************//**
  72777. + @Function FM_PORT_Disable
  72778. +
  72779. + @Description Gracefully disable an FM port. The port will not start new tasks after all
  72780. + tasks associated with the port are terminated.
  72781. +
  72782. + @Param[in] h_FmPort A handle to a FM Port module.
  72783. +
  72784. + @Return E_OK on success; Error code otherwise.
  72785. +
  72786. + @Cautions Allowed only following FM_PORT_Init().
  72787. + This is a blocking routine, it returns after port is
  72788. + gracefully stopped, i.e. the port will not except new frames,
  72789. + but it will finish all frames or tasks which were already began
  72790. +*//***************************************************************************/
  72791. +t_Error FM_PORT_Disable(t_Handle h_FmPort);
  72792. +
  72793. +/**************************************************************************//**
  72794. + @Function FM_PORT_Enable
  72795. +
  72796. + @Description A runtime routine provided to allow disable/enable of port.
  72797. +
  72798. + @Param[in] h_FmPort A handle to a FM Port module.
  72799. +
  72800. + @Return E_OK on success; Error code otherwise.
  72801. +
  72802. + @Cautions Allowed only following FM_PORT_Init().
  72803. +*//***************************************************************************/
  72804. +t_Error FM_PORT_Enable(t_Handle h_FmPort);
  72805. +
  72806. +/**************************************************************************//**
  72807. + @Function FM_PORT_SetRateLimit
  72808. +
  72809. + @Description Calling this routine enables rate limit algorithm.
  72810. + By default, this functionality is disabled.
  72811. + Note that rate-limit mechanism uses the FM time stamp.
  72812. + The selected rate limit specified here would be
  72813. + rounded DOWN to the nearest 16M.
  72814. +
  72815. + May be used for Tx and OP ports only
  72816. +
  72817. + @Param[in] h_FmPort A handle to a FM Port module.
  72818. + @Param[in] p_RateLimit A structure of rate limit parameters
  72819. +
  72820. + @Return E_OK on success; Error code otherwise.
  72821. +
  72822. + @Cautions Allowed only following FM_PORT_Init().
  72823. + If rate limit is set on a port that need to send PFC frames,
  72824. + it might violate the stop transmit timing.
  72825. +*//***************************************************************************/
  72826. +t_Error FM_PORT_SetRateLimit(t_Handle h_FmPort, t_FmPortRateLimit *p_RateLimit);
  72827. +
  72828. +/**************************************************************************//**
  72829. + @Function FM_PORT_DeleteRateLimit
  72830. +
  72831. + @Description Calling this routine disables and clears rate limit
  72832. + initialization.
  72833. +
  72834. + May be used for Tx and OP ports only
  72835. +
  72836. + @Param[in] h_FmPort A handle to a FM Port module.
  72837. +
  72838. + @Return E_OK on success; Error code otherwise.
  72839. +
  72840. + @Cautions Allowed only following FM_PORT_Init().
  72841. +*//***************************************************************************/
  72842. +t_Error FM_PORT_DeleteRateLimit(t_Handle h_FmPort);
  72843. +
  72844. +/**************************************************************************//**
  72845. + @Function FM_PORT_SetPfcPrioritiesMappingToQmanWQ
  72846. +
  72847. + @Description Calling this routine maps each PFC received priority to the transmit WQ.
  72848. + This WQ will be blocked upon receiving a PFC frame with this priority.
  72849. +
  72850. + May be used for Tx ports only.
  72851. +
  72852. + @Param[in] h_FmPort A handle to a FM Port module.
  72853. + @Param[in] prio PFC priority (0-7).
  72854. + @Param[in] wq Work Queue (0-7).
  72855. +
  72856. + @Return E_OK on success; Error code otherwise.
  72857. +
  72858. + @Cautions Allowed only following FM_PORT_Init().
  72859. +*//***************************************************************************/
  72860. +t_Error FM_PORT_SetPfcPrioritiesMappingToQmanWQ(t_Handle h_FmPort, uint8_t prio, uint8_t wq);
  72861. +
  72862. +/**************************************************************************//**
  72863. + @Function FM_PORT_SetStatisticsCounters
  72864. +
  72865. + @Description Calling this routine enables/disables port's statistics counters.
  72866. + By default, counters are enabled.
  72867. +
  72868. + May be used for all port types
  72869. +
  72870. + @Param[in] h_FmPort A handle to a FM Port module.
  72871. + @Param[in] enable TRUE to enable, FALSE to disable.
  72872. +
  72873. + @Return E_OK on success; Error code otherwise.
  72874. +
  72875. + @Cautions Allowed only following FM_PORT_Init().
  72876. +*//***************************************************************************/
  72877. +t_Error FM_PORT_SetStatisticsCounters(t_Handle h_FmPort, bool enable);
  72878. +
  72879. +/**************************************************************************//**
  72880. + @Function FM_PORT_SetFrameQueueCounters
  72881. +
  72882. + @Description Calling this routine enables/disables port's enqueue/dequeue counters.
  72883. + By default, counters are enabled.
  72884. +
  72885. + May be used for all ports
  72886. +
  72887. + @Param[in] h_FmPort A handle to a FM Port module.
  72888. + @Param[in] enable TRUE to enable, FALSE to disable.
  72889. +
  72890. + @Return E_OK on success; Error code otherwise.
  72891. +
  72892. + @Cautions Allowed only following FM_PORT_Init().
  72893. +*//***************************************************************************/
  72894. +t_Error FM_PORT_SetFrameQueueCounters(t_Handle h_FmPort, bool enable);
  72895. +
  72896. +/**************************************************************************//**
  72897. + @Function FM_PORT_AnalyzePerformanceParams
  72898. +
  72899. + @Description User may call this routine to so the driver will analyze if the
  72900. + basic performance parameters are correct and also the driver may
  72901. + suggest of improvements; The basic parameters are FIFO sizes, number
  72902. + of DMAs and number of TNUMs for the port.
  72903. +
  72904. + May be used for all port types
  72905. +
  72906. + @Param[in] h_FmPort A handle to a FM Port module.
  72907. +
  72908. + @Return E_OK on success; Error code otherwise.
  72909. +
  72910. + @Cautions Allowed only following FM_PORT_Init().
  72911. +*//***************************************************************************/
  72912. +t_Error FM_PORT_AnalyzePerformanceParams(t_Handle h_FmPort);
  72913. +
  72914. +
  72915. +/**************************************************************************//**
  72916. + @Function FM_PORT_SetAllocBufCounter
  72917. +
  72918. + @Description Calling this routine enables/disables BM pool allocate
  72919. + buffer counters.
  72920. + By default, counters are enabled.
  72921. +
  72922. + May be used for Rx ports only
  72923. +
  72924. + @Param[in] h_FmPort A handle to a FM Port module.
  72925. + @Param[in] poolId BM pool id.
  72926. + @Param[in] enable TRUE to enable, FALSE to disable.
  72927. +
  72928. + @Return E_OK on success; Error code otherwise.
  72929. +
  72930. + @Cautions Allowed only following FM_PORT_Init().
  72931. +*//***************************************************************************/
  72932. +t_Error FM_PORT_SetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId, bool enable);
  72933. +
  72934. +/**************************************************************************//**
  72935. + @Function FM_PORT_GetBmiCounters
  72936. +
  72937. + @Description Read port's BMI stat counters and place them into
  72938. + a designated structure of counters.
  72939. +
  72940. + @Param[in] h_FmPort A handle to a FM Port module.
  72941. + @Param[out] p_BmiStats counters structure
  72942. +
  72943. + @Return E_OK on success; Error code otherwise.
  72944. +
  72945. + @Cautions Allowed only following FM_PORT_Init().
  72946. +*//***************************************************************************/
  72947. +t_Error FM_PORT_GetBmiCounters(t_Handle h_FmPort, t_FmPortBmiStats *p_BmiStats);
  72948. +
  72949. +/**************************************************************************//**
  72950. + @Function FM_PORT_GetCounter
  72951. +
  72952. + @Description Reads one of the FM PORT counters.
  72953. +
  72954. + @Param[in] h_FmPort A handle to a FM Port module.
  72955. + @Param[in] fmPortCounter The requested counter.
  72956. +
  72957. + @Return Counter's current value.
  72958. +
  72959. + @Cautions Allowed only following FM_PORT_Init().
  72960. + Note that it is user's responsibility to call this routine only
  72961. + for enabled counters, and there will be no indication if a
  72962. + disabled counter is accessed.
  72963. +*//***************************************************************************/
  72964. +uint32_t FM_PORT_GetCounter(t_Handle h_FmPort, e_FmPortCounters fmPortCounter);
  72965. +
  72966. +/**************************************************************************//**
  72967. + @Function FM_PORT_ModifyCounter
  72968. +
  72969. + @Description Sets a value to an enabled counter. Use "0" to reset the counter.
  72970. +
  72971. + @Param[in] h_FmPort A handle to a FM Port module.
  72972. + @Param[in] fmPortCounter The requested counter.
  72973. + @Param[in] value The requested value to be written into the counter.
  72974. +
  72975. + @Return E_OK on success; Error code otherwise.
  72976. +
  72977. + @Cautions Allowed only following FM_PORT_Init().
  72978. +*//***************************************************************************/
  72979. +t_Error FM_PORT_ModifyCounter(t_Handle h_FmPort, e_FmPortCounters fmPortCounter, uint32_t value);
  72980. +
  72981. +/**************************************************************************//**
  72982. + @Function FM_PORT_GetAllocBufCounter
  72983. +
  72984. + @Description Reads one of the FM PORT buffer counters.
  72985. +
  72986. + @Param[in] h_FmPort A handle to a FM Port module.
  72987. + @Param[in] poolId The requested pool.
  72988. +
  72989. + @Return Counter's current value.
  72990. +
  72991. + @Cautions Allowed only following FM_PORT_Init().
  72992. + Note that it is user's responsibility to call this routine only
  72993. + for enabled counters, and there will be no indication if a
  72994. + disabled counter is accessed.
  72995. +*//***************************************************************************/
  72996. +uint32_t FM_PORT_GetAllocBufCounter(t_Handle h_FmPort, uint8_t poolId);
  72997. +
  72998. +/**************************************************************************//**
  72999. + @Function FM_PORT_ModifyAllocBufCounter
  73000. +
  73001. + @Description Sets a value to an enabled counter. Use "0" to reset the counter.
  73002. +
  73003. + @Param[in] h_FmPort A handle to a FM Port module.
  73004. + @Param[in] poolId The requested pool.
  73005. + @Param[in] value The requested value to be written into the counter.
  73006. +
  73007. + @Return E_OK on success; Error code otherwise.
  73008. +
  73009. + @Cautions Allowed only following FM_PORT_Init().
  73010. +*//***************************************************************************/
  73011. +t_Error FM_PORT_ModifyAllocBufCounter(t_Handle h_FmPort, uint8_t poolId, uint32_t value);
  73012. +
  73013. +/**************************************************************************//**
  73014. + @Function FM_PORT_AddCongestionGrps
  73015. +
  73016. + @Description This routine effects the corresponding Tx port.
  73017. + It should be called in order to enable pause
  73018. + frame transmission in case of congestion in one or more
  73019. + of the congestion groups relevant to this port.
  73020. + Each call to this routine may add one or more congestion
  73021. + groups to be considered relevant to this port.
  73022. +
  73023. + May be used for Rx, or RX+OP ports only (depending on chip)
  73024. +
  73025. + @Param[in] h_FmPort A handle to a FM Port module.
  73026. + @Param[in] p_CongestionGrps A pointer to an array of congestion groups
  73027. + id's to consider.
  73028. +
  73029. + @Return E_OK on success; Error code otherwise.
  73030. +
  73031. + @Cautions Allowed only following FM_PORT_Init().
  73032. +*//***************************************************************************/
  73033. +t_Error FM_PORT_AddCongestionGrps(t_Handle h_FmPort, t_FmPortCongestionGrps *p_CongestionGrps);
  73034. +
  73035. +/**************************************************************************//**
  73036. + @Function FM_PORT_RemoveCongestionGrps
  73037. +
  73038. + @Description This routine effects the corresponding Tx port. It should be
  73039. + called when congestion groups were
  73040. + defined for this port and are no longer relevant, or pause
  73041. + frames transmitting is not required on their behalf.
  73042. + Each call to this routine may remove one or more congestion
  73043. + groups to be considered relevant to this port.
  73044. +
  73045. + May be used for Rx, or RX+OP ports only (depending on chip)
  73046. +
  73047. + @Param[in] h_FmPort A handle to a FM Port module.
  73048. + @Param[in] p_CongestionGrps A pointer to an array of congestion groups
  73049. + id's to consider.
  73050. +
  73051. + @Return E_OK on success; Error code otherwise.
  73052. +
  73053. + @Cautions Allowed only following FM_PORT_Init().
  73054. +*//***************************************************************************/
  73055. +t_Error FM_PORT_RemoveCongestionGrps(t_Handle h_FmPort, t_FmPortCongestionGrps *p_CongestionGrps);
  73056. +
  73057. +/**************************************************************************//**
  73058. + @Function FM_PORT_IsStalled
  73059. +
  73060. + @Description A routine for checking whether the specified port is stalled.
  73061. +
  73062. + @Param[in] h_FmPort A handle to a FM Port module.
  73063. +
  73064. + @Return TRUE if port is stalled, FALSE otherwize
  73065. +
  73066. + @Cautions Allowed only following FM_PORT_Init().
  73067. +*//***************************************************************************/
  73068. +bool FM_PORT_IsStalled(t_Handle h_FmPort);
  73069. +
  73070. +/**************************************************************************//**
  73071. + @Function FM_PORT_ReleaseStalled
  73072. +
  73073. + @Description This routine may be called in case the port was stalled and may
  73074. + now be released.
  73075. + Note that this routine is available only on older FMan revisions
  73076. + (FMan v2, DPAA v1.0 only).
  73077. +
  73078. + @Param[in] h_FmPort A handle to a FM Port module.
  73079. +
  73080. + @Return E_OK on success; Error code otherwise.
  73081. +
  73082. + @Cautions Allowed only following FM_PORT_Init().
  73083. +*//***************************************************************************/
  73084. +t_Error FM_PORT_ReleaseStalled(t_Handle h_FmPort);
  73085. +
  73086. +/**************************************************************************//**
  73087. + @Function FM_PORT_SetRxL4ChecksumVerify
  73088. +
  73089. + @Description This routine is relevant for Rx ports (1G and 10G). The routine
  73090. + set/clear the L3/L4 checksum verification (on RX side).
  73091. + Note that this takes affect only if hw-parser is enabled!
  73092. +
  73093. + @Param[in] h_FmPort A handle to a FM Port module.
  73094. + @Param[in] l4Checksum boolean indicates whether to do L3/L4 checksum
  73095. + on frames or not.
  73096. +
  73097. + @Return E_OK on success; Error code otherwise.
  73098. +
  73099. + @Cautions Allowed only following FM_PORT_Init().
  73100. +*//***************************************************************************/
  73101. +t_Error FM_PORT_SetRxL4ChecksumVerify(t_Handle h_FmPort, bool l4Checksum);
  73102. +
  73103. +/**************************************************************************//**
  73104. + @Function FM_PORT_SetErrorsRoute
  73105. +
  73106. + @Description Errors selected for this routine will cause a frame with that error
  73107. + to be enqueued to error queue.
  73108. + Errors not selected for this routine will cause a frame with that error
  73109. + to be enqueued to the one of the other port queues.
  73110. + By default all errors are defined to be enqueued to error queue.
  73111. + Errors that were configured to be discarded (at initialization)
  73112. + may not be selected here.
  73113. +
  73114. + May be used for Rx and OP ports only
  73115. +
  73116. + @Param[in] h_FmPort A handle to a FM Port module.
  73117. + @Param[in] errs A list of errors to enqueue to error queue
  73118. +
  73119. + @Return E_OK on success; Error code otherwise.
  73120. +
  73121. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  73122. +*//***************************************************************************/
  73123. +t_Error FM_PORT_SetErrorsRoute(t_Handle h_FmPort, fmPortFrameErrSelect_t errs);
  73124. +
  73125. +/**************************************************************************//**
  73126. + @Function FM_PORT_SetIMExceptions
  73127. +
  73128. + @Description Calling this routine enables/disables FM PORT interrupts.
  73129. +
  73130. + @Param[in] h_FmPort FM PORT module descriptor.
  73131. + @Param[in] exception The exception to be selected.
  73132. + @Param[in] enable TRUE to enable interrupt, FALSE to mask it.
  73133. +
  73134. + @Return E_OK on success; Error code otherwise.
  73135. +
  73136. + @Cautions Allowed only following FM_PORT_Init().
  73137. + This routine should NOT be called from guest-partition
  73138. + (i.e. guestId != NCSW_MASTER_ID)
  73139. +*//***************************************************************************/
  73140. +t_Error FM_PORT_SetIMExceptions(t_Handle h_FmPort, e_FmPortExceptions exception, bool enable);
  73141. +
  73142. +/**************************************************************************//*
  73143. + @Function FM_PORT_SetPerformanceCounters
  73144. +
  73145. + @Description Calling this routine enables/disables port's performance counters.
  73146. + By default, counters are enabled.
  73147. +
  73148. + May be used for all port types
  73149. +
  73150. + @Param[in] h_FmPort A handle to a FM Port module.
  73151. + @Param[in] enable TRUE to enable, FALSE to disable.
  73152. +
  73153. + @Return E_OK on success; Error code otherwise.
  73154. +
  73155. + @Cautions Allowed only following FM_PORT_Init().
  73156. +*//***************************************************************************/
  73157. +t_Error FM_PORT_SetPerformanceCounters(t_Handle h_FmPort, bool enable);
  73158. +
  73159. +/**************************************************************************//*
  73160. + @Function FM_PORT_SetPerformanceCountersParams
  73161. +
  73162. + @Description Calling this routine defines port's performance
  73163. + counters parameters.
  73164. +
  73165. + May be used for all port types
  73166. +
  73167. + @Param[in] h_FmPort A handle to a FM Port module.
  73168. + @Param[in] p_FmPortPerformanceCnt A pointer to a structure of performance
  73169. + counters parameters.
  73170. +
  73171. + @Return E_OK on success; Error code otherwise.
  73172. +
  73173. + @Cautions Allowed only following FM_PORT_Init().
  73174. +*//***************************************************************************/
  73175. +t_Error FM_PORT_SetPerformanceCountersParams(t_Handle h_FmPort, t_FmPortPerformanceCnt *p_FmPortPerformanceCnt);
  73176. +
  73177. +/**************************************************************************//**
  73178. + @Group FM_PORT_pcd_runtime_control_grp FM Port PCD Runtime Control Unit
  73179. +
  73180. + @Description FM Port PCD Runtime control unit API functions, definitions and enums.
  73181. +
  73182. + @{
  73183. +*//***************************************************************************/
  73184. +
  73185. +/**************************************************************************//**
  73186. + @Description A structure defining the KG scheme after the parser.
  73187. + This is relevant only to change scheme selection mode - from
  73188. + direct to indirect and vice versa, or when the scheme is selected directly,
  73189. + to select the scheme id.
  73190. +
  73191. +*//***************************************************************************/
  73192. +typedef struct t_FmPcdKgSchemeSelect {
  73193. + bool direct; /**< TRUE to use 'h_Scheme' directly, FALSE to use LCV. */
  73194. + t_Handle h_DirectScheme; /**< Scheme handle, selects the scheme after parser;
  73195. + Relevant only when 'direct' is TRUE. */
  73196. +} t_FmPcdKgSchemeSelect;
  73197. +
  73198. +/**************************************************************************//**
  73199. + @Description A structure of scheme parameters
  73200. +*//***************************************************************************/
  73201. +typedef struct t_FmPcdPortSchemesParams {
  73202. + uint8_t numOfSchemes; /**< Number of schemes for port to be bound to. */
  73203. + t_Handle h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES]; /**< Array of 'numOfSchemes' schemes for the
  73204. + port to be bound to */
  73205. +} t_FmPcdPortSchemesParams;
  73206. +
  73207. +/**************************************************************************//**
  73208. + @Description Union for defining port protocol parameters for parser
  73209. +*//***************************************************************************/
  73210. +typedef union u_FmPcdHdrPrsOpts {
  73211. + /* MPLS */
  73212. + struct {
  73213. + bool labelInterpretationEnable; /**< When this bit is set, the last MPLS label will be
  73214. + interpreted as described in HW spec table. When the bit
  73215. + is cleared, the parser will advance to MPLS next parse */
  73216. + e_NetHeaderType nextParse; /**< must be equal or higher than IPv4 */
  73217. + } mplsPrsOptions;
  73218. + /* VLAN */
  73219. + struct {
  73220. + uint16_t tagProtocolId1; /**< User defined Tag Protocol Identifier, to be recognized
  73221. + on VLAN TAG on top of 0x8100 and 0x88A8 */
  73222. + uint16_t tagProtocolId2; /**< User defined Tag Protocol Identifier, to be recognized
  73223. + on VLAN TAG on top of 0x8100 and 0x88A8 */
  73224. + } vlanPrsOptions;
  73225. + /* PPP */
  73226. + struct{
  73227. + bool enableMTUCheck; /**< Check validity of MTU according to RFC2516 */
  73228. + } pppoePrsOptions;
  73229. +
  73230. + /* IPV6 */
  73231. + struct{
  73232. + bool routingHdrEnable; /**< TRUE to enable routing header, otherwise ignore */
  73233. + } ipv6PrsOptions;
  73234. +
  73235. + /* UDP */
  73236. + struct{
  73237. + bool padIgnoreChecksum; /**< TRUE to ignore pad in checksum */
  73238. + } udpPrsOptions;
  73239. +
  73240. + /* TCP */
  73241. + struct {
  73242. + bool padIgnoreChecksum; /**< TRUE to ignore pad in checksum */
  73243. + } tcpPrsOptions;
  73244. +} u_FmPcdHdrPrsOpts;
  73245. +
  73246. +/**************************************************************************//**
  73247. + @Description A structure for defining each header for the parser
  73248. +*//***************************************************************************/
  73249. +typedef struct t_FmPcdPrsAdditionalHdrParams {
  73250. + e_NetHeaderType hdr; /**< Selected header; use HEADER_TYPE_NONE
  73251. + to indicate that sw parser is to run first
  73252. + (before HW parser, and independent of the
  73253. + existence of any protocol), in this case,
  73254. + swPrsEnable must be set, and all other
  73255. + parameters are irrelevant. */
  73256. + bool errDisable; /**< TRUE to disable error indication */
  73257. + bool swPrsEnable; /**< Enable jump to SW parser when this
  73258. + header is recognized by the HW parser. */
  73259. + uint8_t indexPerHdr; /**< Normally 0, if more than one sw parser
  73260. + attachments exists for the same header,
  73261. + (in the main sw parser code) use this
  73262. + index to distinguish between them. */
  73263. + bool usePrsOpts; /**< TRUE to use parser options. */
  73264. + u_FmPcdHdrPrsOpts prsOpts; /**< A union according to header type,
  73265. + defining the parser options selected.*/
  73266. +} t_FmPcdPrsAdditionalHdrParams;
  73267. +
  73268. +/**************************************************************************//**
  73269. + @Description struct for defining port PCD parameters
  73270. +*//***************************************************************************/
  73271. +typedef struct t_FmPortPcdPrsParams {
  73272. + uint8_t prsResultPrivateInfo; /**< The private info provides a method of inserting
  73273. + port information into the parser result. This information
  73274. + may be extracted by Keygen and be used for frames
  73275. + distribution when a per-port distinction is required,
  73276. + it may also be used as a port logical id for analyzing
  73277. + incoming frames. */
  73278. + uint8_t parsingOffset; /**< Number of bytes from beginning of packet to start parsing */
  73279. + e_NetHeaderType firstPrsHdr; /**< The type of the first header expected at 'parsingOffset' */
  73280. + bool includeInPrsStatistics; /**< TRUE to include this port in the parser statistics;
  73281. + NOTE: this field is not valid when the FM is in "guest" mode
  73282. + and IPC is not available. */
  73283. + uint8_t numOfHdrsWithAdditionalParams; /**< Normally 0, some headers may get
  73284. + special parameters */
  73285. + t_FmPcdPrsAdditionalHdrParams additionalParams[FM_PCD_PRS_NUM_OF_HDRS];
  73286. + /**< 'numOfHdrsWithAdditionalParams' structures
  73287. + of additional parameters
  73288. + for each header that requires them */
  73289. + bool setVlanTpid1; /**< TRUE to configure user selection of Ethertype to
  73290. + indicate a VLAN tag (in addition to the TPID values
  73291. + 0x8100 and 0x88A8). */
  73292. + uint16_t vlanTpid1; /**< extra tag to use if setVlanTpid1=TRUE. */
  73293. + bool setVlanTpid2; /**< TRUE to configure user selection of Ethertype to
  73294. + indicate a VLAN tag (in addition to the TPID values
  73295. + 0x8100 and 0x88A8). */
  73296. + uint16_t vlanTpid2; /**< extra tag to use if setVlanTpid1=TRUE. */
  73297. +} t_FmPortPcdPrsParams;
  73298. +
  73299. +/**************************************************************************//**
  73300. + @Description struct for defining coarse alassification parameters
  73301. +*//***************************************************************************/
  73302. +typedef struct t_FmPortPcdCcParams {
  73303. + t_Handle h_CcTree; /**< A handle to a CC tree */
  73304. +} t_FmPortPcdCcParams;
  73305. +
  73306. +/**************************************************************************//**
  73307. + @Description struct for defining keygen parameters
  73308. +*//***************************************************************************/
  73309. +typedef struct t_FmPortPcdKgParams {
  73310. + uint8_t numOfSchemes; /**< Number of schemes for port to be bound to. */
  73311. + t_Handle h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES];
  73312. + /**< Array of 'numOfSchemes' schemes handles for the
  73313. + port to be bound to */
  73314. + bool directScheme; /**< TRUE for going from parser to a specific scheme,
  73315. + regardless of parser result */
  73316. + t_Handle h_DirectScheme; /**< relevant only if direct == TRUE, Scheme handle,
  73317. + as returned by FM_PCD_KgSetScheme */
  73318. +} t_FmPortPcdKgParams;
  73319. +
  73320. +/**************************************************************************//**
  73321. + @Description struct for defining policer parameters
  73322. +*//***************************************************************************/
  73323. +typedef struct t_FmPortPcdPlcrParams {
  73324. + t_Handle h_Profile; /**< Selected profile handle */
  73325. +} t_FmPortPcdPlcrParams;
  73326. +
  73327. +/**************************************************************************//**
  73328. + @Description struct for defining port PCD parameters
  73329. +*//***************************************************************************/
  73330. +typedef struct t_FmPortPcdParams {
  73331. + e_FmPortPcdSupport pcdSupport; /**< Relevant for Rx and offline ports only.
  73332. + Describes the active PCD engines for this port. */
  73333. + t_Handle h_NetEnv; /**< HL Unused in PLCR only mode */
  73334. + t_FmPortPcdPrsParams *p_PrsParams; /**< Parser parameters for this port */
  73335. + t_FmPortPcdCcParams *p_CcParams; /**< Coarse classification parameters for this port */
  73336. + t_FmPortPcdKgParams *p_KgParams; /**< Keygen parameters for this port */
  73337. + t_FmPortPcdPlcrParams *p_PlcrParams; /**< Policer parameters for this port; Relevant for one of
  73338. + following cases:
  73339. + e_FM_PORT_PCD_SUPPORT_PLCR_ONLY or
  73340. + e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR were selected,
  73341. + or if any flow uses a KG scheme were policer
  73342. + profile is not generated
  73343. + ('bypassPlcrProfileGeneration selected'). */
  73344. + t_Handle h_IpReassemblyManip; /**< IP Reassembly manipulation */
  73345. +#if (DPAA_VERSION >= 11)
  73346. + t_Handle h_CapwapReassemblyManip;/**< CAPWAP Reassembly manipulation */
  73347. +#endif /* (DPAA_VERSION >= 11) */
  73348. +} t_FmPortPcdParams;
  73349. +
  73350. +/**************************************************************************//**
  73351. + @Description A structure for defining the Parser starting point
  73352. +*//***************************************************************************/
  73353. +typedef struct t_FmPcdPrsStart {
  73354. + uint8_t parsingOffset; /**< Number of bytes from beginning of packet to
  73355. + start parsing */
  73356. + e_NetHeaderType firstPrsHdr; /**< The type of the first header axpected at
  73357. + 'parsingOffset' */
  73358. +} t_FmPcdPrsStart;
  73359. +
  73360. +#if (DPAA_VERSION >= 11)
  73361. +/**************************************************************************//**
  73362. + @Description struct for defining external buffer margins
  73363. +*//***************************************************************************/
  73364. +typedef struct t_FmPortVSPAllocParams {
  73365. + uint8_t numOfProfiles; /**< Number of Virtual Storage Profiles; must be a power of 2 */
  73366. + uint8_t dfltRelativeId; /**< The default Virtual-Storage-Profile-id dedicated to Rx/OP port
  73367. + The same default Virtual-Storage-Profile-id will be for coupled Tx port
  73368. + if relevant function called for Rx port */
  73369. + t_Handle h_FmTxPort; /**< Handle to coupled Tx Port; not relevant for OP port. */
  73370. +} t_FmPortVSPAllocParams;
  73371. +#endif /* (DPAA_VERSION >= 11) */
  73372. +
  73373. +
  73374. +/**************************************************************************//**
  73375. + @Function FM_PORT_SetPCD
  73376. +
  73377. + @Description Calling this routine defines the port's PCD configuration.
  73378. + It changes it from its default configuration which is PCD
  73379. + disabled (BMI to BMI) and configures it according to the passed
  73380. + parameters.
  73381. +
  73382. + May be used for Rx and OP ports only
  73383. +
  73384. + @Param[in] h_FmPort A handle to a FM Port module.
  73385. + @Param[in] p_FmPortPcd A Structure of parameters defining the port's PCD
  73386. + configuration.
  73387. +
  73388. + @Return E_OK on success; Error code otherwise.
  73389. +
  73390. + @Cautions Allowed only following FM_PORT_Init().
  73391. +*//***************************************************************************/
  73392. +t_Error FM_PORT_SetPCD(t_Handle h_FmPort, t_FmPortPcdParams *p_FmPortPcd);
  73393. +
  73394. +/**************************************************************************//**
  73395. + @Function FM_PORT_DeletePCD
  73396. +
  73397. + @Description Calling this routine releases the port's PCD configuration.
  73398. + The port returns to its default configuration which is PCD
  73399. + disabled (BMI to BMI) and all PCD configuration is removed.
  73400. +
  73401. + May be used for Rx and OP ports which are
  73402. + in PCD mode only
  73403. +
  73404. + @Param[in] h_FmPort A handle to a FM Port module.
  73405. +
  73406. + @Return E_OK on success; Error code otherwise.
  73407. +
  73408. + @Cautions Allowed only following FM_PORT_Init().
  73409. +*//***************************************************************************/
  73410. +t_Error FM_PORT_DeletePCD(t_Handle h_FmPort);
  73411. +
  73412. +/**************************************************************************//**
  73413. + @Function FM_PORT_AttachPCD
  73414. +
  73415. + @Description This routine may be called after FM_PORT_DetachPCD was called,
  73416. + to return to the originally configured PCD support flow.
  73417. + The couple of routines are used to allow PCD configuration changes
  73418. + that demand that PCD will not be used while changes take place.
  73419. +
  73420. + May be used for Rx and OP ports which are
  73421. + in PCD mode only
  73422. +
  73423. + @Param[in] h_FmPort A handle to a FM Port module.
  73424. +
  73425. + @Return E_OK on success; Error code otherwise.
  73426. +
  73427. + @Cautions Allowed only following FM_PORT_Init().
  73428. +*//***************************************************************************/
  73429. +t_Error FM_PORT_AttachPCD(t_Handle h_FmPort);
  73430. +
  73431. +/**************************************************************************//**
  73432. + @Function FM_PORT_DetachPCD
  73433. +
  73434. + @Description Calling this routine detaches the port from its PCD functionality.
  73435. + The port returns to its default flow which is BMI to BMI.
  73436. +
  73437. + May be used for Rx and OP ports which are
  73438. + in PCD mode only
  73439. +
  73440. + @Param[in] h_FmPort A handle to a FM Port module.
  73441. +
  73442. + @Return E_OK on success; Error code otherwise.
  73443. +
  73444. + @Cautions Allowed only following FM_PORT_AttachPCD().
  73445. +*//***************************************************************************/
  73446. +t_Error FM_PORT_DetachPCD(t_Handle h_FmPort);
  73447. +
  73448. +/**************************************************************************//**
  73449. + @Function FM_PORT_PcdPlcrAllocProfiles
  73450. +
  73451. + @Description This routine may be called only for ports that use the Policer in
  73452. + order to allocate private policer profiles.
  73453. +
  73454. + @Param[in] h_FmPort A handle to a FM Port module.
  73455. + @Param[in] numOfProfiles The number of required policer profiles
  73456. +
  73457. + @Return E_OK on success; Error code otherwise.
  73458. +
  73459. + @Cautions Allowed only following FM_PORT_Init() and FM_PCD_Init(),
  73460. + and before FM_PORT_SetPCD().
  73461. +*//***************************************************************************/
  73462. +t_Error FM_PORT_PcdPlcrAllocProfiles(t_Handle h_FmPort, uint16_t numOfProfiles);
  73463. +
  73464. +/**************************************************************************//**
  73465. + @Function FM_PORT_PcdPlcrFreeProfiles
  73466. +
  73467. + @Description This routine should be called for freeing private policer profiles.
  73468. +
  73469. + @Param[in] h_FmPort A handle to a FM Port module.
  73470. +
  73471. + @Return E_OK on success; Error code otherwise.
  73472. +
  73473. + @Cautions Allowed only following FM_PORT_Init() and FM_PCD_Init(),
  73474. + and before FM_PORT_SetPCD().
  73475. +*//***************************************************************************/
  73476. +t_Error FM_PORT_PcdPlcrFreeProfiles(t_Handle h_FmPort);
  73477. +
  73478. +#if (DPAA_VERSION >= 11)
  73479. +/**************************************************************************//**
  73480. + @Function FM_PORT_VSPAlloc
  73481. +
  73482. + @Description This routine allocated VSPs per port and forces the port to work
  73483. + in VSP mode. Note that the port is initialized by default with the
  73484. + physical-storage-profile only.
  73485. +
  73486. + @Param[in] h_FmPort A handle to a FM Port module.
  73487. + @Param[in] p_Params A structure of parameters for allocation VSP's per port
  73488. +
  73489. + @Return E_OK on success; Error code otherwise.
  73490. +
  73491. + @Cautions Allowed only following FM_PORT_Init(), and before FM_PORT_SetPCD()
  73492. + and also before FM_PORT_Enable(); i.e. the port should be disabled.
  73493. +*//***************************************************************************/
  73494. +t_Error FM_PORT_VSPAlloc(t_Handle h_FmPort, t_FmPortVSPAllocParams *p_Params);
  73495. +#endif /* (DPAA_VERSION >= 11) */
  73496. +
  73497. +/**************************************************************************//**
  73498. + @Function FM_PORT_PcdKgModifyInitialScheme
  73499. +
  73500. + @Description This routine may be called only for ports that use the keygen in
  73501. + order to change the initial scheme frame should be routed to.
  73502. + The change may be of a scheme id (in case of direct mode),
  73503. + from direct to indirect, or from indirect to direct - specifying the scheme id.
  73504. +
  73505. + @Param[in] h_FmPort A handle to a FM Port module.
  73506. + @Param[in] p_FmPcdKgScheme A structure of parameters for defining whether
  73507. + a scheme is direct/indirect, and if direct - scheme id.
  73508. +
  73509. + @Return E_OK on success; Error code otherwise.
  73510. +
  73511. + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
  73512. +*//***************************************************************************/
  73513. +t_Error FM_PORT_PcdKgModifyInitialScheme (t_Handle h_FmPort, t_FmPcdKgSchemeSelect *p_FmPcdKgScheme);
  73514. +
  73515. +/**************************************************************************//**
  73516. + @Function FM_PORT_PcdPlcrModifyInitialProfile
  73517. +
  73518. + @Description This routine may be called for ports with flows
  73519. + e_FM_PORT_PCD_SUPPORT_PLCR_ONLY or e_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR
  73520. + only, to change the initial Policer profile frame should be
  73521. + routed to. The change may be of a profile and/or absolute/direct
  73522. + mode selection.
  73523. +
  73524. + @Param[in] h_FmPort A handle to a FM Port module.
  73525. + @Param[in] h_Profile Policer profile handle
  73526. +
  73527. + @Return E_OK on success; Error code otherwise.
  73528. +
  73529. + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
  73530. +*//***************************************************************************/
  73531. +t_Error FM_PORT_PcdPlcrModifyInitialProfile (t_Handle h_FmPort, t_Handle h_Profile);
  73532. +
  73533. +/**************************************************************************//**
  73534. + @Function FM_PORT_PcdCcModifyTree
  73535. +
  73536. + @Description This routine may be called for ports that use coarse classification tree
  73537. + if the user wishes to replace the tree. The routine may not be called while port
  73538. + receives packets using the PCD functionalities, therefor port must be first detached
  73539. + from the PCD, only than the routine may be called, and than port be attached to PCD again.
  73540. +
  73541. + @Param[in] h_FmPort A handle to a FM Port module.
  73542. + @Param[in] h_CcTree A CC tree that was already built. The tree id as returned from
  73543. + the BuildTree routine.
  73544. +
  73545. + @Return E_OK on success; Error code otherwise.
  73546. +
  73547. + @Cautions Allowed only following FM_PORT_Init(), FM_PORT_SetPCD() and FM_PORT_DetachPCD()
  73548. +*//***************************************************************************/
  73549. +t_Error FM_PORT_PcdCcModifyTree (t_Handle h_FmPort, t_Handle h_CcTree);
  73550. +
  73551. +/**************************************************************************//**
  73552. + @Function FM_PORT_PcdKgBindSchemes
  73553. +
  73554. + @Description These routines may be called for adding more schemes for the
  73555. + port to be bound to. The selected schemes are not added,
  73556. + just this specific port starts using them.
  73557. +
  73558. + @Param[in] h_FmPort A handle to a FM Port module.
  73559. + @Param[in] p_PortScheme A structure defining the list of schemes to be added.
  73560. +
  73561. + @Return E_OK on success; Error code otherwise.
  73562. +
  73563. + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
  73564. +*//***************************************************************************/
  73565. +t_Error FM_PORT_PcdKgBindSchemes (t_Handle h_FmPort, t_FmPcdPortSchemesParams *p_PortScheme);
  73566. +
  73567. +/**************************************************************************//**
  73568. + @Function FM_PORT_PcdKgUnbindSchemes
  73569. +
  73570. + @Description These routines may be called for adding more schemes for the
  73571. + port to be bound to. The selected schemes are not removed or invalidated,
  73572. + just this specific port stops using them.
  73573. +
  73574. + @Param[in] h_FmPort A handle to a FM Port module.
  73575. + @Param[in] p_PortScheme A structure defining the list of schemes to be added.
  73576. +
  73577. + @Return E_OK on success; Error code otherwise.
  73578. +
  73579. + @Cautions Allowed only following FM_PORT_Init() and FM_PORT_SetPCD().
  73580. +*//***************************************************************************/
  73581. +t_Error FM_PORT_PcdKgUnbindSchemes (t_Handle h_FmPort, t_FmPcdPortSchemesParams *p_PortScheme);
  73582. +
  73583. +/**************************************************************************//**
  73584. + @Function FM_PORT_GetIPv4OptionsCount
  73585. +
  73586. + @Description TODO
  73587. +
  73588. + @Param[in] h_FmPort A handle to a FM Port module.
  73589. + @Param[out] p_Ipv4OptionsCount will hold the counter value
  73590. +
  73591. + @Return E_OK on success; Error code otherwise.
  73592. +
  73593. + @Cautions Allowed only following FM_PORT_Init()
  73594. +*//***************************************************************************/
  73595. +t_Error FM_PORT_GetIPv4OptionsCount(t_Handle h_FmPort, uint32_t *p_Ipv4OptionsCount);
  73596. +
  73597. +/** @} */ /* end of FM_PORT_pcd_runtime_control_grp group */
  73598. +/** @} */ /* end of FM_PORT_runtime_control_grp group */
  73599. +
  73600. +
  73601. +/**************************************************************************//**
  73602. + @Group FM_PORT_runtime_data_grp FM Port Runtime Data-path Unit
  73603. +
  73604. + @Description FM Port Runtime data unit API functions, definitions and enums.
  73605. + This API is valid only if working in Independent-Mode.
  73606. +
  73607. + @{
  73608. +*//***************************************************************************/
  73609. +
  73610. +/**************************************************************************//**
  73611. + @Function FM_PORT_ImTx
  73612. +
  73613. + @Description Tx function, called to transmit a data buffer on the port.
  73614. +
  73615. + @Param[in] h_FmPort A handle to a FM Port module.
  73616. + @Param[in] p_Data A pointer to an LCP data buffer.
  73617. + @Param[in] length Size of data for transmission.
  73618. + @Param[in] lastBuffer Buffer position - TRUE for the last buffer
  73619. + of a frame, including a single buffer frame
  73620. + @Param[in] h_BufContext A handle of the user acossiated with this buffer
  73621. +
  73622. + @Return E_OK on success; Error code otherwise.
  73623. +
  73624. + @Cautions Allowed only following FM_PORT_Init().
  73625. + NOTE - This routine can be used only when working in
  73626. + Independent-Mode mode.
  73627. +*//***************************************************************************/
  73628. +t_Error FM_PORT_ImTx( t_Handle h_FmPort,
  73629. + uint8_t *p_Data,
  73630. + uint16_t length,
  73631. + bool lastBuffer,
  73632. + t_Handle h_BufContext);
  73633. +
  73634. +/**************************************************************************//**
  73635. + @Function FM_PORT_ImTxConf
  73636. +
  73637. + @Description Tx port confirmation routine, optional, may be called to verify
  73638. + transmission of all frames. The procedure performed by this
  73639. + routine will be performed automatically on next buffer transmission,
  73640. + but if desired, calling this routine will invoke this action on
  73641. + demand.
  73642. +
  73643. + @Param[in] h_FmPort A handle to a FM Port module.
  73644. +
  73645. + @Cautions Allowed only following FM_PORT_Init().
  73646. + NOTE - This routine can be used only when working in
  73647. + Independent-Mode mode.
  73648. +*//***************************************************************************/
  73649. +void FM_PORT_ImTxConf(t_Handle h_FmPort);
  73650. +
  73651. +/**************************************************************************//**
  73652. + @Function FM_PORT_ImRx
  73653. +
  73654. + @Description Rx function, may be called to poll for received buffers.
  73655. + Normally, Rx process is invoked by the driver on Rx interrupt.
  73656. + Alternatively, this routine may be called on demand.
  73657. +
  73658. + @Param[in] h_FmPort A handle to a FM Port module.
  73659. +
  73660. + @Return E_OK on success; Error code otherwise.
  73661. +
  73662. + @Cautions Allowed only following FM_PORT_Init().
  73663. + NOTE - This routine can be used only when working in
  73664. + Independent-Mode mode.
  73665. +*//***************************************************************************/
  73666. +t_Error FM_PORT_ImRx(t_Handle h_FmPort);
  73667. +
  73668. +/** @} */ /* end of FM_PORT_runtime_data_grp group */
  73669. +/** @} */ /* end of FM_PORT_grp group */
  73670. +/** @} */ /* end of FM_grp group */
  73671. +
  73672. +
  73673. +
  73674. +#ifdef NCSW_BACKWARD_COMPATIBLE_API
  73675. +#define FM_PORT_ConfigTxFifoDeqPipelineDepth FM_PORT_ConfigFifoDeqPipelineDepth
  73676. +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
  73677. +
  73678. +
  73679. +#endif /* __FM_PORT_EXT */
  73680. --- /dev/null
  73681. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_rtc_ext.h
  73682. @@ -0,0 +1,619 @@
  73683. +/*
  73684. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  73685. + *
  73686. + * Redistribution and use in source and binary forms, with or without
  73687. + * modification, are permitted provided that the following conditions are met:
  73688. + * * Redistributions of source code must retain the above copyright
  73689. + * notice, this list of conditions and the following disclaimer.
  73690. + * * Redistributions in binary form must reproduce the above copyright
  73691. + * notice, this list of conditions and the following disclaimer in the
  73692. + * documentation and/or other materials provided with the distribution.
  73693. + * * Neither the name of Freescale Semiconductor nor the
  73694. + * names of its contributors may be used to endorse or promote products
  73695. + * derived from this software without specific prior written permission.
  73696. + *
  73697. + *
  73698. + * ALTERNATIVELY, this software may be distributed under the terms of the
  73699. + * GNU General Public License ("GPL") as published by the Free Software
  73700. + * Foundation, either version 2 of that License or (at your option) any
  73701. + * later version.
  73702. + *
  73703. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  73704. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  73705. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  73706. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  73707. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  73708. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  73709. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  73710. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  73711. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  73712. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  73713. + */
  73714. +
  73715. +
  73716. +/**************************************************************************//**
  73717. + @File fm_rtc_ext.h
  73718. +
  73719. + @Description External definitions and API for FM RTC IEEE1588 Timer Module.
  73720. +
  73721. + @Cautions None.
  73722. +*//***************************************************************************/
  73723. +
  73724. +#ifndef __FM_RTC_EXT_H__
  73725. +#define __FM_RTC_EXT_H__
  73726. +
  73727. +
  73728. +#include "error_ext.h"
  73729. +#include "std_ext.h"
  73730. +#include "fsl_fman_rtc.h"
  73731. +
  73732. +/**************************************************************************//**
  73733. +
  73734. + @Group FM_grp Frame Manager API
  73735. +
  73736. + @Description FM API functions, definitions and enums
  73737. +
  73738. + @{
  73739. +*//***************************************************************************/
  73740. +
  73741. +/**************************************************************************//**
  73742. + @Group fm_rtc_grp FM RTC
  73743. +
  73744. + @Description FM RTC functions, definitions and enums.
  73745. +
  73746. + @{
  73747. +*//***************************************************************************/
  73748. +
  73749. +/**************************************************************************//**
  73750. + @Group fm_rtc_init_grp FM RTC Initialization Unit
  73751. +
  73752. + @Description FM RTC initialization API.
  73753. +
  73754. + @{
  73755. +*//***************************************************************************/
  73756. +
  73757. +/**************************************************************************//**
  73758. + @Description FM RTC Alarm Polarity Options.
  73759. +*//***************************************************************************/
  73760. +typedef enum e_FmRtcAlarmPolarity
  73761. +{
  73762. + e_FM_RTC_ALARM_POLARITY_ACTIVE_HIGH = E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH, /**< Active-high output polarity */
  73763. + e_FM_RTC_ALARM_POLARITY_ACTIVE_LOW = E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW /**< Active-low output polarity */
  73764. +} e_FmRtcAlarmPolarity;
  73765. +
  73766. +/**************************************************************************//**
  73767. + @Description FM RTC Trigger Polarity Options.
  73768. +*//***************************************************************************/
  73769. +typedef enum e_FmRtcTriggerPolarity
  73770. +{
  73771. + e_FM_RTC_TRIGGER_ON_RISING_EDGE = E_FMAN_RTC_TRIGGER_ON_RISING_EDGE, /**< Trigger on rising edge */
  73772. + e_FM_RTC_TRIGGER_ON_FALLING_EDGE = E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE /**< Trigger on falling edge */
  73773. +} e_FmRtcTriggerPolarity;
  73774. +
  73775. +/**************************************************************************//**
  73776. + @Description IEEE1588 Timer Module FM RTC Optional Clock Sources.
  73777. +*//***************************************************************************/
  73778. +typedef enum e_FmSrcClock
  73779. +{
  73780. + e_FM_RTC_SOURCE_CLOCK_EXTERNAL = E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL, /**< external high precision timer reference clock */
  73781. + e_FM_RTC_SOURCE_CLOCK_SYSTEM = E_FMAN_RTC_SOURCE_CLOCK_SYSTEM, /**< MAC system clock */
  73782. + e_FM_RTC_SOURCE_CLOCK_OSCILATOR = E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR /**< RTC clock oscilator */
  73783. +}e_FmSrcClk;
  73784. +
  73785. +/**************************************************************************//**
  73786. + @Description FM RTC configuration parameters structure.
  73787. +
  73788. + This structure should be passed to FM_RTC_Config().
  73789. +*//***************************************************************************/
  73790. +typedef struct t_FmRtcParams
  73791. +{
  73792. + t_Handle h_Fm; /**< FM Handle*/
  73793. + uintptr_t baseAddress; /**< Base address of FM RTC registers */
  73794. + t_Handle h_App; /**< A handle to an application layer object; This handle will
  73795. + be passed by the driver upon calling the above callbacks */
  73796. +} t_FmRtcParams;
  73797. +
  73798. +
  73799. +/**************************************************************************//**
  73800. + @Function FM_RTC_Config
  73801. +
  73802. + @Description Configures the FM RTC module according to user's parameters.
  73803. +
  73804. + The driver assigns default values to some FM RTC parameters.
  73805. + These parameters can be overwritten using the advanced
  73806. + configuration routines.
  73807. +
  73808. + @Param[in] p_FmRtcParam - FM RTC configuration parameters.
  73809. +
  73810. + @Return Handle to the new FM RTC object; NULL pointer on failure.
  73811. +
  73812. + @Cautions None
  73813. +*//***************************************************************************/
  73814. +t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam);
  73815. +
  73816. +/**************************************************************************//**
  73817. + @Function FM_RTC_Init
  73818. +
  73819. + @Description Initializes the FM RTC driver and hardware.
  73820. +
  73821. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73822. +
  73823. + @Return E_OK on success; Error code otherwise.
  73824. +
  73825. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73826. +*//***************************************************************************/
  73827. +t_Error FM_RTC_Init(t_Handle h_FmRtc);
  73828. +
  73829. +/**************************************************************************//**
  73830. + @Function FM_RTC_Free
  73831. +
  73832. + @Description Frees the FM RTC object and all allocated resources.
  73833. +
  73834. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73835. +
  73836. + @Return E_OK on success; Error code otherwise.
  73837. +
  73838. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73839. +*//***************************************************************************/
  73840. +t_Error FM_RTC_Free(t_Handle h_FmRtc);
  73841. +
  73842. +
  73843. +/**************************************************************************//**
  73844. + @Group fm_rtc_adv_config_grp FM RTC Advanced Configuration Unit
  73845. +
  73846. + @Description FM RTC advanced configuration functions.
  73847. +
  73848. + @{
  73849. +*//***************************************************************************/
  73850. +
  73851. +/**************************************************************************//**
  73852. + @Function FM_RTC_ConfigPeriod
  73853. +
  73854. + @Description Configures the period of the timestamp if different than
  73855. + default [DEFAULT_clockPeriod].
  73856. +
  73857. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73858. + @Param[in] period - Period in nano-seconds.
  73859. +
  73860. + @Return E_OK on success; Error code otherwise.
  73861. +
  73862. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73863. +*//***************************************************************************/
  73864. +t_Error FM_RTC_ConfigPeriod(t_Handle h_FmRtc, uint32_t period);
  73865. +
  73866. +/**************************************************************************//**
  73867. + @Function FM_RTC_ConfigSourceClock
  73868. +
  73869. + @Description Configures the source clock of the RTC.
  73870. +
  73871. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73872. + @Param[in] srcClk - Source clock selection.
  73873. + @Param[in] freqInMhz - the source-clock frequency (in MHz).
  73874. +
  73875. + @Return E_OK on success; Error code otherwise.
  73876. +
  73877. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73878. +*//***************************************************************************/
  73879. +t_Error FM_RTC_ConfigSourceClock(t_Handle h_FmRtc,
  73880. + e_FmSrcClk srcClk,
  73881. + uint32_t freqInMhz);
  73882. +
  73883. +/**************************************************************************//**
  73884. + @Function FM_RTC_ConfigPulseRealignment
  73885. +
  73886. + @Description Configures the RTC to automatic FIPER pulse realignment in
  73887. + response to timer adjustments [DEFAULT_pulseRealign]
  73888. +
  73889. + In this mode, the RTC clock is identical to the source clock.
  73890. + This feature can be useful when the system contains an external
  73891. + RTC with inherent frequency compensation.
  73892. +
  73893. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73894. + @Param[in] enable - TRUE to enable automatic realignment.
  73895. +
  73896. + @Return E_OK on success; Error code otherwise.
  73897. +
  73898. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73899. +*//***************************************************************************/
  73900. +t_Error FM_RTC_ConfigPulseRealignment(t_Handle h_FmRtc, bool enable);
  73901. +
  73902. +/**************************************************************************//**
  73903. + @Function FM_RTC_ConfigFrequencyBypass
  73904. +
  73905. + @Description Configures the RTC to bypass the frequency compensation
  73906. + mechanism. [DEFAULT_bypass]
  73907. +
  73908. + In this mode, the RTC clock is identical to the source clock.
  73909. + This feature can be useful when the system contains an external
  73910. + RTC with inherent frequency compensation.
  73911. +
  73912. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73913. + @Param[in] enabled - TRUE to bypass frequency compensation;
  73914. + FALSE otherwise.
  73915. +
  73916. + @Return E_OK on success; Error code otherwise.
  73917. +
  73918. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73919. +*//***************************************************************************/
  73920. +t_Error FM_RTC_ConfigFrequencyBypass(t_Handle h_FmRtc, bool enabled);
  73921. +
  73922. +/**************************************************************************//**
  73923. + @Function FM_RTC_ConfigInvertedInputClockPhase
  73924. +
  73925. + @Description Configures the RTC to invert the source clock phase on input.
  73926. + [DEFAULT_invertInputClkPhase]
  73927. +
  73928. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73929. + @Param[in] inverted - TRUE to invert the source clock phase on input.
  73930. + FALSE otherwise.
  73931. +
  73932. + @Return E_OK on success; Error code otherwise.
  73933. +
  73934. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73935. +*//***************************************************************************/
  73936. +t_Error FM_RTC_ConfigInvertedInputClockPhase(t_Handle h_FmRtc, bool inverted);
  73937. +
  73938. +/**************************************************************************//**
  73939. + @Function FM_RTC_ConfigInvertedOutputClockPhase
  73940. +
  73941. + @Description Configures the RTC to invert the output clock phase.
  73942. + [DEFAULT_invertOutputClkPhase]
  73943. +
  73944. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73945. + @Param[in] inverted - TRUE to invert the output clock phase.
  73946. + FALSE otherwise.
  73947. +
  73948. + @Return E_OK on success; Error code otherwise.
  73949. +
  73950. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73951. +*//***************************************************************************/
  73952. +t_Error FM_RTC_ConfigInvertedOutputClockPhase(t_Handle h_FmRtc, bool inverted);
  73953. +
  73954. +/**************************************************************************//**
  73955. + @Function FM_RTC_ConfigOutputClockDivisor
  73956. +
  73957. + @Description Configures the divisor for generating the output clock from
  73958. + the RTC clock. [DEFAULT_outputClockDivisor]
  73959. +
  73960. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73961. + @Param[in] divisor - Divisor for generation of the output clock.
  73962. +
  73963. + @Return E_OK on success; Error code otherwise.
  73964. +
  73965. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73966. +*//***************************************************************************/
  73967. +t_Error FM_RTC_ConfigOutputClockDivisor(t_Handle h_FmRtc, uint16_t divisor);
  73968. +
  73969. +/**************************************************************************//**
  73970. + @Function FM_RTC_ConfigAlarmPolarity
  73971. +
  73972. + @Description Configures the polarity (active-high/active-low) of a specific
  73973. + alarm signal. [DEFAULT_alarmPolarity]
  73974. +
  73975. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73976. + @Param[in] alarmId - Alarm ID.
  73977. + @Param[in] alarmPolarity - Alarm polarity.
  73978. +
  73979. + @Return E_OK on success; Error code otherwise.
  73980. +
  73981. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  73982. +*//***************************************************************************/
  73983. +t_Error FM_RTC_ConfigAlarmPolarity(t_Handle h_FmRtc,
  73984. + uint8_t alarmId,
  73985. + e_FmRtcAlarmPolarity alarmPolarity);
  73986. +
  73987. +/**************************************************************************//**
  73988. + @Function FM_RTC_ConfigExternalTriggerPolarity
  73989. +
  73990. + @Description Configures the polarity (rising/falling edge) of a specific
  73991. + external trigger signal. [DEFAULT_triggerPolarity]
  73992. +
  73993. + @Param[in] h_FmRtc - Handle to FM RTC object.
  73994. + @Param[in] triggerId - Trigger ID.
  73995. + @Param[in] triggerPolarity - Trigger polarity.
  73996. +
  73997. + @Return E_OK on success; Error code otherwise.
  73998. +
  73999. + @Cautions h_FmRtc must have been previously created using FM_RTC_Config().
  74000. +*//***************************************************************************/
  74001. +t_Error FM_RTC_ConfigExternalTriggerPolarity(t_Handle h_FmRtc,
  74002. + uint8_t triggerId,
  74003. + e_FmRtcTriggerPolarity triggerPolarity);
  74004. +
  74005. +/** @} */ /* end of fm_rtc_adv_config_grp */
  74006. +/** @} */ /* end of fm_rtc_init_grp */
  74007. +
  74008. +
  74009. +/**************************************************************************//**
  74010. + @Group fm_rtc_control_grp FM RTC Control Unit
  74011. +
  74012. + @Description FM RTC runtime control API.
  74013. +
  74014. + @{
  74015. +*//***************************************************************************/
  74016. +
  74017. +/**************************************************************************//**
  74018. + @Function t_FmRtcExceptionsCallback
  74019. +
  74020. + @Description Exceptions user callback routine, used for RTC different mechanisms.
  74021. +
  74022. + @Param[in] h_App - User's application descriptor.
  74023. + @Param[in] id - source id.
  74024. +*//***************************************************************************/
  74025. +typedef void (t_FmRtcExceptionsCallback) ( t_Handle h_App, uint8_t id);
  74026. +
  74027. +/**************************************************************************//**
  74028. + @Description FM RTC alarm parameters.
  74029. +*//***************************************************************************/
  74030. +typedef struct t_FmRtcAlarmParams {
  74031. + uint8_t alarmId; /**< 0 or 1 */
  74032. + uint64_t alarmTime; /**< In nanoseconds, the time when the alarm
  74033. + should go off - must be a multiple of
  74034. + the RTC period */
  74035. + t_FmRtcExceptionsCallback *f_AlarmCallback; /**< This routine will be called when RTC
  74036. + reaches alarmTime */
  74037. + bool clearOnExpiration; /**< TRUE to turn off the alarm once expired. */
  74038. +} t_FmRtcAlarmParams;
  74039. +
  74040. +/**************************************************************************//**
  74041. + @Description FM RTC Periodic Pulse parameters.
  74042. +*//***************************************************************************/
  74043. +typedef struct t_FmRtcPeriodicPulseParams {
  74044. + uint8_t periodicPulseId; /**< 0 or 1 */
  74045. + uint64_t periodicPulsePeriod; /**< In Nanoseconds. Must be
  74046. + a multiple of the RTC period */
  74047. + t_FmRtcExceptionsCallback *f_PeriodicPulseCallback; /**< This routine will be called every
  74048. + periodicPulsePeriod. */
  74049. +} t_FmRtcPeriodicPulseParams;
  74050. +
  74051. +/**************************************************************************//**
  74052. + @Description FM RTC Periodic Pulse parameters.
  74053. +*//***************************************************************************/
  74054. +typedef struct t_FmRtcExternalTriggerParams {
  74055. + uint8_t externalTriggerId; /**< 0 or 1 */
  74056. + bool usePulseAsInput; /**< Use the pulse interrupt instead of
  74057. + an external signal */
  74058. + t_FmRtcExceptionsCallback *f_ExternalTriggerCallback; /**< This routine will be called every
  74059. + periodicPulsePeriod. */
  74060. +} t_FmRtcExternalTriggerParams;
  74061. +
  74062. +
  74063. +/**************************************************************************//**
  74064. + @Function FM_RTC_Enable
  74065. +
  74066. + @Description Enable the RTC (time count is started).
  74067. +
  74068. + The user can select to resume the time count from previous
  74069. + point, or to restart the time count.
  74070. +
  74071. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74072. + @Param[in] resetClock - Restart the time count from zero.
  74073. +
  74074. + @Return E_OK on success; Error code otherwise.
  74075. +
  74076. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74077. +*//***************************************************************************/
  74078. +t_Error FM_RTC_Enable(t_Handle h_FmRtc, bool resetClock);
  74079. +
  74080. +/**************************************************************************//**
  74081. + @Function FM_RTC_Disable
  74082. +
  74083. + @Description Disables the RTC (time count is stopped).
  74084. +
  74085. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74086. +
  74087. + @Return E_OK on success; Error code otherwise.
  74088. +
  74089. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74090. +*//***************************************************************************/
  74091. +t_Error FM_RTC_Disable(t_Handle h_FmRtc);
  74092. +
  74093. +/**************************************************************************//**
  74094. + @Function FM_RTC_SetClockOffset
  74095. +
  74096. + @Description Sets the clock offset (usually relative to another clock).
  74097. +
  74098. + The user can pass a negative offset value.
  74099. +
  74100. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74101. + @Param[in] offset - New clock offset (in nanoseconds).
  74102. +
  74103. + @Return E_OK on success; Error code otherwise.
  74104. +
  74105. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74106. +*//***************************************************************************/
  74107. +t_Error FM_RTC_SetClockOffset(t_Handle h_FmRtc, int64_t offset);
  74108. +
  74109. +/**************************************************************************//**
  74110. + @Function FM_RTC_SetAlarm
  74111. +
  74112. + @Description Schedules an alarm event to a given RTC time.
  74113. +
  74114. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74115. + @Param[in] p_FmRtcAlarmParams - Alarm parameters.
  74116. +
  74117. + @Return E_OK on success; Error code otherwise.
  74118. +
  74119. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74120. + Must be called only prior to FM_RTC_Enable().
  74121. +*//***************************************************************************/
  74122. +t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams);
  74123. +
  74124. +/**************************************************************************//**
  74125. + @Function FM_RTC_SetPeriodicPulse
  74126. +
  74127. + @Description Sets a periodic pulse.
  74128. +
  74129. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74130. + @Param[in] p_FmRtcPeriodicPulseParams - Periodic pulse parameters.
  74131. +
  74132. + @Return E_OK on success; Error code otherwise.
  74133. +
  74134. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74135. + Must be called only prior to FM_RTC_Enable().
  74136. +*//***************************************************************************/
  74137. +t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_FmRtcPeriodicPulseParams);
  74138. +
  74139. +/**************************************************************************//**
  74140. + @Function FM_RTC_ClearPeriodicPulse
  74141. +
  74142. + @Description Clears a periodic pulse.
  74143. +
  74144. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74145. + @Param[in] periodicPulseId - Periodic pulse id.
  74146. +
  74147. + @Return E_OK on success; Error code otherwise.
  74148. +
  74149. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74150. +*//***************************************************************************/
  74151. +t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId);
  74152. +
  74153. +/**************************************************************************//**
  74154. + @Function FM_RTC_SetExternalTrigger
  74155. +
  74156. + @Description Sets an external trigger indication and define a callback
  74157. + routine to be called on such event.
  74158. +
  74159. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74160. + @Param[in] p_FmRtcExternalTriggerParams - External Trigger parameters.
  74161. +
  74162. + @Return E_OK on success; Error code otherwise.
  74163. +
  74164. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74165. +*//***************************************************************************/
  74166. +t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams *p_FmRtcExternalTriggerParams);
  74167. +
  74168. +/**************************************************************************//**
  74169. + @Function FM_RTC_ClearExternalTrigger
  74170. +
  74171. + @Description Clears external trigger indication.
  74172. +
  74173. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74174. + @Param[in] id - External Trigger id.
  74175. +
  74176. + @Return E_OK on success; Error code otherwise.
  74177. +
  74178. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74179. +*//***************************************************************************/
  74180. +t_Error FM_RTC_ClearExternalTrigger(t_Handle h_FmRtc, uint8_t id);
  74181. +
  74182. +/**************************************************************************//**
  74183. + @Function FM_RTC_GetExternalTriggerTimeStamp
  74184. +
  74185. + @Description Reads the External Trigger TimeStamp.
  74186. +
  74187. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74188. + @Param[in] triggerId - External Trigger id.
  74189. + @Param[out] p_TimeStamp - External Trigger timestamp (in nanoseconds).
  74190. +
  74191. + @Return E_OK on success; Error code otherwise.
  74192. +
  74193. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74194. +*//***************************************************************************/
  74195. +t_Error FM_RTC_GetExternalTriggerTimeStamp(t_Handle h_FmRtc,
  74196. + uint8_t triggerId,
  74197. + uint64_t *p_TimeStamp);
  74198. +
  74199. +/**************************************************************************//**
  74200. + @Function FM_RTC_GetCurrentTime
  74201. +
  74202. + @Description Returns the current RTC time.
  74203. +
  74204. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74205. + @Param[out] p_Ts - returned time stamp (in nanoseconds).
  74206. +
  74207. + @Return E_OK on success; Error code otherwise.
  74208. +
  74209. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74210. +*//***************************************************************************/
  74211. +t_Error FM_RTC_GetCurrentTime(t_Handle h_FmRtc, uint64_t *p_Ts);
  74212. +
  74213. +/**************************************************************************//**
  74214. + @Function FM_RTC_SetCurrentTime
  74215. +
  74216. + @Description Sets the current RTC time.
  74217. +
  74218. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74219. + @Param[in] ts - The new time stamp (in nanoseconds).
  74220. +
  74221. + @Return E_OK on success; Error code otherwise.
  74222. +
  74223. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74224. +*//***************************************************************************/
  74225. +t_Error FM_RTC_SetCurrentTime(t_Handle h_FmRtc, uint64_t ts);
  74226. +
  74227. +/**************************************************************************//**
  74228. + @Function FM_RTC_GetFreqCompensation
  74229. +
  74230. + @Description Retrieves the frequency compensation value
  74231. +
  74232. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74233. + @Param[out] p_Compensation - A pointer to the returned value of compensation.
  74234. +
  74235. + @Return E_OK on success; Error code otherwise.
  74236. +
  74237. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74238. +*//***************************************************************************/
  74239. +t_Error FM_RTC_GetFreqCompensation(t_Handle h_FmRtc, uint32_t *p_Compensation);
  74240. +
  74241. +/**************************************************************************//**
  74242. + @Function FM_RTC_SetFreqCompensation
  74243. +
  74244. + @Description Sets a new frequency compensation value.
  74245. +
  74246. + @Param[in] h_FmRtc - Handle to FM RTC object.
  74247. + @Param[in] freqCompensation - The new frequency compensation value to set.
  74248. +
  74249. + @Return E_OK on success; Error code otherwise.
  74250. +
  74251. + @Cautions h_FmRtc must have been previously initialized using FM_RTC_Init().
  74252. +*//***************************************************************************/
  74253. +t_Error FM_RTC_SetFreqCompensation(t_Handle h_FmRtc, uint32_t freqCompensation);
  74254. +
  74255. +#ifdef CONFIG_PTP_1588_CLOCK_DPAA
  74256. +/**************************************************************************//**
  74257. +*@Function FM_RTC_EnableInterrupt
  74258. +*
  74259. +*@Description Enable interrupt of FM RTC.
  74260. +*
  74261. +*@Param[in] h_FmRtc - Handle to FM RTC object.
  74262. +*@Param[in] events - Interrupt events.
  74263. +*
  74264. +*@Return E_OK on success; Error code otherwise.
  74265. +*//***************************************************************************/
  74266. +t_Error FM_RTC_EnableInterrupt(t_Handle h_FmRtc, uint32_t events);
  74267. +
  74268. +/**************************************************************************//**
  74269. +*@Function FM_RTC_DisableInterrupt
  74270. +*
  74271. +*@Description Disable interrupt of FM RTC.
  74272. +*
  74273. +*@Param[in] h_FmRtc - Handle to FM RTC object.
  74274. +*@Param[in] events - Interrupt events.
  74275. +*
  74276. +*@Return E_OK on success; Error code otherwise.
  74277. +*//***************************************************************************/
  74278. +t_Error FM_RTC_DisableInterrupt(t_Handle h_FmRtc, uint32_t events);
  74279. +#endif
  74280. +
  74281. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  74282. +/**************************************************************************//**
  74283. + @Function FM_RTC_DumpRegs
  74284. +
  74285. + @Description Dumps all FM registers
  74286. +
  74287. + @Param[in] h_FmRtc A handle to an FM RTC Module.
  74288. +
  74289. + @Return E_OK on success;
  74290. +
  74291. + @Cautions Allowed only FM_Init().
  74292. +*//***************************************************************************/
  74293. +t_Error FM_RTC_DumpRegs(t_Handle h_FmRtc);
  74294. +#endif /* (defined(DEBUG_ERRORS) && ... */
  74295. +
  74296. +/** @} */ /* end of fm_rtc_control_grp */
  74297. +/** @} */ /* end of fm_rtc_grp */
  74298. +/** @} */ /* end of FM_grp group */
  74299. +
  74300. +
  74301. +#endif /* __FM_RTC_EXT_H__ */
  74302. --- /dev/null
  74303. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_vsp_ext.h
  74304. @@ -0,0 +1,411 @@
  74305. +/*
  74306. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  74307. + *
  74308. + * Redistribution and use in source and binary forms, with or without
  74309. + * modification, are permitted provided that the following conditions are met:
  74310. + * * Redistributions of source code must retain the above copyright
  74311. + * notice, this list of conditions and the following disclaimer.
  74312. + * * Redistributions in binary form must reproduce the above copyright
  74313. + * notice, this list of conditions and the following disclaimer in the
  74314. + * documentation and/or other materials provided with the distribution.
  74315. + * * Neither the name of Freescale Semiconductor nor the
  74316. + * names of its contributors may be used to endorse or promote products
  74317. + * derived from this software without specific prior written permission.
  74318. + *
  74319. + *
  74320. + * ALTERNATIVELY, this software may be distributed under the terms of the
  74321. + * GNU General Public License ("GPL") as published by the Free Software
  74322. + * Foundation, either version 2 of that License or (at your option) any
  74323. + * later version.
  74324. + *
  74325. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  74326. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  74327. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  74328. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  74329. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  74330. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  74331. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  74332. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  74333. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  74334. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  74335. + */
  74336. +
  74337. +
  74338. +/**************************************************************************//**
  74339. + @File fm_vsp_ext.h
  74340. +
  74341. + @Description FM Virtual Storage-Profile ...
  74342. +*//***************************************************************************/
  74343. +#ifndef __FM_VSP_EXT_H
  74344. +#define __FM_VSP_EXT_H
  74345. +
  74346. +#include "std_ext.h"
  74347. +#include "error_ext.h"
  74348. +#include "string_ext.h"
  74349. +#include "debug_ext.h"
  74350. +
  74351. +#include "fm_ext.h"
  74352. +
  74353. +
  74354. +/**************************************************************************//**
  74355. +
  74356. + @Group FM_grp Frame Manager API
  74357. +
  74358. + @Description FM API functions, definitions and enums
  74359. +
  74360. + @{
  74361. +*//***************************************************************************/
  74362. +
  74363. +/**************************************************************************//**
  74364. + @Group FM_VSP_grp FM Virtual-Storage-Profile
  74365. +
  74366. + @Description FM Virtual-Storage-Profile API
  74367. +
  74368. + @{
  74369. +*//***************************************************************************/
  74370. +
  74371. +/**************************************************************************//**
  74372. + @Group FM_VSP_init_grp FM VSP Initialization Unit
  74373. +
  74374. + @Description FM VSP initialization API.
  74375. +
  74376. + @{
  74377. +*//***************************************************************************/
  74378. +
  74379. +/**************************************************************************//**
  74380. + @Description Virtual Storage Profile
  74381. +*//***************************************************************************/
  74382. +typedef struct t_FmVspParams {
  74383. + t_Handle h_Fm; /**< A handle to the FM object this VSP related to */
  74384. + t_FmExtPools extBufPools; /**< Which external buffer pools are used
  74385. + (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes.
  74386. + parameter associated with Rx / OP port */
  74387. + uint16_t liodnOffset; /**< VSP's LIODN offset */
  74388. + struct {
  74389. + e_FmPortType portType; /**< Port type */
  74390. + uint8_t portId; /**< Port Id - relative to type */
  74391. + } portParams;
  74392. + uint8_t relativeProfileId; /**< VSP Id - relative to VSP's range
  74393. + defined in relevant FM object */
  74394. +} t_FmVspParams;
  74395. +
  74396. +
  74397. +/**************************************************************************//**
  74398. + @Function FM_VSP_Config
  74399. +
  74400. + @Description Creates descriptor for the FM VSP module.
  74401. +
  74402. + The routine returns a handle (descriptor) to the FM VSP object.
  74403. + This descriptor must be passed as first parameter to all other
  74404. + FM VSP function calls.
  74405. +
  74406. + No actual initialization or configuration of FM hardware is
  74407. + done by this routine.
  74408. +
  74409. +@Param[in] p_FmVspParams Pointer to data structure of parameters
  74410. +
  74411. + @Retval Handle to FM VSP object, or NULL for Failure.
  74412. +*//***************************************************************************/
  74413. +t_Handle FM_VSP_Config(t_FmVspParams *p_FmVspParams);
  74414. +
  74415. +/**************************************************************************//**
  74416. + @Function FM_VSP_Init
  74417. +
  74418. + @Description Initializes the FM VSP module
  74419. +
  74420. + @Param[in] h_FmVsp - FM VSP module descriptor
  74421. +
  74422. + @Return E_OK on success; Error code otherwise.
  74423. +*//***************************************************************************/
  74424. +t_Error FM_VSP_Init(t_Handle h_FmVsp);
  74425. +
  74426. +/**************************************************************************//**
  74427. + @Function FM_VSP_Free
  74428. +
  74429. + @Description Frees all resources that were assigned to FM VSP module.
  74430. +
  74431. + Calling this routine invalidates the descriptor.
  74432. +
  74433. + @Param[in] h_FmVsp - FM VSP module descriptor
  74434. +
  74435. + @Return E_OK on success; Error code otherwise.
  74436. +*//***************************************************************************/
  74437. +t_Error FM_VSP_Free(t_Handle h_FmVsp);
  74438. +
  74439. +
  74440. +/**************************************************************************//**
  74441. + @Group FM_VSP_adv_config_grp FM VSP Advanced Configuration Unit
  74442. +
  74443. + @Description FM VSP advanced configuration functions.
  74444. +
  74445. + @{
  74446. +*//***************************************************************************/
  74447. +
  74448. +/**************************************************************************//**
  74449. + @Function FM_VSP_ConfigBufferPrefixContent
  74450. +
  74451. + @Description Defines the structure, size and content of the application buffer.
  74452. +
  74453. + The prefix will
  74454. + In VSPs defined for Tx ports, if 'passPrsResult', the application
  74455. + should set a value to their offsets in the prefix of
  74456. + the FM will save the first 'privDataSize', than,
  74457. + depending on 'passPrsResult' and 'passTimeStamp', copy parse result
  74458. + and timeStamp, and the packet itself (in this order), to the
  74459. + application buffer, and to offset.
  74460. +
  74461. + Calling this routine changes the buffer margins definitions
  74462. + in the internal driver data base from its default
  74463. + configuration: Data size: [DEFAULT_FM_SP_bufferPrefixContent_privDataSize]
  74464. + Pass Parser result: [DEFAULT_FM_SP_bufferPrefixContent_passPrsResult].
  74465. + Pass timestamp: [DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp].
  74466. +
  74467. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74468. + @Param[in,out] p_FmBufferPrefixContent A structure of parameters describing the
  74469. + structure of the buffer.
  74470. + Out parameter: Start margin - offset
  74471. + of data from start of external buffer.
  74472. +
  74473. + @Return E_OK on success; Error code otherwise.
  74474. +
  74475. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74476. +*//***************************************************************************/
  74477. +t_Error FM_VSP_ConfigBufferPrefixContent(t_Handle h_FmVsp,
  74478. + t_FmBufferPrefixContent *p_FmBufferPrefixContent);
  74479. +
  74480. +/**************************************************************************//**
  74481. + @Function FM_VSP_ConfigDmaSwapData
  74482. +
  74483. + @Description Calling this routine changes the DMA swap data parameter
  74484. + in the internal driver data base from its default
  74485. + configuration [DEFAULT_FM_SP_dmaSwapData]
  74486. +
  74487. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74488. + @Param[in] swapData New selection
  74489. +
  74490. + @Return E_OK on success; Error code otherwise.
  74491. +
  74492. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74493. +*//***************************************************************************/
  74494. +t_Error FM_VSP_ConfigDmaSwapData(t_Handle h_FmVsp, e_FmDmaSwapOption swapData);
  74495. +
  74496. +/**************************************************************************//**
  74497. + @Function FM_VSP_ConfigDmaIcCacheAttr
  74498. +
  74499. + @Description Calling this routine changes the internal context cache
  74500. + attribute parameter in the internal driver data base
  74501. + from its default configuration [DEFAULT_FM_SP_dmaIntContextCacheAttr]
  74502. +
  74503. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74504. + @Param[in] intContextCacheAttr New selection
  74505. +
  74506. + @Return E_OK on success; Error code otherwise.
  74507. +
  74508. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74509. +*//***************************************************************************/
  74510. +t_Error FM_VSP_ConfigDmaIcCacheAttr(t_Handle h_FmVsp,
  74511. + e_FmDmaCacheOption intContextCacheAttr);
  74512. +
  74513. +/**************************************************************************//**
  74514. + @Function FM_VSP_ConfigDmaHdrAttr
  74515. +
  74516. + @Description Calling this routine changes the header cache
  74517. + attribute parameter in the internal driver data base
  74518. + from its default configuration [DEFAULT_FM_SP_dmaHeaderCacheAttr]
  74519. +
  74520. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74521. + @Param[in] headerCacheAttr New selection
  74522. +
  74523. + @Return E_OK on success; Error code otherwise.
  74524. +
  74525. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74526. +*//***************************************************************************/
  74527. +t_Error FM_VSP_ConfigDmaHdrAttr(t_Handle h_FmVsp, e_FmDmaCacheOption headerCacheAttr);
  74528. +
  74529. +/**************************************************************************//**
  74530. + @Function FM_VSP_ConfigDmaScatterGatherAttr
  74531. +
  74532. + @Description Calling this routine changes the scatter gather cache
  74533. + attribute parameter in the internal driver data base
  74534. + from its default configuration [DEFAULT_FM_SP_dmaScatterGatherCacheAttr]
  74535. +
  74536. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74537. + @Param[in] scatterGatherCacheAttr New selection
  74538. +
  74539. + @Return E_OK on success; Error code otherwise.
  74540. +
  74541. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74542. +*//***************************************************************************/
  74543. +t_Error FM_VSP_ConfigDmaScatterGatherAttr(t_Handle h_FmVsp,
  74544. + e_FmDmaCacheOption scatterGatherCacheAttr);
  74545. +
  74546. +/**************************************************************************//**
  74547. + @Function FM_VSP_ConfigDmaWriteOptimize
  74548. +
  74549. + @Description Calling this routine changes the write optimization
  74550. + parameter in the internal driver data base
  74551. + from its default configuration: optimize = [DEFAULT_FM_SP_dmaWriteOptimize]
  74552. +
  74553. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74554. + @Param[in] optimize TRUE to enable optimization, FALSE for normal operation
  74555. +
  74556. + @Return E_OK on success; Error code otherwise.
  74557. +
  74558. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74559. +*//***************************************************************************/
  74560. +t_Error FM_VSP_ConfigDmaWriteOptimize(t_Handle h_FmVsp, bool optimize);
  74561. +
  74562. +/**************************************************************************//**
  74563. + @Function FM_VSP_ConfigNoScatherGather
  74564. +
  74565. + @Description Calling this routine changes the possibility to receive S/G frame
  74566. + in the internal driver data base
  74567. + from its default configuration: optimize = [DEFAULT_FM_SP_noScatherGather]
  74568. +
  74569. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74570. + @Param[in] noScatherGather TRUE to operate without scatter/gather capability.
  74571. +
  74572. + @Return E_OK on success; Error code otherwise.
  74573. +
  74574. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74575. +*//***************************************************************************/
  74576. +t_Error FM_VSP_ConfigNoScatherGather(t_Handle h_FmVsp, bool noScatherGather);
  74577. +
  74578. +/**************************************************************************//**
  74579. + @Function FM_VSP_ConfigPoolDepletion
  74580. +
  74581. + @Description Calling this routine enables pause frame generation depending on the
  74582. + depletion status of BM pools. It also defines the conditions to activate
  74583. + this functionality. By default, this functionality is disabled.
  74584. +
  74585. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74586. + @Param[in] p_BufPoolDepletion A structure of pool depletion parameters
  74587. +
  74588. + @Return E_OK on success; Error code otherwise.
  74589. +
  74590. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74591. +*//***************************************************************************/
  74592. +t_Error FM_VSP_ConfigPoolDepletion(t_Handle h_FmVsp, t_FmBufPoolDepletion *p_BufPoolDepletion);
  74593. +
  74594. +/**************************************************************************//**
  74595. + @Function FM_VSP_ConfigBackupPools
  74596. +
  74597. + @Description Calling this routine allows the configuration of some of the BM pools
  74598. + defined for this port as backup pools.
  74599. + A pool configured to be a backup pool will be used only if all other
  74600. + enabled non-backup pools are depleted.
  74601. +
  74602. + @Param[in] h_FmVsp A handle to a FM VSP module.
  74603. + @Param[in] p_BackupBmPools An array of pool id's. All pools specified here will
  74604. + be defined as backup pools.
  74605. +
  74606. + @Return E_OK on success; Error code otherwise.
  74607. +
  74608. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  74609. +*//***************************************************************************/
  74610. +t_Error FM_VSP_ConfigBackupPools(t_Handle h_FmVsp, t_FmBackupBmPools *p_BackupBmPools);
  74611. +
  74612. +/** @} */ /* end of FM_VSP_adv_config_grp group */
  74613. +/** @} */ /* end of FM_VSP_init_grp group */
  74614. +
  74615. +
  74616. +/**************************************************************************//**
  74617. + @Group FM_VSP_control_grp FM VSP Control Unit
  74618. +
  74619. + @Description FM VSP runtime control API.
  74620. +
  74621. + @{
  74622. +*//***************************************************************************/
  74623. +
  74624. +/**************************************************************************//**
  74625. + @Function FM_VSP_GetBufferDataOffset
  74626. +
  74627. + @Description Relevant for Rx ports.
  74628. + Returns the data offset from the beginning of the data buffer
  74629. +
  74630. + @Param[in] h_FmVsp - FM PORT module descriptor
  74631. +
  74632. + @Return data offset.
  74633. +
  74634. + @Cautions Allowed only following FM_VSP_Init().
  74635. +*//***************************************************************************/
  74636. +uint32_t FM_VSP_GetBufferDataOffset(t_Handle h_FmVsp);
  74637. +
  74638. +/**************************************************************************//**
  74639. + @Function FM_VSP_GetBufferICInfo
  74640. +
  74641. + @Description Returns the Internal Context offset from the beginning of the data buffer
  74642. +
  74643. + @Param[in] h_FmVsp - FM PORT module descriptor
  74644. + @Param[in] p_Data - A pointer to the data buffer.
  74645. +
  74646. + @Return Internal context info pointer on success, NULL if 'allOtherInfo' was not
  74647. + configured for this port.
  74648. +
  74649. + @Cautions Allowed only following FM_VSP_Init().
  74650. +*//***************************************************************************/
  74651. +uint8_t * FM_VSP_GetBufferICInfo(t_Handle h_FmVsp, char *p_Data);
  74652. +
  74653. +/**************************************************************************//**
  74654. + @Function FM_VSP_GetBufferPrsResult
  74655. +
  74656. + @Description Returns the pointer to the parse result in the data buffer.
  74657. + In Rx ports this is relevant after reception, if parse
  74658. + result is configured to be part of the data passed to the
  74659. + application. For non Rx ports it may be used to get the pointer
  74660. + of the area in the buffer where parse result should be
  74661. + initialized - if so configured.
  74662. + See FM_VSP_ConfigBufferPrefixContent for data buffer prefix
  74663. + configuration.
  74664. +
  74665. + @Param[in] h_FmVsp - FM PORT module descriptor
  74666. + @Param[in] p_Data - A pointer to the data buffer.
  74667. +
  74668. + @Return Parse result pointer on success, NULL if parse result was not
  74669. + configured for this port.
  74670. +
  74671. + @Cautions Allowed only following FM_VSP_Init().
  74672. +*//***************************************************************************/
  74673. +t_FmPrsResult * FM_VSP_GetBufferPrsResult(t_Handle h_FmVsp, char *p_Data);
  74674. +
  74675. +/**************************************************************************//**
  74676. + @Function FM_VSP_GetBufferTimeStamp
  74677. +
  74678. + @Description Returns the time stamp in the data buffer.
  74679. + Relevant for Rx ports for getting the buffer time stamp.
  74680. + See FM_VSP_ConfigBufferPrefixContent for data buffer prefix
  74681. + configuration.
  74682. +
  74683. + @Param[in] h_FmVsp - FM PORT module descriptor
  74684. + @Param[in] p_Data - A pointer to the data buffer.
  74685. +
  74686. + @Return A pointer to the hash result on success, NULL otherwise.
  74687. +
  74688. + @Cautions Allowed only following FM_VSP_Init().
  74689. +*//***************************************************************************/
  74690. +uint64_t * FM_VSP_GetBufferTimeStamp(t_Handle h_FmVsp, char *p_Data);
  74691. +
  74692. +/**************************************************************************//**
  74693. + @Function FM_VSP_GetBufferHashResult
  74694. +
  74695. + @Description Given a data buffer, on the condition that hash result was defined
  74696. + as a part of the buffer content (see FM_VSP_ConfigBufferPrefixContent)
  74697. + this routine will return the pointer to the hash result location in the
  74698. + buffer prefix.
  74699. +
  74700. + @Param[in] h_FmVsp - FM PORT module descriptor
  74701. + @Param[in] p_Data - A pointer to the data buffer.
  74702. +
  74703. + @Return A pointer to the hash result on success, NULL otherwise.
  74704. +
  74705. + @Cautions Allowed only following FM_VSP_Init().
  74706. +*//***************************************************************************/
  74707. +uint8_t * FM_VSP_GetBufferHashResult(t_Handle h_FmVsp, char *p_Data);
  74708. +
  74709. +
  74710. +/** @} */ /* end of FM_VSP_control_grp group */
  74711. +/** @} */ /* end of FM_VSP_grp group */
  74712. +/** @} */ /* end of FM_grp group */
  74713. +
  74714. +
  74715. +#endif /* __FM_VSP_EXT_H */
  74716. --- /dev/null
  74717. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/mii_acc_ext.h
  74718. @@ -0,0 +1,76 @@
  74719. +/*
  74720. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  74721. + *
  74722. + * Redistribution and use in source and binary forms, with or without
  74723. + * modification, are permitted provided that the following conditions are met:
  74724. + * * Redistributions of source code must retain the above copyright
  74725. + * notice, this list of conditions and the following disclaimer.
  74726. + * * Redistributions in binary form must reproduce the above copyright
  74727. + * notice, this list of conditions and the following disclaimer in the
  74728. + * documentation and/or other materials provided with the distribution.
  74729. + * * Neither the name of Freescale Semiconductor nor the
  74730. + * names of its contributors may be used to endorse or promote products
  74731. + * derived from this software without specific prior written permission.
  74732. + *
  74733. + *
  74734. + * ALTERNATIVELY, this software may be distributed under the terms of the
  74735. + * GNU General Public License ("GPL") as published by the Free Software
  74736. + * Foundation, either version 2 of that License or (at your option) any
  74737. + * later version.
  74738. + *
  74739. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  74740. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  74741. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  74742. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  74743. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  74744. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  74745. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  74746. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  74747. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  74748. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  74749. + */
  74750. +
  74751. +
  74752. +
  74753. +#ifndef __MII_ACC_EXT_H
  74754. +#define __MII_ACC_EXT_H
  74755. +
  74756. +
  74757. +/**************************************************************************//**
  74758. + @Function MII_ReadPhyReg
  74759. +
  74760. + @Description This routine is called to read a specified PHY
  74761. + register value.
  74762. +
  74763. + @Param[in] h_MiiAccess - Handle to MII configuration access registers
  74764. + @Param[in] phyAddr - PHY address (0-31).
  74765. + @Param[in] reg - PHY register to read
  74766. + @Param[out] p_Data - Gets the register value.
  74767. +
  74768. + @Return Always zero (success).
  74769. +*//***************************************************************************/
  74770. +int MII_ReadPhyReg(t_Handle h_MiiAccess,
  74771. + uint8_t phyAddr,
  74772. + uint8_t reg,
  74773. + uint16_t *p_Data);
  74774. +
  74775. +/**************************************************************************//**
  74776. + @Function MII_WritePhyReg
  74777. +
  74778. + @Description This routine is called to write data to a specified PHY
  74779. + register.
  74780. +
  74781. + @Param[in] h_MiiAccess - Handle to MII configuration access registers
  74782. + @Param[in] phyAddr - PHY address (0-31).
  74783. + @Param[in] reg - PHY register to write
  74784. + @Param[in] data - Data to write in register.
  74785. +
  74786. + @Return Always zero (success).
  74787. +*//***************************************************************************/
  74788. +int MII_WritePhyReg(t_Handle h_MiiAccess,
  74789. + uint8_t phyAddr,
  74790. + uint8_t reg,
  74791. + uint16_t data);
  74792. +
  74793. +
  74794. +#endif /* __MII_ACC_EXT_H */
  74795. --- /dev/null
  74796. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/core_ext.h
  74797. @@ -0,0 +1,90 @@
  74798. +/*
  74799. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  74800. + *
  74801. + * Redistribution and use in source and binary forms, with or without
  74802. + * modification, are permitted provided that the following conditions are met:
  74803. + * * Redistributions of source code must retain the above copyright
  74804. + * notice, this list of conditions and the following disclaimer.
  74805. + * * Redistributions in binary form must reproduce the above copyright
  74806. + * notice, this list of conditions and the following disclaimer in the
  74807. + * documentation and/or other materials provided with the distribution.
  74808. + * * Neither the name of Freescale Semiconductor nor the
  74809. + * names of its contributors may be used to endorse or promote products
  74810. + * derived from this software without specific prior written permission.
  74811. + *
  74812. + *
  74813. + * ALTERNATIVELY, this software may be distributed under the terms of the
  74814. + * GNU General Public License ("GPL") as published by the Free Software
  74815. + * Foundation, either version 2 of that License or (at your option) any
  74816. + * later version.
  74817. + *
  74818. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  74819. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  74820. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  74821. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  74822. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  74823. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  74824. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  74825. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  74826. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  74827. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  74828. + */
  74829. +
  74830. +
  74831. +/**************************************************************************//**
  74832. + @File core_ext.h
  74833. +
  74834. + @Description Generic interface to basic core operations.
  74835. +
  74836. + The system integrator must ensure that this interface is
  74837. + mapped to a specific core implementation, by including the
  74838. + appropriate header file.
  74839. +*//***************************************************************************/
  74840. +#ifndef __CORE_EXT_H
  74841. +#define __CORE_EXT_H
  74842. +
  74843. +#ifdef CONFIG_FMAN_ARM
  74844. +#include "arm_ext.h"
  74845. +#include <linux/smp.h>
  74846. +#else
  74847. +#ifdef NCSW_PPC_CORE
  74848. +#include "ppc_ext.h"
  74849. +#elif defined(NCSW_VXWORKS)
  74850. +#include "core_vxw_ext.h"
  74851. +#else
  74852. +#error "Core is not defined!"
  74853. +#endif /* NCSW_CORE */
  74854. +
  74855. +#if (!defined(CORE_IS_LITTLE_ENDIAN) && !defined(CORE_IS_BIG_ENDIAN))
  74856. +#error "Must define core as little-endian or big-endian!"
  74857. +#endif /* (!defined(CORE_IS_LITTLE_ENDIAN) && ... */
  74858. +
  74859. +#ifndef CORE_CACHELINE_SIZE
  74860. +#error "Must define the core cache-line size!"
  74861. +#endif /* !CORE_CACHELINE_SIZE */
  74862. +
  74863. +#endif /* CONFIG_FMAN_ARM */
  74864. +
  74865. +
  74866. +/**************************************************************************//**
  74867. + @Function CORE_GetId
  74868. +
  74869. + @Description Returns the core ID in the system.
  74870. +
  74871. + @Return Core ID.
  74872. +*//***************************************************************************/
  74873. +uint32_t CORE_GetId(void);
  74874. +
  74875. +/**************************************************************************//**
  74876. + @Function CORE_MemoryBarrier
  74877. +
  74878. + @Description This routine will cause the core to stop executing any commands
  74879. + until all previous memory read/write commands are completely out
  74880. + of the core's pipeline.
  74881. +
  74882. + @Return None.
  74883. +*//***************************************************************************/
  74884. +void CORE_MemoryBarrier(void);
  74885. +#define fsl_mem_core_barrier() CORE_MemoryBarrier()
  74886. +
  74887. +#endif /* __CORE_EXT_H */
  74888. --- /dev/null
  74889. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/cores/arm_ext.h
  74890. @@ -0,0 +1,55 @@
  74891. +/*
  74892. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  74893. + *
  74894. + * Redistribution and use in source and binary forms, with or without
  74895. + * modification, are permitted provided that the following conditions are met:
  74896. + * * Redistributions of source code must retain the above copyright
  74897. + * notice, this list of conditions and the following disclaimer.
  74898. + * * Redistributions in binary form must reproduce the above copyright
  74899. + * notice, this list of conditions and the following disclaimer in the
  74900. + * documentation and/or other materials provided with the distribution.
  74901. + * * Neither the name of Freescale Semiconductor nor the
  74902. + * names of its contributors may be used to endorse or promote products
  74903. + * derived from this software without specific prior written permission.
  74904. + *
  74905. + *
  74906. + * ALTERNATIVELY, this software may be distributed under the terms of the
  74907. + * GNU General Public License ("GPL") as published by the Free Software
  74908. + * Foundation, either version 2 of that License or (at your option) any
  74909. + * later version.
  74910. + *
  74911. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  74912. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  74913. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  74914. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  74915. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  74916. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  74917. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  74918. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  74919. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  74920. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  74921. + */
  74922. +
  74923. +
  74924. +/**************************************************************************//**
  74925. + @File arm_ext.h
  74926. +
  74927. + @Description Core API for ARM cores
  74928. +
  74929. + These routines must be implemented by each specific PowerPC
  74930. + core driver.
  74931. +*//***************************************************************************/
  74932. +#ifndef __ARM_EXT_H
  74933. +#define __ARM_EXT_H
  74934. +
  74935. +#include "part_ext.h"
  74936. +
  74937. +
  74938. +#define CORE_IS_LITTLE_ENDIAN
  74939. +
  74940. +static __inline__ void CORE_MemoryBarrier(void)
  74941. +{
  74942. + mb();
  74943. +}
  74944. +
  74945. +#endif /* __PPC_EXT_H */
  74946. --- /dev/null
  74947. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/cores/e500v2_ext.h
  74948. @@ -0,0 +1,476 @@
  74949. +/*
  74950. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  74951. + *
  74952. + * Redistribution and use in source and binary forms, with or without
  74953. + * modification, are permitted provided that the following conditions are met:
  74954. + * * Redistributions of source code must retain the above copyright
  74955. + * notice, this list of conditions and the following disclaimer.
  74956. + * * Redistributions in binary form must reproduce the above copyright
  74957. + * notice, this list of conditions and the following disclaimer in the
  74958. + * documentation and/or other materials provided with the distribution.
  74959. + * * Neither the name of Freescale Semiconductor nor the
  74960. + * names of its contributors may be used to endorse or promote products
  74961. + * derived from this software without specific prior written permission.
  74962. + *
  74963. + *
  74964. + * ALTERNATIVELY, this software may be distributed under the terms of the
  74965. + * GNU General Public License ("GPL") as published by the Free Software
  74966. + * Foundation, either version 2 of that License or (at your option) any
  74967. + * later version.
  74968. + *
  74969. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  74970. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  74971. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  74972. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  74973. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  74974. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  74975. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  74976. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  74977. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  74978. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  74979. + */
  74980. +
  74981. +
  74982. +/**************************************************************************//**
  74983. + @File e500v2_ext.h
  74984. +
  74985. + @Description E500 external definitions prototypes
  74986. + This file is not included by the E500
  74987. + source file as it is an assembly file. It is used
  74988. + only for prototypes exposure, for inclusion
  74989. + by user and other modules.
  74990. +*//***************************************************************************/
  74991. +
  74992. +#ifndef __E500V2_EXT_H
  74993. +#define __E500V2_EXT_H
  74994. +
  74995. +#include "std_ext.h"
  74996. +
  74997. +
  74998. +/* Layer 1 Cache Manipulations
  74999. + *==============================
  75000. + * Should not be called directly by the user.
  75001. + */
  75002. +void L1DCache_Invalidate (void);
  75003. +void L1ICache_Invalidate(void);
  75004. +void L1DCache_Enable(void);
  75005. +void L1ICache_Enable(void);
  75006. +void L1DCache_Disable(void);
  75007. +void L1ICache_Disable(void);
  75008. +void L1DCache_Flush(void);
  75009. +void L1ICache_Flush(void);
  75010. +uint32_t L1ICache_IsEnabled(void);
  75011. +uint32_t L1DCache_IsEnabled(void);
  75012. +/*
  75013. + *
  75014. + */
  75015. +uint32_t L1DCache_LineLock(uint32_t addr);
  75016. +uint32_t L1ICache_LineLock(uint32_t addr);
  75017. +void L1Cache_BroadCastEnable(void);
  75018. +void L1Cache_BroadCastDisable(void);
  75019. +
  75020. +
  75021. +#define CORE_DCacheEnable E500_DCacheEnable
  75022. +#define CORE_ICacheEnable E500_ICacheEnable
  75023. +#define CORE_DCacheDisable E500_DCacheDisable
  75024. +#define CORE_ICacheDisable E500_ICacheDisable
  75025. +#define CORE_GetId E500_GetId
  75026. +#define CORE_TestAndSet E500_TestAndSet
  75027. +#define CORE_MemoryBarrier E500_MemoryBarrier
  75028. +#define CORE_InstructionSync E500_InstructionSync
  75029. +
  75030. +#define CORE_SetDozeMode E500_SetDozeMode
  75031. +#define CORE_SetNapMode E500_SetNapMode
  75032. +#define CORE_SetSleepMode E500_SetSleepMode
  75033. +#define CORE_SetJogMode E500_SetJogMode
  75034. +#define CORE_SetDeepSleepMode E500_SetDeepSleepMode
  75035. +
  75036. +#define CORE_RecoverDozeMode E500_RecoverDozeMode
  75037. +#define CORE_RecoverNapMode E500_RecoverNapMode
  75038. +#define CORE_RecoverSleepMode E500_RecoverSleepMode
  75039. +#define CORE_RecoverJogMode E500_RecoverJogMode
  75040. +
  75041. +void E500_SetDozeMode(void);
  75042. +void E500_SetNapMode(void);
  75043. +void E500_SetSleepMode(void);
  75044. +void E500_SetJogMode(void);
  75045. +t_Error E500_SetDeepSleepMode(uint32_t bptrAddress);
  75046. +
  75047. +void E500_RecoverDozeMode(void);
  75048. +void E500_RecoverNapMode(void);
  75049. +void E500_RecoverSleepMode(void);
  75050. +void E500_RecoverJogMode(void);
  75051. +
  75052. +
  75053. +/**************************************************************************//**
  75054. + @Group E500_id E500 Application Programming Interface
  75055. +
  75056. + @Description E500 API functions, definitions and enums
  75057. +
  75058. + @{
  75059. +*//***************************************************************************/
  75060. +
  75061. +/**************************************************************************//**
  75062. + @Group E500_init_grp E500 Initialization Unit
  75063. +
  75064. + @Description E500 initialization unit API functions, definitions and enums
  75065. +
  75066. + @{
  75067. +*//***************************************************************************/
  75068. +
  75069. +
  75070. +/**************************************************************************//**
  75071. + @Function E500_DCacheEnable
  75072. +
  75073. + @Description Enables the data cache for memory pages that are
  75074. + not cache inhibited.
  75075. +
  75076. + @Return None.
  75077. +*//***************************************************************************/
  75078. +void E500_DCacheEnable(void);
  75079. +
  75080. +/**************************************************************************//**
  75081. + @Function E500_ICacheEnable
  75082. +
  75083. + @Description Enables the instruction cache for memory pages that are
  75084. + not cache inhibited.
  75085. +
  75086. + @Return None.
  75087. +*//***************************************************************************/
  75088. +void E500_ICacheEnable(void);
  75089. +
  75090. +/**************************************************************************//**
  75091. + @Function E500_DCacheDisable
  75092. +
  75093. + @Description Disables the data cache.
  75094. +
  75095. + @Return None.
  75096. +*//***************************************************************************/
  75097. +void E500_DCacheDisable(void);
  75098. +
  75099. +/**************************************************************************//**
  75100. + @Function E500_ICacheDisable
  75101. +
  75102. + @Description Disables the instruction cache.
  75103. +
  75104. + @Return None.
  75105. +*//***************************************************************************/
  75106. +void E500_ICacheDisable(void);
  75107. +
  75108. +/**************************************************************************//**
  75109. + @Function E500_DCacheFlush
  75110. +
  75111. + @Description Flushes the data cache
  75112. +
  75113. + @Return None.
  75114. +*//***************************************************************************/
  75115. +void E500_DCacheFlush(void);
  75116. +
  75117. +/**************************************************************************//**
  75118. + @Function E500_ICacheFlush
  75119. +
  75120. + @Description Flushes the instruction cache.
  75121. +
  75122. + @Return None.
  75123. +*//***************************************************************************/
  75124. +void E500_ICacheFlush(void);
  75125. +
  75126. +/**************************************************************************//**
  75127. + @Function E500_DCacheSetStashId
  75128. +
  75129. + @Description Set Stash Id for data cache
  75130. +
  75131. + @Param[in] stashId the stash id to be set.
  75132. +
  75133. + @Return None.
  75134. +*//***************************************************************************/
  75135. +void E500_DCacheSetStashId(uint8_t stashId);
  75136. +
  75137. +/**************************************************************************//**
  75138. + @Description E500mc L2 Cache Operation Mode
  75139. +*//***************************************************************************/
  75140. +typedef enum e_E500mcL2CacheMode
  75141. +{
  75142. + e_L2_CACHE_MODE_DATA_ONLY = 0x00000001, /**< Cache data only */
  75143. + e_L2_CACHE_MODE_INST_ONLY = 0x00000002, /**< Cache instructions only */
  75144. + e_L2_CACHE_MODE_DATA_AND_INST = 0x00000003 /**< Cache data and instructions */
  75145. +} e_E500mcL2CacheMode;
  75146. +
  75147. +#if defined(CORE_E500MC) || defined(CORE_E5500)
  75148. +/**************************************************************************//**
  75149. + @Function E500_L2CacheEnable
  75150. +
  75151. + @Description Enables the cache for memory pages that are not cache inhibited.
  75152. +
  75153. + @param[in] mode - L2 cache mode: data only, instruction only or instruction and data.
  75154. +
  75155. + @Return None.
  75156. +
  75157. + @Cautions This routine must be call only ONCE for both caches. I.e. it is
  75158. + not possible to call this routine for i-cache and than to call
  75159. + again for d-cache; The second call will override the first one.
  75160. +*//***************************************************************************/
  75161. +void E500_L2CacheEnable(e_E500mcL2CacheMode mode);
  75162. +
  75163. +/**************************************************************************//**
  75164. + @Function E500_L2CacheDisable
  75165. +
  75166. + @Description Disables the cache (data instruction or both).
  75167. +
  75168. + @Return None.
  75169. +
  75170. +*//***************************************************************************/
  75171. +void E500_L2CacheDisable(void);
  75172. +
  75173. +/**************************************************************************//**
  75174. + @Function E500_L2CacheFlush
  75175. +
  75176. + @Description Flushes the cache.
  75177. +
  75178. + @Return None.
  75179. +*//***************************************************************************/
  75180. +void E500_L2CacheFlush(void);
  75181. +
  75182. +/**************************************************************************//**
  75183. + @Function E500_L2SetStashId
  75184. +
  75185. + @Description Set Stash Id
  75186. +
  75187. + @Param[in] stashId the stash id to be set.
  75188. +
  75189. + @Return None.
  75190. +*//***************************************************************************/
  75191. +void E500_L2SetStashId(uint8_t stashId);
  75192. +#endif /* defined(CORE_E500MC) || defined(CORE_E5500) */
  75193. +
  75194. +#ifdef CORE_E6500
  75195. +/**************************************************************************//**
  75196. + @Function E6500_L2CacheEnable
  75197. +
  75198. + @Description Enables the cache for memory pages that are not cache inhibited.
  75199. +
  75200. + @param[in] mode - L2 cache mode: support data & instruction only.
  75201. +
  75202. + @Return None.
  75203. +
  75204. + @Cautions This routine must be call only ONCE for both caches. I.e. it is
  75205. + not possible to call this routine for i-cache and than to call
  75206. + again for d-cache; The second call will override the first one.
  75207. +*//***************************************************************************/
  75208. +void E6500_L2CacheEnable(uintptr_t clusterBase);
  75209. +
  75210. +/**************************************************************************//**
  75211. + @Function E6500_L2CacheDisable
  75212. +
  75213. + @Description Disables the cache (data instruction or both).
  75214. +
  75215. + @Return None.
  75216. +
  75217. +*//***************************************************************************/
  75218. +void E6500_L2CacheDisable(uintptr_t clusterBase);
  75219. +
  75220. +/**************************************************************************//**
  75221. + @Function E6500_L2CacheFlush
  75222. +
  75223. + @Description Flushes the cache.
  75224. +
  75225. + @Return None.
  75226. +*//***************************************************************************/
  75227. +void E6500_L2CacheFlush(uintptr_t clusterBase);
  75228. +
  75229. +/**************************************************************************//**
  75230. + @Function E6500_L2SetStashId
  75231. +
  75232. + @Description Set Stash Id
  75233. +
  75234. + @Param[in] stashId the stash id to be set.
  75235. +
  75236. + @Return None.
  75237. +*//***************************************************************************/
  75238. +void E6500_L2SetStashId(uintptr_t clusterBase, uint8_t stashId);
  75239. +
  75240. +/**************************************************************************//**
  75241. + @Function E6500_GetCcsrBase
  75242. +
  75243. + @Description Obtain SoC CCSR base address
  75244. +
  75245. + @Param[in] None.
  75246. +
  75247. + @Return Physical CCSR base address.
  75248. +*//***************************************************************************/
  75249. +physAddress_t E6500_GetCcsrBase(void);
  75250. +#endif /* CORE_E6500 */
  75251. +
  75252. +/**************************************************************************//**
  75253. + @Function E500_AddressBusStreamingEnable
  75254. +
  75255. + @Description Enables address bus streaming on the CCB.
  75256. +
  75257. + This setting, along with the ECM streaming configuration
  75258. + parameters, enables address bus streaming on the CCB.
  75259. +
  75260. + @Return None.
  75261. +*//***************************************************************************/
  75262. +void E500_AddressBusStreamingEnable(void);
  75263. +
  75264. +/**************************************************************************//**
  75265. + @Function E500_AddressBusStreamingDisable
  75266. +
  75267. + @Description Disables address bus streaming on the CCB.
  75268. +
  75269. + @Return None.
  75270. +*//***************************************************************************/
  75271. +void E500_AddressBusStreamingDisable(void);
  75272. +
  75273. +/**************************************************************************//**
  75274. + @Function E500_AddressBroadcastEnable
  75275. +
  75276. + @Description Enables address broadcast.
  75277. +
  75278. + The e500 broadcasts cache management instructions (dcbst, dcblc
  75279. + (CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi)
  75280. + based on ABE. ABE must be set to allow management of external
  75281. + L2 caches.
  75282. +
  75283. + @Return None.
  75284. +*//***************************************************************************/
  75285. +void E500_AddressBroadcastEnable(void);
  75286. +
  75287. +/**************************************************************************//**
  75288. + @Function E500_AddressBroadcastDisable
  75289. +
  75290. + @Description Disables address broadcast.
  75291. +
  75292. + The e500 broadcasts cache management instructions (dcbst, dcblc
  75293. + (CT = 1), icblc (CT = 1), dcbf, dcbi, mbar, msync, tlbsync, icbi)
  75294. + based on ABE. ABE must be set to allow management of external
  75295. + L2 caches.
  75296. +
  75297. + @Return None.
  75298. +*//***************************************************************************/
  75299. +void E500_AddressBroadcastDisable(void);
  75300. +
  75301. +/**************************************************************************//**
  75302. + @Function E500_IsTaskletSupported
  75303. +
  75304. + @Description Checks if tasklets are supported by the e500 interrupt handler.
  75305. +
  75306. + @Retval TRUE - Tasklets are supported.
  75307. + @Retval FALSE - Tasklets are not supported.
  75308. +*//***************************************************************************/
  75309. +bool E500_IsTaskletSupported(void);
  75310. +
  75311. +void E500_EnableTimeBase(void);
  75312. +void E500_DisableTimeBase(void);
  75313. +
  75314. +uint64_t E500_GetTimeBaseTime(void);
  75315. +
  75316. +void E500_GenericIntrInit(void);
  75317. +
  75318. +t_Error E500_SetIntr(int ppcIntrSrc,
  75319. + void (* Isr)(t_Handle handle),
  75320. + t_Handle handle);
  75321. +
  75322. +t_Error E500_ClearIntr(int ppcIntrSrc);
  75323. +
  75324. +/**************************************************************************//**
  75325. + @Function E500_GenericIntrHandler
  75326. +
  75327. + @Description This is the general e500 interrupt handler.
  75328. +
  75329. + It is called by the main assembly interrupt handler
  75330. + when an exception occurs and no other function has been
  75331. + assigned to this exception.
  75332. +
  75333. + @Param intrEntry - (In) The exception interrupt vector entry.
  75334. +*//***************************************************************************/
  75335. +void E500_GenericIntrHandler(uint32_t intrEntry);
  75336. +
  75337. +/**************************************************************************//**
  75338. + @Function CriticalIntr
  75339. +
  75340. + @Description This is the specific critical e500 interrupt handler.
  75341. +
  75342. + It is called by the main assembly interrupt handler
  75343. + when an critical interrupt.
  75344. +
  75345. + @Param intrEntry - (In) The exception interrupt vector entry.
  75346. +*//***************************************************************************/
  75347. +void CriticalIntr(uint32_t intrEntry);
  75348. +
  75349. +
  75350. +/**************************************************************************//**
  75351. + @Function E500_GetId
  75352. +
  75353. + @Description Returns the core ID in the system.
  75354. +
  75355. + @Return Core ID.
  75356. +*//***************************************************************************/
  75357. +uint32_t E500_GetId(void);
  75358. +
  75359. +/**************************************************************************//**
  75360. + @Function E500_TestAndSet
  75361. +
  75362. + @Description This routine tries to atomically test-and-set an integer
  75363. + in memory to a non-zero value.
  75364. +
  75365. + The memory will be set only if it is tested as zero, in which
  75366. + case the routine returns the new non-zero value; otherwise the
  75367. + routine returns zero.
  75368. +
  75369. + @Param[in] p - pointer to a volatile int in memory, on which test-and-set
  75370. + operation should be made.
  75371. +
  75372. + @Retval Zero - Operation failed - memory was already set.
  75373. + @Retval Non-zero - Operation succeeded - memory has been set.
  75374. +*//***************************************************************************/
  75375. +int E500_TestAndSet(volatile int *p);
  75376. +
  75377. +/**************************************************************************//**
  75378. + @Function E500_MemoryBarrier
  75379. +
  75380. + @Description This routine will cause the core to stop executing any commands
  75381. + until all previous memory read/write commands are completely out
  75382. + of the core's pipeline.
  75383. +
  75384. + @Return None.
  75385. +*//***************************************************************************/
  75386. +static __inline__ void E500_MemoryBarrier(void)
  75387. +{
  75388. +#ifndef CORE_E500V2
  75389. + __asm__ ("mbar 1");
  75390. +#else /* CORE_E500V2 */
  75391. + /**** ERRATA WORK AROUND START ****/
  75392. + /* ERRATA num: CPU1 */
  75393. + /* Description: "mbar MO = 1" instruction fails to order caching-inhibited
  75394. + guarded loads and stores. */
  75395. +
  75396. + /* "msync" instruction is used instead */
  75397. +
  75398. + __asm__ ("msync");
  75399. +
  75400. + /**** ERRATA WORK AROUND END ****/
  75401. +#endif /* CORE_E500V2 */
  75402. +}
  75403. +
  75404. +/**************************************************************************//**
  75405. + @Function E500_InstructionSync
  75406. +
  75407. + @Description This routine will cause the core to wait for previous instructions
  75408. + (including any interrupts they generate) to complete before the
  75409. + synchronization command executes, which purges all instructions
  75410. + from the processor's pipeline and refetches the next instruction.
  75411. +
  75412. + @Return None.
  75413. +*//***************************************************************************/
  75414. +static __inline__ void E500_InstructionSync(void)
  75415. +{
  75416. + __asm__ ("isync");
  75417. +}
  75418. +
  75419. +
  75420. +/** @} */ /* end of E500_init_grp group */
  75421. +/** @} */ /* end of E500_grp group */
  75422. +
  75423. +
  75424. +#endif /* __E500V2_EXT_H */
  75425. --- /dev/null
  75426. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/cores/ppc_ext.h
  75427. @@ -0,0 +1,141 @@
  75428. +/*
  75429. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  75430. + *
  75431. + * Redistribution and use in source and binary forms, with or without
  75432. + * modification, are permitted provided that the following conditions are met:
  75433. + * * Redistributions of source code must retain the above copyright
  75434. + * notice, this list of conditions and the following disclaimer.
  75435. + * * Redistributions in binary form must reproduce the above copyright
  75436. + * notice, this list of conditions and the following disclaimer in the
  75437. + * documentation and/or other materials provided with the distribution.
  75438. + * * Neither the name of Freescale Semiconductor nor the
  75439. + * names of its contributors may be used to endorse or promote products
  75440. + * derived from this software without specific prior written permission.
  75441. + *
  75442. + *
  75443. + * ALTERNATIVELY, this software may be distributed under the terms of the
  75444. + * GNU General Public License ("GPL") as published by the Free Software
  75445. + * Foundation, either version 2 of that License or (at your option) any
  75446. + * later version.
  75447. + *
  75448. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  75449. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  75450. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  75451. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  75452. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  75453. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  75454. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  75455. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  75456. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  75457. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  75458. + */
  75459. +
  75460. +
  75461. +/**************************************************************************//**
  75462. + @File ppc_ext.h
  75463. +
  75464. + @Description Core API for PowerPC cores
  75465. +
  75466. + These routines must be implemented by each specific PowerPC
  75467. + core driver.
  75468. +*//***************************************************************************/
  75469. +#ifndef __PPC_EXT_H
  75470. +#define __PPC_EXT_H
  75471. +
  75472. +#include "part_ext.h"
  75473. +
  75474. +
  75475. +#define CORE_IS_BIG_ENDIAN
  75476. +
  75477. +#if defined(CORE_E300) || defined(CORE_E500V2)
  75478. +#define CORE_CACHELINE_SIZE 32
  75479. +#elif defined(CORE_E500MC) || defined(CORE_E5500) || defined(CORE_E6500)
  75480. +#define CORE_CACHELINE_SIZE 64
  75481. +#else
  75482. +#error "Core not defined!"
  75483. +#endif /* defined(CORE_E300) || ... */
  75484. +
  75485. +
  75486. +/**************************************************************************//**
  75487. + @Function CORE_TestAndSet
  75488. +
  75489. + @Description This routine tries to atomically test-and-set an integer
  75490. + in memory to a non-zero value.
  75491. +
  75492. + The memory will be set only if it is tested as zero, in which
  75493. + case the routine returns the new non-zero value; otherwise the
  75494. + routine returns zero.
  75495. +
  75496. + @Param[in] p - pointer to a volatile int in memory, on which test-and-set
  75497. + operation should be made.
  75498. +
  75499. + @Retval Zero - Operation failed - memory was already set.
  75500. + @Retval Non-zero - Operation succeeded - memory has been set.
  75501. +*//***************************************************************************/
  75502. +int CORE_TestAndSet(volatile int *p);
  75503. +
  75504. +/**************************************************************************//**
  75505. + @Function CORE_InstructionSync
  75506. +
  75507. + @Description This routine will cause the core to wait for previous instructions
  75508. + (including any interrupts they generate) to complete before the
  75509. + synchronization command executes, which purges all instructions
  75510. + from the processor's pipeline and refetches the next instruction.
  75511. +
  75512. + @Return None.
  75513. +*//***************************************************************************/
  75514. +void CORE_InstructionSync(void);
  75515. +
  75516. +/**************************************************************************//**
  75517. + @Function CORE_DCacheEnable
  75518. +
  75519. + @Description Enables the data cache for memory pages that are
  75520. + not cache inhibited.
  75521. +
  75522. + @Return None.
  75523. +*//***************************************************************************/
  75524. +void CORE_DCacheEnable(void);
  75525. +
  75526. +/**************************************************************************//**
  75527. + @Function CORE_ICacheEnable
  75528. +
  75529. + @Description Enables the instruction cache for memory pages that are
  75530. + not cache inhibited.
  75531. +
  75532. + @Return None.
  75533. +*//***************************************************************************/
  75534. +void CORE_ICacheEnable(void);
  75535. +
  75536. +/**************************************************************************//**
  75537. + @Function CORE_DCacheDisable
  75538. +
  75539. + @Description Disables the data cache.
  75540. +
  75541. + @Return None.
  75542. +*//***************************************************************************/
  75543. +void CORE_DCacheDisable(void);
  75544. +
  75545. +/**************************************************************************//**
  75546. + @Function CORE_ICacheDisable
  75547. +
  75548. + @Description Disables the instruction cache.
  75549. +
  75550. + @Return None.
  75551. +*//***************************************************************************/
  75552. +void CORE_ICacheDisable(void);
  75553. +
  75554. +
  75555. +
  75556. +#if defined(CORE_E300)
  75557. +#include "e300_ext.h"
  75558. +#elif defined(CORE_E500V2) || defined(CORE_E500MC) || defined(CORE_E5500) || defined(CORE_E6500)
  75559. +#include "e500v2_ext.h"
  75560. +#if !defined(NCSW_LINUX)
  75561. +#include "e500v2_asm_ext.h"
  75562. +#endif
  75563. +#else
  75564. +#error "Core not defined!"
  75565. +#endif
  75566. +
  75567. +
  75568. +#endif /* __PPC_EXT_H */
  75569. --- /dev/null
  75570. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/ddr_std_ext.h
  75571. @@ -0,0 +1,77 @@
  75572. +/*
  75573. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  75574. + *
  75575. + * Redistribution and use in source and binary forms, with or without
  75576. + * modification, are permitted provided that the following conditions are met:
  75577. + * * Redistributions of source code must retain the above copyright
  75578. + * notice, this list of conditions and the following disclaimer.
  75579. + * * Redistributions in binary form must reproduce the above copyright
  75580. + * notice, this list of conditions and the following disclaimer in the
  75581. + * documentation and/or other materials provided with the distribution.
  75582. + * * Neither the name of Freescale Semiconductor nor the
  75583. + * names of its contributors may be used to endorse or promote products
  75584. + * derived from this software without specific prior written permission.
  75585. + *
  75586. + *
  75587. + * ALTERNATIVELY, this software may be distributed under the terms of the
  75588. + * GNU General Public License ("GPL") as published by the Free Software
  75589. + * Foundation, either version 2 of that License or (at your option) any
  75590. + * later version.
  75591. + *
  75592. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  75593. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  75594. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  75595. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  75596. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  75597. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  75598. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  75599. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  75600. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  75601. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  75602. + */
  75603. +
  75604. +#ifndef __DDR_SDT_EXT_H
  75605. +#define __DDR_SDT_EXT_H
  75606. +
  75607. +
  75608. +/**************************************************************************//**
  75609. + @Group ddr_Generic_Resources
  75610. +
  75611. + @Description ddr generic functions, definitions and enums.
  75612. +
  75613. + @{
  75614. +*//***************************************************************************/
  75615. +
  75616. +
  75617. +/**************************************************************************//**
  75618. + @Description SPD maximum size
  75619. +*//***************************************************************************/
  75620. +#define SPD_MAX_SIZE 256
  75621. +
  75622. +/**************************************************************************//**
  75623. + @Description DDR types select
  75624. +*//***************************************************************************/
  75625. +typedef enum e_DdrType
  75626. +{
  75627. + e_DDR_DDR1,
  75628. + e_DDR_DDR2,
  75629. + e_DDR_DDR3,
  75630. + e_DDR_DDR3L,
  75631. + e_DDR_DDR4
  75632. +} e_DdrType;
  75633. +
  75634. +/**************************************************************************//**
  75635. + @Description DDR Mode.
  75636. +*//***************************************************************************/
  75637. +typedef enum e_DdrMode
  75638. +{
  75639. + e_DDR_BUS_WIDTH_32BIT,
  75640. + e_DDR_BUS_WIDTH_64BIT
  75641. +} e_DdrMode;
  75642. +
  75643. +/** @} */ /* end of ddr_Generic_Resources group */
  75644. +
  75645. +
  75646. +
  75647. +#endif /* __DDR_SDT_EXT_H */
  75648. +
  75649. --- /dev/null
  75650. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/debug_ext.h
  75651. @@ -0,0 +1,233 @@
  75652. +/*
  75653. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  75654. + *
  75655. + * Redistribution and use in source and binary forms, with or without
  75656. + * modification, are permitted provided that the following conditions are met:
  75657. + * * Redistributions of source code must retain the above copyright
  75658. + * notice, this list of conditions and the following disclaimer.
  75659. + * * Redistributions in binary form must reproduce the above copyright
  75660. + * notice, this list of conditions and the following disclaimer in the
  75661. + * documentation and/or other materials provided with the distribution.
  75662. + * * Neither the name of Freescale Semiconductor nor the
  75663. + * names of its contributors may be used to endorse or promote products
  75664. + * derived from this software without specific prior written permission.
  75665. + *
  75666. + *
  75667. + * ALTERNATIVELY, this software may be distributed under the terms of the
  75668. + * GNU General Public License ("GPL") as published by the Free Software
  75669. + * Foundation, either version 2 of that License or (at your option) any
  75670. + * later version.
  75671. + *
  75672. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  75673. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  75674. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  75675. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  75676. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  75677. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  75678. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  75679. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  75680. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  75681. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  75682. + */
  75683. +
  75684. +
  75685. +/**************************************************************************//**
  75686. + @File debug_ext.h
  75687. +
  75688. + @Description Debug mode definitions.
  75689. +*//***************************************************************************/
  75690. +
  75691. +#ifndef __DEBUG_EXT_H
  75692. +#define __DEBUG_EXT_H
  75693. +
  75694. +#include "std_ext.h"
  75695. +#include "xx_ext.h"
  75696. +#include "memcpy_ext.h"
  75697. +#if (DEBUG_ERRORS > 0)
  75698. +#include "sprint_ext.h"
  75699. +#include "string_ext.h"
  75700. +#endif /* DEBUG_ERRORS > 0 */
  75701. +
  75702. +
  75703. +#if (DEBUG_ERRORS > 0)
  75704. +
  75705. +/* Internally used macros */
  75706. +
  75707. +#define DUMP_Print XX_Print
  75708. +#define DUMP_MAX_LEVELS 6
  75709. +#define DUMP_IDX_LEN 6
  75710. +#define DUMP_MAX_STR 64
  75711. +
  75712. +
  75713. +#define _CREATE_DUMP_SUBSTR(phrase) \
  75714. + dumpTmpLevel = 0; dumpSubStr[0] = '\0'; \
  75715. + snprintf(dumpTmpStr, DUMP_MAX_STR, "%s", #phrase); \
  75716. + p_DumpToken = strtok(dumpTmpStr, (dumpIsArr[0] ? "[" : ".")); \
  75717. + while ((p_DumpToken != NULL) && (dumpTmpLevel < DUMP_MAX_LEVELS)) \
  75718. + { \
  75719. + strlcat(dumpSubStr, p_DumpToken, DUMP_MAX_STR); \
  75720. + if (dumpIsArr[dumpTmpLevel]) \
  75721. + { \
  75722. + strlcat(dumpSubStr, dumpIdxStr[dumpTmpLevel], DUMP_MAX_STR); \
  75723. + p_DumpToken = strtok(NULL, "."); \
  75724. + } \
  75725. + if ((p_DumpToken != NULL) && \
  75726. + ((p_DumpToken = strtok(NULL, (dumpIsArr[++dumpTmpLevel] ? "[" : "."))) != NULL)) \
  75727. + strlcat(dumpSubStr, ".", DUMP_MAX_STR); \
  75728. + }
  75729. +
  75730. +
  75731. +/**************************************************************************//**
  75732. + @Group gen_id General Drivers Utilities
  75733. +
  75734. + @Description External routines.
  75735. +
  75736. + @{
  75737. +*//***************************************************************************/
  75738. +
  75739. +/**************************************************************************//**
  75740. + @Group dump_id Memory and Registers Dump Mechanism
  75741. +
  75742. + @Description Macros for dumping memory mapped structures.
  75743. +
  75744. + @{
  75745. +*//***************************************************************************/
  75746. +
  75747. +/**************************************************************************//**
  75748. + @Description Declaration of dump mechanism variables.
  75749. +
  75750. + This macro must be declared at the beginning of each routine
  75751. + which uses the dump mechanism macros, before the routine's code
  75752. + starts.
  75753. +*//***************************************************************************/
  75754. +#define DECLARE_DUMP \
  75755. + char dumpIdxStr[DUMP_MAX_LEVELS + 1][DUMP_IDX_LEN] = { "", }; \
  75756. + char dumpSubStr[DUMP_MAX_STR] = ""; \
  75757. + char dumpTmpStr[DUMP_MAX_STR] = ""; \
  75758. + char *p_DumpToken = NULL; \
  75759. + int dumpArrIdx = 0, dumpArrSize = 0, dumpLevel = 0, dumpTmpLevel = 0; \
  75760. + uint8_t dumpIsArr[DUMP_MAX_LEVELS + 1] = { 0 }; \
  75761. + /* Prevent warnings if not all used */ \
  75762. + UNUSED(dumpIdxStr[0][0]); \
  75763. + UNUSED(dumpSubStr[0]); \
  75764. + UNUSED(dumpTmpStr[0]); \
  75765. + UNUSED(p_DumpToken); \
  75766. + UNUSED(dumpArrIdx); \
  75767. + UNUSED(dumpArrSize); \
  75768. + UNUSED(dumpLevel); \
  75769. + UNUSED(dumpTmpLevel); \
  75770. + UNUSED(dumpIsArr[0]);
  75771. +
  75772. +
  75773. +/**************************************************************************//**
  75774. + @Description Prints a title for a subsequent dumped structure or memory.
  75775. +
  75776. + The inputs for this macro are the structure/memory title and
  75777. + its base addresses.
  75778. +*//***************************************************************************/
  75779. +#define DUMP_TITLE(addr, msg) \
  75780. + DUMP_Print("\r\n"); DUMP_Print msg; \
  75781. + if (addr) \
  75782. + DUMP_Print(" (%p)", (addr)); \
  75783. + DUMP_Print("\r\n---------------------------------------------------------\r\n");
  75784. +
  75785. +/**************************************************************************//**
  75786. + @Description Prints a subtitle for a subsequent dumped sub-structure (optional).
  75787. +
  75788. + The inputs for this macro are the sub-structure subtitle.
  75789. + A separating line with this subtitle will be printed.
  75790. +*//***************************************************************************/
  75791. +#define DUMP_SUBTITLE(subtitle) \
  75792. + DUMP_Print("----------- "); DUMP_Print subtitle; DUMP_Print("\r\n")
  75793. +
  75794. +
  75795. +/**************************************************************************//**
  75796. + @Description Dumps a memory region in 4-bytes aligned format.
  75797. +
  75798. + The inputs for this macro are the base addresses and size
  75799. + (in bytes) of the memory region.
  75800. +*//***************************************************************************/
  75801. +#define DUMP_MEMORY(addr, size) \
  75802. + MemDisp((uint8_t *)(addr), (int)(size))
  75803. +
  75804. +
  75805. +/**************************************************************************//**
  75806. + @Description Declares a dump loop, for dumping a sub-structure array.
  75807. +
  75808. + The inputs for this macro are:
  75809. + - idx: an index variable, for indexing the sub-structure items
  75810. + inside the loop. This variable must be declared separately
  75811. + in the beginning of the routine.
  75812. + - cnt: the number of times to repeat the loop. This number should
  75813. + equal the number of items in the sub-structures array.
  75814. +
  75815. + Note, that the body of the loop must be written inside brackets.
  75816. +*//***************************************************************************/
  75817. +#define DUMP_SUBSTRUCT_ARRAY(idx, cnt) \
  75818. + for (idx=0, dumpIsArr[dumpLevel++] = 1; \
  75819. + (idx < cnt) && (dumpLevel > 0) && snprintf(dumpIdxStr[dumpLevel-1], DUMP_IDX_LEN, "[%d]", idx); \
  75820. + idx++, ((idx < cnt) || (dumpIsArr[--dumpLevel] = 0)))
  75821. +
  75822. +
  75823. +/**************************************************************************//**
  75824. + @Description Dumps a structure's member variable.
  75825. +
  75826. + The input for this macro is the full reference for the member
  75827. + variable, where the structure is referenced using a pointer.
  75828. +
  75829. + Note, that a members array must be dumped using DUMP_ARR macro,
  75830. + rather than using this macro.
  75831. +
  75832. + If the member variable is part of a sub-structure hierarchy,
  75833. + the full hierarchy (including array indexing) must be specified.
  75834. +
  75835. + Examples: p_Struct->member
  75836. + p_Struct->sub.member
  75837. + p_Struct->sub[i].member
  75838. +*//***************************************************************************/
  75839. +#define DUMP_VAR(st, phrase) \
  75840. + do { \
  75841. + void *addr = (void *)&((st)->phrase); \
  75842. + physAddress_t physAddr = XX_VirtToPhys(addr); \
  75843. + _CREATE_DUMP_SUBSTR(phrase); \
  75844. + DUMP_Print("0x%010llX: 0x%08x%8s\t%s\r\n", \
  75845. + physAddr, GET_UINT32(*(uint32_t*)addr), "", dumpSubStr); \
  75846. + } while (0)
  75847. +
  75848. +
  75849. +/**************************************************************************//**
  75850. + @Description Dumps a structure's members array.
  75851. +
  75852. + The input for this macro is the full reference for the members
  75853. + array, where the structure is referenced using a pointer.
  75854. +
  75855. + If the members array is part of a sub-structure hierarchy,
  75856. + the full hierarchy (including array indexing) must be specified.
  75857. +
  75858. + Examples: p_Struct->array
  75859. + p_Struct->sub.array
  75860. + p_Struct->sub[i].array
  75861. +*//***************************************************************************/
  75862. +#define DUMP_ARR(st, phrase) \
  75863. + do { \
  75864. + physAddress_t physAddr; \
  75865. + _CREATE_DUMP_SUBSTR(phrase); \
  75866. + dumpArrSize = ARRAY_SIZE((st)->phrase); \
  75867. + for (dumpArrIdx=0; dumpArrIdx < dumpArrSize; dumpArrIdx++) { \
  75868. + physAddr = XX_VirtToPhys((void *)&((st)->phrase[dumpArrIdx])); \
  75869. + DUMP_Print("0x%010llX: 0x%08x%8s\t%s[%d]\r\n", \
  75870. + physAddr, GET_UINT32((st)->phrase[dumpArrIdx]), "", dumpSubStr, dumpArrIdx); \
  75871. + } \
  75872. + } while (0)
  75873. +
  75874. +
  75875. +
  75876. +#endif /* DEBUG_ERRORS > 0 */
  75877. +
  75878. +
  75879. +/** @} */ /* end of dump_id group */
  75880. +/** @} */ /* end of gen_id group */
  75881. +
  75882. +
  75883. +#endif /* __DEBUG_EXT_H */
  75884. +
  75885. --- /dev/null
  75886. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/endian_ext.h
  75887. @@ -0,0 +1,447 @@
  75888. +/*
  75889. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  75890. + *
  75891. + * Redistribution and use in source and binary forms, with or without
  75892. + * modification, are permitted provided that the following conditions are met:
  75893. + * * Redistributions of source code must retain the above copyright
  75894. + * notice, this list of conditions and the following disclaimer.
  75895. + * * Redistributions in binary form must reproduce the above copyright
  75896. + * notice, this list of conditions and the following disclaimer in the
  75897. + * documentation and/or other materials provided with the distribution.
  75898. + * * Neither the name of Freescale Semiconductor nor the
  75899. + * names of its contributors may be used to endorse or promote products
  75900. + * derived from this software without specific prior written permission.
  75901. + *
  75902. + *
  75903. + * ALTERNATIVELY, this software may be distributed under the terms of the
  75904. + * GNU General Public License ("GPL") as published by the Free Software
  75905. + * Foundation, either version 2 of that License or (at your option) any
  75906. + * later version.
  75907. + *
  75908. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  75909. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  75910. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  75911. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  75912. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  75913. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  75914. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  75915. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  75916. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  75917. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  75918. + */
  75919. +
  75920. +
  75921. +/**************************************************************************//**
  75922. +
  75923. + @File endian_ext.h
  75924. +
  75925. + @Description Big/little endian swapping routines.
  75926. +*//***************************************************************************/
  75927. +
  75928. +#ifndef __ENDIAN_EXT_H
  75929. +#define __ENDIAN_EXT_H
  75930. +
  75931. +#include "std_ext.h"
  75932. +
  75933. +
  75934. +/**************************************************************************//**
  75935. + @Group gen_id General Drivers Utilities
  75936. +
  75937. + @Description General usage API. This API is intended for usage by both the
  75938. + internal modules and the user's application.
  75939. +
  75940. + @{
  75941. +*//***************************************************************************/
  75942. +
  75943. +/**************************************************************************//**
  75944. + @Group endian_id Big/Little-Endian Conversion
  75945. +
  75946. + @Description Routines and macros for Big/Little-Endian conversion and
  75947. + general byte swapping.
  75948. +
  75949. + All routines and macros are expecting unsigned values as
  75950. + parameters, but will generate the correct result also for
  75951. + signed values. Therefore, signed/unsigned casting is allowed.
  75952. + @{
  75953. +*//***************************************************************************/
  75954. +
  75955. +/**************************************************************************//**
  75956. + @Collection Byte-Swap Macros
  75957. +
  75958. + Macros for swapping byte order.
  75959. +
  75960. + @Cautions The parameters of these macros are evaluated multiple times.
  75961. + For calculated expressions or expressions that contain function
  75962. + calls it is recommended to use the byte-swap routines.
  75963. +
  75964. + @{
  75965. +*//***************************************************************************/
  75966. +
  75967. +/**************************************************************************//**
  75968. + @Description Swaps the byte order of a given 16-bit value.
  75969. +
  75970. + @Param[in] val - The 16-bit value to swap.
  75971. +
  75972. + @Return The byte-swapped value..
  75973. +
  75974. + @Cautions The given value is evaluated multiple times by this macro.
  75975. + For calculated expressions or expressions that contain function
  75976. + calls it is recommended to use the SwapUint16() routine.
  75977. +
  75978. + @hideinitializer
  75979. +*//***************************************************************************/
  75980. +#define SWAP_UINT16(val) \
  75981. + ((uint16_t)((((val) & 0x00FF) << 8) | (((val) & 0xFF00) >> 8)))
  75982. +
  75983. +/**************************************************************************//**
  75984. + @Description Swaps the byte order of a given 32-bit value.
  75985. +
  75986. + @Param[in] val - The 32-bit value to swap.
  75987. +
  75988. + @Return The byte-swapped value..
  75989. +
  75990. + @Cautions The given value is evaluated multiple times by this macro.
  75991. + For calculated expressions or expressions that contain function
  75992. + calls it is recommended to use the SwapUint32() routine.
  75993. +
  75994. + @hideinitializer
  75995. +*//***************************************************************************/
  75996. +#define SWAP_UINT32(val) \
  75997. + ((uint32_t)((((val) & 0x000000FF) << 24) | \
  75998. + (((val) & 0x0000FF00) << 8) | \
  75999. + (((val) & 0x00FF0000) >> 8) | \
  76000. + (((val) & 0xFF000000) >> 24)))
  76001. +
  76002. +/**************************************************************************//**
  76003. + @Description Swaps the byte order of a given 64-bit value.
  76004. +
  76005. + @Param[in] val - The 64-bit value to swap.
  76006. +
  76007. + @Return The byte-swapped value..
  76008. +
  76009. + @Cautions The given value is evaluated multiple times by this macro.
  76010. + For calculated expressions or expressions that contain function
  76011. + calls it is recommended to use the SwapUint64() routine.
  76012. +
  76013. + @hideinitializer
  76014. +*//***************************************************************************/
  76015. +#define SWAP_UINT64(val) \
  76016. + ((uint64_t)((((val) & 0x00000000000000FFULL) << 56) | \
  76017. + (((val) & 0x000000000000FF00ULL) << 40) | \
  76018. + (((val) & 0x0000000000FF0000ULL) << 24) | \
  76019. + (((val) & 0x00000000FF000000ULL) << 8) | \
  76020. + (((val) & 0x000000FF00000000ULL) >> 8) | \
  76021. + (((val) & 0x0000FF0000000000ULL) >> 24) | \
  76022. + (((val) & 0x00FF000000000000ULL) >> 40) | \
  76023. + (((val) & 0xFF00000000000000ULL) >> 56)))
  76024. +
  76025. +/* @} */
  76026. +
  76027. +/**************************************************************************//**
  76028. + @Collection Byte-Swap Routines
  76029. +
  76030. + Routines for swapping the byte order of a given parameter and
  76031. + returning the swapped value.
  76032. +
  76033. + These inline routines are safer than the byte-swap macros,
  76034. + because they evaluate the parameter expression only once.
  76035. + @{
  76036. +*//***************************************************************************/
  76037. +
  76038. +/**************************************************************************//**
  76039. + @Function SwapUint16
  76040. +
  76041. + @Description Returns the byte-swapped value of a given 16-bit value.
  76042. +
  76043. + @Param[in] val - The 16-bit value.
  76044. +
  76045. + @Return The byte-swapped value of the parameter.
  76046. +*//***************************************************************************/
  76047. +static __inline__ uint16_t SwapUint16(uint16_t val)
  76048. +{
  76049. + return (uint16_t)(((val & 0x00FF) << 8) |
  76050. + ((val & 0xFF00) >> 8));
  76051. +}
  76052. +
  76053. +/**************************************************************************//**
  76054. + @Function SwapUint32
  76055. +
  76056. + @Description Returns the byte-swapped value of a given 32-bit value.
  76057. +
  76058. + @Param[in] val - The 32-bit value.
  76059. +
  76060. + @Return The byte-swapped value of the parameter.
  76061. +*//***************************************************************************/
  76062. +static __inline__ uint32_t SwapUint32(uint32_t val)
  76063. +{
  76064. + return (uint32_t)(((val & 0x000000FF) << 24) |
  76065. + ((val & 0x0000FF00) << 8) |
  76066. + ((val & 0x00FF0000) >> 8) |
  76067. + ((val & 0xFF000000) >> 24));
  76068. +}
  76069. +
  76070. +/**************************************************************************//**
  76071. + @Function SwapUint64
  76072. +
  76073. + @Description Returns the byte-swapped value of a given 64-bit value.
  76074. +
  76075. + @Param[in] val - The 64-bit value.
  76076. +
  76077. + @Return The byte-swapped value of the parameter.
  76078. +*//***************************************************************************/
  76079. +static __inline__ uint64_t SwapUint64(uint64_t val)
  76080. +{
  76081. + return (uint64_t)(((val & 0x00000000000000FFULL) << 56) |
  76082. + ((val & 0x000000000000FF00ULL) << 40) |
  76083. + ((val & 0x0000000000FF0000ULL) << 24) |
  76084. + ((val & 0x00000000FF000000ULL) << 8) |
  76085. + ((val & 0x000000FF00000000ULL) >> 8) |
  76086. + ((val & 0x0000FF0000000000ULL) >> 24) |
  76087. + ((val & 0x00FF000000000000ULL) >> 40) |
  76088. + ((val & 0xFF00000000000000ULL) >> 56));
  76089. +}
  76090. +
  76091. +/* @} */
  76092. +
  76093. +/**************************************************************************//**
  76094. + @Collection In-place Byte-Swap-And-Set Routines
  76095. +
  76096. + Routines for swapping the byte order of a given variable and
  76097. + setting the swapped value back to the same variable.
  76098. + @{
  76099. +*//***************************************************************************/
  76100. +
  76101. +/**************************************************************************//**
  76102. + @Function SwapUint16P
  76103. +
  76104. + @Description Swaps the byte order of a given 16-bit variable.
  76105. +
  76106. + @Param[in] p_Val - Pointer to the 16-bit variable.
  76107. +
  76108. + @Return None.
  76109. +*//***************************************************************************/
  76110. +static __inline__ void SwapUint16P(uint16_t *p_Val)
  76111. +{
  76112. + *p_Val = SwapUint16(*p_Val);
  76113. +}
  76114. +
  76115. +/**************************************************************************//**
  76116. + @Function SwapUint32P
  76117. +
  76118. + @Description Swaps the byte order of a given 32-bit variable.
  76119. +
  76120. + @Param[in] p_Val - Pointer to the 32-bit variable.
  76121. +
  76122. + @Return None.
  76123. +*//***************************************************************************/
  76124. +static __inline__ void SwapUint32P(uint32_t *p_Val)
  76125. +{
  76126. + *p_Val = SwapUint32(*p_Val);
  76127. +}
  76128. +
  76129. +/**************************************************************************//**
  76130. + @Function SwapUint64P
  76131. +
  76132. + @Description Swaps the byte order of a given 64-bit variable.
  76133. +
  76134. + @Param[in] p_Val - Pointer to the 64-bit variable.
  76135. +
  76136. + @Return None.
  76137. +*//***************************************************************************/
  76138. +static __inline__ void SwapUint64P(uint64_t *p_Val)
  76139. +{
  76140. + *p_Val = SwapUint64(*p_Val);
  76141. +}
  76142. +
  76143. +/* @} */
  76144. +
  76145. +
  76146. +/**************************************************************************//**
  76147. + @Collection Little-Endian Conversion Macros
  76148. +
  76149. + These macros convert given parameters to or from Little-Endian
  76150. + format. Use these macros when you want to read or write a specific
  76151. + Little-Endian value in memory, without a-priori knowing the CPU
  76152. + byte order.
  76153. +
  76154. + These macros use the byte-swap routines. For conversion of
  76155. + constants in initialization structures, you may use the CONST
  76156. + versions of these macros (see below), which are using the
  76157. + byte-swap macros instead.
  76158. + @{
  76159. +*//***************************************************************************/
  76160. +
  76161. +/**************************************************************************//**
  76162. + @Description Converts a given 16-bit value from CPU byte order to
  76163. + Little-Endian byte order.
  76164. +
  76165. + @Param[in] val - The 16-bit value to convert.
  76166. +
  76167. + @Return The converted value.
  76168. +
  76169. + @hideinitializer
  76170. +*//***************************************************************************/
  76171. +#define CPU_TO_LE16(val) SwapUint16(val)
  76172. +
  76173. +/**************************************************************************//**
  76174. + @Description Converts a given 32-bit value from CPU byte order to
  76175. + Little-Endian byte order.
  76176. +
  76177. + @Param[in] val - The 32-bit value to convert.
  76178. +
  76179. + @Return The converted value.
  76180. +
  76181. + @hideinitializer
  76182. +*//***************************************************************************/
  76183. +#define CPU_TO_LE32(val) SwapUint32(val)
  76184. +
  76185. +/**************************************************************************//**
  76186. + @Description Converts a given 64-bit value from CPU byte order to
  76187. + Little-Endian byte order.
  76188. +
  76189. + @Param[in] val - The 64-bit value to convert.
  76190. +
  76191. + @Return The converted value.
  76192. +
  76193. + @hideinitializer
  76194. +*//***************************************************************************/
  76195. +#define CPU_TO_LE64(val) SwapUint64(val)
  76196. +
  76197. +
  76198. +/**************************************************************************//**
  76199. + @Description Converts a given 16-bit value from Little-Endian byte order to
  76200. + CPU byte order.
  76201. +
  76202. + @Param[in] val - The 16-bit value to convert.
  76203. +
  76204. + @Return The converted value.
  76205. +
  76206. + @hideinitializer
  76207. +*//***************************************************************************/
  76208. +#define LE16_TO_CPU(val) CPU_TO_LE16(val)
  76209. +
  76210. +/**************************************************************************//**
  76211. + @Description Converts a given 32-bit value from Little-Endian byte order to
  76212. + CPU byte order.
  76213. +
  76214. + @Param[in] val - The 32-bit value to convert.
  76215. +
  76216. + @Return The converted value.
  76217. +
  76218. + @hideinitializer
  76219. +*//***************************************************************************/
  76220. +#define LE32_TO_CPU(val) CPU_TO_LE32(val)
  76221. +
  76222. +/**************************************************************************//**
  76223. + @Description Converts a given 64-bit value from Little-Endian byte order to
  76224. + CPU byte order.
  76225. +
  76226. + @Param[in] val - The 64-bit value to convert.
  76227. +
  76228. + @Return The converted value.
  76229. +
  76230. + @hideinitializer
  76231. +*//***************************************************************************/
  76232. +#define LE64_TO_CPU(val) CPU_TO_LE64(val)
  76233. +
  76234. +/* @} */
  76235. +
  76236. +/**************************************************************************//**
  76237. + @Collection Little-Endian Constant Conversion Macros
  76238. +
  76239. + These macros convert given constants to or from Little-Endian
  76240. + format. Use these macros when you want to read or write a specific
  76241. + Little-Endian constant in memory, without a-priori knowing the
  76242. + CPU byte order.
  76243. +
  76244. + These macros use the byte-swap macros, therefore can be used for
  76245. + conversion of constants in initialization structures.
  76246. +
  76247. + @Cautions The parameters of these macros are evaluated multiple times.
  76248. + For non-constant expressions, use the non-CONST macro versions.
  76249. +
  76250. + @{
  76251. +*//***************************************************************************/
  76252. +
  76253. +/**************************************************************************//**
  76254. + @Description Converts a given 16-bit constant from CPU byte order to
  76255. + Little-Endian byte order.
  76256. +
  76257. + @Param[in] val - The 16-bit value to convert.
  76258. +
  76259. + @Return The converted value.
  76260. +
  76261. + @hideinitializer
  76262. +*//***************************************************************************/
  76263. +#define CONST_CPU_TO_LE16(val) SWAP_UINT16(val)
  76264. +
  76265. +/**************************************************************************//**
  76266. + @Description Converts a given 32-bit constant from CPU byte order to
  76267. + Little-Endian byte order.
  76268. +
  76269. + @Param[in] val - The 32-bit value to convert.
  76270. +
  76271. + @Return The converted value.
  76272. +
  76273. + @hideinitializer
  76274. +*//***************************************************************************/
  76275. +#define CONST_CPU_TO_LE32(val) SWAP_UINT32(val)
  76276. +
  76277. +/**************************************************************************//**
  76278. + @Description Converts a given 64-bit constant from CPU byte order to
  76279. + Little-Endian byte order.
  76280. +
  76281. + @Param[in] val - The 64-bit value to convert.
  76282. +
  76283. + @Return The converted value.
  76284. +
  76285. + @hideinitializer
  76286. +*//***************************************************************************/
  76287. +#define CONST_CPU_TO_LE64(val) SWAP_UINT64(val)
  76288. +
  76289. +
  76290. +/**************************************************************************//**
  76291. + @Description Converts a given 16-bit constant from Little-Endian byte order
  76292. + to CPU byte order.
  76293. +
  76294. + @Param[in] val - The 16-bit value to convert.
  76295. +
  76296. + @Return The converted value.
  76297. +
  76298. + @hideinitializer
  76299. +*//***************************************************************************/
  76300. +#define CONST_LE16_TO_CPU(val) CONST_CPU_TO_LE16(val)
  76301. +
  76302. +/**************************************************************************//**
  76303. + @Description Converts a given 32-bit constant from Little-Endian byte order
  76304. + to CPU byte order.
  76305. +
  76306. + @Param[in] val - The 32-bit value to convert.
  76307. +
  76308. + @Return The converted value.
  76309. +
  76310. + @hideinitializer
  76311. +*//***************************************************************************/
  76312. +#define CONST_LE32_TO_CPU(val) CONST_CPU_TO_LE32(val)
  76313. +
  76314. +/**************************************************************************//**
  76315. + @Description Converts a given 64-bit constant from Little-Endian byte order
  76316. + to CPU byte order.
  76317. +
  76318. + @Param[in] val - The 64-bit value to convert.
  76319. +
  76320. + @Return The converted value.
  76321. +
  76322. + @hideinitializer
  76323. +*//***************************************************************************/
  76324. +#define CONST_LE64_TO_CPU(val) CONST_CPU_TO_LE64(val)
  76325. +
  76326. +/* @} */
  76327. +
  76328. +
  76329. +/** @} */ /* end of endian_id group */
  76330. +/** @} */ /* end of gen_id group */
  76331. +
  76332. +
  76333. +#endif /* __ENDIAN_EXT_H */
  76334. +
  76335. --- /dev/null
  76336. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/enet_ext.h
  76337. @@ -0,0 +1,205 @@
  76338. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  76339. + * All rights reserved.
  76340. + *
  76341. + * Redistribution and use in source and binary forms, with or without
  76342. + * modification, are permitted provided that the following conditions are met:
  76343. + * * Redistributions of source code must retain the above copyright
  76344. + * notice, this list of conditions and the following disclaimer.
  76345. + * * Redistributions in binary form must reproduce the above copyright
  76346. + * notice, this list of conditions and the following disclaimer in the
  76347. + * documentation and/or other materials provided with the distribution.
  76348. + * * Neither the name of Freescale Semiconductor nor the
  76349. + * names of its contributors may be used to endorse or promote products
  76350. + * derived from this software without specific prior written permission.
  76351. + *
  76352. + *
  76353. + * ALTERNATIVELY, this software may be distributed under the terms of the
  76354. + * GNU General Public License ("GPL") as published by the Free Software
  76355. + * Foundation, either version 2 of that License or (at your option) any
  76356. + * later version.
  76357. + *
  76358. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  76359. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  76360. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  76361. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  76362. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  76363. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  76364. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  76365. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  76366. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  76367. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  76368. + */
  76369. +
  76370. +
  76371. +/**************************************************************************//**
  76372. + @File enet_ext.h
  76373. +
  76374. + @Description Ethernet generic definitions and enums.
  76375. +*//***************************************************************************/
  76376. +
  76377. +#ifndef __ENET_EXT_H
  76378. +#define __ENET_EXT_H
  76379. +
  76380. +#include "fsl_enet.h"
  76381. +
  76382. +#define ENET_NUM_OCTETS_PER_ADDRESS 6 /**< Number of octets (8-bit bytes) in an ethernet address */
  76383. +#define ENET_GROUP_ADDR 0x01 /**< Group address mask for ethernet addresses */
  76384. +
  76385. +
  76386. +/**************************************************************************//**
  76387. + @Description Ethernet Address
  76388. +*//***************************************************************************/
  76389. +typedef uint8_t t_EnetAddr[ENET_NUM_OCTETS_PER_ADDRESS];
  76390. +
  76391. +/**************************************************************************//**
  76392. + @Description Ethernet Address Type.
  76393. +*//***************************************************************************/
  76394. +typedef enum e_EnetAddrType
  76395. +{
  76396. + e_ENET_ADDR_TYPE_INDIVIDUAL, /**< Individual (unicast) address */
  76397. + e_ENET_ADDR_TYPE_GROUP, /**< Group (multicast) address */
  76398. + e_ENET_ADDR_TYPE_BROADCAST /**< Broadcast address */
  76399. +} e_EnetAddrType;
  76400. +
  76401. +/**************************************************************************//**
  76402. + @Description Ethernet MAC-PHY Interface
  76403. +*//***************************************************************************/
  76404. +typedef enum e_EnetInterface
  76405. +{
  76406. + e_ENET_IF_MII = E_ENET_IF_MII, /**< MII interface */
  76407. + e_ENET_IF_RMII = E_ENET_IF_RMII, /**< RMII interface */
  76408. + e_ENET_IF_SMII = E_ENET_IF_SMII, /**< SMII interface */
  76409. + e_ENET_IF_GMII = E_ENET_IF_GMII, /**< GMII interface */
  76410. + e_ENET_IF_RGMII = E_ENET_IF_RGMII, /**< RGMII interface */
  76411. + e_ENET_IF_TBI = E_ENET_IF_TBI, /**< TBI interface */
  76412. + e_ENET_IF_RTBI = E_ENET_IF_RTBI, /**< RTBI interface */
  76413. + e_ENET_IF_SGMII = E_ENET_IF_SGMII, /**< SGMII interface */
  76414. + e_ENET_IF_XGMII = E_ENET_IF_XGMII, /**< XGMII interface */
  76415. + e_ENET_IF_QSGMII= E_ENET_IF_QSGMII, /**< QSGMII interface */
  76416. + e_ENET_IF_XFI = E_ENET_IF_XFI /**< XFI interface */
  76417. +} e_EnetInterface;
  76418. +
  76419. +#define ENET_IF_SGMII_BASEX 0x80000000 /**< SGMII/QSGII interface with 1000BaseX
  76420. + auto-negotiation between MAC and phy
  76421. + or backplane;
  76422. + Note: 1000BaseX auto-negotiation relates
  76423. + only to interface between MAC and phy/backplane,
  76424. + SGMII phy can still synchronize with far-end phy
  76425. + at 10Mbps, 100Mbps or 1000Mbps */
  76426. +
  76427. +/**************************************************************************//**
  76428. + @Description Ethernet Duplex Mode
  76429. +*//***************************************************************************/
  76430. +typedef enum e_EnetDuplexMode
  76431. +{
  76432. + e_ENET_HALF_DUPLEX, /**< Half-Duplex mode */
  76433. + e_ENET_FULL_DUPLEX /**< Full-Duplex mode */
  76434. +} e_EnetDuplexMode;
  76435. +
  76436. +/**************************************************************************//**
  76437. + @Description Ethernet Speed (nominal data rate)
  76438. +*//***************************************************************************/
  76439. +typedef enum e_EnetSpeed
  76440. +{
  76441. + e_ENET_SPEED_10 = E_ENET_SPEED_10, /**< 10 Mbps */
  76442. + e_ENET_SPEED_100 = E_ENET_SPEED_100, /**< 100 Mbps */
  76443. + e_ENET_SPEED_1000 = E_ENET_SPEED_1000, /**< 1000 Mbps = 1 Gbps */
  76444. + e_ENET_SPEED_2500 = E_ENET_SPEED_2500, /**< 2500 Mbps = 2.5 Gbps */
  76445. + e_ENET_SPEED_10000 = E_ENET_SPEED_10000 /**< 10000 Mbps = 10 Gbps */
  76446. +} e_EnetSpeed;
  76447. +
  76448. +/**************************************************************************//**
  76449. + @Description Ethernet mode (combination of MAC-PHY interface and speed)
  76450. +*//***************************************************************************/
  76451. +typedef enum e_EnetMode
  76452. +{
  76453. + e_ENET_MODE_INVALID = 0, /**< Invalid Ethernet mode */
  76454. + e_ENET_MODE_MII_10 = (e_ENET_IF_MII | e_ENET_SPEED_10), /**< 10 Mbps MII */
  76455. + e_ENET_MODE_MII_100 = (e_ENET_IF_MII | e_ENET_SPEED_100), /**< 100 Mbps MII */
  76456. + e_ENET_MODE_RMII_10 = (e_ENET_IF_RMII | e_ENET_SPEED_10), /**< 10 Mbps RMII */
  76457. + e_ENET_MODE_RMII_100 = (e_ENET_IF_RMII | e_ENET_SPEED_100), /**< 100 Mbps RMII */
  76458. + e_ENET_MODE_SMII_10 = (e_ENET_IF_SMII | e_ENET_SPEED_10), /**< 10 Mbps SMII */
  76459. + e_ENET_MODE_SMII_100 = (e_ENET_IF_SMII | e_ENET_SPEED_100), /**< 100 Mbps SMII */
  76460. + e_ENET_MODE_GMII_1000 = (e_ENET_IF_GMII | e_ENET_SPEED_1000), /**< 1000 Mbps GMII */
  76461. + e_ENET_MODE_RGMII_10 = (e_ENET_IF_RGMII | e_ENET_SPEED_10), /**< 10 Mbps RGMII */
  76462. + e_ENET_MODE_RGMII_100 = (e_ENET_IF_RGMII | e_ENET_SPEED_100), /**< 100 Mbps RGMII */
  76463. + e_ENET_MODE_RGMII_1000 = (e_ENET_IF_RGMII | e_ENET_SPEED_1000), /**< 1000 Mbps RGMII */
  76464. + e_ENET_MODE_TBI_1000 = (e_ENET_IF_TBI | e_ENET_SPEED_1000), /**< 1000 Mbps TBI */
  76465. + e_ENET_MODE_RTBI_1000 = (e_ENET_IF_RTBI | e_ENET_SPEED_1000), /**< 1000 Mbps RTBI */
  76466. + e_ENET_MODE_SGMII_10 = (e_ENET_IF_SGMII | e_ENET_SPEED_10),
  76467. + /**< 10 Mbps SGMII with auto-negotiation between MAC and
  76468. + SGMII phy according to Cisco SGMII specification */
  76469. + e_ENET_MODE_SGMII_100 = (e_ENET_IF_SGMII | e_ENET_SPEED_100),
  76470. + /**< 100 Mbps SGMII with auto-negotiation between MAC and
  76471. + SGMII phy according to Cisco SGMII specification */
  76472. + e_ENET_MODE_SGMII_1000 = (e_ENET_IF_SGMII | e_ENET_SPEED_1000),
  76473. + /**< 1000 Mbps SGMII with auto-negotiation between MAC and
  76474. + SGMII phy according to Cisco SGMII specification */
  76475. + e_ENET_MODE_SGMII_2500 = (e_ENET_IF_SGMII | e_ENET_SPEED_2500),
  76476. + e_ENET_MODE_SGMII_BASEX_10 = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_10),
  76477. + /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between
  76478. + MAC and SGMII phy or backplane */
  76479. + e_ENET_MODE_SGMII_BASEX_100 = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_100),
  76480. + /**< 100 Mbps SGMII with 1000BaseX auto-negotiation between
  76481. + MAC and SGMII phy or backplane */
  76482. + e_ENET_MODE_SGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | e_ENET_IF_SGMII | e_ENET_SPEED_1000),
  76483. + /**< 1000 Mbps SGMII with 1000BaseX auto-negotiation between
  76484. + MAC and SGMII phy or backplane */
  76485. + e_ENET_MODE_QSGMII_1000 = (e_ENET_IF_QSGMII| e_ENET_SPEED_1000),
  76486. + /**< 1000 Mbps QSGMII with auto-negotiation between MAC and
  76487. + QSGMII phy according to Cisco QSGMII specification */
  76488. + e_ENET_MODE_QSGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | e_ENET_IF_QSGMII| e_ENET_SPEED_1000),
  76489. + /**< 1000 Mbps QSGMII with 1000BaseX auto-negotiation between
  76490. + MAC and QSGMII phy or backplane */
  76491. + e_ENET_MODE_XGMII_10000 = (e_ENET_IF_XGMII | e_ENET_SPEED_10000), /**< 10000 Mbps XGMII */
  76492. + e_ENET_MODE_XFI_10000 = (e_ENET_IF_XFI | e_ENET_SPEED_10000) /**< 10000 Mbps XFI */
  76493. +} e_EnetMode;
  76494. +
  76495. +
  76496. +#define IS_ENET_MODE_VALID(mode) \
  76497. + (((mode) == e_ENET_MODE_MII_10 ) || \
  76498. + ((mode) == e_ENET_MODE_MII_100 ) || \
  76499. + ((mode) == e_ENET_MODE_RMII_10 ) || \
  76500. + ((mode) == e_ENET_MODE_RMII_100 ) || \
  76501. + ((mode) == e_ENET_MODE_SMII_10 ) || \
  76502. + ((mode) == e_ENET_MODE_SMII_100 ) || \
  76503. + ((mode) == e_ENET_MODE_GMII_1000 ) || \
  76504. + ((mode) == e_ENET_MODE_RGMII_10 ) || \
  76505. + ((mode) == e_ENET_MODE_RGMII_100 ) || \
  76506. + ((mode) == e_ENET_MODE_RGMII_1000 ) || \
  76507. + ((mode) == e_ENET_MODE_TBI_1000 ) || \
  76508. + ((mode) == e_ENET_MODE_RTBI_1000 ) || \
  76509. + ((mode) == e_ENET_MODE_SGMII_10 ) || \
  76510. + ((mode) == e_ENET_MODE_SGMII_100 ) || \
  76511. + ((mode) == e_ENET_MODE_SGMII_1000 ) || \
  76512. + ((mode) == e_ENET_MODE_SGMII_BASEX_10 ) || \
  76513. + ((mode) == e_ENET_MODE_SGMII_BASEX_100 ) || \
  76514. + ((mode) == e_ENET_MODE_SGMII_BASEX_1000 ) || \
  76515. + ((mode) == e_ENET_MODE_XGMII_10000) || \
  76516. + ((mode) == e_ENET_MODE_QSGMII_1000) || \
  76517. + ((mode) == e_ENET_MODE_QSGMII_BASEX_1000) || \
  76518. + ((mode) == e_ENET_MODE_XFI_10000))
  76519. +
  76520. +
  76521. +#define MAKE_ENET_MODE(_interface, _speed) (e_EnetMode)((_interface) | (_speed))
  76522. +
  76523. +#define ENET_INTERFACE_FROM_MODE(mode) (e_EnetInterface)((mode) & 0x0FFF0000)
  76524. +#define ENET_SPEED_FROM_MODE(mode) (e_EnetSpeed)((mode) & 0x0000FFFF)
  76525. +
  76526. +#define ENET_ADDR_TO_UINT64(_enetAddr) \
  76527. + (uint64_t)(((uint64_t)(_enetAddr)[0] << 40) | \
  76528. + ((uint64_t)(_enetAddr)[1] << 32) | \
  76529. + ((uint64_t)(_enetAddr)[2] << 24) | \
  76530. + ((uint64_t)(_enetAddr)[3] << 16) | \
  76531. + ((uint64_t)(_enetAddr)[4] << 8) | \
  76532. + ((uint64_t)(_enetAddr)[5]))
  76533. +
  76534. +#define MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enetAddr) \
  76535. + do { \
  76536. + int i; \
  76537. + for (i=0; i < ENET_NUM_OCTETS_PER_ADDRESS; i++) \
  76538. + (_enetAddr)[i] = (uint8_t)((_addr64) >> ((5-i)*8)); \
  76539. + } while (0)
  76540. +
  76541. +
  76542. +#endif /* __ENET_EXT_H */
  76543. --- /dev/null
  76544. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/error_ext.h
  76545. @@ -0,0 +1,529 @@
  76546. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  76547. + * All rights reserved.
  76548. + *
  76549. + * Redistribution and use in source and binary forms, with or without
  76550. + * modification, are permitted provided that the following conditions are met:
  76551. + * * Redistributions of source code must retain the above copyright
  76552. + * notice, this list of conditions and the following disclaimer.
  76553. + * * Redistributions in binary form must reproduce the above copyright
  76554. + * notice, this list of conditions and the following disclaimer in the
  76555. + * documentation and/or other materials provided with the distribution.
  76556. + * * Neither the name of Freescale Semiconductor nor the
  76557. + * names of its contributors may be used to endorse or promote products
  76558. + * derived from this software without specific prior written permission.
  76559. + *
  76560. + *
  76561. + * ALTERNATIVELY, this software may be distributed under the terms of the
  76562. + * GNU General Public License ("GPL") as published by the Free Software
  76563. + * Foundation, either version 2 of that License or (at your option) any
  76564. + * later version.
  76565. + *
  76566. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  76567. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  76568. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  76569. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  76570. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  76571. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  76572. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  76573. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  76574. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  76575. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  76576. + */
  76577. +
  76578. +
  76579. +/**************************************************************************//**
  76580. + @File error_ext.h
  76581. +
  76582. + @Description Error definitions.
  76583. +*//***************************************************************************/
  76584. +
  76585. +#ifndef __ERROR_EXT_H
  76586. +#define __ERROR_EXT_H
  76587. +
  76588. +#if !defined(NCSW_LINUX)
  76589. +#include <errno.h>
  76590. +#endif
  76591. +
  76592. +#include "std_ext.h"
  76593. +#include "xx_ext.h"
  76594. +#include "core_ext.h"
  76595. +
  76596. +
  76597. +
  76598. +
  76599. +/**************************************************************************//**
  76600. + @Group gen_id General Drivers Utilities
  76601. +
  76602. + @Description External routines.
  76603. +
  76604. + @{
  76605. +*//***************************************************************************/
  76606. +
  76607. +/**************************************************************************//**
  76608. + @Group gen_error_id Errors, Events and Debug
  76609. +
  76610. + @Description External routines.
  76611. +
  76612. + @{
  76613. +*//***************************************************************************/
  76614. +
  76615. +/******************************************************************************
  76616. +The scheme below provides the bits description for error codes:
  76617. +
  76618. + 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
  76619. +| Reserved (should be zero) | Module ID |
  76620. +
  76621. + 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
  76622. +| Error Type |
  76623. +******************************************************************************/
  76624. +
  76625. +#define ERROR_CODE(_err) ((((uint32_t)_err) & 0x0000FFFF) | __ERR_MODULE__)
  76626. +
  76627. +#define GET_ERROR_TYPE(_errcode) ((_errcode) & 0x0000FFFF)
  76628. + /**< Extract module code from error code (#t_Error) */
  76629. +
  76630. +#define GET_ERROR_MODULE(_errcode) ((_errcode) & 0x00FF0000)
  76631. + /**< Extract error type (#e_ErrorType) from
  76632. + error code (#t_Error) */
  76633. +
  76634. +
  76635. +/**************************************************************************//**
  76636. + @Description Error Type Enumeration
  76637. +*//***************************************************************************/
  76638. +typedef enum e_ErrorType /* Comments / Associated Message Strings */
  76639. +{ /* ------------------------------------------------------------ */
  76640. + E_OK = 0 /* Never use "RETURN_ERROR" with E_OK; Use "return E_OK;" */
  76641. + ,E_WRITE_FAILED = EIO /**< Write access failed on memory/device. */
  76642. + /* String: none, or device name. */
  76643. + ,E_NO_DEVICE = ENXIO /**< The associated device is not initialized. */
  76644. + /* String: none. */
  76645. + ,E_NOT_AVAILABLE = EAGAIN
  76646. + /**< Resource is unavailable. */
  76647. + /* String: none, unless the operation is not the main goal
  76648. + of the function (in this case add resource description). */
  76649. + ,E_NO_MEMORY = ENOMEM /**< External memory allocation failed. */
  76650. + /* String: description of item for which allocation failed. */
  76651. + ,E_INVALID_ADDRESS = EFAULT
  76652. + /**< Invalid address. */
  76653. + /* String: description of the specific violation. */
  76654. + ,E_BUSY = EBUSY /**< Resource or module is busy. */
  76655. + /* String: none, unless the operation is not the main goal
  76656. + of the function (in this case add resource description). */
  76657. + ,E_ALREADY_EXISTS = EEXIST
  76658. + /**< Requested resource or item already exists. */
  76659. + /* Use when resource duplication or sharing are not allowed.
  76660. + String: none, unless the operation is not the main goal
  76661. + of the function (in this case add item description). */
  76662. + ,E_INVALID_OPERATION = ENODEV
  76663. + /**< The operation/command is invalid (unrecognized). */
  76664. + /* String: none. */
  76665. + ,E_INVALID_VALUE = EDOM /**< Invalid value. */
  76666. + /* Use for non-enumeration parameters, and
  76667. + only when other error types are not suitable.
  76668. + String: parameter description + "(should be <attribute>)",
  76669. + e.g: "Maximum Rx buffer length (should be divisible by 8)",
  76670. + "Channel number (should be even)". */
  76671. + ,E_NOT_IN_RANGE = ERANGE/**< Parameter value is out of range. */
  76672. + /* Don't use this error for enumeration parameters.
  76673. + String: parameter description + "(should be %d-%d)",
  76674. + e.g: "Number of pad characters (should be 0-15)". */
  76675. + ,E_NOT_SUPPORTED = ENOSYS
  76676. + /**< The function is not supported or not implemented. */
  76677. + /* String: none. */
  76678. + ,E_INVALID_STATE /**< The operation is not allowed in current module state. */
  76679. + /* String: none. */
  76680. + ,E_INVALID_HANDLE /**< Invalid handle of module or object. */
  76681. + /* String: none, unless the function takes in more than one
  76682. + handle (in this case add the handle description) */
  76683. + ,E_INVALID_ID /**< Invalid module ID (usually enumeration or index). */
  76684. + /* String: none, unless the function takes in more than one
  76685. + ID (in this case add the ID description) */
  76686. + ,E_NULL_POINTER /**< Unexpected NULL pointer. */
  76687. + /* String: pointer description. */
  76688. + ,E_INVALID_SELECTION /**< Invalid selection or mode. */
  76689. + /* Use for enumeration values, only when other error types
  76690. + are not suitable.
  76691. + String: parameter description. */
  76692. + ,E_INVALID_COMM_MODE /**< Invalid communication mode. */
  76693. + /* String: none, unless the function takes in more than one
  76694. + communication mode indications (in this case add
  76695. + parameter description). */
  76696. + ,E_INVALID_MEMORY_TYPE /**< Invalid memory type. */
  76697. + /* String: none, unless the function takes in more than one
  76698. + memory types (in this case add memory description,
  76699. + e.g: "Data memory", "Buffer descriptors memory"). */
  76700. + ,E_INVALID_CLOCK /**< Invalid clock. */
  76701. + /* String: none, unless the function takes in more than one
  76702. + clocks (in this case add clock description,
  76703. + e.g: "Rx clock", "Tx clock"). */
  76704. + ,E_CONFLICT /**< Some setting conflicts with another setting. */
  76705. + /* String: description of the conflicting settings. */
  76706. + ,E_NOT_ALIGNED /**< Non-aligned address. */
  76707. + /* String: parameter description + "(should be %d-bytes aligned)",
  76708. + e.g: "Rx data buffer (should be 32-bytes aligned)". */
  76709. + ,E_NOT_FOUND /**< Requested resource or item was not found. */
  76710. + /* Use only when the resource/item is uniquely identified.
  76711. + String: none, unless the operation is not the main goal
  76712. + of the function (in this case add item description). */
  76713. + ,E_FULL /**< Resource is full. */
  76714. + /* String: none, unless the operation is not the main goal
  76715. + of the function (in this case add resource description). */
  76716. + ,E_EMPTY /**< Resource is empty. */
  76717. + /* String: none, unless the operation is not the main goal
  76718. + of the function (in this case add resource description). */
  76719. + ,E_ALREADY_FREE /**< Specified resource or item is already free or deleted. */
  76720. + /* String: none, unless the operation is not the main goal
  76721. + of the function (in this case add item description). */
  76722. + ,E_READ_FAILED /**< Read access failed on memory/device. */
  76723. + /* String: none, or device name. */
  76724. + ,E_INVALID_FRAME /**< Invalid frame object (NULL handle or missing buffers). */
  76725. + /* String: none. */
  76726. + ,E_SEND_FAILED /**< Send operation failed on device. */
  76727. + /* String: none, or device name. */
  76728. + ,E_RECEIVE_FAILED /**< Receive operation failed on device. */
  76729. + /* String: none, or device name. */
  76730. + ,E_TIMEOUT/* = ETIMEDOUT*/ /**< The operation timed out. */
  76731. + /* String: none. */
  76732. +
  76733. + ,E_DUMMY_LAST /* NEVER USED */
  76734. +
  76735. +} e_ErrorType;
  76736. +
  76737. +/**************************************************************************//**
  76738. + @Description Event Type Enumeration
  76739. +*//***************************************************************************/
  76740. +typedef enum e_Event /* Comments / Associated Flags and Message Strings */
  76741. +{ /* ------------------------------------------------------------ */
  76742. + EV_NO_EVENT = 0 /**< No event; Never used. */
  76743. +
  76744. + ,EV_RX_DISCARD /**< Received packet discarded (by the driver, and only for
  76745. + complete packets);
  76746. + Flags: error flags in case of error, zero otherwise. */
  76747. + /* String: reason for discard, e.g: "Error in frame",
  76748. + "Disordered frame", "Incomplete frame", "No frame object". */
  76749. + ,EV_RX_ERROR /**< Receive error (by hardware/firmware);
  76750. + Flags: usually status flags from the buffer descriptor. */
  76751. + /* String: none. */
  76752. + ,EV_TX_ERROR /**< Transmit error (by hardware/firmware);
  76753. + Flags: usually status flags from the buffer descriptor. */
  76754. + /* String: none. */
  76755. + ,EV_NO_BUFFERS /**< System ran out of buffer objects;
  76756. + Flags: zero. */
  76757. + /* String: none. */
  76758. + ,EV_NO_MB_FRAMES /**< System ran out of multi-buffer frame objects;
  76759. + Flags: zero. */
  76760. + /* String: none. */
  76761. + ,EV_NO_SB_FRAMES /**< System ran out of single-buffer frame objects;
  76762. + Flags: zero. */
  76763. + /* String: none. */
  76764. + ,EV_TX_QUEUE_FULL /**< Transmit queue is full;
  76765. + Flags: zero. */
  76766. + /* String: none. */
  76767. + ,EV_RX_QUEUE_FULL /**< Receive queue is full;
  76768. + Flags: zero. */
  76769. + /* String: none. */
  76770. + ,EV_INTR_QUEUE_FULL /**< Interrupt queue overflow;
  76771. + Flags: zero. */
  76772. + /* String: none. */
  76773. + ,EV_NO_DATA_BUFFER /**< Data buffer allocation (from higher layer) failed;
  76774. + Flags: zero. */
  76775. + /* String: none. */
  76776. + ,EV_OBJ_POOL_EMPTY /**< Objects pool is empty;
  76777. + Flags: zero. */
  76778. + /* String: object description (name). */
  76779. + ,EV_BUS_ERROR /**< Illegal access on bus;
  76780. + Flags: the address (if available) or bus identifier */
  76781. + /* String: bus/address/module description. */
  76782. + ,EV_PTP_TXTS_QUEUE_FULL /**< PTP Tx timestamps queue is full;
  76783. + Flags: zero. */
  76784. + /* String: none. */
  76785. + ,EV_PTP_RXTS_QUEUE_FULL /**< PTP Rx timestamps queue is full;
  76786. + Flags: zero. */
  76787. + /* String: none. */
  76788. + ,EV_DUMMY_LAST
  76789. +
  76790. +} e_Event;
  76791. +
  76792. +
  76793. +/**************************************************************************//**
  76794. + @Collection Debug Levels for Errors and Events
  76795. +
  76796. + The level description refers to errors only.
  76797. + For events, classification is done by the user.
  76798. +
  76799. + The TRACE, INFO and WARNING levels are allowed only when using
  76800. + the DBG macro, and are not allowed when using the error macros
  76801. + (RETURN_ERROR or REPORT_ERROR).
  76802. + @{
  76803. +*//***************************************************************************/
  76804. +#define REPORT_LEVEL_CRITICAL 1 /**< Crasher: Incorrect flow, NULL pointers/handles. */
  76805. +#define REPORT_LEVEL_MAJOR 2 /**< Cannot proceed: Invalid operation, parameters or
  76806. + configuration. */
  76807. +#define REPORT_LEVEL_MINOR 3 /**< Recoverable problem: a repeating call with the same
  76808. + parameters may be successful. */
  76809. +#define REPORT_LEVEL_WARNING 4 /**< Something is not exactly right, yet it is not an error. */
  76810. +#define REPORT_LEVEL_INFO 5 /**< Messages which may be of interest to user/programmer. */
  76811. +#define REPORT_LEVEL_TRACE 6 /**< Program flow messages. */
  76812. +
  76813. +#define EVENT_DISABLED 0xFF /**< Disabled event (not reported at all) */
  76814. +
  76815. +/* @} */
  76816. +
  76817. +
  76818. +
  76819. +#define NO_MSG ("")
  76820. +
  76821. +#ifndef DEBUG_GLOBAL_LEVEL
  76822. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING
  76823. +#endif /* DEBUG_GLOBAL_LEVEL */
  76824. +
  76825. +#ifndef ERROR_GLOBAL_LEVEL
  76826. +#define ERROR_GLOBAL_LEVEL DEBUG_GLOBAL_LEVEL
  76827. +#endif /* ERROR_GLOBAL_LEVEL */
  76828. +
  76829. +#ifndef EVENT_GLOBAL_LEVEL
  76830. +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR
  76831. +#endif /* EVENT_GLOBAL_LEVEL */
  76832. +
  76833. +#ifdef EVENT_LOCAL_LEVEL
  76834. +#define EVENT_DYNAMIC_LEVEL EVENT_LOCAL_LEVEL
  76835. +#else
  76836. +#define EVENT_DYNAMIC_LEVEL EVENT_GLOBAL_LEVEL
  76837. +#endif /* EVENT_LOCAL_LEVEL */
  76838. +
  76839. +
  76840. +#ifndef DEBUG_DYNAMIC_LEVEL
  76841. +#define DEBUG_USING_STATIC_LEVEL
  76842. +
  76843. +#ifdef DEBUG_STATIC_LEVEL
  76844. +#define DEBUG_DYNAMIC_LEVEL DEBUG_STATIC_LEVEL
  76845. +#else
  76846. +#define DEBUG_DYNAMIC_LEVEL DEBUG_GLOBAL_LEVEL
  76847. +#endif /* DEBUG_STATIC_LEVEL */
  76848. +
  76849. +#else /* DEBUG_DYNAMIC_LEVEL */
  76850. +#ifdef DEBUG_STATIC_LEVEL
  76851. +#error "Please use either DEBUG_STATIC_LEVEL or DEBUG_DYNAMIC_LEVEL (not both)"
  76852. +#else
  76853. +int DEBUG_DYNAMIC_LEVEL = DEBUG_GLOBAL_LEVEL;
  76854. +#endif /* DEBUG_STATIC_LEVEL */
  76855. +#endif /* !DEBUG_DYNAMIC_LEVEL */
  76856. +
  76857. +
  76858. +#ifndef ERROR_DYNAMIC_LEVEL
  76859. +
  76860. +#ifdef ERROR_STATIC_LEVEL
  76861. +#define ERROR_DYNAMIC_LEVEL ERROR_STATIC_LEVEL
  76862. +#else
  76863. +#define ERROR_DYNAMIC_LEVEL ERROR_GLOBAL_LEVEL
  76864. +#endif /* ERROR_STATIC_LEVEL */
  76865. +
  76866. +#else /* ERROR_DYNAMIC_LEVEL */
  76867. +#ifdef ERROR_STATIC_LEVEL
  76868. +#error "Please use either ERROR_STATIC_LEVEL or ERROR_DYNAMIC_LEVEL (not both)"
  76869. +#else
  76870. +int ERROR_DYNAMIC_LEVEL = ERROR_GLOBAL_LEVEL;
  76871. +#endif /* ERROR_STATIC_LEVEL */
  76872. +#endif /* !ERROR_DYNAMIC_LEVEL */
  76873. +
  76874. +#define PRINT_FORMAT "[CPU%02d, %s:%d %s]"
  76875. +#define PRINT_FMT_PARAMS raw_smp_processor_id(), __FILE__, __LINE__, __FUNCTION__
  76876. +
  76877. +#if (!(defined(DEBUG_ERRORS)) || (DEBUG_ERRORS == 0))
  76878. +/* No debug/error/event messages at all */
  76879. +#define DBG(_level, _vmsg)
  76880. +
  76881. +#define REPORT_ERROR(_level, _err, _vmsg)
  76882. +
  76883. +#define RETURN_ERROR(_level, _err, _vmsg) \
  76884. + return ERROR_CODE(_err)
  76885. +
  76886. +#if (REPORT_EVENTS > 0)
  76887. +
  76888. +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \
  76889. + do { \
  76890. + if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \
  76891. + XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \
  76892. + } \
  76893. + } while (0)
  76894. +
  76895. +#else
  76896. +
  76897. +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg)
  76898. +
  76899. +#endif /* (REPORT_EVENTS > 0) */
  76900. +
  76901. +
  76902. +#else /* DEBUG_ERRORS > 0 */
  76903. +
  76904. +extern const char *dbgLevelStrings[];
  76905. +extern const char *moduleStrings[];
  76906. +#if (REPORT_EVENTS > 0)
  76907. +extern const char *eventStrings[];
  76908. +#endif /* (REPORT_EVENTS > 0) */
  76909. +
  76910. +char * ErrTypeStrings (e_ErrorType err);
  76911. +
  76912. +
  76913. +#if ((defined(DEBUG_USING_STATIC_LEVEL)) && (DEBUG_DYNAMIC_LEVEL < REPORT_LEVEL_WARNING))
  76914. +/* No need for DBG macro - debug level is higher anyway */
  76915. +#define DBG(_level, _vmsg)
  76916. +#else
  76917. +#define DBG(_level, _vmsg) \
  76918. + do { \
  76919. + if (REPORT_LEVEL_##_level <= DEBUG_DYNAMIC_LEVEL) { \
  76920. + XX_Print("> %s (%s) " PRINT_FORMAT ": ", \
  76921. + dbgLevelStrings[REPORT_LEVEL_##_level - 1], \
  76922. + moduleStrings[__ERR_MODULE__ >> 16], \
  76923. + PRINT_FMT_PARAMS); \
  76924. + XX_Print _vmsg; \
  76925. + XX_Print("\r\n"); \
  76926. + } \
  76927. + } while (0)
  76928. +#endif /* (defined(DEBUG_USING_STATIC_LEVEL) && (DEBUG_DYNAMIC_LEVEL < WARNING)) */
  76929. +
  76930. +
  76931. +#define REPORT_ERROR(_level, _err, _vmsg) \
  76932. + do { \
  76933. + if (REPORT_LEVEL_##_level <= ERROR_DYNAMIC_LEVEL) { \
  76934. + XX_Print("! %s %s Error " PRINT_FORMAT ": %s; ", \
  76935. + dbgLevelStrings[REPORT_LEVEL_##_level - 1], \
  76936. + moduleStrings[__ERR_MODULE__ >> 16], \
  76937. + PRINT_FMT_PARAMS, \
  76938. + ErrTypeStrings((e_ErrorType)GET_ERROR_TYPE(_err))); \
  76939. + XX_Print _vmsg; \
  76940. + XX_Print("\r\n"); \
  76941. + } \
  76942. + } while (0)
  76943. +
  76944. +
  76945. +#define RETURN_ERROR(_level, _err, _vmsg) \
  76946. + do { \
  76947. + REPORT_ERROR(_level, (_err), _vmsg); \
  76948. + return ERROR_CODE(_err); \
  76949. + } while (0)
  76950. +
  76951. +
  76952. +#if (REPORT_EVENTS > 0)
  76953. +
  76954. +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg) \
  76955. + do { \
  76956. + if (_ev##_LEVEL <= EVENT_DYNAMIC_LEVEL) { \
  76957. + XX_Print("~ %s %s Event " PRINT_FORMAT ": %s (flags: 0x%04x); ", \
  76958. + dbgLevelStrings[_ev##_LEVEL - 1], \
  76959. + moduleStrings[__ERR_MODULE__ >> 16], \
  76960. + PRINT_FMT_PARAMS, \
  76961. + eventStrings[((_ev) - EV_NO_EVENT - 1)], \
  76962. + (uint16_t)(_flg)); \
  76963. + XX_Print _vmsg; \
  76964. + XX_Print("\r\n"); \
  76965. + XX_EventById((uint32_t)(_ev), (t_Handle)(_appId), (uint16_t)(_flg), NO_MSG); \
  76966. + } \
  76967. + } while (0)
  76968. +
  76969. +#else /* not REPORT_EVENTS */
  76970. +
  76971. +#define REPORT_EVENT(_ev, _appId, _flg, _vmsg)
  76972. +
  76973. +#endif /* (REPORT_EVENTS > 0) */
  76974. +
  76975. +#endif /* (DEBUG_ERRORS > 0) */
  76976. +
  76977. +
  76978. +/**************************************************************************//**
  76979. + @Function ASSERT_COND
  76980. +
  76981. + @Description Assertion macro.
  76982. +
  76983. + @Param[in] _cond - The condition being checked, in positive form;
  76984. + Failure of the condition triggers the assert.
  76985. +*//***************************************************************************/
  76986. +#ifdef DISABLE_ASSERTIONS
  76987. +#define ASSERT_COND(_cond)
  76988. +#else
  76989. +#define ASSERT_COND(_cond) \
  76990. + do { \
  76991. + if (!(_cond)) { \
  76992. + XX_Print("*** ASSERT_COND failed " PRINT_FORMAT "\r\n", \
  76993. + PRINT_FMT_PARAMS); \
  76994. + XX_Exit(1); \
  76995. + } \
  76996. + } while (0)
  76997. +#endif /* DISABLE_ASSERTIONS */
  76998. +
  76999. +
  77000. +#ifdef DISABLE_INIT_PARAMETERS_CHECK
  77001. +
  77002. +#define CHECK_INIT_PARAMETERS(handle, f_check)
  77003. +#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval)
  77004. +
  77005. +#else
  77006. +
  77007. +#define CHECK_INIT_PARAMETERS(handle, f_check) \
  77008. + do { \
  77009. + t_Error err = f_check(handle); \
  77010. + if (err != E_OK) { \
  77011. + RETURN_ERROR(MAJOR, err, NO_MSG); \
  77012. + } \
  77013. + } while (0)
  77014. +
  77015. +#define CHECK_INIT_PARAMETERS_RETURN_VALUE(handle, f_check, retval) \
  77016. + do { \
  77017. + t_Error err = f_check(handle); \
  77018. + if (err != E_OK) { \
  77019. + REPORT_ERROR(MAJOR, err, NO_MSG); \
  77020. + return (retval); \
  77021. + } \
  77022. + } while (0)
  77023. +
  77024. +#endif /* DISABLE_INIT_PARAMETERS_CHECK */
  77025. +
  77026. +#ifdef DISABLE_SANITY_CHECKS
  77027. +
  77028. +#define SANITY_CHECK_RETURN_ERROR(_cond, _err)
  77029. +#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval)
  77030. +#define SANITY_CHECK_RETURN(_cond, _err)
  77031. +#define SANITY_CHECK_EXIT(_cond, _err)
  77032. +
  77033. +#else /* DISABLE_SANITY_CHECKS */
  77034. +
  77035. +#define SANITY_CHECK_RETURN_ERROR(_cond, _err) \
  77036. + do { \
  77037. + if (!(_cond)) { \
  77038. + RETURN_ERROR(CRITICAL, (_err), NO_MSG); \
  77039. + } \
  77040. + } while (0)
  77041. +
  77042. +#define SANITY_CHECK_RETURN_VALUE(_cond, _err, retval) \
  77043. + do { \
  77044. + if (!(_cond)) { \
  77045. + REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
  77046. + return (retval); \
  77047. + } \
  77048. + } while (0)
  77049. +
  77050. +#define SANITY_CHECK_RETURN(_cond, _err) \
  77051. + do { \
  77052. + if (!(_cond)) { \
  77053. + REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
  77054. + return; \
  77055. + } \
  77056. + } while (0)
  77057. +
  77058. +#define SANITY_CHECK_EXIT(_cond, _err) \
  77059. + do { \
  77060. + if (!(_cond)) { \
  77061. + REPORT_ERROR(CRITICAL, (_err), NO_MSG); \
  77062. + XX_Exit(1); \
  77063. + } \
  77064. + } while (0)
  77065. +
  77066. +#endif /* DISABLE_SANITY_CHECKS */
  77067. +
  77068. +/** @} */ /* end of Debug/error Utils group */
  77069. +
  77070. +/** @} */ /* end of General Utils group */
  77071. +
  77072. +#endif /* __ERROR_EXT_H */
  77073. +
  77074. +
  77075. --- /dev/null
  77076. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/list_ext.h
  77077. @@ -0,0 +1,358 @@
  77078. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  77079. + * All rights reserved.
  77080. + *
  77081. + * Redistribution and use in source and binary forms, with or without
  77082. + * modification, are permitted provided that the following conditions are met:
  77083. + * * Redistributions of source code must retain the above copyright
  77084. + * notice, this list of conditions and the following disclaimer.
  77085. + * * Redistributions in binary form must reproduce the above copyright
  77086. + * notice, this list of conditions and the following disclaimer in the
  77087. + * documentation and/or other materials provided with the distribution.
  77088. + * * Neither the name of Freescale Semiconductor nor the
  77089. + * names of its contributors may be used to endorse or promote products
  77090. + * derived from this software without specific prior written permission.
  77091. + *
  77092. + *
  77093. + * ALTERNATIVELY, this software may be distributed under the terms of the
  77094. + * GNU General Public License ("GPL") as published by the Free Software
  77095. + * Foundation, either version 2 of that License or (at your option) any
  77096. + * later version.
  77097. + *
  77098. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  77099. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  77100. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  77101. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  77102. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  77103. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  77104. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  77105. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  77106. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  77107. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  77108. + */
  77109. +
  77110. +
  77111. +/**************************************************************************//**
  77112. +
  77113. + @File list_ext.h
  77114. +
  77115. + @Description External prototypes for list.c
  77116. +*//***************************************************************************/
  77117. +
  77118. +#ifndef __LIST_EXT_H
  77119. +#define __LIST_EXT_H
  77120. +
  77121. +
  77122. +#include "std_ext.h"
  77123. +
  77124. +
  77125. +/**************************************************************************//**
  77126. + @Group etc_id Utility Library Application Programming Interface
  77127. +
  77128. + @Description External routines.
  77129. +
  77130. + @{
  77131. +*//***************************************************************************/
  77132. +
  77133. +/**************************************************************************//**
  77134. + @Group list_id List
  77135. +
  77136. + @Description List module functions,definitions and enums.
  77137. +
  77138. + @{
  77139. +*//***************************************************************************/
  77140. +
  77141. +/**************************************************************************//**
  77142. + @Description List structure.
  77143. +*//***************************************************************************/
  77144. +typedef struct List
  77145. +{
  77146. + struct List *p_Next; /**< A pointer to the next list object */
  77147. + struct List *p_Prev; /**< A pointer to the previous list object */
  77148. +} t_List;
  77149. +
  77150. +
  77151. +/**************************************************************************//**
  77152. + @Function LIST_FIRST/LIST_LAST/LIST_NEXT/LIST_PREV
  77153. +
  77154. + @Description Macro to get first/last/next/previous entry in a list.
  77155. +
  77156. + @Param[in] p_List - A pointer to a list.
  77157. +*//***************************************************************************/
  77158. +#define LIST_FIRST(p_List) (p_List)->p_Next
  77159. +#define LIST_LAST(p_List) (p_List)->p_Prev
  77160. +#define LIST_NEXT LIST_FIRST
  77161. +#define LIST_PREV LIST_LAST
  77162. +
  77163. +
  77164. +/**************************************************************************//**
  77165. + @Function LIST_INIT
  77166. +
  77167. + @Description Macro for initialization of a list struct.
  77168. +
  77169. + @Param[in] lst - The t_List object to initialize.
  77170. +*//***************************************************************************/
  77171. +#define LIST_INIT(lst) {&(lst), &(lst)}
  77172. +
  77173. +
  77174. +/**************************************************************************//**
  77175. + @Function LIST
  77176. +
  77177. + @Description Macro to declare of a list.
  77178. +
  77179. + @Param[in] listName - The list object name.
  77180. +*//***************************************************************************/
  77181. +#define LIST(listName) t_List listName = LIST_INIT(listName)
  77182. +
  77183. +
  77184. +/**************************************************************************//**
  77185. + @Function INIT_LIST
  77186. +
  77187. + @Description Macro to initialize a list pointer.
  77188. +
  77189. + @Param[in] p_List - The list pointer.
  77190. +*//***************************************************************************/
  77191. +#define INIT_LIST(p_List) LIST_FIRST(p_List) = LIST_LAST(p_List) = (p_List)
  77192. +
  77193. +
  77194. +/**************************************************************************//**
  77195. + @Function LIST_OBJECT
  77196. +
  77197. + @Description Macro to get the struct (object) for this entry.
  77198. +
  77199. + @Param[in] type - The type of the struct (object) this list is embedded in.
  77200. + @Param[in] member - The name of the t_List object within the struct.
  77201. +
  77202. + @Return The structure pointer for this entry.
  77203. +*//***************************************************************************/
  77204. +#define MEMBER_OFFSET(type, member) (PTR_TO_UINT(&((type *)0)->member))
  77205. +#define LIST_OBJECT(p_List, type, member) \
  77206. + ((type *)((char *)(p_List)-MEMBER_OFFSET(type, member)))
  77207. +
  77208. +
  77209. +/**************************************************************************//**
  77210. + @Function LIST_FOR_EACH
  77211. +
  77212. + @Description Macro to iterate over a list.
  77213. +
  77214. + @Param[in] p_Pos - A pointer to a list to use as a loop counter.
  77215. + @Param[in] p_Head - A pointer to the head for your list pointer.
  77216. +
  77217. + @Cautions You can't delete items with this routine.
  77218. + For deletion use LIST_FOR_EACH_SAFE().
  77219. +*//***************************************************************************/
  77220. +#define LIST_FOR_EACH(p_Pos, p_Head) \
  77221. + for (p_Pos = LIST_FIRST(p_Head); p_Pos != (p_Head); p_Pos = LIST_NEXT(p_Pos))
  77222. +
  77223. +
  77224. +/**************************************************************************//**
  77225. + @Function LIST_FOR_EACH_SAFE
  77226. +
  77227. + @Description Macro to iterate over a list safe against removal of list entry.
  77228. +
  77229. + @Param[in] p_Pos - A pointer to a list to use as a loop counter.
  77230. + @Param[in] p_Tmp - Another pointer to a list to use as temporary storage.
  77231. + @Param[in] p_Head - A pointer to the head for your list pointer.
  77232. +*//***************************************************************************/
  77233. +#define LIST_FOR_EACH_SAFE(p_Pos, p_Tmp, p_Head) \
  77234. + for (p_Pos = LIST_FIRST(p_Head), p_Tmp = LIST_FIRST(p_Pos); \
  77235. + p_Pos != (p_Head); \
  77236. + p_Pos = p_Tmp, p_Tmp = LIST_NEXT(p_Pos))
  77237. +
  77238. +
  77239. +/**************************************************************************//**
  77240. + @Function LIST_FOR_EACH_OBJECT_SAFE
  77241. +
  77242. + @Description Macro to iterate over list of given type safely.
  77243. +
  77244. + @Param[in] p_Pos - A pointer to a list to use as a loop counter.
  77245. + @Param[in] p_Tmp - Another pointer to a list to use as temporary storage.
  77246. + @Param[in] type - The type of the struct this is embedded in.
  77247. + @Param[in] p_Head - A pointer to the head for your list pointer.
  77248. + @Param[in] member - The name of the list_struct within the struct.
  77249. +
  77250. + @Cautions You can't delete items with this routine.
  77251. + For deletion use LIST_FOR_EACH_SAFE().
  77252. +*//***************************************************************************/
  77253. +#define LIST_FOR_EACH_OBJECT_SAFE(p_Pos, p_Tmp, p_Head, type, member) \
  77254. + for (p_Pos = LIST_OBJECT(LIST_FIRST(p_Head), type, member), \
  77255. + p_Tmp = LIST_OBJECT(LIST_FIRST(&p_Pos->member), type, member); \
  77256. + &p_Pos->member != (p_Head); \
  77257. + p_Pos = p_Tmp, \
  77258. + p_Tmp = LIST_OBJECT(LIST_FIRST(&p_Pos->member), type, member))
  77259. +
  77260. +/**************************************************************************//**
  77261. + @Function LIST_FOR_EACH_OBJECT
  77262. +
  77263. + @Description Macro to iterate over list of given type.
  77264. +
  77265. + @Param[in] p_Pos - A pointer to a list to use as a loop counter.
  77266. + @Param[in] type - The type of the struct this is embedded in.
  77267. + @Param[in] p_Head - A pointer to the head for your list pointer.
  77268. + @Param[in] member - The name of the list_struct within the struct.
  77269. +
  77270. + @Cautions You can't delete items with this routine.
  77271. + For deletion use LIST_FOR_EACH_SAFE().
  77272. +*//***************************************************************************/
  77273. +#define LIST_FOR_EACH_OBJECT(p_Pos, type, p_Head, member) \
  77274. + for (p_Pos = LIST_OBJECT(LIST_FIRST(p_Head), type, member); \
  77275. + &p_Pos->member != (p_Head); \
  77276. + p_Pos = LIST_OBJECT(LIST_FIRST(&(p_Pos->member)), type, member))
  77277. +
  77278. +
  77279. +/**************************************************************************//**
  77280. + @Function LIST_Add
  77281. +
  77282. + @Description Add a new entry to a list.
  77283. +
  77284. + Insert a new entry after the specified head.
  77285. + This is good for implementing stacks.
  77286. +
  77287. + @Param[in] p_New - A pointer to a new list entry to be added.
  77288. + @Param[in] p_Head - A pointer to a list head to add it after.
  77289. +
  77290. + @Return none.
  77291. +*//***************************************************************************/
  77292. +static __inline__ void LIST_Add(t_List *p_New, t_List *p_Head)
  77293. +{
  77294. + LIST_PREV(LIST_NEXT(p_Head)) = p_New;
  77295. + LIST_NEXT(p_New) = LIST_NEXT(p_Head);
  77296. + LIST_PREV(p_New) = p_Head;
  77297. + LIST_NEXT(p_Head) = p_New;
  77298. +}
  77299. +
  77300. +
  77301. +/**************************************************************************//**
  77302. + @Function LIST_AddToTail
  77303. +
  77304. + @Description Add a new entry to a list.
  77305. +
  77306. + Insert a new entry before the specified head.
  77307. + This is useful for implementing queues.
  77308. +
  77309. + @Param[in] p_New - A pointer to a new list entry to be added.
  77310. + @Param[in] p_Head - A pointer to a list head to add it before.
  77311. +
  77312. + @Return none.
  77313. +*//***************************************************************************/
  77314. +static __inline__ void LIST_AddToTail(t_List *p_New, t_List *p_Head)
  77315. +{
  77316. + LIST_NEXT(LIST_PREV(p_Head)) = p_New;
  77317. + LIST_PREV(p_New) = LIST_PREV(p_Head);
  77318. + LIST_NEXT(p_New) = p_Head;
  77319. + LIST_PREV(p_Head) = p_New;
  77320. +}
  77321. +
  77322. +
  77323. +/**************************************************************************//**
  77324. + @Function LIST_Del
  77325. +
  77326. + @Description Deletes entry from a list.
  77327. +
  77328. + @Param[in] p_Entry - A pointer to the element to delete from the list.
  77329. +
  77330. + @Return none.
  77331. +
  77332. + @Cautions LIST_IsEmpty() on entry does not return true after this,
  77333. + the entry is in an undefined state.
  77334. +*//***************************************************************************/
  77335. +static __inline__ void LIST_Del(t_List *p_Entry)
  77336. +{
  77337. + LIST_PREV(LIST_NEXT(p_Entry)) = LIST_PREV(p_Entry);
  77338. + LIST_NEXT(LIST_PREV(p_Entry)) = LIST_NEXT(p_Entry);
  77339. +}
  77340. +
  77341. +
  77342. +/**************************************************************************//**
  77343. + @Function LIST_DelAndInit
  77344. +
  77345. + @Description Deletes entry from list and reinitialize it.
  77346. +
  77347. + @Param[in] p_Entry - A pointer to the element to delete from the list.
  77348. +
  77349. + @Return none.
  77350. +*//***************************************************************************/
  77351. +static __inline__ void LIST_DelAndInit(t_List *p_Entry)
  77352. +{
  77353. + LIST_Del(p_Entry);
  77354. + INIT_LIST(p_Entry);
  77355. +}
  77356. +
  77357. +
  77358. +/**************************************************************************//**
  77359. + @Function LIST_Move
  77360. +
  77361. + @Description Delete from one list and add as another's head.
  77362. +
  77363. + @Param[in] p_Entry - A pointer to the list entry to move.
  77364. + @Param[in] p_Head - A pointer to the list head that will precede our entry.
  77365. +
  77366. + @Return none.
  77367. +*//***************************************************************************/
  77368. +static __inline__ void LIST_Move(t_List *p_Entry, t_List *p_Head)
  77369. +{
  77370. + LIST_Del(p_Entry);
  77371. + LIST_Add(p_Entry, p_Head);
  77372. +}
  77373. +
  77374. +
  77375. +/**************************************************************************//**
  77376. + @Function LIST_MoveToTail
  77377. +
  77378. + @Description Delete from one list and add as another's tail.
  77379. +
  77380. + @Param[in] p_Entry - A pointer to the entry to move.
  77381. + @Param[in] p_Head - A pointer to the list head that will follow our entry.
  77382. +
  77383. + @Return none.
  77384. +*//***************************************************************************/
  77385. +static __inline__ void LIST_MoveToTail(t_List *p_Entry, t_List *p_Head)
  77386. +{
  77387. + LIST_Del(p_Entry);
  77388. + LIST_AddToTail(p_Entry, p_Head);
  77389. +}
  77390. +
  77391. +
  77392. +/**************************************************************************//**
  77393. + @Function LIST_IsEmpty
  77394. +
  77395. + @Description Tests whether a list is empty.
  77396. +
  77397. + @Param[in] p_List - A pointer to the list to test.
  77398. +
  77399. + @Return 1 if the list is empty, 0 otherwise.
  77400. +*//***************************************************************************/
  77401. +static __inline__ int LIST_IsEmpty(t_List *p_List)
  77402. +{
  77403. + return (LIST_FIRST(p_List) == p_List);
  77404. +}
  77405. +
  77406. +
  77407. +/**************************************************************************//**
  77408. + @Function LIST_Append
  77409. +
  77410. + @Description Join two lists.
  77411. +
  77412. + @Param[in] p_NewList - A pointer to the new list to add.
  77413. + @Param[in] p_Head - A pointer to the place to add it in the first list.
  77414. +
  77415. + @Return none.
  77416. +*//***************************************************************************/
  77417. +void LIST_Append(t_List *p_NewList, t_List *p_Head);
  77418. +
  77419. +
  77420. +/**************************************************************************//**
  77421. + @Function LIST_NumOfObjs
  77422. +
  77423. + @Description Counts number of objects in the list
  77424. +
  77425. + @Param[in] p_List - A pointer to the list which objects are to be counted.
  77426. +
  77427. + @Return Number of objects in the list.
  77428. +*//***************************************************************************/
  77429. +int LIST_NumOfObjs(t_List *p_List);
  77430. +
  77431. +/** @} */ /* end of list_id group */
  77432. +/** @} */ /* end of etc_id group */
  77433. +
  77434. +
  77435. +#endif /* __LIST_EXT_H */
  77436. --- /dev/null
  77437. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/mem_ext.h
  77438. @@ -0,0 +1,318 @@
  77439. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  77440. + * All rights reserved.
  77441. + *
  77442. + * Redistribution and use in source and binary forms, with or without
  77443. + * modification, are permitted provided that the following conditions are met:
  77444. + * * Redistributions of source code must retain the above copyright
  77445. + * notice, this list of conditions and the following disclaimer.
  77446. + * * Redistributions in binary form must reproduce the above copyright
  77447. + * notice, this list of conditions and the following disclaimer in the
  77448. + * documentation and/or other materials provided with the distribution.
  77449. + * * Neither the name of Freescale Semiconductor nor the
  77450. + * names of its contributors may be used to endorse or promote products
  77451. + * derived from this software without specific prior written permission.
  77452. + *
  77453. + *
  77454. + * ALTERNATIVELY, this software may be distributed under the terms of the
  77455. + * GNU General Public License ("GPL") as published by the Free Software
  77456. + * Foundation, either version 2 of that License or (at your option) any
  77457. + * later version.
  77458. + *
  77459. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  77460. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  77461. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  77462. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  77463. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  77464. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  77465. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  77466. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  77467. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  77468. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  77469. + */
  77470. +
  77471. +
  77472. +/**************************************************************************//**
  77473. +
  77474. + @File mem_ext.h
  77475. +
  77476. + @Description External prototypes for the memory manager object
  77477. +*//***************************************************************************/
  77478. +
  77479. +#ifndef __MEM_EXT_H
  77480. +#define __MEM_EXT_H
  77481. +
  77482. +#include "std_ext.h"
  77483. +#include "part_ext.h"
  77484. +
  77485. +
  77486. +/**************************************************************************//**
  77487. + @Group etc_id Utility Library Application Programming Interface
  77488. +
  77489. + @Description External routines.
  77490. +
  77491. + @{
  77492. +*//***************************************************************************/
  77493. +
  77494. +/**************************************************************************//**
  77495. + @Group mem_id Slab Memory Manager
  77496. +
  77497. + @Description Slab Memory Manager module functions, definitions and enums.
  77498. +
  77499. + @{
  77500. +*//***************************************************************************/
  77501. +
  77502. +/* Each block is of the following structure:
  77503. + *
  77504. + *
  77505. + * +-----------+----------+---------------------------+-----------+-----------+
  77506. + * | Alignment | Prefix | Data | Postfix | Alignment |
  77507. + * | field | field | field | field | Padding |
  77508. + * | | | | | |
  77509. + * +-----------+----------+---------------------------+-----------+-----------+
  77510. + * and at the beginning of all bytes, an additional optional padding might reside
  77511. + * to ensure that the first blocks data field is aligned as requested.
  77512. + */
  77513. +
  77514. +
  77515. +#define MEM_MAX_NAME_LENGTH 8
  77516. +
  77517. +/**************************************************************************//*
  77518. + @Description Memory Segment structure
  77519. +*//***************************************************************************/
  77520. +
  77521. +typedef struct
  77522. +{
  77523. + char name[MEM_MAX_NAME_LENGTH];
  77524. + /* The segment's name */
  77525. + uint8_t **p_Bases; /* Base addresses of the segments */
  77526. + uint8_t **p_BlocksStack; /* Array of pointers to blocks */
  77527. + t_Handle h_Spinlock;
  77528. + uint16_t dataSize; /* Size of each data block */
  77529. + uint16_t prefixSize; /* How many bytes to reserve before the data */
  77530. + uint16_t postfixSize; /* How many bytes to reserve after the data */
  77531. + uint16_t alignment; /* Requested alignment for the data field */
  77532. + int allocOwner; /* Memory allocation owner */
  77533. + uint32_t getFailures; /* Number of times get failed */
  77534. + uint32_t num; /* Number of blocks in segment */
  77535. + uint32_t current; /* Current block */
  77536. + bool consecutiveMem; /* Allocate consecutive data blocks memory */
  77537. +#ifdef DEBUG_MEM_LEAKS
  77538. + void *p_MemDbg; /* MEM debug database (MEM leaks detection) */
  77539. + uint32_t blockOffset;
  77540. + uint32_t blockSize;
  77541. +#endif /* DEBUG_MEM_LEAKS */
  77542. +} t_MemorySegment;
  77543. +
  77544. +
  77545. +
  77546. +/**************************************************************************//**
  77547. + @Function MEM_Init
  77548. +
  77549. + @Description Create a new memory segment.
  77550. +
  77551. + @Param[in] name - Name of memory partition.
  77552. + @Param[in] p_Handle - Handle to new segment is returned through here.
  77553. + @Param[in] num - Number of blocks in new segment.
  77554. + @Param[in] dataSize - Size of blocks in segment.
  77555. + @Param[in] prefixSize - How many bytes to allocate before the data.
  77556. + @Param[in] postfixSize - How many bytes to allocate after the data.
  77557. + @Param[in] alignment - Requested alignment for data field (in bytes).
  77558. +
  77559. + @Return E_OK - success, E_NO_MEMORY - out of memory.
  77560. +*//***************************************************************************/
  77561. +t_Error MEM_Init(char name[],
  77562. + t_Handle *p_Handle,
  77563. + uint32_t num,
  77564. + uint16_t dataSize,
  77565. + uint16_t prefixSize,
  77566. + uint16_t postfixSize,
  77567. + uint16_t alignment);
  77568. +
  77569. +/**************************************************************************//**
  77570. + @Function MEM_InitSmart
  77571. +
  77572. + @Description Create a new memory segment.
  77573. +
  77574. + @Param[in] name - Name of memory partition.
  77575. + @Param[in] p_Handle - Handle to new segment is returned through here.
  77576. + @Param[in] num - Number of blocks in new segment.
  77577. + @Param[in] dataSize - Size of blocks in segment.
  77578. + @Param[in] prefixSize - How many bytes to allocate before the data.
  77579. + @Param[in] postfixSize - How many bytes to allocate after the data.
  77580. + @Param[in] alignment - Requested alignment for data field (in bytes).
  77581. + @Param[in] memPartitionId - Memory partition ID for allocation.
  77582. + @Param[in] consecutiveMem - Whether to allocate the memory blocks
  77583. + continuously or not.
  77584. +
  77585. + @Return E_OK - success, E_NO_MEMORY - out of memory.
  77586. +*//***************************************************************************/
  77587. +t_Error MEM_InitSmart(char name[],
  77588. + t_Handle *p_Handle,
  77589. + uint32_t num,
  77590. + uint16_t dataSize,
  77591. + uint16_t prefixSize,
  77592. + uint16_t postfixSize,
  77593. + uint16_t alignment,
  77594. + uint8_t memPartitionId,
  77595. + bool consecutiveMem);
  77596. +
  77597. +/**************************************************************************//**
  77598. + @Function MEM_InitByAddress
  77599. +
  77600. + @Description Create a new memory segment with a specified base address.
  77601. +
  77602. + @Param[in] name - Name of memory partition.
  77603. + @Param[in] p_Handle - Handle to new segment is returned through here.
  77604. + @Param[in] num - Number of blocks in new segment.
  77605. + @Param[in] dataSize - Size of blocks in segment.
  77606. + @Param[in] prefixSize - How many bytes to allocate before the data.
  77607. + @Param[in] postfixSize - How many bytes to allocate after the data.
  77608. + @Param[in] alignment - Requested alignment for data field (in bytes).
  77609. + @Param[in] address - The required base address.
  77610. +
  77611. + @Return E_OK - success, E_NO_MEMORY - out of memory.
  77612. + *//***************************************************************************/
  77613. +t_Error MEM_InitByAddress(char name[],
  77614. + t_Handle *p_Handle,
  77615. + uint32_t num,
  77616. + uint16_t dataSize,
  77617. + uint16_t prefixSize,
  77618. + uint16_t postfixSize,
  77619. + uint16_t alignment,
  77620. + uint8_t *address);
  77621. +
  77622. +/**************************************************************************//**
  77623. + @Function MEM_Free
  77624. +
  77625. + @Description Free a specific memory segment.
  77626. +
  77627. + @Param[in] h_Mem - Handle to memory segment.
  77628. +
  77629. + @Return None.
  77630. +*//***************************************************************************/
  77631. +void MEM_Free(t_Handle h_Mem);
  77632. +
  77633. +/**************************************************************************//**
  77634. + @Function MEM_Get
  77635. +
  77636. + @Description Get a block of memory from a segment.
  77637. +
  77638. + @Param[in] h_Mem - Handle to memory segment.
  77639. +
  77640. + @Return Pointer to new memory block on success,0 otherwise.
  77641. +*//***************************************************************************/
  77642. +void * MEM_Get(t_Handle h_Mem);
  77643. +
  77644. +/**************************************************************************//**
  77645. + @Function MEM_GetN
  77646. +
  77647. + @Description Get up to N blocks of memory from a segment.
  77648. +
  77649. + The blocks are assumed to be of a fixed size (one size per segment).
  77650. +
  77651. + @Param[in] h_Mem - Handle to memory segment.
  77652. + @Param[in] num - Number of blocks to allocate.
  77653. + @Param[out] array - Array of at least num pointers to which the addresses
  77654. + of the allocated blocks are written.
  77655. +
  77656. + @Return The number of blocks actually allocated.
  77657. +
  77658. + @Cautions Interrupts are disabled for all of the allocation loop.
  77659. + Although this loop is very short for each block (several machine
  77660. + instructions), you should not allocate a very large number
  77661. + of blocks via this routine.
  77662. +*//***************************************************************************/
  77663. +uint16_t MEM_GetN(t_Handle h_Mem, uint32_t num, void *array[]);
  77664. +
  77665. +/**************************************************************************//**
  77666. + @Function MEM_Put
  77667. +
  77668. + @Description Put a block of memory back to a segment.
  77669. +
  77670. + @Param[in] h_Mem - Handle to memory segment.
  77671. + @Param[in] p_Block - The block to return.
  77672. +
  77673. + @Return Pointer to new memory block on success,0 otherwise.
  77674. +*//***************************************************************************/
  77675. +t_Error MEM_Put(t_Handle h_Mem, void *p_Block);
  77676. +
  77677. +/**************************************************************************//**
  77678. + @Function MEM_ComputePartitionSize
  77679. +
  77680. + @Description calculate a tight upper boundary of the size of a partition with
  77681. + given attributes.
  77682. +
  77683. + The returned value is suitable if one wants to use MEM_InitByAddress().
  77684. +
  77685. + @Param[in] num - The number of blocks in the segment.
  77686. + @Param[in] dataSize - Size of block to get.
  77687. + @Param[in] prefixSize - The prefix size
  77688. + @Param postfixSize - The postfix size
  77689. + @Param[in] alignment - The requested alignment value (in bytes)
  77690. +
  77691. + @Return The memory block size a segment with the given attributes needs.
  77692. +*//***************************************************************************/
  77693. +uint32_t MEM_ComputePartitionSize(uint32_t num,
  77694. + uint16_t dataSize,
  77695. + uint16_t prefixSize,
  77696. + uint16_t postfixSize,
  77697. + uint16_t alignment);
  77698. +
  77699. +#ifdef DEBUG_MEM_LEAKS
  77700. +#if !((defined(__MWERKS__) || defined(__GNUC__)) && (__dest_os == __ppc_eabi))
  77701. +#error "Memory-Leaks-Debug option is supported only for freescale CodeWarrior"
  77702. +#endif /* !(defined(__MWERKS__) && ... */
  77703. +
  77704. +/**************************************************************************//**
  77705. + @Function MEM_CheckLeaks
  77706. +
  77707. + @Description Report MEM object leaks.
  77708. +
  77709. + This routine is automatically called by the MEM_Free() routine,
  77710. + but it can also be invoked while the MEM object is alive.
  77711. +
  77712. + @Param[in] h_Mem - Handle to memory segment.
  77713. +
  77714. + @Return None.
  77715. +*//***************************************************************************/
  77716. +void MEM_CheckLeaks(t_Handle h_Mem);
  77717. +
  77718. +#else /* not DEBUG_MEM_LEAKS */
  77719. +#define MEM_CheckLeaks(h_Mem)
  77720. +#endif /* not DEBUG_MEM_LEAKS */
  77721. +
  77722. +/**************************************************************************//**
  77723. + @Description Get base of MEM
  77724. +*//***************************************************************************/
  77725. +#define MEM_GetBase(h_Mem) ((t_MemorySegment *)(h_Mem))->p_Bases[0]
  77726. +
  77727. +/**************************************************************************//**
  77728. + @Description Get size of MEM block
  77729. +*//***************************************************************************/
  77730. +#define MEM_GetSize(h_Mem) ((t_MemorySegment *)(h_Mem))->dataSize
  77731. +
  77732. +/**************************************************************************//**
  77733. + @Description Get prefix size of MEM block
  77734. +*//***************************************************************************/
  77735. +#define MEM_GetPrefixSize(h_Mem) ((t_MemorySegment *)(h_Mem))->prefixSize
  77736. +
  77737. +/**************************************************************************//**
  77738. + @Description Get postfix size of MEM block
  77739. +*//***************************************************************************/
  77740. +#define MEM_GetPostfixSize(h_Mem) ((t_MemorySegment *)(h_Mem))->postfixSize
  77741. +
  77742. +/**************************************************************************//**
  77743. + @Description Get alignment of MEM block (in bytes)
  77744. +*//***************************************************************************/
  77745. +#define MEM_GetAlignment(h_Mem) ((t_MemorySegment *)(h_Mem))->alignment
  77746. +
  77747. +/**************************************************************************//**
  77748. + @Description Get the number of blocks in the segment
  77749. +*//***************************************************************************/
  77750. +#define MEM_GetNumOfBlocks(h_Mem) ((t_MemorySegment *)(h_Mem))->num
  77751. +
  77752. +/** @} */ /* end of MEM group */
  77753. +/** @} */ /* end of etc_id group */
  77754. +
  77755. +
  77756. +#endif /* __MEM_EXT_H */
  77757. --- /dev/null
  77758. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/memcpy_ext.h
  77759. @@ -0,0 +1,208 @@
  77760. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  77761. + * All rights reserved.
  77762. + *
  77763. + * Redistribution and use in source and binary forms, with or without
  77764. + * modification, are permitted provided that the following conditions are met:
  77765. + * * Redistributions of source code must retain the above copyright
  77766. + * notice, this list of conditions and the following disclaimer.
  77767. + * * Redistributions in binary form must reproduce the above copyright
  77768. + * notice, this list of conditions and the following disclaimer in the
  77769. + * documentation and/or other materials provided with the distribution.
  77770. + * * Neither the name of Freescale Semiconductor nor the
  77771. + * names of its contributors may be used to endorse or promote products
  77772. + * derived from this software without specific prior written permission.
  77773. + *
  77774. + *
  77775. + * ALTERNATIVELY, this software may be distributed under the terms of the
  77776. + * GNU General Public License ("GPL") as published by the Free Software
  77777. + * Foundation, either version 2 of that License or (at your option) any
  77778. + * later version.
  77779. + *
  77780. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  77781. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  77782. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  77783. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  77784. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  77785. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  77786. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  77787. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  77788. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  77789. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  77790. + */
  77791. +
  77792. +
  77793. +/**************************************************************************//**
  77794. +
  77795. + @File memcpy_ext.h
  77796. +
  77797. + @Description Efficient functions for copying and setting blocks of memory.
  77798. +*//***************************************************************************/
  77799. +
  77800. +#ifndef __MEMCPY_EXT_H
  77801. +#define __MEMCPY_EXT_H
  77802. +
  77803. +#include "std_ext.h"
  77804. +
  77805. +
  77806. +/**************************************************************************//**
  77807. + @Group etc_id Utility Library Application Programming Interface
  77808. +
  77809. + @Description External routines.
  77810. +
  77811. + @{
  77812. +*//***************************************************************************/
  77813. +
  77814. +/**************************************************************************//**
  77815. + @Group mem_cpy Memory Copy
  77816. +
  77817. + @Description Memory Copy module functions,definitions and enums.
  77818. +
  77819. + @{
  77820. +*//***************************************************************************/
  77821. +
  77822. +/**************************************************************************//**
  77823. + @Function MemCpy32
  77824. +
  77825. + @Description Copies one memory buffer into another one in 4-byte chunks!
  77826. + Which should be more efficient than byte by byte.
  77827. +
  77828. + For large buffers (over 60 bytes) this function is about 4 times
  77829. + more efficient than the trivial memory copy. For short buffers
  77830. + it is reduced to the trivial copy and may be a bit worse.
  77831. +
  77832. + @Param[in] pDst - The address of the destination buffer.
  77833. + @Param[in] pSrc - The address of the source buffer.
  77834. + @Param[in] size - The number of bytes that will be copied from pSrc to pDst.
  77835. +
  77836. + @Return pDst (the address of the destination buffer).
  77837. +
  77838. + @Cautions There is no parameter or boundary checking! It is up to the user
  77839. + to supply non-null parameters as source & destination and size
  77840. + that actually fits into the destination buffer.
  77841. +*//***************************************************************************/
  77842. +void * MemCpy32(void* pDst,void* pSrc, uint32_t size);
  77843. +void * IO2IOCpy32(void* pDst,void* pSrc, uint32_t size);
  77844. +void * IO2MemCpy32(void* pDst,void* pSrc, uint32_t size);
  77845. +void * Mem2IOCpy32(void* pDst,void* pSrc, uint32_t size);
  77846. +
  77847. +/**************************************************************************//**
  77848. + @Function MemCpy64
  77849. +
  77850. + @Description Copies one memory buffer into another one in 8-byte chunks!
  77851. + Which should be more efficient than byte by byte.
  77852. +
  77853. + For large buffers (over 60 bytes) this function is about 8 times
  77854. + more efficient than the trivial memory copy. For short buffers
  77855. + it is reduced to the trivial copy and may be a bit worse.
  77856. +
  77857. + Some testing suggests that MemCpy32() preforms better than
  77858. + MemCpy64() over small buffers. On average they break even at
  77859. + 100 byte buffers. For buffers larger than that MemCpy64 is
  77860. + superior.
  77861. +
  77862. + @Param[in] pDst - The address of the destination buffer.
  77863. + @Param[in] pSrc - The address of the source buffer.
  77864. + @Param[in] size - The number of bytes that will be copied from pSrc to pDst.
  77865. +
  77866. + @Return pDst (the address of the destination buffer).
  77867. +
  77868. + @Cautions There is no parameter or boundary checking! It is up to the user
  77869. + to supply non null parameters as source & destination and size
  77870. + that actually fits into their buffer.
  77871. +
  77872. + Do not use under Linux.
  77873. +*//***************************************************************************/
  77874. +void * MemCpy64(void* pDst,void* pSrc, uint32_t size);
  77875. +
  77876. +/**************************************************************************//**
  77877. + @Function MemSet32
  77878. +
  77879. + @Description Sets all bytes of a memory buffer to a specific value, in
  77880. + 4-byte chunks.
  77881. +
  77882. + @Param[in] pDst - The address of the destination buffer.
  77883. + @Param[in] val - Value to set destination bytes to.
  77884. + @Param[in] size - The number of bytes that will be set to val.
  77885. +
  77886. + @Return pDst (the address of the destination buffer).
  77887. +
  77888. + @Cautions There is no parameter or boundary checking! It is up to the user
  77889. + to supply non null parameter as destination and size
  77890. + that actually fits into the destination buffer.
  77891. +*//***************************************************************************/
  77892. +void * MemSet32(void* pDst, uint8_t val, uint32_t size);
  77893. +void * IOMemSet32(void* pDst, uint8_t val, uint32_t size);
  77894. +
  77895. +/**************************************************************************//**
  77896. + @Function MemSet64
  77897. +
  77898. + @Description Sets all bytes of a memory buffer to a specific value, in
  77899. + 8-byte chunks.
  77900. +
  77901. + @Param[in] pDst - The address of the destination buffer.
  77902. + @Param[in] val - Value to set destination bytes to.
  77903. + @Param[in] size - The number of bytes that will be set to val.
  77904. +
  77905. + @Return pDst (the address of the destination buffer).
  77906. +
  77907. + @Cautions There is no parameter or boundary checking! It is up to the user
  77908. + to supply non null parameter as destination and size
  77909. + that actually fits into the destination buffer.
  77910. +*//***************************************************************************/
  77911. +void * MemSet64(void* pDst, uint8_t val, uint32_t size);
  77912. +
  77913. +/**************************************************************************//**
  77914. + @Function MemDisp
  77915. +
  77916. + @Description Displays a block of memory in chunks of 32 bits.
  77917. +
  77918. + @Param[in] addr - The address of the memory to display.
  77919. + @Param[in] size - The number of bytes that will be displayed.
  77920. +
  77921. + @Return None.
  77922. +
  77923. + @Cautions There is no parameter or boundary checking! It is up to the user
  77924. + to supply non null parameter as destination and size
  77925. + that actually fits into the destination buffer.
  77926. +*//***************************************************************************/
  77927. +void MemDisp(uint8_t *addr, int size);
  77928. +
  77929. +/**************************************************************************//**
  77930. + @Function MemCpy8
  77931. +
  77932. + @Description Trivial copy one memory buffer into another byte by byte
  77933. +
  77934. + @Param[in] pDst - The address of the destination buffer.
  77935. + @Param[in] pSrc - The address of the source buffer.
  77936. + @Param[in] size - The number of bytes that will be copied from pSrc to pDst.
  77937. +
  77938. + @Return pDst (the address of the destination buffer).
  77939. +
  77940. + @Cautions There is no parameter or boundary checking! It is up to the user
  77941. + to supply non-null parameters as source & destination and size
  77942. + that actually fits into the destination buffer.
  77943. +*//***************************************************************************/
  77944. +void * MemCpy8(void* pDst,void* pSrc, uint32_t size);
  77945. +
  77946. +/**************************************************************************//**
  77947. + @Function MemSet8
  77948. +
  77949. + @Description Sets all bytes of a memory buffer to a specific value byte by byte.
  77950. +
  77951. + @Param[in] pDst - The address of the destination buffer.
  77952. + @Param[in] c - Value to set destination bytes to.
  77953. + @Param[in] size - The number of bytes that will be set to val.
  77954. +
  77955. + @Return pDst (the address of the destination buffer).
  77956. +
  77957. + @Cautions There is no parameter or boundary checking! It is up to the user
  77958. + to supply non null parameter as destination and size
  77959. + that actually fits into the destination buffer.
  77960. +*//***************************************************************************/
  77961. +void * MemSet8(void* pDst, int c, uint32_t size);
  77962. +
  77963. +/** @} */ /* end of mem_cpy group */
  77964. +/** @} */ /* end of etc_id group */
  77965. +
  77966. +
  77967. +#endif /* __MEMCPY_EXT_H */
  77968. --- /dev/null
  77969. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/mm_ext.h
  77970. @@ -0,0 +1,310 @@
  77971. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  77972. + * All rights reserved.
  77973. + *
  77974. + * Redistribution and use in source and binary forms, with or without
  77975. + * modification, are permitted provided that the following conditions are met:
  77976. + * * Redistributions of source code must retain the above copyright
  77977. + * notice, this list of conditions and the following disclaimer.
  77978. + * * Redistributions in binary form must reproduce the above copyright
  77979. + * notice, this list of conditions and the following disclaimer in the
  77980. + * documentation and/or other materials provided with the distribution.
  77981. + * * Neither the name of Freescale Semiconductor nor the
  77982. + * names of its contributors may be used to endorse or promote products
  77983. + * derived from this software without specific prior written permission.
  77984. + *
  77985. + *
  77986. + * ALTERNATIVELY, this software may be distributed under the terms of the
  77987. + * GNU General Public License ("GPL") as published by the Free Software
  77988. + * Foundation, either version 2 of that License or (at your option) any
  77989. + * later version.
  77990. + *
  77991. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  77992. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  77993. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  77994. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  77995. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  77996. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  77997. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  77998. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  77999. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  78000. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78001. + */
  78002. +
  78003. +
  78004. +/**************************************************************************//**
  78005. + @File mm_ext.h
  78006. +
  78007. + @Description Memory Manager Application Programming Interface
  78008. +*//***************************************************************************/
  78009. +#ifndef __MM_EXT
  78010. +#define __MM_EXT
  78011. +
  78012. +#include "std_ext.h"
  78013. +
  78014. +#define MM_MAX_ALIGNMENT 20 /* Alignments from 2 to 128 are available
  78015. + where maximum alignment defined as
  78016. + MM_MAX_ALIGNMENT power of 2 */
  78017. +
  78018. +#define MM_MAX_NAME_LEN 32
  78019. +
  78020. +/**************************************************************************//**
  78021. + @Group etc_id Utility Library Application Programming Interface
  78022. +
  78023. + @Description External routines.
  78024. +
  78025. + @{
  78026. +*//***************************************************************************/
  78027. +
  78028. +/**************************************************************************//**
  78029. + @Group mm_grp Flexible Memory Manager
  78030. +
  78031. + @Description Flexible Memory Manager module functions,definitions and enums.
  78032. + (All of the following functions,definitions and enums can be found in mm_ext.h)
  78033. +
  78034. + @{
  78035. +*//***************************************************************************/
  78036. +
  78037. +
  78038. +/**************************************************************************//**
  78039. + @Function MM_Init
  78040. +
  78041. + @Description Initializes a new MM object.
  78042. +
  78043. + It initializes a new memory block consisting of base address
  78044. + and size of the available memory by calling to MemBlock_Init
  78045. + routine. It is also initializes a new free block for each
  78046. + by calling FreeBlock_Init routine, which is pointed to
  78047. + the almost all memory started from the required alignment
  78048. + from the base address and to the end of the memory.
  78049. + The handle to the new MM object is returned via "MM"
  78050. + argument (passed by reference).
  78051. +
  78052. + @Param[in] h_MM - Handle to the MM object.
  78053. + @Param[in] base - Base address of the MM.
  78054. + @Param[in] size - Size of the MM.
  78055. +
  78056. + @Return E_OK is returned on success. E_NOMEMORY is returned if the new MM object or a new free block can not be initialized.
  78057. +*//***************************************************************************/
  78058. +t_Error MM_Init(t_Handle *h_MM, uint64_t base, uint64_t size);
  78059. +
  78060. +/**************************************************************************//**
  78061. + @Function MM_Get
  78062. +
  78063. + @Description Allocates a block of memory according to the given size and the alignment.
  78064. +
  78065. + The Alignment argument tells from which
  78066. + free list allocate a block of memory. 2^alignment indicates
  78067. + the alignment that the base address of the allocated block
  78068. + should have. So, the only values 1, 2, 4, 8, 16, 32 and 64
  78069. + are available for the alignment argument.
  78070. + The routine passes through the specific free list of free
  78071. + blocks and seeks for a first block that have anough memory
  78072. + that is required (best fit).
  78073. + After the block is found and data is allocated, it calls
  78074. + the internal MM_CutFree routine to update all free lists
  78075. + do not include a just allocated block. Of course, each
  78076. + free list contains a free blocks with the same alignment.
  78077. + It is also creates a busy block that holds
  78078. + information about an allocated block.
  78079. +
  78080. + @Param[in] h_MM - Handle to the MM object.
  78081. + @Param[in] size - Size of the MM.
  78082. + @Param[in] alignment - Index as a power of two defines a required
  78083. + alignment (in bytes); Should be 1, 2, 4, 8, 16, 32 or 64
  78084. + @Param[in] name - The name that specifies an allocated block.
  78085. +
  78086. + @Return base address of an allocated block ILLEGAL_BASE if can't allocate a block
  78087. +*//***************************************************************************/
  78088. +uint64_t MM_Get(t_Handle h_MM, uint64_t size, uint64_t alignment, char *name);
  78089. +
  78090. +/**************************************************************************//**
  78091. + @Function MM_GetBase
  78092. +
  78093. + @Description Gets the base address of the required MM objects.
  78094. +
  78095. + @Param[in] h_MM - Handle to the MM object.
  78096. +
  78097. + @Return base address of the block.
  78098. +*//***************************************************************************/
  78099. +uint64_t MM_GetBase(t_Handle h_MM);
  78100. +
  78101. +/**************************************************************************//**
  78102. + @Function MM_GetForce
  78103. +
  78104. + @Description Force memory allocation.
  78105. +
  78106. + It means to allocate a block of memory of the given
  78107. + size from the given base address.
  78108. + The routine checks if the required block can be allocated
  78109. + (that is it is free) and then, calls the internal MM_CutFree
  78110. + routine to update all free lists do not include that block.
  78111. +
  78112. + @Param[in] h_MM - Handle to the MM object.
  78113. + @Param[in] base - Base address of the MM.
  78114. + @Param[in] size - Size of the MM.
  78115. + @Param[in] name - Name that specifies an allocated block.
  78116. +
  78117. + @Return base address of an allocated block, ILLEGAL_BASE if can't allocate a block.
  78118. +*//***************************************************************************/
  78119. +uint64_t MM_GetForce(t_Handle h_MM, uint64_t base, uint64_t size, char *name);
  78120. +
  78121. +/**************************************************************************//**
  78122. + @Function MM_GetForceMin
  78123. +
  78124. + @Description Allocates a block of memory according to the given size, the alignment and minimum base address.
  78125. +
  78126. + The Alignment argument tells from which
  78127. + free list allocate a block of memory. 2^alignment indicates
  78128. + the alignment that the base address of the allocated block
  78129. + should have. So, the only values 1, 2, 4, 8, 16, 32 and 64
  78130. + are available for the alignment argument.
  78131. + The minimum baser address forces the location of the block
  78132. + to be from a given address onward.
  78133. + The routine passes through the specific free list of free
  78134. + blocks and seeks for the first base address equal or smaller
  78135. + than the required minimum address and end address larger than
  78136. + than the required base + its size - i.e. that may contain
  78137. + the required block.
  78138. + After the block is found and data is allocated, it calls
  78139. + the internal MM_CutFree routine to update all free lists
  78140. + do not include a just allocated block. Of course, each
  78141. + free list contains a free blocks with the same alignment.
  78142. + It is also creates a busy block that holds
  78143. + information about an allocated block.
  78144. +
  78145. + @Param[in] h_MM - Handle to the MM object.
  78146. + @Param[in] size - Size of the MM.
  78147. + @Param[in] alignment - Index as a power of two defines a required
  78148. + alignment (in bytes); Should be 1, 2, 4, 8, 16, 32 or 64
  78149. + @Param[in] min - The minimum base address of the block.
  78150. + @Param[in] name - Name that specifies an allocated block.
  78151. +
  78152. + @Return base address of an allocated block,ILLEGAL_BASE if can't allocate a block.
  78153. +*//***************************************************************************/
  78154. +uint64_t MM_GetForceMin(t_Handle h_MM,
  78155. + uint64_t size,
  78156. + uint64_t alignment,
  78157. + uint64_t min,
  78158. + char *name);
  78159. +
  78160. +/**************************************************************************//**
  78161. + @Function MM_Put
  78162. +
  78163. + @Description Puts a block of memory of the given base address back to the memory.
  78164. +
  78165. + It checks if there is a busy block with the
  78166. + given base address. If not, it returns 0, that
  78167. + means can't free a block. Otherwise, it gets parameters of
  78168. + the busy block and after it updates lists of free blocks,
  78169. + removes that busy block from the list by calling to MM_CutBusy
  78170. + routine.
  78171. + After that it calls to MM_AddFree routine to add a new free
  78172. + block to the free lists.
  78173. +
  78174. + @Param[in] h_MM - Handle to the MM object.
  78175. + @Param[in] base - Base address of the MM.
  78176. +
  78177. + @Return The size of bytes released, 0 if failed.
  78178. +*//***************************************************************************/
  78179. +uint64_t MM_Put(t_Handle h_MM, uint64_t base);
  78180. +
  78181. +/**************************************************************************//**
  78182. + @Function MM_PutForce
  78183. +
  78184. + @Description Releases a block of memory of the required size from the required base address.
  78185. +
  78186. + First, it calls to MM_CutBusy routine
  78187. + to cut a free block from the busy list. And then, calls to
  78188. + MM_AddFree routine to add the free block to the free lists.
  78189. +
  78190. + @Param[in] h_MM - Handle to the MM object.
  78191. + @Param[in] base - Base address of of a block to free.
  78192. + @Param[in] size - Size of a block to free.
  78193. +
  78194. + @Return The number of bytes released, 0 on failure.
  78195. +*//***************************************************************************/
  78196. +uint64_t MM_PutForce(t_Handle h_MM, uint64_t base, uint64_t size);
  78197. +
  78198. +/**************************************************************************//**
  78199. + @Function MM_Add
  78200. +
  78201. + @Description Adds a new memory block for memory allocation.
  78202. +
  78203. + When a new memory block is initialized and added to the
  78204. + memory list, it calls to MM_AddFree routine to add the
  78205. + new free block to the free lists.
  78206. +
  78207. + @Param[in] h_MM - Handle to the MM object.
  78208. + @Param[in] base - Base address of the memory block.
  78209. + @Param[in] size - Size of the memory block.
  78210. +
  78211. + @Return E_OK on success, otherwise returns an error code.
  78212. +*//***************************************************************************/
  78213. +t_Error MM_Add(t_Handle h_MM, uint64_t base, uint64_t size);
  78214. +
  78215. +/**************************************************************************//**
  78216. + @Function MM_Dump
  78217. +
  78218. + @Description Prints results of free and busy lists.
  78219. +
  78220. + @Param[in] h_MM - Handle to the MM object.
  78221. +*//***************************************************************************/
  78222. +void MM_Dump(t_Handle h_MM);
  78223. +
  78224. +/**************************************************************************//**
  78225. + @Function MM_Free
  78226. +
  78227. + @Description Releases memory allocated for MM object.
  78228. +
  78229. + @Param[in] h_MM - Handle of the MM object.
  78230. +*//***************************************************************************/
  78231. +void MM_Free(t_Handle h_MM);
  78232. +
  78233. +/**************************************************************************//**
  78234. + @Function MM_GetMemBlock
  78235. +
  78236. + @Description Returns base address of the memory block specified by the index.
  78237. +
  78238. + If index is 0, returns base address
  78239. + of the first memory block, 1 - returns base address
  78240. + of the second memory block, etc.
  78241. + Note, those memory blocks are allocated by the
  78242. + application before MM_Init or MM_Add and have to
  78243. + be released by the application before or after invoking
  78244. + the MM_Free routine.
  78245. +
  78246. + @Param[in] h_MM - Handle to the MM object.
  78247. + @Param[in] index - Index of the memory block.
  78248. +
  78249. + @Return valid base address or ILLEGAL_BASE if no memory block specified by the index.
  78250. +*//***************************************************************************/
  78251. +uint64_t MM_GetMemBlock(t_Handle h_MM, int index);
  78252. +
  78253. +/**************************************************************************//**
  78254. + @Function MM_InRange
  78255. +
  78256. + @Description Checks if a specific address is in the memory range of the passed MM object.
  78257. +
  78258. + @Param[in] h_MM - Handle to the MM object.
  78259. + @Param[in] addr - The address to be checked.
  78260. +
  78261. + @Return TRUE if the address is in the address range of the block, FALSE otherwise.
  78262. +*//***************************************************************************/
  78263. +bool MM_InRange(t_Handle h_MM, uint64_t addr);
  78264. +
  78265. +/**************************************************************************//**
  78266. + @Function MM_GetFreeMemSize
  78267. +
  78268. + @Description Returns the size (in bytes) of free memory.
  78269. +
  78270. + @Param[in] h_MM - Handle to the MM object.
  78271. +
  78272. + @Return Free memory size in bytes.
  78273. +*//***************************************************************************/
  78274. +uint64_t MM_GetFreeMemSize(t_Handle h_MM);
  78275. +
  78276. +
  78277. +/** @} */ /* end of mm_grp group */
  78278. +/** @} */ /* end of etc_id group */
  78279. +
  78280. +#endif /* __MM_EXT_H */
  78281. --- /dev/null
  78282. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/etc/sprint_ext.h
  78283. @@ -0,0 +1,118 @@
  78284. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  78285. + * All rights reserved.
  78286. + *
  78287. + * Redistribution and use in source and binary forms, with or without
  78288. + * modification, are permitted provided that the following conditions are met:
  78289. + * * Redistributions of source code must retain the above copyright
  78290. + * notice, this list of conditions and the following disclaimer.
  78291. + * * Redistributions in binary form must reproduce the above copyright
  78292. + * notice, this list of conditions and the following disclaimer in the
  78293. + * documentation and/or other materials provided with the distribution.
  78294. + * * Neither the name of Freescale Semiconductor nor the
  78295. + * names of its contributors may be used to endorse or promote products
  78296. + * derived from this software without specific prior written permission.
  78297. + *
  78298. + *
  78299. + * ALTERNATIVELY, this software may be distributed under the terms of the
  78300. + * GNU General Public License ("GPL") as published by the Free Software
  78301. + * Foundation, either version 2 of that License or (at your option) any
  78302. + * later version.
  78303. + *
  78304. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  78305. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  78306. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  78307. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  78308. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78309. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  78310. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  78311. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  78312. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  78313. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78314. + */
  78315. +
  78316. +
  78317. +/**************************************************************************//**
  78318. + @File sprint_ext.h
  78319. +
  78320. + @Description Debug routines (externals).
  78321. +
  78322. +*//***************************************************************************/
  78323. +
  78324. +#ifndef __SPRINT_EXT_H
  78325. +#define __SPRINT_EXT_H
  78326. +
  78327. +
  78328. +#if defined(NCSW_LINUX) && defined(__KERNEL__)
  78329. +#include <linux/kernel.h>
  78330. +
  78331. +#elif defined(NCSW_VXWORKS)
  78332. +#include "private/stdioP.h"
  78333. +
  78334. +#else
  78335. +#include <stdio.h>
  78336. +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
  78337. +
  78338. +#include "std_ext.h"
  78339. +
  78340. +
  78341. +/**************************************************************************//**
  78342. + @Group etc_id Utility Library Application Programming Interface
  78343. +
  78344. + @Description External routines.
  78345. +
  78346. + @{
  78347. +*//***************************************************************************/
  78348. +
  78349. +/**************************************************************************//**
  78350. + @Group sprint_id Sprint
  78351. +
  78352. + @Description Sprint & Sscan module functions,definitions and enums.
  78353. +
  78354. + @{
  78355. +*//***************************************************************************/
  78356. +
  78357. +/**************************************************************************//**
  78358. + @Function Sprint
  78359. +
  78360. + @Description Format a string and place it in a buffer.
  78361. +
  78362. + @Param[in] buff - The buffer to place the result into.
  78363. + @Param[in] str - The format string to use.
  78364. + @Param[in] ... - Arguments for the format string.
  78365. +
  78366. + @Return Number of bytes formatted.
  78367. +*//***************************************************************************/
  78368. +int Sprint(char *buff, const char *str, ...);
  78369. +
  78370. +/**************************************************************************//**
  78371. + @Function Snprint
  78372. +
  78373. + @Description Format a string and place it in a buffer.
  78374. +
  78375. + @Param[in] buf - The buffer to place the result into.
  78376. + @Param[in] size - The size of the buffer, including the trailing null space.
  78377. + @Param[in] fmt - The format string to use.
  78378. + @Param[in] ... - Arguments for the format string.
  78379. +
  78380. + @Return Number of bytes formatted.
  78381. +*//***************************************************************************/
  78382. +int Snprint(char * buf, uint32_t size, const char *fmt, ...);
  78383. +
  78384. +/**************************************************************************//**
  78385. + @Function Sscan
  78386. +
  78387. + @Description Unformat a buffer into a list of arguments.
  78388. +
  78389. + @Param[in] buf - input buffer.
  78390. + @Param[in] fmt - formatting of buffer.
  78391. + @Param[out] ... - resulting arguments.
  78392. +
  78393. + @Return Number of bytes unformatted.
  78394. +*//***************************************************************************/
  78395. +int Sscan(const char * buf, const char * fmt, ...);
  78396. +
  78397. +/** @} */ /* end of sprint_id group */
  78398. +/** @} */ /* end of etc_id group */
  78399. +
  78400. +
  78401. +#endif /* __SPRINT_EXT_H */
  78402. --- /dev/null
  78403. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/arch/ppc_access.h
  78404. @@ -0,0 +1,37 @@
  78405. +/*
  78406. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  78407. + *
  78408. + * Redistribution and use in source and binary forms, with or without
  78409. + * modification, are permitted provided that the following conditions are met:
  78410. + * * Redistributions of source code must retain the above copyright
  78411. + * notice, this list of conditions and the following disclaimer.
  78412. + * * Redistributions in binary form must reproduce the above copyright
  78413. + * notice, this list of conditions and the following disclaimer in the
  78414. + * documentation and/or other materials provided with the distribution.
  78415. + * * Neither the name of Freescale Semiconductor nor the
  78416. + * names of its contributors may be used to endorse or promote products
  78417. + * derived from this software without specific prior written permission.
  78418. + *
  78419. + *
  78420. + * ALTERNATIVELY, this software may be distributed under the terms of the
  78421. + * GNU General Public License ("GPL") as published by the Free Software
  78422. + * Foundation, either version 2 of that License or (at your option) any
  78423. + * later version.
  78424. + *
  78425. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  78426. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  78427. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  78428. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  78429. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78430. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  78431. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  78432. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  78433. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  78434. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78435. + */
  78436. +
  78437. +#ifndef FL_E500_MACROS_H
  78438. +#define FL_E500_MACROS_H
  78439. +
  78440. +#endif /* FL_E500_MACROS_H */
  78441. +
  78442. --- /dev/null
  78443. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/common/general.h
  78444. @@ -0,0 +1,52 @@
  78445. +/*
  78446. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  78447. + *
  78448. + * Redistribution and use in source and binary forms, with or without
  78449. + * modification, are permitted provided that the following conditions are met:
  78450. + * * Redistributions of source code must retain the above copyright
  78451. + * notice, this list of conditions and the following disclaimer.
  78452. + * * Redistributions in binary form must reproduce the above copyright
  78453. + * notice, this list of conditions and the following disclaimer in the
  78454. + * documentation and/or other materials provided with the distribution.
  78455. + * * Neither the name of Freescale Semiconductor nor the
  78456. + * names of its contributors may be used to endorse or promote products
  78457. + * derived from this software without specific prior written permission.
  78458. + *
  78459. + *
  78460. + * ALTERNATIVELY, this software may be distributed under the terms of the
  78461. + * GNU General Public License ("GPL") as published by the Free Software
  78462. + * Foundation, either version 2 of that License or (at your option) any
  78463. + * later version.
  78464. + *
  78465. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  78466. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  78467. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  78468. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  78469. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78470. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  78471. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  78472. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  78473. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  78474. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78475. + */
  78476. +
  78477. +#ifndef __GENERAL_H
  78478. +#define __GENERAL_H
  78479. +
  78480. +#include "std_ext.h"
  78481. +#if !defined(NCSW_LINUX)
  78482. +#include "errno.h"
  78483. +#endif
  78484. +
  78485. +
  78486. +extern uint32_t get_mac_addr_crc(uint64_t _addr);
  78487. +
  78488. +#ifndef CONFIG_FMAN_ARM
  78489. +#define iowrite32be(val, addr) WRITE_UINT32(*addr, val)
  78490. +#define ioread32be(addr) GET_UINT32(*addr)
  78491. +#endif
  78492. +
  78493. +#define ether_crc(len, addr) get_mac_addr_crc(*(uint64_t *)(addr)>>16)
  78494. +
  78495. +
  78496. +#endif /* __GENERAL_H */
  78497. --- /dev/null
  78498. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fman_common.h
  78499. @@ -0,0 +1,78 @@
  78500. +/*
  78501. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  78502. + *
  78503. + * Redistribution and use in source and binary forms, with or without
  78504. + * modification, are permitted provided that the following conditions are met:
  78505. + * * Redistributions of source code must retain the above copyright
  78506. + * notice, this list of conditions and the following disclaimer.
  78507. + * * Redistributions in binary form must reproduce the above copyright
  78508. + * notice, this list of conditions and the following disclaimer in the
  78509. + * documentation and/or other materials provided with the distribution.
  78510. + * * Neither the name of Freescale Semiconductor nor the
  78511. + * names of its contributors may be used to endorse or promote products
  78512. + * derived from this software without specific prior written permission.
  78513. + *
  78514. + *
  78515. + * ALTERNATIVELY, this software may be distributed under the terms of the
  78516. + * GNU General Public License ("GPL") as published by the Free Software
  78517. + * Foundation, either version 2 of that License or (at your option) any
  78518. + * later version.
  78519. + *
  78520. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  78521. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  78522. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  78523. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  78524. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78525. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  78526. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  78527. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  78528. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  78529. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78530. + */
  78531. +
  78532. +
  78533. +#ifndef __FMAN_COMMON_H
  78534. +#define __FMAN_COMMON_H
  78535. +
  78536. +/**************************************************************************//**
  78537. + @Description NIA Description
  78538. +*//***************************************************************************/
  78539. +#define NIA_ORDER_RESTOR 0x00800000
  78540. +#define NIA_ENG_FM_CTL 0x00000000
  78541. +#define NIA_ENG_PRS 0x00440000
  78542. +#define NIA_ENG_KG 0x00480000
  78543. +#define NIA_ENG_PLCR 0x004C0000
  78544. +#define NIA_ENG_BMI 0x00500000
  78545. +#define NIA_ENG_QMI_ENQ 0x00540000
  78546. +#define NIA_ENG_QMI_DEQ 0x00580000
  78547. +#define NIA_ENG_MASK 0x007C0000
  78548. +
  78549. +#define NIA_FM_CTL_AC_CC 0x00000006
  78550. +#define NIA_FM_CTL_AC_HC 0x0000000C
  78551. +#define NIA_FM_CTL_AC_IND_MODE_TX 0x00000008
  78552. +#define NIA_FM_CTL_AC_IND_MODE_RX 0x0000000A
  78553. +#define NIA_FM_CTL_AC_FRAG 0x0000000e
  78554. +#define NIA_FM_CTL_AC_PRE_FETCH 0x00000010
  78555. +#define NIA_FM_CTL_AC_POST_FETCH_PCD 0x00000012
  78556. +#define NIA_FM_CTL_AC_POST_FETCH_PCD_UDP_LEN 0x00000018
  78557. +#define NIA_FM_CTL_AC_POST_FETCH_NO_PCD 0x00000012
  78558. +#define NIA_FM_CTL_AC_FRAG_CHECK 0x00000014
  78559. +#define NIA_FM_CTL_AC_PRE_CC 0x00000020
  78560. +
  78561. +
  78562. +#define NIA_BMI_AC_ENQ_FRAME 0x00000002
  78563. +#define NIA_BMI_AC_TX_RELEASE 0x000002C0
  78564. +#define NIA_BMI_AC_RELEASE 0x000000C0
  78565. +#define NIA_BMI_AC_DISCARD 0x000000C1
  78566. +#define NIA_BMI_AC_TX 0x00000274
  78567. +#define NIA_BMI_AC_FETCH 0x00000208
  78568. +#define NIA_BMI_AC_MASK 0x000003FF
  78569. +
  78570. +#define NIA_KG_DIRECT 0x00000100
  78571. +#define NIA_KG_CC_EN 0x00000200
  78572. +#define NIA_PLCR_ABSOLUTE 0x00008000
  78573. +
  78574. +#define NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA 0x00000202
  78575. +#define NIA_BMI_AC_FETCH_ALL_FRAME 0x0000020c
  78576. +
  78577. +#endif /* __FMAN_COMMON_H */
  78578. --- /dev/null
  78579. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_enet.h
  78580. @@ -0,0 +1,273 @@
  78581. +/*
  78582. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  78583. + *
  78584. + * Redistribution and use in source and binary forms, with or without
  78585. + * modification, are permitted provided that the following conditions are met:
  78586. + * * Redistributions of source code must retain the above copyright
  78587. + * notice, this list of conditions and the following disclaimer.
  78588. + * * Redistributions in binary form must reproduce the above copyright
  78589. + * notice, this list of conditions and the following disclaimer in the
  78590. + * documentation and/or other materials provided with the distribution.
  78591. + * * Neither the name of Freescale Semiconductor nor the
  78592. + * names of its contributors may be used to endorse or promote products
  78593. + * derived from this software without specific prior written permission.
  78594. + *
  78595. + *
  78596. + * ALTERNATIVELY, this software may be distributed under the terms of the
  78597. + * GNU General Public License ("GPL") as published by the Free Software
  78598. + * Foundation, either version 2 of that License or (at your option) any
  78599. + * later version.
  78600. + *
  78601. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  78602. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  78603. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  78604. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  78605. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78606. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  78607. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  78608. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  78609. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  78610. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78611. + */
  78612. +
  78613. +#ifndef __FSL_ENET_H
  78614. +#define __FSL_ENET_H
  78615. +
  78616. +/**
  78617. + @Description Ethernet MAC-PHY Interface
  78618. +*/
  78619. +
  78620. +enum enet_interface {
  78621. + E_ENET_IF_MII = 0x00010000, /**< MII interface */
  78622. + E_ENET_IF_RMII = 0x00020000, /**< RMII interface */
  78623. + E_ENET_IF_SMII = 0x00030000, /**< SMII interface */
  78624. + E_ENET_IF_GMII = 0x00040000, /**< GMII interface */
  78625. + E_ENET_IF_RGMII = 0x00050000, /**< RGMII interface */
  78626. + E_ENET_IF_TBI = 0x00060000, /**< TBI interface */
  78627. + E_ENET_IF_RTBI = 0x00070000, /**< RTBI interface */
  78628. + E_ENET_IF_SGMII = 0x00080000, /**< SGMII interface */
  78629. + E_ENET_IF_XGMII = 0x00090000, /**< XGMII interface */
  78630. + E_ENET_IF_QSGMII = 0x000a0000, /**< QSGMII interface */
  78631. + E_ENET_IF_XFI = 0x000b0000 /**< XFI interface */
  78632. +};
  78633. +
  78634. +/**
  78635. + @Description Ethernet Speed (nominal data rate)
  78636. +*/
  78637. +enum enet_speed {
  78638. + E_ENET_SPEED_10 = 10, /**< 10 Mbps */
  78639. + E_ENET_SPEED_100 = 100, /**< 100 Mbps */
  78640. + E_ENET_SPEED_1000 = 1000, /**< 1000 Mbps = 1 Gbps */
  78641. + E_ENET_SPEED_2500 = 2500, /**< 2500 Mbps = 2.5 Gbps */
  78642. + E_ENET_SPEED_10000 = 10000 /**< 10000 Mbps = 10 Gbps */
  78643. +};
  78644. +
  78645. +enum mac_type {
  78646. + E_MAC_DTSEC,
  78647. + E_MAC_TGEC,
  78648. + E_MAC_MEMAC
  78649. +};
  78650. +
  78651. +/**************************************************************************//**
  78652. + @Description Enum for inter-module interrupts registration
  78653. +*//***************************************************************************/
  78654. +enum fman_event_modules {
  78655. + E_FMAN_MOD_PRS, /**< Parser event */
  78656. + E_FMAN_MOD_KG, /**< Keygen event */
  78657. + E_FMAN_MOD_PLCR, /**< Policer event */
  78658. + E_FMAN_MOD_10G_MAC, /**< 10G MAC event */
  78659. + E_FMAN_MOD_1G_MAC, /**< 1G MAC event */
  78660. + E_FMAN_MOD_TMR, /**< Timer event */
  78661. + E_FMAN_MOD_FMAN_CTRL, /**< FMAN Controller Timer event */
  78662. + E_FMAN_MOD_MACSEC,
  78663. + E_FMAN_MOD_DUMMY_LAST
  78664. +};
  78665. +
  78666. +/**************************************************************************//**
  78667. + @Description Enum for interrupts types
  78668. +*//***************************************************************************/
  78669. +enum fman_intr_type {
  78670. + E_FMAN_INTR_TYPE_ERR,
  78671. + E_FMAN_INTR_TYPE_NORMAL
  78672. +};
  78673. +
  78674. +/**************************************************************************//**
  78675. + @Description enum for defining MAC types
  78676. +*//***************************************************************************/
  78677. +enum fman_mac_type {
  78678. + E_FMAN_MAC_10G = 0, /**< 10G MAC */
  78679. + E_FMAN_MAC_1G /**< 1G MAC */
  78680. +};
  78681. +
  78682. +enum fman_mac_exceptions {
  78683. + E_FMAN_MAC_EX_10G_MDIO_SCAN_EVENTMDIO = 0,
  78684. + /**< 10GEC MDIO scan event interrupt */
  78685. + E_FMAN_MAC_EX_10G_MDIO_CMD_CMPL,
  78686. + /**< 10GEC MDIO command completion interrupt */
  78687. + E_FMAN_MAC_EX_10G_REM_FAULT,
  78688. + /**< 10GEC, mEMAC Remote fault interrupt */
  78689. + E_FMAN_MAC_EX_10G_LOC_FAULT,
  78690. + /**< 10GEC, mEMAC Local fault interrupt */
  78691. + E_FMAN_MAC_EX_10G_1TX_ECC_ER,
  78692. + /**< 10GEC, mEMAC Transmit frame ECC error interrupt */
  78693. + E_FMAN_MAC_EX_10G_TX_FIFO_UNFL,
  78694. + /**< 10GEC, mEMAC Transmit FIFO underflow interrupt */
  78695. + E_FMAN_MAC_EX_10G_TX_FIFO_OVFL,
  78696. + /**< 10GEC, mEMAC Transmit FIFO overflow interrupt */
  78697. + E_FMAN_MAC_EX_10G_TX_ER,
  78698. + /**< 10GEC Transmit frame error interrupt */
  78699. + E_FMAN_MAC_EX_10G_RX_FIFO_OVFL,
  78700. + /**< 10GEC, mEMAC Receive FIFO overflow interrupt */
  78701. + E_FMAN_MAC_EX_10G_RX_ECC_ER,
  78702. + /**< 10GEC, mEMAC Receive frame ECC error interrupt */
  78703. + E_FMAN_MAC_EX_10G_RX_JAB_FRM,
  78704. + /**< 10GEC Receive jabber frame interrupt */
  78705. + E_FMAN_MAC_EX_10G_RX_OVRSZ_FRM,
  78706. + /**< 10GEC Receive oversized frame interrupt */
  78707. + E_FMAN_MAC_EX_10G_RX_RUNT_FRM,
  78708. + /**< 10GEC Receive runt frame interrupt */
  78709. + E_FMAN_MAC_EX_10G_RX_FRAG_FRM,
  78710. + /**< 10GEC Receive fragment frame interrupt */
  78711. + E_FMAN_MAC_EX_10G_RX_LEN_ER,
  78712. + /**< 10GEC Receive payload length error interrupt */
  78713. + E_FMAN_MAC_EX_10G_RX_CRC_ER,
  78714. + /**< 10GEC Receive CRC error interrupt */
  78715. + E_FMAN_MAC_EX_10G_RX_ALIGN_ER,
  78716. + /**< 10GEC Receive alignment error interrupt */
  78717. + E_FMAN_MAC_EX_1G_BAB_RX,
  78718. + /**< dTSEC Babbling receive error */
  78719. + E_FMAN_MAC_EX_1G_RX_CTL,
  78720. + /**< dTSEC Receive control (pause frame) interrupt */
  78721. + E_FMAN_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET,
  78722. + /**< dTSEC Graceful transmit stop complete */
  78723. + E_FMAN_MAC_EX_1G_BAB_TX,
  78724. + /**< dTSEC Babbling transmit error */
  78725. + E_FMAN_MAC_EX_1G_TX_CTL,
  78726. + /**< dTSEC Transmit control (pause frame) interrupt */
  78727. + E_FMAN_MAC_EX_1G_TX_ERR,
  78728. + /**< dTSEC Transmit error */
  78729. + E_FMAN_MAC_EX_1G_LATE_COL,
  78730. + /**< dTSEC Late collision */
  78731. + E_FMAN_MAC_EX_1G_COL_RET_LMT,
  78732. + /**< dTSEC Collision retry limit */
  78733. + E_FMAN_MAC_EX_1G_TX_FIFO_UNDRN,
  78734. + /**< dTSEC Transmit FIFO underrun */
  78735. + E_FMAN_MAC_EX_1G_MAG_PCKT,
  78736. + /**< dTSEC Magic Packet detection */
  78737. + E_FMAN_MAC_EX_1G_MII_MNG_RD_COMPLET,
  78738. + /**< dTSEC MII management read completion */
  78739. + E_FMAN_MAC_EX_1G_MII_MNG_WR_COMPLET,
  78740. + /**< dTSEC MII management write completion */
  78741. + E_FMAN_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET,
  78742. + /**< dTSEC Graceful receive stop complete */
  78743. + E_FMAN_MAC_EX_1G_TX_DATA_ERR,
  78744. + /**< dTSEC Internal data error on transmit */
  78745. + E_FMAN_MAC_EX_1G_RX_DATA_ERR,
  78746. + /**< dTSEC Internal data error on receive */
  78747. + E_FMAN_MAC_EX_1G_1588_TS_RX_ERR,
  78748. + /**< dTSEC Time-Stamp Receive Error */
  78749. + E_FMAN_MAC_EX_1G_RX_MIB_CNT_OVFL,
  78750. + /**< dTSEC MIB counter overflow */
  78751. + E_FMAN_MAC_EX_TS_FIFO_ECC_ERR,
  78752. + /**< mEMAC Time-stamp FIFO ECC error interrupt;
  78753. + not supported on T4240/B4860 rev1 chips */
  78754. +};
  78755. +
  78756. +#define ENET_IF_SGMII_BASEX 0x80000000
  78757. + /**< SGMII/QSGII interface with 1000BaseX auto-negotiation between MAC
  78758. + and phy or backplane;
  78759. + Note: 1000BaseX auto-negotiation relates only to interface between MAC
  78760. + and phy/backplane, SGMII phy can still synchronize with far-end phy at
  78761. + 10Mbps, 100Mbps or 1000Mbps */
  78762. +
  78763. +enum enet_mode {
  78764. + E_ENET_MODE_INVALID = 0,
  78765. + /**< Invalid Ethernet mode */
  78766. + E_ENET_MODE_MII_10 = (E_ENET_IF_MII | E_ENET_SPEED_10),
  78767. + /**< 10 Mbps MII */
  78768. + E_ENET_MODE_MII_100 = (E_ENET_IF_MII | E_ENET_SPEED_100),
  78769. + /**< 100 Mbps MII */
  78770. + E_ENET_MODE_RMII_10 = (E_ENET_IF_RMII | E_ENET_SPEED_10),
  78771. + /**< 10 Mbps RMII */
  78772. + E_ENET_MODE_RMII_100 = (E_ENET_IF_RMII | E_ENET_SPEED_100),
  78773. + /**< 100 Mbps RMII */
  78774. + E_ENET_MODE_SMII_10 = (E_ENET_IF_SMII | E_ENET_SPEED_10),
  78775. + /**< 10 Mbps SMII */
  78776. + E_ENET_MODE_SMII_100 = (E_ENET_IF_SMII | E_ENET_SPEED_100),
  78777. + /**< 100 Mbps SMII */
  78778. + E_ENET_MODE_GMII_1000 = (E_ENET_IF_GMII | E_ENET_SPEED_1000),
  78779. + /**< 1000 Mbps GMII */
  78780. + E_ENET_MODE_RGMII_10 = (E_ENET_IF_RGMII | E_ENET_SPEED_10),
  78781. + /**< 10 Mbps RGMII */
  78782. + E_ENET_MODE_RGMII_100 = (E_ENET_IF_RGMII | E_ENET_SPEED_100),
  78783. + /**< 100 Mbps RGMII */
  78784. + E_ENET_MODE_RGMII_1000 = (E_ENET_IF_RGMII | E_ENET_SPEED_1000),
  78785. + /**< 1000 Mbps RGMII */
  78786. + E_ENET_MODE_TBI_1000 = (E_ENET_IF_TBI | E_ENET_SPEED_1000),
  78787. + /**< 1000 Mbps TBI */
  78788. + E_ENET_MODE_RTBI_1000 = (E_ENET_IF_RTBI | E_ENET_SPEED_1000),
  78789. + /**< 1000 Mbps RTBI */
  78790. + E_ENET_MODE_SGMII_10 = (E_ENET_IF_SGMII | E_ENET_SPEED_10),
  78791. + /**< 10 Mbps SGMII with auto-negotiation between MAC and
  78792. + SGMII phy according to Cisco SGMII specification */
  78793. + E_ENET_MODE_SGMII_100 = (E_ENET_IF_SGMII | E_ENET_SPEED_100),
  78794. + /**< 100 Mbps SGMII with auto-negotiation between MAC and
  78795. + SGMII phy according to Cisco SGMII specification */
  78796. + E_ENET_MODE_SGMII_1000 = (E_ENET_IF_SGMII | E_ENET_SPEED_1000),
  78797. + /**< 1000 Mbps SGMII with auto-negotiation between MAC and
  78798. + SGMII phy according to Cisco SGMII specification */
  78799. + E_ENET_MODE_SGMII_BASEX_10 = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII
  78800. + | E_ENET_SPEED_10),
  78801. + /**< 10 Mbps SGMII with 1000BaseX auto-negotiation between
  78802. + MAC and SGMII phy or backplane */
  78803. + E_ENET_MODE_SGMII_BASEX_100 = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII
  78804. + | E_ENET_SPEED_100),
  78805. + /**< 100 Mbps SGMII with 1000BaseX auto-negotiation between
  78806. + MAC and SGMII phy or backplane */
  78807. + E_ENET_MODE_SGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | E_ENET_IF_SGMII
  78808. + | E_ENET_SPEED_1000),
  78809. + /**< 1000 Mbps SGMII with 1000BaseX auto-negotiation between
  78810. + MAC and SGMII phy or backplane */
  78811. + E_ENET_MODE_QSGMII_1000 = (E_ENET_IF_QSGMII | E_ENET_SPEED_1000),
  78812. + /**< 1000 Mbps QSGMII with auto-negotiation between MAC and
  78813. + QSGMII phy according to Cisco QSGMII specification */
  78814. + E_ENET_MODE_QSGMII_BASEX_1000 = (ENET_IF_SGMII_BASEX | E_ENET_IF_QSGMII
  78815. + | E_ENET_SPEED_1000),
  78816. + /**< 1000 Mbps QSGMII with 1000BaseX auto-negotiation between
  78817. + MAC and QSGMII phy or backplane */
  78818. + E_ENET_MODE_XGMII_10000 = (E_ENET_IF_XGMII | E_ENET_SPEED_10000),
  78819. + /**< 10000 Mbps XGMII */
  78820. + E_ENET_MODE_XFI_10000 = (E_ENET_IF_XFI | E_ENET_SPEED_10000)
  78821. + /**< 10000 Mbps XFI */
  78822. +};
  78823. +
  78824. +enum fmam_mac_statistics_level {
  78825. + E_FMAN_MAC_NONE_STATISTICS, /**< No statistics */
  78826. + E_FMAN_MAC_PARTIAL_STATISTICS, /**< Only error counters are available;
  78827. + Optimized for performance */
  78828. + E_FMAN_MAC_FULL_STATISTICS /**< All counters available; Not
  78829. + optimized for performance */
  78830. +};
  78831. +
  78832. +#define _MAKE_ENET_MODE(_interface, _speed) (enum enet_mode)((_interface) \
  78833. + | (_speed))
  78834. +
  78835. +#define _ENET_INTERFACE_FROM_MODE(mode) (enum enet_interface) \
  78836. + ((mode) & 0x0FFF0000)
  78837. +#define _ENET_SPEED_FROM_MODE(mode) (enum enet_speed)((mode) & 0x0000FFFF)
  78838. +#define _ENET_ADDR_TO_UINT64(_enet_addr) \
  78839. + (uint64_t)(((uint64_t)(_enet_addr)[0] << 40) | \
  78840. + ((uint64_t)(_enet_addr)[1] << 32) | \
  78841. + ((uint64_t)(_enet_addr)[2] << 24) | \
  78842. + ((uint64_t)(_enet_addr)[3] << 16) | \
  78843. + ((uint64_t)(_enet_addr)[4] << 8) | \
  78844. + ((uint64_t)(_enet_addr)[5]))
  78845. +
  78846. +#define _MAKE_ENET_ADDR_FROM_UINT64(_addr64, _enet_addr) \
  78847. + do { \
  78848. + int i; \
  78849. + for (i = 0; i < ENET_NUM_OCTETS_PER_ADDRESS; i++) \
  78850. + (_enet_addr)[i] = (uint8_t)((_addr64) >> ((5-i)*8));\
  78851. + } while (0)
  78852. +
  78853. +#endif /* __FSL_ENET_H */
  78854. --- /dev/null
  78855. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman.h
  78856. @@ -0,0 +1,825 @@
  78857. +/*
  78858. + * Copyright 2013 Freescale Semiconductor Inc.
  78859. + *
  78860. + * Redistribution and use in source and binary forms, with or without
  78861. + * modification, are permitted provided that the following conditions are met:
  78862. + * * Redistributions of source code must retain the above copyright
  78863. + * notice, this list of conditions and the following disclaimer.
  78864. + * * Redistributions in binary form must reproduce the above copyright
  78865. + * notice, this list of conditions and the following disclaimer in the
  78866. + * documentation and/or other materials provided with the distribution.
  78867. + * * Neither the name of Freescale Semiconductor nor the
  78868. + * names of its contributors may be used to endorse or promote products
  78869. + * derived from this software without specific prior written permission.
  78870. + *
  78871. + *
  78872. + * ALTERNATIVELY, this software may be distributed under the terms of the
  78873. + * GNU General Public License ("GPL") as published by the Free Software
  78874. + * Foundation, either version 2 of that License or (at your option) any
  78875. + * later version.
  78876. + *
  78877. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  78878. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  78879. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  78880. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  78881. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78882. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  78883. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  78884. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  78885. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  78886. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78887. + */
  78888. +
  78889. +#ifndef __FSL_FMAN_H
  78890. +#define __FSL_FMAN_H
  78891. +
  78892. +#include "common/general.h"
  78893. +
  78894. +struct fman_ext_pool_params {
  78895. + uint8_t id; /**< External buffer pool id */
  78896. + uint16_t size; /**< External buffer pool buffer size */
  78897. +};
  78898. +
  78899. +struct fman_ext_pools {
  78900. + uint8_t num_pools_used; /**< Number of pools use by this port */
  78901. + struct fman_ext_pool_params *ext_buf_pool;
  78902. + /**< Parameters for each port */
  78903. +};
  78904. +
  78905. +struct fman_backup_bm_pools {
  78906. + uint8_t num_backup_pools; /**< Number of BM backup pools -
  78907. + must be smaller than the total number
  78908. + of pools defined for the specified
  78909. + port.*/
  78910. + uint8_t *pool_ids; /**< numOfBackupPools pool id's,
  78911. + specifying which pools should be used
  78912. + only as backup. Pool id's specified
  78913. + here must be a subset of the pools
  78914. + used by the specified port.*/
  78915. +};
  78916. +
  78917. +/**************************************************************************//**
  78918. + @Description A structure for defining BM pool depletion criteria
  78919. +*//***************************************************************************/
  78920. +struct fman_buf_pool_depletion {
  78921. + bool buf_pool_depletion_enabled;
  78922. + bool pools_grp_mode_enable; /**< select mode in which pause frames
  78923. + will be sent after a number of pools
  78924. + (all together!) are depleted */
  78925. + uint8_t num_pools; /**< the number of depleted pools that
  78926. + will invoke pause frames transmission.
  78927. + */
  78928. + bool *pools_to_consider; /**< For each pool, TRUE if it should be
  78929. + considered for depletion (Note - this
  78930. + pool must be used by this port!). */
  78931. + bool single_pool_mode_enable; /**< select mode in which pause frames
  78932. + will be sent after a single-pool
  78933. + is depleted; */
  78934. + bool *pools_to_consider_for_single_mode;
  78935. + /**< For each pool, TRUE if it should be
  78936. + considered for depletion (Note - this
  78937. + pool must be used by this port!) */
  78938. + bool has_pfc_priorities;
  78939. + bool *pfc_priorities_en; /**< This field is used by the MAC as
  78940. + the Priority Enable Vector in the PFC
  78941. + frame which is transmitted */
  78942. +};
  78943. +
  78944. +/**************************************************************************//**
  78945. + @Description Enum for defining port DMA swap mode
  78946. +*//***************************************************************************/
  78947. +enum fman_dma_swap_option {
  78948. + FMAN_DMA_NO_SWP, /**< No swap, transfer data as is.*/
  78949. + FMAN_DMA_SWP_PPC_LE, /**< The transferred data should be swapped
  78950. + in PowerPc Little Endian mode. */
  78951. + FMAN_DMA_SWP_BE /**< The transferred data should be swapped
  78952. + in Big Endian mode */
  78953. +};
  78954. +
  78955. +/**************************************************************************//**
  78956. + @Description Enum for defining port DMA cache attributes
  78957. +*//***************************************************************************/
  78958. +enum fman_dma_cache_option {
  78959. + FMAN_DMA_NO_STASH = 0, /**< Cacheable, no Allocate (No Stashing) */
  78960. + FMAN_DMA_STASH = 1 /**< Cacheable and Allocate (Stashing on) */
  78961. +};
  78962. +
  78963. +typedef struct t_FmPrsResult fm_prs_result_t;
  78964. +typedef enum e_EnetMode enet_mode_t;
  78965. +typedef t_Handle handle_t;
  78966. +
  78967. +struct fman_revision_info {
  78968. + uint8_t majorRev; /**< Major revision */
  78969. + uint8_t minorRev; /**< Minor revision */
  78970. +};
  78971. +
  78972. +/* sizes */
  78973. +#define CAPWAP_FRAG_EXTRA_SPACE 32
  78974. +#define OFFSET_UNITS 16
  78975. +#define MAX_INT_OFFSET 240
  78976. +#define MAX_IC_SIZE 256
  78977. +#define MAX_EXT_OFFSET 496
  78978. +#define MAX_EXT_BUFFER_OFFSET 511
  78979. +
  78980. +/**************************************************************************
  78981. + @Description Memory Mapped Registers
  78982. +***************************************************************************/
  78983. +#define FMAN_LIODN_TBL 64 /* size of LIODN table */
  78984. +
  78985. +struct fman_fpm_regs {
  78986. + uint32_t fmfp_tnc; /**< FPM TNUM Control 0x00 */
  78987. + uint32_t fmfp_prc; /**< FPM Port_ID FmCtl Association 0x04 */
  78988. + uint32_t fmfp_brkc; /**< FPM Breakpoint Control 0x08 */
  78989. + uint32_t fmfp_mxd; /**< FPM Flush Control 0x0c */
  78990. + uint32_t fmfp_dist1; /**< FPM Dispatch Thresholds1 0x10 */
  78991. + uint32_t fmfp_dist2; /**< FPM Dispatch Thresholds2 0x14 */
  78992. + uint32_t fm_epi; /**< FM Error Pending Interrupts 0x18 */
  78993. + uint32_t fm_rie; /**< FM Error Interrupt Enable 0x1c */
  78994. + uint32_t fmfp_fcev[4]; /**< FPM FMan-Controller Event 1-4 0x20-0x2f */
  78995. + uint32_t res0030[4]; /**< res 0x30 - 0x3f */
  78996. + uint32_t fmfp_cee[4]; /**< PM FMan-Controller Event 1-4 0x40-0x4f */
  78997. + uint32_t res0050[4]; /**< res 0x50-0x5f */
  78998. + uint32_t fmfp_tsc1; /**< FPM TimeStamp Control1 0x60 */
  78999. + uint32_t fmfp_tsc2; /**< FPM TimeStamp Control2 0x64 */
  79000. + uint32_t fmfp_tsp; /**< FPM Time Stamp 0x68 */
  79001. + uint32_t fmfp_tsf; /**< FPM Time Stamp Fraction 0x6c */
  79002. + uint32_t fm_rcr; /**< FM Rams Control 0x70 */
  79003. + uint32_t fmfp_extc; /**< FPM External Requests Control 0x74 */
  79004. + uint32_t fmfp_ext1; /**< FPM External Requests Config1 0x78 */
  79005. + uint32_t fmfp_ext2; /**< FPM External Requests Config2 0x7c */
  79006. + uint32_t fmfp_drd[16]; /**< FPM Data_Ram Data 0-15 0x80 - 0xbf */
  79007. + uint32_t fmfp_dra; /**< FPM Data Ram Access 0xc0 */
  79008. + uint32_t fm_ip_rev_1; /**< FM IP Block Revision 1 0xc4 */
  79009. + uint32_t fm_ip_rev_2; /**< FM IP Block Revision 2 0xc8 */
  79010. + uint32_t fm_rstc; /**< FM Reset Command 0xcc */
  79011. + uint32_t fm_cld; /**< FM Classifier Debug 0xd0 */
  79012. + uint32_t fm_npi; /**< FM Normal Pending Interrupts 0xd4 */
  79013. + uint32_t fmfp_exte; /**< FPM External Requests Enable 0xd8 */
  79014. + uint32_t fmfp_ee; /**< FPM Event & Mask 0xdc */
  79015. + uint32_t fmfp_cev[4]; /**< FPM CPU Event 1-4 0xe0-0xef */
  79016. + uint32_t res00f0[4]; /**< res 0xf0-0xff */
  79017. + uint32_t fmfp_ps[64]; /**< FPM Port Status 0x100-0x1ff */
  79018. + uint32_t fmfp_clfabc; /**< FPM CLFABC 0x200 */
  79019. + uint32_t fmfp_clfcc; /**< FPM CLFCC 0x204 */
  79020. + uint32_t fmfp_clfaval; /**< FPM CLFAVAL 0x208 */
  79021. + uint32_t fmfp_clfbval; /**< FPM CLFBVAL 0x20c */
  79022. + uint32_t fmfp_clfcval; /**< FPM CLFCVAL 0x210 */
  79023. + uint32_t fmfp_clfamsk; /**< FPM CLFAMSK 0x214 */
  79024. + uint32_t fmfp_clfbmsk; /**< FPM CLFBMSK 0x218 */
  79025. + uint32_t fmfp_clfcmsk; /**< FPM CLFCMSK 0x21c */
  79026. + uint32_t fmfp_clfamc; /**< FPM CLFAMC 0x220 */
  79027. + uint32_t fmfp_clfbmc; /**< FPM CLFBMC 0x224 */
  79028. + uint32_t fmfp_clfcmc; /**< FPM CLFCMC 0x228 */
  79029. + uint32_t fmfp_decceh; /**< FPM DECCEH 0x22c */
  79030. + uint32_t res0230[116]; /**< res 0x230 - 0x3ff */
  79031. + uint32_t fmfp_ts[128]; /**< 0x400: FPM Task Status 0x400 - 0x5ff */
  79032. + uint32_t res0600[0x400 - 384];
  79033. +};
  79034. +
  79035. +struct fman_bmi_regs {
  79036. + uint32_t fmbm_init; /**< BMI Initialization 0x00 */
  79037. + uint32_t fmbm_cfg1; /**< BMI Configuration 1 0x04 */
  79038. + uint32_t fmbm_cfg2; /**< BMI Configuration 2 0x08 */
  79039. + uint32_t res000c[5]; /**< 0x0c - 0x1f */
  79040. + uint32_t fmbm_ievr; /**< Interrupt Event Register 0x20 */
  79041. + uint32_t fmbm_ier; /**< Interrupt Enable Register 0x24 */
  79042. + uint32_t fmbm_ifr; /**< Interrupt Force Register 0x28 */
  79043. + uint32_t res002c[5]; /**< 0x2c - 0x3f */
  79044. + uint32_t fmbm_arb[8]; /**< BMI Arbitration 0x40 - 0x5f */
  79045. + uint32_t res0060[12]; /**<0x60 - 0x8f */
  79046. + uint32_t fmbm_dtc[3]; /**< Debug Trap Counter 0x90 - 0x9b */
  79047. + uint32_t res009c; /**< 0x9c */
  79048. + uint32_t fmbm_dcv[3][4]; /**< Debug Compare val 0xa0-0xcf */
  79049. + uint32_t fmbm_dcm[3][4]; /**< Debug Compare Mask 0xd0-0xff */
  79050. + uint32_t fmbm_gde; /**< BMI Global Debug Enable 0x100 */
  79051. + uint32_t fmbm_pp[63]; /**< BMI Port Parameters 0x104 - 0x1ff */
  79052. + uint32_t res0200; /**< 0x200 */
  79053. + uint32_t fmbm_pfs[63]; /**< BMI Port FIFO Size 0x204 - 0x2ff */
  79054. + uint32_t res0300; /**< 0x300 */
  79055. + uint32_t fmbm_spliodn[63]; /**< Port Partition ID 0x304 - 0x3ff */
  79056. +};
  79057. +
  79058. +struct fman_qmi_regs {
  79059. + uint32_t fmqm_gc; /**< General Configuration Register 0x00 */
  79060. + uint32_t res0004; /**< 0x04 */
  79061. + uint32_t fmqm_eie; /**< Error Interrupt Event Register 0x08 */
  79062. + uint32_t fmqm_eien; /**< Error Interrupt Enable Register 0x0c */
  79063. + uint32_t fmqm_eif; /**< Error Interrupt Force Register 0x10 */
  79064. + uint32_t fmqm_ie; /**< Interrupt Event Register 0x14 */
  79065. + uint32_t fmqm_ien; /**< Interrupt Enable Register 0x18 */
  79066. + uint32_t fmqm_if; /**< Interrupt Force Register 0x1c */
  79067. + uint32_t fmqm_gs; /**< Global Status Register 0x20 */
  79068. + uint32_t fmqm_ts; /**< Task Status Register 0x24 */
  79069. + uint32_t fmqm_etfc; /**< Enqueue Total Frame Counter 0x28 */
  79070. + uint32_t fmqm_dtfc; /**< Dequeue Total Frame Counter 0x2c */
  79071. + uint32_t fmqm_dc0; /**< Dequeue Counter 0 0x30 */
  79072. + uint32_t fmqm_dc1; /**< Dequeue Counter 1 0x34 */
  79073. + uint32_t fmqm_dc2; /**< Dequeue Counter 2 0x38 */
  79074. + uint32_t fmqm_dc3; /**< Dequeue Counter 3 0x3c */
  79075. + uint32_t fmqm_dfdc; /**< Dequeue FQID from Default Counter 0x40 */
  79076. + uint32_t fmqm_dfcc; /**< Dequeue FQID from Context Counter 0x44 */
  79077. + uint32_t fmqm_dffc; /**< Dequeue FQID from FD Counter 0x48 */
  79078. + uint32_t fmqm_dcc; /**< Dequeue Confirm Counter 0x4c */
  79079. + uint32_t res0050[7]; /**< 0x50 - 0x6b */
  79080. + uint32_t fmqm_tapc; /**< Tnum Aging Period Control 0x6c */
  79081. + uint32_t fmqm_dmcvc; /**< Dequeue MAC Command Valid Counter 0x70 */
  79082. + uint32_t fmqm_difdcc; /**< Dequeue Invalid FD Command Counter 0x74 */
  79083. + uint32_t fmqm_da1v; /**< Dequeue A1 Valid Counter 0x78 */
  79084. + uint32_t res007c; /**< 0x7c */
  79085. + uint32_t fmqm_dtc; /**< 0x80 Debug Trap Counter 0x80 */
  79086. + uint32_t fmqm_efddd; /**< 0x84 Enqueue Frame desc Dynamic dbg 0x84 */
  79087. + uint32_t res0088[2]; /**< 0x88 - 0x8f */
  79088. + struct {
  79089. + uint32_t fmqm_dtcfg1; /**< 0x90 dbg trap cfg 1 Register 0x00 */
  79090. + uint32_t fmqm_dtval1; /**< Debug Trap Value 1 Register 0x04 */
  79091. + uint32_t fmqm_dtm1; /**< Debug Trap Mask 1 Register 0x08 */
  79092. + uint32_t fmqm_dtc1; /**< Debug Trap Counter 1 Register 0x0c */
  79093. + uint32_t fmqm_dtcfg2; /**< dbg Trap cfg 2 Register 0x10 */
  79094. + uint32_t fmqm_dtval2; /**< Debug Trap Value 2 Register 0x14 */
  79095. + uint32_t fmqm_dtm2; /**< Debug Trap Mask 2 Register 0x18 */
  79096. + uint32_t res001c; /**< 0x1c */
  79097. + } dbg_traps[3]; /**< 0x90 - 0xef */
  79098. + uint8_t res00f0[0x400 - 0xf0]; /**< 0xf0 - 0x3ff */
  79099. +};
  79100. +
  79101. +struct fman_dma_regs {
  79102. + uint32_t fmdmsr; /**< FM DMA status register 0x00 */
  79103. + uint32_t fmdmmr; /**< FM DMA mode register 0x04 */
  79104. + uint32_t fmdmtr; /**< FM DMA bus threshold register 0x08 */
  79105. + uint32_t fmdmhy; /**< FM DMA bus hysteresis register 0x0c */
  79106. + uint32_t fmdmsetr; /**< FM DMA SOS emergency Threshold Register 0x10 */
  79107. + uint32_t fmdmtah; /**< FM DMA transfer bus address high reg 0x14 */
  79108. + uint32_t fmdmtal; /**< FM DMA transfer bus address low reg 0x18 */
  79109. + uint32_t fmdmtcid; /**< FM DMA transfer bus communication ID reg 0x1c */
  79110. + uint32_t fmdmra; /**< FM DMA bus internal ram address register 0x20 */
  79111. + uint32_t fmdmrd; /**< FM DMA bus internal ram data register 0x24 */
  79112. + uint32_t fmdmwcr; /**< FM DMA CAM watchdog counter value 0x28 */
  79113. + uint32_t fmdmebcr; /**< FM DMA CAM base in MURAM register 0x2c */
  79114. + uint32_t fmdmccqdr; /**< FM DMA CAM and CMD Queue Debug reg 0x30 */
  79115. + uint32_t fmdmccqvr1; /**< FM DMA CAM and CMD Queue Value reg #1 0x34 */
  79116. + uint32_t fmdmccqvr2; /**< FM DMA CAM and CMD Queue Value reg #2 0x38 */
  79117. + uint32_t fmdmcqvr3; /**< FM DMA CMD Queue Value register #3 0x3c */
  79118. + uint32_t fmdmcqvr4; /**< FM DMA CMD Queue Value register #4 0x40 */
  79119. + uint32_t fmdmcqvr5; /**< FM DMA CMD Queue Value register #5 0x44 */
  79120. + uint32_t fmdmsefrc; /**< FM DMA Semaphore Entry Full Reject Cntr 0x48 */
  79121. + uint32_t fmdmsqfrc; /**< FM DMA Semaphore Queue Full Reject Cntr 0x4c */
  79122. + uint32_t fmdmssrc; /**< FM DMA Semaphore SYNC Reject Counter 0x50 */
  79123. + uint32_t fmdmdcr; /**< FM DMA Debug Counter 0x54 */
  79124. + uint32_t fmdmemsr; /**< FM DMA Emergency Smoother Register 0x58 */
  79125. + uint32_t res005c; /**< 0x5c */
  79126. + uint32_t fmdmplr[FMAN_LIODN_TBL / 2]; /**< DMA LIODN regs 0x60-0xdf */
  79127. + uint32_t res00e0[0x400 - 56];
  79128. +};
  79129. +
  79130. +struct fman_rg {
  79131. + struct fman_fpm_regs *fpm_rg;
  79132. + struct fman_dma_regs *dma_rg;
  79133. + struct fman_bmi_regs *bmi_rg;
  79134. + struct fman_qmi_regs *qmi_rg;
  79135. +};
  79136. +
  79137. +enum fman_dma_cache_override {
  79138. + E_FMAN_DMA_NO_CACHE_OR = 0, /**< No override of the Cache field */
  79139. + E_FMAN_DMA_NO_STASH_DATA, /**< No data stashing in system level cache */
  79140. + E_FMAN_DMA_MAY_STASH_DATA, /**< Stashing allowed in sys level cache */
  79141. + E_FMAN_DMA_STASH_DATA /**< Stashing performed in system level cache */
  79142. +};
  79143. +
  79144. +enum fman_dma_aid_mode {
  79145. + E_FMAN_DMA_AID_OUT_PORT_ID = 0, /**< 4 LSB of PORT_ID */
  79146. + E_FMAN_DMA_AID_OUT_TNUM /**< 4 LSB of TNUM */
  79147. +};
  79148. +
  79149. +enum fman_dma_dbg_cnt_mode {
  79150. + E_FMAN_DMA_DBG_NO_CNT = 0, /**< No counting */
  79151. + E_FMAN_DMA_DBG_CNT_DONE, /**< Count DONE commands */
  79152. + E_FMAN_DMA_DBG_CNT_COMM_Q_EM, /**< command Q emergency signal */
  79153. + E_FMAN_DMA_DBG_CNT_INT_READ_EM, /**< Read buf emergency signal */
  79154. + E_FMAN_DMA_DBG_CNT_INT_WRITE_EM, /**< Write buf emergency signal */
  79155. + E_FMAN_DMA_DBG_CNT_FPM_WAIT, /**< FPM WAIT signal */
  79156. + E_FMAN_DMA_DBG_CNT_SIGLE_BIT_ECC, /**< Single bit ECC errors */
  79157. + E_FMAN_DMA_DBG_CNT_RAW_WAR_PROT /**< RAW & WAR protection counter */
  79158. +};
  79159. +
  79160. +enum fman_dma_emergency_level {
  79161. + E_FMAN_DMA_EM_EBS = 0, /**< EBS emergency */
  79162. + E_FMAN_DMA_EM_SOS /**< SOS emergency */
  79163. +};
  79164. +
  79165. +enum fman_catastrophic_err {
  79166. + E_FMAN_CATAST_ERR_STALL_PORT = 0, /**< Port_ID stalled reset required */
  79167. + E_FMAN_CATAST_ERR_STALL_TASK /**< Only erroneous task is stalled */
  79168. +};
  79169. +
  79170. +enum fman_dma_err {
  79171. + E_FMAN_DMA_ERR_CATASTROPHIC = 0, /**< Catastrophic DMA error */
  79172. + E_FMAN_DMA_ERR_REPORT /**< Reported DMA error */
  79173. +};
  79174. +
  79175. +struct fman_cfg {
  79176. + uint16_t liodn_bs_pr_port[FMAN_LIODN_TBL];/* base per port */
  79177. + bool en_counters;
  79178. + uint8_t disp_limit_tsh;
  79179. + uint8_t prs_disp_tsh;
  79180. + uint8_t plcr_disp_tsh;
  79181. + uint8_t kg_disp_tsh;
  79182. + uint8_t bmi_disp_tsh;
  79183. + uint8_t qmi_enq_disp_tsh;
  79184. + uint8_t qmi_deq_disp_tsh;
  79185. + uint8_t fm_ctl1_disp_tsh;
  79186. + uint8_t fm_ctl2_disp_tsh;
  79187. + enum fman_dma_cache_override dma_cache_override;
  79188. + enum fman_dma_aid_mode dma_aid_mode;
  79189. + bool dma_aid_override;
  79190. + uint8_t dma_axi_dbg_num_of_beats;
  79191. + uint8_t dma_cam_num_of_entries;
  79192. + uint32_t dma_watchdog;
  79193. + uint8_t dma_comm_qtsh_asrt_emer;
  79194. + uint8_t dma_write_buf_tsh_asrt_emer;
  79195. + uint8_t dma_read_buf_tsh_asrt_emer;
  79196. + uint8_t dma_comm_qtsh_clr_emer;
  79197. + uint8_t dma_write_buf_tsh_clr_emer;
  79198. + uint8_t dma_read_buf_tsh_clr_emer;
  79199. + uint32_t dma_sos_emergency;
  79200. + enum fman_dma_dbg_cnt_mode dma_dbg_cnt_mode;
  79201. + bool dma_stop_on_bus_error;
  79202. + bool dma_en_emergency;
  79203. + uint32_t dma_emergency_bus_select;
  79204. + enum fman_dma_emergency_level dma_emergency_level;
  79205. + bool dma_en_emergency_smoother;
  79206. + uint32_t dma_emergency_switch_counter;
  79207. + bool halt_on_external_activ;
  79208. + bool halt_on_unrecov_ecc_err;
  79209. + enum fman_catastrophic_err catastrophic_err;
  79210. + enum fman_dma_err dma_err;
  79211. + bool en_muram_test_mode;
  79212. + bool en_iram_test_mode;
  79213. + bool external_ecc_rams_enable;
  79214. + uint16_t tnum_aging_period;
  79215. + uint32_t exceptions;
  79216. + uint16_t clk_freq;
  79217. + bool pedantic_dma;
  79218. + uint32_t cam_base_addr;
  79219. + uint32_t fifo_base_addr;
  79220. + uint32_t total_fifo_size;
  79221. + uint8_t total_num_of_tasks;
  79222. + bool qmi_deq_option_support;
  79223. + uint32_t qmi_def_tnums_thresh;
  79224. + bool fman_partition_array;
  79225. + uint8_t num_of_fman_ctrl_evnt_regs;
  79226. +};
  79227. +
  79228. +/**************************************************************************//**
  79229. + @Description Exceptions
  79230. +*//***************************************************************************/
  79231. +#define FMAN_EX_DMA_BUS_ERROR 0x80000000
  79232. +#define FMAN_EX_DMA_READ_ECC 0x40000000
  79233. +#define FMAN_EX_DMA_SYSTEM_WRITE_ECC 0x20000000
  79234. +#define FMAN_EX_DMA_FM_WRITE_ECC 0x10000000
  79235. +#define FMAN_EX_FPM_STALL_ON_TASKS 0x08000000
  79236. +#define FMAN_EX_FPM_SINGLE_ECC 0x04000000
  79237. +#define FMAN_EX_FPM_DOUBLE_ECC 0x02000000
  79238. +#define FMAN_EX_QMI_SINGLE_ECC 0x01000000
  79239. +#define FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID 0x00800000
  79240. +#define FMAN_EX_QMI_DOUBLE_ECC 0x00400000
  79241. +#define FMAN_EX_BMI_LIST_RAM_ECC 0x00200000
  79242. +#define FMAN_EX_BMI_PIPELINE_ECC 0x00100000
  79243. +#define FMAN_EX_BMI_STATISTICS_RAM_ECC 0x00080000
  79244. +#define FMAN_EX_IRAM_ECC 0x00040000
  79245. +#define FMAN_EX_NURAM_ECC 0x00020000
  79246. +#define FMAN_EX_BMI_DISPATCH_RAM_ECC 0x00010000
  79247. +
  79248. +enum fman_exceptions {
  79249. + E_FMAN_EX_DMA_BUS_ERROR = 0, /**< DMA bus error. */
  79250. + E_FMAN_EX_DMA_READ_ECC, /**< Read Buffer ECC error */
  79251. + E_FMAN_EX_DMA_SYSTEM_WRITE_ECC, /**< Write Buffer ECC err on sys side */
  79252. + E_FMAN_EX_DMA_FM_WRITE_ECC, /**< Write Buffer ECC error on FM side */
  79253. + E_FMAN_EX_FPM_STALL_ON_TASKS, /**< Stall of tasks on FPM */
  79254. + E_FMAN_EX_FPM_SINGLE_ECC, /**< Single ECC on FPM. */
  79255. + E_FMAN_EX_FPM_DOUBLE_ECC, /**< Double ECC error on FPM ram access */
  79256. + E_FMAN_EX_QMI_SINGLE_ECC, /**< Single ECC on QMI. */
  79257. + E_FMAN_EX_QMI_DOUBLE_ECC, /**< Double bit ECC occurred on QMI */
  79258. + E_FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< DeQ from unknown port id */
  79259. + E_FMAN_EX_BMI_LIST_RAM_ECC, /**< Linked List RAM ECC error */
  79260. + E_FMAN_EX_BMI_STORAGE_PROFILE_ECC, /**< storage profile */
  79261. + E_FMAN_EX_BMI_STATISTICS_RAM_ECC, /**< Statistics RAM ECC Err Enable */
  79262. + E_FMAN_EX_BMI_DISPATCH_RAM_ECC, /**< Dispatch RAM ECC Error Enable */
  79263. + E_FMAN_EX_IRAM_ECC, /**< Double bit ECC occurred on IRAM*/
  79264. + E_FMAN_EX_MURAM_ECC /**< Double bit ECC occurred on MURAM*/
  79265. +};
  79266. +
  79267. +enum fman_counters {
  79268. + E_FMAN_COUNTERS_ENQ_TOTAL_FRAME = 0, /**< QMI tot enQ frames counter */
  79269. + E_FMAN_COUNTERS_DEQ_TOTAL_FRAME, /**< QMI tot deQ frames counter */
  79270. + E_FMAN_COUNTERS_DEQ_0, /**< QMI 0 frames from QMan counter */
  79271. + E_FMAN_COUNTERS_DEQ_1, /**< QMI 1 frames from QMan counter */
  79272. + E_FMAN_COUNTERS_DEQ_2, /**< QMI 2 frames from QMan counter */
  79273. + E_FMAN_COUNTERS_DEQ_3, /**< QMI 3 frames from QMan counter */
  79274. + E_FMAN_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI deQ from dflt queue cntr */
  79275. + E_FMAN_COUNTERS_DEQ_FROM_CONTEXT, /**< QMI deQ from FQ context cntr */
  79276. + E_FMAN_COUNTERS_DEQ_FROM_FD, /**< QMI deQ from FD command field cntr */
  79277. + E_FMAN_COUNTERS_DEQ_CONFIRM, /**< QMI dequeue confirm counter */
  79278. + E_FMAN_COUNTERS_SEMAPHOR_ENTRY_FULL_REJECT, /**< DMA full entry cntr */
  79279. + E_FMAN_COUNTERS_SEMAPHOR_QUEUE_FULL_REJECT, /**< DMA full CAM Q cntr */
  79280. + E_FMAN_COUNTERS_SEMAPHOR_SYNC_REJECT /**< DMA sync counter */
  79281. +};
  79282. +
  79283. +#define FPM_PRT_FM_CTL1 0x00000001
  79284. +#define FPM_PRT_FM_CTL2 0x00000002
  79285. +
  79286. +/**************************************************************************//**
  79287. + @Description DMA definitions
  79288. +*//***************************************************************************/
  79289. +
  79290. +/* masks */
  79291. +#define DMA_MODE_AID_OR 0x20000000
  79292. +#define DMA_MODE_SBER 0x10000000
  79293. +#define DMA_MODE_BER 0x00200000
  79294. +#define DMA_MODE_EB 0x00100000
  79295. +#define DMA_MODE_ECC 0x00000020
  79296. +#define DMA_MODE_PRIVILEGE_PROT 0x00001000
  79297. +#define DMA_MODE_SECURE_PROT 0x00000800
  79298. +#define DMA_MODE_EMER_READ 0x00080000
  79299. +#define DMA_MODE_EMER_WRITE 0x00040000
  79300. +#define DMA_MODE_CACHE_OR_MASK 0xC0000000
  79301. +#define DMA_MODE_CEN_MASK 0x0000E000
  79302. +#define DMA_MODE_DBG_MASK 0x00000380
  79303. +#define DMA_MODE_AXI_DBG_MASK 0x0F000000
  79304. +
  79305. +#define DMA_EMSR_EMSTR_MASK 0x0000FFFF
  79306. +
  79307. +#define DMA_TRANSFER_PORTID_MASK 0xFF000000
  79308. +#define DMA_TRANSFER_TNUM_MASK 0x00FF0000
  79309. +#define DMA_TRANSFER_LIODN_MASK 0x00000FFF
  79310. +
  79311. +#define DMA_HIGH_LIODN_MASK 0x0FFF0000
  79312. +#define DMA_LOW_LIODN_MASK 0x00000FFF
  79313. +
  79314. +#define DMA_STATUS_CMD_QUEUE_NOT_EMPTY 0x10000000
  79315. +#define DMA_STATUS_BUS_ERR 0x08000000
  79316. +#define DMA_STATUS_READ_ECC 0x04000000
  79317. +#define DMA_STATUS_SYSTEM_WRITE_ECC 0x02000000
  79318. +#define DMA_STATUS_FM_WRITE_ECC 0x01000000
  79319. +#define DMA_STATUS_SYSTEM_DPEXT_ECC 0x00800000
  79320. +#define DMA_STATUS_FM_DPEXT_ECC 0x00400000
  79321. +#define DMA_STATUS_SYSTEM_DPDAT_ECC 0x00200000
  79322. +#define DMA_STATUS_FM_DPDAT_ECC 0x00100000
  79323. +#define DMA_STATUS_FM_SPDAT_ECC 0x00080000
  79324. +
  79325. +#define FM_LIODN_BASE_MASK 0x00000FFF
  79326. +
  79327. +/* shifts */
  79328. +#define DMA_MODE_CACHE_OR_SHIFT 30
  79329. +#define DMA_MODE_BUS_PRI_SHIFT 16
  79330. +#define DMA_MODE_AXI_DBG_SHIFT 24
  79331. +#define DMA_MODE_CEN_SHIFT 13
  79332. +#define DMA_MODE_BUS_PROT_SHIFT 10
  79333. +#define DMA_MODE_DBG_SHIFT 7
  79334. +#define DMA_MODE_EMER_LVL_SHIFT 6
  79335. +#define DMA_MODE_AID_MODE_SHIFT 4
  79336. +#define DMA_MODE_MAX_AXI_DBG_NUM_OF_BEATS 16
  79337. +#define DMA_MODE_MAX_CAM_NUM_OF_ENTRIES 32
  79338. +
  79339. +#define DMA_THRESH_COMMQ_SHIFT 24
  79340. +#define DMA_THRESH_READ_INT_BUF_SHIFT 16
  79341. +
  79342. +#define DMA_LIODN_SHIFT 16
  79343. +
  79344. +#define DMA_TRANSFER_PORTID_SHIFT 24
  79345. +#define DMA_TRANSFER_TNUM_SHIFT 16
  79346. +
  79347. +/* sizes */
  79348. +#define DMA_MAX_WATCHDOG 0xffffffff
  79349. +
  79350. +/* others */
  79351. +#define DMA_CAM_SIZEOF_ENTRY 0x40
  79352. +#define DMA_CAM_ALIGN 0x1000
  79353. +#define DMA_CAM_UNITS 8
  79354. +
  79355. +/**************************************************************************//**
  79356. + @Description General defines
  79357. +*//***************************************************************************/
  79358. +
  79359. +#define FM_DEBUG_STATUS_REGISTER_OFFSET 0x000d1084UL
  79360. +#define FM_UCODE_DEBUG_INSTRUCTION 0x6ffff805UL
  79361. +
  79362. +/**************************************************************************//**
  79363. + @Description FPM defines
  79364. +*//***************************************************************************/
  79365. +
  79366. +/* masks */
  79367. +#define FPM_EV_MASK_DOUBLE_ECC 0x80000000
  79368. +#define FPM_EV_MASK_STALL 0x40000000
  79369. +#define FPM_EV_MASK_SINGLE_ECC 0x20000000
  79370. +#define FPM_EV_MASK_RELEASE_FM 0x00010000
  79371. +#define FPM_EV_MASK_DOUBLE_ECC_EN 0x00008000
  79372. +#define FPM_EV_MASK_STALL_EN 0x00004000
  79373. +#define FPM_EV_MASK_SINGLE_ECC_EN 0x00002000
  79374. +#define FPM_EV_MASK_EXTERNAL_HALT 0x00000008
  79375. +#define FPM_EV_MASK_ECC_ERR_HALT 0x00000004
  79376. +
  79377. +#define FPM_RAM_RAMS_ECC_EN 0x80000000
  79378. +#define FPM_RAM_IRAM_ECC_EN 0x40000000
  79379. +#define FPM_RAM_MURAM_ECC 0x00008000
  79380. +#define FPM_RAM_IRAM_ECC 0x00004000
  79381. +#define FPM_RAM_MURAM_TEST_ECC 0x20000000
  79382. +#define FPM_RAM_IRAM_TEST_ECC 0x10000000
  79383. +#define FPM_RAM_RAMS_ECC_EN_SRC_SEL 0x08000000
  79384. +
  79385. +#define FPM_IRAM_ECC_ERR_EX_EN 0x00020000
  79386. +#define FPM_MURAM_ECC_ERR_EX_EN 0x00040000
  79387. +
  79388. +#define FPM_REV1_MAJOR_MASK 0x0000FF00
  79389. +#define FPM_REV1_MINOR_MASK 0x000000FF
  79390. +
  79391. +#define FPM_REV2_INTEG_MASK 0x00FF0000
  79392. +#define FPM_REV2_ERR_MASK 0x0000FF00
  79393. +#define FPM_REV2_CFG_MASK 0x000000FF
  79394. +
  79395. +#define FPM_TS_FRACTION_MASK 0x0000FFFF
  79396. +#define FPM_TS_CTL_EN 0x80000000
  79397. +
  79398. +#define FPM_PRC_REALSE_STALLED 0x00800000
  79399. +
  79400. +#define FPM_PS_STALLED 0x00800000
  79401. +#define FPM_PS_FM_CTL1_SEL 0x80000000
  79402. +#define FPM_PS_FM_CTL2_SEL 0x40000000
  79403. +#define FPM_PS_FM_CTL_SEL_MASK (FPM_PS_FM_CTL1_SEL | FPM_PS_FM_CTL2_SEL)
  79404. +
  79405. +#define FPM_RSTC_FM_RESET 0x80000000
  79406. +#define FPM_RSTC_10G0_RESET 0x04000000
  79407. +#define FPM_RSTC_1G0_RESET 0x40000000
  79408. +#define FPM_RSTC_1G1_RESET 0x20000000
  79409. +#define FPM_RSTC_1G2_RESET 0x10000000
  79410. +#define FPM_RSTC_1G3_RESET 0x08000000
  79411. +#define FPM_RSTC_1G4_RESET 0x02000000
  79412. +
  79413. +
  79414. +#define FPM_DISP_LIMIT_MASK 0x1F000000
  79415. +#define FPM_THR1_PRS_MASK 0xFF000000
  79416. +#define FPM_THR1_KG_MASK 0x00FF0000
  79417. +#define FPM_THR1_PLCR_MASK 0x0000FF00
  79418. +#define FPM_THR1_BMI_MASK 0x000000FF
  79419. +
  79420. +#define FPM_THR2_QMI_ENQ_MASK 0xFF000000
  79421. +#define FPM_THR2_QMI_DEQ_MASK 0x000000FF
  79422. +#define FPM_THR2_FM_CTL1_MASK 0x00FF0000
  79423. +#define FPM_THR2_FM_CTL2_MASK 0x0000FF00
  79424. +
  79425. +/* shifts */
  79426. +#define FPM_DISP_LIMIT_SHIFT 24
  79427. +
  79428. +#define FPM_THR1_PRS_SHIFT 24
  79429. +#define FPM_THR1_KG_SHIFT 16
  79430. +#define FPM_THR1_PLCR_SHIFT 8
  79431. +#define FPM_THR1_BMI_SHIFT 0
  79432. +
  79433. +#define FPM_THR2_QMI_ENQ_SHIFT 24
  79434. +#define FPM_THR2_QMI_DEQ_SHIFT 0
  79435. +#define FPM_THR2_FM_CTL1_SHIFT 16
  79436. +#define FPM_THR2_FM_CTL2_SHIFT 8
  79437. +
  79438. +#define FPM_EV_MASK_CAT_ERR_SHIFT 1
  79439. +#define FPM_EV_MASK_DMA_ERR_SHIFT 0
  79440. +
  79441. +#define FPM_REV1_MAJOR_SHIFT 8
  79442. +#define FPM_REV1_MINOR_SHIFT 0
  79443. +
  79444. +#define FPM_REV2_INTEG_SHIFT 16
  79445. +#define FPM_REV2_ERR_SHIFT 8
  79446. +#define FPM_REV2_CFG_SHIFT 0
  79447. +
  79448. +#define FPM_TS_INT_SHIFT 16
  79449. +
  79450. +#define FPM_PORT_FM_CTL_PORTID_SHIFT 24
  79451. +
  79452. +#define FPM_PS_FM_CTL_SEL_SHIFT 30
  79453. +#define FPM_PRC_ORA_FM_CTL_SEL_SHIFT 16
  79454. +
  79455. +#define FPM_DISP_LIMIT_SHIFT 24
  79456. +
  79457. +/* Interrupts defines */
  79458. +#define FPM_EVENT_FM_CTL_0 0x00008000
  79459. +#define FPM_EVENT_FM_CTL 0x0000FF00
  79460. +#define FPM_EVENT_FM_CTL_BRK 0x00000080
  79461. +
  79462. +/* others */
  79463. +#define FPM_MAX_DISP_LIMIT 31
  79464. +#define FPM_RSTC_FM_RESET 0x80000000
  79465. +#define FPM_RSTC_1G0_RESET 0x40000000
  79466. +#define FPM_RSTC_1G1_RESET 0x20000000
  79467. +#define FPM_RSTC_1G2_RESET 0x10000000
  79468. +#define FPM_RSTC_1G3_RESET 0x08000000
  79469. +#define FPM_RSTC_10G0_RESET 0x04000000
  79470. +#define FPM_RSTC_1G4_RESET 0x02000000
  79471. +#define FPM_RSTC_1G5_RESET 0x01000000
  79472. +#define FPM_RSTC_1G6_RESET 0x00800000
  79473. +#define FPM_RSTC_1G7_RESET 0x00400000
  79474. +#define FPM_RSTC_10G1_RESET 0x00200000
  79475. +/**************************************************************************//**
  79476. + @Description BMI defines
  79477. +*//***************************************************************************/
  79478. +/* masks */
  79479. +#define BMI_INIT_START 0x80000000
  79480. +#define BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC 0x80000000
  79481. +#define BMI_ERR_INTR_EN_LIST_RAM_ECC 0x40000000
  79482. +#define BMI_ERR_INTR_EN_STATISTICS_RAM_ECC 0x20000000
  79483. +#define BMI_ERR_INTR_EN_DISPATCH_RAM_ECC 0x10000000
  79484. +#define BMI_NUM_OF_TASKS_MASK 0x3F000000
  79485. +#define BMI_NUM_OF_EXTRA_TASKS_MASK 0x000F0000
  79486. +#define BMI_NUM_OF_DMAS_MASK 0x00000F00
  79487. +#define BMI_NUM_OF_EXTRA_DMAS_MASK 0x0000000F
  79488. +#define BMI_FIFO_SIZE_MASK 0x000003FF
  79489. +#define BMI_EXTRA_FIFO_SIZE_MASK 0x03FF0000
  79490. +#define BMI_CFG2_DMAS_MASK 0x0000003F
  79491. +#define BMI_TOTAL_FIFO_SIZE_MASK 0x07FF0000
  79492. +#define BMI_TOTAL_NUM_OF_TASKS_MASK 0x007F0000
  79493. +
  79494. +/* shifts */
  79495. +#define BMI_CFG2_TASKS_SHIFT 16
  79496. +#define BMI_CFG2_DMAS_SHIFT 0
  79497. +#define BMI_CFG1_FIFO_SIZE_SHIFT 16
  79498. +#define BMI_FIFO_SIZE_SHIFT 0
  79499. +#define BMI_EXTRA_FIFO_SIZE_SHIFT 16
  79500. +#define BMI_NUM_OF_TASKS_SHIFT 24
  79501. +#define BMI_EXTRA_NUM_OF_TASKS_SHIFT 16
  79502. +#define BMI_NUM_OF_DMAS_SHIFT 8
  79503. +#define BMI_EXTRA_NUM_OF_DMAS_SHIFT 0
  79504. +
  79505. +/* others */
  79506. +#define BMI_FIFO_ALIGN 0x100
  79507. +#define FMAN_BMI_FIFO_UNITS 0x100
  79508. +
  79509. +
  79510. +/**************************************************************************//**
  79511. + @Description QMI defines
  79512. +*//***************************************************************************/
  79513. +/* masks */
  79514. +#define QMI_CFG_ENQ_EN 0x80000000
  79515. +#define QMI_CFG_DEQ_EN 0x40000000
  79516. +#define QMI_CFG_EN_COUNTERS 0x10000000
  79517. +#define QMI_CFG_SOFT_RESET 0x01000000
  79518. +#define QMI_CFG_DEQ_MASK 0x0000003F
  79519. +#define QMI_CFG_ENQ_MASK 0x00003F00
  79520. +
  79521. +#define QMI_ERR_INTR_EN_DOUBLE_ECC 0x80000000
  79522. +#define QMI_ERR_INTR_EN_DEQ_FROM_DEF 0x40000000
  79523. +#define QMI_INTR_EN_SINGLE_ECC 0x80000000
  79524. +
  79525. +/* shifts */
  79526. +#define QMI_CFG_ENQ_SHIFT 8
  79527. +#define QMI_TAPC_TAP 22
  79528. +
  79529. +#define QMI_GS_HALT_NOT_BUSY 0x00000002
  79530. +
  79531. +/**************************************************************************//**
  79532. + @Description IRAM defines
  79533. +*//***************************************************************************/
  79534. +/* masks */
  79535. +#define IRAM_IADD_AIE 0x80000000
  79536. +#define IRAM_READY 0x80000000
  79537. +
  79538. +uint32_t fman_get_bmi_err_event(struct fman_bmi_regs *bmi_rg);
  79539. +uint32_t fman_get_qmi_err_event(struct fman_qmi_regs *qmi_rg);
  79540. +uint32_t fman_get_dma_com_id(struct fman_dma_regs *dma_rg);
  79541. +uint64_t fman_get_dma_addr(struct fman_dma_regs *dma_rg);
  79542. +uint32_t fman_get_dma_err_event(struct fman_dma_regs *dma_rg);
  79543. +uint32_t fman_get_fpm_err_event(struct fman_fpm_regs *fpm_rg);
  79544. +uint32_t fman_get_muram_err_event(struct fman_fpm_regs *fpm_rg);
  79545. +uint32_t fman_get_iram_err_event(struct fman_fpm_regs *fpm_rg);
  79546. +uint32_t fman_get_qmi_event(struct fman_qmi_regs *qmi_rg);
  79547. +uint32_t fman_get_fpm_error_interrupts(struct fman_fpm_regs *fpm_rg);
  79548. +uint32_t fman_get_ctrl_intr(struct fman_fpm_regs *fpm_rg,
  79549. + uint8_t event_reg_id);
  79550. +uint8_t fman_get_qmi_deq_th(struct fman_qmi_regs *qmi_rg);
  79551. +uint8_t fman_get_qmi_enq_th(struct fman_qmi_regs *qmi_rg);
  79552. +uint16_t fman_get_size_of_fifo(struct fman_bmi_regs *bmi_rg, uint8_t port_id);
  79553. +uint32_t fman_get_total_fifo_size(struct fman_bmi_regs *bmi_rg);
  79554. +uint16_t fman_get_size_of_extra_fifo(struct fman_bmi_regs *bmi_rg,
  79555. + uint8_t port_id);
  79556. +uint8_t fman_get_num_of_tasks(struct fman_bmi_regs *bmi_rg, uint8_t port_id);
  79557. +uint8_t fman_get_num_extra_tasks(struct fman_bmi_regs *bmi_rg,
  79558. + uint8_t port_id);
  79559. +uint8_t fman_get_num_of_dmas(struct fman_bmi_regs *bmi_rg, uint8_t port_id);
  79560. +uint8_t fman_get_num_extra_dmas(struct fman_bmi_regs *bmi_rg,
  79561. + uint8_t port_id);
  79562. +uint32_t fman_get_normal_pending(struct fman_fpm_regs *fpm_rg);
  79563. +uint32_t fman_get_controller_event(struct fman_fpm_regs *fpm_rg,
  79564. + uint8_t reg_id);
  79565. +uint32_t fman_get_error_pending(struct fman_fpm_regs *fpm_rg);
  79566. +void fman_get_revision(struct fman_fpm_regs *fpm_rg, uint8_t *major,
  79567. + uint8_t *minor);
  79568. +uint32_t fman_get_counter(struct fman_rg *fman_rg,
  79569. + enum fman_counters reg_name);
  79570. +uint32_t fman_get_dma_status(struct fman_dma_regs *dma_rg);
  79571. +
  79572. +
  79573. +int fman_set_erratum_10gmac_a004_wa(struct fman_fpm_regs *fpm_rg);
  79574. +void fman_set_ctrl_intr(struct fman_fpm_regs *fpm_rg, uint8_t event_reg_id,
  79575. + uint32_t enable_events);
  79576. +void fman_set_num_of_riscs_per_port(struct fman_fpm_regs *fpm_rg,
  79577. + uint8_t port_id,
  79578. + uint8_t num_fman_ctrls,
  79579. + uint32_t or_fman_ctrl);
  79580. +void fman_set_order_restoration_per_port(struct fman_fpm_regs *fpm_rg,
  79581. + uint8_t port_id,
  79582. + bool independent_mode,
  79583. + bool is_rx_port);
  79584. +void fman_set_qmi_enq_th(struct fman_qmi_regs *qmi_rg, uint8_t val);
  79585. +void fman_set_qmi_deq_th(struct fman_qmi_regs *qmi_rg, uint8_t val);
  79586. +void fman_set_liodn_per_port(struct fman_rg *fman_rg,
  79587. + uint8_t port_id,
  79588. + uint16_t liodn_base,
  79589. + uint16_t liodn_offset);
  79590. +void fman_set_size_of_fifo(struct fman_bmi_regs *bmi_rg,
  79591. + uint8_t port_id,
  79592. + uint32_t size_of_fifo,
  79593. + uint32_t extra_size_of_fifo);
  79594. +void fman_set_num_of_tasks(struct fman_bmi_regs *bmi_rg,
  79595. + uint8_t port_id,
  79596. + uint8_t num_of_tasks,
  79597. + uint8_t num_of_extra_tasks);
  79598. +void fman_set_num_of_open_dmas(struct fman_bmi_regs *bmi_rg,
  79599. + uint8_t port_id,
  79600. + uint8_t num_of_open_dmas,
  79601. + uint8_t num_of_extra_open_dmas,
  79602. + uint8_t total_num_of_dmas);
  79603. +void fman_set_ports_bandwidth(struct fman_bmi_regs *bmi_rg, uint8_t *weights);
  79604. +int fman_set_exception(struct fman_rg *fman_rg,
  79605. + enum fman_exceptions exception,
  79606. + bool enable);
  79607. +void fman_set_dma_emergency(struct fman_dma_regs *dma_rg, bool is_write,
  79608. + bool enable);
  79609. +void fman_set_dma_ext_bus_pri(struct fman_dma_regs *dma_rg, uint32_t pri);
  79610. +void fman_set_congestion_group_pfc_priority(uint32_t *cpg_rg,
  79611. + uint32_t congestion_group_id,
  79612. + uint8_t piority_bit_map,
  79613. + uint32_t reg_num);
  79614. +
  79615. +
  79616. +void fman_defconfig(struct fman_cfg *cfg, bool is_master);
  79617. +void fman_regconfig(struct fman_rg *fman_rg, struct fman_cfg *cfg);
  79618. +int fman_fpm_init(struct fman_fpm_regs *fpm_rg, struct fman_cfg *cfg);
  79619. +int fman_bmi_init(struct fman_bmi_regs *bmi_rg, struct fman_cfg *cfg);
  79620. +int fman_qmi_init(struct fman_qmi_regs *qmi_rg, struct fman_cfg *cfg);
  79621. +int fman_dma_init(struct fman_dma_regs *dma_rg, struct fman_cfg *cfg);
  79622. +void fman_free_resources(struct fman_rg *fman_rg);
  79623. +int fman_enable(struct fman_rg *fman_rg, struct fman_cfg *cfg);
  79624. +void fman_reset(struct fman_fpm_regs *fpm_rg);
  79625. +void fman_resume(struct fman_fpm_regs *fpm_rg);
  79626. +
  79627. +
  79628. +void fman_enable_time_stamp(struct fman_fpm_regs *fpm_rg,
  79629. + uint8_t count1ubit,
  79630. + uint16_t fm_clk_freq);
  79631. +void fman_enable_rams_ecc(struct fman_fpm_regs *fpm_rg);
  79632. +void fman_qmi_disable_dispatch_limit(struct fman_fpm_regs *fpm_rg);
  79633. +void fman_disable_rams_ecc(struct fman_fpm_regs *fpm_rg);
  79634. +void fman_resume_stalled_port(struct fman_fpm_regs *fpm_rg, uint8_t port_id);
  79635. +int fman_reset_mac(struct fman_fpm_regs *fpm_rg, uint8_t macId, bool is_10g);
  79636. +bool fman_is_port_stalled(struct fman_fpm_regs *fpm_rg, uint8_t port_id);
  79637. +bool fman_rams_ecc_is_external_ctl(struct fman_fpm_regs *fpm_rg);
  79638. +bool fman_is_qmi_halt_not_busy_state(struct fman_qmi_regs *qmi_rg);
  79639. +int fman_modify_counter(struct fman_rg *fman_rg,
  79640. + enum fman_counters reg_name,
  79641. + uint32_t val);
  79642. +void fman_force_intr(struct fman_rg *fman_rg,
  79643. + enum fman_exceptions exception);
  79644. +void fman_set_vsp_window(struct fman_bmi_regs *bmi_rg,
  79645. + uint8_t port_id,
  79646. + uint8_t base_storage_profile,
  79647. + uint8_t log2_num_of_profiles);
  79648. +
  79649. +/**************************************************************************//**
  79650. + @Description default values
  79651. +*//***************************************************************************/
  79652. +#define DEFAULT_CATASTROPHIC_ERR E_FMAN_CATAST_ERR_STALL_PORT
  79653. +#define DEFAULT_DMA_ERR E_FMAN_DMA_ERR_CATASTROPHIC
  79654. +#define DEFAULT_HALT_ON_EXTERNAL_ACTIVATION FALSE /* do not change! if changed, must be disabled for rev1 ! */
  79655. +#define DEFAULT_HALT_ON_UNRECOVERABLE_ECC_ERROR FALSE /* do not change! if changed, must be disabled for rev1 ! */
  79656. +#define DEFAULT_EXTERNAL_ECC_RAMS_ENABLE FALSE
  79657. +#define DEFAULT_AID_OVERRIDE FALSE
  79658. +#define DEFAULT_AID_MODE E_FMAN_DMA_AID_OUT_TNUM
  79659. +#define DEFAULT_DMA_COMM_Q_LOW 0x2A
  79660. +#define DEFAULT_DMA_COMM_Q_HIGH 0x3F
  79661. +#define DEFAULT_CACHE_OVERRIDE E_FMAN_DMA_NO_CACHE_OR
  79662. +#define DEFAULT_DMA_CAM_NUM_OF_ENTRIES 64
  79663. +#define DEFAULT_DMA_DBG_CNT_MODE E_FMAN_DMA_DBG_NO_CNT
  79664. +#define DEFAULT_DMA_EN_EMERGENCY FALSE
  79665. +#define DEFAULT_DMA_SOS_EMERGENCY 0
  79666. +#define DEFAULT_DMA_WATCHDOG 0 /* disabled */
  79667. +#define DEFAULT_DMA_EN_EMERGENCY_SMOOTHER FALSE
  79668. +#define DEFAULT_DMA_EMERGENCY_SWITCH_COUNTER 0
  79669. +#define DEFAULT_DISP_LIMIT 0
  79670. +#define DEFAULT_PRS_DISP_TH 16
  79671. +#define DEFAULT_PLCR_DISP_TH 16
  79672. +#define DEFAULT_KG_DISP_TH 16
  79673. +#define DEFAULT_BMI_DISP_TH 16
  79674. +#define DEFAULT_QMI_ENQ_DISP_TH 16
  79675. +#define DEFAULT_QMI_DEQ_DISP_TH 16
  79676. +#define DEFAULT_FM_CTL1_DISP_TH 16
  79677. +#define DEFAULT_FM_CTL2_DISP_TH 16
  79678. +#define DEFAULT_TNUM_AGING_PERIOD 4
  79679. +
  79680. +
  79681. +#endif /* __FSL_FMAN_H */
  79682. --- /dev/null
  79683. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec.h
  79684. @@ -0,0 +1,1096 @@
  79685. +/*
  79686. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  79687. + *
  79688. + * Redistribution and use in source and binary forms, with or without
  79689. + * modification, are permitted provided that the following conditions are met:
  79690. + * * Redistributions of source code must retain the above copyright
  79691. + * notice, this list of conditions and the following disclaimer.
  79692. + * * Redistributions in binary form must reproduce the above copyright
  79693. + * notice, this list of conditions and the following disclaimer in the
  79694. + * documentation and/or other materials provided with the distribution.
  79695. + * * Neither the name of Freescale Semiconductor nor the
  79696. + * names of its contributors may be used to endorse or promote products
  79697. + * derived from this software without specific prior written permission.
  79698. + *
  79699. + *
  79700. + * ALTERNATIVELY, this software may be distributed under the terms of the
  79701. + * GNU General Public License ("GPL") as published by the Free Software
  79702. + * Foundation, either version 2 of that License or (at your option) any
  79703. + * later version.
  79704. + *
  79705. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  79706. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  79707. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  79708. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  79709. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  79710. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79711. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  79712. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  79713. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  79714. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  79715. + */
  79716. +
  79717. +#ifndef __FSL_FMAN_DTSEC_H
  79718. +#define __FSL_FMAN_DTSEC_H
  79719. +
  79720. +#include "common/general.h"
  79721. +#include "fsl_enet.h"
  79722. +
  79723. +/**
  79724. + * DOC: dTSEC Init sequence
  79725. + *
  79726. + * To prepare dTSEC block for transfer use the following call sequence:
  79727. + *
  79728. + * - fman_dtsec_defconfig() - This step is optional and yet recommended. Its
  79729. + * use is to obtain the default dTSEC configuration parameters.
  79730. + *
  79731. + * - Change dtsec configuration in &dtsec_cfg. This structure will be used
  79732. + * to customize the dTSEC behavior.
  79733. + *
  79734. + * - fman_dtsec_init() - Applies the configuration on dTSEC hardware. Note that
  79735. + * dTSEC is initialized while both Tx and Rx are disabled.
  79736. + *
  79737. + * - fman_dtsec_set_mac_address() - Set the station address (mac address).
  79738. + * This is used by dTSEC to match against received packets.
  79739. + *
  79740. + * - fman_dtsec_adjust_link() - Set the link speed and duplex parameters
  79741. + * after the PHY establishes the link.
  79742. + *
  79743. + * - dtsec_enable_tx() and dtsec_enable_rx() to enable transmission and
  79744. + * reception.
  79745. + */
  79746. +
  79747. +/**
  79748. + * DOC: dTSEC Graceful stop
  79749. + *
  79750. + * To temporary stop dTSEC activity use fman_dtsec_stop_tx() and
  79751. + * fman_dtsec_stop_rx(). Note that these functions request dTSEC graceful stop
  79752. + * but return before this stop is complete. To query for graceful stop
  79753. + * completion use fman_dtsec_get_event() and check DTSEC_IEVENT_GTSC and
  79754. + * DTSEC_IEVENT_GRSC bits. Alternatively the dTSEC interrupt mask can be set to
  79755. + * enable graceful stop interrupts.
  79756. + *
  79757. + * To resume operation after graceful stop use fman_dtsec_start_tx() and
  79758. + * fman_dtsec_start_rx().
  79759. + */
  79760. +
  79761. +/**
  79762. + * DOC: dTSEC interrupt handling
  79763. + *
  79764. + * This code does not provide an interrupt handler for dTSEC. Instead this
  79765. + * handler should be implemented and registered to the operating system by the
  79766. + * caller. Some primitives for accessing the event status and mask registers
  79767. + * are provided.
  79768. + *
  79769. + * See "dTSEC Events" section for a list of events that dTSEC can generate.
  79770. + */
  79771. +
  79772. +/**
  79773. + * DOC: dTSEC Events
  79774. + *
  79775. + * Interrupt events cause dTSEC event bits to be set. Software may poll the
  79776. + * event register at any time to check for pending interrupts. If an event
  79777. + * occurs and its corresponding enable bit is set in the interrupt mask
  79778. + * register, the event also causes a hardware interrupt at the PIC.
  79779. + *
  79780. + * To poll for event status use the fman_dtsec_get_event() function.
  79781. + * To configure the interrupt mask use fman_dtsec_enable_interrupt() and
  79782. + * fman_dtsec_disable_interrupt() functions.
  79783. + * After servicing a dTSEC interrupt use fman_dtsec_ack_event to reset the
  79784. + * serviced event bit.
  79785. + *
  79786. + * The following events may be signaled by dTSEC hardware:
  79787. + *
  79788. + * %DTSEC_IEVENT_BABR - Babbling receive error. This bit indicates that
  79789. + * a frame was received with length in excess of the MAC's maximum frame length
  79790. + * register.
  79791. + *
  79792. + * %DTSEC_IEVENT_RXC - Receive control (pause frame) interrupt. A pause
  79793. + * control frame was received while Rx pause frame handling is enabled.
  79794. + * Also see fman_dtsec_handle_rx_pause().
  79795. + *
  79796. + * %DTSEC_IEVENT_MSRO - MIB counter overflow. The count for one of the MIB
  79797. + * counters has exceeded the size of its register.
  79798. + *
  79799. + * %DTSEC_IEVENT_GTSC - Graceful transmit stop complete. Graceful stop is now
  79800. + * complete. The transmitter is in a stopped state, in which only pause frames
  79801. + * can be transmitted.
  79802. + * Also see fman_dtsec_stop_tx().
  79803. + *
  79804. + * %DTSEC_IEVENT_BABT - Babbling transmit error. The transmitted frame length
  79805. + * has exceeded the value in the MAC's Maximum Frame Length register.
  79806. + *
  79807. + * %DTSEC_IEVENT_TXC - Transmit control (pause frame) interrupt. his bit
  79808. + * indicates that a control frame was transmitted.
  79809. + *
  79810. + * %DTSEC_IEVENT_TXE - Transmit error. This bit indicates that an error
  79811. + * occurred on the transmitted channel. This bit is set whenever any transmit
  79812. + * error occurs which causes the dTSEC to discard all or part of a frame
  79813. + * (LC, CRL, XFUN).
  79814. + *
  79815. + * %DTSEC_IEVENT_LC - Late collision. This bit indicates that a collision
  79816. + * occurred beyond the collision window (slot time) in half-duplex mode.
  79817. + * The frame is truncated with a bad CRC and the remainder of the frame
  79818. + * is discarded.
  79819. + *
  79820. + * %DTSEC_IEVENT_CRL - Collision retry limit. is bit indicates that the number
  79821. + * of successive transmission collisions has exceeded the MAC's half-duplex
  79822. + * register's retransmission maximum count. The frame is discarded without
  79823. + * being transmitted and transmission of the next frame commences. This only
  79824. + * occurs while in half-duplex mode.
  79825. + * The number of retransmit attempts can be set in
  79826. + * &dtsec_halfdup_cfg.@retransmit before calling fman_dtsec_init().
  79827. + *
  79828. + * %DTSEC_IEVENT_XFUN - Transmit FIFO underrun. This bit indicates that the
  79829. + * transmit FIFO became empty before the complete frame was transmitted.
  79830. + * The frame is truncated with a bad CRC and the remainder of the frame is
  79831. + * discarded.
  79832. + *
  79833. + * %DTSEC_IEVENT_MAG - TBD
  79834. + *
  79835. + * %DTSEC_IEVENT_MMRD - MII management read completion.
  79836. + *
  79837. + * %DTSEC_IEVENT_MMWR - MII management write completion.
  79838. + *
  79839. + * %DTSEC_IEVENT_GRSC - Graceful receive stop complete. It allows the user to
  79840. + * know if the system has completed the stop and it is safe to write to receive
  79841. + * registers (status, control or configuration registers) that are used by the
  79842. + * system during normal operation.
  79843. + *
  79844. + * %DTSEC_IEVENT_TDPE - Internal data error on transmit. This bit indicates
  79845. + * that the dTSEC has detected a parity error on its stored transmit data, which
  79846. + * is likely to compromise the validity of recently transferred frames.
  79847. + *
  79848. + * %DTSEC_IEVENT_RDPE - Internal data error on receive. This bit indicates that
  79849. + * the dTSEC has detected a parity error on its stored receive data, which is
  79850. + * likely to compromise the validity of recently transferred frames.
  79851. + */
  79852. +/* Interrupt Mask Register (IMASK) */
  79853. +#define DTSEC_IMASK_BREN 0x80000000
  79854. +#define DTSEC_IMASK_RXCEN 0x40000000
  79855. +#define DTSEC_IMASK_MSROEN 0x04000000
  79856. +#define DTSEC_IMASK_GTSCEN 0x02000000
  79857. +#define DTSEC_IMASK_BTEN 0x01000000
  79858. +#define DTSEC_IMASK_TXCEN 0x00800000
  79859. +#define DTSEC_IMASK_TXEEN 0x00400000
  79860. +#define DTSEC_IMASK_LCEN 0x00040000
  79861. +#define DTSEC_IMASK_CRLEN 0x00020000
  79862. +#define DTSEC_IMASK_XFUNEN 0x00010000
  79863. +#define DTSEC_IMASK_ABRTEN 0x00008000
  79864. +#define DTSEC_IMASK_IFERREN 0x00004000
  79865. +#define DTSEC_IMASK_MAGEN 0x00000800
  79866. +#define DTSEC_IMASK_MMRDEN 0x00000400
  79867. +#define DTSEC_IMASK_MMWREN 0x00000200
  79868. +#define DTSEC_IMASK_GRSCEN 0x00000100
  79869. +#define DTSEC_IMASK_TDPEEN 0x00000002
  79870. +#define DTSEC_IMASK_RDPEEN 0x00000001
  79871. +
  79872. +#define DTSEC_EVENTS_MASK \
  79873. + ((uint32_t)(DTSEC_IMASK_BREN | \
  79874. + DTSEC_IMASK_RXCEN | \
  79875. + DTSEC_IMASK_BTEN | \
  79876. + DTSEC_IMASK_TXCEN | \
  79877. + DTSEC_IMASK_TXEEN | \
  79878. + DTSEC_IMASK_ABRTEN | \
  79879. + DTSEC_IMASK_LCEN | \
  79880. + DTSEC_IMASK_CRLEN | \
  79881. + DTSEC_IMASK_XFUNEN | \
  79882. + DTSEC_IMASK_IFERREN | \
  79883. + DTSEC_IMASK_MAGEN | \
  79884. + DTSEC_IMASK_TDPEEN | \
  79885. + DTSEC_IMASK_RDPEEN))
  79886. +
  79887. +/* dtsec timestamp event bits */
  79888. +#define TMR_PEMASK_TSREEN 0x00010000
  79889. +#define TMR_PEVENT_TSRE 0x00010000
  79890. +
  79891. +/* Group address bit indication */
  79892. +#define MAC_GROUP_ADDRESS 0x0000010000000000ULL
  79893. +/* size in bytes of L2 address */
  79894. +#define MAC_ADDRLEN 6
  79895. +
  79896. +#define DEFAULT_HALFDUP_ON FALSE
  79897. +#define DEFAULT_HALFDUP_RETRANSMIT 0xf
  79898. +#define DEFAULT_HALFDUP_COLL_WINDOW 0x37
  79899. +#define DEFAULT_HALFDUP_EXCESS_DEFER TRUE
  79900. +#define DEFAULT_HALFDUP_NO_BACKOFF FALSE
  79901. +#define DEFAULT_HALFDUP_BP_NO_BACKOFF FALSE
  79902. +#define DEFAULT_HALFDUP_ALT_BACKOFF_VAL 0x0A
  79903. +#define DEFAULT_HALFDUP_ALT_BACKOFF_EN FALSE
  79904. +#define DEFAULT_RX_DROP_BCAST FALSE
  79905. +#define DEFAULT_RX_SHORT_FRM TRUE
  79906. +#define DEFAULT_RX_LEN_CHECK FALSE
  79907. +#define DEFAULT_TX_PAD_CRC TRUE
  79908. +#define DEFAULT_TX_CRC FALSE
  79909. +#define DEFAULT_RX_CTRL_ACC FALSE
  79910. +#define DEFAULT_TX_PAUSE_TIME 0xf000
  79911. +#define DEFAULT_TBIPA 5
  79912. +#define DEFAULT_RX_PREPEND 0
  79913. +#define DEFAULT_PTP_TSU_EN TRUE
  79914. +#define DEFAULT_PTP_EXCEPTION_EN TRUE
  79915. +#define DEFAULT_PREAMBLE_LEN 7
  79916. +#define DEFAULT_RX_PREAMBLE FALSE
  79917. +#define DEFAULT_TX_PREAMBLE FALSE
  79918. +#define DEFAULT_LOOPBACK FALSE
  79919. +#define DEFAULT_RX_TIME_STAMP_EN FALSE
  79920. +#define DEFAULT_TX_TIME_STAMP_EN FALSE
  79921. +#define DEFAULT_RX_FLOW TRUE
  79922. +#define DEFAULT_TX_FLOW TRUE
  79923. +#define DEFAULT_RX_GROUP_HASH_EXD FALSE
  79924. +#define DEFAULT_TX_PAUSE_TIME_EXTD 0
  79925. +#define DEFAULT_RX_PROMISC FALSE
  79926. +#define DEFAULT_NON_BACK_TO_BACK_IPG1 0x40
  79927. +#define DEFAULT_NON_BACK_TO_BACK_IPG2 0x60
  79928. +#define DEFAULT_MIN_IFG_ENFORCEMENT 0x50
  79929. +#define DEFAULT_BACK_TO_BACK_IPG 0x60
  79930. +#define DEFAULT_MAXIMUM_FRAME 0x600
  79931. +#define DEFAULT_TBI_PHY_ADDR 5
  79932. +#define DEFAULT_WAKE_ON_LAN FALSE
  79933. +
  79934. +/* register related defines (bits, field offsets..) */
  79935. +#define DTSEC_ID1_ID 0xffff0000
  79936. +#define DTSEC_ID1_REV_MJ 0x0000FF00
  79937. +#define DTSEC_ID1_REV_MN 0x000000ff
  79938. +
  79939. +#define DTSEC_ID2_INT_REDUCED_OFF 0x00010000
  79940. +#define DTSEC_ID2_INT_NORMAL_OFF 0x00020000
  79941. +
  79942. +#define DTSEC_ECNTRL_CLRCNT 0x00004000
  79943. +#define DTSEC_ECNTRL_AUTOZ 0x00002000
  79944. +#define DTSEC_ECNTRL_STEN 0x00001000
  79945. +#define DTSEC_ECNTRL_CFG_RO 0x80000000
  79946. +#define DTSEC_ECNTRL_GMIIM 0x00000040
  79947. +#define DTSEC_ECNTRL_TBIM 0x00000020
  79948. +#define DTSEC_ECNTRL_SGMIIM 0x00000002
  79949. +#define DTSEC_ECNTRL_RPM 0x00000010
  79950. +#define DTSEC_ECNTRL_R100M 0x00000008
  79951. +#define DTSEC_ECNTRL_RMM 0x00000004
  79952. +#define DTSEC_ECNTRL_QSGMIIM 0x00000001
  79953. +
  79954. +#define DTSEC_TCTRL_THDF 0x00000800
  79955. +#define DTSEC_TCTRL_TTSE 0x00000040
  79956. +#define DTSEC_TCTRL_GTS 0x00000020
  79957. +#define DTSEC_TCTRL_TFC_PAUSE 0x00000010
  79958. +
  79959. +/* PTV offsets */
  79960. +#define PTV_PTE_OFST 16
  79961. +
  79962. +#define RCTRL_CFA 0x00008000
  79963. +#define RCTRL_GHTX 0x00000400
  79964. +#define RCTRL_RTSE 0x00000040
  79965. +#define RCTRL_GRS 0x00000020
  79966. +#define RCTRL_BC_REJ 0x00000010
  79967. +#define RCTRL_MPROM 0x00000008
  79968. +#define RCTRL_RSF 0x00000004
  79969. +#define RCTRL_UPROM 0x00000001
  79970. +#define RCTRL_PROM (RCTRL_UPROM | RCTRL_MPROM)
  79971. +
  79972. +#define TMR_CTL_ESFDP 0x00000800
  79973. +#define TMR_CTL_ESFDE 0x00000400
  79974. +
  79975. +#define MACCFG1_SOFT_RESET 0x80000000
  79976. +#define MACCFG1_LOOPBACK 0x00000100
  79977. +#define MACCFG1_RX_FLOW 0x00000020
  79978. +#define MACCFG1_TX_FLOW 0x00000010
  79979. +#define MACCFG1_TX_EN 0x00000001
  79980. +#define MACCFG1_RX_EN 0x00000004
  79981. +#define MACCFG1_RESET_RxMC 0x00080000
  79982. +#define MACCFG1_RESET_TxMC 0x00040000
  79983. +#define MACCFG1_RESET_RxFUN 0x00020000
  79984. +#define MACCFG1_RESET_TxFUN 0x00010000
  79985. +
  79986. +#define MACCFG2_NIBBLE_MODE 0x00000100
  79987. +#define MACCFG2_BYTE_MODE 0x00000200
  79988. +#define MACCFG2_PRE_AM_Rx_EN 0x00000080
  79989. +#define MACCFG2_PRE_AM_Tx_EN 0x00000040
  79990. +#define MACCFG2_LENGTH_CHECK 0x00000010
  79991. +#define MACCFG2_MAGIC_PACKET_EN 0x00000008
  79992. +#define MACCFG2_PAD_CRC_EN 0x00000004
  79993. +#define MACCFG2_CRC_EN 0x00000002
  79994. +#define MACCFG2_FULL_DUPLEX 0x00000001
  79995. +
  79996. +#define PREAMBLE_LENGTH_SHIFT 12
  79997. +
  79998. +#define IPGIFG_NON_BACK_TO_BACK_IPG_1_SHIFT 24
  79999. +#define IPGIFG_NON_BACK_TO_BACK_IPG_2_SHIFT 16
  80000. +#define IPGIFG_MIN_IFG_ENFORCEMENT_SHIFT 8
  80001. +
  80002. +#define IPGIFG_NON_BACK_TO_BACK_IPG_1 0x7F000000
  80003. +#define IPGIFG_NON_BACK_TO_BACK_IPG_2 0x007F0000
  80004. +#define IPGIFG_MIN_IFG_ENFORCEMENT 0x0000FF00
  80005. +#define IPGIFG_BACK_TO_BACK_IPG 0x0000007F
  80006. +
  80007. +#define HAFDUP_ALT_BEB 0x00080000
  80008. +#define HAFDUP_BP_NO_BACKOFF 0x00040000
  80009. +#define HAFDUP_NO_BACKOFF 0x00020000
  80010. +#define HAFDUP_EXCESS_DEFER 0x00010000
  80011. +#define HAFDUP_COLLISION_WINDOW 0x000003ff
  80012. +
  80013. +#define HAFDUP_ALTERNATE_BEB_TRUNCATION_SHIFT 20
  80014. +#define HAFDUP_RETRANSMISSION_MAX_SHIFT 12
  80015. +#define HAFDUP_RETRANSMISSION_MAX 0x0000f000
  80016. +
  80017. +#define NUM_OF_HASH_REGS 8 /* Number of hash table registers */
  80018. +
  80019. +/* CAR1/2 bits */
  80020. +#define DTSEC_CAR1_TR64 0x80000000
  80021. +#define DTSEC_CAR1_TR127 0x40000000
  80022. +#define DTSEC_CAR1_TR255 0x20000000
  80023. +#define DTSEC_CAR1_TR511 0x10000000
  80024. +#define DTSEC_CAR1_TRK1 0x08000000
  80025. +#define DTSEC_CAR1_TRMAX 0x04000000
  80026. +#define DTSEC_CAR1_TRMGV 0x02000000
  80027. +
  80028. +#define DTSEC_CAR1_RBYT 0x00010000
  80029. +#define DTSEC_CAR1_RPKT 0x00008000
  80030. +#define DTSEC_CAR1_RFCS 0x00004000
  80031. +#define DTSEC_CAR1_RMCA 0x00002000
  80032. +#define DTSEC_CAR1_RBCA 0x00001000
  80033. +#define DTSEC_CAR1_RXCF 0x00000800
  80034. +#define DTSEC_CAR1_RXPF 0x00000400
  80035. +#define DTSEC_CAR1_RXUO 0x00000200
  80036. +#define DTSEC_CAR1_RALN 0x00000100
  80037. +#define DTSEC_CAR1_RFLR 0x00000080
  80038. +#define DTSEC_CAR1_RCDE 0x00000040
  80039. +#define DTSEC_CAR1_RCSE 0x00000020
  80040. +#define DTSEC_CAR1_RUND 0x00000010
  80041. +#define DTSEC_CAR1_ROVR 0x00000008
  80042. +#define DTSEC_CAR1_RFRG 0x00000004
  80043. +#define DTSEC_CAR1_RJBR 0x00000002
  80044. +#define DTSEC_CAR1_RDRP 0x00000001
  80045. +
  80046. +#define DTSEC_CAR2_TJBR 0x00080000
  80047. +#define DTSEC_CAR2_TFCS 0x00040000
  80048. +#define DTSEC_CAR2_TXCF 0x00020000
  80049. +#define DTSEC_CAR2_TOVR 0x00010000
  80050. +#define DTSEC_CAR2_TUND 0x00008000
  80051. +#define DTSEC_CAR2_TFRG 0x00004000
  80052. +#define DTSEC_CAR2_TBYT 0x00002000
  80053. +#define DTSEC_CAR2_TPKT 0x00001000
  80054. +#define DTSEC_CAR2_TMCA 0x00000800
  80055. +#define DTSEC_CAR2_TBCA 0x00000400
  80056. +#define DTSEC_CAR2_TXPF 0x00000200
  80057. +#define DTSEC_CAR2_TDFR 0x00000100
  80058. +#define DTSEC_CAR2_TEDF 0x00000080
  80059. +#define DTSEC_CAR2_TSCL 0x00000040
  80060. +#define DTSEC_CAR2_TMCL 0x00000020
  80061. +#define DTSEC_CAR2_TLCL 0x00000010
  80062. +#define DTSEC_CAR2_TXCL 0x00000008
  80063. +#define DTSEC_CAR2_TNCL 0x00000004
  80064. +#define DTSEC_CAR2_TDRP 0x00000001
  80065. +
  80066. +#define CAM1_ERRORS_ONLY \
  80067. + (DTSEC_CAR1_RXPF | DTSEC_CAR1_RALN | DTSEC_CAR1_RFLR \
  80068. + | DTSEC_CAR1_RCDE | DTSEC_CAR1_RCSE | DTSEC_CAR1_RUND \
  80069. + | DTSEC_CAR1_ROVR | DTSEC_CAR1_RFRG | DTSEC_CAR1_RJBR \
  80070. + | DTSEC_CAR1_RDRP)
  80071. +
  80072. +#define CAM2_ERRORS_ONLY (DTSEC_CAR2_TFCS | DTSEC_CAR2_TXPF | DTSEC_CAR2_TDRP)
  80073. +
  80074. +/*
  80075. + * Group of dTSEC specific counters relating to the standard RMON MIB Group 1
  80076. + * (or Ethernet) statistics.
  80077. + */
  80078. +#define CAM1_MIB_GRP_1 \
  80079. + (DTSEC_CAR1_RDRP | DTSEC_CAR1_RBYT | DTSEC_CAR1_RPKT | DTSEC_CAR1_RMCA\
  80080. + | DTSEC_CAR1_RBCA | DTSEC_CAR1_RALN | DTSEC_CAR1_RUND | DTSEC_CAR1_ROVR\
  80081. + | DTSEC_CAR1_RFRG | DTSEC_CAR1_RJBR \
  80082. + | DTSEC_CAR1_TR64 | DTSEC_CAR1_TR127 | DTSEC_CAR1_TR255 \
  80083. + | DTSEC_CAR1_TR511 | DTSEC_CAR1_TRMAX)
  80084. +
  80085. +#define CAM2_MIB_GRP_1 (DTSEC_CAR2_TNCL | DTSEC_CAR2_TDRP)
  80086. +
  80087. +/* memory map */
  80088. +
  80089. +struct dtsec_regs {
  80090. + /* dTSEC General Control and Status Registers */
  80091. + uint32_t tsec_id; /* 0x000 ETSEC_ID register */
  80092. + uint32_t tsec_id2; /* 0x004 ETSEC_ID2 register */
  80093. + uint32_t ievent; /* 0x008 Interrupt event register */
  80094. + uint32_t imask; /* 0x00C Interrupt mask register */
  80095. + uint32_t reserved0010[1];
  80096. + uint32_t ecntrl; /* 0x014 E control register */
  80097. + uint32_t ptv; /* 0x018 Pause time value register */
  80098. + uint32_t tbipa; /* 0x01C TBI PHY address register */
  80099. + uint32_t tmr_ctrl; /* 0x020 Time-stamp Control register */
  80100. + uint32_t tmr_pevent; /* 0x024 Time-stamp event register */
  80101. + uint32_t tmr_pemask; /* 0x028 Timer event mask register */
  80102. + uint32_t reserved002c[5];
  80103. + uint32_t tctrl; /* 0x040 Transmit control register */
  80104. + uint32_t reserved0044[3];
  80105. + uint32_t rctrl; /* 0x050 Receive control register */
  80106. + uint32_t reserved0054[11];
  80107. + uint32_t igaddr[8]; /* 0x080-0x09C Individual/group address */
  80108. + uint32_t gaddr[8]; /* 0x0A0-0x0BC Group address registers 0-7 */
  80109. + uint32_t reserved00c0[16];
  80110. + uint32_t maccfg1; /* 0x100 MAC configuration #1 */
  80111. + uint32_t maccfg2; /* 0x104 MAC configuration #2 */
  80112. + uint32_t ipgifg; /* 0x108 IPG/IFG */
  80113. + uint32_t hafdup; /* 0x10C Half-duplex */
  80114. + uint32_t maxfrm; /* 0x110 Maximum frame */
  80115. + uint32_t reserved0114[10];
  80116. + uint32_t ifstat; /* 0x13C Interface status */
  80117. + uint32_t macstnaddr1; /* 0x140 Station Address,part 1 */
  80118. + uint32_t macstnaddr2; /* 0x144 Station Address,part 2 */
  80119. + struct {
  80120. + uint32_t exact_match1; /* octets 1-4 */
  80121. + uint32_t exact_match2; /* octets 5-6 */
  80122. + } macaddr[15]; /* 0x148-0x1BC mac exact match addresses 1-15 */
  80123. + uint32_t reserved01c0[16];
  80124. + uint32_t tr64; /* 0x200 transmit and receive 64 byte frame counter */
  80125. + uint32_t tr127; /* 0x204 transmit and receive 65 to 127 byte frame
  80126. + * counter */
  80127. + uint32_t tr255; /* 0x208 transmit and receive 128 to 255 byte frame
  80128. + * counter */
  80129. + uint32_t tr511; /* 0x20C transmit and receive 256 to 511 byte frame
  80130. + * counter */
  80131. + uint32_t tr1k; /* 0x210 transmit and receive 512 to 1023 byte frame
  80132. + * counter */
  80133. + uint32_t trmax; /* 0x214 transmit and receive 1024 to 1518 byte frame
  80134. + * counter */
  80135. + uint32_t trmgv; /* 0x218 transmit and receive 1519 to 1522 byte good
  80136. + * VLAN frame count */
  80137. + uint32_t rbyt; /* 0x21C receive byte counter */
  80138. + uint32_t rpkt; /* 0x220 receive packet counter */
  80139. + uint32_t rfcs; /* 0x224 receive FCS error counter */
  80140. + uint32_t rmca; /* 0x228 RMCA receive multicast packet counter */
  80141. + uint32_t rbca; /* 0x22C receive broadcast packet counter */
  80142. + uint32_t rxcf; /* 0x230 receive control frame packet counter */
  80143. + uint32_t rxpf; /* 0x234 receive pause frame packet counter */
  80144. + uint32_t rxuo; /* 0x238 receive unknown OP code counter */
  80145. + uint32_t raln; /* 0x23C receive alignment error counter */
  80146. + uint32_t rflr; /* 0x240 receive frame length error counter */
  80147. + uint32_t rcde; /* 0x244 receive code error counter */
  80148. + uint32_t rcse; /* 0x248 receive carrier sense error counter */
  80149. + uint32_t rund; /* 0x24C receive undersize packet counter */
  80150. + uint32_t rovr; /* 0x250 receive oversize packet counter */
  80151. + uint32_t rfrg; /* 0x254 receive fragments counter */
  80152. + uint32_t rjbr; /* 0x258 receive jabber counter */
  80153. + uint32_t rdrp; /* 0x25C receive drop */
  80154. + uint32_t tbyt; /* 0x260 transmit byte counter */
  80155. + uint32_t tpkt; /* 0x264 transmit packet counter */
  80156. + uint32_t tmca; /* 0x268 transmit multicast packet counter */
  80157. + uint32_t tbca; /* 0x26C transmit broadcast packet counter */
  80158. + uint32_t txpf; /* 0x270 transmit pause control frame counter */
  80159. + uint32_t tdfr; /* 0x274 transmit deferral packet counter */
  80160. + uint32_t tedf; /* 0x278 transmit excessive deferral packet counter */
  80161. + uint32_t tscl; /* 0x27C transmit single collision packet counter */
  80162. + uint32_t tmcl; /* 0x280 transmit multiple collision packet counter */
  80163. + uint32_t tlcl; /* 0x284 transmit late collision packet counter */
  80164. + uint32_t txcl; /* 0x288 transmit excessive collision packet counter */
  80165. + uint32_t tncl; /* 0x28C transmit total collision counter */
  80166. + uint32_t reserved0290[1];
  80167. + uint32_t tdrp; /* 0x294 transmit drop frame counter */
  80168. + uint32_t tjbr; /* 0x298 transmit jabber frame counter */
  80169. + uint32_t tfcs; /* 0x29C transmit FCS error counter */
  80170. + uint32_t txcf; /* 0x2A0 transmit control frame counter */
  80171. + uint32_t tovr; /* 0x2A4 transmit oversize frame counter */
  80172. + uint32_t tund; /* 0x2A8 transmit undersize frame counter */
  80173. + uint32_t tfrg; /* 0x2AC transmit fragments frame counter */
  80174. + uint32_t car1; /* 0x2B0 carry register one register* */
  80175. + uint32_t car2; /* 0x2B4 carry register two register* */
  80176. + uint32_t cam1; /* 0x2B8 carry register one mask register */
  80177. + uint32_t cam2; /* 0x2BC carry register two mask register */
  80178. + uint32_t reserved02c0[848];
  80179. +};
  80180. +
  80181. +/**
  80182. + * struct dtsec_mib_grp_1_counters - MIB counter overflows
  80183. + *
  80184. + * @tr64: Transmit and Receive 64 byte frame count. Increment for each
  80185. + * good or bad frame, of any type, transmitted or received, which
  80186. + * is 64 bytes in length.
  80187. + * @tr127: Transmit and Receive 65 to 127 byte frame count. Increments for
  80188. + * each good or bad frame of any type, transmitted or received,
  80189. + * which is 65-127 bytes in length.
  80190. + * @tr255: Transmit and Receive 128 to 255 byte frame count. Increments
  80191. + * for each good or bad frame, of any type, transmitted or
  80192. + * received, which is 128-255 bytes in length.
  80193. + * @tr511: Transmit and Receive 256 to 511 byte frame count. Increments
  80194. + * for each good or bad frame, of any type, transmitted or
  80195. + * received, which is 256-511 bytes in length.
  80196. + * @tr1k: Transmit and Receive 512 to 1023 byte frame count. Increments
  80197. + * for each good or bad frame, of any type, transmitted or
  80198. + * received, which is 512-1023 bytes in length.
  80199. + * @trmax: Transmit and Receive 1024 to 1518 byte frame count. Increments
  80200. + * for each good or bad frame, of any type, transmitted or
  80201. + * received, which is 1024-1518 bytes in length.
  80202. + * @rfrg: Receive fragments count. Increments for each received frame
  80203. + * which is less than 64 bytes in length and contains an invalid
  80204. + * FCS. This includes integral and non-integral lengths.
  80205. + * @rjbr: Receive jabber count. Increments for received frames which
  80206. + * exceed 1518 (non VLAN) or 1522 (VLAN) bytes and contain an
  80207. + * invalid FCS. This includes alignment errors.
  80208. + * @rdrp: Receive dropped packets count. Increments for received frames
  80209. + * which are streamed to system but are later dropped due to lack
  80210. + * of system resources. Does not increment for frames rejected due
  80211. + * to address filtering.
  80212. + * @raln: Receive alignment error count. Increments for each received
  80213. + * frame from 64 to 1518 (non VLAN) or 1522 (VLAN) which contains
  80214. + * an invalid FCS and is not an integral number of bytes.
  80215. + * @rund: Receive undersize packet count. Increments each time a frame is
  80216. + * received which is less than 64 bytes in length and contains a
  80217. + * valid FCS and is otherwise well formed. This count does not
  80218. + * include range length errors.
  80219. + * @rovr: Receive oversize packet count. Increments each time a frame is
  80220. + * received which exceeded 1518 (non VLAN) or 1522 (VLAN) and
  80221. + * contains a valid FCS and is otherwise well formed.
  80222. + * @rbyt: Receive byte count. Increments by the byte count of frames
  80223. + * received, including those in bad packets, excluding preamble and
  80224. + * SFD but including FCS bytes.
  80225. + * @rpkt: Receive packet count. Increments for each received frame
  80226. + * (including bad packets, all unicast, broadcast, and multicast
  80227. + * packets).
  80228. + * @rmca: Receive multicast packet count. Increments for each multicast
  80229. + * frame with valid CRC and of lengths 64 to 1518 (non VLAN) or
  80230. + * 1522 (VLAN), excluding broadcast frames. This count does not
  80231. + * include range/length errors.
  80232. + * @rbca: Receive broadcast packet count. Increments for each broadcast
  80233. + * frame with valid CRC and of lengths 64 to 1518 (non VLAN) or
  80234. + * 1522 (VLAN), excluding multicast frames. Does not include
  80235. + * range/length errors.
  80236. + * @tdrp: Transmit drop frame count. Increments each time a memory error
  80237. + * or an underrun has occurred.
  80238. + * @tncl: Transmit total collision counter. Increments by the number of
  80239. + * collisions experienced during the transmission of a frame. Does
  80240. + * not increment for aborted frames.
  80241. + *
  80242. + * The structure contains a group of dTSEC HW specific counters relating to the
  80243. + * standard RMON MIB Group 1 (or Ethernet statistics) counters. This structure
  80244. + * is counting only the carry events of the corresponding HW counters.
  80245. + *
  80246. + * tr64 to trmax notes: Frame sizes specified are considered excluding preamble
  80247. + * and SFD but including FCS bytes.
  80248. + */
  80249. +struct dtsec_mib_grp_1_counters {
  80250. + uint64_t rdrp;
  80251. + uint64_t tdrp;
  80252. + uint64_t rbyt;
  80253. + uint64_t rpkt;
  80254. + uint64_t rbca;
  80255. + uint64_t rmca;
  80256. + uint64_t raln;
  80257. + uint64_t rund;
  80258. + uint64_t rovr;
  80259. + uint64_t rfrg;
  80260. + uint64_t rjbr;
  80261. + uint64_t tncl;
  80262. + uint64_t tr64;
  80263. + uint64_t tr127;
  80264. + uint64_t tr255;
  80265. + uint64_t tr511;
  80266. + uint64_t tr1k;
  80267. + uint64_t trmax;
  80268. +};
  80269. +
  80270. +enum dtsec_stat_counters {
  80271. + E_DTSEC_STAT_TR64,
  80272. + E_DTSEC_STAT_TR127,
  80273. + E_DTSEC_STAT_TR255,
  80274. + E_DTSEC_STAT_TR511,
  80275. + E_DTSEC_STAT_TR1K,
  80276. + E_DTSEC_STAT_TRMAX,
  80277. + E_DTSEC_STAT_TRMGV,
  80278. + E_DTSEC_STAT_RBYT,
  80279. + E_DTSEC_STAT_RPKT,
  80280. + E_DTSEC_STAT_RMCA,
  80281. + E_DTSEC_STAT_RBCA,
  80282. + E_DTSEC_STAT_RXPF,
  80283. + E_DTSEC_STAT_RALN,
  80284. + E_DTSEC_STAT_RFLR,
  80285. + E_DTSEC_STAT_RCDE,
  80286. + E_DTSEC_STAT_RCSE,
  80287. + E_DTSEC_STAT_RUND,
  80288. + E_DTSEC_STAT_ROVR,
  80289. + E_DTSEC_STAT_RFRG,
  80290. + E_DTSEC_STAT_RJBR,
  80291. + E_DTSEC_STAT_RDRP,
  80292. + E_DTSEC_STAT_TFCS,
  80293. + E_DTSEC_STAT_TBYT,
  80294. + E_DTSEC_STAT_TPKT,
  80295. + E_DTSEC_STAT_TMCA,
  80296. + E_DTSEC_STAT_TBCA,
  80297. + E_DTSEC_STAT_TXPF,
  80298. + E_DTSEC_STAT_TNCL,
  80299. + E_DTSEC_STAT_TDRP
  80300. +};
  80301. +
  80302. +enum dtsec_stat_level {
  80303. + /* No statistics */
  80304. + E_MAC_STAT_NONE = 0,
  80305. + /* Only RMON MIB group 1 (ether stats). Optimized for performance */
  80306. + E_MAC_STAT_MIB_GRP1,
  80307. + /* Only error counters are available. Optimized for performance */
  80308. + E_MAC_STAT_PARTIAL,
  80309. + /* All counters available. Not optimized for performance */
  80310. + E_MAC_STAT_FULL
  80311. +};
  80312. +
  80313. +
  80314. +/**
  80315. + * struct dtsec_cfg - dTSEC configuration
  80316. + *
  80317. + * @halfdup_on: Transmit half-duplex flow control, under software
  80318. + * control for 10/100-Mbps half-duplex media. If set,
  80319. + * back pressure is applied to media by raising carrier.
  80320. + * @halfdup_retransmit: Number of retransmission attempts following a collision.
  80321. + * If this is exceeded dTSEC aborts transmission due to
  80322. + * excessive collisions. The standard specifies the
  80323. + * attempt limit to be 15.
  80324. + * @halfdup_coll_window:The number of bytes of the frame during which
  80325. + * collisions may occur. The default value of 55
  80326. + * corresponds to the frame byte at the end of the
  80327. + * standard 512-bit slot time window. If collisions are
  80328. + * detected after this byte, the late collision event is
  80329. + * asserted and transmission of current frame is aborted.
  80330. + * @rx_drop_bcast: Discard broadcast frames. If set, all broadcast frames
  80331. + * will be discarded by dTSEC.
  80332. + * @rx_short_frm: Accept short frames. If set, dTSEC will accept frames
  80333. + * of length 14..63 bytes.
  80334. + * @rx_len_check: Length check for received frames. If set, the MAC
  80335. + * checks the frame's length field on receive to ensure it
  80336. + * matches the actual data field length. This only works
  80337. + * for received frames with length field less than 1500.
  80338. + * No check is performed for larger frames.
  80339. + * @tx_pad_crc: Pad and append CRC. If set, the MAC pads all
  80340. + * transmitted short frames and appends a CRC to every
  80341. + * frame regardless of padding requirement.
  80342. + * @tx_crc: Transmission CRC enable. If set, the MAC appends a CRC
  80343. + * to all frames. If frames presented to the MAC have a
  80344. + * valid length and contain a valid CRC, @tx_crc should be
  80345. + * reset.
  80346. + * This field is ignored if @tx_pad_crc is set.
  80347. + * @rx_ctrl_acc: Control frame accept. If set, this overrides 802.3
  80348. + * standard control frame behavior, and all Ethernet frames
  80349. + * that have an ethertype of 0x8808 are treated as normal
  80350. + * Ethernet frames and passed up to the packet interface on
  80351. + * a DA match. Received pause control frames are passed to
  80352. + * the packet interface only if Rx flow control is also
  80353. + * disabled. See fman_dtsec_handle_rx_pause() function.
  80354. + * @tx_pause_time: Transmit pause time value. This pause value is used as
  80355. + * part of the pause frame to be sent when a transmit pause
  80356. + * frame is initiated. If set to 0 this disables
  80357. + * transmission of pause frames.
  80358. + * @rx_preamble: Receive preamble enable. If set, the MAC recovers the
  80359. + * received Ethernet 7-byte preamble and passes it to the
  80360. + * packet interface at the start of each received frame.
  80361. + * This field should be reset for internal MAC loop-back
  80362. + * mode.
  80363. + * @tx_preamble: User defined preamble enable for transmitted frames.
  80364. + * If set, a user-defined preamble must passed to the MAC
  80365. + * and it is transmitted instead of the standard preamble.
  80366. + * @preamble_len: Length, in bytes, of the preamble field preceding each
  80367. + * Ethernet start-of-frame delimiter byte. The default
  80368. + * value of 0x7 should be used in order to guarantee
  80369. + * reliable operation with IEEE 802.3 compliant hardware.
  80370. + * @rx_prepend: Packet alignment padding length. The specified number
  80371. + * of bytes (1-31) of zero padding are inserted before the
  80372. + * start of each received frame. For Ethernet, where
  80373. + * optional preamble extraction is enabled, the padding
  80374. + * appears before the preamble, otherwise the padding
  80375. + * precedes the layer 2 header.
  80376. + *
  80377. + * This structure contains basic dTSEC configuration and must be passed to
  80378. + * fman_dtsec_init() function. A default set of configuration values can be
  80379. + * obtained by calling fman_dtsec_defconfig().
  80380. + */
  80381. +struct dtsec_cfg {
  80382. + bool halfdup_on;
  80383. + bool halfdup_alt_backoff_en;
  80384. + bool halfdup_excess_defer;
  80385. + bool halfdup_no_backoff;
  80386. + bool halfdup_bp_no_backoff;
  80387. + uint8_t halfdup_alt_backoff_val;
  80388. + uint16_t halfdup_retransmit;
  80389. + uint16_t halfdup_coll_window;
  80390. + bool rx_drop_bcast;
  80391. + bool rx_short_frm;
  80392. + bool rx_len_check;
  80393. + bool tx_pad_crc;
  80394. + bool tx_crc;
  80395. + bool rx_ctrl_acc;
  80396. + unsigned short tx_pause_time;
  80397. + unsigned short tbipa;
  80398. + bool ptp_tsu_en;
  80399. + bool ptp_exception_en;
  80400. + bool rx_preamble;
  80401. + bool tx_preamble;
  80402. + unsigned char preamble_len;
  80403. + unsigned char rx_prepend;
  80404. + bool loopback;
  80405. + bool rx_time_stamp_en;
  80406. + bool tx_time_stamp_en;
  80407. + bool rx_flow;
  80408. + bool tx_flow;
  80409. + bool rx_group_hash_exd;
  80410. + bool rx_promisc;
  80411. + uint8_t tbi_phy_addr;
  80412. + uint16_t tx_pause_time_extd;
  80413. + uint16_t maximum_frame;
  80414. + uint32_t non_back_to_back_ipg1;
  80415. + uint32_t non_back_to_back_ipg2;
  80416. + uint32_t min_ifg_enforcement;
  80417. + uint32_t back_to_back_ipg;
  80418. + bool wake_on_lan;
  80419. +};
  80420. +
  80421. +
  80422. +/**
  80423. + * fman_dtsec_defconfig() - Get default dTSEC configuration
  80424. + * @cfg: pointer to configuration structure.
  80425. + *
  80426. + * Call this function to obtain a default set of configuration values for
  80427. + * initializing dTSEC. The user can overwrite any of the values before calling
  80428. + * fman_dtsec_init(), if specific configuration needs to be applied.
  80429. + */
  80430. +void fman_dtsec_defconfig(struct dtsec_cfg *cfg);
  80431. +
  80432. +/**
  80433. + * fman_dtsec_init() - Init dTSEC hardware block
  80434. + * @regs: Pointer to dTSEC register block
  80435. + * @cfg: dTSEC configuration data
  80436. + * @iface_mode: dTSEC interface mode, the type of MAC - PHY interface.
  80437. + * @iface_speed: 1G or 10G
  80438. + * @macaddr: MAC station address to be assigned to the device
  80439. + * @fm_rev_maj: major rev number
  80440. + * @fm_rev_min: minor rev number
  80441. + * @exceptions_mask: initial exceptions mask
  80442. + *
  80443. + * This function initializes dTSEC and applies basic configuration.
  80444. + *
  80445. + * dTSEC initialization sequence:
  80446. + * Before enabling Rx/Tx call dtsec_set_address() to set MAC address,
  80447. + * fman_dtsec_adjust_link() to configure interface speed and duplex and finally
  80448. + * dtsec_enable_tx()/dtsec_enable_rx() to start transmission and reception.
  80449. + *
  80450. + * Returns: 0 if successful, an error code otherwise.
  80451. + */
  80452. +int fman_dtsec_init(struct dtsec_regs *regs, struct dtsec_cfg *cfg,
  80453. + enum enet_interface iface_mode,
  80454. + enum enet_speed iface_speed,
  80455. + uint8_t *macaddr, uint8_t fm_rev_maj,
  80456. + uint8_t fm_rev_min,
  80457. + uint32_t exception_mask);
  80458. +
  80459. +/**
  80460. + * fman_dtsec_enable() - Enable dTSEC Tx and Tx
  80461. + * @regs: Pointer to dTSEC register block
  80462. + * @apply_rx: enable rx side
  80463. + * @apply_tx: enable tx side
  80464. + *
  80465. + * This function resets Tx and Rx graceful stop bit and enables dTSEC Tx and Rx.
  80466. + */
  80467. +void fman_dtsec_enable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
  80468. +
  80469. +/**
  80470. + * fman_dtsec_disable() - Disable dTSEC Tx and Rx
  80471. + * @regs: Pointer to dTSEC register block
  80472. + * @apply_rx: disable rx side
  80473. + * @apply_tx: disable tx side
  80474. + *
  80475. + * This function disables Tx and Rx in dTSEC.
  80476. + */
  80477. +void fman_dtsec_disable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
  80478. +
  80479. +/**
  80480. + * fman_dtsec_get_revision() - Get dTSEC hardware revision
  80481. + * @regs: Pointer to dTSEC register block
  80482. + *
  80483. + * Returns dtsec_id content
  80484. + *
  80485. + * Call this function to obtain the dTSEC hardware version.
  80486. + */
  80487. +uint32_t fman_dtsec_get_revision(struct dtsec_regs *regs);
  80488. +
  80489. +/**
  80490. + * fman_dtsec_set_mac_address() - Set MAC station address
  80491. + * @regs: Pointer to dTSEC register block
  80492. + * @macaddr: MAC address array
  80493. + *
  80494. + * This function sets MAC station address. To enable unicast reception call
  80495. + * this after fman_dtsec_init(). While promiscuous mode is disabled dTSEC will
  80496. + * match the destination address of received unicast frames against this
  80497. + * address.
  80498. + */
  80499. +void fman_dtsec_set_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
  80500. +
  80501. +/**
  80502. + * fman_dtsec_get_mac_address() - Query MAC station address
  80503. + * @regs: Pointer to dTSEC register block
  80504. + * @macaddr: MAC address array
  80505. + */
  80506. +void fman_dtsec_get_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
  80507. +
  80508. +/**
  80509. + * fman_dtsec_set_uc_promisc() - Sets unicast promiscuous mode
  80510. + * @regs: Pointer to dTSEC register block
  80511. + * @enable: Enable unicast promiscuous mode
  80512. + *
  80513. + * Use this function to enable/disable dTSEC L2 address filtering. If the
  80514. + * address filtering is disabled all unicast packets are accepted.
  80515. + * To set dTSEC in promiscuous mode call both fman_dtsec_set_uc_promisc() and
  80516. + * fman_dtsec_set_mc_promisc() to disable filtering for both unicast and
  80517. + * multicast addresses.
  80518. + */
  80519. +void fman_dtsec_set_uc_promisc(struct dtsec_regs *regs, bool enable);
  80520. +
  80521. +/**
  80522. + * fman_dtsec_set_wol() - Enable/Disable wake on lan
  80523. + * (magic packet support)
  80524. + * @regs: Pointer to dTSEC register block
  80525. + * @en: Enable Wake On Lan support in dTSEC
  80526. + *
  80527. + */
  80528. +void fman_dtsec_set_wol(struct dtsec_regs *regs, bool en);
  80529. +
  80530. +/**
  80531. + * fman_dtsec_adjust_link() - Adjust dTSEC speed/duplex settings
  80532. + * @regs: Pointer to dTSEC register block
  80533. + * @iface_mode: dTSEC interface mode
  80534. + * @speed: Link speed
  80535. + * @full_dx: True for full-duplex, false for half-duplex.
  80536. + *
  80537. + * This function configures the MAC to function and the desired rates. Use it
  80538. + * to configure dTSEC after fman_dtsec_init() and whenever the link speed
  80539. + * changes (for instance following PHY auto-negociation).
  80540. + *
  80541. + * Returns: 0 if successful, an error code otherwise.
  80542. + */
  80543. +int fman_dtsec_adjust_link(struct dtsec_regs *regs,
  80544. + enum enet_interface iface_mode,
  80545. + enum enet_speed speed, bool full_dx);
  80546. +
  80547. +/**
  80548. + * fman_dtsec_set_tbi_phy_addr() - Updates TBI address field
  80549. + * @regs: Pointer to dTSEC register block
  80550. + * @address: Valid PHY address in the range of 1 to 31. 0 is reserved.
  80551. + *
  80552. + * In SGMII mode, the dTSEC's TBIPA field must contain a valid TBI PHY address
  80553. + * so that the associated TBI PHY (i.e. the link) may be initialized.
  80554. + *
  80555. + * Returns: 0 if successful, an error code otherwise.
  80556. + */
  80557. +int fman_dtsec_set_tbi_phy_addr(struct dtsec_regs *regs,
  80558. + uint8_t addr);
  80559. +
  80560. +/**
  80561. + * fman_dtsec_set_max_frame_len() - Set max frame length
  80562. + * @regs: Pointer to dTSEC register block
  80563. + * @length: Max frame length.
  80564. + *
  80565. + * Sets maximum frame length for received and transmitted frames. Frames that
  80566. + * exceeds this length are truncated.
  80567. + */
  80568. +void fman_dtsec_set_max_frame_len(struct dtsec_regs *regs, uint16_t length);
  80569. +
  80570. +/**
  80571. + * fman_dtsec_get_max_frame_len() - Query max frame length
  80572. + * @regs: Pointer to dTSEC register block
  80573. + *
  80574. + * Returns: the current value of the maximum frame length.
  80575. + */
  80576. +uint16_t fman_dtsec_get_max_frame_len(struct dtsec_regs *regs);
  80577. +
  80578. +/**
  80579. + * fman_dtsec_handle_rx_pause() - Configure pause frame handling
  80580. + * @regs: Pointer to dTSEC register block
  80581. + * @en: Enable pause frame handling in dTSEC
  80582. + *
  80583. + * If enabled, dTSEC will handle pause frames internally. This must be disabled
  80584. + * if dTSEC is set in half-duplex mode.
  80585. + * If pause frame handling is disabled and &dtsec_cfg.rx_ctrl_acc is set, pause
  80586. + * frames will be transferred to the packet interface just like regular Ethernet
  80587. + * frames.
  80588. + */
  80589. +void fman_dtsec_handle_rx_pause(struct dtsec_regs *regs, bool en);
  80590. +
  80591. +/**
  80592. + * fman_dtsec_set_tx_pause_frames() - Configure Tx pause time
  80593. + * @regs: Pointer to dTSEC register block
  80594. + * @time: Time value included in pause frames
  80595. + *
  80596. + * Call this function to set the time value used in transmitted pause frames.
  80597. + * If time is 0, transmission of pause frames is disabled
  80598. + */
  80599. +void fman_dtsec_set_tx_pause_frames(struct dtsec_regs *regs, uint16_t time);
  80600. +
  80601. +/**
  80602. + * fman_dtsec_ack_event() - Acknowledge handled events
  80603. + * @regs: Pointer to dTSEC register block
  80604. + * @ev_mask: Events to acknowledge
  80605. + *
  80606. + * After handling events signaled by dTSEC in either polling or interrupt mode,
  80607. + * call this function to reset the associated status bits in dTSEC event
  80608. + * register.
  80609. + */
  80610. +void fman_dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask);
  80611. +
  80612. +/**
  80613. + * fman_dtsec_get_event() - Returns currently asserted events
  80614. + * @regs: Pointer to dTSEC register block
  80615. + * @ev_mask: Mask of relevant events
  80616. + *
  80617. + * Call this function to obtain a bit-mask of events that are currently asserted
  80618. + * in dTSEC, taken from IEVENT register.
  80619. + *
  80620. + * Returns: a bit-mask of events asserted in dTSEC.
  80621. + */
  80622. +uint32_t fman_dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask);
  80623. +
  80624. +/**
  80625. + * fman_dtsec_get_interrupt_mask() - Returns a bit-mask of enabled interrupts
  80626. + * @regs: Pointer to dTSEC register block
  80627. + *
  80628. + * Call this function to obtain a bit-mask of enabled interrupts
  80629. + * in dTSEC, taken from IMASK register.
  80630. + *
  80631. + * Returns: a bit-mask of enabled interrupts in dTSEC.
  80632. + */
  80633. +uint32_t fman_dtsec_get_interrupt_mask(struct dtsec_regs *regs);
  80634. +
  80635. +void fman_dtsec_clear_addr_in_paddr(struct dtsec_regs *regs,
  80636. + uint8_t paddr_num);
  80637. +
  80638. +void fman_dtsec_add_addr_in_paddr(struct dtsec_regs *regs,
  80639. + uint64_t addr,
  80640. + uint8_t paddr_num);
  80641. +
  80642. +void fman_dtsec_enable_tmr_interrupt (struct dtsec_regs *regs);
  80643. +
  80644. +void fman_dtsec_disable_tmr_interrupt(struct dtsec_regs *regs);
  80645. +
  80646. +/**
  80647. + * fman_dtsec_disable_interrupt() - Disables interrupts for the specified events
  80648. + * @regs: Pointer to dTSEC register block
  80649. + * @ev_mask: Mask of relevant events
  80650. + *
  80651. + * Call this function to disable interrupts in dTSEC for the specified events.
  80652. + * To enable interrupts use fman_dtsec_enable_interrupt().
  80653. + */
  80654. +void fman_dtsec_disable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
  80655. +
  80656. +/**
  80657. + * fman_dtsec_enable_interrupt() - Enable interrupts for the specified events
  80658. + * @regs: Pointer to dTSEC register block
  80659. + * @ev_mask: Mask of relevant events
  80660. + *
  80661. + * Call this function to enable interrupts in dTSEC for the specified events.
  80662. + * To disable interrupts use fman_dtsec_disable_interrupt().
  80663. + */
  80664. +void fman_dtsec_enable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
  80665. +
  80666. +/**
  80667. + * fman_dtsec_set_ts() - Enables dTSEC timestamps
  80668. + * @regs: Pointer to dTSEC register block
  80669. + * @en: true to enable timestamps, false to disable them
  80670. + *
  80671. + * Call this function to enable/disable dTSEC timestamps. This affects both
  80672. + * Tx and Rx.
  80673. + */
  80674. +void fman_dtsec_set_ts(struct dtsec_regs *regs, bool en);
  80675. +
  80676. +/**
  80677. + * fman_dtsec_set_bucket() - Enables/disables a filter bucket
  80678. + * @regs: Pointer to dTSEC register block
  80679. + * @bucket: Bucket index
  80680. + * @enable: true/false to enable/disable this bucket
  80681. + *
  80682. + * This function enables or disables the specified bucket. Enabling a bucket
  80683. + * associated with an address configures dTSEC to accept received packets
  80684. + * with that destination address.
  80685. + * Multiple addresses may be associated with the same bucket. Disabling a
  80686. + * bucket will affect all addresses associated with that bucket. A bucket that
  80687. + * is enabled requires further filtering and verification in the upper layers
  80688. + *
  80689. + */
  80690. +void fman_dtsec_set_bucket(struct dtsec_regs *regs, int bucket, bool enable);
  80691. +
  80692. +/**
  80693. + * dtsec_set_hash_table() - insert a crc code into thr filter table
  80694. + * @regs: Pointer to dTSEC register block
  80695. + * @crc: crc to insert
  80696. + * @mcast: true is this is a multicast address
  80697. + * @ghtx: true if we are in ghtx mode
  80698. + *
  80699. + * This function inserts a crc code into the filter table.
  80700. + */
  80701. +void fman_dtsec_set_hash_table(struct dtsec_regs *regs, uint32_t crc,
  80702. + bool mcast, bool ghtx);
  80703. +
  80704. +/**
  80705. + * fman_dtsec_reset_filter_table() - Resets the address filtering table
  80706. + * @regs: Pointer to dTSEC register block
  80707. + * @mcast: Reset multicast entries
  80708. + * @ucast: Reset unicast entries
  80709. + *
  80710. + * Resets all entries in L2 address filter table. After calling this function
  80711. + * all buckets enabled using fman_dtsec_set_bucket() will be disabled.
  80712. + * If dtsec_init_filter_table() was called with @unicast_hash set to false,
  80713. + * @ucast argument is ignored.
  80714. + * This does not affect the primary nor the 15 additional addresses configured
  80715. + * using dtsec_set_address() or dtsec_set_match_address().
  80716. + */
  80717. +void fman_dtsec_reset_filter_table(struct dtsec_regs *regs, bool mcast,
  80718. + bool ucast);
  80719. +
  80720. +/**
  80721. + * fman_dtsec_set_mc_promisc() - Set multicast promiscuous mode
  80722. + * @regs: Pointer to dTSEC register block
  80723. + * @enable: Enable multicast promiscuous mode
  80724. + *
  80725. + * Call this to enable/disable L2 address filtering for multicast packets.
  80726. + */
  80727. +void fman_dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable);
  80728. +
  80729. +/* statistics APIs */
  80730. +
  80731. +/**
  80732. + * fman_dtsec_set_stat_level() - Enable a group of MIB statistics counters
  80733. + * @regs: Pointer to dTSEC register block
  80734. + * @level: Specifies a certain group of dTSEC MIB HW counters or _all_,
  80735. + * to specify all the existing counters.
  80736. + * If set to _none_, it disables all the counters.
  80737. + *
  80738. + * Enables the MIB statistics hw counters and sets up the carry interrupt
  80739. + * masks for the counters corresponding to the @level input parameter.
  80740. + *
  80741. + * Returns: error if invalid @level value given.
  80742. + */
  80743. +int fman_dtsec_set_stat_level(struct dtsec_regs *regs,
  80744. + enum dtsec_stat_level level);
  80745. +
  80746. +/**
  80747. + * fman_dtsec_reset_stat() - Completely resets all dTSEC HW counters
  80748. + * @regs: Pointer to dTSEC register block
  80749. + */
  80750. +void fman_dtsec_reset_stat(struct dtsec_regs *regs);
  80751. +
  80752. +/**
  80753. + * fman_dtsec_get_clear_carry_regs() - Read and clear carry bits (CAR1-2 registers)
  80754. + * @regs: Pointer to dTSEC register block
  80755. + * @car1: car1 register value
  80756. + * @car2: car2 register value
  80757. + *
  80758. + * When set, the carry bits signal that an overflow occurred on the
  80759. + * corresponding counters.
  80760. + * Note that the carry bits (CAR1-2 registers) will assert the
  80761. + * %DTSEC_IEVENT_MSRO interrupt if unmasked (via CAM1-2 regs).
  80762. + *
  80763. + * Returns: true if overflow occurred, otherwise - false
  80764. + */
  80765. +bool fman_dtsec_get_clear_carry_regs(struct dtsec_regs *regs,
  80766. + uint32_t *car1, uint32_t *car2);
  80767. +
  80768. +uint32_t fman_dtsec_check_and_clear_tmr_event(struct dtsec_regs *regs);
  80769. +
  80770. +uint32_t fman_dtsec_get_stat_counter(struct dtsec_regs *regs,
  80771. + enum dtsec_stat_counters reg_name);
  80772. +
  80773. +void fman_dtsec_start_tx(struct dtsec_regs *regs);
  80774. +void fman_dtsec_start_rx(struct dtsec_regs *regs);
  80775. +void fman_dtsec_stop_tx(struct dtsec_regs *regs);
  80776. +void fman_dtsec_stop_rx(struct dtsec_regs *regs);
  80777. +uint32_t fman_dtsec_get_rctrl(struct dtsec_regs *regs);
  80778. +
  80779. +
  80780. +#endif /* __FSL_FMAN_DTSEC_H */
  80781. --- /dev/null
  80782. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_dtsec_mii_acc.h
  80783. @@ -0,0 +1,107 @@
  80784. +/*
  80785. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  80786. + *
  80787. + * Redistribution and use in source and binary forms, with or without
  80788. + * modification, are permitted provided that the following conditions are met:
  80789. + * * Redistributions of source code must retain the above copyright
  80790. + * notice, this list of conditions and the following disclaimer.
  80791. + * * Redistributions in binary form must reproduce the above copyright
  80792. + * notice, this list of conditions and the following disclaimer in the
  80793. + * documentation and/or other materials provided with the distribution.
  80794. + * * Neither the name of Freescale Semiconductor nor the
  80795. + * names of its contributors may be used to endorse or promote products
  80796. + * derived from this software without specific prior written permission.
  80797. + *
  80798. + *
  80799. + * ALTERNATIVELY, this software may be distributed under the terms of the
  80800. + * GNU General Public License ("GPL") as published by the Free Software
  80801. + * Foundation, either version 2 of that License or (at your option) any
  80802. + * later version.
  80803. + *
  80804. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  80805. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  80806. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  80807. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  80808. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  80809. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  80810. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80811. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  80812. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  80813. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  80814. + */
  80815. +
  80816. +#ifndef __FSL_FMAN_DTSEC_MII_ACC_H
  80817. +#define __FSL_FMAN_DTSEC_MII_ACC_H
  80818. +
  80819. +#include "common/general.h"
  80820. +
  80821. +
  80822. +/* MII Management Configuration Register */
  80823. +#define MIIMCFG_RESET_MGMT 0x80000000
  80824. +#define MIIMCFG_MGNTCLK_MASK 0x00000007
  80825. +#define MIIMCFG_MGNTCLK_SHIFT 0
  80826. +
  80827. +/* MII Management Command Register */
  80828. +#define MIIMCOM_SCAN_CYCLE 0x00000002
  80829. +#define MIIMCOM_READ_CYCLE 0x00000001
  80830. +
  80831. +/* MII Management Address Register */
  80832. +#define MIIMADD_PHY_ADDR_SHIFT 8
  80833. +#define MIIMADD_PHY_ADDR_MASK 0x00001f00
  80834. +
  80835. +#define MIIMADD_REG_ADDR_SHIFT 0
  80836. +#define MIIMADD_REG_ADDR_MASK 0x0000001f
  80837. +
  80838. +/* MII Management Indicator Register */
  80839. +#define MIIMIND_BUSY 0x00000001
  80840. +
  80841. +
  80842. +/* PHY Control Register */
  80843. +#define PHY_CR_PHY_RESET 0x8000
  80844. +#define PHY_CR_LOOPBACK 0x4000
  80845. +#define PHY_CR_SPEED0 0x2000
  80846. +#define PHY_CR_ANE 0x1000
  80847. +#define PHY_CR_RESET_AN 0x0200
  80848. +#define PHY_CR_FULLDUPLEX 0x0100
  80849. +#define PHY_CR_SPEED1 0x0040
  80850. +
  80851. +#define PHY_TBICON_SRESET 0x8000
  80852. +#define PHY_TBICON_SPEED2 0x0020
  80853. +#define PHY_TBICON_CLK_SEL 0x0020
  80854. +#define PHY_TBIANA_SGMII 0x4001
  80855. +#define PHY_TBIANA_1000X 0x01a0
  80856. +/* register map */
  80857. +
  80858. +/* MII Configuration Control Memory Map Registers */
  80859. +struct dtsec_mii_reg {
  80860. + uint32_t reserved1[72];
  80861. + uint32_t miimcfg; /* MII Mgmt:configuration */
  80862. + uint32_t miimcom; /* MII Mgmt:command */
  80863. + uint32_t miimadd; /* MII Mgmt:address */
  80864. + uint32_t miimcon; /* MII Mgmt:control 3 */
  80865. + uint32_t miimstat; /* MII Mgmt:status */
  80866. + uint32_t miimind; /* MII Mgmt:indicators */
  80867. +};
  80868. +
  80869. +/* dTSEC MII API */
  80870. +
  80871. +/* functions to access the mii registers for phy configuration.
  80872. + * this functionality may not be available for all dtsecs in the system.
  80873. + * consult the reference manual for details */
  80874. +void fman_dtsec_mii_reset(struct dtsec_mii_reg *regs);
  80875. +/* frequency is in MHz.
  80876. + * note that dtsec clock is 1/2 of fman clock */
  80877. +void fman_dtsec_mii_init(struct dtsec_mii_reg *regs, uint16_t dtsec_freq);
  80878. +int fman_dtsec_mii_write_reg(struct dtsec_mii_reg *regs,
  80879. + uint8_t addr,
  80880. + uint8_t reg,
  80881. + uint16_t data,
  80882. + uint16_t dtsec_freq);
  80883. +
  80884. +int fman_dtsec_mii_read_reg(struct dtsec_mii_reg *regs,
  80885. + uint8_t addr,
  80886. + uint8_t reg,
  80887. + uint16_t *data,
  80888. + uint16_t dtsec_freq);
  80889. +
  80890. +#endif /* __FSL_FMAN_DTSEC_MII_ACC_H */
  80891. --- /dev/null
  80892. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_kg.h
  80893. @@ -0,0 +1,514 @@
  80894. +/*
  80895. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  80896. + *
  80897. + * Redistribution and use in source and binary forms, with or without
  80898. + * modification, are permitted provided that the following conditions are met:
  80899. + * * Redistributions of source code must retain the above copyright
  80900. + * notice, this list of conditions and the following disclaimer.
  80901. + * * Redistributions in binary form must reproduce the above copyright
  80902. + * notice, this list of conditions and the following disclaimer in the
  80903. + * documentation and/or other materials provided with the distribution.
  80904. + * * Neither the name of Freescale Semiconductor nor the
  80905. + * names of its contributors may be used to endorse or promote products
  80906. + * derived from this software without specific prior written permission.
  80907. + *
  80908. + *
  80909. + * ALTERNATIVELY, this software may be distributed under the terms of the
  80910. + * GNU General Public License ("GPL") as published by the Free Software
  80911. + * Foundation, either version 2 of that License or (at your option) any
  80912. + * later version.
  80913. + *
  80914. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  80915. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  80916. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  80917. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  80918. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  80919. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  80920. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80921. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  80922. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  80923. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  80924. + */
  80925. +
  80926. +#ifndef __FSL_FMAN_KG_H
  80927. +#define __FSL_FMAN_KG_H
  80928. +
  80929. +#include "common/general.h"
  80930. +
  80931. +#define FM_KG_NUM_OF_GENERIC_REGS 8 /**< Num of generic KeyGen regs */
  80932. +#define FMAN_MAX_NUM_OF_HW_PORTS 64
  80933. +/**< Total num of masks allowed on KG extractions */
  80934. +#define FM_KG_EXTRACT_MASKS_NUM 4
  80935. +#define FM_KG_NUM_CLS_PLAN_ENTR 8 /**< Num of class. plan regs */
  80936. +#define FM_KG_CLS_PLAN_GRPS_NUM 32 /**< Max num of class. groups */
  80937. +
  80938. +struct fman_kg_regs {
  80939. + uint32_t fmkg_gcr;
  80940. + uint32_t res004;
  80941. + uint32_t res008;
  80942. + uint32_t fmkg_eer;
  80943. + uint32_t fmkg_eeer;
  80944. + uint32_t res014;
  80945. + uint32_t res018;
  80946. + uint32_t fmkg_seer;
  80947. + uint32_t fmkg_seeer;
  80948. + uint32_t fmkg_gsr;
  80949. + uint32_t fmkg_tpc;
  80950. + uint32_t fmkg_serc;
  80951. + uint32_t res030[4];
  80952. + uint32_t fmkg_fdor;
  80953. + uint32_t fmkg_gdv0r;
  80954. + uint32_t fmkg_gdv1r;
  80955. + uint32_t res04c[6];
  80956. + uint32_t fmkg_feer;
  80957. + uint32_t res068[38];
  80958. + uint32_t fmkg_indirect[63];
  80959. + uint32_t fmkg_ar;
  80960. +};
  80961. +
  80962. +struct fman_kg_scheme_regs {
  80963. + uint32_t kgse_mode; /**< MODE */
  80964. + uint32_t kgse_ekfc; /**< Extract Known Fields Command */
  80965. + uint32_t kgse_ekdv; /**< Extract Known Default Value */
  80966. + uint32_t kgse_bmch; /**< Bit Mask Command High */
  80967. + uint32_t kgse_bmcl; /**< Bit Mask Command Low */
  80968. + uint32_t kgse_fqb; /**< Frame Queue Base */
  80969. + uint32_t kgse_hc; /**< Hash Command */
  80970. + uint32_t kgse_ppc; /**< Policer Profile Command */
  80971. + uint32_t kgse_gec[FM_KG_NUM_OF_GENERIC_REGS];
  80972. + /**< Generic Extract Command */
  80973. + uint32_t kgse_spc; /**< KeyGen Scheme Entry Statistic Packet Counter */
  80974. + uint32_t kgse_dv0; /**< KeyGen Scheme Entry Default Value 0 */
  80975. + uint32_t kgse_dv1; /**< KeyGen Scheme Entry Default Value 1 */
  80976. + uint32_t kgse_ccbs; /**< KeyGen Scheme Entry Coarse Classification Bit*/
  80977. + uint32_t kgse_mv; /**< KeyGen Scheme Entry Match vector */
  80978. + uint32_t kgse_om; /**< KeyGen Scheme Entry Operation Mode bits */
  80979. + uint32_t kgse_vsp; /**< KeyGen Scheme Entry Virtual Storage Profile */
  80980. +};
  80981. +
  80982. +struct fman_kg_pe_regs{
  80983. + uint32_t fmkg_pe_sp;
  80984. + uint32_t fmkg_pe_cpp;
  80985. +};
  80986. +
  80987. +struct fman_kg_cp_regs {
  80988. + uint32_t kgcpe[FM_KG_NUM_CLS_PLAN_ENTR];
  80989. +};
  80990. +
  80991. +
  80992. +#define FM_KG_KGAR_GO 0x80000000
  80993. +#define FM_KG_KGAR_READ 0x40000000
  80994. +#define FM_KG_KGAR_WRITE 0x00000000
  80995. +#define FM_KG_KGAR_SEL_SCHEME_ENTRY 0x00000000
  80996. +#define FM_KG_KGAR_SCM_WSEL_UPDATE_CNT 0x00008000
  80997. +
  80998. +#define KG_SCH_PP_SHIFT_HIGH 0x80000000
  80999. +#define KG_SCH_PP_NO_GEN 0x10000000
  81000. +#define KG_SCH_PP_SHIFT_LOW 0x0000F000
  81001. +#define KG_SCH_MODE_NIA_PLCR 0x40000000
  81002. +#define KG_SCH_GEN_EXTRACT_TYPE 0x00008000
  81003. +#define KG_SCH_BITMASK_MASK 0x000000FF
  81004. +#define KG_SCH_GEN_VALID 0x80000000
  81005. +#define KG_SCH_GEN_MASK 0x00FF0000
  81006. +#define FM_PCD_KG_KGAR_ERR 0x20000000
  81007. +#define FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY 0x01000000
  81008. +#define FM_PCD_KG_KGAR_SEL_PORT_ENTRY 0x02000000
  81009. +#define FM_PCD_KG_KGAR_SEL_PORT_WSEL_SP 0x00008000
  81010. +#define FM_PCD_KG_KGAR_SEL_PORT_WSEL_CPP 0x00004000
  81011. +#define FM_PCD_KG_KGAR_WSEL_MASK 0x0000FF00
  81012. +#define KG_SCH_HASH_CONFIG_NO_FQID 0x80000000
  81013. +#define KG_SCH_HASH_CONFIG_SYM 0x40000000
  81014. +
  81015. +#define FM_EX_KG_DOUBLE_ECC 0x80000000
  81016. +#define FM_EX_KG_KEYSIZE_OVERFLOW 0x40000000
  81017. +
  81018. +/* ECC capture register */
  81019. +#define KG_FMKG_SERC_CAP 0x80000000
  81020. +#define KG_FMKG_SERC_CET 0x40000000
  81021. +#define KG_FMKG_SERC_CNT_MSK 0x00FF0000
  81022. +#define KG_FMKG_SERC_CNT_SHIFT 16
  81023. +#define KG_FMKG_SERC_ADDR_MSK 0x000003FF
  81024. +
  81025. +/* Masks */
  81026. +#define FM_KG_KGGCR_EN 0x80000000
  81027. +#define KG_SCH_GEN_VALID 0x80000000
  81028. +#define KG_SCH_GEN_EXTRACT_TYPE 0x00008000
  81029. +#define KG_ERR_TYPE_DOUBLE 0x40000000
  81030. +#define KG_ERR_ADDR_MASK 0x00000FFF
  81031. +#define KG_SCH_MODE_EN 0x80000000
  81032. +
  81033. +/* shifts */
  81034. +#define FM_KG_KGAR_NUM_SHIFT 16
  81035. +#define FM_KG_PE_CPP_MASK_SHIFT 16
  81036. +#define FM_KG_KGAR_WSEL_SHIFT 8
  81037. +
  81038. +#define FM_KG_SCH_GEN_HT_INVALID 0
  81039. +
  81040. +#define FM_KG_MASK_SEL_GEN_BASE 0x20
  81041. +
  81042. +#define KG_GET_MASK_SEL_SHIFT(shift, i) \
  81043. +switch (i) \
  81044. +{ \
  81045. + case 0: (shift) = 26; break; \
  81046. + case 1: (shift) = 20; break; \
  81047. + case 2: (shift) = 10; break; \
  81048. + case 3: (shift) = 4; break; \
  81049. + default: (shift) = 0; \
  81050. +}
  81051. +
  81052. +#define KG_GET_MASK_OFFSET_SHIFT(shift, i) \
  81053. +switch (i) \
  81054. +{ \
  81055. + case 0: (shift) = 16; break; \
  81056. + case 1: (shift) = 0; break; \
  81057. + case 2: (shift) = 28; break; \
  81058. + case 3: (shift) = 24; break; \
  81059. + default: (shift) = 0; \
  81060. +}
  81061. +
  81062. +#define KG_GET_MASK_SHIFT(shift, i) \
  81063. +switch (i) \
  81064. +{ \
  81065. + case 0: shift = 24; break; \
  81066. + case 1: shift = 16; break; \
  81067. + case 2: shift = 8; break; \
  81068. + case 3: shift = 0; break; \
  81069. + default: shift = 0; \
  81070. +}
  81071. +
  81072. +/* Port entry CPP register */
  81073. +#define FMAN_KG_PE_CPP_MASK_SHIFT 16
  81074. +
  81075. +/* Scheme registers */
  81076. +#define FMAN_KG_SCH_MODE_EN 0x80000000
  81077. +#define FMAN_KG_SCH_MODE_NIA_PLCR 0x40000000
  81078. +#define FMAN_KG_SCH_MODE_CCOBASE_SHIFT 24
  81079. +
  81080. +#define FMAN_KG_SCH_DEF_MAC_ADDR_SHIFT 30
  81081. +#define FMAN_KG_SCH_DEF_VLAN_TCI_SHIFT 28
  81082. +#define FMAN_KG_SCH_DEF_ETYPE_SHIFT 26
  81083. +#define FMAN_KG_SCH_DEF_PPP_SID_SHIFT 24
  81084. +#define FMAN_KG_SCH_DEF_PPP_PID_SHIFT 22
  81085. +#define FMAN_KG_SCH_DEF_MPLS_SHIFT 20
  81086. +#define FMAN_KG_SCH_DEF_IP_ADDR_SHIFT 18
  81087. +#define FMAN_KG_SCH_DEF_PTYPE_SHIFT 16
  81088. +#define FMAN_KG_SCH_DEF_IP_TOS_TC_SHIFT 14
  81089. +#define FMAN_KG_SCH_DEF_IPv6_FL_SHIFT 12
  81090. +#define FMAN_KG_SCH_DEF_IPSEC_SPI_SHIFT 10
  81091. +#define FMAN_KG_SCH_DEF_L4_PORT_SHIFT 8
  81092. +#define FMAN_KG_SCH_DEF_TCP_FLG_SHIFT 6
  81093. +
  81094. +#define FMAN_KG_SCH_GEN_VALID 0x80000000
  81095. +#define FMAN_KG_SCH_GEN_SIZE_MAX 16
  81096. +#define FMAN_KG_SCH_GEN_OR 0x00008000
  81097. +
  81098. +#define FMAN_KG_SCH_GEN_DEF_SHIFT 29
  81099. +#define FMAN_KG_SCH_GEN_SIZE_SHIFT 24
  81100. +#define FMAN_KG_SCH_GEN_MASK_SHIFT 16
  81101. +#define FMAN_KG_SCH_GEN_HT_SHIFT 8
  81102. +
  81103. +#define FMAN_KG_SCH_HASH_HSHIFT_SHIFT 24
  81104. +#define FMAN_KG_SCH_HASH_HSHIFT_MAX 0x28
  81105. +#define FMAN_KG_SCH_HASH_SYM 0x40000000
  81106. +#define FMAN_KG_SCH_HASH_NO_FQID_GEN 0x80000000
  81107. +
  81108. +#define FMAN_KG_SCH_PP_SH_SHIFT 27
  81109. +#define FMAN_KG_SCH_PP_SL_SHIFT 12
  81110. +#define FMAN_KG_SCH_PP_SH_MASK 0x80000000
  81111. +#define FMAN_KG_SCH_PP_SL_MASK 0x0000F000
  81112. +#define FMAN_KG_SCH_PP_SHIFT_MAX 0x17
  81113. +#define FMAN_KG_SCH_PP_MASK_SHIFT 16
  81114. +#define FMAN_KG_SCH_PP_NO_GEN 0x10000000
  81115. +
  81116. +enum fman_kg_gen_extract_src {
  81117. + E_FMAN_KG_GEN_EXTRACT_ETH,
  81118. + E_FMAN_KG_GEN_EXTRACT_ETYPE,
  81119. + E_FMAN_KG_GEN_EXTRACT_SNAP,
  81120. + E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_1,
  81121. + E_FMAN_KG_GEN_EXTRACT_VLAN_TCI_N,
  81122. + E_FMAN_KG_GEN_EXTRACT_PPPoE,
  81123. + E_FMAN_KG_GEN_EXTRACT_MPLS_1,
  81124. + E_FMAN_KG_GEN_EXTRACT_MPLS_2,
  81125. + E_FMAN_KG_GEN_EXTRACT_MPLS_3,
  81126. + E_FMAN_KG_GEN_EXTRACT_MPLS_N,
  81127. + E_FMAN_KG_GEN_EXTRACT_IPv4_1,
  81128. + E_FMAN_KG_GEN_EXTRACT_IPv6_1,
  81129. + E_FMAN_KG_GEN_EXTRACT_IPv4_2,
  81130. + E_FMAN_KG_GEN_EXTRACT_IPv6_2,
  81131. + E_FMAN_KG_GEN_EXTRACT_MINENCAP,
  81132. + E_FMAN_KG_GEN_EXTRACT_IP_PID,
  81133. + E_FMAN_KG_GEN_EXTRACT_GRE,
  81134. + E_FMAN_KG_GEN_EXTRACT_TCP,
  81135. + E_FMAN_KG_GEN_EXTRACT_UDP,
  81136. + E_FMAN_KG_GEN_EXTRACT_SCTP,
  81137. + E_FMAN_KG_GEN_EXTRACT_DCCP,
  81138. + E_FMAN_KG_GEN_EXTRACT_IPSEC_AH,
  81139. + E_FMAN_KG_GEN_EXTRACT_IPSEC_ESP,
  81140. + E_FMAN_KG_GEN_EXTRACT_SHIM_1,
  81141. + E_FMAN_KG_GEN_EXTRACT_SHIM_2,
  81142. + E_FMAN_KG_GEN_EXTRACT_FROM_DFLT,
  81143. + E_FMAN_KG_GEN_EXTRACT_FROM_FRAME_START,
  81144. + E_FMAN_KG_GEN_EXTRACT_FROM_PARSE_RESULT,
  81145. + E_FMAN_KG_GEN_EXTRACT_FROM_END_OF_PARSE,
  81146. + E_FMAN_KG_GEN_EXTRACT_FROM_FQID
  81147. +};
  81148. +
  81149. +struct fman_kg_ex_ecc_attr
  81150. +{
  81151. + bool valid;
  81152. + bool double_ecc;
  81153. + uint16_t addr;
  81154. + uint8_t single_ecc_count;
  81155. +};
  81156. +
  81157. +enum fman_kg_def_select
  81158. +{
  81159. + E_FMAN_KG_DEF_GLOBAL_0,
  81160. + E_FMAN_KG_DEF_GLOBAL_1,
  81161. + E_FMAN_KG_DEF_SCHEME_0,
  81162. + E_FMAN_KG_DEF_SCHEME_1
  81163. +};
  81164. +
  81165. +struct fman_kg_extract_def
  81166. +{
  81167. + enum fman_kg_def_select mac_addr;
  81168. + enum fman_kg_def_select vlan_tci;
  81169. + enum fman_kg_def_select etype;
  81170. + enum fman_kg_def_select ppp_sid;
  81171. + enum fman_kg_def_select ppp_pid;
  81172. + enum fman_kg_def_select mpls;
  81173. + enum fman_kg_def_select ip_addr;
  81174. + enum fman_kg_def_select ptype;
  81175. + enum fman_kg_def_select ip_tos_tc;
  81176. + enum fman_kg_def_select ipv6_fl;
  81177. + enum fman_kg_def_select ipsec_spi;
  81178. + enum fman_kg_def_select l4_port;
  81179. + enum fman_kg_def_select tcp_flg;
  81180. +};
  81181. +
  81182. +enum fman_kg_gen_extract_type
  81183. +{
  81184. + E_FMAN_KG_HASH_EXTRACT,
  81185. + E_FMAN_KG_OR_EXTRACT
  81186. +};
  81187. +
  81188. +struct fman_kg_gen_extract_params
  81189. +{
  81190. + /* Hash or Or-ed extract */
  81191. + enum fman_kg_gen_extract_type type;
  81192. + enum fman_kg_gen_extract_src src;
  81193. + bool no_validation;
  81194. + /* Extraction offset from the header location specified above */
  81195. + uint8_t offset;
  81196. + /* Size of extraction for FMAN_KG_HASH_EXTRACT,
  81197. + * hash result shift for FMAN_KG_OR_EXTRACT */
  81198. + uint8_t extract;
  81199. + uint8_t mask;
  81200. + /* Default value to use when header specified
  81201. + * by fman_kg_gen_extract_src doesn't present */
  81202. + enum fman_kg_def_select def_val;
  81203. +};
  81204. +
  81205. +struct fman_kg_extract_mask
  81206. +{
  81207. + /**< Indication if mask is on known field extraction or
  81208. + * on general extraction; TRUE for known field */
  81209. + bool is_known;
  81210. + /**< One of FMAN_KG_EXTRACT_xxx defines for known fields mask and
  81211. + * generic register index for generic extracts mask */
  81212. + uint32_t field_or_gen_idx;
  81213. + /**< Byte offset from start of the extracted data specified
  81214. + * by field_or_gen_idx */
  81215. + uint8_t offset;
  81216. + /**< Byte mask (selected bits will be used) */
  81217. + uint8_t mask;
  81218. +};
  81219. +
  81220. +struct fman_kg_extract_params
  81221. +{
  81222. + /* Or-ed mask of FMAN_KG_EXTRACT_xxx defines */
  81223. + uint32_t known_fields;
  81224. + struct fman_kg_extract_def known_fields_def;
  81225. + /* Number of entries in gen_extract */
  81226. + uint8_t gen_extract_num;
  81227. + struct fman_kg_gen_extract_params gen_extract[FM_KG_NUM_OF_GENERIC_REGS];
  81228. + /* Number of entries in masks */
  81229. + uint8_t masks_num;
  81230. + struct fman_kg_extract_mask masks[FM_KG_EXTRACT_MASKS_NUM];
  81231. + uint32_t def_scheme_0;
  81232. + uint32_t def_scheme_1;
  81233. +};
  81234. +
  81235. +struct fman_kg_hash_params
  81236. +{
  81237. + bool use_hash;
  81238. + uint8_t shift_r;
  81239. + uint32_t mask; /**< 24-bit mask */
  81240. + bool sym; /**< Symmetric hash for src and dest pairs */
  81241. +};
  81242. +
  81243. +struct fman_kg_pp_params
  81244. +{
  81245. + uint8_t base;
  81246. + uint8_t shift;
  81247. + uint8_t mask;
  81248. + bool bypass_pp_gen;
  81249. +};
  81250. +
  81251. +struct fman_kg_cc_params
  81252. +{
  81253. + uint8_t base_offset;
  81254. + uint32_t qlcv_bits_sel;
  81255. +};
  81256. +
  81257. +enum fman_pcd_engine
  81258. +{
  81259. + E_FMAN_PCD_INVALID = 0, /**< Invalid PCD engine indicated*/
  81260. + E_FMAN_PCD_DONE, /**< No PCD Engine indicated */
  81261. + E_FMAN_PCD_KG, /**< Keygen indicated */
  81262. + E_FMAN_PCD_CC, /**< Coarse classification indicated */
  81263. + E_FMAN_PCD_PLCR, /**< Policer indicated */
  81264. + E_FMAN_PCD_PRS /**< Parser indicated */
  81265. +};
  81266. +
  81267. +struct fman_kg_cls_plan_params
  81268. +{
  81269. + uint8_t entries_mask;
  81270. + uint32_t mask_vector[FM_KG_NUM_CLS_PLAN_ENTR];
  81271. +};
  81272. +
  81273. +struct fman_kg_scheme_params
  81274. +{
  81275. + uint32_t match_vector;
  81276. + struct fman_kg_extract_params extract_params;
  81277. + struct fman_kg_hash_params hash_params;
  81278. + uint32_t base_fqid;
  81279. + /* What we do w/features supported per FM version ?? */
  81280. + bool bypass_fqid_gen;
  81281. + struct fman_kg_pp_params policer_params;
  81282. + struct fman_kg_cc_params cc_params;
  81283. + bool update_counter;
  81284. + /**< counter_value: Set scheme counter to the specified value;
  81285. + * relevant only when update_counter = TRUE. */
  81286. + uint32_t counter_value;
  81287. + enum fman_pcd_engine next_engine;
  81288. + /**< Next engine action code */
  81289. + uint32_t next_engine_action;
  81290. +};
  81291. +
  81292. +
  81293. +
  81294. +int fman_kg_write_ar_wait(struct fman_kg_regs *regs, uint32_t fmkg_ar);
  81295. +void fman_kg_write_sp(struct fman_kg_regs *regs, uint32_t sp, bool add);
  81296. +void fman_kg_write_cpp(struct fman_kg_regs *regs, uint32_t cpp);
  81297. +void fman_kg_get_event(struct fman_kg_regs *regs,
  81298. + uint32_t *event,
  81299. + uint32_t *scheme_idx);
  81300. +void fman_kg_init(struct fman_kg_regs *regs,
  81301. + uint32_t exceptions,
  81302. + uint32_t dflt_nia);
  81303. +void fman_kg_enable_scheme_interrupts(struct fman_kg_regs *regs);
  81304. +void fman_kg_enable(struct fman_kg_regs *regs);
  81305. +void fman_kg_disable(struct fman_kg_regs *regs);
  81306. +int fman_kg_write_bind_cls_plans(struct fman_kg_regs *regs,
  81307. + uint8_t hwport_id,
  81308. + uint32_t bind_cls_plans);
  81309. +int fman_kg_build_bind_cls_plans(uint8_t grp_base,
  81310. + uint8_t grp_mask,
  81311. + uint32_t *bind_cls_plans);
  81312. +int fman_kg_write_bind_schemes(struct fman_kg_regs *regs,
  81313. + uint8_t hwport_id,
  81314. + uint32_t schemes);
  81315. +int fman_kg_write_cls_plan(struct fman_kg_regs *regs,
  81316. + uint8_t grp_id,
  81317. + uint8_t entries_mask,
  81318. + uint8_t hwport_id,
  81319. + struct fman_kg_cp_regs *cls_plan_regs);
  81320. +int fman_kg_build_cls_plan(struct fman_kg_cls_plan_params *params,
  81321. + struct fman_kg_cp_regs *cls_plan_regs);
  81322. +uint32_t fman_kg_get_schemes_total_counter(struct fman_kg_regs *regs);
  81323. +int fman_kg_set_scheme_counter(struct fman_kg_regs *regs,
  81324. + uint8_t scheme_id,
  81325. + uint8_t hwport_id,
  81326. + uint32_t counter);
  81327. +int fman_kg_get_scheme_counter(struct fman_kg_regs *regs,
  81328. + uint8_t scheme_id,
  81329. + uint8_t hwport_id,
  81330. + uint32_t *counter);
  81331. +int fman_kg_delete_scheme(struct fman_kg_regs *regs,
  81332. + uint8_t scheme_id,
  81333. + uint8_t hwport_id);
  81334. +int fman_kg_write_scheme(struct fman_kg_regs *regs,
  81335. + uint8_t scheme_id,
  81336. + uint8_t hwport_id,
  81337. + struct fman_kg_scheme_regs *scheme_regs,
  81338. + bool update_counter);
  81339. +int fman_kg_build_scheme(struct fman_kg_scheme_params *params,
  81340. + struct fman_kg_scheme_regs *scheme_regs);
  81341. +void fman_kg_get_capture(struct fman_kg_regs *regs,
  81342. + struct fman_kg_ex_ecc_attr *ecc_attr,
  81343. + bool clear);
  81344. +void fman_kg_get_exception(struct fman_kg_regs *regs,
  81345. + uint32_t *events,
  81346. + uint32_t *scheme_ids,
  81347. + bool clear);
  81348. +void fman_kg_set_exception(struct fman_kg_regs *regs,
  81349. + uint32_t exception,
  81350. + bool enable);
  81351. +void fman_kg_set_dflt_val(struct fman_kg_regs *regs,
  81352. + uint8_t def_id,
  81353. + uint32_t val);
  81354. +void fman_kg_set_data_after_prs(struct fman_kg_regs *regs, uint8_t offset);
  81355. +
  81356. +
  81357. +
  81358. +/**************************************************************************//**
  81359. + @Description NIA Description
  81360. +*//***************************************************************************/
  81361. +#define KG_NIA_ORDER_RESTOR 0x00800000
  81362. +#define KG_NIA_ENG_FM_CTL 0x00000000
  81363. +#define KG_NIA_ENG_PRS 0x00440000
  81364. +#define KG_NIA_ENG_KG 0x00480000
  81365. +#define KG_NIA_ENG_PLCR 0x004C0000
  81366. +#define KG_NIA_ENG_BMI 0x00500000
  81367. +#define KG_NIA_ENG_QMI_ENQ 0x00540000
  81368. +#define KG_NIA_ENG_QMI_DEQ 0x00580000
  81369. +#define KG_NIA_ENG_MASK 0x007C0000
  81370. +
  81371. +#define KG_NIA_AC_MASK 0x0003FFFF
  81372. +
  81373. +#define KG_NIA_INVALID 0xFFFFFFFF
  81374. +
  81375. +static __inline__ uint32_t fm_kg_build_nia(enum fman_pcd_engine next_engine,
  81376. + uint32_t next_engine_action)
  81377. +{
  81378. + uint32_t nia;
  81379. +
  81380. + if (next_engine_action & ~KG_NIA_AC_MASK)
  81381. + return KG_NIA_INVALID;
  81382. +
  81383. + switch (next_engine) {
  81384. + case E_FMAN_PCD_DONE:
  81385. + nia = KG_NIA_ENG_BMI | next_engine_action;
  81386. + break;
  81387. +
  81388. + case E_FMAN_PCD_KG:
  81389. + nia = KG_NIA_ENG_KG | next_engine_action;
  81390. + break;
  81391. +
  81392. + case E_FMAN_PCD_CC:
  81393. + nia = KG_NIA_ENG_FM_CTL | next_engine_action;
  81394. + break;
  81395. +
  81396. + case E_FMAN_PCD_PLCR:
  81397. + nia = KG_NIA_ENG_PLCR | next_engine_action;
  81398. + break;
  81399. +
  81400. + default:
  81401. + nia = KG_NIA_INVALID;
  81402. + }
  81403. +
  81404. + return nia;
  81405. +}
  81406. +
  81407. +#endif /* __FSL_FMAN_KG_H */
  81408. --- /dev/null
  81409. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac.h
  81410. @@ -0,0 +1,427 @@
  81411. +/*
  81412. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  81413. + *
  81414. + * Redistribution and use in source and binary forms, with or without
  81415. + * modification, are permitted provided that the following conditions are met:
  81416. + * * Redistributions of source code must retain the above copyright
  81417. + * notice, this list of conditions and the following disclaimer.
  81418. + * * Redistributions in binary form must reproduce the above copyright
  81419. + * notice, this list of conditions and the following disclaimer in the
  81420. + * documentation and/or other materials provided with the distribution.
  81421. + * * Neither the name of Freescale Semiconductor nor the
  81422. + * names of its contributors may be used to endorse or promote products
  81423. + * derived from this software without specific prior written permission.
  81424. + *
  81425. + *
  81426. + * ALTERNATIVELY, this software may be distributed under the terms of the
  81427. + * GNU General Public License ("GPL") as published by the Free Software
  81428. + * Foundation, either version 2 of that License or (at your option) any
  81429. + * later version.
  81430. + *
  81431. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  81432. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  81433. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  81434. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  81435. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  81436. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  81437. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  81438. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81439. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  81440. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  81441. + */
  81442. +
  81443. +
  81444. +#ifndef __FSL_FMAN_MEMAC_H
  81445. +#define __FSL_FMAN_MEMAC_H
  81446. +
  81447. +#include "common/general.h"
  81448. +#include "fsl_enet.h"
  81449. +
  81450. +
  81451. +#define MEMAC_NUM_OF_PADDRS 7 /* Num of additional exact match MAC adr regs */
  81452. +
  81453. +/* Control and Configuration Register (COMMAND_CONFIG) */
  81454. +#define CMD_CFG_MG 0x80000000 /* 00 Magic Packet detection */
  81455. +#define CMD_CFG_REG_LOWP_RXETY 0x01000000 /* 07 Rx low power indication */
  81456. +#define CMD_CFG_TX_LOWP_ENA 0x00800000 /* 08 Tx Low Power Idle Enable */
  81457. +#define CMD_CFG_SFD_ANY 0x00200000 /* 10 Disable SFD check */
  81458. +#define CMD_CFG_PFC_MODE 0x00080000 /* 12 Enable PFC */
  81459. +#define CMD_CFG_NO_LEN_CHK 0x00020000 /* 14 Payload length check disable */
  81460. +#define CMD_CFG_SEND_IDLE 0x00010000 /* 15 Force idle generation */
  81461. +#define CMD_CFG_CNT_FRM_EN 0x00002000 /* 18 Control frame rx enable */
  81462. +#define CMD_CFG_SW_RESET 0x00001000 /* 19 S/W Reset, self clearing bit */
  81463. +#define CMD_CFG_TX_PAD_EN 0x00000800 /* 20 Enable Tx padding of frames */
  81464. +#define CMD_CFG_LOOPBACK_EN 0x00000400 /* 21 XGMII/GMII loopback enable */
  81465. +#define CMD_CFG_TX_ADDR_INS 0x00000200 /* 22 Tx source MAC addr insertion */
  81466. +#define CMD_CFG_PAUSE_IGNORE 0x00000100 /* 23 Ignore Pause frame quanta */
  81467. +#define CMD_CFG_PAUSE_FWD 0x00000080 /* 24 Terminate/frwd Pause frames */
  81468. +#define CMD_CFG_CRC_FWD 0x00000040 /* 25 Terminate/frwd CRC of frames */
  81469. +#define CMD_CFG_PAD_EN 0x00000020 /* 26 Frame padding removal */
  81470. +#define CMD_CFG_PROMIS_EN 0x00000010 /* 27 Promiscuous operation enable */
  81471. +#define CMD_CFG_WAN_MODE 0x00000008 /* 28 WAN mode enable */
  81472. +#define CMD_CFG_RX_EN 0x00000002 /* 30 MAC receive path enable */
  81473. +#define CMD_CFG_TX_EN 0x00000001 /* 31 MAC transmit path enable */
  81474. +
  81475. +/* Transmit FIFO Sections Register (TX_FIFO_SECTIONS) */
  81476. +#define TX_FIFO_SECTIONS_TX_EMPTY_MASK 0xFFFF0000
  81477. +#define TX_FIFO_SECTIONS_TX_AVAIL_MASK 0x0000FFFF
  81478. +#define TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G 0x00400000
  81479. +#define TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G 0x00100000
  81480. +#define TX_FIFO_SECTIONS_TX_EMPTY_PFC_10G 0x00360000
  81481. +#define TX_FIFO_SECTIONS_TX_EMPTY_PFC_1G 0x00040000
  81482. +#define TX_FIFO_SECTIONS_TX_AVAIL_10G 0x00000019
  81483. +#define TX_FIFO_SECTIONS_TX_AVAIL_1G 0x00000020
  81484. +#define TX_FIFO_SECTIONS_TX_AVAIL_SLOW_10G 0x00000060
  81485. +
  81486. +#define GET_TX_EMPTY_DEFAULT_VALUE(_val) \
  81487. +_val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK; \
  81488. +((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ? \
  81489. + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G) : \
  81490. + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G));
  81491. +
  81492. +#define GET_TX_EMPTY_PFC_VALUE(_val) \
  81493. +_val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK; \
  81494. +((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ? \
  81495. + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_PFC_10G) : \
  81496. + (_val |= TX_FIFO_SECTIONS_TX_EMPTY_PFC_1G));
  81497. +
  81498. +/* Interface Mode Register (IF_MODE) */
  81499. +#define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
  81500. +#define IF_MODE_XGMII 0x00000000 /* 30-31 XGMII (10G) interface */
  81501. +#define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
  81502. +#define IF_MODE_RGMII 0x00000004
  81503. +#define IF_MODE_RGMII_AUTO 0x00008000
  81504. +#define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
  81505. +#define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
  81506. +#define IF_MODE_RGMII_10 0x00002000 /* 01 - 10Mbps RGMII */
  81507. +#define IF_MODE_RGMII_SP_MASK 0x00006000 /* Setsp mask bits */
  81508. +#define IF_MODE_RGMII_FD 0x00001000 /* Full duplex RGMII */
  81509. +#define IF_MODE_HD 0x00000040 /* Half duplex operation */
  81510. +
  81511. +/* Hash table Control Register (HASHTABLE_CTRL) */
  81512. +#define HASH_CTRL_MCAST_SHIFT 26
  81513. +#define HASH_CTRL_MCAST_EN 0x00000100 /* 23 Mcast frame rx for hash */
  81514. +#define HASH_CTRL_ADDR_MASK 0x0000003F /* 26-31 Hash table address code */
  81515. +
  81516. +#define GROUP_ADDRESS 0x0000010000000000LL /* MAC mcast indication */
  81517. +#define HASH_TABLE_SIZE 64 /* Hash tbl size */
  81518. +
  81519. +/* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */
  81520. +#define MEMAC_TX_IPG_LENGTH_MASK 0x0000003F
  81521. +
  81522. +/* Statistics Configuration Register (STATN_CONFIG) */
  81523. +#define STATS_CFG_CLR 0x00000004 /* 29 Reset all counters */
  81524. +#define STATS_CFG_CLR_ON_RD 0x00000002 /* 30 Clear on read */
  81525. +#define STATS_CFG_SATURATE 0x00000001 /* 31 Saturate at the maximum val */
  81526. +
  81527. +/* Interrupt Mask Register (IMASK) */
  81528. +#define MEMAC_IMASK_MGI 0x40000000 /* 1 Magic pkt detect indication */
  81529. +#define MEMAC_IMASK_TSECC_ER 0x20000000 /* 2 Timestamp FIFO ECC error evnt */
  81530. +#define MEMAC_IMASK_TECC_ER 0x02000000 /* 6 Transmit frame ECC error evnt */
  81531. +#define MEMAC_IMASK_RECC_ER 0x01000000 /* 7 Receive frame ECC error evnt */
  81532. +
  81533. +#define MEMAC_ALL_ERRS_IMASK \
  81534. + ((uint32_t)(MEMAC_IMASK_TSECC_ER | \
  81535. + MEMAC_IMASK_TECC_ER | \
  81536. + MEMAC_IMASK_RECC_ER | \
  81537. + MEMAC_IMASK_MGI))
  81538. +
  81539. +#define MEMAC_IEVNT_PCS 0x80000000 /* PCS (XG). Link sync (G) */
  81540. +#define MEMAC_IEVNT_AN 0x40000000 /* Auto-negotiation */
  81541. +#define MEMAC_IEVNT_LT 0x20000000 /* Link Training/New page */
  81542. +#define MEMAC_IEVNT_MGI 0x00004000 /* Magic pkt detection */
  81543. +#define MEMAC_IEVNT_TS_ECC_ER 0x00002000 /* Timestamp FIFO ECC error */
  81544. +#define MEMAC_IEVNT_RX_FIFO_OVFL 0x00001000 /* Rx FIFO overflow */
  81545. +#define MEMAC_IEVNT_TX_FIFO_UNFL 0x00000800 /* Tx FIFO underflow */
  81546. +#define MEMAC_IEVNT_TX_FIFO_OVFL 0x00000400 /* Tx FIFO overflow */
  81547. +#define MEMAC_IEVNT_TX_ECC_ER 0x00000200 /* Tx frame ECC error */
  81548. +#define MEMAC_IEVNT_RX_ECC_ER 0x00000100 /* Rx frame ECC error */
  81549. +#define MEMAC_IEVNT_LI_FAULT 0x00000080 /* Link Interruption flt */
  81550. +#define MEMAC_IEVNT_RX_EMPTY 0x00000040 /* Rx FIFO empty */
  81551. +#define MEMAC_IEVNT_TX_EMPTY 0x00000020 /* Tx FIFO empty */
  81552. +#define MEMAC_IEVNT_RX_LOWP 0x00000010 /* Low Power Idle */
  81553. +#define MEMAC_IEVNT_PHY_LOS 0x00000004 /* Phy loss of signal */
  81554. +#define MEMAC_IEVNT_REM_FAULT 0x00000002 /* Remote fault (XGMII) */
  81555. +#define MEMAC_IEVNT_LOC_FAULT 0x00000001 /* Local fault (XGMII) */
  81556. +
  81557. +enum memac_counters {
  81558. + E_MEMAC_COUNTER_R64,
  81559. + E_MEMAC_COUNTER_R127,
  81560. + E_MEMAC_COUNTER_R255,
  81561. + E_MEMAC_COUNTER_R511,
  81562. + E_MEMAC_COUNTER_R1023,
  81563. + E_MEMAC_COUNTER_R1518,
  81564. + E_MEMAC_COUNTER_R1519X,
  81565. + E_MEMAC_COUNTER_RFRG,
  81566. + E_MEMAC_COUNTER_RJBR,
  81567. + E_MEMAC_COUNTER_RDRP,
  81568. + E_MEMAC_COUNTER_RALN,
  81569. + E_MEMAC_COUNTER_TUND,
  81570. + E_MEMAC_COUNTER_ROVR,
  81571. + E_MEMAC_COUNTER_RXPF,
  81572. + E_MEMAC_COUNTER_TXPF,
  81573. + E_MEMAC_COUNTER_ROCT,
  81574. + E_MEMAC_COUNTER_RMCA,
  81575. + E_MEMAC_COUNTER_RBCA,
  81576. + E_MEMAC_COUNTER_RPKT,
  81577. + E_MEMAC_COUNTER_RUCA,
  81578. + E_MEMAC_COUNTER_RERR,
  81579. + E_MEMAC_COUNTER_TOCT,
  81580. + E_MEMAC_COUNTER_TMCA,
  81581. + E_MEMAC_COUNTER_TBCA,
  81582. + E_MEMAC_COUNTER_TUCA,
  81583. + E_MEMAC_COUNTER_TERR
  81584. +};
  81585. +
  81586. +#define DEFAULT_PAUSE_QUANTA 0xf000
  81587. +#define DEFAULT_FRAME_LENGTH 0x600
  81588. +#define DEFAULT_TX_IPG_LENGTH 12
  81589. +
  81590. +/*
  81591. + * memory map
  81592. + */
  81593. +
  81594. +struct mac_addr {
  81595. + uint32_t mac_addr_l; /* Lower 32 bits of 48-bit MAC address */
  81596. + uint32_t mac_addr_u; /* Upper 16 bits of 48-bit MAC address */
  81597. +};
  81598. +
  81599. +struct memac_regs {
  81600. + /* General Control and Status */
  81601. + uint32_t res0000[2];
  81602. + uint32_t command_config; /* 0x008 Ctrl and cfg */
  81603. + struct mac_addr mac_addr0; /* 0x00C-0x010 MAC_ADDR_0...1 */
  81604. + uint32_t maxfrm; /* 0x014 Max frame length */
  81605. + uint32_t res0018[1];
  81606. + uint32_t rx_fifo_sections; /* Receive FIFO configuration reg */
  81607. + uint32_t tx_fifo_sections; /* Transmit FIFO configuration reg */
  81608. + uint32_t res0024[2];
  81609. + uint32_t hashtable_ctrl; /* 0x02C Hash table control */
  81610. + uint32_t res0030[4];
  81611. + uint32_t ievent; /* 0x040 Interrupt event */
  81612. + uint32_t tx_ipg_length; /* 0x044 Transmitter inter-packet-gap */
  81613. + uint32_t res0048;
  81614. + uint32_t imask; /* 0x04C Interrupt mask */
  81615. + uint32_t res0050;
  81616. + uint32_t pause_quanta[4]; /* 0x054 Pause quanta */
  81617. + uint32_t pause_thresh[4]; /* 0x064 Pause quanta threshold */
  81618. + uint32_t rx_pause_status; /* 0x074 Receive pause status */
  81619. + uint32_t res0078[2];
  81620. + struct mac_addr mac_addr[MEMAC_NUM_OF_PADDRS]; /* 0x80-0x0B4 mac padr */
  81621. + uint32_t lpwake_timer; /* 0x0B8 Low Power Wakeup Timer */
  81622. + uint32_t sleep_timer; /* 0x0BC Transmit EEE Low Power Timer */
  81623. + uint32_t res00c0[8];
  81624. + uint32_t statn_config; /* 0x0E0 Statistics configuration */
  81625. + uint32_t res00e4[7];
  81626. + /* Rx Statistics Counter */
  81627. + uint32_t reoct_l;
  81628. + uint32_t reoct_u;
  81629. + uint32_t roct_l;
  81630. + uint32_t roct_u;
  81631. + uint32_t raln_l;
  81632. + uint32_t raln_u;
  81633. + uint32_t rxpf_l;
  81634. + uint32_t rxpf_u;
  81635. + uint32_t rfrm_l;
  81636. + uint32_t rfrm_u;
  81637. + uint32_t rfcs_l;
  81638. + uint32_t rfcs_u;
  81639. + uint32_t rvlan_l;
  81640. + uint32_t rvlan_u;
  81641. + uint32_t rerr_l;
  81642. + uint32_t rerr_u;
  81643. + uint32_t ruca_l;
  81644. + uint32_t ruca_u;
  81645. + uint32_t rmca_l;
  81646. + uint32_t rmca_u;
  81647. + uint32_t rbca_l;
  81648. + uint32_t rbca_u;
  81649. + uint32_t rdrp_l;
  81650. + uint32_t rdrp_u;
  81651. + uint32_t rpkt_l;
  81652. + uint32_t rpkt_u;
  81653. + uint32_t rund_l;
  81654. + uint32_t rund_u;
  81655. + uint32_t r64_l;
  81656. + uint32_t r64_u;
  81657. + uint32_t r127_l;
  81658. + uint32_t r127_u;
  81659. + uint32_t r255_l;
  81660. + uint32_t r255_u;
  81661. + uint32_t r511_l;
  81662. + uint32_t r511_u;
  81663. + uint32_t r1023_l;
  81664. + uint32_t r1023_u;
  81665. + uint32_t r1518_l;
  81666. + uint32_t r1518_u;
  81667. + uint32_t r1519x_l;
  81668. + uint32_t r1519x_u;
  81669. + uint32_t rovr_l;
  81670. + uint32_t rovr_u;
  81671. + uint32_t rjbr_l;
  81672. + uint32_t rjbr_u;
  81673. + uint32_t rfrg_l;
  81674. + uint32_t rfrg_u;
  81675. + uint32_t rcnp_l;
  81676. + uint32_t rcnp_u;
  81677. + uint32_t rdrntp_l;
  81678. + uint32_t rdrntp_u;
  81679. + uint32_t res01d0[12];
  81680. + /* Tx Statistics Counter */
  81681. + uint32_t teoct_l;
  81682. + uint32_t teoct_u;
  81683. + uint32_t toct_l;
  81684. + uint32_t toct_u;
  81685. + uint32_t res0210[2];
  81686. + uint32_t txpf_l;
  81687. + uint32_t txpf_u;
  81688. + uint32_t tfrm_l;
  81689. + uint32_t tfrm_u;
  81690. + uint32_t tfcs_l;
  81691. + uint32_t tfcs_u;
  81692. + uint32_t tvlan_l;
  81693. + uint32_t tvlan_u;
  81694. + uint32_t terr_l;
  81695. + uint32_t terr_u;
  81696. + uint32_t tuca_l;
  81697. + uint32_t tuca_u;
  81698. + uint32_t tmca_l;
  81699. + uint32_t tmca_u;
  81700. + uint32_t tbca_l;
  81701. + uint32_t tbca_u;
  81702. + uint32_t res0258[2];
  81703. + uint32_t tpkt_l;
  81704. + uint32_t tpkt_u;
  81705. + uint32_t tund_l;
  81706. + uint32_t tund_u;
  81707. + uint32_t t64_l;
  81708. + uint32_t t64_u;
  81709. + uint32_t t127_l;
  81710. + uint32_t t127_u;
  81711. + uint32_t t255_l;
  81712. + uint32_t t255_u;
  81713. + uint32_t t511_l;
  81714. + uint32_t t511_u;
  81715. + uint32_t t1023_l;
  81716. + uint32_t t1023_u;
  81717. + uint32_t t1518_l;
  81718. + uint32_t t1518_u;
  81719. + uint32_t t1519x_l;
  81720. + uint32_t t1519x_u;
  81721. + uint32_t res02a8[6];
  81722. + uint32_t tcnp_l;
  81723. + uint32_t tcnp_u;
  81724. + uint32_t res02c8[14];
  81725. + /* Line Interface Control */
  81726. + uint32_t if_mode; /* 0x300 Interface Mode Control */
  81727. + uint32_t if_status; /* 0x304 Interface Status */
  81728. + uint32_t res0308[14];
  81729. + /* HiGig/2 */
  81730. + uint32_t hg_config; /* 0x340 Control and cfg */
  81731. + uint32_t res0344[3];
  81732. + uint32_t hg_pause_quanta; /* 0x350 Pause quanta */
  81733. + uint32_t res0354[3];
  81734. + uint32_t hg_pause_thresh; /* 0x360 Pause quanta threshold */
  81735. + uint32_t res0364[3];
  81736. + uint32_t hgrx_pause_status; /* 0x370 Receive pause status */
  81737. + uint32_t hg_fifos_status; /* 0x374 fifos status */
  81738. + uint32_t rhm; /* 0x378 rx messages counter */
  81739. + uint32_t thm; /* 0x37C tx messages counter */
  81740. +};
  81741. +
  81742. +struct memac_cfg {
  81743. + bool reset_on_init;
  81744. + bool rx_error_discard;
  81745. + bool pause_ignore;
  81746. + bool pause_forward_enable;
  81747. + bool no_length_check_enable;
  81748. + bool cmd_frame_enable;
  81749. + bool send_idle_enable;
  81750. + bool wan_mode_enable;
  81751. + bool promiscuous_mode_enable;
  81752. + bool tx_addr_ins_enable;
  81753. + bool loopback_enable;
  81754. + bool lgth_check_nostdr;
  81755. + bool time_stamp_enable;
  81756. + bool pad_enable;
  81757. + bool phy_tx_ena_on;
  81758. + bool rx_sfd_any;
  81759. + bool rx_pbl_fwd;
  81760. + bool tx_pbl_fwd;
  81761. + bool debug_mode;
  81762. + bool wake_on_lan;
  81763. + uint16_t max_frame_length;
  81764. + uint16_t pause_quanta;
  81765. + uint32_t tx_ipg_length;
  81766. +};
  81767. +
  81768. +
  81769. +/**
  81770. + * fman_memac_defconfig() - Get default MEMAC configuration
  81771. + * @cfg: pointer to configuration structure.
  81772. + *
  81773. + * Call this function to obtain a default set of configuration values for
  81774. + * initializing MEMAC. The user can overwrite any of the values before calling
  81775. + * fman_memac_init(), if specific configuration needs to be applied.
  81776. + */
  81777. +void fman_memac_defconfig(struct memac_cfg *cfg);
  81778. +
  81779. +int fman_memac_init(struct memac_regs *regs,
  81780. + struct memac_cfg *cfg,
  81781. + enum enet_interface enet_interface,
  81782. + enum enet_speed enet_speed,
  81783. + bool slow_10g_if,
  81784. + uint32_t exceptions);
  81785. +
  81786. +void fman_memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
  81787. +
  81788. +void fman_memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
  81789. +
  81790. +void fman_memac_set_promiscuous(struct memac_regs *regs, bool val);
  81791. +
  81792. +void fman_memac_add_addr_in_paddr(struct memac_regs *regs,
  81793. + uint8_t *adr,
  81794. + uint8_t paddr_num);
  81795. +
  81796. +void fman_memac_clear_addr_in_paddr(struct memac_regs *regs,
  81797. + uint8_t paddr_num);
  81798. +
  81799. +uint64_t fman_memac_get_counter(struct memac_regs *regs,
  81800. + enum memac_counters reg_name);
  81801. +
  81802. +void fman_memac_set_tx_pause_frames(struct memac_regs *regs,
  81803. + uint8_t priority, uint16_t pauseTime, uint16_t threshTime);
  81804. +
  81805. +uint16_t fman_memac_get_max_frame_len(struct memac_regs *regs);
  81806. +
  81807. +void fman_memac_set_exception(struct memac_regs *regs, uint32_t val,
  81808. + bool enable);
  81809. +
  81810. +void fman_memac_reset_stat(struct memac_regs *regs);
  81811. +
  81812. +void fman_memac_reset(struct memac_regs *regs);
  81813. +
  81814. +void fman_memac_reset_filter_table(struct memac_regs *regs);
  81815. +
  81816. +void fman_memac_set_hash_table_entry(struct memac_regs *regs, uint32_t crc);
  81817. +
  81818. +void fman_memac_set_hash_table(struct memac_regs *regs, uint32_t val);
  81819. +
  81820. +void fman_memac_set_rx_ignore_pause_frames(struct memac_regs *regs,
  81821. + bool enable);
  81822. +
  81823. +void fman_memac_set_wol(struct memac_regs *regs, bool enable);
  81824. +
  81825. +uint32_t fman_memac_get_event(struct memac_regs *regs, uint32_t ev_mask);
  81826. +
  81827. +void fman_memac_ack_event(struct memac_regs *regs, uint32_t ev_mask);
  81828. +
  81829. +uint32_t fman_memac_get_interrupt_mask(struct memac_regs *regs);
  81830. +
  81831. +void fman_memac_adjust_link(struct memac_regs *regs,
  81832. + enum enet_interface iface_mode,
  81833. + enum enet_speed speed, bool full_dx);
  81834. +
  81835. +
  81836. +
  81837. +#endif /*__FSL_FMAN_MEMAC_H*/
  81838. --- /dev/null
  81839. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac_mii_acc.h
  81840. @@ -0,0 +1,78 @@
  81841. +/*
  81842. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  81843. + *
  81844. + * Redistribution and use in source and binary forms, with or without
  81845. + * modification, are permitted provided that the following conditions are met:
  81846. + * * Redistributions of source code must retain the above copyright
  81847. + * notice, this list of conditions and the following disclaimer.
  81848. + * * Redistributions in binary form must reproduce the above copyright
  81849. + * notice, this list of conditions and the following disclaimer in the
  81850. + * documentation and/or other materials provided with the distribution.
  81851. + * * Neither the name of Freescale Semiconductor nor the
  81852. + * names of its contributors may be used to endorse or promote products
  81853. + * derived from this software without specific prior written permission.
  81854. + *
  81855. + *
  81856. + * ALTERNATIVELY, this software may be distributed under the terms of the
  81857. + * GNU General Public License ("GPL") as published by the Free Software
  81858. + * Foundation, either version 2 of that License or (at your option) any
  81859. + * later version.
  81860. + *
  81861. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  81862. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  81863. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  81864. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  81865. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  81866. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  81867. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  81868. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81869. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  81870. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  81871. + */
  81872. +
  81873. +#ifndef __FSL_FMAN_MEMAC_MII_ACC_H
  81874. +#define __FSL_FMAN_MEMAC_MII_ACC_H
  81875. +
  81876. +#include "common/general.h"
  81877. +#include "fsl_enet.h"
  81878. +/* MII Management Registers */
  81879. +#define MDIO_CFG_CLK_DIV_MASK 0x0080ff80
  81880. +#define MDIO_CFG_CLK_DIV_SHIFT 7
  81881. +#define MDIO_CFG_HOLD_MASK 0x0000001c
  81882. +#define MDIO_CFG_ENC45 0x00000040
  81883. +#define MDIO_CFG_READ_ERR 0x00000002
  81884. +#define MDIO_CFG_BSY 0x00000001
  81885. +
  81886. +#define MDIO_CTL_PHY_ADDR_SHIFT 5
  81887. +#define MDIO_CTL_READ 0x00008000
  81888. +
  81889. +#define MDIO_DATA_BSY 0x80000000
  81890. +
  81891. +/*MEMAC Internal PHY Registers - SGMII */
  81892. +#define PHY_SGMII_CR_PHY_RESET 0x8000
  81893. +#define PHY_SGMII_CR_RESET_AN 0x0200
  81894. +#define PHY_SGMII_CR_DEF_VAL 0x1140
  81895. +#define PHY_SGMII_DEV_ABILITY_SGMII 0x4001
  81896. +#define PHY_SGMII_DEV_ABILITY_1000X 0x01A0
  81897. +#define PHY_SGMII_IF_MODE_AN 0x0002
  81898. +#define PHY_SGMII_IF_MODE_SGMII 0x0001
  81899. +#define PHY_SGMII_IF_MODE_1000X 0x0000
  81900. +
  81901. +/*----------------------------------------------------*/
  81902. +/* MII Configuration Control Memory Map Registers */
  81903. +/*----------------------------------------------------*/
  81904. +struct memac_mii_access_mem_map {
  81905. + uint32_t mdio_cfg; /* 0x030 */
  81906. + uint32_t mdio_ctrl; /* 0x034 */
  81907. + uint32_t mdio_data; /* 0x038 */
  81908. + uint32_t mdio_addr; /* 0x03c */
  81909. +};
  81910. +
  81911. +int fman_memac_mii_read_phy_reg(struct memac_mii_access_mem_map *mii_regs,
  81912. + uint8_t phy_addr, uint8_t reg, uint16_t *data,
  81913. + enum enet_speed enet_speed);
  81914. +int fman_memac_mii_write_phy_reg(struct memac_mii_access_mem_map *mii_regs,
  81915. + uint8_t phy_addr, uint8_t reg, uint16_t data,
  81916. + enum enet_speed enet_speed);
  81917. +
  81918. +#endif /* __MAC_API_MEMAC_MII_ACC_H */
  81919. --- /dev/null
  81920. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_port.h
  81921. @@ -0,0 +1,593 @@
  81922. +/*
  81923. + * Copyright 2008-2013 Freescale Semiconductor Inc.
  81924. + *
  81925. + * Redistribution and use in source and binary forms, with or without
  81926. + * modification, are permitted provided that the following conditions are met:
  81927. + * * Redistributions of source code must retain the above copyright
  81928. + * notice, this list of conditions and the following disclaimer.
  81929. + * * Redistributions in binary form must reproduce the above copyright
  81930. + * notice, this list of conditions and the following disclaimer in the
  81931. + * documentation and/or other materials provided with the distribution.
  81932. + * * Neither the name of Freescale Semiconductor nor the
  81933. + * names of its contributors may be used to endorse or promote products
  81934. + * derived from this software without specific prior written permission.
  81935. + *
  81936. + *
  81937. + * ALTERNATIVELY, this software may be distributed under the terms of the
  81938. + * GNU General Public License ("GPL") as published by the Free Software
  81939. + * Foundation, either version 2 of that License or (at your option) any
  81940. + * later version.
  81941. + *
  81942. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  81943. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  81944. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  81945. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  81946. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  81947. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  81948. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  81949. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81950. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  81951. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  81952. + */
  81953. +
  81954. +#ifndef __FSL_FMAN_PORT_H
  81955. +#define __FSL_FMAN_PORT_H
  81956. +
  81957. +#include "fsl_fman_sp.h"
  81958. +
  81959. +/** @Collection Registers bit fields */
  81960. +
  81961. +/** @Description BMI defines */
  81962. +#define BMI_EBD_EN 0x80000000
  81963. +
  81964. +#define BMI_PORT_CFG_EN 0x80000000
  81965. +#define BMI_PORT_CFG_FDOVR 0x02000000
  81966. +#define BMI_PORT_CFG_IM 0x01000000
  81967. +
  81968. +#define BMI_PORT_STATUS_BSY 0x80000000
  81969. +
  81970. +#define BMI_DMA_ATTR_SWP_SHIFT FMAN_SP_DMA_ATTR_SWP_SHIFT
  81971. +#define BMI_DMA_ATTR_IC_STASH_ON 0x10000000
  81972. +#define BMI_DMA_ATTR_HDR_STASH_ON 0x04000000
  81973. +#define BMI_DMA_ATTR_SG_STASH_ON 0x01000000
  81974. +#define BMI_DMA_ATTR_WRITE_OPTIMIZE FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE
  81975. +
  81976. +#define BMI_RX_FIFO_PRI_ELEVATION_SHIFT 16
  81977. +#define BMI_RX_FIFO_THRESHOLD_ETHE 0x80000000
  81978. +
  81979. +#define BMI_TX_FRAME_END_CS_IGNORE_SHIFT 24
  81980. +#define BMI_RX_FRAME_END_CS_IGNORE_SHIFT 24
  81981. +#define BMI_RX_FRAME_END_CUT_SHIFT 16
  81982. +
  81983. +#define BMI_IC_TO_EXT_SHIFT FMAN_SP_IC_TO_EXT_SHIFT
  81984. +#define BMI_IC_FROM_INT_SHIFT FMAN_SP_IC_FROM_INT_SHIFT
  81985. +
  81986. +#define BMI_INT_BUF_MARG_SHIFT 28
  81987. +#define BMI_EXT_BUF_MARG_START_SHIFT FMAN_SP_EXT_BUF_MARG_START_SHIFT
  81988. +
  81989. +#define BMI_CMD_MR_LEAC 0x00200000
  81990. +#define BMI_CMD_MR_SLEAC 0x00100000
  81991. +#define BMI_CMD_MR_MA 0x00080000
  81992. +#define BMI_CMD_MR_DEAS 0x00040000
  81993. +#define BMI_CMD_RX_MR_DEF (BMI_CMD_MR_LEAC | \
  81994. + BMI_CMD_MR_SLEAC | \
  81995. + BMI_CMD_MR_MA | \
  81996. + BMI_CMD_MR_DEAS)
  81997. +#define BMI_CMD_TX_MR_DEF 0
  81998. +#define BMI_CMD_OP_MR_DEF (BMI_CMD_MR_DEAS | \
  81999. + BMI_CMD_MR_MA)
  82000. +
  82001. +#define BMI_CMD_ATTR_ORDER 0x80000000
  82002. +#define BMI_CMD_ATTR_SYNC 0x02000000
  82003. +#define BMI_CMD_ATTR_COLOR_SHIFT 26
  82004. +
  82005. +#define BMI_FIFO_PIPELINE_DEPTH_SHIFT 12
  82006. +#define BMI_NEXT_ENG_FD_BITS_SHIFT 24
  82007. +#define BMI_FRAME_END_CS_IGNORE_SHIFT 24
  82008. +
  82009. +#define BMI_COUNTERS_EN 0x80000000
  82010. +
  82011. +#define BMI_EXT_BUF_POOL_VALID FMAN_SP_EXT_BUF_POOL_VALID
  82012. +#define BMI_EXT_BUF_POOL_EN_COUNTER FMAN_SP_EXT_BUF_POOL_EN_COUNTER
  82013. +#define BMI_EXT_BUF_POOL_BACKUP FMAN_SP_EXT_BUF_POOL_BACKUP
  82014. +#define BMI_EXT_BUF_POOL_ID_SHIFT 16
  82015. +#define BMI_EXT_BUF_POOL_ID_MASK 0x003F0000
  82016. +#define BMI_POOL_DEP_NUM_OF_POOLS_SHIFT 16
  82017. +
  82018. +#define BMI_TX_FIFO_MIN_FILL_SHIFT 16
  82019. +#define BMI_TX_FIFO_PIPELINE_DEPTH_SHIFT 12
  82020. +
  82021. +#define MAX_PERFORMANCE_TASK_COMP 64
  82022. +#define MAX_PERFORMANCE_RX_QUEUE_COMP 64
  82023. +#define MAX_PERFORMANCE_TX_QUEUE_COMP 8
  82024. +#define MAX_PERFORMANCE_DMA_COMP 16
  82025. +#define MAX_PERFORMANCE_FIFO_COMP 1024
  82026. +
  82027. +#define BMI_PERFORMANCE_TASK_COMP_SHIFT 24
  82028. +#define BMI_PERFORMANCE_QUEUE_COMP_SHIFT 16
  82029. +#define BMI_PERFORMANCE_DMA_COMP_SHIFT 12
  82030. +
  82031. +#define BMI_RATE_LIMIT_GRAN_TX 16000 /* In Kbps */
  82032. +#define BMI_RATE_LIMIT_GRAN_OP 10000 /* In frames */
  82033. +#define BMI_RATE_LIMIT_MAX_RATE_IN_GRAN_UNITS 1024
  82034. +#define BMI_RATE_LIMIT_MAX_BURST_SIZE 1024 /* In KBytes */
  82035. +#define BMI_RATE_LIMIT_MAX_BURST_SHIFT 16
  82036. +#define BMI_RATE_LIMIT_HIGH_BURST_SIZE_GRAN 0x80000000
  82037. +#define BMI_RATE_LIMIT_SCALE_TSBS_SHIFT 16
  82038. +#define BMI_RATE_LIMIT_SCALE_EN 0x80000000
  82039. +#define BMI_SG_DISABLE FMAN_SP_SG_DISABLE
  82040. +
  82041. +/** @Description QMI defines */
  82042. +#define QMI_PORT_CFG_EN 0x80000000
  82043. +#define QMI_PORT_CFG_EN_COUNTERS 0x10000000
  82044. +
  82045. +#define QMI_PORT_STATUS_DEQ_TNUM_BSY 0x80000000
  82046. +#define QMI_PORT_STATUS_DEQ_FD_BSY 0x20000000
  82047. +
  82048. +#define QMI_DEQ_CFG_PRI 0x80000000
  82049. +#define QMI_DEQ_CFG_TYPE1 0x10000000
  82050. +#define QMI_DEQ_CFG_TYPE2 0x20000000
  82051. +#define QMI_DEQ_CFG_TYPE3 0x30000000
  82052. +#define QMI_DEQ_CFG_PREFETCH_PARTIAL 0x01000000
  82053. +#define QMI_DEQ_CFG_PREFETCH_FULL 0x03000000
  82054. +#define QMI_DEQ_CFG_SP_MASK 0xf
  82055. +#define QMI_DEQ_CFG_SP_SHIFT 20
  82056. +
  82057. +
  82058. +/** @Description General port defines */
  82059. +#define FMAN_PORT_EXT_POOLS_NUM(fm_rev_maj) \
  82060. + (((fm_rev_maj) == 4) ? 4 : 8)
  82061. +#define FMAN_PORT_MAX_EXT_POOLS_NUM 8
  82062. +#define FMAN_PORT_OBS_EXT_POOLS_NUM 2
  82063. +#define FMAN_PORT_CG_MAP_NUM 8
  82064. +#define FMAN_PORT_PRS_RESULT_WORDS_NUM 8
  82065. +#define FMAN_PORT_BMI_FIFO_UNITS 0x100
  82066. +#define FMAN_PORT_IC_OFFSET_UNITS 0x10
  82067. +
  82068. +
  82069. +/** @Collection FM Port Register Map */
  82070. +
  82071. +/** @Description BMI Rx port register map */
  82072. +struct fman_port_rx_bmi_regs {
  82073. + uint32_t fmbm_rcfg; /**< Rx Configuration */
  82074. + uint32_t fmbm_rst; /**< Rx Status */
  82075. + uint32_t fmbm_rda; /**< Rx DMA attributes*/
  82076. + uint32_t fmbm_rfp; /**< Rx FIFO Parameters*/
  82077. + uint32_t fmbm_rfed; /**< Rx Frame End Data*/
  82078. + uint32_t fmbm_ricp; /**< Rx Internal Context Parameters*/
  82079. + uint32_t fmbm_rim; /**< Rx Internal Buffer Margins*/
  82080. + uint32_t fmbm_rebm; /**< Rx External Buffer Margins*/
  82081. + uint32_t fmbm_rfne; /**< Rx Frame Next Engine*/
  82082. + uint32_t fmbm_rfca; /**< Rx Frame Command Attributes.*/
  82083. + uint32_t fmbm_rfpne; /**< Rx Frame Parser Next Engine*/
  82084. + uint32_t fmbm_rpso; /**< Rx Parse Start Offset*/
  82085. + uint32_t fmbm_rpp; /**< Rx Policer Profile */
  82086. + uint32_t fmbm_rccb; /**< Rx Coarse Classification Base */
  82087. + uint32_t fmbm_reth; /**< Rx Excessive Threshold */
  82088. + uint32_t reserved003c[1]; /**< (0x03C 0x03F) */
  82089. + uint32_t fmbm_rprai[FMAN_PORT_PRS_RESULT_WORDS_NUM];
  82090. + /**< Rx Parse Results Array Init*/
  82091. + uint32_t fmbm_rfqid; /**< Rx Frame Queue ID*/
  82092. + uint32_t fmbm_refqid; /**< Rx Error Frame Queue ID*/
  82093. + uint32_t fmbm_rfsdm; /**< Rx Frame Status Discard Mask*/
  82094. + uint32_t fmbm_rfsem; /**< Rx Frame Status Error Mask*/
  82095. + uint32_t fmbm_rfene; /**< Rx Frame Enqueue Next Engine */
  82096. + uint32_t reserved0074[0x2]; /**< (0x074-0x07C) */
  82097. + uint32_t fmbm_rcmne; /**< Rx Frame Continuous Mode Next Engine */
  82098. + uint32_t reserved0080[0x20];/**< (0x080 0x0FF) */
  82099. + uint32_t fmbm_ebmpi[FMAN_PORT_MAX_EXT_POOLS_NUM];
  82100. + /**< Buffer Manager pool Information-*/
  82101. + uint32_t fmbm_acnt[FMAN_PORT_MAX_EXT_POOLS_NUM];
  82102. + /**< Allocate Counter-*/
  82103. + uint32_t reserved0130[8];
  82104. + /**< 0x130/0x140 - 0x15F reserved -*/
  82105. + uint32_t fmbm_rcgm[FMAN_PORT_CG_MAP_NUM];
  82106. + /**< Congestion Group Map*/
  82107. + uint32_t fmbm_mpd; /**< BM Pool Depletion */
  82108. + uint32_t reserved0184[0x1F]; /**< (0x184 0x1FF) */
  82109. + uint32_t fmbm_rstc; /**< Rx Statistics Counters*/
  82110. + uint32_t fmbm_rfrc; /**< Rx Frame Counter*/
  82111. + uint32_t fmbm_rfbc; /**< Rx Bad Frames Counter*/
  82112. + uint32_t fmbm_rlfc; /**< Rx Large Frames Counter*/
  82113. + uint32_t fmbm_rffc; /**< Rx Filter Frames Counter*/
  82114. + uint32_t fmbm_rfdc; /**< Rx Frame Discard Counter*/
  82115. + uint32_t fmbm_rfldec; /**< Rx Frames List DMA Error Counter*/
  82116. + uint32_t fmbm_rodc; /**< Rx Out of Buffers Discard nntr*/
  82117. + uint32_t fmbm_rbdc; /**< Rx Buffers Deallocate Counter*/
  82118. + uint32_t reserved0224[0x17]; /**< (0x224 0x27F) */
  82119. + uint32_t fmbm_rpc; /**< Rx Performance Counters*/
  82120. + uint32_t fmbm_rpcp; /**< Rx Performance Count Parameters*/
  82121. + uint32_t fmbm_rccn; /**< Rx Cycle Counter*/
  82122. + uint32_t fmbm_rtuc; /**< Rx Tasks Utilization Counter*/
  82123. + uint32_t fmbm_rrquc; /**< Rx Receive Queue Utilization cntr*/
  82124. + uint32_t fmbm_rduc; /**< Rx DMA Utilization Counter*/
  82125. + uint32_t fmbm_rfuc; /**< Rx FIFO Utilization Counter*/
  82126. + uint32_t fmbm_rpac; /**< Rx Pause Activation Counter*/
  82127. + uint32_t reserved02a0[0x18]; /**< (0x2A0 0x2FF) */
  82128. + uint32_t fmbm_rdbg; /**< Rx Debug-*/
  82129. +};
  82130. +
  82131. +/** @Description BMI Tx port register map */
  82132. +struct fman_port_tx_bmi_regs {
  82133. + uint32_t fmbm_tcfg; /**< Tx Configuration */
  82134. + uint32_t fmbm_tst; /**< Tx Status */
  82135. + uint32_t fmbm_tda; /**< Tx DMA attributes */
  82136. + uint32_t fmbm_tfp; /**< Tx FIFO Parameters */
  82137. + uint32_t fmbm_tfed; /**< Tx Frame End Data */
  82138. + uint32_t fmbm_ticp; /**< Tx Internal Context Parameters */
  82139. + uint32_t fmbm_tfdne; /**< Tx Frame Dequeue Next Engine. */
  82140. + uint32_t fmbm_tfca; /**< Tx Frame Command attribute. */
  82141. + uint32_t fmbm_tcfqid; /**< Tx Confirmation Frame Queue ID. */
  82142. + uint32_t fmbm_tefqid; /**< Tx Frame Error Queue ID */
  82143. + uint32_t fmbm_tfene; /**< Tx Frame Enqueue Next Engine */
  82144. + uint32_t fmbm_trlmts; /**< Tx Rate Limiter Scale */
  82145. + uint32_t fmbm_trlmt; /**< Tx Rate Limiter */
  82146. + uint32_t reserved0034[0x0e]; /**< (0x034-0x6c) */
  82147. + uint32_t fmbm_tccb; /**< Tx Coarse Classification base */
  82148. + uint32_t fmbm_tfne; /**< Tx Frame Next Engine */
  82149. + uint32_t fmbm_tpfcm[0x02]; /**< Tx Priority based Flow Control (PFC) Mapping */
  82150. + uint32_t fmbm_tcmne; /**< Tx Frame Continuous Mode Next Engine */
  82151. + uint32_t reserved0080[0x60]; /**< (0x080-0x200) */
  82152. + uint32_t fmbm_tstc; /**< Tx Statistics Counters */
  82153. + uint32_t fmbm_tfrc; /**< Tx Frame Counter */
  82154. + uint32_t fmbm_tfdc; /**< Tx Frames Discard Counter */
  82155. + uint32_t fmbm_tfledc; /**< Tx Frame len error discard cntr */
  82156. + uint32_t fmbm_tfufdc; /**< Tx Frame unsprt frmt discard cntr*/
  82157. + uint32_t fmbm_tbdc; /**< Tx Buffers Deallocate Counter */
  82158. + uint32_t reserved0218[0x1A]; /**< (0x218-0x280) */
  82159. + uint32_t fmbm_tpc; /**< Tx Performance Counters*/
  82160. + uint32_t fmbm_tpcp; /**< Tx Performance Count Parameters*/
  82161. + uint32_t fmbm_tccn; /**< Tx Cycle Counter*/
  82162. + uint32_t fmbm_ttuc; /**< Tx Tasks Utilization Counter*/
  82163. + uint32_t fmbm_ttcquc; /**< Tx Transmit conf Q util Counter*/
  82164. + uint32_t fmbm_tduc; /**< Tx DMA Utilization Counter*/
  82165. + uint32_t fmbm_tfuc; /**< Tx FIFO Utilization Counter*/
  82166. +};
  82167. +
  82168. +/** @Description BMI O/H port register map */
  82169. +struct fman_port_oh_bmi_regs {
  82170. + uint32_t fmbm_ocfg; /**< O/H Configuration */
  82171. + uint32_t fmbm_ost; /**< O/H Status */
  82172. + uint32_t fmbm_oda; /**< O/H DMA attributes */
  82173. + uint32_t fmbm_oicp; /**< O/H Internal Context Parameters */
  82174. + uint32_t fmbm_ofdne; /**< O/H Frame Dequeue Next Engine */
  82175. + uint32_t fmbm_ofne; /**< O/H Frame Next Engine */
  82176. + uint32_t fmbm_ofca; /**< O/H Frame Command Attributes. */
  82177. + uint32_t fmbm_ofpne; /**< O/H Frame Parser Next Engine */
  82178. + uint32_t fmbm_opso; /**< O/H Parse Start Offset */
  82179. + uint32_t fmbm_opp; /**< O/H Policer Profile */
  82180. + uint32_t fmbm_occb; /**< O/H Coarse Classification base */
  82181. + uint32_t fmbm_oim; /**< O/H Internal margins*/
  82182. + uint32_t fmbm_ofp; /**< O/H Fifo Parameters*/
  82183. + uint32_t fmbm_ofed; /**< O/H Frame End Data*/
  82184. + uint32_t reserved0030[2]; /**< (0x038 - 0x03F) */
  82185. + uint32_t fmbm_oprai[FMAN_PORT_PRS_RESULT_WORDS_NUM];
  82186. + /**< O/H Parse Results Array Initialization */
  82187. + uint32_t fmbm_ofqid; /**< O/H Frame Queue ID */
  82188. + uint32_t fmbm_oefqid; /**< O/H Error Frame Queue ID */
  82189. + uint32_t fmbm_ofsdm; /**< O/H Frame Status Discard Mask */
  82190. + uint32_t fmbm_ofsem; /**< O/H Frame Status Error Mask */
  82191. + uint32_t fmbm_ofene; /**< O/H Frame Enqueue Next Engine */
  82192. + uint32_t fmbm_orlmts; /**< O/H Rate Limiter Scale */
  82193. + uint32_t fmbm_orlmt; /**< O/H Rate Limiter */
  82194. + uint32_t fmbm_ocmne; /**< O/H Continuous Mode Next Engine */
  82195. + uint32_t reserved0080[0x20]; /**< 0x080 - 0x0FF Reserved */
  82196. + uint32_t fmbm_oebmpi[2]; /**< Buf Mngr Observed Pool Info */
  82197. + uint32_t reserved0108[0x16]; /**< 0x108 - 0x15F Reserved */
  82198. + uint32_t fmbm_ocgm[FMAN_PORT_CG_MAP_NUM]; /**< Observed Congestion Group Map */
  82199. + uint32_t fmbm_ompd; /**< Observed BMan Pool Depletion */
  82200. + uint32_t reserved0184[0x1F]; /**< 0x184 - 0x1FF Reserved */
  82201. + uint32_t fmbm_ostc; /**< O/H Statistics Counters */
  82202. + uint32_t fmbm_ofrc; /**< O/H Frame Counter */
  82203. + uint32_t fmbm_ofdc; /**< O/H Frames Discard Counter */
  82204. + uint32_t fmbm_ofledc; /**< O/H Frames Len Err Discard Cntr */
  82205. + uint32_t fmbm_ofufdc; /**< O/H Frames Unsprtd Discard Cutr */
  82206. + uint32_t fmbm_offc; /**< O/H Filter Frames Counter */
  82207. + uint32_t fmbm_ofwdc; /**< Rx Frames WRED Discard Counter */
  82208. + uint32_t fmbm_ofldec; /**< O/H Frames List DMA Error Cntr */
  82209. + uint32_t fmbm_obdc; /**< O/H Buffers Deallocate Counter */
  82210. + uint32_t reserved0218[0x17]; /**< (0x218 - 0x27F) */
  82211. + uint32_t fmbm_opc; /**< O/H Performance Counters */
  82212. + uint32_t fmbm_opcp; /**< O/H Performance Count Parameters */
  82213. + uint32_t fmbm_occn; /**< O/H Cycle Counter */
  82214. + uint32_t fmbm_otuc; /**< O/H Tasks Utilization Counter */
  82215. + uint32_t fmbm_oduc; /**< O/H DMA Utilization Counter */
  82216. + uint32_t fmbm_ofuc; /**< O/H FIFO Utilization Counter */
  82217. +};
  82218. +
  82219. +/** @Description BMI port register map */
  82220. +union fman_port_bmi_regs {
  82221. + struct fman_port_rx_bmi_regs rx;
  82222. + struct fman_port_tx_bmi_regs tx;
  82223. + struct fman_port_oh_bmi_regs oh;
  82224. +};
  82225. +
  82226. +/** @Description QMI port register map */
  82227. +struct fman_port_qmi_regs {
  82228. + uint32_t fmqm_pnc; /**< PortID n Configuration Register */
  82229. + uint32_t fmqm_pns; /**< PortID n Status Register */
  82230. + uint32_t fmqm_pnts; /**< PortID n Task Status Register */
  82231. + uint32_t reserved00c[4]; /**< 0xn00C - 0xn01B */
  82232. + uint32_t fmqm_pnen; /**< PortID n Enqueue NIA Register */
  82233. + uint32_t fmqm_pnetfc; /**< PortID n Enq Total Frame Counter */
  82234. + uint32_t reserved024[2]; /**< 0xn024 - 0x02B */
  82235. + uint32_t fmqm_pndn; /**< PortID n Dequeue NIA Register */
  82236. + uint32_t fmqm_pndc; /**< PortID n Dequeue Config Register */
  82237. + uint32_t fmqm_pndtfc; /**< PortID n Dequeue tot Frame cntr */
  82238. + uint32_t fmqm_pndfdc; /**< PortID n Dequeue FQID Dflt Cntr */
  82239. + uint32_t fmqm_pndcc; /**< PortID n Dequeue Confirm Counter */
  82240. +};
  82241. +
  82242. +
  82243. +enum fman_port_dma_swap {
  82244. + E_FMAN_PORT_DMA_NO_SWAP, /**< No swap, transfer data as is */
  82245. + E_FMAN_PORT_DMA_SWAP_LE,
  82246. + /**< The transferred data should be swapped in PPC Little Endian mode */
  82247. + E_FMAN_PORT_DMA_SWAP_BE
  82248. + /**< The transferred data should be swapped in Big Endian mode */
  82249. +};
  82250. +
  82251. +/* Default port color */
  82252. +enum fman_port_color {
  82253. + E_FMAN_PORT_COLOR_GREEN, /**< Default port color is green */
  82254. + E_FMAN_PORT_COLOR_YELLOW, /**< Default port color is yellow */
  82255. + E_FMAN_PORT_COLOR_RED, /**< Default port color is red */
  82256. + E_FMAN_PORT_COLOR_OVERRIDE /**< Ignore color */
  82257. +};
  82258. +
  82259. +/* QMI dequeue from the SP channel - types */
  82260. +enum fman_port_deq_type {
  82261. + E_FMAN_PORT_DEQ_BY_PRI,
  82262. + /**< Priority precedence and Intra-Class scheduling */
  82263. + E_FMAN_PORT_DEQ_ACTIVE_FQ,
  82264. + /**< Active FQ precedence and Intra-Class scheduling */
  82265. + E_FMAN_PORT_DEQ_ACTIVE_FQ_NO_ICS
  82266. + /**< Active FQ precedence and override Intra-Class scheduling */
  82267. +};
  82268. +
  82269. +/* QMI dequeue prefetch modes */
  82270. +enum fman_port_deq_prefetch {
  82271. + E_FMAN_PORT_DEQ_NO_PREFETCH, /**< No prefetch mode */
  82272. + E_FMAN_PORT_DEQ_PART_PREFETCH, /**< Partial prefetch mode */
  82273. + E_FMAN_PORT_DEQ_FULL_PREFETCH /**< Full prefetch mode */
  82274. +};
  82275. +
  82276. +/* Parameters for defining performance counters behavior */
  82277. +struct fman_port_perf_cnt_params {
  82278. + uint8_t task_val; /**< Task compare value */
  82279. + uint8_t queue_val;
  82280. + /**< Rx or Tx conf queue compare value (unused for O/H ports) */
  82281. + uint8_t dma_val; /**< Dma compare value */
  82282. + uint32_t fifo_val; /**< Fifo compare value (in bytes) */
  82283. +};
  82284. +
  82285. +/** @Description FM Port configuration structure, used at init */
  82286. +struct fman_port_cfg {
  82287. + struct fman_port_perf_cnt_params perf_cnt_params;
  82288. + /* BMI parameters */
  82289. + enum fman_port_dma_swap dma_swap_data;
  82290. + bool dma_ic_stash_on;
  82291. + bool dma_header_stash_on;
  82292. + bool dma_sg_stash_on;
  82293. + bool dma_write_optimize;
  82294. + uint16_t ic_ext_offset;
  82295. + uint8_t ic_int_offset;
  82296. + uint16_t ic_size;
  82297. + enum fman_port_color color;
  82298. + bool sync_req;
  82299. + bool discard_override;
  82300. + uint8_t checksum_bytes_ignore;
  82301. + uint8_t rx_cut_end_bytes;
  82302. + uint32_t rx_pri_elevation;
  82303. + uint32_t rx_fifo_thr;
  82304. + uint8_t rx_fd_bits;
  82305. + uint8_t int_buf_start_margin;
  82306. + uint16_t ext_buf_start_margin;
  82307. + uint16_t ext_buf_end_margin;
  82308. + uint32_t tx_fifo_min_level;
  82309. + uint32_t tx_fifo_low_comf_level;
  82310. + uint8_t tx_fifo_deq_pipeline_depth;
  82311. + bool stats_counters_enable;
  82312. + bool perf_counters_enable;
  82313. + /* QMI parameters */
  82314. + bool deq_high_pri;
  82315. + enum fman_port_deq_type deq_type;
  82316. + enum fman_port_deq_prefetch deq_prefetch_opt;
  82317. + uint16_t deq_byte_cnt;
  82318. + bool queue_counters_enable;
  82319. + bool no_scatter_gather;
  82320. + int errata_A006675;
  82321. + int errata_A006320;
  82322. + int excessive_threshold_register;
  82323. + int fmbm_rebm_has_sgd;
  82324. + int fmbm_tfne_has_features;
  82325. + int qmi_deq_options_support;
  82326. +};
  82327. +
  82328. +enum fman_port_type {
  82329. + E_FMAN_PORT_TYPE_OP = 0,
  82330. + /**< Offline parsing port, shares id-s with
  82331. + * host command, so must have exclusive id-s */
  82332. + E_FMAN_PORT_TYPE_RX, /**< 1G Rx port */
  82333. + E_FMAN_PORT_TYPE_RX_10G, /**< 10G Rx port */
  82334. + E_FMAN_PORT_TYPE_TX, /**< 1G Tx port */
  82335. + E_FMAN_PORT_TYPE_TX_10G, /**< 10G Tx port */
  82336. + E_FMAN_PORT_TYPE_DUMMY,
  82337. + E_FMAN_PORT_TYPE_HC = E_FMAN_PORT_TYPE_DUMMY
  82338. + /**< Host command port, shares id-s with
  82339. + * offline parsing ports, so must have exclusive id-s */
  82340. +};
  82341. +
  82342. +struct fman_port_params {
  82343. + uint32_t discard_mask;
  82344. + uint32_t err_mask;
  82345. + uint32_t dflt_fqid;
  82346. + uint32_t err_fqid;
  82347. + uint8_t deq_sp;
  82348. + bool dont_release_buf;
  82349. +};
  82350. +
  82351. +/* Port context - used by most API functions */
  82352. +struct fman_port {
  82353. + enum fman_port_type type;
  82354. + uint8_t fm_rev_maj;
  82355. + uint8_t fm_rev_min;
  82356. + union fman_port_bmi_regs *bmi_regs;
  82357. + struct fman_port_qmi_regs *qmi_regs;
  82358. + bool im_en;
  82359. + uint8_t ext_pools_num;
  82360. +};
  82361. +
  82362. +/** @Description External buffer pools configuration */
  82363. +struct fman_port_bpools {
  82364. + uint8_t count; /**< Num of pools to set up */
  82365. + bool counters_enable; /**< Enable allocate counters */
  82366. + uint8_t grp_bp_depleted_num;
  82367. + /**< Number of depleted pools - if reached the BMI indicates
  82368. + * the MAC to send a pause frame */
  82369. + struct {
  82370. + uint8_t bpid; /**< BM pool ID */
  82371. + uint16_t size;
  82372. + /**< Pool's size - must be in ascending order */
  82373. + bool is_backup;
  82374. + /**< If this is a backup pool */
  82375. + bool grp_bp_depleted;
  82376. + /**< Consider this buffer in multiple pools depletion criteria*/
  82377. + bool single_bp_depleted;
  82378. + /**< Consider this buffer in single pool depletion criteria */
  82379. + bool pfc_priorities_en;
  82380. + } bpool[FMAN_PORT_MAX_EXT_POOLS_NUM];
  82381. +};
  82382. +
  82383. +enum fman_port_rate_limiter_scale_down {
  82384. + E_FMAN_PORT_RATE_DOWN_NONE,
  82385. + E_FMAN_PORT_RATE_DOWN_BY_2,
  82386. + E_FMAN_PORT_RATE_DOWN_BY_4,
  82387. + E_FMAN_PORT_RATE_DOWN_BY_8
  82388. +};
  82389. +
  82390. +/* Rate limiter configuration */
  82391. +struct fman_port_rate_limiter {
  82392. + uint8_t count_1micro_bit;
  82393. + bool high_burst_size_gran;
  82394. + /**< Defines burst_size granularity for OP ports; when TRUE,
  82395. + * burst_size below counts in frames, otherwise in 10^3 frames */
  82396. + uint16_t burst_size;
  82397. + /**< Max burst size, in KBytes for Tx port, according to
  82398. + * high_burst_size_gran definition for OP port */
  82399. + uint32_t rate;
  82400. + /**< In Kbps for Tx port, in frames/sec for OP port */
  82401. + enum fman_port_rate_limiter_scale_down rate_factor;
  82402. +};
  82403. +
  82404. +/* BMI statistics counters */
  82405. +enum fman_port_stats_counters {
  82406. + E_FMAN_PORT_STATS_CNT_FRAME,
  82407. + /**< Number of processed frames; valid for all ports */
  82408. + E_FMAN_PORT_STATS_CNT_DISCARD,
  82409. + /**< For Rx ports - frames discarded by QMAN, for Tx or O/H ports -
  82410. + * frames discarded due to DMA error; valid for all ports */
  82411. + E_FMAN_PORT_STATS_CNT_DEALLOC_BUF,
  82412. + /**< Number of buffer deallocate operations; valid for all ports */
  82413. + E_FMAN_PORT_STATS_CNT_RX_BAD_FRAME,
  82414. + /**< Number of bad Rx frames, like CRC error, Rx FIFO overflow etc;
  82415. + * valid for Rx ports only */
  82416. + E_FMAN_PORT_STATS_CNT_RX_LARGE_FRAME,
  82417. + /**< Number of Rx oversized frames, that is frames exceeding max frame
  82418. + * size configured for the corresponding ETH controller;
  82419. + * valid for Rx ports only */
  82420. + E_FMAN_PORT_STATS_CNT_RX_OUT_OF_BUF,
  82421. + /**< Frames discarded due to lack of external buffers; valid for
  82422. + * Rx ports only */
  82423. + E_FMAN_PORT_STATS_CNT_LEN_ERR,
  82424. + /**< Frames discarded due to frame length error; valid for Tx and
  82425. + * O/H ports only */
  82426. + E_FMAN_PORT_STATS_CNT_UNSUPPORTED_FORMAT,
  82427. + /**< Frames discarded due to unsupported FD format; valid for Tx
  82428. + * and O/H ports only */
  82429. + E_FMAN_PORT_STATS_CNT_FILTERED_FRAME,
  82430. + /**< Number of frames filtered out by PCD module; valid for
  82431. + * Rx and OP ports only */
  82432. + E_FMAN_PORT_STATS_CNT_DMA_ERR,
  82433. + /**< Frames rejected by QMAN that were not able to release their
  82434. + * buffers due to DMA error; valid for Rx and O/H ports only */
  82435. + E_FMAN_PORT_STATS_CNT_WRED_DISCARD
  82436. + /**< Frames going through O/H port that were not able to to enter the
  82437. + * return queue due to WRED algorithm; valid for O/H ports only */
  82438. +};
  82439. +
  82440. +/* BMI performance counters */
  82441. +enum fman_port_perf_counters {
  82442. + E_FMAN_PORT_PERF_CNT_CYCLE, /**< Cycle counter */
  82443. + E_FMAN_PORT_PERF_CNT_TASK_UTIL, /**< Tasks utilization counter */
  82444. + E_FMAN_PORT_PERF_CNT_QUEUE_UTIL,
  82445. + /**< For Rx ports - Rx queue utilization, for Tx ports - Tx conf queue
  82446. + * utilization; not valid for O/H ports */
  82447. + E_FMAN_PORT_PERF_CNT_DMA_UTIL, /**< DMA utilization counter */
  82448. + E_FMAN_PORT_PERF_CNT_FIFO_UTIL, /**< FIFO utilization counter */
  82449. + E_FMAN_PORT_PERF_CNT_RX_PAUSE
  82450. + /**< Number of cycles in which Rx pause activation control is on;
  82451. + * valid for Rx ports only */
  82452. +};
  82453. +
  82454. +/* QMI counters */
  82455. +enum fman_port_qmi_counters {
  82456. + E_FMAN_PORT_ENQ_TOTAL, /**< EnQ tot frame cntr */
  82457. + E_FMAN_PORT_DEQ_TOTAL, /**< DeQ tot frame cntr; invalid for Rx ports */
  82458. + E_FMAN_PORT_DEQ_FROM_DFLT,
  82459. + /**< Dequeue from default FQID counter not valid for Rx ports */
  82460. + E_FMAN_PORT_DEQ_CONFIRM /**< DeQ confirm cntr invalid for Rx ports */
  82461. +};
  82462. +
  82463. +
  82464. +/** @Collection FM Port API */
  82465. +void fman_port_defconfig(struct fman_port_cfg *cfg, enum fman_port_type type);
  82466. +int fman_port_init(struct fman_port *port,
  82467. + struct fman_port_cfg *cfg,
  82468. + struct fman_port_params *params);
  82469. +int fman_port_enable(struct fman_port *port);
  82470. +int fman_port_disable(const struct fman_port *port);
  82471. +int fman_port_set_bpools(const struct fman_port *port,
  82472. + const struct fman_port_bpools *bp);
  82473. +int fman_port_set_rate_limiter(struct fman_port *port,
  82474. + struct fman_port_rate_limiter *rate_limiter);
  82475. +int fman_port_delete_rate_limiter(struct fman_port *port);
  82476. +int fman_port_set_err_mask(struct fman_port *port, uint32_t err_mask);
  82477. +int fman_port_set_discard_mask(struct fman_port *port, uint32_t discard_mask);
  82478. +int fman_port_modify_rx_fd_bits(struct fman_port *port,
  82479. + uint8_t rx_fd_bits,
  82480. + bool add);
  82481. +int fman_port_set_perf_cnt_params(struct fman_port *port,
  82482. + struct fman_port_perf_cnt_params *params);
  82483. +int fman_port_set_stats_cnt_mode(struct fman_port *port, bool enable);
  82484. +int fman_port_set_perf_cnt_mode(struct fman_port *port, bool enable);
  82485. +int fman_port_set_queue_cnt_mode(struct fman_port *port, bool enable);
  82486. +int fman_port_set_bpool_cnt_mode(struct fman_port *port,
  82487. + uint8_t bpid,
  82488. + bool enable);
  82489. +uint32_t fman_port_get_stats_counter(struct fman_port *port,
  82490. + enum fman_port_stats_counters counter);
  82491. +void fman_port_set_stats_counter(struct fman_port *port,
  82492. + enum fman_port_stats_counters counter,
  82493. + uint32_t value);
  82494. +uint32_t fman_port_get_perf_counter(struct fman_port *port,
  82495. + enum fman_port_perf_counters counter);
  82496. +void fman_port_set_perf_counter(struct fman_port *port,
  82497. + enum fman_port_perf_counters counter,
  82498. + uint32_t value);
  82499. +uint32_t fman_port_get_qmi_counter(struct fman_port *port,
  82500. + enum fman_port_qmi_counters counter);
  82501. +void fman_port_set_qmi_counter(struct fman_port *port,
  82502. + enum fman_port_qmi_counters counter,
  82503. + uint32_t value);
  82504. +uint32_t fman_port_get_bpool_counter(struct fman_port *port, uint8_t bpid);
  82505. +void fman_port_set_bpool_counter(struct fman_port *port,
  82506. + uint8_t bpid,
  82507. + uint32_t value);
  82508. +int fman_port_add_congestion_grps(struct fman_port *port,
  82509. + uint32_t grps_map[FMAN_PORT_CG_MAP_NUM]);
  82510. +int fman_port_remove_congestion_grps(struct fman_port *port,
  82511. + uint32_t grps_map[FMAN_PORT_CG_MAP_NUM]);
  82512. +
  82513. +
  82514. +#endif /* __FSL_FMAN_PORT_H */
  82515. --- /dev/null
  82516. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_prs.h
  82517. @@ -0,0 +1,102 @@
  82518. +/*
  82519. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  82520. + *
  82521. + * Redistribution and use in source and binary forms, with or without
  82522. + * modification, are permitted provided that the following conditions are met:
  82523. + * * Redistributions of source code must retain the above copyright
  82524. + * notice, this list of conditions and the following disclaimer.
  82525. + * * Redistributions in binary form must reproduce the above copyright
  82526. + * notice, this list of conditions and the following disclaimer in the
  82527. + * documentation and/or other materials provided with the distribution.
  82528. + * * Neither the name of Freescale Semiconductor nor the
  82529. + * names of its contributors may be used to endorse or promote products
  82530. + * derived from this software without specific prior written permission.
  82531. + *
  82532. + *
  82533. + * ALTERNATIVELY, this software may be distributed under the terms of the
  82534. + * GNU General Public License ("GPL") as published by the Free Software
  82535. + * Foundation, either version 2 of that License or (at your option) any
  82536. + * later version.
  82537. + *
  82538. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  82539. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  82540. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  82541. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  82542. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  82543. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  82544. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  82545. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  82546. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  82547. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  82548. + */
  82549. +
  82550. +#ifndef __FSL_FMAN_PRS_H
  82551. +#define __FSL_FMAN_PRS_H
  82552. +
  82553. +#include "common/general.h"
  82554. +
  82555. +#define FM_PCD_EX_PRS_DOUBLE_ECC 0x02000000
  82556. +#define FM_PCD_EX_PRS_SINGLE_ECC 0x01000000
  82557. +
  82558. +#define FM_PCD_PRS_PPSC_ALL_PORTS 0xffff0000
  82559. +#define FM_PCD_PRS_RPIMAC_EN 0x00000001
  82560. +#define FM_PCD_PRS_PORT_IDLE_STS 0xffff0000
  82561. +#define FM_PCD_PRS_SINGLE_ECC 0x00004000
  82562. +#define FM_PCD_PRS_DOUBLE_ECC 0x00004000
  82563. +#define PRS_MAX_CYCLE_LIMIT 8191
  82564. +
  82565. +#define DEFAULT_MAX_PRS_CYC_LIM 0
  82566. +
  82567. +struct fman_prs_regs {
  82568. + uint32_t fmpr_rpclim;
  82569. + uint32_t fmpr_rpimac;
  82570. + uint32_t pmeec;
  82571. + uint32_t res00c[5];
  82572. + uint32_t fmpr_pevr;
  82573. + uint32_t fmpr_pever;
  82574. + uint32_t res028;
  82575. + uint32_t fmpr_perr;
  82576. + uint32_t fmpr_perer;
  82577. + uint32_t res034;
  82578. + uint32_t res038[10];
  82579. + uint32_t fmpr_ppsc;
  82580. + uint32_t res064;
  82581. + uint32_t fmpr_pds;
  82582. + uint32_t fmpr_l2rrs;
  82583. + uint32_t fmpr_l3rrs;
  82584. + uint32_t fmpr_l4rrs;
  82585. + uint32_t fmpr_srrs;
  82586. + uint32_t fmpr_l2rres;
  82587. + uint32_t fmpr_l3rres;
  82588. + uint32_t fmpr_l4rres;
  82589. + uint32_t fmpr_srres;
  82590. + uint32_t fmpr_spcs;
  82591. + uint32_t fmpr_spscs;
  82592. + uint32_t fmpr_hxscs;
  82593. + uint32_t fmpr_mrcs;
  82594. + uint32_t fmpr_mwcs;
  82595. + uint32_t fmpr_mrscs;
  82596. + uint32_t fmpr_mwscs;
  82597. + uint32_t fmpr_fcscs;
  82598. +};
  82599. +
  82600. +struct fman_prs_cfg {
  82601. + uint32_t port_id_stat;
  82602. + uint16_t max_prs_cyc_lim;
  82603. + uint32_t prs_exceptions;
  82604. +};
  82605. +
  82606. +uint32_t fman_prs_get_err_event(struct fman_prs_regs *regs, uint32_t ev_mask);
  82607. +uint32_t fman_prs_get_err_ev_mask(struct fman_prs_regs *regs);
  82608. +void fman_prs_ack_err_event(struct fman_prs_regs *regs, uint32_t event);
  82609. +uint32_t fman_prs_get_expt_event(struct fman_prs_regs *regs, uint32_t ev_mask);
  82610. +uint32_t fman_prs_get_expt_ev_mask(struct fman_prs_regs *regs);
  82611. +void fman_prs_ack_expt_event(struct fman_prs_regs *regs, uint32_t event);
  82612. +void fman_prs_defconfig(struct fman_prs_cfg *cfg);
  82613. +int fman_prs_init(struct fman_prs_regs *regs, struct fman_prs_cfg *cfg);
  82614. +void fman_prs_enable(struct fman_prs_regs *regs);
  82615. +void fman_prs_disable(struct fman_prs_regs *regs);
  82616. +int fman_prs_is_enabled(struct fman_prs_regs *regs);
  82617. +void fman_prs_set_stst_port_msk(struct fman_prs_regs *regs, uint32_t pid_msk);
  82618. +void fman_prs_set_stst(struct fman_prs_regs *regs, bool enable);
  82619. +#endif /* __FSL_FMAN_PRS_H */
  82620. --- /dev/null
  82621. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_rtc.h
  82622. @@ -0,0 +1,449 @@
  82623. +/*
  82624. + * Copyright 2013 Freescale Semiconductor Inc.
  82625. + *
  82626. + * Redistribution and use in source and binary forms, with or without
  82627. + * modification, are permitted provided that the following conditions are met:
  82628. + * * Redistributions of source code must retain the above copyright
  82629. + * notice, this list of conditions and the following disclaimer.
  82630. + * * Redistributions in binary form must reproduce the above copyright
  82631. + * notice, this list of conditions and the following disclaimer in the
  82632. + * documentation and/or other materials provided with the distribution.
  82633. + * * Neither the name of Freescale Semiconductor nor the
  82634. + * names of its contributors may be used to endorse or promote products
  82635. + * derived from this software without specific prior written permission.
  82636. + *
  82637. + *
  82638. + * ALTERNATIVELY, this software may be distributed under the terms of the
  82639. + * GNU General Public License ("GPL") as published by the Free Software
  82640. + * Foundation, either version 2 of that License or (at your option) any
  82641. + * later version.
  82642. + *
  82643. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  82644. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  82645. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  82646. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  82647. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  82648. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  82649. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  82650. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  82651. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  82652. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  82653. + */
  82654. +
  82655. +#ifndef __FSL_FMAN_RTC_H
  82656. +#define __FSL_FMAN_RTC_H
  82657. +
  82658. +#include "common/general.h"
  82659. +
  82660. +/* FM RTC Registers definitions */
  82661. +#define FMAN_RTC_TMR_CTRL_ALMP1 0x80000000
  82662. +#define FMAN_RTC_TMR_CTRL_ALMP2 0x40000000
  82663. +#define FMAN_RTC_TMR_CTRL_FS 0x10000000
  82664. +#define FMAN_RTC_TMR_CTRL_PP1L 0x08000000
  82665. +#define FMAN_RTC_TMR_CTRL_PP2L 0x04000000
  82666. +#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_MASK 0x03FF0000
  82667. +#define FMAN_RTC_TMR_CTRL_FRD 0x00004000
  82668. +#define FMAN_RTC_TMR_CTRL_SLV 0x00002000
  82669. +#define FMAN_RTC_TMR_CTRL_ETEP1 0x00000100
  82670. +#define FMAN_RTC_TMR_CTRL_COPH 0x00000080
  82671. +#define FMAN_RTC_TMR_CTRL_CIPH 0x00000040
  82672. +#define FMAN_RTC_TMR_CTRL_TMSR 0x00000020
  82673. +#define FMAN_RTC_TMR_CTRL_DBG 0x00000010
  82674. +#define FMAN_RTC_TMR_CTRL_BYP 0x00000008
  82675. +#define FMAN_RTC_TMR_CTRL_TE 0x00000004
  82676. +#define FMAN_RTC_TMR_CTRL_CKSEL_OSC_CLK 0x00000003
  82677. +#define FMAN_RTC_TMR_CTRL_CKSEL_MAC_CLK 0x00000001
  82678. +#define FMAN_RTC_TMR_CTRL_CKSEL_EXT_CLK 0x00000000
  82679. +#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_SHIFT 16
  82680. +
  82681. +#define FMAN_RTC_TMR_TEVENT_ETS2 0x02000000
  82682. +#define FMAN_RTC_TMR_TEVENT_ETS1 0x01000000
  82683. +#define FMAN_RTC_TMR_TEVENT_ALM2 0x00020000
  82684. +#define FMAN_RTC_TMR_TEVENT_ALM1 0x00010000
  82685. +#define FMAN_RTC_TMR_TEVENT_PP1 0x00000080
  82686. +#define FMAN_RTC_TMR_TEVENT_PP2 0x00000040
  82687. +#define FMAN_RTC_TMR_TEVENT_PP3 0x00000020
  82688. +#define FMAN_RTC_TMR_TEVENT_ALL (FMAN_RTC_TMR_TEVENT_ETS2 |\
  82689. + FMAN_RTC_TMR_TEVENT_ETS1 |\
  82690. + FMAN_RTC_TMR_TEVENT_ALM2 |\
  82691. + FMAN_RTC_TMR_TEVENT_ALM1 |\
  82692. + FMAN_RTC_TMR_TEVENT_PP1 |\
  82693. + FMAN_RTC_TMR_TEVENT_PP2 |\
  82694. + FMAN_RTC_TMR_TEVENT_PP3)
  82695. +
  82696. +#define FMAN_RTC_TMR_PRSC_OCK_MASK 0x0000FFFF
  82697. +
  82698. +/**************************************************************************//**
  82699. + @Description FM RTC Alarm Polarity Options.
  82700. +*//***************************************************************************/
  82701. +enum fman_rtc_alarm_polarity {
  82702. + E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH, /**< Active-high output polarity */
  82703. + E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW /**< Active-low output polarity */
  82704. +};
  82705. +
  82706. +/**************************************************************************//**
  82707. + @Description FM RTC Trigger Polarity Options.
  82708. +*//***************************************************************************/
  82709. +enum fman_rtc_trigger_polarity {
  82710. + E_FMAN_RTC_TRIGGER_ON_RISING_EDGE, /**< Trigger on rising edge */
  82711. + E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE /**< Trigger on falling edge */
  82712. +};
  82713. +
  82714. +/**************************************************************************//**
  82715. + @Description IEEE1588 Timer Module FM RTC Optional Clock Sources.
  82716. +*//***************************************************************************/
  82717. +enum fman_src_clock {
  82718. + E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL, /**< external high precision timer
  82719. + reference clock */
  82720. + E_FMAN_RTC_SOURCE_CLOCK_SYSTEM, /**< MAC system clock */
  82721. + E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR /**< RTC clock oscilator */
  82722. +};
  82723. +
  82724. +/* RTC default values */
  82725. +#define DEFAULT_SRC_CLOCK E_FMAN_RTC_SOURCE_CLOCK_SYSTEM
  82726. +#define DEFAULT_INVERT_INPUT_CLK_PHASE FALSE
  82727. +#define DEFAULT_INVERT_OUTPUT_CLK_PHASE FALSE
  82728. +#define DEFAULT_ALARM_POLARITY E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH
  82729. +#define DEFAULT_TRIGGER_POLARITY E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE
  82730. +#define DEFAULT_PULSE_REALIGN FALSE
  82731. +
  82732. +#define FMAN_RTC_MAX_NUM_OF_ALARMS 3
  82733. +#define FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES 4
  82734. +#define FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS 3
  82735. +
  82736. +/**************************************************************************//**
  82737. + @Description FM RTC timer alarm
  82738. +*//***************************************************************************/
  82739. +struct t_tmr_alarm{
  82740. + uint32_t tmr_alarm_h; /**< */
  82741. + uint32_t tmr_alarm_l; /**< */
  82742. +};
  82743. +
  82744. +/**************************************************************************//**
  82745. + @Description FM RTC timer Ex trigger
  82746. +*//***************************************************************************/
  82747. +struct t_tmr_ext_trigger{
  82748. + uint32_t tmr_etts_h; /**< */
  82749. + uint32_t tmr_etts_l; /**< */
  82750. +};
  82751. +
  82752. +struct rtc_regs {
  82753. + uint32_t tmr_id; /* 0x000 Module ID register */
  82754. + uint32_t tmr_id2; /* 0x004 Controller ID register */
  82755. + uint32_t reserved0008[30];
  82756. + uint32_t tmr_ctrl; /* 0x0080 timer control register */
  82757. + uint32_t tmr_tevent; /* 0x0084 timer event register */
  82758. + uint32_t tmr_temask; /* 0x0088 timer event mask register */
  82759. + uint32_t reserved008c[3];
  82760. + uint32_t tmr_cnt_h; /* 0x0098 timer counter high register */
  82761. + uint32_t tmr_cnt_l; /* 0x009c timer counter low register */
  82762. + uint32_t tmr_add; /* 0x00a0 timer drift compensation addend register */
  82763. + uint32_t tmr_acc; /* 0x00a4 timer accumulator register */
  82764. + uint32_t tmr_prsc; /* 0x00a8 timer prescale */
  82765. + uint32_t reserved00ac;
  82766. + uint32_t tmr_off_h; /* 0x00b0 timer offset high */
  82767. + uint32_t tmr_off_l; /* 0x00b4 timer offset low */
  82768. + struct t_tmr_alarm tmr_alarm[FMAN_RTC_MAX_NUM_OF_ALARMS]; /* 0x00b8 timer
  82769. + alarm */
  82770. + uint32_t tmr_fiper[FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES]; /* 0x00d0 timer
  82771. + fixed period interval */
  82772. + struct t_tmr_ext_trigger tmr_etts[FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS];
  82773. + /* 0x00e0 time stamp general purpose external */
  82774. + uint32_t reserved00f0[4];
  82775. +};
  82776. +
  82777. +struct rtc_cfg {
  82778. + enum fman_src_clock src_clk;
  82779. + uint32_t ext_src_clk_freq;
  82780. + uint32_t rtc_freq_hz;
  82781. + bool timer_slave_mode;
  82782. + bool invert_input_clk_phase;
  82783. + bool invert_output_clk_phase;
  82784. + uint32_t events_mask;
  82785. + bool bypass; /**< Indicates if frequency compensation
  82786. + is bypassed */
  82787. + bool pulse_realign;
  82788. + enum fman_rtc_alarm_polarity alarm_polarity[FMAN_RTC_MAX_NUM_OF_ALARMS];
  82789. + enum fman_rtc_trigger_polarity trigger_polarity
  82790. + [FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS];
  82791. +};
  82792. +
  82793. +/**
  82794. + * fman_rtc_defconfig() - Get default RTC configuration
  82795. + * @cfg: pointer to configuration structure.
  82796. + *
  82797. + * Call this function to obtain a default set of configuration values for
  82798. + * initializing RTC. The user can overwrite any of the values before calling
  82799. + * fman_rtc_init(), if specific configuration needs to be applied.
  82800. + */
  82801. +void fman_rtc_defconfig(struct rtc_cfg *cfg);
  82802. +
  82803. +/**
  82804. + * fman_rtc_get_events() - Get the events
  82805. + * @regs: Pointer to RTC register block
  82806. + *
  82807. + * Returns: The events
  82808. + */
  82809. +uint32_t fman_rtc_get_events(struct rtc_regs *regs);
  82810. +
  82811. +/**
  82812. + * fman_rtc_get_interrupt_mask() - Get the events mask
  82813. + * @regs: Pointer to RTC register block
  82814. + *
  82815. + * Returns: The events mask
  82816. + */
  82817. +uint32_t fman_rtc_get_interrupt_mask(struct rtc_regs *regs);
  82818. +
  82819. +
  82820. +/**
  82821. + * fman_rtc_set_interrupt_mask() - Set the events mask
  82822. + * @regs: Pointer to RTC register block
  82823. + * @mask: The mask to set
  82824. + */
  82825. +void fman_rtc_set_interrupt_mask(struct rtc_regs *regs, uint32_t mask);
  82826. +
  82827. +/**
  82828. + * fman_rtc_get_event() - Check if specific events occurred
  82829. + * @regs: Pointer to RTC register block
  82830. + * @ev_mask: a mask of the events to check
  82831. + *
  82832. + * Returns: 0 if the events did not occur. Non zero if one of the events occurred
  82833. + */
  82834. +uint32_t fman_rtc_get_event(struct rtc_regs *regs, uint32_t ev_mask);
  82835. +
  82836. +/**
  82837. + * fman_rtc_check_and_clear_event() - Clear events which are on
  82838. + * @regs: Pointer to RTC register block
  82839. + *
  82840. + * Returns: A mask of the events which were cleared
  82841. + */
  82842. +uint32_t fman_rtc_check_and_clear_event(struct rtc_regs *regs);
  82843. +
  82844. +/**
  82845. + * fman_rtc_ack_event() - Clear events
  82846. + * @regs: Pointer to RTC register block
  82847. + * @events: The events to disable
  82848. + */
  82849. +void fman_rtc_ack_event(struct rtc_regs *regs, uint32_t events);
  82850. +
  82851. +/**
  82852. + * fman_rtc_enable_interupt() - Enable events interrupts
  82853. + * @regs: Pointer to RTC register block
  82854. + * @mask: The events to disable
  82855. + */
  82856. +void fman_rtc_enable_interupt(struct rtc_regs *regs, uint32_t mask);
  82857. +
  82858. +/**
  82859. + * fman_rtc_disable_interupt() - Disable events interrupts
  82860. + * @regs: Pointer to RTC register block
  82861. + * @mask: The events to disable
  82862. + */
  82863. +void fman_rtc_disable_interupt(struct rtc_regs *regs, uint32_t mask);
  82864. +
  82865. +/**
  82866. + * fman_rtc_get_timer_ctrl() - Get the control register
  82867. + * @regs: Pointer to RTC register block
  82868. + *
  82869. + * Returns: The control register value
  82870. + */
  82871. +uint32_t fman_rtc_get_timer_ctrl(struct rtc_regs *regs);
  82872. +
  82873. +/**
  82874. + * fman_rtc_set_timer_ctrl() - Set timer control register
  82875. + * @regs: Pointer to RTC register block
  82876. + * @val: The value to set
  82877. + */
  82878. +void fman_rtc_set_timer_ctrl(struct rtc_regs *regs, uint32_t val);
  82879. +
  82880. +/**
  82881. + * fman_rtc_get_frequency_compensation() - Get the frequency compensation
  82882. + * @regs: Pointer to RTC register block
  82883. + *
  82884. + * Returns: The timer counter
  82885. + */
  82886. +uint32_t fman_rtc_get_frequency_compensation(struct rtc_regs *regs);
  82887. +
  82888. +/**
  82889. + * fman_rtc_set_frequency_compensation() - Set frequency compensation
  82890. + * @regs: Pointer to RTC register block
  82891. + * @val: The value to set
  82892. + */
  82893. +void fman_rtc_set_frequency_compensation(struct rtc_regs *regs, uint32_t val);
  82894. +
  82895. +/**
  82896. + * fman_rtc_get_trigger_stamp() - Get a trigger stamp
  82897. + * @regs: Pointer to RTC register block
  82898. + * @id: The id of the trigger stamp
  82899. + *
  82900. + * Returns: The time stamp
  82901. + */
  82902. +uint64_t fman_rtc_get_trigger_stamp(struct rtc_regs *regs, int id);
  82903. +
  82904. +/**
  82905. + * fman_rtc_set_timer_alarm_l() - Set timer alarm low register
  82906. + * @regs: Pointer to RTC register block
  82907. + * @index: The index of alarm to set
  82908. + * @val: The value to set
  82909. + */
  82910. +void fman_rtc_set_timer_alarm_l(struct rtc_regs *regs, int index,
  82911. + uint32_t val);
  82912. +
  82913. +/**
  82914. + * fman_rtc_set_timer_alarm() - Set timer alarm
  82915. + * @regs: Pointer to RTC register block
  82916. + * @index: The index of alarm to set
  82917. + * @val: The value to set
  82918. + */
  82919. +void fman_rtc_set_timer_alarm(struct rtc_regs *regs, int index, int64_t val);
  82920. +
  82921. +/**
  82922. + * fman_rtc_set_timer_fiper() - Set timer fiper
  82923. + * @regs: Pointer to RTC register block
  82924. + * @index: The index of fiper to set
  82925. + * @val: The value to set
  82926. + */
  82927. +void fman_rtc_set_timer_fiper(struct rtc_regs *regs, int index, uint32_t val);
  82928. +
  82929. +/**
  82930. + * fman_rtc_set_timer_offset() - Set timer offset
  82931. + * @regs: Pointer to RTC register block
  82932. + * @val: The value to set
  82933. + */
  82934. +void fman_rtc_set_timer_offset(struct rtc_regs *regs, int64_t val);
  82935. +
  82936. +/**
  82937. + * fman_rtc_get_timer() - Get the timer counter
  82938. + * @regs: Pointer to RTC register block
  82939. + *
  82940. + * Returns: The timer counter
  82941. + */
  82942. +static inline uint64_t fman_rtc_get_timer(struct rtc_regs *regs)
  82943. +{
  82944. + uint64_t time;
  82945. + /* TMR_CNT_L must be read first to get an accurate value */
  82946. + time = (uint64_t)ioread32be(&regs->tmr_cnt_l);
  82947. + time |= ((uint64_t)ioread32be(&regs->tmr_cnt_h) << 32);
  82948. +
  82949. + return time;
  82950. +}
  82951. +
  82952. +/**
  82953. + * fman_rtc_set_timer() - Set timer counter
  82954. + * @regs: Pointer to RTC register block
  82955. + * @val: The value to set
  82956. + */
  82957. +static inline void fman_rtc_set_timer(struct rtc_regs *regs, int64_t val)
  82958. +{
  82959. + iowrite32be((uint32_t)val, &regs->tmr_cnt_l);
  82960. + iowrite32be((uint32_t)(val >> 32), &regs->tmr_cnt_h);
  82961. +}
  82962. +
  82963. +/**
  82964. + * fman_rtc_timers_soft_reset() - Soft reset
  82965. + * @regs: Pointer to RTC register block
  82966. + *
  82967. + * Resets all the timer registers and state machines for the 1588 IP and
  82968. + * the attached client 1588
  82969. + */
  82970. +void fman_rtc_timers_soft_reset(struct rtc_regs *regs);
  82971. +
  82972. +/**
  82973. + * fman_rtc_clear_external_trigger() - Clear an external trigger
  82974. + * @regs: Pointer to RTC register block
  82975. + * @id: The id of the trigger to clear
  82976. + */
  82977. +void fman_rtc_clear_external_trigger(struct rtc_regs *regs, int id);
  82978. +
  82979. +/**
  82980. + * fman_rtc_clear_periodic_pulse() - Clear periodic pulse
  82981. + * @regs: Pointer to RTC register block
  82982. + * @id: The id of the fiper to clear
  82983. + */
  82984. +void fman_rtc_clear_periodic_pulse(struct rtc_regs *regs, int id);
  82985. +
  82986. +/**
  82987. + * fman_rtc_enable() - Enable RTC hardware block
  82988. + * @regs: Pointer to RTC register block
  82989. + */
  82990. +void fman_rtc_enable(struct rtc_regs *regs, bool reset_clock);
  82991. +
  82992. +/**
  82993. + * fman_rtc_is_enabled() - Is RTC hardware block enabled
  82994. + * @regs: Pointer to RTC register block
  82995. + *
  82996. + * Return: TRUE if enabled
  82997. + */
  82998. +bool fman_rtc_is_enabled(struct rtc_regs *regs);
  82999. +
  83000. +/**
  83001. + * fman_rtc_disable() - Disable RTC hardware block
  83002. + * @regs: Pointer to RTC register block
  83003. + */
  83004. +void fman_rtc_disable(struct rtc_regs *regs);
  83005. +
  83006. +/**
  83007. + * fman_rtc_init() - Init RTC hardware block
  83008. + * @cfg: RTC configuration data
  83009. + * @regs: Pointer to RTC register block
  83010. + * @num_alarms: Number of alarms in RTC
  83011. + * @num_fipers: Number of fipers in RTC
  83012. + * @num_ext_triggers: Number of external triggers in RTC
  83013. + * @freq_compensation: Frequency compensation
  83014. + * @output_clock_divisor: Output clock divisor
  83015. + *
  83016. + * This function initializes RTC and applies basic configuration.
  83017. + */
  83018. +void fman_rtc_init(struct rtc_cfg *cfg, struct rtc_regs *regs, int num_alarms,
  83019. + int num_fipers, int num_ext_triggers, bool init_freq_comp,
  83020. + uint32_t freq_compensation, uint32_t output_clock_divisor);
  83021. +
  83022. +/**
  83023. + * fman_rtc_set_alarm() - Set an alarm
  83024. + * @regs: Pointer to RTC register block
  83025. + * @id: id of alarm
  83026. + * @val: value to write
  83027. + * @enable: should interrupt be enabled
  83028. + */
  83029. +void fman_rtc_set_alarm(struct rtc_regs *regs, int id, uint32_t val, bool enable);
  83030. +
  83031. +/**
  83032. + * fman_rtc_set_periodic_pulse() - Set an alarm
  83033. + * @regs: Pointer to RTC register block
  83034. + * @id: id of fiper
  83035. + * @val: value to write
  83036. + * @enable: should interrupt be enabled
  83037. + */
  83038. +void fman_rtc_set_periodic_pulse(struct rtc_regs *regs, int id, uint32_t val,
  83039. + bool enable);
  83040. +
  83041. +/**
  83042. + * fman_rtc_set_ext_trigger() - Set an external trigger
  83043. + * @regs: Pointer to RTC register block
  83044. + * @id: id of trigger
  83045. + * @enable: should interrupt be enabled
  83046. + * @use_pulse_as_input: use the pulse as input
  83047. + */
  83048. +void fman_rtc_set_ext_trigger(struct rtc_regs *regs, int id, bool enable,
  83049. + bool use_pulse_as_input);
  83050. +
  83051. +struct fm_rtc_alarm_params {
  83052. + uint8_t alarm_id; /**< 0 or 1 */
  83053. + uint64_t alarm_time; /**< In nanoseconds, the time when the
  83054. + alarm should go off - must be a
  83055. + multiple of the RTC period */
  83056. + void (*f_alarm_callback)(void* app, uint8_t id); /**< This routine will
  83057. + be called when RTC reaches alarmTime */
  83058. + bool clear_on_expiration; /**< TRUE to turn off the alarm once
  83059. + expired.*/
  83060. +};
  83061. +
  83062. +struct fm_rtc_periodic_pulse_params {
  83063. + uint8_t periodic_pulse_id; /**< 0 or 1 */
  83064. + uint64_t periodic_pulse_period; /**< In Nanoseconds. Must be a multiple
  83065. + of the RTC period */
  83066. + void (*f_periodic_pulse_callback)(void* app, uint8_t id); /**< This
  83067. + routine will be called every
  83068. + periodicPulsePeriod. */
  83069. +};
  83070. +
  83071. +#endif /* __FSL_FMAN_RTC_H */
  83072. --- /dev/null
  83073. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_sp.h
  83074. @@ -0,0 +1,138 @@
  83075. +/*
  83076. + * Copyright 2013 Freescale Semiconductor Inc.
  83077. + *
  83078. + * Redistribution and use in source and binary forms, with or without
  83079. + * modification, are permitted provided that the following conditions are met:
  83080. + * * Redistributions of source code must retain the above copyright
  83081. + * notice, this list of conditions and the following disclaimer.
  83082. + * * Redistributions in binary form must reproduce the above copyright
  83083. + * notice, this list of conditions and the following disclaimer in the
  83084. + * documentation and/or other materials provided with the distribution.
  83085. + * * Neither the name of Freescale Semiconductor nor the
  83086. + * names of its contributors may be used to endorse or promote products
  83087. + * derived from this software without specific prior written permission.
  83088. + *
  83089. + *
  83090. + * ALTERNATIVELY, this software may be distributed under the terms of the
  83091. + * GNU General Public License ("GPL") as published by the Free Software
  83092. + * Foundation, either version 2 of that License or (at your option) any
  83093. + * later version.
  83094. + *
  83095. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  83096. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  83097. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  83098. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  83099. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  83100. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  83101. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  83102. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  83103. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  83104. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83105. + */
  83106. +
  83107. +#ifndef __FSL_FMAN_SP_H
  83108. +#define __FSL_FMAN_SP_H
  83109. +
  83110. +#include "common/general.h"
  83111. +#include "fsl_fman.h"
  83112. +
  83113. +
  83114. +struct fm_pcd_storage_profile_regs{
  83115. + uint32_t fm_sp_ebmpi[8];
  83116. + /*offset 0 - 0xc*/
  83117. + /**< Buffer Manager pool Information */
  83118. +
  83119. + uint32_t fm_sp_acnt; /*offset 0x20*/
  83120. + uint32_t fm_sp_ebm; /*offset 0x24*/
  83121. + uint32_t fm_sp_da; /*offset 0x28*/
  83122. + uint32_t fm_sp_icp; /*offset 0x2c*/
  83123. + uint32_t fm_sp_mpd; /*offset 0x30*/
  83124. + uint32_t res1[2]; /*offset 0x34 - 0x38*/
  83125. + uint32_t fm_sp_spliodn; /*offset 0x3c*/
  83126. +};
  83127. +
  83128. +/**************************************************************************//**
  83129. + @Description structure for defining internal context copying
  83130. +*//***************************************************************************/
  83131. +struct fman_sp_int_context_data_copy{
  83132. + uint16_t ext_buf_offset; /**< Offset in External buffer to which
  83133. + internal context is copied to (Rx)
  83134. + or taken from (Tx, Op). */
  83135. + uint8_t int_context_offset; /**< Offset within internal context to copy
  83136. + from (Rx) or to copy to (Tx, Op).*/
  83137. + uint16_t size; /**< Internal offset size to be copied */
  83138. +};
  83139. +
  83140. +/**************************************************************************//**
  83141. + @Description struct for defining external buffer margins
  83142. +*//***************************************************************************/
  83143. +struct fman_sp_buf_margins{
  83144. + uint16_t start_margins; /**< Number of bytes to be left at the
  83145. + beginning of the external buffer (must be
  83146. + divisible by 16) */
  83147. + uint16_t end_margins; /**< number of bytes to be left at the end of
  83148. + the external buffer(must be divisible by 16)*/
  83149. +};
  83150. +
  83151. +struct fm_storage_profile_params {
  83152. + struct fman_ext_pools fm_ext_pools;
  83153. + struct fman_backup_bm_pools backup_pools;
  83154. + struct fman_sp_int_context_data_copy *int_context;
  83155. + struct fman_sp_buf_margins *buf_margins;
  83156. + enum fman_dma_swap_option dma_swap_data;
  83157. + enum fman_dma_cache_option int_context_cache_attr;
  83158. + enum fman_dma_cache_option header_cache_attr;
  83159. + enum fman_dma_cache_option scatter_gather_cache_attr;
  83160. + bool dma_write_optimize;
  83161. + uint16_t liodn_offset;
  83162. + bool no_scather_gather;
  83163. + struct fman_buf_pool_depletion buf_pool_depletion;
  83164. +};
  83165. +
  83166. +/**************************************************************************//**
  83167. + @Description Registers bit fields
  83168. +*//***************************************************************************/
  83169. +#define FMAN_SP_EXT_BUF_POOL_EN_COUNTER 0x40000000
  83170. +#define FMAN_SP_EXT_BUF_POOL_VALID 0x80000000
  83171. +#define FMAN_SP_EXT_BUF_POOL_BACKUP 0x20000000
  83172. +#define FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE 0x00100000
  83173. +#define FMAN_SP_SG_DISABLE 0x80000000
  83174. +
  83175. +/* shifts */
  83176. +#define FMAN_SP_EXT_BUF_POOL_ID_SHIFT 16
  83177. +#define FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT 16
  83178. +#define FMAN_SP_EXT_BUF_MARG_START_SHIFT 16
  83179. +#define FMAN_SP_EXT_BUF_MARG_END_SHIFT 0
  83180. +#define FMAN_SP_DMA_ATTR_SWP_SHIFT 30
  83181. +#define FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT 28
  83182. +#define FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT 26
  83183. +#define FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT 24
  83184. +#define FMAN_SP_IC_TO_EXT_SHIFT 16
  83185. +#define FMAN_SP_IC_FROM_INT_SHIFT 8
  83186. +#define FMAN_SP_IC_SIZE_SHIFT 0
  83187. +
  83188. +/**************************************************************************//**
  83189. + @Description defaults
  83190. +*//***************************************************************************/
  83191. +#define DEFAULT_FMAN_SP_DMA_SWAP_DATA FMAN_DMA_NO_SWP
  83192. +#define DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR FMAN_DMA_NO_STASH
  83193. +#define DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR FMAN_DMA_NO_STASH
  83194. +#define DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR FMAN_DMA_NO_STASH
  83195. +#define DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE TRUE
  83196. +#define DEFAULT_FMAN_SP_NO_SCATTER_GATHER FALSE
  83197. +
  83198. +void fman_vsp_defconfig(struct fm_storage_profile_params *cfg);
  83199. +
  83200. +void fman_vsp_init(struct fm_pcd_storage_profile_regs *regs,
  83201. + uint16_t index, struct fm_storage_profile_params *fm_vsp_params,
  83202. + int port_max_num_of_ext_pools, int bm_max_num_of_pools,
  83203. + int max_num_of_pfc_priorities);
  83204. +
  83205. +uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs *regs,
  83206. + uint16_t index);
  83207. +
  83208. +void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs,
  83209. + uint16_t index, uint32_t value);
  83210. +
  83211. +
  83212. +#endif /* __FSL_FMAN_SP_H */
  83213. --- /dev/null
  83214. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_tgec.h
  83215. @@ -0,0 +1,479 @@
  83216. +/*
  83217. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  83218. + *
  83219. + * Redistribution and use in source and binary forms, with or without
  83220. + * modification, are permitted provided that the following conditions are met:
  83221. + * * Redistributions of source code must retain the above copyright
  83222. + * notice, this list of conditions and the following disclaimer.
  83223. + * * Redistributions in binary form must reproduce the above copyright
  83224. + * notice, this list of conditions and the following disclaimer in the
  83225. + * documentation and/or other materials provided with the distribution.
  83226. + * * Neither the name of Freescale Semiconductor nor the
  83227. + * names of its contributors may be used to endorse or promote products
  83228. + * derived from this software without specific prior written permission.
  83229. + *
  83230. + *
  83231. + * ALTERNATIVELY, this software may be distributed under the terms of the
  83232. + * GNU General Public License ("GPL") as published by the Free Software
  83233. + * Foundation, either version 2 of that License or (at your option) any
  83234. + * later version.
  83235. + *
  83236. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  83237. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  83238. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  83239. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  83240. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  83241. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  83242. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  83243. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  83244. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  83245. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83246. + */
  83247. +
  83248. +#ifndef __FSL_FMAN_TGEC_H
  83249. +#define __FSL_FMAN_TGEC_H
  83250. +
  83251. +#include "common/general.h"
  83252. +#include "fsl_enet.h"
  83253. +
  83254. +
  83255. +/* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */
  83256. +#define TGEC_TX_IPG_LENGTH_MASK 0x000003ff
  83257. +
  83258. +enum tgec_counters {
  83259. + E_TGEC_COUNTER_R64,
  83260. + E_TGEC_COUNTER_R127,
  83261. + E_TGEC_COUNTER_R255,
  83262. + E_TGEC_COUNTER_R511,
  83263. + E_TGEC_COUNTER_R1023,
  83264. + E_TGEC_COUNTER_R1518,
  83265. + E_TGEC_COUNTER_R1519X,
  83266. + E_TGEC_COUNTER_TRFRG,
  83267. + E_TGEC_COUNTER_TRJBR,
  83268. + E_TGEC_COUNTER_RDRP,
  83269. + E_TGEC_COUNTER_RALN,
  83270. + E_TGEC_COUNTER_TRUND,
  83271. + E_TGEC_COUNTER_TROVR,
  83272. + E_TGEC_COUNTER_RXPF,
  83273. + E_TGEC_COUNTER_TXPF,
  83274. + E_TGEC_COUNTER_ROCT,
  83275. + E_TGEC_COUNTER_RMCA,
  83276. + E_TGEC_COUNTER_RBCA,
  83277. + E_TGEC_COUNTER_RPKT,
  83278. + E_TGEC_COUNTER_RUCA,
  83279. + E_TGEC_COUNTER_RERR,
  83280. + E_TGEC_COUNTER_TOCT,
  83281. + E_TGEC_COUNTER_TMCA,
  83282. + E_TGEC_COUNTER_TBCA,
  83283. + E_TGEC_COUNTER_TUCA,
  83284. + E_TGEC_COUNTER_TERR
  83285. +};
  83286. +
  83287. +/* Command and Configuration Register (COMMAND_CONFIG) */
  83288. +#define CMD_CFG_EN_TIMESTAMP 0x00100000
  83289. +#define CMD_CFG_TX_ADDR_INS_SEL 0x00080000
  83290. +#define CMD_CFG_NO_LEN_CHK 0x00020000
  83291. +#define CMD_CFG_SEND_IDLE 0x00010000
  83292. +#define CMD_CFG_RX_ER_DISC 0x00004000
  83293. +#define CMD_CFG_CMD_FRM_EN 0x00002000
  83294. +#define CMD_CFG_STAT_CLR 0x00001000
  83295. +#define CMD_CFG_LOOPBACK_EN 0x00000400
  83296. +#define CMD_CFG_TX_ADDR_INS 0x00000200
  83297. +#define CMD_CFG_PAUSE_IGNORE 0x00000100
  83298. +#define CMD_CFG_PAUSE_FWD 0x00000080
  83299. +#define CMD_CFG_PROMIS_EN 0x00000010
  83300. +#define CMD_CFG_WAN_MODE 0x00000008
  83301. +#define CMD_CFG_RX_EN 0x00000002
  83302. +#define CMD_CFG_TX_EN 0x00000001
  83303. +
  83304. +/* Interrupt Mask Register (IMASK) */
  83305. +#define TGEC_IMASK_MDIO_SCAN_EVENT 0x00010000
  83306. +#define TGEC_IMASK_MDIO_CMD_CMPL 0x00008000
  83307. +#define TGEC_IMASK_REM_FAULT 0x00004000
  83308. +#define TGEC_IMASK_LOC_FAULT 0x00002000
  83309. +#define TGEC_IMASK_TX_ECC_ER 0x00001000
  83310. +#define TGEC_IMASK_TX_FIFO_UNFL 0x00000800
  83311. +#define TGEC_IMASK_TX_FIFO_OVFL 0x00000400
  83312. +#define TGEC_IMASK_TX_ER 0x00000200
  83313. +#define TGEC_IMASK_RX_FIFO_OVFL 0x00000100
  83314. +#define TGEC_IMASK_RX_ECC_ER 0x00000080
  83315. +#define TGEC_IMASK_RX_JAB_FRM 0x00000040
  83316. +#define TGEC_IMASK_RX_OVRSZ_FRM 0x00000020
  83317. +#define TGEC_IMASK_RX_RUNT_FRM 0x00000010
  83318. +#define TGEC_IMASK_RX_FRAG_FRM 0x00000008
  83319. +#define TGEC_IMASK_RX_LEN_ER 0x00000004
  83320. +#define TGEC_IMASK_RX_CRC_ER 0x00000002
  83321. +#define TGEC_IMASK_RX_ALIGN_ER 0x00000001
  83322. +
  83323. +#define TGEC_EVENTS_MASK \
  83324. + ((uint32_t)(TGEC_IMASK_MDIO_SCAN_EVENT | \
  83325. + TGEC_IMASK_MDIO_CMD_CMPL | \
  83326. + TGEC_IMASK_REM_FAULT | \
  83327. + TGEC_IMASK_LOC_FAULT | \
  83328. + TGEC_IMASK_TX_ECC_ER | \
  83329. + TGEC_IMASK_TX_FIFO_UNFL | \
  83330. + TGEC_IMASK_TX_FIFO_OVFL | \
  83331. + TGEC_IMASK_TX_ER | \
  83332. + TGEC_IMASK_RX_FIFO_OVFL | \
  83333. + TGEC_IMASK_RX_ECC_ER | \
  83334. + TGEC_IMASK_RX_JAB_FRM | \
  83335. + TGEC_IMASK_RX_OVRSZ_FRM | \
  83336. + TGEC_IMASK_RX_RUNT_FRM | \
  83337. + TGEC_IMASK_RX_FRAG_FRM | \
  83338. + TGEC_IMASK_RX_LEN_ER | \
  83339. + TGEC_IMASK_RX_CRC_ER | \
  83340. + TGEC_IMASK_RX_ALIGN_ER))
  83341. +
  83342. +/* Hashtable Control Register (HASHTABLE_CTRL) */
  83343. +#define TGEC_HASH_MCAST_SHIFT 23
  83344. +#define TGEC_HASH_MCAST_EN 0x00000200
  83345. +#define TGEC_HASH_ADR_MSK 0x000001ff
  83346. +
  83347. +#define DEFAULT_WAN_MODE_ENABLE FALSE
  83348. +#define DEFAULT_PROMISCUOUS_MODE_ENABLE FALSE
  83349. +#define DEFAULT_PAUSE_FORWARD_ENABLE FALSE
  83350. +#define DEFAULT_PAUSE_IGNORE FALSE
  83351. +#define DEFAULT_TX_ADDR_INS_ENABLE FALSE
  83352. +#define DEFAULT_LOOPBACK_ENABLE FALSE
  83353. +#define DEFAULT_CMD_FRAME_ENABLE FALSE
  83354. +#define DEFAULT_RX_ERROR_DISCARD FALSE
  83355. +#define DEFAULT_SEND_IDLE_ENABLE FALSE
  83356. +#define DEFAULT_NO_LENGTH_CHECK_ENABLE TRUE
  83357. +#define DEFAULT_LGTH_CHECK_NOSTDR FALSE
  83358. +#define DEFAULT_TIME_STAMP_ENABLE FALSE
  83359. +#define DEFAULT_TX_IPG_LENGTH 12
  83360. +#define DEFAULT_MAX_FRAME_LENGTH 0x600
  83361. +#define DEFAULT_PAUSE_QUANT 0xf000
  83362. +
  83363. +/*
  83364. + * 10G memory map
  83365. + */
  83366. +struct tgec_regs {
  83367. + uint32_t tgec_id; /* 0x000 Controller ID */
  83368. + uint32_t reserved001[1]; /* 0x004 */
  83369. + uint32_t command_config; /* 0x008 Control and configuration */
  83370. + uint32_t mac_addr_0; /* 0x00c Lower 32 bits of the MAC adr */
  83371. + uint32_t mac_addr_1; /* 0x010 Upper 16 bits of the MAC adr */
  83372. + uint32_t maxfrm; /* 0x014 Maximum frame length */
  83373. + uint32_t pause_quant; /* 0x018 Pause quanta */
  83374. + uint32_t rx_fifo_sections; /* 0x01c */
  83375. + uint32_t tx_fifo_sections; /* 0x020 */
  83376. + uint32_t rx_fifo_almost_f_e; /* 0x024 */
  83377. + uint32_t tx_fifo_almost_f_e; /* 0x028 */
  83378. + uint32_t hashtable_ctrl; /* 0x02c Hash table control*/
  83379. + uint32_t mdio_cfg_status; /* 0x030 */
  83380. + uint32_t mdio_command; /* 0x034 */
  83381. + uint32_t mdio_data; /* 0x038 */
  83382. + uint32_t mdio_regaddr; /* 0x03c */
  83383. + uint32_t status; /* 0x040 */
  83384. + uint32_t tx_ipg_len; /* 0x044 Transmitter inter-packet-gap */
  83385. + uint32_t mac_addr_2; /* 0x048 Lower 32 bits of 2nd MAC adr */
  83386. + uint32_t mac_addr_3; /* 0x04c Upper 16 bits of 2nd MAC adr */
  83387. + uint32_t rx_fifo_ptr_rd; /* 0x050 */
  83388. + uint32_t rx_fifo_ptr_wr; /* 0x054 */
  83389. + uint32_t tx_fifo_ptr_rd; /* 0x058 */
  83390. + uint32_t tx_fifo_ptr_wr; /* 0x05c */
  83391. + uint32_t imask; /* 0x060 Interrupt mask */
  83392. + uint32_t ievent; /* 0x064 Interrupt event */
  83393. + uint32_t udp_port; /* 0x068 Defines a UDP Port number */
  83394. + uint32_t type_1588v2; /* 0x06c Type field for 1588v2 */
  83395. + uint32_t reserved070[4]; /* 0x070 */
  83396. + /*10Ge Statistics Counter */
  83397. + uint32_t tfrm_u; /* 80 aFramesTransmittedOK */
  83398. + uint32_t tfrm_l; /* 84 aFramesTransmittedOK */
  83399. + uint32_t rfrm_u; /* 88 aFramesReceivedOK */
  83400. + uint32_t rfrm_l; /* 8c aFramesReceivedOK */
  83401. + uint32_t rfcs_u; /* 90 aFrameCheckSequenceErrors */
  83402. + uint32_t rfcs_l; /* 94 aFrameCheckSequenceErrors */
  83403. + uint32_t raln_u; /* 98 aAlignmentErrors */
  83404. + uint32_t raln_l; /* 9c aAlignmentErrors */
  83405. + uint32_t txpf_u; /* A0 aPAUSEMACCtrlFramesTransmitted */
  83406. + uint32_t txpf_l; /* A4 aPAUSEMACCtrlFramesTransmitted */
  83407. + uint32_t rxpf_u; /* A8 aPAUSEMACCtrlFramesReceived */
  83408. + uint32_t rxpf_l; /* Ac aPAUSEMACCtrlFramesReceived */
  83409. + uint32_t rlong_u; /* B0 aFrameTooLongErrors */
  83410. + uint32_t rlong_l; /* B4 aFrameTooLongErrors */
  83411. + uint32_t rflr_u; /* B8 aInRangeLengthErrors */
  83412. + uint32_t rflr_l; /* Bc aInRangeLengthErrors */
  83413. + uint32_t tvlan_u; /* C0 VLANTransmittedOK */
  83414. + uint32_t tvlan_l; /* C4 VLANTransmittedOK */
  83415. + uint32_t rvlan_u; /* C8 VLANReceivedOK */
  83416. + uint32_t rvlan_l; /* Cc VLANReceivedOK */
  83417. + uint32_t toct_u; /* D0 ifOutOctets */
  83418. + uint32_t toct_l; /* D4 ifOutOctets */
  83419. + uint32_t roct_u; /* D8 ifInOctets */
  83420. + uint32_t roct_l; /* Dc ifInOctets */
  83421. + uint32_t ruca_u; /* E0 ifInUcastPkts */
  83422. + uint32_t ruca_l; /* E4 ifInUcastPkts */
  83423. + uint32_t rmca_u; /* E8 ifInMulticastPkts */
  83424. + uint32_t rmca_l; /* Ec ifInMulticastPkts */
  83425. + uint32_t rbca_u; /* F0 ifInBroadcastPkts */
  83426. + uint32_t rbca_l; /* F4 ifInBroadcastPkts */
  83427. + uint32_t terr_u; /* F8 ifOutErrors */
  83428. + uint32_t terr_l; /* Fc ifOutErrors */
  83429. + uint32_t reserved100[2]; /* 100-108*/
  83430. + uint32_t tuca_u; /* 108 ifOutUcastPkts */
  83431. + uint32_t tuca_l; /* 10c ifOutUcastPkts */
  83432. + uint32_t tmca_u; /* 110 ifOutMulticastPkts */
  83433. + uint32_t tmca_l; /* 114 ifOutMulticastPkts */
  83434. + uint32_t tbca_u; /* 118 ifOutBroadcastPkts */
  83435. + uint32_t tbca_l; /* 11c ifOutBroadcastPkts */
  83436. + uint32_t rdrp_u; /* 120 etherStatsDropEvents */
  83437. + uint32_t rdrp_l; /* 124 etherStatsDropEvents */
  83438. + uint32_t reoct_u; /* 128 etherStatsOctets */
  83439. + uint32_t reoct_l; /* 12c etherStatsOctets */
  83440. + uint32_t rpkt_u; /* 130 etherStatsPkts */
  83441. + uint32_t rpkt_l; /* 134 etherStatsPkts */
  83442. + uint32_t trund_u; /* 138 etherStatsUndersizePkts */
  83443. + uint32_t trund_l; /* 13c etherStatsUndersizePkts */
  83444. + uint32_t r64_u; /* 140 etherStatsPkts64Octets */
  83445. + uint32_t r64_l; /* 144 etherStatsPkts64Octets */
  83446. + uint32_t r127_u; /* 148 etherStatsPkts65to127Octets */
  83447. + uint32_t r127_l; /* 14c etherStatsPkts65to127Octets */
  83448. + uint32_t r255_u; /* 150 etherStatsPkts128to255Octets */
  83449. + uint32_t r255_l; /* 154 etherStatsPkts128to255Octets */
  83450. + uint32_t r511_u; /* 158 etherStatsPkts256to511Octets */
  83451. + uint32_t r511_l; /* 15c etherStatsPkts256to511Octets */
  83452. + uint32_t r1023_u; /* 160 etherStatsPkts512to1023Octets */
  83453. + uint32_t r1023_l; /* 164 etherStatsPkts512to1023Octets */
  83454. + uint32_t r1518_u; /* 168 etherStatsPkts1024to1518Octets */
  83455. + uint32_t r1518_l; /* 16c etherStatsPkts1024to1518Octets */
  83456. + uint32_t r1519x_u; /* 170 etherStatsPkts1519toX */
  83457. + uint32_t r1519x_l; /* 174 etherStatsPkts1519toX */
  83458. + uint32_t trovr_u; /* 178 etherStatsOversizePkts */
  83459. + uint32_t trovr_l; /* 17c etherStatsOversizePkts */
  83460. + uint32_t trjbr_u; /* 180 etherStatsJabbers */
  83461. + uint32_t trjbr_l; /* 184 etherStatsJabbers */
  83462. + uint32_t trfrg_u; /* 188 etherStatsFragments */
  83463. + uint32_t trfrg_l; /* 18C etherStatsFragments */
  83464. + uint32_t rerr_u; /* 190 ifInErrors */
  83465. + uint32_t rerr_l; /* 194 ifInErrors */
  83466. +};
  83467. +
  83468. +/**
  83469. + * struct tgec_cfg - TGEC configuration
  83470. + *
  83471. + * @rx_error_discard: Receive Erroneous Frame Discard Enable. When set to 1
  83472. + * any frame received with an error is discarded in the
  83473. + * Core and not forwarded to the Client interface.
  83474. + * When set to 0 (Reset value), erroneous Frames are
  83475. + * forwarded to the Client interface with ff_rx_err
  83476. + * asserted.
  83477. + * @pause_ignore: Ignore Pause Frame Quanta. If set to 1 received pause
  83478. + * frames are ignored by the MAC. When set to 0
  83479. + * (Reset value) the transmit process is stopped for the
  83480. + * amount of time specified in the pause quanta received
  83481. + * within a pause frame.
  83482. + * @pause_forward_enable:
  83483. + * Terminate / Forward Pause Frames. If set to 1 pause
  83484. + * frames are forwarded to the user application. When set
  83485. + * to 0 (Reset value) pause frames are terminated and
  83486. + * discarded within the MAC.
  83487. + * @no_length_check_enable:
  83488. + * Payload Length Check Disable. When set to 0
  83489. + * (Reset value), the Core checks the frame's payload
  83490. + * length with the Frame Length/Type field, when set to 1
  83491. + * the payload length check is disabled.
  83492. + * @cmd_frame_enable: Enables reception of all command frames. When set to 1
  83493. + * all Command Frames are accepted, when set to 0
  83494. + * (Reset Value) only Pause Frames are accepted and all
  83495. + * other Command Frames are rejected.
  83496. + * @send_idle_enable: Force Idle Generation. When set to 1, the MAC
  83497. + * permanently sends XGMII Idle sequences even when faults
  83498. + * are received.
  83499. + * @wan_mode_enable: WAN Mode Enable. Sets WAN mode (1) or LAN mode
  83500. + * (0, default) of operation.
  83501. + * @promiscuous_mode_enable:
  83502. + * Enables MAC promiscuous operation. When set to 1, all
  83503. + * frames are received without any MAC address filtering,
  83504. + * when set to 0 (Reset value) Unicast Frames with a
  83505. + * destination address not matching the Core MAC Address
  83506. + * (MAC Address programmed in Registers MAC_ADDR_0 and
  83507. + * MAC_ADDR_1 or the MAC address programmed in Registers
  83508. + * MAC_ADDR_2 and MAC_ADDR_3) are rejected.
  83509. + * @tx_addr_ins_enable: Set Source MAC Address on Transmit. If set to 1 the
  83510. + * MAC overwrites the source MAC address received from the
  83511. + * Client Interface with one of the MAC addresses. If set
  83512. + * to 0 (Reset value), the source MAC address from the
  83513. + * Client Interface is transmitted unmodified to the line.
  83514. + * @loopback_enable: PHY Interface Loopback. When set to 1, the signal
  83515. + * loop_ena is set to '1', when set to 0 (Reset value)
  83516. + * the signal loop_ena is set to 0.
  83517. + * @lgth_check_nostdr: The Core interprets the Length/Type field differently
  83518. + * depending on the value of this Bit
  83519. + * @time_stamp_enable: This bit selects between enabling and disabling the
  83520. + * IEEE 1588 functionality. 1: IEEE 1588 is enabled
  83521. + * 0: IEEE 1588 is disabled
  83522. + * @max_frame_length: Maximum supported received frame length.
  83523. + * The 10GEC MAC supports reception of any frame size up
  83524. + * to 16,352 bytes (0x3FE0). Typical settings are
  83525. + * 0x05EE (1,518 bytes) for standard frames.
  83526. + * Default setting is 0x0600 (1,536 bytes).
  83527. + * Received frames that exceed this stated maximum
  83528. + * are truncated.
  83529. + * @pause_quant: Pause quanta value used with transmitted pause frames.
  83530. + * Each quanta represents a 512 bit-times.
  83531. + * @tx_ipg_length: Transmit Inter-Packet-Gap (IPG) value. A 6-bit value:
  83532. + * Depending on LAN or WAN mode of operation the value has
  83533. + * the following meaning: - LAN Mode: Number of octets in
  83534. + * steps of 4. Valid values are 8, 12, 16, ... 100. DIC is
  83535. + * fully supported (see 10.6.1 page 49) for any setting. A
  83536. + * default of 12 (reset value) must be set to conform to
  83537. + * IEEE802.3ae. Warning: When set to 8, PCS layers may not
  83538. + * be able to perform clock rate compensation. - WAN Mode:
  83539. + * Stretch factor. Valid values are 4..15. The stretch
  83540. + * factor is calculated as (value+1)*8. A default of 12
  83541. + * (reset value) must be set to conform to IEEE 802.3ae
  83542. + * (i.e. 13*8=104). A larger value shrinks the IPG
  83543. + * (increasing bandwidth).
  83544. + *
  83545. + * This structure contains basic TGEC configuration and must be passed to
  83546. + * fman_tgec_init() function. A default set of configuration values can be
  83547. + * obtained by calling fman_tgec_defconfig().
  83548. + */
  83549. +struct tgec_cfg {
  83550. + bool rx_error_discard;
  83551. + bool pause_ignore;
  83552. + bool pause_forward_enable;
  83553. + bool no_length_check_enable;
  83554. + bool cmd_frame_enable;
  83555. + bool send_idle_enable;
  83556. + bool wan_mode_enable;
  83557. + bool promiscuous_mode_enable;
  83558. + bool tx_addr_ins_enable;
  83559. + bool loopback_enable;
  83560. + bool lgth_check_nostdr;
  83561. + bool time_stamp_enable;
  83562. + uint16_t max_frame_length;
  83563. + uint16_t pause_quant;
  83564. + uint32_t tx_ipg_length;
  83565. + bool skip_fman11_workaround;
  83566. +};
  83567. +
  83568. +
  83569. +void fman_tgec_defconfig(struct tgec_cfg *cfg);
  83570. +
  83571. +/**
  83572. + * fman_tgec_init() - Init tgec hardware block
  83573. + * @regs: Pointer to tgec register block
  83574. + * @cfg: tgec configuration data
  83575. + * @exceptions_mask: initial exceptions mask
  83576. + *
  83577. + * This function initializes the tgec controller and applies its
  83578. + * basic configuration.
  83579. + *
  83580. + * Returns: 0 if successful, an error code otherwise.
  83581. + */
  83582. +
  83583. +int fman_tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg,
  83584. + uint32_t exception_mask);
  83585. +
  83586. +void fman_tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
  83587. +
  83588. +void fman_tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
  83589. +
  83590. +uint32_t fman_tgec_get_revision(struct tgec_regs *regs);
  83591. +
  83592. +void fman_tgec_set_mac_address(struct tgec_regs *regs, uint8_t *macaddr);
  83593. +
  83594. +void fman_tgec_set_promiscuous(struct tgec_regs *regs, bool val);
  83595. +
  83596. +/**
  83597. + * fman_tgec_reset_stat() - Completely resets all TGEC HW counters
  83598. + * @regs: Pointer to TGEC register block
  83599. + */
  83600. +void fman_tgec_reset_stat(struct tgec_regs *regs);
  83601. +
  83602. +/**
  83603. + * fman_tgec_get_counter() - Reads TGEC HW counters
  83604. + * @regs: Pointer to TGEC register block
  83605. + * @reg_name: Counter name according to the appropriate enum
  83606. + *
  83607. + * Returns: Required counter value
  83608. + */
  83609. +uint64_t fman_tgec_get_counter(struct tgec_regs *regs,
  83610. + enum tgec_counters reg_name);
  83611. +
  83612. +/**
  83613. + * fman_tgec_set_hash_table() - Sets the Hashtable Control Register
  83614. + * @regs: Pointer to TGEC register block
  83615. + * @value: Value to be written in Hashtable Control Register
  83616. + */
  83617. +void fman_tgec_set_hash_table(struct tgec_regs *regs, uint32_t value);
  83618. +
  83619. +/**
  83620. + * fman_tgec_set_tx_pause_frames() - Sets the Pause Quanta Register
  83621. + * @regs: Pointer to TGEC register block
  83622. + * @pause_time: Pause quanta value used with transmitted pause frames.
  83623. + * Each quanta represents a 512 bit-times
  83624. + */
  83625. +void fman_tgec_set_tx_pause_frames(struct tgec_regs *regs, uint16_t pause_time);
  83626. +
  83627. +/**
  83628. + * fman_tgec_set_rx_ignore_pause_frames() - Changes the policy WRT pause frames
  83629. + * @regs: Pointer to TGEC register block
  83630. + * @en: Ignore/Respond to pause frame quanta
  83631. + *
  83632. + * Sets the value of PAUSE_IGNORE field in the COMMAND_CONFIG Register
  83633. + * 0 - MAC stops transmit process for the duration specified
  83634. + * in the Pause frame quanta of a received Pause frame.
  83635. + * 1 - MAC ignores received Pause frames.
  83636. + */
  83637. +void fman_tgec_set_rx_ignore_pause_frames(struct tgec_regs *regs, bool en);
  83638. +
  83639. +/**
  83640. + * fman_tgec_enable_1588_time_stamp() - change timestamp functionality
  83641. + * @regs: Pointer to TGEC register block
  83642. + * @en: enable/disable timestamp functionality
  83643. + *
  83644. + * Sets the value of EN_TIMESTAMP field in the COMMAND_CONFIG Register
  83645. + * IEEE 1588 timestamp functionality control:
  83646. + * 0 disabled, 1 enabled
  83647. + */
  83648. +
  83649. +void fman_tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en);
  83650. +
  83651. +uint32_t fman_tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask);
  83652. +
  83653. +void fman_tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask);
  83654. +
  83655. +uint32_t fman_tgec_get_interrupt_mask(struct tgec_regs *regs);
  83656. +
  83657. +/**
  83658. + * fman_tgec_add_addr_in_paddr() - Sets additional exact match MAC address
  83659. + * @regs: Pointer to TGEC register block
  83660. + * @addr_ptr: Pointer to 6-byte array containing the MAC address
  83661. + *
  83662. + * Sets the additional station MAC address
  83663. + */
  83664. +void fman_tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *addr_ptr);
  83665. +
  83666. +void fman_tgec_clear_addr_in_paddr(struct tgec_regs *regs);
  83667. +
  83668. +void fman_tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
  83669. +
  83670. +void fman_tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
  83671. +
  83672. +void fman_tgec_reset_filter_table(struct tgec_regs *regs);
  83673. +
  83674. +void fman_tgec_set_hash_table_entry(struct tgec_regs *regs, uint32_t crc);
  83675. +
  83676. +
  83677. +/**
  83678. + * fman_tgec_get_max_frame_len() - Returns the maximum frame length value
  83679. + * @regs: Pointer to TGEC register block
  83680. + */
  83681. +uint16_t fman_tgec_get_max_frame_len(struct tgec_regs *regs);
  83682. +
  83683. +/**
  83684. + * fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007() - Initialize the
  83685. + * main tgec configuration parameters
  83686. + * @regs: Pointer to TGEC register block
  83687. + *
  83688. + * TODO
  83689. + */
  83690. +void fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(struct tgec_regs
  83691. + *regs);
  83692. +
  83693. +
  83694. +#endif /* __FSL_FMAN_TGEC_H */
  83695. --- /dev/null
  83696. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/dpaa_integration_ext.h
  83697. @@ -0,0 +1,290 @@
  83698. +/*
  83699. + * Copyright 2012 Freescale Semiconductor Inc.
  83700. + *
  83701. + * Redistribution and use in source and binary forms, with or without
  83702. + * modification, are permitted provided that the following conditions are met:
  83703. + * * Redistributions of source code must retain the above copyright
  83704. + * notice, this list of conditions and the following disclaimer.
  83705. + * * Redistributions in binary form must reproduce the above copyright
  83706. + * notice, this list of conditions and the following disclaimer in the
  83707. + * documentation and/or other materials provided with the distribution.
  83708. + * * Neither the name of Freescale Semiconductor nor the
  83709. + * names of its contributors may be used to endorse or promote products
  83710. + * derived from this software without specific prior written permission.
  83711. + *
  83712. + *
  83713. + * ALTERNATIVELY, this software may be distributed under the terms of the
  83714. + * GNU General Public License ("GPL") as published by the Free Software
  83715. + * Foundation, either version 2 of that License or (at your option) any
  83716. + * later version.
  83717. + *
  83718. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  83719. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  83720. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  83721. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  83722. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  83723. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  83724. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  83725. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  83726. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  83727. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83728. + */
  83729. +
  83730. +/**
  83731. +
  83732. + @File dpaa_integration_ext.h
  83733. +
  83734. + @Description T4240 FM external definitions and structures.
  83735. +*//***************************************************************************/
  83736. +#ifndef __DPAA_INTEGRATION_EXT_H
  83737. +#define __DPAA_INTEGRATION_EXT_H
  83738. +
  83739. +#include "std_ext.h"
  83740. +
  83741. +
  83742. +#define DPAA_VERSION 11
  83743. +
  83744. +/**************************************************************************//**
  83745. + @Description DPAA SW Portals Enumeration.
  83746. +*//***************************************************************************/
  83747. +typedef enum
  83748. +{
  83749. + e_DPAA_SWPORTAL0 = 0,
  83750. + e_DPAA_SWPORTAL1,
  83751. + e_DPAA_SWPORTAL2,
  83752. + e_DPAA_SWPORTAL3,
  83753. + e_DPAA_SWPORTAL4,
  83754. + e_DPAA_SWPORTAL5,
  83755. + e_DPAA_SWPORTAL6,
  83756. + e_DPAA_SWPORTAL7,
  83757. + e_DPAA_SWPORTAL8,
  83758. + e_DPAA_SWPORTAL9,
  83759. + e_DPAA_SWPORTAL10,
  83760. + e_DPAA_SWPORTAL11,
  83761. + e_DPAA_SWPORTAL12,
  83762. + e_DPAA_SWPORTAL13,
  83763. + e_DPAA_SWPORTAL14,
  83764. + e_DPAA_SWPORTAL15,
  83765. + e_DPAA_SWPORTAL16,
  83766. + e_DPAA_SWPORTAL17,
  83767. + e_DPAA_SWPORTAL18,
  83768. + e_DPAA_SWPORTAL19,
  83769. + e_DPAA_SWPORTAL20,
  83770. + e_DPAA_SWPORTAL21,
  83771. + e_DPAA_SWPORTAL22,
  83772. + e_DPAA_SWPORTAL23,
  83773. + e_DPAA_SWPORTAL24,
  83774. + e_DPAA_SWPORTAL_DUMMY_LAST
  83775. +} e_DpaaSwPortal;
  83776. +
  83777. +/**************************************************************************//**
  83778. + @Description DPAA Direct Connect Portals Enumeration.
  83779. +*//***************************************************************************/
  83780. +typedef enum
  83781. +{
  83782. + e_DPAA_DCPORTAL0 = 0,
  83783. + e_DPAA_DCPORTAL1,
  83784. + e_DPAA_DCPORTAL2,
  83785. + e_DPAA_DCPORTAL_DUMMY_LAST
  83786. +} e_DpaaDcPortal;
  83787. +
  83788. +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST
  83789. +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST
  83790. +
  83791. +/*****************************************************************************
  83792. + QMan INTEGRATION-SPECIFIC DEFINITIONS
  83793. +******************************************************************************/
  83794. +#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */
  83795. +#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */
  83796. +#define QM_MAX_NUM_OF_CGS 256 /**< Congestion groups number */
  83797. +#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE)
  83798. + /**< FQIDs range - 24 bits */
  83799. +
  83800. +/**************************************************************************//**
  83801. + @Description Work Queue Channel assignments in QMan.
  83802. +*//***************************************************************************/
  83803. +typedef enum
  83804. +{
  83805. + e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0, /**< Dedicated channels serviced by software portals 0 to 24 */
  83806. + e_QM_FQ_CHANNEL_SWPORTAL1,
  83807. + e_QM_FQ_CHANNEL_SWPORTAL2,
  83808. + e_QM_FQ_CHANNEL_SWPORTAL3,
  83809. + e_QM_FQ_CHANNEL_SWPORTAL4,
  83810. + e_QM_FQ_CHANNEL_SWPORTAL5,
  83811. + e_QM_FQ_CHANNEL_SWPORTAL6,
  83812. + e_QM_FQ_CHANNEL_SWPORTAL7,
  83813. + e_QM_FQ_CHANNEL_SWPORTAL8,
  83814. + e_QM_FQ_CHANNEL_SWPORTAL9,
  83815. + e_QM_FQ_CHANNEL_SWPORTAL10,
  83816. + e_QM_FQ_CHANNEL_SWPORTAL11,
  83817. + e_QM_FQ_CHANNEL_SWPORTAL12,
  83818. + e_QM_FQ_CHANNEL_SWPORTAL13,
  83819. + e_QM_FQ_CHANNEL_SWPORTAL14,
  83820. + e_QM_FQ_CHANNEL_SWPORTAL15,
  83821. + e_QM_FQ_CHANNEL_SWPORTAL16,
  83822. + e_QM_FQ_CHANNEL_SWPORTAL17,
  83823. + e_QM_FQ_CHANNEL_SWPORTAL18,
  83824. + e_QM_FQ_CHANNEL_SWPORTAL19,
  83825. + e_QM_FQ_CHANNEL_SWPORTAL20,
  83826. + e_QM_FQ_CHANNEL_SWPORTAL21,
  83827. + e_QM_FQ_CHANNEL_SWPORTAL22,
  83828. + e_QM_FQ_CHANNEL_SWPORTAL23,
  83829. + e_QM_FQ_CHANNEL_SWPORTAL24,
  83830. +
  83831. + e_QM_FQ_CHANNEL_POOL1 = 0x401, /**< Pool channels that can be serviced by any of the software portals */
  83832. + e_QM_FQ_CHANNEL_POOL2,
  83833. + e_QM_FQ_CHANNEL_POOL3,
  83834. + e_QM_FQ_CHANNEL_POOL4,
  83835. + e_QM_FQ_CHANNEL_POOL5,
  83836. + e_QM_FQ_CHANNEL_POOL6,
  83837. + e_QM_FQ_CHANNEL_POOL7,
  83838. + e_QM_FQ_CHANNEL_POOL8,
  83839. + e_QM_FQ_CHANNEL_POOL9,
  83840. + e_QM_FQ_CHANNEL_POOL10,
  83841. + e_QM_FQ_CHANNEL_POOL11,
  83842. + e_QM_FQ_CHANNEL_POOL12,
  83843. + e_QM_FQ_CHANNEL_POOL13,
  83844. + e_QM_FQ_CHANNEL_POOL14,
  83845. + e_QM_FQ_CHANNEL_POOL15,
  83846. +
  83847. + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800, /**< Dedicated channels serviced by Direct Connect Portal 0:
  83848. + connected to FMan 0; assigned in incrementing order to
  83849. + each sub-portal (SP) in the portal */
  83850. + e_QM_FQ_CHANNEL_FMAN0_SP1,
  83851. + e_QM_FQ_CHANNEL_FMAN0_SP2,
  83852. + e_QM_FQ_CHANNEL_FMAN0_SP3,
  83853. + e_QM_FQ_CHANNEL_FMAN0_SP4,
  83854. + e_QM_FQ_CHANNEL_FMAN0_SP5,
  83855. + e_QM_FQ_CHANNEL_FMAN0_SP6,
  83856. + e_QM_FQ_CHANNEL_FMAN0_SP7,
  83857. + e_QM_FQ_CHANNEL_FMAN0_SP8,
  83858. + e_QM_FQ_CHANNEL_FMAN0_SP9,
  83859. + e_QM_FQ_CHANNEL_FMAN0_SP10,
  83860. + e_QM_FQ_CHANNEL_FMAN0_SP11,
  83861. + e_QM_FQ_CHANNEL_FMAN0_SP12,
  83862. + e_QM_FQ_CHANNEL_FMAN0_SP13,
  83863. + e_QM_FQ_CHANNEL_FMAN0_SP14,
  83864. + e_QM_FQ_CHANNEL_FMAN0_SP15,
  83865. +
  83866. + e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820, /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */
  83867. + e_QM_FQ_CHANNEL_RMAN_SP1,
  83868. +
  83869. + e_QM_FQ_CHANNEL_CAAM = 0x840 /**< Dedicated channel serviced by Direct Connect Portal 2:
  83870. + connected to SEC */
  83871. +} e_QmFQChannel;
  83872. +
  83873. +/*****************************************************************************
  83874. + BMan INTEGRATION-SPECIFIC DEFINITIONS
  83875. +******************************************************************************/
  83876. +#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */
  83877. +
  83878. +/*****************************************************************************
  83879. + SEC INTEGRATION-SPECIFIC DEFINITIONS
  83880. +******************************************************************************/
  83881. +#define SEC_NUM_OF_DECOS 3
  83882. +#define SEC_ALL_DECOS_MASK 0x00000003
  83883. +
  83884. +
  83885. +/*****************************************************************************
  83886. + FM INTEGRATION-SPECIFIC DEFINITIONS
  83887. +******************************************************************************/
  83888. +#define INTG_MAX_NUM_OF_FM 2
  83889. +/* Ports defines */
  83890. +#define FM_MAX_NUM_OF_1G_MACS 6
  83891. +#define FM_MAX_NUM_OF_10G_MACS 2
  83892. +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
  83893. +#define FM_MAX_NUM_OF_OH_PORTS 6
  83894. +
  83895. +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS
  83896. +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS
  83897. +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
  83898. +
  83899. +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS
  83900. +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS
  83901. +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
  83902. +
  83903. +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 4 /**< Number of external BM pools per Rx port */
  83904. +#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */
  83905. +#define FM_MAX_NUM_OF_SUB_PORTALS 16
  83906. +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0
  83907. +
  83908. +#define FM_VSP_MAX_NUM_OF_ENTRIES 64
  83909. +#define FM_MAX_NUM_OF_PFC_PRIORITIES 8
  83910. +
  83911. +/* RAMs defines */
  83912. +#define FM_MURAM_SIZE (384 * KILOBYTE)
  83913. +#define FM_IRAM_SIZE(major, minor) (64 * KILOBYTE)
  83914. +#define FM_NUM_OF_CTRL 4
  83915. +
  83916. +/* PCD defines */
  83917. +#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */
  83918. +#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */
  83919. +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */
  83920. +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000600 /**< Number of bytes saved for patches */
  83921. +#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */
  83922. +
  83923. +/* RTC defines */
  83924. +#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */
  83925. +#define FM_RTC_NUM_OF_PERIODIC_PULSES 3 /**< RTC number of periodic pulses */
  83926. +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */
  83927. +
  83928. +/* QMI defines */
  83929. +#define QMI_MAX_NUM_OF_TNUMS 64
  83930. +#define QMI_DEF_TNUMS_THRESH 32
  83931. +/* FPM defines */
  83932. +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4
  83933. +
  83934. +/* DMA defines */
  83935. +#define DMA_THRESH_MAX_COMMQ 83
  83936. +#define DMA_THRESH_MAX_BUF 127
  83937. +
  83938. +/* BMI defines */
  83939. +#define BMI_MAX_NUM_OF_TASKS 128
  83940. +#define BMI_MAX_NUM_OF_DMAS 84
  83941. +
  83942. +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)
  83943. +#define PORT_MAX_WEIGHT 16
  83944. +
  83945. +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE
  83946. +
  83947. +/* Unique T4240 */
  83948. +#define FM_OP_OPEN_DMA_MIN_LIMIT
  83949. +#define FM_NO_RESTRICT_ON_ACCESS_RSRC
  83950. +#define FM_NO_OP_OBSERVED_POOLS
  83951. +#define FM_FRAME_END_PARAMS_FOR_OP
  83952. +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
  83953. +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION
  83954. +
  83955. +#define FM_NO_GUARANTEED_RESET_VALUES
  83956. +
  83957. +/* FM errata */
  83958. +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
  83959. +#define FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127
  83960. +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
  83961. +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
  83962. +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
  83963. +
  83964. +#define FM_BCB_ERRATA_BMI_SW001
  83965. +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
  83966. +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */
  83967. +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */
  83968. +
  83969. +/*****************************************************************************
  83970. + RMan INTEGRATION-SPECIFIC DEFINITIONS
  83971. +******************************************************************************/
  83972. +#define RM_MAX_NUM_OF_IB 4 /**< Number of inbound blocks */
  83973. +#define RM_NUM_OF_IBCU 8 /**< NUmber of classification units in an inbound block */
  83974. +
  83975. +/* RMan erratas */
  83976. +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756
  83977. +
  83978. +/*****************************************************************************
  83979. + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
  83980. +******************************************************************************/
  83981. +#define NUM_OF_RX_SC 16
  83982. +#define NUM_OF_TX_SC 16
  83983. +
  83984. +#define NUM_OF_SA_PER_RX_SC 2
  83985. +#define NUM_OF_SA_PER_TX_SC 2
  83986. +
  83987. +#endif /* __DPAA_INTEGRATION_EXT_H */
  83988. --- /dev/null
  83989. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_ext.h
  83990. @@ -0,0 +1,71 @@
  83991. +/*
  83992. + * Copyright 2012 Freescale Semiconductor Inc.
  83993. + *
  83994. + * Redistribution and use in source and binary forms, with or without
  83995. + * modification, are permitted provided that the following conditions are met:
  83996. + * * Redistributions of source code must retain the above copyright
  83997. + * notice, this list of conditions and the following disclaimer.
  83998. + * * Redistributions in binary form must reproduce the above copyright
  83999. + * notice, this list of conditions and the following disclaimer in the
  84000. + * documentation and/or other materials provided with the distribution.
  84001. + * * Neither the name of Freescale Semiconductor nor the
  84002. + * names of its contributors may be used to endorse or promote products
  84003. + * derived from this software without specific prior written permission.
  84004. + *
  84005. + *
  84006. + * ALTERNATIVELY, this software may be distributed under the terms of the
  84007. + * GNU General Public License ("GPL") as published by the Free Software
  84008. + * Foundation, either version 2 of that License or (at your option) any
  84009. + * later version.
  84010. + *
  84011. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  84012. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  84013. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  84014. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  84015. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  84016. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  84017. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  84018. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  84019. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  84020. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  84021. + */
  84022. +
  84023. +/**************************************************************************//**
  84024. +
  84025. + @File part_ext.h
  84026. +
  84027. + @Description Definitions for the part (integration) module.
  84028. +*//***************************************************************************/
  84029. +
  84030. +#ifndef __PART_EXT_H
  84031. +#define __PART_EXT_H
  84032. +
  84033. +#include "std_ext.h"
  84034. +#include "part_integration_ext.h"
  84035. +
  84036. +#if !(defined(P1023) || \
  84037. + defined(P2041) || \
  84038. + defined(P3041) || \
  84039. + defined(P4080) || \
  84040. + defined(P5020) || \
  84041. + defined(P5040) || \
  84042. + defined(B4860) || \
  84043. + defined(T4240))
  84044. +#error "unable to proceed without chip-definition"
  84045. +#endif
  84046. +
  84047. +
  84048. +/**************************************************************************//*
  84049. + @Description Part data structure - must be contained in any integration
  84050. + data structure.
  84051. +*//***************************************************************************/
  84052. +typedef struct t_Part
  84053. +{
  84054. + uintptr_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
  84055. + /**< Returns the address of the module's memory map base. */
  84056. + e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
  84057. + /**< Returns the module's ID according to its memory map base. */
  84058. +} t_Part;
  84059. +
  84060. +
  84061. +#endif /* __PART_EXT_H */
  84062. --- /dev/null
  84063. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3H/part_integration_ext.h
  84064. @@ -0,0 +1,304 @@
  84065. +/*
  84066. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  84067. + *
  84068. + * Redistribution and use in source and binary forms, with or without
  84069. + * modification, are permitted provided that the following conditions are met:
  84070. + * * Redistributions of source code must retain the above copyright
  84071. + * notice, this list of conditions and the following disclaimer.
  84072. + * * Redistributions in binary form must reproduce the above copyright
  84073. + * notice, this list of conditions and the following disclaimer in the
  84074. + * documentation and/or other materials provided with the distribution.
  84075. + * * Neither the name of Freescale Semiconductor nor the
  84076. + * names of its contributors may be used to endorse or promote products
  84077. + * derived from this software without specific prior written permission.
  84078. + *
  84079. + *
  84080. + * ALTERNATIVELY, this software may be distributed under the terms of the
  84081. + * GNU General Public License ("GPL") as published by the Free Software
  84082. + * Foundation, either version 2 of that License or (at your option) any
  84083. + * later version.
  84084. + *
  84085. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  84086. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  84087. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  84088. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  84089. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  84090. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  84091. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  84092. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  84093. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  84094. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  84095. + */
  84096. +
  84097. +/**
  84098. +
  84099. + @File part_integration_ext.h
  84100. +
  84101. + @Description T4240 external definitions and structures.
  84102. +*//***************************************************************************/
  84103. +#ifndef __PART_INTEGRATION_EXT_H
  84104. +#define __PART_INTEGRATION_EXT_H
  84105. +
  84106. +#include "std_ext.h"
  84107. +#include "ddr_std_ext.h"
  84108. +#include "enet_ext.h"
  84109. +#include "dpaa_integration_ext.h"
  84110. +
  84111. +
  84112. +/**************************************************************************//**
  84113. + @Group T4240_chip_id T4240 Application Programming Interface
  84114. +
  84115. + @Description T4240 Chip functions,definitions and enums.
  84116. +
  84117. + @{
  84118. +*//***************************************************************************/
  84119. +
  84120. +#define CORE_E6500
  84121. +
  84122. +#define INTG_MAX_NUM_OF_CORES 24
  84123. +
  84124. +
  84125. +/**************************************************************************//**
  84126. + @Description Module types.
  84127. +*//***************************************************************************/
  84128. +typedef enum e_ModuleId
  84129. +{
  84130. + e_MODULE_ID_DUART_1 = 0,
  84131. + e_MODULE_ID_DUART_2,
  84132. + e_MODULE_ID_DUART_3,
  84133. + e_MODULE_ID_DUART_4,
  84134. + e_MODULE_ID_LAW,
  84135. + e_MODULE_ID_IFC,
  84136. + e_MODULE_ID_PAMU,
  84137. + e_MODULE_ID_QM, /**< Queue manager module */
  84138. + e_MODULE_ID_BM, /**< Buffer manager module */
  84139. + e_MODULE_ID_QM_CE_PORTAL_0,
  84140. + e_MODULE_ID_QM_CI_PORTAL_0,
  84141. + e_MODULE_ID_QM_CE_PORTAL_1,
  84142. + e_MODULE_ID_QM_CI_PORTAL_1,
  84143. + e_MODULE_ID_QM_CE_PORTAL_2,
  84144. + e_MODULE_ID_QM_CI_PORTAL_2,
  84145. + e_MODULE_ID_QM_CE_PORTAL_3,
  84146. + e_MODULE_ID_QM_CI_PORTAL_3,
  84147. + e_MODULE_ID_QM_CE_PORTAL_4,
  84148. + e_MODULE_ID_QM_CI_PORTAL_4,
  84149. + e_MODULE_ID_QM_CE_PORTAL_5,
  84150. + e_MODULE_ID_QM_CI_PORTAL_5,
  84151. + e_MODULE_ID_QM_CE_PORTAL_6,
  84152. + e_MODULE_ID_QM_CI_PORTAL_6,
  84153. + e_MODULE_ID_QM_CE_PORTAL_7,
  84154. + e_MODULE_ID_QM_CI_PORTAL_7,
  84155. + e_MODULE_ID_QM_CE_PORTAL_8,
  84156. + e_MODULE_ID_QM_CI_PORTAL_8,
  84157. + e_MODULE_ID_QM_CE_PORTAL_9,
  84158. + e_MODULE_ID_QM_CI_PORTAL_9,
  84159. + e_MODULE_ID_BM_CE_PORTAL_0,
  84160. + e_MODULE_ID_BM_CI_PORTAL_0,
  84161. + e_MODULE_ID_BM_CE_PORTAL_1,
  84162. + e_MODULE_ID_BM_CI_PORTAL_1,
  84163. + e_MODULE_ID_BM_CE_PORTAL_2,
  84164. + e_MODULE_ID_BM_CI_PORTAL_2,
  84165. + e_MODULE_ID_BM_CE_PORTAL_3,
  84166. + e_MODULE_ID_BM_CI_PORTAL_3,
  84167. + e_MODULE_ID_BM_CE_PORTAL_4,
  84168. + e_MODULE_ID_BM_CI_PORTAL_4,
  84169. + e_MODULE_ID_BM_CE_PORTAL_5,
  84170. + e_MODULE_ID_BM_CI_PORTAL_5,
  84171. + e_MODULE_ID_BM_CE_PORTAL_6,
  84172. + e_MODULE_ID_BM_CI_PORTAL_6,
  84173. + e_MODULE_ID_BM_CE_PORTAL_7,
  84174. + e_MODULE_ID_BM_CI_PORTAL_7,
  84175. + e_MODULE_ID_BM_CE_PORTAL_8,
  84176. + e_MODULE_ID_BM_CI_PORTAL_8,
  84177. + e_MODULE_ID_BM_CE_PORTAL_9,
  84178. + e_MODULE_ID_BM_CI_PORTAL_9,
  84179. + e_MODULE_ID_FM, /**< Frame manager module */
  84180. + e_MODULE_ID_FM_RTC, /**< FM Real-Time-Clock */
  84181. + e_MODULE_ID_FM_MURAM, /**< FM Multi-User-RAM */
  84182. + e_MODULE_ID_FM_BMI, /**< FM BMI block */
  84183. + e_MODULE_ID_FM_QMI, /**< FM QMI block */
  84184. + e_MODULE_ID_FM_PARSER, /**< FM parser block */
  84185. + e_MODULE_ID_FM_PORT_HO1, /**< FM Host-command/offline-parsing port block */
  84186. + e_MODULE_ID_FM_PORT_HO2, /**< FM Host-command/offline-parsing port block */
  84187. + e_MODULE_ID_FM_PORT_HO3, /**< FM Host-command/offline-parsing port block */
  84188. + e_MODULE_ID_FM_PORT_HO4, /**< FM Host-command/offline-parsing port block */
  84189. + e_MODULE_ID_FM_PORT_HO5, /**< FM Host-command/offline-parsing port block */
  84190. + e_MODULE_ID_FM_PORT_HO6, /**< FM Host-command/offline-parsing port block */
  84191. + e_MODULE_ID_FM_PORT_HO7, /**< FM Host-command/offline-parsing port block */
  84192. + e_MODULE_ID_FM_PORT_1GRx1, /**< FM Rx 1G MAC port block */
  84193. + e_MODULE_ID_FM_PORT_1GRx2, /**< FM Rx 1G MAC port block */
  84194. + e_MODULE_ID_FM_PORT_1GRx3, /**< FM Rx 1G MAC port block */
  84195. + e_MODULE_ID_FM_PORT_1GRx4, /**< FM Rx 1G MAC port block */
  84196. + e_MODULE_ID_FM_PORT_1GRx5, /**< FM Rx 1G MAC port block */
  84197. + e_MODULE_ID_FM_PORT_1GRx6, /**< FM Rx 1G MAC port block */
  84198. + e_MODULE_ID_FM_PORT_10GRx1, /**< FM Rx 10G MAC port block */
  84199. + e_MODULE_ID_FM_PORT_10GRx2, /**< FM Rx 10G MAC port block */
  84200. + e_MODULE_ID_FM_PORT_1GTx1, /**< FM Tx 1G MAC port block */
  84201. + e_MODULE_ID_FM_PORT_1GTx2, /**< FM Tx 1G MAC port block */
  84202. + e_MODULE_ID_FM_PORT_1GTx3, /**< FM Tx 1G MAC port block */
  84203. + e_MODULE_ID_FM_PORT_1GTx4, /**< FM Tx 1G MAC port block */
  84204. + e_MODULE_ID_FM_PORT_1GTx5, /**< FM Tx 1G MAC port block */
  84205. + e_MODULE_ID_FM_PORT_1GTx6, /**< FM Tx 1G MAC port block */
  84206. + e_MODULE_ID_FM_PORT_10GTx1, /**< FM Tx 10G MAC port block */
  84207. + e_MODULE_ID_FM_PORT_10GTx2, /**< FM Tx 10G MAC port block */
  84208. + e_MODULE_ID_FM_PLCR, /**< FM Policer */
  84209. + e_MODULE_ID_FM_KG, /**< FM Keygen */
  84210. + e_MODULE_ID_FM_DMA, /**< FM DMA */
  84211. + e_MODULE_ID_FM_FPM, /**< FM FPM */
  84212. + e_MODULE_ID_FM_IRAM, /**< FM Instruction-RAM */
  84213. + e_MODULE_ID_FM_1GMDIO, /**< FM 1G MDIO MAC */
  84214. + e_MODULE_ID_FM_10GMDIO, /**< FM 10G MDIO */
  84215. + e_MODULE_ID_FM_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
  84216. + e_MODULE_ID_FM_1GMAC1, /**< FM 1G MAC #1 */
  84217. + e_MODULE_ID_FM_1GMAC2, /**< FM 1G MAC #2 */
  84218. + e_MODULE_ID_FM_1GMAC3, /**< FM 1G MAC #3 */
  84219. + e_MODULE_ID_FM_1GMAC4, /**< FM 1G MAC #4 */
  84220. + e_MODULE_ID_FM_1GMAC5, /**< FM 1G MAC #5 */
  84221. + e_MODULE_ID_FM_1GMAC6, /**< FM 1G MAC #6 */
  84222. + e_MODULE_ID_FM_10GMAC1, /**< FM 10G MAC */
  84223. + e_MODULE_ID_FM_10GMAC2, /**< FM 10G MAC */
  84224. +
  84225. + e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */
  84226. + e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */
  84227. + e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */
  84228. + e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */
  84229. + e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */
  84230. + e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */
  84231. + e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */
  84232. + e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */
  84233. + e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */
  84234. + e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */
  84235. + e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */
  84236. + e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */
  84237. +
  84238. + e_MODULE_ID_PIC, /**< PIC */
  84239. + e_MODULE_ID_GPIO, /**< GPIO */
  84240. + e_MODULE_ID_SERDES, /**< SERDES */
  84241. + e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */
  84242. + e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */
  84243. +
  84244. + e_MODULE_ID_SRIO_PORTS, /**< RapidIO controller */
  84245. +
  84246. + e_MODULE_ID_DUMMY_LAST
  84247. +} e_ModuleId;
  84248. +
  84249. +#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST
  84250. +
  84251. +#if 0 /* using unified values */
  84252. +/*****************************************************************************
  84253. + INTEGRATION-SPECIFIC MODULE CODES
  84254. +******************************************************************************/
  84255. +#define MODULE_UNKNOWN 0x00000000
  84256. +#define MODULE_MEM 0x00010000
  84257. +#define MODULE_MM 0x00020000
  84258. +#define MODULE_CORE 0x00030000
  84259. +#define MODULE_T4240 0x00040000
  84260. +#define MODULE_T4240_PLATFORM 0x00050000
  84261. +#define MODULE_PM 0x00060000
  84262. +#define MODULE_MMU 0x00070000
  84263. +#define MODULE_PIC 0x00080000
  84264. +#define MODULE_CPC 0x00090000
  84265. +#define MODULE_DUART 0x000a0000
  84266. +#define MODULE_SERDES 0x000b0000
  84267. +#define MODULE_PIO 0x000c0000
  84268. +#define MODULE_QM 0x000d0000
  84269. +#define MODULE_BM 0x000e0000
  84270. +#define MODULE_SEC 0x000f0000
  84271. +#define MODULE_LAW 0x00100000
  84272. +#define MODULE_LBC 0x00110000
  84273. +#define MODULE_PAMU 0x00120000
  84274. +#define MODULE_FM 0x00130000
  84275. +#define MODULE_FM_MURAM 0x00140000
  84276. +#define MODULE_FM_PCD 0x00150000
  84277. +#define MODULE_FM_RTC 0x00160000
  84278. +#define MODULE_FM_MAC 0x00170000
  84279. +#define MODULE_FM_PORT 0x00180000
  84280. +#define MODULE_FM_SP 0x00190000
  84281. +#define MODULE_DPA_PORT 0x001a0000
  84282. +#define MODULE_MII 0x001b0000
  84283. +#define MODULE_I2C 0x001c0000
  84284. +#define MODULE_DMA 0x001d0000
  84285. +#define MODULE_DDR 0x001e0000
  84286. +#define MODULE_ESPI 0x001f0000
  84287. +#define MODULE_DPAA_IPSEC 0x00200000
  84288. +#endif /* using unified values */
  84289. +
  84290. +/*****************************************************************************
  84291. + PAMU INTEGRATION-SPECIFIC DEFINITIONS
  84292. +******************************************************************************/
  84293. +#define PAMU_NUM_OF_PARTITIONS 4
  84294. +
  84295. +/*****************************************************************************
  84296. + LAW INTEGRATION-SPECIFIC DEFINITIONS
  84297. +******************************************************************************/
  84298. +#define LAW_NUM_OF_WINDOWS 32
  84299. +#define LAW_MIN_WINDOW_SIZE 0x0000000000001000LL /**< 4 Kbytes */
  84300. +#define LAW_MAX_WINDOW_SIZE 0x0000010000000000LL /**< 1 Tbytes for 40-bit address space */
  84301. +
  84302. +
  84303. +/*****************************************************************************
  84304. + LBC INTEGRATION-SPECIFIC DEFINITIONS
  84305. +******************************************************************************/
  84306. +/**************************************************************************//**
  84307. + @Group lbc_exception_grp LBC Exception Unit
  84308. +
  84309. + @Description LBC Exception unit API functions, definitions and enums
  84310. +
  84311. + @{
  84312. +*//***************************************************************************/
  84313. +
  84314. +/**************************************************************************//**
  84315. + @Anchor lbc_exbm
  84316. +
  84317. + @Collection LBC Errors Bit Mask
  84318. +
  84319. + These errors are reported through the exceptions callback..
  84320. + The values can be or'ed in any combination in the errors mask
  84321. + parameter of the errors report structure.
  84322. +
  84323. + These errors can also be passed as a bit-mask to
  84324. + LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
  84325. + for enabling or disabling error checking.
  84326. + @{
  84327. +*//***************************************************************************/
  84328. +#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */
  84329. +#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */
  84330. +#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */
  84331. +#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */
  84332. +
  84333. +#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
  84334. + LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT)
  84335. + /**< All possible errors */
  84336. +/* @} */
  84337. +/** @} */ /* end of lbc_exception_grp group */
  84338. +
  84339. +#define LBC_INCORRECT_ERROR_REPORT_ERRATA
  84340. +
  84341. +#define LBC_NUM_OF_BANKS 8
  84342. +#define LBC_MAX_CS_SIZE 0x0000000100000000LL /* Up to 4G memory block size */
  84343. +#define LBC_PARITY_SUPPORT
  84344. +#define LBC_ADDRESS_HOLD_TIME_CTRL
  84345. +#define LBC_HIGH_CLK_DIVIDERS
  84346. +#define LBC_FCM_AVAILABLE
  84347. +
  84348. +/*****************************************************************************
  84349. + GPIO INTEGRATION-SPECIFIC DEFINITIONS
  84350. +******************************************************************************/
  84351. +#define GPIO_PORT_OFFSET_0x1000
  84352. +
  84353. +#define GPIO_NUM_OF_PORTS 3 /**< Number of ports in GPIO module;
  84354. + Each port contains up to 32 I/O pins. */
  84355. +
  84356. +#define GPIO_VALID_PIN_MASKS \
  84357. + { /* Port A */ 0xFFFFFFFF, \
  84358. + /* Port B */ 0xFFFFFFFF, \
  84359. + /* Port C */ 0xFFFFFFFF }
  84360. +
  84361. +#define GPIO_VALID_INTR_MASKS \
  84362. + { /* Port A */ 0xFFFFFFFF, \
  84363. + /* Port B */ 0xFFFFFFFF, \
  84364. + /* Port C */ 0xFFFFFFFF }
  84365. +
  84366. +
  84367. +
  84368. +#endif /* __PART_INTEGRATION_EXT_H */
  84369. --- /dev/null
  84370. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/dpaa_integration_ext.h
  84371. @@ -0,0 +1,292 @@
  84372. +/*
  84373. + * Copyright 2012 Freescale Semiconductor Inc.
  84374. + *
  84375. + * Redistribution and use in source and binary forms, with or without
  84376. + * modification, are permitted provided that the following conditions are met:
  84377. + * * Redistributions of source code must retain the above copyright
  84378. + * notice, this list of conditions and the following disclaimer.
  84379. + * * Redistributions in binary form must reproduce the above copyright
  84380. + * notice, this list of conditions and the following disclaimer in the
  84381. + * documentation and/or other materials provided with the distribution.
  84382. + * * Neither the name of Freescale Semiconductor nor the
  84383. + * names of its contributors may be used to endorse or promote products
  84384. + * derived from this software without specific prior written permission.
  84385. + *
  84386. + *
  84387. + * ALTERNATIVELY, this software may be distributed under the terms of the
  84388. + * GNU General Public License ("GPL") as published by the Free Software
  84389. + * Foundation, either version 2 of that License or (at your option) any
  84390. + * later version.
  84391. + *
  84392. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  84393. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  84394. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  84395. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  84396. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  84397. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  84398. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  84399. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  84400. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  84401. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  84402. + */
  84403. +
  84404. +/**
  84405. +
  84406. + @File dpaa_integration_ext.h
  84407. +
  84408. + @Description T4240 FM external definitions and structures.
  84409. +*//***************************************************************************/
  84410. +#ifndef __DPAA_INTEGRATION_EXT_H
  84411. +#define __DPAA_INTEGRATION_EXT_H
  84412. +
  84413. +#include "std_ext.h"
  84414. +
  84415. +
  84416. +#define DPAA_VERSION 11
  84417. +
  84418. +/**************************************************************************//**
  84419. + @Description DPAA SW Portals Enumeration.
  84420. +*//***************************************************************************/
  84421. +typedef enum
  84422. +{
  84423. + e_DPAA_SWPORTAL0 = 0,
  84424. + e_DPAA_SWPORTAL1,
  84425. + e_DPAA_SWPORTAL2,
  84426. + e_DPAA_SWPORTAL3,
  84427. + e_DPAA_SWPORTAL4,
  84428. + e_DPAA_SWPORTAL5,
  84429. + e_DPAA_SWPORTAL6,
  84430. + e_DPAA_SWPORTAL7,
  84431. + e_DPAA_SWPORTAL8,
  84432. + e_DPAA_SWPORTAL9,
  84433. + e_DPAA_SWPORTAL10,
  84434. + e_DPAA_SWPORTAL11,
  84435. + e_DPAA_SWPORTAL12,
  84436. + e_DPAA_SWPORTAL13,
  84437. + e_DPAA_SWPORTAL14,
  84438. + e_DPAA_SWPORTAL15,
  84439. + e_DPAA_SWPORTAL16,
  84440. + e_DPAA_SWPORTAL17,
  84441. + e_DPAA_SWPORTAL18,
  84442. + e_DPAA_SWPORTAL19,
  84443. + e_DPAA_SWPORTAL20,
  84444. + e_DPAA_SWPORTAL21,
  84445. + e_DPAA_SWPORTAL22,
  84446. + e_DPAA_SWPORTAL23,
  84447. + e_DPAA_SWPORTAL24,
  84448. + e_DPAA_SWPORTAL_DUMMY_LAST
  84449. +} e_DpaaSwPortal;
  84450. +
  84451. +/**************************************************************************//**
  84452. + @Description DPAA Direct Connect Portals Enumeration.
  84453. +*//***************************************************************************/
  84454. +typedef enum
  84455. +{
  84456. + e_DPAA_DCPORTAL0 = 0,
  84457. + e_DPAA_DCPORTAL1,
  84458. + e_DPAA_DCPORTAL2,
  84459. + e_DPAA_DCPORTAL_DUMMY_LAST
  84460. +} e_DpaaDcPortal;
  84461. +
  84462. +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST
  84463. +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST
  84464. +
  84465. +/*****************************************************************************
  84466. + QMan INTEGRATION-SPECIFIC DEFINITIONS
  84467. +******************************************************************************/
  84468. +#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */
  84469. +#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */
  84470. +#define QM_MAX_NUM_OF_CGS 256 /**< Congestion groups number */
  84471. +#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE)
  84472. + /**< FQIDs range - 24 bits */
  84473. +
  84474. +/**************************************************************************//**
  84475. + @Description Work Queue Channel assignments in QMan.
  84476. +*//***************************************************************************/
  84477. +typedef enum
  84478. +{
  84479. + e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0, /**< Dedicated channels serviced by software portals 0 to 24 */
  84480. + e_QM_FQ_CHANNEL_SWPORTAL1,
  84481. + e_QM_FQ_CHANNEL_SWPORTAL2,
  84482. + e_QM_FQ_CHANNEL_SWPORTAL3,
  84483. + e_QM_FQ_CHANNEL_SWPORTAL4,
  84484. + e_QM_FQ_CHANNEL_SWPORTAL5,
  84485. + e_QM_FQ_CHANNEL_SWPORTAL6,
  84486. + e_QM_FQ_CHANNEL_SWPORTAL7,
  84487. + e_QM_FQ_CHANNEL_SWPORTAL8,
  84488. + e_QM_FQ_CHANNEL_SWPORTAL9,
  84489. + e_QM_FQ_CHANNEL_SWPORTAL10,
  84490. + e_QM_FQ_CHANNEL_SWPORTAL11,
  84491. + e_QM_FQ_CHANNEL_SWPORTAL12,
  84492. + e_QM_FQ_CHANNEL_SWPORTAL13,
  84493. + e_QM_FQ_CHANNEL_SWPORTAL14,
  84494. + e_QM_FQ_CHANNEL_SWPORTAL15,
  84495. + e_QM_FQ_CHANNEL_SWPORTAL16,
  84496. + e_QM_FQ_CHANNEL_SWPORTAL17,
  84497. + e_QM_FQ_CHANNEL_SWPORTAL18,
  84498. + e_QM_FQ_CHANNEL_SWPORTAL19,
  84499. + e_QM_FQ_CHANNEL_SWPORTAL20,
  84500. + e_QM_FQ_CHANNEL_SWPORTAL21,
  84501. + e_QM_FQ_CHANNEL_SWPORTAL22,
  84502. + e_QM_FQ_CHANNEL_SWPORTAL23,
  84503. + e_QM_FQ_CHANNEL_SWPORTAL24,
  84504. +
  84505. + e_QM_FQ_CHANNEL_POOL1 = 0x401, /**< Pool channels that can be serviced by any of the software portals */
  84506. + e_QM_FQ_CHANNEL_POOL2,
  84507. + e_QM_FQ_CHANNEL_POOL3,
  84508. + e_QM_FQ_CHANNEL_POOL4,
  84509. + e_QM_FQ_CHANNEL_POOL5,
  84510. + e_QM_FQ_CHANNEL_POOL6,
  84511. + e_QM_FQ_CHANNEL_POOL7,
  84512. + e_QM_FQ_CHANNEL_POOL8,
  84513. + e_QM_FQ_CHANNEL_POOL9,
  84514. + e_QM_FQ_CHANNEL_POOL10,
  84515. + e_QM_FQ_CHANNEL_POOL11,
  84516. + e_QM_FQ_CHANNEL_POOL12,
  84517. + e_QM_FQ_CHANNEL_POOL13,
  84518. + e_QM_FQ_CHANNEL_POOL14,
  84519. + e_QM_FQ_CHANNEL_POOL15,
  84520. +
  84521. + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800, /**< Dedicated channels serviced by Direct Connect Portal 0:
  84522. + connected to FMan 0; assigned in incrementing order to
  84523. + each sub-portal (SP) in the portal */
  84524. + e_QM_FQ_CHANNEL_FMAN0_SP1,
  84525. + e_QM_FQ_CHANNEL_FMAN0_SP2,
  84526. + e_QM_FQ_CHANNEL_FMAN0_SP3,
  84527. + e_QM_FQ_CHANNEL_FMAN0_SP4,
  84528. + e_QM_FQ_CHANNEL_FMAN0_SP5,
  84529. + e_QM_FQ_CHANNEL_FMAN0_SP6,
  84530. + e_QM_FQ_CHANNEL_FMAN0_SP7,
  84531. + e_QM_FQ_CHANNEL_FMAN0_SP8,
  84532. + e_QM_FQ_CHANNEL_FMAN0_SP9,
  84533. + e_QM_FQ_CHANNEL_FMAN0_SP10,
  84534. + e_QM_FQ_CHANNEL_FMAN0_SP11,
  84535. + e_QM_FQ_CHANNEL_FMAN0_SP12,
  84536. + e_QM_FQ_CHANNEL_FMAN0_SP13,
  84537. + e_QM_FQ_CHANNEL_FMAN0_SP14,
  84538. + e_QM_FQ_CHANNEL_FMAN0_SP15,
  84539. +
  84540. + e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820, /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */
  84541. + e_QM_FQ_CHANNEL_RMAN_SP1,
  84542. +
  84543. + e_QM_FQ_CHANNEL_CAAM = 0x840 /**< Dedicated channel serviced by Direct Connect Portal 2:
  84544. + connected to SEC */
  84545. +} e_QmFQChannel;
  84546. +
  84547. +/*****************************************************************************
  84548. + BMan INTEGRATION-SPECIFIC DEFINITIONS
  84549. +******************************************************************************/
  84550. +#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */
  84551. +
  84552. +/*****************************************************************************
  84553. + SEC INTEGRATION-SPECIFIC DEFINITIONS
  84554. +******************************************************************************/
  84555. +#define SEC_NUM_OF_DECOS 3
  84556. +#define SEC_ALL_DECOS_MASK 0x00000003
  84557. +
  84558. +
  84559. +/*****************************************************************************
  84560. + FM INTEGRATION-SPECIFIC DEFINITIONS
  84561. +******************************************************************************/
  84562. +#define INTG_MAX_NUM_OF_FM 1
  84563. +/* Ports defines */
  84564. +#define FM_MAX_NUM_OF_1G_MACS 5
  84565. +#define FM_MAX_NUM_OF_10G_MACS 1
  84566. +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
  84567. +#define FM_MAX_NUM_OF_OH_PORTS 4
  84568. +
  84569. +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS
  84570. +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS
  84571. +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
  84572. +
  84573. +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS
  84574. +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS
  84575. +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
  84576. +
  84577. +#define FM_MAX_NUM_OF_MACSECS 1 /* Should be updated */
  84578. +
  84579. +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 4 /**< Number of external BM pools per Rx port */
  84580. +#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */
  84581. +#define FM_MAX_NUM_OF_SUB_PORTALS 16
  84582. +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0
  84583. +
  84584. +#define FM_VSP_MAX_NUM_OF_ENTRIES 32
  84585. +#define FM_MAX_NUM_OF_PFC_PRIORITIES 8
  84586. +
  84587. +/* RAMs defines */
  84588. +#define FM_MURAM_SIZE (192 * KILOBYTE)
  84589. +#define FM_IRAM_SIZE(major, minor) \
  84590. + (((major == 6) && ((minor == 4) )) ? (64 * KILOBYTE) : (32 * KILOBYTE))
  84591. +#define FM_NUM_OF_CTRL 2
  84592. +
  84593. +/* PCD defines */
  84594. +#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */
  84595. +#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */
  84596. +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */
  84597. +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000600 /**< Number of bytes saved for patches */
  84598. +#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */
  84599. +
  84600. +/* RTC defines */
  84601. +#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */
  84602. +#define FM_RTC_NUM_OF_PERIODIC_PULSES 3 /**< RTC number of periodic pulses */
  84603. +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */
  84604. +
  84605. +/* QMI defines */
  84606. +#define QMI_MAX_NUM_OF_TNUMS 64
  84607. +#define QMI_DEF_TNUMS_THRESH 32
  84608. +/* FPM defines */
  84609. +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4
  84610. +
  84611. +/* DMA defines */
  84612. +#define DMA_THRESH_MAX_COMMQ 83
  84613. +#define DMA_THRESH_MAX_BUF 127
  84614. +
  84615. +/* BMI defines */
  84616. +#define BMI_MAX_NUM_OF_TASKS 64
  84617. +#define BMI_MAX_NUM_OF_DMAS 32
  84618. +
  84619. +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)
  84620. +#define PORT_MAX_WEIGHT 16
  84621. +
  84622. +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE
  84623. +
  84624. +/* Unique T4240 */
  84625. +#define FM_OP_OPEN_DMA_MIN_LIMIT
  84626. +#define FM_NO_RESTRICT_ON_ACCESS_RSRC
  84627. +#define FM_NO_OP_OBSERVED_POOLS
  84628. +#define FM_FRAME_END_PARAMS_FOR_OP
  84629. +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
  84630. +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION
  84631. +
  84632. +#define FM_NO_GUARANTEED_RESET_VALUES
  84633. +
  84634. +/* FM errata */
  84635. +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
  84636. +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
  84637. +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
  84638. +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
  84639. +
  84640. +#define FM_BCB_ERRATA_BMI_SW001
  84641. +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
  84642. +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */
  84643. +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */
  84644. +
  84645. +/*****************************************************************************
  84646. + RMan INTEGRATION-SPECIFIC DEFINITIONS
  84647. +******************************************************************************/
  84648. +#define RM_MAX_NUM_OF_IB 4 /**< Number of inbound blocks */
  84649. +#define RM_NUM_OF_IBCU 8 /**< NUmber of classification units in an inbound block */
  84650. +
  84651. +/* RMan erratas */
  84652. +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756
  84653. +
  84654. +/*****************************************************************************
  84655. + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
  84656. +******************************************************************************/
  84657. +#define NUM_OF_RX_SC 16
  84658. +#define NUM_OF_TX_SC 16
  84659. +
  84660. +#define NUM_OF_SA_PER_RX_SC 2
  84661. +#define NUM_OF_SA_PER_TX_SC 2
  84662. +
  84663. +#endif /* __DPAA_INTEGRATION_EXT_H */
  84664. --- /dev/null
  84665. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_ext.h
  84666. @@ -0,0 +1,59 @@
  84667. +/*
  84668. + * Copyright 2012 Freescale Semiconductor Inc.
  84669. + *
  84670. + * Redistribution and use in source and binary forms, with or without
  84671. + * modification, are permitted provided that the following conditions are met:
  84672. + * * Redistributions of source code must retain the above copyright
  84673. + * notice, this list of conditions and the following disclaimer.
  84674. + * * Redistributions in binary form must reproduce the above copyright
  84675. + * notice, this list of conditions and the following disclaimer in the
  84676. + * documentation and/or other materials provided with the distribution.
  84677. + * * Neither the name of Freescale Semiconductor nor the
  84678. + * names of its contributors may be used to endorse or promote products
  84679. + * derived from this software without specific prior written permission.
  84680. + *
  84681. + *
  84682. + * ALTERNATIVELY, this software may be distributed under the terms of the
  84683. + * GNU General Public License ("GPL") as published by the Free Software
  84684. + * Foundation, either version 2 of that License or (at your option) any
  84685. + * later version.
  84686. + *
  84687. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  84688. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  84689. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  84690. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  84691. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  84692. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  84693. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  84694. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  84695. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  84696. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  84697. + */
  84698. +
  84699. +/**************************************************************************//**
  84700. +
  84701. + @File part_ext.h
  84702. +
  84703. + @Description Definitions for the part (integration) module.
  84704. +*//***************************************************************************/
  84705. +
  84706. +#ifndef __PART_EXT_H
  84707. +#define __PART_EXT_H
  84708. +
  84709. +#include "std_ext.h"
  84710. +#include "part_integration_ext.h"
  84711. +
  84712. +/**************************************************************************//*
  84713. + @Description Part data structure - must be contained in any integration
  84714. + data structure.
  84715. +*//***************************************************************************/
  84716. +typedef struct t_Part
  84717. +{
  84718. + uintptr_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
  84719. + /**< Returns the address of the module's memory map base. */
  84720. + e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
  84721. + /**< Returns the module's ID according to its memory map base. */
  84722. +} t_Part;
  84723. +
  84724. +
  84725. +#endif /* __PART_EXT_H */
  84726. --- /dev/null
  84727. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/FMANV3L/part_integration_ext.h
  84728. @@ -0,0 +1,304 @@
  84729. +/*
  84730. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  84731. + *
  84732. + * Redistribution and use in source and binary forms, with or without
  84733. + * modification, are permitted provided that the following conditions are met:
  84734. + * * Redistributions of source code must retain the above copyright
  84735. + * notice, this list of conditions and the following disclaimer.
  84736. + * * Redistributions in binary form must reproduce the above copyright
  84737. + * notice, this list of conditions and the following disclaimer in the
  84738. + * documentation and/or other materials provided with the distribution.
  84739. + * * Neither the name of Freescale Semiconductor nor the
  84740. + * names of its contributors may be used to endorse or promote products
  84741. + * derived from this software without specific prior written permission.
  84742. + *
  84743. + *
  84744. + * ALTERNATIVELY, this software may be distributed under the terms of the
  84745. + * GNU General Public License ("GPL") as published by the Free Software
  84746. + * Foundation, either version 2 of that License or (at your option) any
  84747. + * later version.
  84748. + *
  84749. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  84750. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  84751. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  84752. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  84753. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  84754. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  84755. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  84756. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  84757. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  84758. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  84759. + */
  84760. +
  84761. +/**
  84762. +
  84763. + @File part_integration_ext.h
  84764. +
  84765. + @Description T4240 external definitions and structures.
  84766. +*//***************************************************************************/
  84767. +#ifndef __PART_INTEGRATION_EXT_H
  84768. +#define __PART_INTEGRATION_EXT_H
  84769. +
  84770. +#include "std_ext.h"
  84771. +#include "ddr_std_ext.h"
  84772. +#include "enet_ext.h"
  84773. +#include "dpaa_integration_ext.h"
  84774. +
  84775. +
  84776. +/**************************************************************************//**
  84777. + @Group T4240_chip_id T4240 Application Programming Interface
  84778. +
  84779. + @Description T4240 Chip functions,definitions and enums.
  84780. +
  84781. + @{
  84782. +*//***************************************************************************/
  84783. +
  84784. +#define CORE_E6500
  84785. +
  84786. +#define INTG_MAX_NUM_OF_CORES 24
  84787. +
  84788. +
  84789. +/**************************************************************************//**
  84790. + @Description Module types.
  84791. +*//***************************************************************************/
  84792. +typedef enum e_ModuleId
  84793. +{
  84794. + e_MODULE_ID_DUART_1 = 0,
  84795. + e_MODULE_ID_DUART_2,
  84796. + e_MODULE_ID_DUART_3,
  84797. + e_MODULE_ID_DUART_4,
  84798. + e_MODULE_ID_LAW,
  84799. + e_MODULE_ID_IFC,
  84800. + e_MODULE_ID_PAMU,
  84801. + e_MODULE_ID_QM, /**< Queue manager module */
  84802. + e_MODULE_ID_BM, /**< Buffer manager module */
  84803. + e_MODULE_ID_QM_CE_PORTAL_0,
  84804. + e_MODULE_ID_QM_CI_PORTAL_0,
  84805. + e_MODULE_ID_QM_CE_PORTAL_1,
  84806. + e_MODULE_ID_QM_CI_PORTAL_1,
  84807. + e_MODULE_ID_QM_CE_PORTAL_2,
  84808. + e_MODULE_ID_QM_CI_PORTAL_2,
  84809. + e_MODULE_ID_QM_CE_PORTAL_3,
  84810. + e_MODULE_ID_QM_CI_PORTAL_3,
  84811. + e_MODULE_ID_QM_CE_PORTAL_4,
  84812. + e_MODULE_ID_QM_CI_PORTAL_4,
  84813. + e_MODULE_ID_QM_CE_PORTAL_5,
  84814. + e_MODULE_ID_QM_CI_PORTAL_5,
  84815. + e_MODULE_ID_QM_CE_PORTAL_6,
  84816. + e_MODULE_ID_QM_CI_PORTAL_6,
  84817. + e_MODULE_ID_QM_CE_PORTAL_7,
  84818. + e_MODULE_ID_QM_CI_PORTAL_7,
  84819. + e_MODULE_ID_QM_CE_PORTAL_8,
  84820. + e_MODULE_ID_QM_CI_PORTAL_8,
  84821. + e_MODULE_ID_QM_CE_PORTAL_9,
  84822. + e_MODULE_ID_QM_CI_PORTAL_9,
  84823. + e_MODULE_ID_BM_CE_PORTAL_0,
  84824. + e_MODULE_ID_BM_CI_PORTAL_0,
  84825. + e_MODULE_ID_BM_CE_PORTAL_1,
  84826. + e_MODULE_ID_BM_CI_PORTAL_1,
  84827. + e_MODULE_ID_BM_CE_PORTAL_2,
  84828. + e_MODULE_ID_BM_CI_PORTAL_2,
  84829. + e_MODULE_ID_BM_CE_PORTAL_3,
  84830. + e_MODULE_ID_BM_CI_PORTAL_3,
  84831. + e_MODULE_ID_BM_CE_PORTAL_4,
  84832. + e_MODULE_ID_BM_CI_PORTAL_4,
  84833. + e_MODULE_ID_BM_CE_PORTAL_5,
  84834. + e_MODULE_ID_BM_CI_PORTAL_5,
  84835. + e_MODULE_ID_BM_CE_PORTAL_6,
  84836. + e_MODULE_ID_BM_CI_PORTAL_6,
  84837. + e_MODULE_ID_BM_CE_PORTAL_7,
  84838. + e_MODULE_ID_BM_CI_PORTAL_7,
  84839. + e_MODULE_ID_BM_CE_PORTAL_8,
  84840. + e_MODULE_ID_BM_CI_PORTAL_8,
  84841. + e_MODULE_ID_BM_CE_PORTAL_9,
  84842. + e_MODULE_ID_BM_CI_PORTAL_9,
  84843. + e_MODULE_ID_FM, /**< Frame manager module */
  84844. + e_MODULE_ID_FM_RTC, /**< FM Real-Time-Clock */
  84845. + e_MODULE_ID_FM_MURAM, /**< FM Multi-User-RAM */
  84846. + e_MODULE_ID_FM_BMI, /**< FM BMI block */
  84847. + e_MODULE_ID_FM_QMI, /**< FM QMI block */
  84848. + e_MODULE_ID_FM_PARSER, /**< FM parser block */
  84849. + e_MODULE_ID_FM_PORT_HO1, /**< FM Host-command/offline-parsing port block */
  84850. + e_MODULE_ID_FM_PORT_HO2, /**< FM Host-command/offline-parsing port block */
  84851. + e_MODULE_ID_FM_PORT_HO3, /**< FM Host-command/offline-parsing port block */
  84852. + e_MODULE_ID_FM_PORT_HO4, /**< FM Host-command/offline-parsing port block */
  84853. + e_MODULE_ID_FM_PORT_HO5, /**< FM Host-command/offline-parsing port block */
  84854. + e_MODULE_ID_FM_PORT_HO6, /**< FM Host-command/offline-parsing port block */
  84855. + e_MODULE_ID_FM_PORT_HO7, /**< FM Host-command/offline-parsing port block */
  84856. + e_MODULE_ID_FM_PORT_1GRx1, /**< FM Rx 1G MAC port block */
  84857. + e_MODULE_ID_FM_PORT_1GRx2, /**< FM Rx 1G MAC port block */
  84858. + e_MODULE_ID_FM_PORT_1GRx3, /**< FM Rx 1G MAC port block */
  84859. + e_MODULE_ID_FM_PORT_1GRx4, /**< FM Rx 1G MAC port block */
  84860. + e_MODULE_ID_FM_PORT_1GRx5, /**< FM Rx 1G MAC port block */
  84861. + e_MODULE_ID_FM_PORT_1GRx6, /**< FM Rx 1G MAC port block */
  84862. + e_MODULE_ID_FM_PORT_10GRx1, /**< FM Rx 10G MAC port block */
  84863. + e_MODULE_ID_FM_PORT_10GRx2, /**< FM Rx 10G MAC port block */
  84864. + e_MODULE_ID_FM_PORT_1GTx1, /**< FM Tx 1G MAC port block */
  84865. + e_MODULE_ID_FM_PORT_1GTx2, /**< FM Tx 1G MAC port block */
  84866. + e_MODULE_ID_FM_PORT_1GTx3, /**< FM Tx 1G MAC port block */
  84867. + e_MODULE_ID_FM_PORT_1GTx4, /**< FM Tx 1G MAC port block */
  84868. + e_MODULE_ID_FM_PORT_1GTx5, /**< FM Tx 1G MAC port block */
  84869. + e_MODULE_ID_FM_PORT_1GTx6, /**< FM Tx 1G MAC port block */
  84870. + e_MODULE_ID_FM_PORT_10GTx1, /**< FM Tx 10G MAC port block */
  84871. + e_MODULE_ID_FM_PORT_10GTx2, /**< FM Tx 10G MAC port block */
  84872. + e_MODULE_ID_FM_PLCR, /**< FM Policer */
  84873. + e_MODULE_ID_FM_KG, /**< FM Keygen */
  84874. + e_MODULE_ID_FM_DMA, /**< FM DMA */
  84875. + e_MODULE_ID_FM_FPM, /**< FM FPM */
  84876. + e_MODULE_ID_FM_IRAM, /**< FM Instruction-RAM */
  84877. + e_MODULE_ID_FM_1GMDIO, /**< FM 1G MDIO MAC */
  84878. + e_MODULE_ID_FM_10GMDIO, /**< FM 10G MDIO */
  84879. + e_MODULE_ID_FM_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
  84880. + e_MODULE_ID_FM_1GMAC1, /**< FM 1G MAC #1 */
  84881. + e_MODULE_ID_FM_1GMAC2, /**< FM 1G MAC #2 */
  84882. + e_MODULE_ID_FM_1GMAC3, /**< FM 1G MAC #3 */
  84883. + e_MODULE_ID_FM_1GMAC4, /**< FM 1G MAC #4 */
  84884. + e_MODULE_ID_FM_1GMAC5, /**< FM 1G MAC #5 */
  84885. + e_MODULE_ID_FM_1GMAC6, /**< FM 1G MAC #6 */
  84886. + e_MODULE_ID_FM_10GMAC1, /**< FM 10G MAC */
  84887. + e_MODULE_ID_FM_10GMAC2, /**< FM 10G MAC */
  84888. +
  84889. + e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */
  84890. + e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */
  84891. + e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */
  84892. + e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */
  84893. + e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */
  84894. + e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */
  84895. + e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */
  84896. + e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */
  84897. + e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */
  84898. + e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */
  84899. + e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */
  84900. + e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */
  84901. +
  84902. + e_MODULE_ID_PIC, /**< PIC */
  84903. + e_MODULE_ID_GPIO, /**< GPIO */
  84904. + e_MODULE_ID_SERDES, /**< SERDES */
  84905. + e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */
  84906. + e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */
  84907. +
  84908. + e_MODULE_ID_SRIO_PORTS, /**< RapidIO controller */
  84909. +
  84910. + e_MODULE_ID_DUMMY_LAST
  84911. +} e_ModuleId;
  84912. +
  84913. +#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST
  84914. +
  84915. +#if 0 /* using unified values */
  84916. +/*****************************************************************************
  84917. + INTEGRATION-SPECIFIC MODULE CODES
  84918. +******************************************************************************/
  84919. +#define MODULE_UNKNOWN 0x00000000
  84920. +#define MODULE_MEM 0x00010000
  84921. +#define MODULE_MM 0x00020000
  84922. +#define MODULE_CORE 0x00030000
  84923. +#define MODULE_T4240 0x00040000
  84924. +#define MODULE_T4240_PLATFORM 0x00050000
  84925. +#define MODULE_PM 0x00060000
  84926. +#define MODULE_MMU 0x00070000
  84927. +#define MODULE_PIC 0x00080000
  84928. +#define MODULE_CPC 0x00090000
  84929. +#define MODULE_DUART 0x000a0000
  84930. +#define MODULE_SERDES 0x000b0000
  84931. +#define MODULE_PIO 0x000c0000
  84932. +#define MODULE_QM 0x000d0000
  84933. +#define MODULE_BM 0x000e0000
  84934. +#define MODULE_SEC 0x000f0000
  84935. +#define MODULE_LAW 0x00100000
  84936. +#define MODULE_LBC 0x00110000
  84937. +#define MODULE_PAMU 0x00120000
  84938. +#define MODULE_FM 0x00130000
  84939. +#define MODULE_FM_MURAM 0x00140000
  84940. +#define MODULE_FM_PCD 0x00150000
  84941. +#define MODULE_FM_RTC 0x00160000
  84942. +#define MODULE_FM_MAC 0x00170000
  84943. +#define MODULE_FM_PORT 0x00180000
  84944. +#define MODULE_FM_SP 0x00190000
  84945. +#define MODULE_DPA_PORT 0x001a0000
  84946. +#define MODULE_MII 0x001b0000
  84947. +#define MODULE_I2C 0x001c0000
  84948. +#define MODULE_DMA 0x001d0000
  84949. +#define MODULE_DDR 0x001e0000
  84950. +#define MODULE_ESPI 0x001f0000
  84951. +#define MODULE_DPAA_IPSEC 0x00200000
  84952. +#endif /* using unified values */
  84953. +
  84954. +/*****************************************************************************
  84955. + PAMU INTEGRATION-SPECIFIC DEFINITIONS
  84956. +******************************************************************************/
  84957. +#define PAMU_NUM_OF_PARTITIONS 4
  84958. +
  84959. +/*****************************************************************************
  84960. + LAW INTEGRATION-SPECIFIC DEFINITIONS
  84961. +******************************************************************************/
  84962. +#define LAW_NUM_OF_WINDOWS 32
  84963. +#define LAW_MIN_WINDOW_SIZE 0x0000000000001000LL /**< 4 Kbytes */
  84964. +#define LAW_MAX_WINDOW_SIZE 0x0000010000000000LL /**< 1 Tbytes for 40-bit address space */
  84965. +
  84966. +
  84967. +/*****************************************************************************
  84968. + LBC INTEGRATION-SPECIFIC DEFINITIONS
  84969. +******************************************************************************/
  84970. +/**************************************************************************//**
  84971. + @Group lbc_exception_grp LBC Exception Unit
  84972. +
  84973. + @Description LBC Exception unit API functions, definitions and enums
  84974. +
  84975. + @{
  84976. +*//***************************************************************************/
  84977. +
  84978. +/**************************************************************************//**
  84979. + @Anchor lbc_exbm
  84980. +
  84981. + @Collection LBC Errors Bit Mask
  84982. +
  84983. + These errors are reported through the exceptions callback..
  84984. + The values can be or'ed in any combination in the errors mask
  84985. + parameter of the errors report structure.
  84986. +
  84987. + These errors can also be passed as a bit-mask to
  84988. + LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
  84989. + for enabling or disabling error checking.
  84990. + @{
  84991. +*//***************************************************************************/
  84992. +#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */
  84993. +#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */
  84994. +#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */
  84995. +#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */
  84996. +
  84997. +#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
  84998. + LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT)
  84999. + /**< All possible errors */
  85000. +/* @} */
  85001. +/** @} */ /* end of lbc_exception_grp group */
  85002. +
  85003. +#define LBC_INCORRECT_ERROR_REPORT_ERRATA
  85004. +
  85005. +#define LBC_NUM_OF_BANKS 8
  85006. +#define LBC_MAX_CS_SIZE 0x0000000100000000LL /* Up to 4G memory block size */
  85007. +#define LBC_PARITY_SUPPORT
  85008. +#define LBC_ADDRESS_HOLD_TIME_CTRL
  85009. +#define LBC_HIGH_CLK_DIVIDERS
  85010. +#define LBC_FCM_AVAILABLE
  85011. +
  85012. +/*****************************************************************************
  85013. + GPIO INTEGRATION-SPECIFIC DEFINITIONS
  85014. +******************************************************************************/
  85015. +#define GPIO_PORT_OFFSET_0x1000
  85016. +
  85017. +#define GPIO_NUM_OF_PORTS 3 /**< Number of ports in GPIO module;
  85018. + Each port contains up to 32 I/O pins. */
  85019. +
  85020. +#define GPIO_VALID_PIN_MASKS \
  85021. + { /* Port A */ 0xFFFFFFFF, \
  85022. + /* Port B */ 0xFFFFFFFF, \
  85023. + /* Port C */ 0xFFFFFFFF }
  85024. +
  85025. +#define GPIO_VALID_INTR_MASKS \
  85026. + { /* Port A */ 0xFFFFFFFF, \
  85027. + /* Port B */ 0xFFFFFFFF, \
  85028. + /* Port C */ 0xFFFFFFFF }
  85029. +
  85030. +
  85031. +
  85032. +#endif /* __PART_INTEGRATION_EXT_H */
  85033. --- /dev/null
  85034. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/dpaa_integration_ext.h
  85035. @@ -0,0 +1,291 @@
  85036. +/*
  85037. + * Copyright 2012 Freescale Semiconductor Inc.
  85038. + *
  85039. + * Redistribution and use in source and binary forms, with or without
  85040. + * modification, are permitted provided that the following conditions are met:
  85041. + * * Redistributions of source code must retain the above copyright
  85042. + * notice, this list of conditions and the following disclaimer.
  85043. + * * Redistributions in binary form must reproduce the above copyright
  85044. + * notice, this list of conditions and the following disclaimer in the
  85045. + * documentation and/or other materials provided with the distribution.
  85046. + * * Neither the name of Freescale Semiconductor nor the
  85047. + * names of its contributors may be used to endorse or promote products
  85048. + * derived from this software without specific prior written permission.
  85049. + *
  85050. + *
  85051. + * ALTERNATIVELY, this software may be distributed under the terms of the
  85052. + * GNU General Public License ("GPL") as published by the Free Software
  85053. + * Foundation, either version 2 of that License or (at your option) any
  85054. + * later version.
  85055. + *
  85056. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  85057. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  85058. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  85059. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  85060. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  85061. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  85062. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  85063. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  85064. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  85065. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  85066. + */
  85067. +
  85068. +/**
  85069. +
  85070. + @File dpaa_integration_ext.h
  85071. +
  85072. + @Description T4240 FM external definitions and structures.
  85073. +*//***************************************************************************/
  85074. +#ifndef __DPAA_INTEGRATION_EXT_H
  85075. +#define __DPAA_INTEGRATION_EXT_H
  85076. +
  85077. +#include "std_ext.h"
  85078. +
  85079. +
  85080. +#define DPAA_VERSION 11
  85081. +
  85082. +/**************************************************************************//**
  85083. + @Description DPAA SW Portals Enumeration.
  85084. +*//***************************************************************************/
  85085. +typedef enum
  85086. +{
  85087. + e_DPAA_SWPORTAL0 = 0,
  85088. + e_DPAA_SWPORTAL1,
  85089. + e_DPAA_SWPORTAL2,
  85090. + e_DPAA_SWPORTAL3,
  85091. + e_DPAA_SWPORTAL4,
  85092. + e_DPAA_SWPORTAL5,
  85093. + e_DPAA_SWPORTAL6,
  85094. + e_DPAA_SWPORTAL7,
  85095. + e_DPAA_SWPORTAL8,
  85096. + e_DPAA_SWPORTAL9,
  85097. + e_DPAA_SWPORTAL10,
  85098. + e_DPAA_SWPORTAL11,
  85099. + e_DPAA_SWPORTAL12,
  85100. + e_DPAA_SWPORTAL13,
  85101. + e_DPAA_SWPORTAL14,
  85102. + e_DPAA_SWPORTAL15,
  85103. + e_DPAA_SWPORTAL16,
  85104. + e_DPAA_SWPORTAL17,
  85105. + e_DPAA_SWPORTAL18,
  85106. + e_DPAA_SWPORTAL19,
  85107. + e_DPAA_SWPORTAL20,
  85108. + e_DPAA_SWPORTAL21,
  85109. + e_DPAA_SWPORTAL22,
  85110. + e_DPAA_SWPORTAL23,
  85111. + e_DPAA_SWPORTAL24,
  85112. + e_DPAA_SWPORTAL_DUMMY_LAST
  85113. +} e_DpaaSwPortal;
  85114. +
  85115. +/**************************************************************************//**
  85116. + @Description DPAA Direct Connect Portals Enumeration.
  85117. +*//***************************************************************************/
  85118. +typedef enum
  85119. +{
  85120. + e_DPAA_DCPORTAL0 = 0,
  85121. + e_DPAA_DCPORTAL1,
  85122. + e_DPAA_DCPORTAL2,
  85123. + e_DPAA_DCPORTAL_DUMMY_LAST
  85124. +} e_DpaaDcPortal;
  85125. +
  85126. +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST
  85127. +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST
  85128. +
  85129. +/*****************************************************************************
  85130. + QMan INTEGRATION-SPECIFIC DEFINITIONS
  85131. +******************************************************************************/
  85132. +#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */
  85133. +#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */
  85134. +#define QM_MAX_NUM_OF_CGS 256 /**< Congestion groups number */
  85135. +#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE)
  85136. + /**< FQIDs range - 24 bits */
  85137. +
  85138. +/**************************************************************************//**
  85139. + @Description Work Queue Channel assignments in QMan.
  85140. +*//***************************************************************************/
  85141. +typedef enum
  85142. +{
  85143. + e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0, /**< Dedicated channels serviced by software portals 0 to 24 */
  85144. + e_QM_FQ_CHANNEL_SWPORTAL1,
  85145. + e_QM_FQ_CHANNEL_SWPORTAL2,
  85146. + e_QM_FQ_CHANNEL_SWPORTAL3,
  85147. + e_QM_FQ_CHANNEL_SWPORTAL4,
  85148. + e_QM_FQ_CHANNEL_SWPORTAL5,
  85149. + e_QM_FQ_CHANNEL_SWPORTAL6,
  85150. + e_QM_FQ_CHANNEL_SWPORTAL7,
  85151. + e_QM_FQ_CHANNEL_SWPORTAL8,
  85152. + e_QM_FQ_CHANNEL_SWPORTAL9,
  85153. + e_QM_FQ_CHANNEL_SWPORTAL10,
  85154. + e_QM_FQ_CHANNEL_SWPORTAL11,
  85155. + e_QM_FQ_CHANNEL_SWPORTAL12,
  85156. + e_QM_FQ_CHANNEL_SWPORTAL13,
  85157. + e_QM_FQ_CHANNEL_SWPORTAL14,
  85158. + e_QM_FQ_CHANNEL_SWPORTAL15,
  85159. + e_QM_FQ_CHANNEL_SWPORTAL16,
  85160. + e_QM_FQ_CHANNEL_SWPORTAL17,
  85161. + e_QM_FQ_CHANNEL_SWPORTAL18,
  85162. + e_QM_FQ_CHANNEL_SWPORTAL19,
  85163. + e_QM_FQ_CHANNEL_SWPORTAL20,
  85164. + e_QM_FQ_CHANNEL_SWPORTAL21,
  85165. + e_QM_FQ_CHANNEL_SWPORTAL22,
  85166. + e_QM_FQ_CHANNEL_SWPORTAL23,
  85167. + e_QM_FQ_CHANNEL_SWPORTAL24,
  85168. +
  85169. + e_QM_FQ_CHANNEL_POOL1 = 0x401, /**< Pool channels that can be serviced by any of the software portals */
  85170. + e_QM_FQ_CHANNEL_POOL2,
  85171. + e_QM_FQ_CHANNEL_POOL3,
  85172. + e_QM_FQ_CHANNEL_POOL4,
  85173. + e_QM_FQ_CHANNEL_POOL5,
  85174. + e_QM_FQ_CHANNEL_POOL6,
  85175. + e_QM_FQ_CHANNEL_POOL7,
  85176. + e_QM_FQ_CHANNEL_POOL8,
  85177. + e_QM_FQ_CHANNEL_POOL9,
  85178. + e_QM_FQ_CHANNEL_POOL10,
  85179. + e_QM_FQ_CHANNEL_POOL11,
  85180. + e_QM_FQ_CHANNEL_POOL12,
  85181. + e_QM_FQ_CHANNEL_POOL13,
  85182. + e_QM_FQ_CHANNEL_POOL14,
  85183. + e_QM_FQ_CHANNEL_POOL15,
  85184. +
  85185. + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800, /**< Dedicated channels serviced by Direct Connect Portal 0:
  85186. + connected to FMan 0; assigned in incrementing order to
  85187. + each sub-portal (SP) in the portal */
  85188. + e_QM_FQ_CHANNEL_FMAN0_SP1,
  85189. + e_QM_FQ_CHANNEL_FMAN0_SP2,
  85190. + e_QM_FQ_CHANNEL_FMAN0_SP3,
  85191. + e_QM_FQ_CHANNEL_FMAN0_SP4,
  85192. + e_QM_FQ_CHANNEL_FMAN0_SP5,
  85193. + e_QM_FQ_CHANNEL_FMAN0_SP6,
  85194. + e_QM_FQ_CHANNEL_FMAN0_SP7,
  85195. + e_QM_FQ_CHANNEL_FMAN0_SP8,
  85196. + e_QM_FQ_CHANNEL_FMAN0_SP9,
  85197. + e_QM_FQ_CHANNEL_FMAN0_SP10,
  85198. + e_QM_FQ_CHANNEL_FMAN0_SP11,
  85199. + e_QM_FQ_CHANNEL_FMAN0_SP12,
  85200. + e_QM_FQ_CHANNEL_FMAN0_SP13,
  85201. + e_QM_FQ_CHANNEL_FMAN0_SP14,
  85202. + e_QM_FQ_CHANNEL_FMAN0_SP15,
  85203. +
  85204. + e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820, /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */
  85205. + e_QM_FQ_CHANNEL_RMAN_SP1,
  85206. +
  85207. + e_QM_FQ_CHANNEL_CAAM = 0x840 /**< Dedicated channel serviced by Direct Connect Portal 2:
  85208. + connected to SEC */
  85209. +} e_QmFQChannel;
  85210. +
  85211. +/*****************************************************************************
  85212. + BMan INTEGRATION-SPECIFIC DEFINITIONS
  85213. +******************************************************************************/
  85214. +#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */
  85215. +
  85216. +/*****************************************************************************
  85217. + SEC INTEGRATION-SPECIFIC DEFINITIONS
  85218. +******************************************************************************/
  85219. +#define SEC_NUM_OF_DECOS 3
  85220. +#define SEC_ALL_DECOS_MASK 0x00000003
  85221. +
  85222. +
  85223. +/*****************************************************************************
  85224. + FM INTEGRATION-SPECIFIC DEFINITIONS
  85225. +******************************************************************************/
  85226. +#define INTG_MAX_NUM_OF_FM 2
  85227. +
  85228. +/* Ports defines */
  85229. +#define FM_MAX_NUM_OF_1G_MACS 6
  85230. +#define FM_MAX_NUM_OF_10G_MACS 2
  85231. +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
  85232. +#define FM_MAX_NUM_OF_OH_PORTS 6
  85233. +
  85234. +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS
  85235. +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS
  85236. +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
  85237. +
  85238. +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS
  85239. +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS
  85240. +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
  85241. +
  85242. +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 4 /**< Number of external BM pools per Rx port */
  85243. +#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */
  85244. +#define FM_MAX_NUM_OF_SUB_PORTALS 16
  85245. +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0
  85246. +
  85247. +#define FM_VSP_MAX_NUM_OF_ENTRIES 64
  85248. +#define FM_MAX_NUM_OF_PFC_PRIORITIES 8
  85249. +
  85250. +/* RAMs defines */
  85251. +#define FM_MURAM_SIZE (384 * KILOBYTE)
  85252. +#define FM_IRAM_SIZE(major, minor) (64 * KILOBYTE)
  85253. +#define FM_NUM_OF_CTRL 4
  85254. +
  85255. +/* PCD defines */
  85256. +#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */
  85257. +#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */
  85258. +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */
  85259. +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000600 /**< Number of bytes saved for patches */
  85260. +#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */
  85261. +
  85262. +/* RTC defines */
  85263. +#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */
  85264. +#define FM_RTC_NUM_OF_PERIODIC_PULSES 3 /**< RTC number of periodic pulses */
  85265. +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */
  85266. +
  85267. +/* QMI defines */
  85268. +#define QMI_MAX_NUM_OF_TNUMS 64
  85269. +#define QMI_DEF_TNUMS_THRESH 32
  85270. +/* FPM defines */
  85271. +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4
  85272. +
  85273. +/* DMA defines */
  85274. +#define DMA_THRESH_MAX_COMMQ 83
  85275. +#define DMA_THRESH_MAX_BUF 127
  85276. +
  85277. +/* BMI defines */
  85278. +#define BMI_MAX_NUM_OF_TASKS 128
  85279. +#define BMI_MAX_NUM_OF_DMAS 84
  85280. +
  85281. +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)
  85282. +#define PORT_MAX_WEIGHT 16
  85283. +
  85284. +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE
  85285. +
  85286. +/* Unique T4240 */
  85287. +#define FM_OP_OPEN_DMA_MIN_LIMIT
  85288. +#define FM_NO_RESTRICT_ON_ACCESS_RSRC
  85289. +#define FM_NO_OP_OBSERVED_POOLS
  85290. +#define FM_FRAME_END_PARAMS_FOR_OP
  85291. +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
  85292. +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION
  85293. +
  85294. +#define FM_NO_GUARANTEED_RESET_VALUES
  85295. +
  85296. +/* FM errata */
  85297. +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669
  85298. +#define FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127
  85299. +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320
  85300. +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675
  85301. +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981
  85302. +
  85303. +#define FM_BCB_ERRATA_BMI_SW001
  85304. +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
  85305. +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */
  85306. +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */
  85307. +
  85308. +/*****************************************************************************
  85309. + RMan INTEGRATION-SPECIFIC DEFINITIONS
  85310. +******************************************************************************/
  85311. +#define RM_MAX_NUM_OF_IB 4 /**< Number of inbound blocks */
  85312. +#define RM_NUM_OF_IBCU 8 /**< NUmber of classification units in an inbound block */
  85313. +
  85314. +/* RMan erratas */
  85315. +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756
  85316. +
  85317. +/*****************************************************************************
  85318. + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
  85319. +******************************************************************************/
  85320. +#define NUM_OF_RX_SC 16
  85321. +#define NUM_OF_TX_SC 16
  85322. +
  85323. +#define NUM_OF_SA_PER_RX_SC 2
  85324. +#define NUM_OF_SA_PER_TX_SC 2
  85325. +
  85326. +#endif /* __DPAA_INTEGRATION_EXT_H */
  85327. --- /dev/null
  85328. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_ext.h
  85329. @@ -0,0 +1,64 @@
  85330. +/*
  85331. + * Copyright 2012 Freescale Semiconductor Inc.
  85332. + *
  85333. + * Redistribution and use in source and binary forms, with or without
  85334. + * modification, are permitted provided that the following conditions are met:
  85335. + * * Redistributions of source code must retain the above copyright
  85336. + * notice, this list of conditions and the following disclaimer.
  85337. + * * Redistributions in binary form must reproduce the above copyright
  85338. + * notice, this list of conditions and the following disclaimer in the
  85339. + * documentation and/or other materials provided with the distribution.
  85340. + * * Neither the name of Freescale Semiconductor nor the
  85341. + * names of its contributors may be used to endorse or promote products
  85342. + * derived from this software without specific prior written permission.
  85343. + *
  85344. + *
  85345. + * ALTERNATIVELY, this software may be distributed under the terms of the
  85346. + * GNU General Public License ("GPL") as published by the Free Software
  85347. + * Foundation, either version 2 of that License or (at your option) any
  85348. + * later version.
  85349. + *
  85350. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  85351. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  85352. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  85353. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  85354. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  85355. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  85356. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  85357. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  85358. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  85359. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  85360. + */
  85361. +
  85362. +/**************************************************************************//**
  85363. +
  85364. + @File part_ext.h
  85365. +
  85366. + @Description Definitions for the part (integration) module.
  85367. +*//***************************************************************************/
  85368. +
  85369. +#ifndef __PART_EXT_H
  85370. +#define __PART_EXT_H
  85371. +
  85372. +#include "std_ext.h"
  85373. +#include "part_integration_ext.h"
  85374. +
  85375. +#if !(defined(LS1043))
  85376. +#error "unable to proceed without chip-definition"
  85377. +#endif
  85378. +
  85379. +
  85380. +/**************************************************************************//*
  85381. + @Description Part data structure - must be contained in any integration
  85382. + data structure.
  85383. +*//***************************************************************************/
  85384. +typedef struct t_Part
  85385. +{
  85386. + uintptr_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
  85387. + /**< Returns the address of the module's memory map base. */
  85388. + e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
  85389. + /**< Returns the module's ID according to its memory map base. */
  85390. +} t_Part;
  85391. +
  85392. +
  85393. +#endif /* __PART_EXT_H */
  85394. --- /dev/null
  85395. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/LS1043/part_integration_ext.h
  85396. @@ -0,0 +1,185 @@
  85397. +/*
  85398. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  85399. + *
  85400. + * Redistribution and use in source and binary forms, with or without
  85401. + * modification, are permitted provided that the following conditions are met:
  85402. + * * Redistributions of source code must retain the above copyright
  85403. + * notice, this list of conditions and the following disclaimer.
  85404. + * * Redistributions in binary form must reproduce the above copyright
  85405. + * notice, this list of conditions and the following disclaimer in the
  85406. + * documentation and/or other materials provided with the distribution.
  85407. + * * Neither the name of Freescale Semiconductor nor the
  85408. + * names of its contributors may be used to endorse or promote products
  85409. + * derived from this software without specific prior written permission.
  85410. + *
  85411. + *
  85412. + * ALTERNATIVELY, this software may be distributed under the terms of the
  85413. + * GNU General Public License ("GPL") as published by the Free Software
  85414. + * Foundation, either version 2 of that License or (at your option) any
  85415. + * later version.
  85416. + *
  85417. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  85418. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  85419. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  85420. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  85421. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  85422. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  85423. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  85424. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  85425. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  85426. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  85427. + */
  85428. +
  85429. +/**
  85430. +
  85431. + @File part_integration_ext.h
  85432. +
  85433. + @Description T4240 external definitions and structures.
  85434. +*//***************************************************************************/
  85435. +#ifndef __PART_INTEGRATION_EXT_H
  85436. +#define __PART_INTEGRATION_EXT_H
  85437. +
  85438. +#include "std_ext.h"
  85439. +#include "ddr_std_ext.h"
  85440. +#include "enet_ext.h"
  85441. +#include "dpaa_integration_ext.h"
  85442. +
  85443. +
  85444. +/**************************************************************************//**
  85445. + @Group T4240_chip_id T4240 Application Programming Interface
  85446. +
  85447. + @Description T4240 Chip functions,definitions and enums.
  85448. +
  85449. + @{
  85450. +*//***************************************************************************/
  85451. +
  85452. +#define INTG_MAX_NUM_OF_CORES 4
  85453. +
  85454. +/**************************************************************************//**
  85455. + @Description Module types.
  85456. +*//***************************************************************************/
  85457. +typedef enum e_ModuleId
  85458. +{
  85459. + e_MODULE_ID_DUART_1 = 0,
  85460. + e_MODULE_ID_DUART_2,
  85461. + e_MODULE_ID_DUART_3,
  85462. + e_MODULE_ID_DUART_4,
  85463. + e_MODULE_ID_LAW,
  85464. + e_MODULE_ID_IFC,
  85465. + e_MODULE_ID_PAMU,
  85466. + e_MODULE_ID_QM, /**< Queue manager module */
  85467. + e_MODULE_ID_BM, /**< Buffer manager module */
  85468. + e_MODULE_ID_QM_CE_PORTAL_0,
  85469. + e_MODULE_ID_QM_CI_PORTAL_0,
  85470. + e_MODULE_ID_QM_CE_PORTAL_1,
  85471. + e_MODULE_ID_QM_CI_PORTAL_1,
  85472. + e_MODULE_ID_QM_CE_PORTAL_2,
  85473. + e_MODULE_ID_QM_CI_PORTAL_2,
  85474. + e_MODULE_ID_QM_CE_PORTAL_3,
  85475. + e_MODULE_ID_QM_CI_PORTAL_3,
  85476. + e_MODULE_ID_QM_CE_PORTAL_4,
  85477. + e_MODULE_ID_QM_CI_PORTAL_4,
  85478. + e_MODULE_ID_QM_CE_PORTAL_5,
  85479. + e_MODULE_ID_QM_CI_PORTAL_5,
  85480. + e_MODULE_ID_QM_CE_PORTAL_6,
  85481. + e_MODULE_ID_QM_CI_PORTAL_6,
  85482. + e_MODULE_ID_QM_CE_PORTAL_7,
  85483. + e_MODULE_ID_QM_CI_PORTAL_7,
  85484. + e_MODULE_ID_QM_CE_PORTAL_8,
  85485. + e_MODULE_ID_QM_CI_PORTAL_8,
  85486. + e_MODULE_ID_QM_CE_PORTAL_9,
  85487. + e_MODULE_ID_QM_CI_PORTAL_9,
  85488. + e_MODULE_ID_BM_CE_PORTAL_0,
  85489. + e_MODULE_ID_BM_CI_PORTAL_0,
  85490. + e_MODULE_ID_BM_CE_PORTAL_1,
  85491. + e_MODULE_ID_BM_CI_PORTAL_1,
  85492. + e_MODULE_ID_BM_CE_PORTAL_2,
  85493. + e_MODULE_ID_BM_CI_PORTAL_2,
  85494. + e_MODULE_ID_BM_CE_PORTAL_3,
  85495. + e_MODULE_ID_BM_CI_PORTAL_3,
  85496. + e_MODULE_ID_BM_CE_PORTAL_4,
  85497. + e_MODULE_ID_BM_CI_PORTAL_4,
  85498. + e_MODULE_ID_BM_CE_PORTAL_5,
  85499. + e_MODULE_ID_BM_CI_PORTAL_5,
  85500. + e_MODULE_ID_BM_CE_PORTAL_6,
  85501. + e_MODULE_ID_BM_CI_PORTAL_6,
  85502. + e_MODULE_ID_BM_CE_PORTAL_7,
  85503. + e_MODULE_ID_BM_CI_PORTAL_7,
  85504. + e_MODULE_ID_BM_CE_PORTAL_8,
  85505. + e_MODULE_ID_BM_CI_PORTAL_8,
  85506. + e_MODULE_ID_BM_CE_PORTAL_9,
  85507. + e_MODULE_ID_BM_CI_PORTAL_9,
  85508. + e_MODULE_ID_FM, /**< Frame manager module */
  85509. + e_MODULE_ID_FM_RTC, /**< FM Real-Time-Clock */
  85510. + e_MODULE_ID_FM_MURAM, /**< FM Multi-User-RAM */
  85511. + e_MODULE_ID_FM_BMI, /**< FM BMI block */
  85512. + e_MODULE_ID_FM_QMI, /**< FM QMI block */
  85513. + e_MODULE_ID_FM_PARSER, /**< FM parser block */
  85514. + e_MODULE_ID_FM_PORT_HO1, /**< FM Host-command/offline-parsing port block */
  85515. + e_MODULE_ID_FM_PORT_HO2, /**< FM Host-command/offline-parsing port block */
  85516. + e_MODULE_ID_FM_PORT_HO3, /**< FM Host-command/offline-parsing port block */
  85517. + e_MODULE_ID_FM_PORT_HO4, /**< FM Host-command/offline-parsing port block */
  85518. + e_MODULE_ID_FM_PORT_HO5, /**< FM Host-command/offline-parsing port block */
  85519. + e_MODULE_ID_FM_PORT_HO6, /**< FM Host-command/offline-parsing port block */
  85520. + e_MODULE_ID_FM_PORT_HO7, /**< FM Host-command/offline-parsing port block */
  85521. + e_MODULE_ID_FM_PORT_1GRx1, /**< FM Rx 1G MAC port block */
  85522. + e_MODULE_ID_FM_PORT_1GRx2, /**< FM Rx 1G MAC port block */
  85523. + e_MODULE_ID_FM_PORT_1GRx3, /**< FM Rx 1G MAC port block */
  85524. + e_MODULE_ID_FM_PORT_1GRx4, /**< FM Rx 1G MAC port block */
  85525. + e_MODULE_ID_FM_PORT_1GRx5, /**< FM Rx 1G MAC port block */
  85526. + e_MODULE_ID_FM_PORT_1GRx6, /**< FM Rx 1G MAC port block */
  85527. + e_MODULE_ID_FM_PORT_10GRx1, /**< FM Rx 10G MAC port block */
  85528. + e_MODULE_ID_FM_PORT_10GRx2, /**< FM Rx 10G MAC port block */
  85529. + e_MODULE_ID_FM_PORT_1GTx1, /**< FM Tx 1G MAC port block */
  85530. + e_MODULE_ID_FM_PORT_1GTx2, /**< FM Tx 1G MAC port block */
  85531. + e_MODULE_ID_FM_PORT_1GTx3, /**< FM Tx 1G MAC port block */
  85532. + e_MODULE_ID_FM_PORT_1GTx4, /**< FM Tx 1G MAC port block */
  85533. + e_MODULE_ID_FM_PORT_1GTx5, /**< FM Tx 1G MAC port block */
  85534. + e_MODULE_ID_FM_PORT_1GTx6, /**< FM Tx 1G MAC port block */
  85535. + e_MODULE_ID_FM_PORT_10GTx1, /**< FM Tx 10G MAC port block */
  85536. + e_MODULE_ID_FM_PORT_10GTx2, /**< FM Tx 10G MAC port block */
  85537. + e_MODULE_ID_FM_PLCR, /**< FM Policer */
  85538. + e_MODULE_ID_FM_KG, /**< FM Keygen */
  85539. + e_MODULE_ID_FM_DMA, /**< FM DMA */
  85540. + e_MODULE_ID_FM_FPM, /**< FM FPM */
  85541. + e_MODULE_ID_FM_IRAM, /**< FM Instruction-RAM */
  85542. + e_MODULE_ID_FM_1GMDIO, /**< FM 1G MDIO MAC */
  85543. + e_MODULE_ID_FM_10GMDIO, /**< FM 10G MDIO */
  85544. + e_MODULE_ID_FM_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
  85545. + e_MODULE_ID_FM_1GMAC1, /**< FM 1G MAC #1 */
  85546. + e_MODULE_ID_FM_1GMAC2, /**< FM 1G MAC #2 */
  85547. + e_MODULE_ID_FM_1GMAC3, /**< FM 1G MAC #3 */
  85548. + e_MODULE_ID_FM_1GMAC4, /**< FM 1G MAC #4 */
  85549. + e_MODULE_ID_FM_1GMAC5, /**< FM 1G MAC #5 */
  85550. + e_MODULE_ID_FM_1GMAC6, /**< FM 1G MAC #6 */
  85551. + e_MODULE_ID_FM_10GMAC1, /**< FM 10G MAC */
  85552. + e_MODULE_ID_FM_10GMAC2, /**< FM 10G MAC */
  85553. +
  85554. + e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */
  85555. + e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */
  85556. + e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */
  85557. + e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */
  85558. + e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */
  85559. + e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */
  85560. + e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */
  85561. + e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */
  85562. + e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */
  85563. + e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */
  85564. + e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */
  85565. + e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */
  85566. +
  85567. + e_MODULE_ID_PIC, /**< PIC */
  85568. + e_MODULE_ID_GPIO, /**< GPIO */
  85569. + e_MODULE_ID_SERDES, /**< SERDES */
  85570. + e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */
  85571. + e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */
  85572. +
  85573. + e_MODULE_ID_SRIO_PORTS, /**< RapidIO controller */
  85574. +
  85575. + e_MODULE_ID_DUMMY_LAST
  85576. +} e_ModuleId;
  85577. +
  85578. +#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST
  85579. +
  85580. +
  85581. +#endif /* __PART_INTEGRATION_EXT_H */
  85582. --- /dev/null
  85583. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/dpaa_integration_ext.h
  85584. @@ -0,0 +1,213 @@
  85585. +/*
  85586. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  85587. + *
  85588. + * Redistribution and use in source and binary forms, with or without
  85589. + * modification, are permitted provided that the following conditions are met:
  85590. + * * Redistributions of source code must retain the above copyright
  85591. + * notice, this list of conditions and the following disclaimer.
  85592. + * * Redistributions in binary form must reproduce the above copyright
  85593. + * notice, this list of conditions and the following disclaimer in the
  85594. + * documentation and/or other materials provided with the distribution.
  85595. + * * Neither the name of Freescale Semiconductor nor the
  85596. + * names of its contributors may be used to endorse or promote products
  85597. + * derived from this software without specific prior written permission.
  85598. + *
  85599. + *
  85600. + * ALTERNATIVELY, this software may be distributed under the terms of the
  85601. + * GNU General Public License ("GPL") as published by the Free Software
  85602. + * Foundation, either version 2 of that License or (at your option) any
  85603. + * later version.
  85604. + *
  85605. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  85606. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  85607. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  85608. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  85609. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  85610. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  85611. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  85612. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  85613. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  85614. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  85615. + */
  85616. +
  85617. +
  85618. +/**
  85619. +
  85620. + @File dpaa_integration_ext.h
  85621. +
  85622. + @Description P1023 FM external definitions and structures.
  85623. +*//***************************************************************************/
  85624. +#ifndef __DPAA_INTEGRATION_EXT_H
  85625. +#define __DPAA_INTEGRATION_EXT_H
  85626. +
  85627. +#include "std_ext.h"
  85628. +
  85629. +
  85630. +#define DPAA_VERSION 10
  85631. +
  85632. +typedef enum e_DpaaSwPortal {
  85633. + e_DPAA_SWPORTAL0 = 0,
  85634. + e_DPAA_SWPORTAL1,
  85635. + e_DPAA_SWPORTAL2,
  85636. + e_DPAA_SWPORTAL_DUMMY_LAST
  85637. +} e_DpaaSwPortal;
  85638. +
  85639. +typedef enum {
  85640. + e_DPAA_DCPORTAL0 = 0,
  85641. + e_DPAA_DCPORTAL2,
  85642. + e_DPAA_DCPORTAL_DUMMY_LAST
  85643. +} e_DpaaDcPortal;
  85644. +
  85645. +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST
  85646. +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST
  85647. +
  85648. +/*****************************************************************************
  85649. + QMAN INTEGRATION-SPECIFIC DEFINITIONS
  85650. +******************************************************************************/
  85651. +#define QM_MAX_NUM_OF_POOL_CHANNELS 3
  85652. +#define QM_MAX_NUM_OF_WQ 8
  85653. +#define QM_MAX_NUM_OF_SWP_AS 2
  85654. +#define QM_MAX_NUM_OF_CGS 64
  85655. +#define QM_MAX_NUM_OF_FQIDS (16*MEGABYTE)
  85656. +
  85657. +typedef enum {
  85658. + e_QM_FQ_CHANNEL_SWPORTAL0 = 0,
  85659. + e_QM_FQ_CHANNEL_SWPORTAL1,
  85660. + e_QM_FQ_CHANNEL_SWPORTAL2,
  85661. +
  85662. + e_QM_FQ_CHANNEL_POOL1 = 0x21,
  85663. + e_QM_FQ_CHANNEL_POOL2,
  85664. + e_QM_FQ_CHANNEL_POOL3,
  85665. +
  85666. + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x40,
  85667. + e_QM_FQ_CHANNEL_FMAN0_SP1,
  85668. + e_QM_FQ_CHANNEL_FMAN0_SP2,
  85669. + e_QM_FQ_CHANNEL_FMAN0_SP3,
  85670. + e_QM_FQ_CHANNEL_FMAN0_SP4,
  85671. + e_QM_FQ_CHANNEL_FMAN0_SP5,
  85672. + e_QM_FQ_CHANNEL_FMAN0_SP6,
  85673. +
  85674. +
  85675. + e_QM_FQ_CHANNEL_CAAM = 0x80
  85676. +} e_QmFQChannel;
  85677. +
  85678. +/*****************************************************************************
  85679. + BMAN INTEGRATION-SPECIFIC DEFINITIONS
  85680. +******************************************************************************/
  85681. +#define BM_MAX_NUM_OF_POOLS 8
  85682. +
  85683. +/*****************************************************************************
  85684. + SEC INTEGRATION-SPECIFIC DEFINITIONS
  85685. +******************************************************************************/
  85686. +#define SEC_NUM_OF_DECOS 2
  85687. +#define SEC_ALL_DECOS_MASK 0x00000003
  85688. +#define SEC_RNGB
  85689. +#define SEC_NO_ESP_TRAILER_REMOVAL
  85690. +
  85691. +/*****************************************************************************
  85692. + FM INTEGRATION-SPECIFIC DEFINITIONS
  85693. +******************************************************************************/
  85694. +#define INTG_MAX_NUM_OF_FM 1
  85695. +
  85696. +/* Ports defines */
  85697. +#define FM_MAX_NUM_OF_1G_MACS 2
  85698. +#define FM_MAX_NUM_OF_10G_MACS 0
  85699. +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
  85700. +#define FM_MAX_NUM_OF_OH_PORTS 5
  85701. +
  85702. +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS
  85703. +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS
  85704. +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
  85705. +
  85706. +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS
  85707. +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS
  85708. +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
  85709. +
  85710. +#define FM_MAX_NUM_OF_MACSECS 1
  85711. +
  85712. +#define FM_MACSEC_SUPPORT
  85713. +
  85714. +#define FM_LOW_END_RESTRICTION /* prevents the use of TX port 1 with OP port 0 */
  85715. +
  85716. +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 4 /**< Number of external BM pools per Rx port */
  85717. +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 2 /**< Number of Offline parsing port external BM pools per Rx port */
  85718. +#define FM_PORT_NUM_OF_CONGESTION_GRPS 32 /**< Total number of congestion groups in QM */
  85719. +#define FM_MAX_NUM_OF_SUB_PORTALS 7
  85720. +
  85721. +/* Rams defines */
  85722. +#define FM_MURAM_SIZE (64*KILOBYTE)
  85723. +#define FM_IRAM_SIZE(major, minor) (32 * KILOBYTE)
  85724. +#define FM_NUM_OF_CTRL 2
  85725. +
  85726. +/* PCD defines */
  85727. +#define FM_PCD_PLCR_NUM_ENTRIES 32 /**< Total number of policer profiles */
  85728. +#define FM_PCD_KG_NUM_OF_SCHEMES 16 /**< Total number of KG schemes */
  85729. +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 128 /**< Number of classification plan entries. */
  85730. +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000240 /**< Number of bytes saved for patches */
  85731. +#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */
  85732. +
  85733. +/* RTC defines */
  85734. +#define FM_RTC_NUM_OF_ALARMS 2
  85735. +#define FM_RTC_NUM_OF_PERIODIC_PULSES 2
  85736. +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2
  85737. +
  85738. +/* QMI defines */
  85739. +#define QMI_MAX_NUM_OF_TNUMS 15
  85740. +
  85741. +/* FPM defines */
  85742. +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4
  85743. +
  85744. +/* DMA defines */
  85745. +#define DMA_THRESH_MAX_COMMQ 15
  85746. +#define DMA_THRESH_MAX_BUF 7
  85747. +
  85748. +/* BMI defines */
  85749. +#define BMI_MAX_NUM_OF_TASKS 64
  85750. +#define BMI_MAX_NUM_OF_DMAS 16
  85751. +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)
  85752. +#define PORT_MAX_WEIGHT 4
  85753. +
  85754. +/*****************************************************************************
  85755. + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
  85756. +******************************************************************************/
  85757. +#define NUM_OF_RX_SC 16
  85758. +#define NUM_OF_TX_SC 16
  85759. +
  85760. +#define NUM_OF_SA_PER_RX_SC 2
  85761. +#define NUM_OF_SA_PER_TX_SC 2
  85762. +
  85763. +/**************************************************************************//**
  85764. + @Description Enum for inter-module interrupts registration
  85765. +*//***************************************************************************/
  85766. +
  85767. +/* 1023 unique features */
  85768. +#define FM_QMI_NO_ECC_EXCEPTIONS
  85769. +#define FM_CSI_CFED_LIMIT
  85770. +#define FM_PEDANTIC_DMA
  85771. +#define FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  85772. +#define FM_FIFO_ALLOCATION_ALG
  85773. +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP
  85774. +#define FM_HAS_TOTAL_DMAS
  85775. +#define FM_KG_NO_IPPID_SUPPORT
  85776. +#define FM_NO_GUARANTEED_RESET_VALUES
  85777. +#define FM_MAC_RESET
  85778. +
  85779. +/* FM erratas */
  85780. +#define FM_RX_PREAM_4_ERRATA_DTSEC_A001
  85781. +#define FM_MAGIC_PACKET_UNRECOGNIZED_ERRATA_DTSEC2 /* No implementation, Out of LLD scope */
  85782. +
  85783. +#define FM_DEBUG_TRACE_FMAN_A004 /* No implementation, Out of LLD scope */
  85784. +#define FM_INT_BUF_LEAK_FMAN_A005 /* No implementation, Out of LLD scope. App must avoid S/G */
  85785. +
  85786. +#define FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839
  85787. +
  85788. +/* #define FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173 */
  85789. +
  85790. +/*
  85791. +TKT056919 - axi12axi0 can hang if read request follows the single byte write on the very next cycle
  85792. +TKT038900 - FM dma lockup occur due to AXI slave protocol violation
  85793. +*/
  85794. +#define FM_LOCKUP_ALIGNMENT_ERRATA_FMAN_SW004
  85795. +
  85796. +
  85797. +#endif /* __DPAA_INTEGRATION_EXT_H */
  85798. --- /dev/null
  85799. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_ext.h
  85800. @@ -0,0 +1,82 @@
  85801. +/*
  85802. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  85803. + *
  85804. + * Redistribution and use in source and binary forms, with or without
  85805. + * modification, are permitted provided that the following conditions are met:
  85806. + * * Redistributions of source code must retain the above copyright
  85807. + * notice, this list of conditions and the following disclaimer.
  85808. + * * Redistributions in binary form must reproduce the above copyright
  85809. + * notice, this list of conditions and the following disclaimer in the
  85810. + * documentation and/or other materials provided with the distribution.
  85811. + * * Neither the name of Freescale Semiconductor nor the
  85812. + * names of its contributors may be used to endorse or promote products
  85813. + * derived from this software without specific prior written permission.
  85814. + *
  85815. + *
  85816. + * ALTERNATIVELY, this software may be distributed under the terms of the
  85817. + * GNU General Public License ("GPL") as published by the Free Software
  85818. + * Foundation, either version 2 of that License or (at your option) any
  85819. + * later version.
  85820. + *
  85821. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  85822. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  85823. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  85824. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  85825. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  85826. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  85827. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  85828. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  85829. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  85830. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  85831. + */
  85832. +
  85833. +
  85834. +/**************************************************************************//**
  85835. +
  85836. + @File part_ext.h
  85837. +
  85838. + @Description Definitions for the part (integration) module.
  85839. +*//***************************************************************************/
  85840. +
  85841. +#ifndef __PART_EXT_H
  85842. +#define __PART_EXT_H
  85843. +
  85844. +#include "std_ext.h"
  85845. +#include "part_integration_ext.h"
  85846. +
  85847. +
  85848. +#if !(defined(MPC8306) || \
  85849. + defined(MPC8309) || \
  85850. + defined(MPC834x) || \
  85851. + defined(MPC836x) || \
  85852. + defined(MPC832x) || \
  85853. + defined(MPC837x) || \
  85854. + defined(MPC8568) || \
  85855. + defined(MPC8569) || \
  85856. + defined(P1020) || \
  85857. + defined(P1021) || \
  85858. + defined(P1022) || \
  85859. + defined(P1023) || \
  85860. + defined(P2020) || \
  85861. + defined(P3041) || \
  85862. + defined(P4080) || \
  85863. + defined(P5020) || \
  85864. + defined(MSC814x))
  85865. +#error "unable to proceed without chip-definition"
  85866. +#endif
  85867. +
  85868. +
  85869. +/**************************************************************************//*
  85870. + @Description Part data structure - must be contained in any integration
  85871. + data structure.
  85872. +*//***************************************************************************/
  85873. +typedef struct t_Part
  85874. +{
  85875. + uint64_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
  85876. + /**< Returns the address of the module's memory map base. */
  85877. + e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uint64_t baseAddress);
  85878. + /**< Returns the module's ID according to its memory map base. */
  85879. +} t_Part;
  85880. +
  85881. +
  85882. +#endif /* __PART_EXT_H */
  85883. --- /dev/null
  85884. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P1023/part_integration_ext.h
  85885. @@ -0,0 +1,635 @@
  85886. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  85887. + * All rights reserved.
  85888. + *
  85889. + * Redistribution and use in source and binary forms, with or without
  85890. + * modification, are permitted provided that the following conditions are met:
  85891. + * * Redistributions of source code must retain the above copyright
  85892. + * notice, this list of conditions and the following disclaimer.
  85893. + * * Redistributions in binary form must reproduce the above copyright
  85894. + * notice, this list of conditions and the following disclaimer in the
  85895. + * documentation and/or other materials provided with the distribution.
  85896. + * * Neither the name of Freescale Semiconductor nor the
  85897. + * names of its contributors may be used to endorse or promote products
  85898. + * derived from this software without specific prior written permission.
  85899. + *
  85900. + *
  85901. + * ALTERNATIVELY, this software may be distributed under the terms of the
  85902. + * GNU General Public License ("GPL") as published by the Free Software
  85903. + * Foundation, either version 2 of that License or (at your option) any
  85904. + * later version.
  85905. + *
  85906. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  85907. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  85908. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  85909. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  85910. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  85911. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  85912. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  85913. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  85914. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  85915. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  85916. + */
  85917. +
  85918. +/**************************************************************************//**
  85919. + @File part_integration_ext.h
  85920. +
  85921. + @Description P1023 external definitions and structures.
  85922. +*//***************************************************************************/
  85923. +#ifndef __PART_INTEGRATION_EXT_H
  85924. +#define __PART_INTEGRATION_EXT_H
  85925. +
  85926. +#include "std_ext.h"
  85927. +#include "dpaa_integration_ext.h"
  85928. +
  85929. +
  85930. +/**************************************************************************//**
  85931. + @Group 1023_chip_id P1023 Application Programming Interface
  85932. +
  85933. + @Description P1023 Chip functions,definitions and enums.
  85934. +
  85935. + @{
  85936. +*//***************************************************************************/
  85937. +
  85938. +#define INTG_MAX_NUM_OF_CORES 2
  85939. +
  85940. +
  85941. +/**************************************************************************//**
  85942. + @Description Module types.
  85943. +*//***************************************************************************/
  85944. +typedef enum e_ModuleId
  85945. +{
  85946. + e_MODULE_ID_LAW, /**< Local Access module */
  85947. + e_MODULE_ID_ECM, /**< e500 Coherency Module */
  85948. + e_MODULE_ID_DDR, /**< DDR memory controller */
  85949. + e_MODULE_ID_I2C_1, /**< I2C 1 */
  85950. + e_MODULE_ID_I2C_2, /**< I2C 1 */
  85951. + e_MODULE_ID_DUART_1, /**< DUART module 1 */
  85952. + e_MODULE_ID_DUART_2, /**< DUART module 2 */
  85953. + e_MODULE_ID_LBC, /**< Local bus memory controller module */
  85954. + e_MODULE_ID_PCIE_1, /**< PCI Express 1 controller module */
  85955. + e_MODULE_ID_PCIE_ATMU_1, /**< PCI 1 ATMU Window */
  85956. + e_MODULE_ID_PCIE_2, /**< PCI Express 2 controller module */
  85957. + e_MODULE_ID_PCIE_ATMU_2, /**< PCI 2 ATMU Window */
  85958. + e_MODULE_ID_PCIE_3, /**< PCI Express 3 controller module */
  85959. + e_MODULE_ID_PCIE_ATMU_3, /**< PCI 3 ATMU Window */
  85960. + e_MODULE_ID_MSI, /**< MSI registers */
  85961. + e_MODULE_ID_L2_SRAM, /**< L2/SRAM Memory-Mapped controller module */
  85962. + e_MODULE_ID_DMA_1, /**< DMA controller 1 */
  85963. + e_MODULE_ID_DMA_2, /**< DMA controller 2 */
  85964. + e_MODULE_ID_EPIC, /**< Programmable interrupt controller */
  85965. + e_MODULE_ID_ESPI, /**< ESPI module */
  85966. + e_MODULE_ID_GPIO, /**< General Purpose I/O */
  85967. + e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */
  85968. + e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */
  85969. + e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */
  85970. + e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */
  85971. + e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */
  85972. + e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */
  85973. + e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */
  85974. + e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */
  85975. + e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */
  85976. + e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */
  85977. + e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */
  85978. + e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */
  85979. + e_MODULE_ID_USB_DR_1, /**< USB 2.0 module 1 */
  85980. + e_MODULE_ID_USB_DR_2, /**< USB 2.0 module 2 */
  85981. + e_MODULE_ID_ETSEC_MII_MNG, /**< MII MNG registers */
  85982. + e_MODULE_ID_ETSEC_1, /**< ETSEC module 1 */
  85983. + e_MODULE_ID_ETSEC_2, /**< ETSEC module 2 */
  85984. + e_MODULE_ID_GUTS, /**< Serial DMA */
  85985. + e_MODULE_ID_PM, /**< Performance Monitor module */
  85986. + e_MODULE_ID_QM, /**< Queue manager module */
  85987. + e_MODULE_ID_BM, /**< Buffer manager module */
  85988. + e_MODULE_ID_QM_CE_PORTAL,
  85989. + e_MODULE_ID_QM_CI_PORTAL,
  85990. + e_MODULE_ID_BM_CE_PORTAL,
  85991. + e_MODULE_ID_BM_CI_PORTAL,
  85992. + e_MODULE_ID_FM, /**< Frame manager #1 module */
  85993. + e_MODULE_ID_FM_RTC, /**< FM Real-Time-Clock */
  85994. + e_MODULE_ID_FM_MURAM, /**< FM Multi-User-RAM */
  85995. + e_MODULE_ID_FM_BMI, /**< FM BMI block */
  85996. + e_MODULE_ID_FM_QMI, /**< FM QMI block */
  85997. + e_MODULE_ID_FM_PRS, /**< FM parser block */
  85998. + e_MODULE_ID_FM_PORT_HO0, /**< FM Host-command/offline-parsing port block */
  85999. + e_MODULE_ID_FM_PORT_HO1, /**< FM Host-command/offline-parsing port block */
  86000. + e_MODULE_ID_FM_PORT_HO2, /**< FM Host-command/offline-parsing port block */
  86001. + e_MODULE_ID_FM_PORT_HO3, /**< FM Host-command/offline-parsing port block */
  86002. + e_MODULE_ID_FM_PORT_HO4, /**< FM Host-command/offline-parsing port block */
  86003. + e_MODULE_ID_FM_PORT_1GRx0, /**< FM Rx 1G MAC port block */
  86004. + e_MODULE_ID_FM_PORT_1GRx1, /**< FM Rx 1G MAC port block */
  86005. + e_MODULE_ID_FM_PORT_1GTx0, /**< FM Tx 1G MAC port block */
  86006. + e_MODULE_ID_FM_PORT_1GTx1, /**< FM Tx 1G MAC port block */
  86007. + e_MODULE_ID_FM_PLCR, /**< FM Policer */
  86008. + e_MODULE_ID_FM_KG, /**< FM Keygen */
  86009. + e_MODULE_ID_FM_DMA, /**< FM DMA */
  86010. + e_MODULE_ID_FM_FPM, /**< FM FPM */
  86011. + e_MODULE_ID_FM_IRAM, /**< FM Instruction-RAM */
  86012. + e_MODULE_ID_FM_1GMDIO0, /**< FM 1G MDIO MAC 0*/
  86013. + e_MODULE_ID_FM_1GMDIO1, /**< FM 1G MDIO MAC 1*/
  86014. + e_MODULE_ID_FM_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
  86015. + e_MODULE_ID_FM_RISC0, /**< FM risc #0 */
  86016. + e_MODULE_ID_FM_RISC1, /**< FM risc #1 */
  86017. + e_MODULE_ID_FM_1GMAC0, /**< FM 1G MAC #0 */
  86018. + e_MODULE_ID_FM_1GMAC1, /**< FM 1G MAC #1 */
  86019. + e_MODULE_ID_FM_MACSEC, /**< FM MACSEC */
  86020. +
  86021. + e_MODULE_ID_DUMMY_LAST
  86022. +} e_ModuleId;
  86023. +
  86024. +#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST
  86025. +
  86026. +
  86027. +#define P1023_OFFSET_LAW 0x00000C08
  86028. +#define P1023_OFFSET_ECM 0x00001000
  86029. +#define P1023_OFFSET_DDR 0x00002000
  86030. +#define P1023_OFFSET_I2C1 0x00003000
  86031. +#define P1023_OFFSET_I2C2 0x00003100
  86032. +#define P1023_OFFSET_DUART1 0x00004500
  86033. +#define P1023_OFFSET_DUART2 0x00004600
  86034. +#define P1023_OFFSET_LBC 0x00005000
  86035. +#define P1023_OFFSET_ESPI 0x00007000
  86036. +#define P1023_OFFSET_PCIE2 0x00009000
  86037. +#define P1023_OFFSET_PCIE2_ATMU 0x00009C00
  86038. +#define P1023_OFFSET_PCIE1 0x0000A000
  86039. +#define P1023_OFFSET_PCIE1_ATMU 0x0000AC00
  86040. +#define P1023_OFFSET_PCIE3 0x0000B000
  86041. +#define P1023_OFFSET_PCIE3_ATMU 0x0000BC00
  86042. +#define P1023_OFFSET_DMA2 0x0000C100
  86043. +#define P1023_OFFSET_GPIO 0x0000F000
  86044. +#define P1023_OFFSET_L2_SRAM 0x00020000
  86045. +#define P1023_OFFSET_DMA1 0x00021100
  86046. +#define P1023_OFFSET_USB1 0x00022000
  86047. +#define P1023_OFFSET_SEC_GEN 0x00030000
  86048. +#define P1023_OFFSET_SEC_JQ0 0x00031000
  86049. +#define P1023_OFFSET_SEC_JQ1 0x00032000
  86050. +#define P1023_OFFSET_SEC_JQ2 0x00033000
  86051. +#define P1023_OFFSET_SEC_JQ3 0x00034000
  86052. +#define P1023_OFFSET_SEC_RTIC 0x00036000
  86053. +#define P1023_OFFSET_SEC_QI 0x00037000
  86054. +#define P1023_OFFSET_SEC_DECO0_CCB0 0x00038000
  86055. +#define P1023_OFFSET_SEC_DECO1_CCB1 0x00039000
  86056. +#define P1023_OFFSET_SEC_DECO2_CCB2 0x0003a000
  86057. +#define P1023_OFFSET_SEC_DECO3_CCB3 0x0003b000
  86058. +#define P1023_OFFSET_SEC_DECO4_CCB4 0x0003c000
  86059. +#define P1023_OFFSET_PIC 0x00040000
  86060. +#define P1023_OFFSET_MSI 0x00041600
  86061. +#define P1023_OFFSET_AXI 0x00081000
  86062. +#define P1023_OFFSET_QM 0x00088000
  86063. +#define P1023_OFFSET_BM 0x0008A000
  86064. +#define P1022_OFFSET_PM 0x000E1000
  86065. +
  86066. +#define P1023_OFFSET_GUTIL 0x000E0000
  86067. +#define P1023_OFFSET_PM 0x000E1000
  86068. +#define P1023_OFFSET_DEBUG 0x000E2000
  86069. +#define P1023_OFFSET_SERDES 0x000E3000
  86070. +#define P1023_OFFSET_ROM 0x000F0000
  86071. +#define P1023_OFFSET_FM 0x00100000
  86072. +
  86073. +#define P1023_OFFSET_FM_MURAM (P1023_OFFSET_FM + 0x00000000)
  86074. +#define P1023_OFFSET_FM_BMI (P1023_OFFSET_FM + 0x00080000)
  86075. +#define P1023_OFFSET_FM_QMI (P1023_OFFSET_FM + 0x00080400)
  86076. +#define P1023_OFFSET_FM_PRS (P1023_OFFSET_FM + 0x00080800)
  86077. +#define P1023_OFFSET_FM_PORT_HO0 (P1023_OFFSET_FM + 0x00081000)
  86078. +#define P1023_OFFSET_FM_PORT_HO1 (P1023_OFFSET_FM + 0x00082000)
  86079. +#define P1023_OFFSET_FM_PORT_HO2 (P1023_OFFSET_FM + 0x00083000)
  86080. +#define P1023_OFFSET_FM_PORT_HO3 (P1023_OFFSET_FM + 0x00084000)
  86081. +#define P1023_OFFSET_FM_PORT_HO4 (P1023_OFFSET_FM + 0x00085000)
  86082. +#define P1023_OFFSET_FM_PORT_1GRX0 (P1023_OFFSET_FM + 0x00088000)
  86083. +#define P1023_OFFSET_FM_PORT_1GRX1 (P1023_OFFSET_FM + 0x00089000)
  86084. +#define P1023_OFFSET_FM_PORT_1GTX0 (P1023_OFFSET_FM + 0x000A8000)
  86085. +#define P1023_OFFSET_FM_PORT_1GTX1 (P1023_OFFSET_FM + 0x000A9000)
  86086. +#define P1023_OFFSET_FM_PLCR (P1023_OFFSET_FM + 0x000C0000)
  86087. +#define P1023_OFFSET_FM_KG (P1023_OFFSET_FM + 0x000C1000)
  86088. +#define P1023_OFFSET_FM_DMA (P1023_OFFSET_FM + 0x000C2000)
  86089. +#define P1023_OFFSET_FM_FPM (P1023_OFFSET_FM + 0x000C3000)
  86090. +#define P1023_OFFSET_FM_IRAM (P1023_OFFSET_FM + 0x000C4000)
  86091. +#define P1023_OFFSET_FM_PRS_IRAM (P1023_OFFSET_FM + 0x000C7000)
  86092. +#define P1023_OFFSET_FM_RISC0 (P1023_OFFSET_FM + 0x000D0000)
  86093. +#define P1023_OFFSET_FM_RISC1 (P1023_OFFSET_FM + 0x000D0400)
  86094. +#define P1023_OFFSET_FM_MACSEC (P1023_OFFSET_FM + 0x000D8000)
  86095. +#define P1023_OFFSET_FM_1GMAC0 (P1023_OFFSET_FM + 0x000E0000)
  86096. +#define P1023_OFFSET_FM_1GMDIO0 (P1023_OFFSET_FM + 0x000E1120)
  86097. +#define P1023_OFFSET_FM_1GMAC1 (P1023_OFFSET_FM + 0x000E2000)
  86098. +#define P1023_OFFSET_FM_1GMDIO1 (P1023_OFFSET_FM + 0x000E3000)
  86099. +#define P1023_OFFSET_FM_RTC (P1023_OFFSET_FM + 0x000FE000)
  86100. +
  86101. +/* Offsets relative to QM or BM portals base */
  86102. +#define P1023_OFFSET_PORTALS_CE_AREA 0x00000000 /* cache enabled area */
  86103. +#define P1023_OFFSET_PORTALS_CI_AREA 0x00100000 /* cache inhibited area */
  86104. +
  86105. +#define P1023_OFFSET_PORTALS_CE(portal) (P1023_OFFSET_PORTALS_CE_AREA + 0x4000 * (portal))
  86106. +#define P1023_OFFSET_PORTALS_CI(portal) (P1023_OFFSET_PORTALS_CI_AREA + 0x1000 * (portal))
  86107. +
  86108. +/**************************************************************************//**
  86109. + @Description Transaction source ID (for memory controllers error reporting).
  86110. +*//***************************************************************************/
  86111. +typedef enum e_TransSrc
  86112. +{
  86113. + e_TRANS_SRC_PCIE_2 = 0x01, /**< PCIe port 2 */
  86114. + e_TRANS_SRC_PCIE_1 = 0x02, /**< PCIe port 1 */
  86115. + e_TRANS_SRC_PCIE_3 = 0x03, /**< PCIe port 3 */
  86116. + e_TRANS_SRC_LBC = 0x04, /**< Enhanced local bus */
  86117. + e_TRANS_SRC_DPAA_SW_PORTALS = 0x0E, /**< DPAA software portals or SRAM */
  86118. + e_TRANS_SRC_DDR = 0x0F, /**< DDR controller */
  86119. + e_TRANS_SRC_CORE_INS_FETCH = 0x10, /**< Processor (instruction) */
  86120. + e_TRANS_SRC_CORE_DATA = 0x11, /**< Processor (data) */
  86121. + e_TRANS_SRC_DMA = 0x15 /**< DMA */
  86122. +} e_TransSrc;
  86123. +
  86124. +/**************************************************************************//**
  86125. + @Description Local Access Window Target interface ID
  86126. +*//***************************************************************************/
  86127. +typedef enum e_P1023LawTargetId
  86128. +{
  86129. + e_P1023_LAW_TARGET_PCIE_2 = 0x01, /**< PCI Express 2 target interface */
  86130. + e_P1023_LAW_TARGET_PCIE_1 = 0x02, /**< PCI Express 1 target interface */
  86131. + e_P1023_LAW_TARGET_PCIE_3 = 0x03, /**< PCI Express 3 target interface */
  86132. + e_P1023_LAW_TARGET_LBC = 0x04, /**< Local bus target interface */
  86133. + e_P1023_LAW_TARGET_QM_PORTALS = 0x0E, /**< Queue Manager Portals */
  86134. + e_P1023_LAW_TARGET_BM_PORTALS = 0x0E, /**< Buffer Manager Portals */
  86135. + e_P1023_LAW_TARGET_SRAM = 0x0E, /**< SRAM scratchpad */
  86136. + e_P1023_LAW_TARGET_DDR = 0x0F, /**< DDR target interface */
  86137. + e_P1023_LAW_TARGET_NONE = 0xFF /**< Invalid target interface */
  86138. +} e_P1023LawTargetId;
  86139. +
  86140. +
  86141. +/**************************************************************************//**
  86142. + @Group 1023_init_grp P1023 Initialization Unit
  86143. +
  86144. + @Description P1023 initialization unit API functions, definitions and enums
  86145. +
  86146. + @{
  86147. +*//***************************************************************************/
  86148. +
  86149. +/**************************************************************************//**
  86150. + @Description Part ID and revision number
  86151. +*//***************************************************************************/
  86152. +typedef enum e_P1023DeviceName
  86153. +{
  86154. + e_P1023_REV_INVALID = 0x00000000, /**< Invalid revision */
  86155. + e_SC1023_REV_1_0 = (int)0x80FC0010, /**< SC1023 rev 1.0 */
  86156. + e_SC1023_REV_1_1 = (int)0x80FC0011, /**< SC1023 rev 1.1 */
  86157. + e_P1023_REV_1_0 = (int)0x80FE0010, /**< P1023 rev 1.0 with security */
  86158. + e_P1023_REV_1_1 = (int)0x80FE0011, /**< P1023 rev 1.1 with security */
  86159. + e_P1017_REV_1_1 = (int)0x80FF0011, /**< P1017 rev 1.1 with security */
  86160. + e_P1023_REV_1_0_NO_SEC = (int)0x80F60010, /**< P1023 rev 1.0 without security */
  86161. + e_P1023_REV_1_1_NO_SEC = (int)0x80F60011, /**< P1023 rev 1.1 without security */
  86162. + e_P1017_REV_1_1_NO_SEC = (int)0x80F70011 /**< P1017 rev 1.1 without security */
  86163. +} e_P1023DeviceName;
  86164. +
  86165. +/**************************************************************************//**
  86166. + @Description structure representing P1023 initialization parameters
  86167. +*//***************************************************************************/
  86168. +typedef struct t_P1023Params
  86169. +{
  86170. + uintptr_t ccsrBaseAddress; /**< CCSR base address (virtual) */
  86171. + uintptr_t bmPortalsBaseAddress; /**< Portals base address (virtual) */
  86172. + uintptr_t qmPortalsBaseAddress; /**< Portals base address (virtual) */
  86173. +} t_P1023Params;
  86174. +
  86175. +/**************************************************************************//**
  86176. + @Function P1023_ConfigAndInit
  86177. +
  86178. + @Description General initiation of the chip registers.
  86179. +
  86180. + @Param[in] p_P1023Params - A pointer to data structure of parameters
  86181. +
  86182. + @Return A handle to the P1023 data structure.
  86183. +*//***************************************************************************/
  86184. +t_Handle P1023_ConfigAndInit(t_P1023Params *p_P1023Params);
  86185. +
  86186. +/**************************************************************************//**
  86187. + @Function P1023_Free
  86188. +
  86189. + @Description Free all resources.
  86190. +
  86191. + @Param h_P1023 - (In) The handle of the initialized P1023 object.
  86192. +
  86193. + @Return E_OK on success; Other value otherwise.
  86194. +*//***************************************************************************/
  86195. +t_Error P1023_Free(t_Handle h_P1023);
  86196. +
  86197. +/**************************************************************************//**
  86198. + @Function P1023_GetRevInfo
  86199. +
  86200. + @Description This routine enables access to chip and revision information.
  86201. +
  86202. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86203. +
  86204. + @Return Part ID and revision.
  86205. +*//***************************************************************************/
  86206. +e_P1023DeviceName P1023_GetRevInfo(uintptr_t gutilBase);
  86207. +
  86208. +/**************************************************************************//**
  86209. + @Function P1023_GetE500Factor
  86210. +
  86211. + @Description Returns E500 core clock multiplication factor.
  86212. +
  86213. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86214. + @Param[in] coreId - Id of the requested core.
  86215. + @Param[out] p_E500MulFactor - Returns E500 to CCB multification factor.
  86216. + @Param[out] p_E500DivFactor - Returns E500 to CCB division factor.
  86217. +
  86218. + @Return E_OK on success; Other value otherwise.
  86219. +*
  86220. +*//***************************************************************************/
  86221. +t_Error P1023_GetE500Factor(uintptr_t gutilBase,
  86222. + uint32_t coreId,
  86223. + uint32_t *p_E500MulFactor,
  86224. + uint32_t *p_E500DivFactor);
  86225. +
  86226. +/**************************************************************************//**
  86227. + @Function P1023_GetFmFactor
  86228. +
  86229. + @Description returns FM multiplication factors. (This value is returned using
  86230. + two parameters to avoid using float parameter).
  86231. +
  86232. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86233. + @Param[out] p_FmMulFactor - returns E500 to CCB multification factor.
  86234. + @Param[out] p_FmDivFactor - returns E500 to CCB division factor.
  86235. +
  86236. + @Return E_OK on success; Other value otherwise.
  86237. +*//***************************************************************************/
  86238. +t_Error P1023_GetFmFactor(uintptr_t gutilBase, uint32_t *p_FmMulFactor, uint32_t *p_FmDivFactor);
  86239. +
  86240. +/**************************************************************************//**
  86241. + @Function P1023_GetCcbFactor
  86242. +
  86243. + @Description returns system multiplication factor.
  86244. +
  86245. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86246. +
  86247. + @Return System multiplication factor.
  86248. +*//***************************************************************************/
  86249. +uint32_t P1023_GetCcbFactor(uintptr_t gutilBase);
  86250. +
  86251. +#if 0
  86252. +/**************************************************************************//**
  86253. + @Function P1023_GetDdrFactor
  86254. +
  86255. + @Description returns the multiplication factor of the clock in for the DDR clock .
  86256. + Note: assumes the ddr_in_clk is identical to the sys_in_clk
  86257. +
  86258. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86259. + @Param p_DdrMulFactor - returns DDR in clk multification factor.
  86260. + @Param p_DdrDivFactor - returns DDR division factor.
  86261. +
  86262. + @Return E_OK on success; Other value otherwise..
  86263. +*//***************************************************************************/
  86264. +t_Error P1023_GetDdrFactor( uintptr_t gutilBase,
  86265. + uint32_t *p_DdrMulFactor,
  86266. + uint32_t *p_DdrDivFactor);
  86267. +
  86268. +/**************************************************************************//**
  86269. + @Function P1023_GetDdrType
  86270. +
  86271. + @Description returns the multiplication factor of the clock in for the DDR clock .
  86272. +
  86273. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86274. + @Param p_DdrType - (Out) returns DDR type DDR1/DDR2/DDR3.
  86275. +
  86276. + @Return E_OK on success; Other value otherwise.
  86277. +*//***************************************************************************/
  86278. +t_Error P1023_GetDdrType(uintptr_t gutilBase, e_DdrType *p_DdrType );
  86279. +#endif
  86280. +
  86281. +/** @} */ /* end of 1023_init_grp group */
  86282. +/** @} */ /* end of 1023_grp group */
  86283. +
  86284. +#define CORE_E500V2
  86285. +
  86286. +#if 0 /* using unified values */
  86287. +/*****************************************************************************
  86288. + INTEGRATION-SPECIFIC MODULE CODES
  86289. +******************************************************************************/
  86290. +#define MODULE_UNKNOWN 0x00000000
  86291. +#define MODULE_MEM 0x00010000
  86292. +#define MODULE_MM 0x00020000
  86293. +#define MODULE_CORE 0x00030000
  86294. +#define MODULE_P1023 0x00040000
  86295. +#define MODULE_MII 0x00050000
  86296. +#define MODULE_PM 0x00060000
  86297. +#define MODULE_MMU 0x00070000
  86298. +#define MODULE_PIC 0x00080000
  86299. +#define MODULE_L2_CACHE 0x00090000
  86300. +#define MODULE_DUART 0x000a0000
  86301. +#define MODULE_SERDES 0x000b0000
  86302. +#define MODULE_PIO 0x000c0000
  86303. +#define MODULE_QM 0x000d0000
  86304. +#define MODULE_BM 0x000e0000
  86305. +#define MODULE_SEC 0x000f0000
  86306. +#define MODULE_FM 0x00100000
  86307. +#define MODULE_FM_MURAM 0x00110000
  86308. +#define MODULE_FM_PCD 0x00120000
  86309. +#define MODULE_FM_RTC 0x00130000
  86310. +#define MODULE_FM_MAC 0x00140000
  86311. +#define MODULE_FM_PORT 0x00150000
  86312. +#define MODULE_FM_MACSEC 0x00160000
  86313. +#define MODULE_FM_MACSEC_SECY 0x00170000
  86314. +#define MODULE_FM_SP 0x00280000
  86315. +#define MODULE_ECM 0x00190000
  86316. +#define MODULE_DMA 0x001a0000
  86317. +#define MODULE_DDR 0x001b0000
  86318. +#define MODULE_LAW 0x001c0000
  86319. +#define MODULE_LBC 0x001d0000
  86320. +#define MODULE_I2C 0x001e0000
  86321. +#define MODULE_ESPI 0x001f0000
  86322. +#define MODULE_PCI 0x00200000
  86323. +#define MODULE_DPA_PORT 0x00210000
  86324. +#define MODULE_USB 0x00220000
  86325. +#endif /* using unified values */
  86326. +
  86327. +/*****************************************************************************
  86328. + LBC INTEGRATION-SPECIFIC DEFINITIONS
  86329. +******************************************************************************/
  86330. +/**************************************************************************//**
  86331. + @Group lbc_exception_grp LBC Exception Unit
  86332. +
  86333. + @Description LBC Exception unit API functions, definitions and enums
  86334. +
  86335. + @{
  86336. +*//***************************************************************************/
  86337. +
  86338. +/**************************************************************************//**
  86339. + @Anchor lbc_exbm
  86340. +
  86341. + @Collection LBC Errors Bit Mask
  86342. +
  86343. + These errors are reported through the exceptions callback..
  86344. + The values can be or'ed in any combination in the errors mask
  86345. + parameter of the errors report structure.
  86346. +
  86347. + These errors can also be passed as a bit-mask to
  86348. + LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
  86349. + for enabling or disabling error checking.
  86350. + @{
  86351. +*//***************************************************************************/
  86352. +#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */
  86353. +#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */
  86354. +#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */
  86355. +#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */
  86356. +
  86357. +#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
  86358. + LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT)
  86359. + /**< All possible errors */
  86360. +/* @} */
  86361. +/** @} */ /* end of lbc_exception_grp group */
  86362. +
  86363. +#define LBC_NUM_OF_BANKS 2
  86364. +#define LBC_MAX_CS_SIZE 0x0000000100000000LL
  86365. +#define LBC_ATOMIC_OPERATION_SUPPORT
  86366. +#define LBC_PARITY_SUPPORT
  86367. +#define LBC_ADDRESS_SHIFT_SUPPORT
  86368. +#define LBC_ADDRESS_HOLD_TIME_CTRL
  86369. +#define LBC_HIGH_CLK_DIVIDERS
  86370. +#define LBC_FCM_AVAILABLE
  86371. +
  86372. +
  86373. +/*****************************************************************************
  86374. + LAW INTEGRATION-SPECIFIC DEFINITIONS
  86375. +******************************************************************************/
  86376. +#define LAW_ARCH_CCB
  86377. +#define LAW_NUM_OF_WINDOWS 12
  86378. +#define LAW_MIN_WINDOW_SIZE 0x0000000000001000LL /**< 4KB */
  86379. +#define LAW_MAX_WINDOW_SIZE 0x0000001000000000LL /**< 32GB */
  86380. +
  86381. +
  86382. +/*****************************************************************************
  86383. + SPI INTEGRATION-SPECIFIC DEFINITIONS
  86384. +******************************************************************************/
  86385. +#define SPI_NUM_OF_CONTROLLERS 1
  86386. +
  86387. +/*****************************************************************************
  86388. + PCI/PCIe INTEGRATION-SPECIFIC DEFINITIONS
  86389. +******************************************************************************/
  86390. +
  86391. +#define PCI_MAX_INBOUND_WINDOWS_NUM 4
  86392. +#define PCI_MAX_OUTBOUND_WINDOWS_NUM 5
  86393. +
  86394. +/**************************************************************************//**
  86395. + @Description Target interface of an inbound window
  86396. +*//***************************************************************************/
  86397. +typedef enum e_PciTargetInterface
  86398. +{
  86399. + e_PCI_TARGET_PCIE_2 = 0x1, /**< PCI Express target interface 2 */
  86400. + e_PCI_TARGET_PCIE_1 = 0x2, /**< PCI Express target interface 1 */
  86401. + e_PCI_TARGET_PCIE_3 = 0x3, /**< PCI Express target interface 3 */
  86402. + e_PCI_TARGET_LOCAL_MEMORY = 0xF /**< Local Memory (DDR SDRAM, Local Bus, SRAM) target interface */
  86403. +
  86404. +} e_PciTargetInterface;
  86405. +
  86406. +/*****************************************************************************
  86407. + DDR INTEGRATION-SPECIFIC DEFINITIONS
  86408. +******************************************************************************/
  86409. +#define DDR_NUM_OF_VALID_CS 2
  86410. +
  86411. +/*****************************************************************************
  86412. + SEC INTEGRATION-SPECIFIC DEFINITIONS
  86413. +******************************************************************************/
  86414. +#define SEC_ERRATA_STAT_REGS_UNUSABLE
  86415. +
  86416. +/*****************************************************************************
  86417. + DMA INTEGRATION-SPECIFIC DEFINITIONS
  86418. +******************************************************************************/
  86419. +#define DMA_NUM_OF_CONTROLLERS 2
  86420. +
  86421. +
  86422. +
  86423. +
  86424. +/*****************************************************************************
  86425. + 1588 INTEGRATION-SPECIFIC DEFINITIONS
  86426. +******************************************************************************/
  86427. +#define PTP_V2
  86428. +
  86429. +/**************************************************************************//**
  86430. + @Function P1023_GetMuxControlReg
  86431. +
  86432. + @Description Returns the value of PMUXCR (Alternate Function Signal Multiplex
  86433. + Control Register)
  86434. +
  86435. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86436. +
  86437. + @Return Value of PMUXCR
  86438. +*//***************************************************************************/
  86439. +uint32_t P1023_GetMuxControlReg(uintptr_t gutilBase);
  86440. +
  86441. +/**************************************************************************//**
  86442. + @Function P1023_SetMuxControlReg
  86443. +
  86444. + @Description Sets the value of PMUXCR (Alternate Function Signal Multiplex
  86445. + Control Register)
  86446. +
  86447. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86448. + @Param[in] val - the new value for PMUXCR.
  86449. +
  86450. + @Return None
  86451. +*//***************************************************************************/
  86452. +void P1023_SetMuxControlReg(uintptr_t gutilBase, uint32_t val);
  86453. +
  86454. +/**************************************************************************//**
  86455. + @Function P1023_GetDeviceDisableStatusRegister
  86456. +
  86457. + @Description Returns the value of DEVDISR (Device Disable Register)
  86458. +
  86459. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86460. +
  86461. + @Return Value of DEVDISR
  86462. +*//***************************************************************************/
  86463. +uint32_t P1023_GetDeviceDisableStatusRegister(uintptr_t gutilBase);
  86464. +
  86465. +/**************************************************************************//**
  86466. + @Function P1023_GetPorDeviceStatusRegister
  86467. +
  86468. + @Description Returns the value of POR Device Status Register
  86469. +
  86470. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86471. +
  86472. + @Return POR Device Status Register
  86473. +*//***************************************************************************/
  86474. +uint32_t P1023_GetPorDeviceStatusRegister(uintptr_t gutilBase);
  86475. +
  86476. +/**************************************************************************//**
  86477. + @Function P1023_GetPorBootModeStatusRegister
  86478. +
  86479. + @Description Returns the value of POR Boot Mode Status Register
  86480. +
  86481. + @Param[in] gutilBase - Base address of P1023 GUTIL registers.
  86482. +
  86483. + @Return POR Boot Mode Status Register value
  86484. +*//***************************************************************************/
  86485. +uint32_t P1023_GetPorBootModeStatusRegister(uintptr_t gutilBase);
  86486. +
  86487. +
  86488. +#define PORDEVSR_SGMII1_DIS 0x10000000
  86489. +#define PORDEVSR_SGMII2_DIS 0x08000000
  86490. +#define PORDEVSR_ECP1 0x02000000
  86491. +#define PORDEVSR_IO_SEL 0x00780000
  86492. +#define PORDEVSR_IO_SEL_SHIFT 19
  86493. +#define PORBMSR_HA 0x00070000
  86494. +#define PORBMSR_HA_SHIFT 16
  86495. +
  86496. +#define DEVDISR_QM_BM 0x80000000
  86497. +#define DEVDISR_FM 0x40000000
  86498. +#define DEVDISR_PCIE1 0x20000000
  86499. +#define DEVDISR_MAC_SEC 0x10000000
  86500. +#define DEVDISR_ELBC 0x08000000
  86501. +#define DEVDISR_PCIE2 0x04000000
  86502. +#define DEVDISR_PCIE3 0x02000000
  86503. +#define DEVDISR_CAAM 0x01000000
  86504. +#define DEVDISR_USB0 0x00800000
  86505. +#define DEVDISR_1588 0x00020000
  86506. +#define DEVDISR_CORE0 0x00008000
  86507. +#define DEVDISR_TB0 0x00004000
  86508. +#define DEVDISR_CORE1 0x00002000
  86509. +#define DEVDISR_TB1 0x00001000
  86510. +#define DEVDISR_DMA1 0x00000400
  86511. +#define DEVDISR_DMA2 0x00000200
  86512. +#define DEVDISR_DDR 0x00000010
  86513. +#define DEVDISR_TSEC1 0x00000080
  86514. +#define DEVDISR_TSEC2 0x00000040
  86515. +#define DEVDISR_SPI 0x00000008
  86516. +#define DEVDISR_I2C 0x00000004
  86517. +#define DEVDISR_DUART 0x00000002
  86518. +
  86519. +
  86520. +#endif /* __PART_INTEGRATION_EXT_H */
  86521. --- /dev/null
  86522. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/dpaa_integration_ext.h
  86523. @@ -0,0 +1,276 @@
  86524. +/* Copyright (c) 2009-2012 Freescale Semiconductor, Inc
  86525. + * All rights reserved.
  86526. + *
  86527. + * Redistribution and use in source and binary forms, with or without
  86528. + * modification, are permitted provided that the following conditions are met:
  86529. + * * Redistributions of source code must retain the above copyright
  86530. + * notice, this list of conditions and the following disclaimer.
  86531. + * * Redistributions in binary form must reproduce the above copyright
  86532. + * notice, this list of conditions and the following disclaimer in the
  86533. + * documentation and/or other materials provided with the distribution.
  86534. + * * Neither the name of Freescale Semiconductor nor the
  86535. + * names of its contributors may be used to endorse or promote products
  86536. + * derived from this software without specific prior written permission.
  86537. + *
  86538. + *
  86539. + * ALTERNATIVELY, this software may be distributed under the terms of the
  86540. + * GNU General Public License ("GPL") as published by the Free Software
  86541. + * Foundation, either version 2 of that License or (at your option) any
  86542. + * later version.
  86543. + *
  86544. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  86545. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  86546. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  86547. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  86548. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  86549. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  86550. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  86551. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  86552. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  86553. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  86554. + */
  86555. +
  86556. +/**************************************************************************//**
  86557. + @File dpaa_integration_ext.h
  86558. +
  86559. + @Description P3040/P4080/P5020 FM external definitions and structures.
  86560. +*//***************************************************************************/
  86561. +#ifndef __DPAA_INTEGRATION_EXT_H
  86562. +#define __DPAA_INTEGRATION_EXT_H
  86563. +
  86564. +#include "std_ext.h"
  86565. +
  86566. +
  86567. +#define DPAA_VERSION 10
  86568. +
  86569. +typedef enum {
  86570. + e_DPAA_SWPORTAL0 = 0,
  86571. + e_DPAA_SWPORTAL1,
  86572. + e_DPAA_SWPORTAL2,
  86573. + e_DPAA_SWPORTAL3,
  86574. + e_DPAA_SWPORTAL4,
  86575. + e_DPAA_SWPORTAL5,
  86576. + e_DPAA_SWPORTAL6,
  86577. + e_DPAA_SWPORTAL7,
  86578. + e_DPAA_SWPORTAL8,
  86579. + e_DPAA_SWPORTAL9,
  86580. + e_DPAA_SWPORTAL_DUMMY_LAST
  86581. +} e_DpaaSwPortal;
  86582. +
  86583. +typedef enum {
  86584. + e_DPAA_DCPORTAL0 = 0,
  86585. + e_DPAA_DCPORTAL1,
  86586. + e_DPAA_DCPORTAL2,
  86587. + e_DPAA_DCPORTAL3,
  86588. + e_DPAA_DCPORTAL4,
  86589. + e_DPAA_DCPORTAL_DUMMY_LAST
  86590. +} e_DpaaDcPortal;
  86591. +
  86592. +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST
  86593. +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST
  86594. +
  86595. +/*****************************************************************************
  86596. + QMan INTEGRATION-SPECIFIC DEFINITIONS
  86597. +******************************************************************************/
  86598. +#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */
  86599. +#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */
  86600. +#define QM_MAX_NUM_OF_SWP_AS 4
  86601. +#define QM_MAX_NUM_OF_CGS 256 /**< Number of congestion groups */
  86602. +#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE) /**< FQIDs range - 24 bits */
  86603. +
  86604. +/**************************************************************************//**
  86605. + @Description Work Queue Channel assignments in QMan.
  86606. +*//***************************************************************************/
  86607. +typedef enum
  86608. +{
  86609. + e_QM_FQ_CHANNEL_SWPORTAL0 = 0, /**< Dedicated channels serviced by software portals 0 to 9 */
  86610. + e_QM_FQ_CHANNEL_SWPORTAL1,
  86611. + e_QM_FQ_CHANNEL_SWPORTAL2,
  86612. + e_QM_FQ_CHANNEL_SWPORTAL3,
  86613. + e_QM_FQ_CHANNEL_SWPORTAL4,
  86614. + e_QM_FQ_CHANNEL_SWPORTAL5,
  86615. + e_QM_FQ_CHANNEL_SWPORTAL6,
  86616. + e_QM_FQ_CHANNEL_SWPORTAL7,
  86617. + e_QM_FQ_CHANNEL_SWPORTAL8,
  86618. + e_QM_FQ_CHANNEL_SWPORTAL9,
  86619. +
  86620. + e_QM_FQ_CHANNEL_POOL1 = 0x21, /**< Pool channels that can be serviced by any of the software portals */
  86621. + e_QM_FQ_CHANNEL_POOL2,
  86622. + e_QM_FQ_CHANNEL_POOL3,
  86623. + e_QM_FQ_CHANNEL_POOL4,
  86624. + e_QM_FQ_CHANNEL_POOL5,
  86625. + e_QM_FQ_CHANNEL_POOL6,
  86626. + e_QM_FQ_CHANNEL_POOL7,
  86627. + e_QM_FQ_CHANNEL_POOL8,
  86628. + e_QM_FQ_CHANNEL_POOL9,
  86629. + e_QM_FQ_CHANNEL_POOL10,
  86630. + e_QM_FQ_CHANNEL_POOL11,
  86631. + e_QM_FQ_CHANNEL_POOL12,
  86632. + e_QM_FQ_CHANNEL_POOL13,
  86633. + e_QM_FQ_CHANNEL_POOL14,
  86634. + e_QM_FQ_CHANNEL_POOL15,
  86635. +
  86636. + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x40, /**< Dedicated channels serviced by Direct Connect Portal 0:
  86637. + connected to FMan 0; assigned in incrementing order to
  86638. + each sub-portal (SP) in the portal */
  86639. + e_QM_FQ_CHANNEL_FMAN0_SP1,
  86640. + e_QM_FQ_CHANNEL_FMAN0_SP2,
  86641. + e_QM_FQ_CHANNEL_FMAN0_SP3,
  86642. + e_QM_FQ_CHANNEL_FMAN0_SP4,
  86643. + e_QM_FQ_CHANNEL_FMAN0_SP5,
  86644. + e_QM_FQ_CHANNEL_FMAN0_SP6,
  86645. + e_QM_FQ_CHANNEL_FMAN0_SP7,
  86646. + e_QM_FQ_CHANNEL_FMAN0_SP8,
  86647. + e_QM_FQ_CHANNEL_FMAN0_SP9,
  86648. + e_QM_FQ_CHANNEL_FMAN0_SP10,
  86649. + e_QM_FQ_CHANNEL_FMAN0_SP11,
  86650. +/* difference between 5020 and 4080 :) */
  86651. + e_QM_FQ_CHANNEL_FMAN1_SP0 = 0x60,
  86652. + e_QM_FQ_CHANNEL_FMAN1_SP1,
  86653. + e_QM_FQ_CHANNEL_FMAN1_SP2,
  86654. + e_QM_FQ_CHANNEL_FMAN1_SP3,
  86655. + e_QM_FQ_CHANNEL_FMAN1_SP4,
  86656. + e_QM_FQ_CHANNEL_FMAN1_SP5,
  86657. + e_QM_FQ_CHANNEL_FMAN1_SP6,
  86658. + e_QM_FQ_CHANNEL_FMAN1_SP7,
  86659. + e_QM_FQ_CHANNEL_FMAN1_SP8,
  86660. + e_QM_FQ_CHANNEL_FMAN1_SP9,
  86661. + e_QM_FQ_CHANNEL_FMAN1_SP10,
  86662. + e_QM_FQ_CHANNEL_FMAN1_SP11,
  86663. +
  86664. + e_QM_FQ_CHANNEL_CAAM = 0x80, /**< Dedicated channel serviced by Direct Connect Portal 2:
  86665. + connected to SEC 4.x */
  86666. +
  86667. + e_QM_FQ_CHANNEL_PME = 0xA0, /**< Dedicated channel serviced by Direct Connect Portal 3:
  86668. + connected to PME */
  86669. + e_QM_FQ_CHANNEL_RAID = 0xC0 /**< Dedicated channel serviced by Direct Connect Portal 4:
  86670. + connected to RAID */
  86671. +} e_QmFQChannel;
  86672. +
  86673. +/*****************************************************************************
  86674. + BMan INTEGRATION-SPECIFIC DEFINITIONS
  86675. +******************************************************************************/
  86676. +#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */
  86677. +
  86678. +
  86679. +/*****************************************************************************
  86680. + FM INTEGRATION-SPECIFIC DEFINITIONS
  86681. +******************************************************************************/
  86682. +#define INTG_MAX_NUM_OF_FM 2
  86683. +
  86684. +/* Ports defines */
  86685. +#define FM_MAX_NUM_OF_1G_MACS 5
  86686. +#define FM_MAX_NUM_OF_10G_MACS 1
  86687. +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS)
  86688. +#define FM_MAX_NUM_OF_OH_PORTS 7
  86689. +
  86690. +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS
  86691. +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS
  86692. +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS)
  86693. +
  86694. +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS
  86695. +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS
  86696. +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS)
  86697. +
  86698. +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 8 /**< Number of external BM pools per Rx port */
  86699. +#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */
  86700. +#define FM_MAX_NUM_OF_SUB_PORTALS 12
  86701. +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0
  86702. +
  86703. +/* Rams defines */
  86704. +#define FM_MURAM_SIZE (160*KILOBYTE)
  86705. +#define FM_IRAM_SIZE(major, minor) (64 * KILOBYTE)
  86706. +#define FM_NUM_OF_CTRL 2
  86707. +
  86708. +/* PCD defines */
  86709. +#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */
  86710. +#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */
  86711. +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */
  86712. +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000200 /**< Number of bytes saved for patches */
  86713. +#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */
  86714. +
  86715. +/* RTC defines */
  86716. +#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */
  86717. +#define FM_RTC_NUM_OF_PERIODIC_PULSES 2 /**< RTC number of periodic pulses */
  86718. +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */
  86719. +
  86720. +/* QMI defines */
  86721. +#define QMI_MAX_NUM_OF_TNUMS 64
  86722. +#define QMI_DEF_TNUMS_THRESH 48
  86723. +
  86724. +/* FPM defines */
  86725. +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4
  86726. +
  86727. +/* DMA defines */
  86728. +#define DMA_THRESH_MAX_COMMQ 31
  86729. +#define DMA_THRESH_MAX_BUF 127
  86730. +
  86731. +/* BMI defines */
  86732. +#define BMI_MAX_NUM_OF_TASKS 128
  86733. +#define BMI_MAX_NUM_OF_DMAS 32
  86734. +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)
  86735. +#define PORT_MAX_WEIGHT 16
  86736. +
  86737. +
  86738. +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE
  86739. +
  86740. +/* p4080-rev1 unique features */
  86741. +#define QM_CGS_NO_FRAME_MODE
  86742. +
  86743. +/* p4080 unique features */
  86744. +#define FM_NO_DISPATCH_RAM_ECC
  86745. +#define FM_NO_WATCHDOG
  86746. +#define FM_NO_TNUM_AGING
  86747. +#define FM_KG_NO_BYPASS_FQID_GEN
  86748. +#define FM_KG_NO_BYPASS_PLCR_PROFILE_GEN
  86749. +#define FM_NO_BACKUP_POOLS
  86750. +#define FM_NO_OP_OBSERVED_POOLS
  86751. +#define FM_NO_ADVANCED_RATE_LIMITER
  86752. +#define FM_NO_OP_OBSERVED_CGS
  86753. +#define FM_HAS_TOTAL_DMAS
  86754. +#define FM_KG_NO_IPPID_SUPPORT
  86755. +#define FM_NO_GUARANTEED_RESET_VALUES
  86756. +#define FM_MAC_RESET
  86757. +
  86758. +/* FM erratas */
  86759. +#define FM_TX_ECC_FRMS_ERRATA_10GMAC_A004
  86760. +#define FM_TX_SHORT_FRAME_BAD_TS_ERRATA_10GMAC_A006 /* No implementation, Out of LLD scope */
  86761. +#define FM_TX_FIFO_CORRUPTION_ERRATA_10GMAC_A007
  86762. +#define FM_ECC_HALT_NO_SYNC_ERRATA_10GMAC_A008
  86763. +#define FM_TX_INVALID_ECC_ERRATA_10GMAC_A009 /* Out of LLD scope, user may disable ECC exceptions using FM_DisableRamsEcc */
  86764. +#define FM_BAD_VLAN_DETECT_ERRATA_10GMAC_A010
  86765. +
  86766. +#define FM_RX_PREAM_4_ERRATA_DTSEC_A001
  86767. +#define FM_GRS_ERRATA_DTSEC_A002
  86768. +#define FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003
  86769. +#define FM_GTS_ERRATA_DTSEC_A004
  86770. +#define FM_GTS_AFTER_MAC_ABORTED_FRAME_ERRATA_DTSEC_A0012
  86771. +#define FM_GTS_UNDERRUN_ERRATA_DTSEC_A0014
  86772. +#define FM_GTS_AFTER_DROPPED_FRAME_ERRATA_DTSEC_A004839
  86773. +
  86774. +#define FM_MAGIC_PACKET_UNRECOGNIZED_ERRATA_DTSEC2 /* No implementation, Out of LLD scope */
  86775. +#define FM_TX_LOCKUP_ERRATA_DTSEC6
  86776. +
  86777. +#define FM_HC_DEF_FQID_ONLY_ERRATA_FMAN_A003 /* Implemented by ucode */
  86778. +#define FM_DEBUG_TRACE_FMAN_A004 /* No implementation, Out of LLD scope */
  86779. +
  86780. +#define FM_UCODE_NOT_RESET_ERRATA_BUGZILLA6173
  86781. +
  86782. +#define FM_10G_REM_N_LCL_FLT_EX_10GMAC_ERRATA_SW005
  86783. +
  86784. +#define FM_LEN_CHECK_ERRATA_FMAN_SW002
  86785. +
  86786. +#define FM_NO_CTXA_COPY_ERRATA_FMAN_SW001
  86787. +#define FM_KG_ERASE_FLOW_ID_ERRATA_FMAN_SW004
  86788. +
  86789. +/*****************************************************************************
  86790. + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS
  86791. +******************************************************************************/
  86792. +#define NUM_OF_RX_SC 16
  86793. +#define NUM_OF_TX_SC 16
  86794. +
  86795. +#define NUM_OF_SA_PER_RX_SC 2
  86796. +#define NUM_OF_SA_PER_TX_SC 2
  86797. +
  86798. +
  86799. +#endif /* __DPAA_INTEGRATION_EXT_H */
  86800. --- /dev/null
  86801. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_ext.h
  86802. @@ -0,0 +1,83 @@
  86803. +/*
  86804. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  86805. + *
  86806. + * Redistribution and use in source and binary forms, with or without
  86807. + * modification, are permitted provided that the following conditions are met:
  86808. + * * Redistributions of source code must retain the above copyright
  86809. + * notice, this list of conditions and the following disclaimer.
  86810. + * * Redistributions in binary form must reproduce the above copyright
  86811. + * notice, this list of conditions and the following disclaimer in the
  86812. + * documentation and/or other materials provided with the distribution.
  86813. + * * Neither the name of Freescale Semiconductor nor the
  86814. + * names of its contributors may be used to endorse or promote products
  86815. + * derived from this software without specific prior written permission.
  86816. + *
  86817. + *
  86818. + * ALTERNATIVELY, this software may be distributed under the terms of the
  86819. + * GNU General Public License ("GPL") as published by the Free Software
  86820. + * Foundation, either version 2 of that License or (at your option) any
  86821. + * later version.
  86822. + *
  86823. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  86824. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  86825. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  86826. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  86827. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  86828. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  86829. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  86830. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  86831. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  86832. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  86833. + */
  86834. +
  86835. +/**************************************************************************//**
  86836. +
  86837. + @File part_ext.h
  86838. +
  86839. + @Description Definitions for the part (integration) module.
  86840. +*//***************************************************************************/
  86841. +
  86842. +#ifndef __PART_EXT_H
  86843. +#define __PART_EXT_H
  86844. +
  86845. +#include "std_ext.h"
  86846. +#include "part_integration_ext.h"
  86847. +
  86848. +
  86849. +#if !(defined(MPC8306) || \
  86850. + defined(MPC8309) || \
  86851. + defined(MPC834x) || \
  86852. + defined(MPC836x) || \
  86853. + defined(MPC832x) || \
  86854. + defined(MPC837x) || \
  86855. + defined(MPC8568) || \
  86856. + defined(MPC8569) || \
  86857. + defined(P1020) || \
  86858. + defined(P1021) || \
  86859. + defined(P1022) || \
  86860. + defined(P1023) || \
  86861. + defined(P2020) || \
  86862. + defined(P2040) || \
  86863. + defined(P3041) || \
  86864. + defined(P4080) || \
  86865. + defined(SC4080) || \
  86866. + defined(P5020) || \
  86867. + defined(MSC814x))
  86868. +#error "unable to proceed without chip-definition"
  86869. +#endif /* !(defined(MPC834x) || ... */
  86870. +
  86871. +
  86872. +/**************************************************************************//*
  86873. + @Description Part data structure - must be contained in any integration
  86874. + data structure.
  86875. +*//***************************************************************************/
  86876. +typedef struct t_Part
  86877. +{
  86878. + uintptr_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId);
  86879. + /**< Returns the address of the module's memory map base. */
  86880. + e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress);
  86881. + /**< Returns the module's ID according to its memory map base. */
  86882. +} t_Part;
  86883. +
  86884. +
  86885. +#endif /* __PART_EXT_H */
  86886. --- /dev/null
  86887. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/integrations/P3040_P4080_P5020/part_integration_ext.h
  86888. @@ -0,0 +1,336 @@
  86889. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  86890. + * All rights reserved.
  86891. + *
  86892. + * Redistribution and use in source and binary forms, with or without
  86893. + * modification, are permitted provided that the following conditions are met:
  86894. + * * Redistributions of source code must retain the above copyright
  86895. + * notice, this list of conditions and the following disclaimer.
  86896. + * * Redistributions in binary form must reproduce the above copyright
  86897. + * notice, this list of conditions and the following disclaimer in the
  86898. + * documentation and/or other materials provided with the distribution.
  86899. + * * Neither the name of Freescale Semiconductor nor the
  86900. + * names of its contributors may be used to endorse or promote products
  86901. + * derived from this software without specific prior written permission.
  86902. + *
  86903. + *
  86904. + * ALTERNATIVELY, this software may be distributed under the terms of the
  86905. + * GNU General Public License ("GPL") as published by the Free Software
  86906. + * Foundation, either version 2 of that License or (at your option) any
  86907. + * later version.
  86908. + *
  86909. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  86910. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  86911. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  86912. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  86913. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  86914. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  86915. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  86916. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  86917. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  86918. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  86919. + */
  86920. +
  86921. +/**************************************************************************//**
  86922. + @File part_integration_ext.h
  86923. +
  86924. + @Description P3040/P4080/P5020 external definitions and structures.
  86925. +*//***************************************************************************/
  86926. +#ifndef __PART_INTEGRATION_EXT_H
  86927. +#define __PART_INTEGRATION_EXT_H
  86928. +
  86929. +#include "std_ext.h"
  86930. +#include "dpaa_integration_ext.h"
  86931. +
  86932. +
  86933. +/**************************************************************************//**
  86934. + @Group P3040/P4080/P5020_chip_id P5020 Application Programming Interface
  86935. +
  86936. + @Description P3040/P4080/P5020 Chip functions,definitions and enums.
  86937. +
  86938. + @{
  86939. +*//***************************************************************************/
  86940. +
  86941. +#define CORE_E500MC
  86942. +
  86943. +#define INTG_MAX_NUM_OF_CORES 1
  86944. +
  86945. +
  86946. +/**************************************************************************//**
  86947. + @Description Module types.
  86948. +*//***************************************************************************/
  86949. +typedef enum e_ModuleId
  86950. +{
  86951. + e_MODULE_ID_DUART_1 = 0,
  86952. + e_MODULE_ID_DUART_2,
  86953. + e_MODULE_ID_DUART_3,
  86954. + e_MODULE_ID_DUART_4,
  86955. + e_MODULE_ID_LAW,
  86956. + e_MODULE_ID_LBC,
  86957. + e_MODULE_ID_PAMU,
  86958. + e_MODULE_ID_QM, /**< Queue manager module */
  86959. + e_MODULE_ID_BM, /**< Buffer manager module */
  86960. + e_MODULE_ID_QM_CE_PORTAL_0,
  86961. + e_MODULE_ID_QM_CI_PORTAL_0,
  86962. + e_MODULE_ID_QM_CE_PORTAL_1,
  86963. + e_MODULE_ID_QM_CI_PORTAL_1,
  86964. + e_MODULE_ID_QM_CE_PORTAL_2,
  86965. + e_MODULE_ID_QM_CI_PORTAL_2,
  86966. + e_MODULE_ID_QM_CE_PORTAL_3,
  86967. + e_MODULE_ID_QM_CI_PORTAL_3,
  86968. + e_MODULE_ID_QM_CE_PORTAL_4,
  86969. + e_MODULE_ID_QM_CI_PORTAL_4,
  86970. + e_MODULE_ID_QM_CE_PORTAL_5,
  86971. + e_MODULE_ID_QM_CI_PORTAL_5,
  86972. + e_MODULE_ID_QM_CE_PORTAL_6,
  86973. + e_MODULE_ID_QM_CI_PORTAL_6,
  86974. + e_MODULE_ID_QM_CE_PORTAL_7,
  86975. + e_MODULE_ID_QM_CI_PORTAL_7,
  86976. + e_MODULE_ID_QM_CE_PORTAL_8,
  86977. + e_MODULE_ID_QM_CI_PORTAL_8,
  86978. + e_MODULE_ID_QM_CE_PORTAL_9,
  86979. + e_MODULE_ID_QM_CI_PORTAL_9,
  86980. + e_MODULE_ID_BM_CE_PORTAL_0,
  86981. + e_MODULE_ID_BM_CI_PORTAL_0,
  86982. + e_MODULE_ID_BM_CE_PORTAL_1,
  86983. + e_MODULE_ID_BM_CI_PORTAL_1,
  86984. + e_MODULE_ID_BM_CE_PORTAL_2,
  86985. + e_MODULE_ID_BM_CI_PORTAL_2,
  86986. + e_MODULE_ID_BM_CE_PORTAL_3,
  86987. + e_MODULE_ID_BM_CI_PORTAL_3,
  86988. + e_MODULE_ID_BM_CE_PORTAL_4,
  86989. + e_MODULE_ID_BM_CI_PORTAL_4,
  86990. + e_MODULE_ID_BM_CE_PORTAL_5,
  86991. + e_MODULE_ID_BM_CI_PORTAL_5,
  86992. + e_MODULE_ID_BM_CE_PORTAL_6,
  86993. + e_MODULE_ID_BM_CI_PORTAL_6,
  86994. + e_MODULE_ID_BM_CE_PORTAL_7,
  86995. + e_MODULE_ID_BM_CI_PORTAL_7,
  86996. + e_MODULE_ID_BM_CE_PORTAL_8,
  86997. + e_MODULE_ID_BM_CI_PORTAL_8,
  86998. + e_MODULE_ID_BM_CE_PORTAL_9,
  86999. + e_MODULE_ID_BM_CI_PORTAL_9,
  87000. + e_MODULE_ID_FM1, /**< Frame manager #1 module */
  87001. + e_MODULE_ID_FM1_RTC, /**< FM Real-Time-Clock */
  87002. + e_MODULE_ID_FM1_MURAM, /**< FM Multi-User-RAM */
  87003. + e_MODULE_ID_FM1_BMI, /**< FM BMI block */
  87004. + e_MODULE_ID_FM1_QMI, /**< FM QMI block */
  87005. + e_MODULE_ID_FM1_PRS, /**< FM parser block */
  87006. + e_MODULE_ID_FM1_PORT_HO0, /**< FM Host-command/offline-parsing port block */
  87007. + e_MODULE_ID_FM1_PORT_HO1, /**< FM Host-command/offline-parsing port block */
  87008. + e_MODULE_ID_FM1_PORT_HO2, /**< FM Host-command/offline-parsing port block */
  87009. + e_MODULE_ID_FM1_PORT_HO3, /**< FM Host-command/offline-parsing port block */
  87010. + e_MODULE_ID_FM1_PORT_HO4, /**< FM Host-command/offline-parsing port block */
  87011. + e_MODULE_ID_FM1_PORT_HO5, /**< FM Host-command/offline-parsing port block */
  87012. + e_MODULE_ID_FM1_PORT_HO6, /**< FM Host-command/offline-parsing port block */
  87013. + e_MODULE_ID_FM1_PORT_1GRx0, /**< FM Rx 1G MAC port block */
  87014. + e_MODULE_ID_FM1_PORT_1GRx1, /**< FM Rx 1G MAC port block */
  87015. + e_MODULE_ID_FM1_PORT_1GRx2, /**< FM Rx 1G MAC port block */
  87016. + e_MODULE_ID_FM1_PORT_1GRx3, /**< FM Rx 1G MAC port block */
  87017. + e_MODULE_ID_FM1_PORT_1GRx4, /**< FM Rx 1G MAC port block */
  87018. + e_MODULE_ID_FM1_PORT_10GRx0, /**< FM Rx 10G MAC port block */
  87019. + e_MODULE_ID_FM1_PORT_1GTx0, /**< FM Tx 1G MAC port block */
  87020. + e_MODULE_ID_FM1_PORT_1GTx1, /**< FM Tx 1G MAC port block */
  87021. + e_MODULE_ID_FM1_PORT_1GTx2, /**< FM Tx 1G MAC port block */
  87022. + e_MODULE_ID_FM1_PORT_1GTx3, /**< FM Tx 1G MAC port block */
  87023. + e_MODULE_ID_FM1_PORT_1GTx4, /**< FM Tx 1G MAC port block */
  87024. + e_MODULE_ID_FM1_PORT_10GTx0, /**< FM Tx 10G MAC port block */
  87025. + e_MODULE_ID_FM1_PLCR, /**< FM Policer */
  87026. + e_MODULE_ID_FM1_KG, /**< FM Keygen */
  87027. + e_MODULE_ID_FM1_DMA, /**< FM DMA */
  87028. + e_MODULE_ID_FM1_FPM, /**< FM FPM */
  87029. + e_MODULE_ID_FM1_IRAM, /**< FM Instruction-RAM */
  87030. + e_MODULE_ID_FM1_1GMDIO0, /**< FM 1G MDIO MAC 0*/
  87031. + e_MODULE_ID_FM1_1GMDIO1, /**< FM 1G MDIO MAC 1*/
  87032. + e_MODULE_ID_FM1_1GMDIO2, /**< FM 1G MDIO MAC 2*/
  87033. + e_MODULE_ID_FM1_1GMDIO3, /**< FM 1G MDIO MAC 3*/
  87034. + e_MODULE_ID_FM1_10GMDIO, /**< FM 10G MDIO */
  87035. + e_MODULE_ID_FM1_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
  87036. + e_MODULE_ID_FM1_1GMAC0, /**< FM 1G MAC #0 */
  87037. + e_MODULE_ID_FM1_1GMAC1, /**< FM 1G MAC #1 */
  87038. + e_MODULE_ID_FM1_1GMAC2, /**< FM 1G MAC #2 */
  87039. + e_MODULE_ID_FM1_1GMAC3, /**< FM 1G MAC #3 */
  87040. + e_MODULE_ID_FM1_10GMAC0, /**< FM 10G MAC #0 */
  87041. +
  87042. + e_MODULE_ID_FM2, /**< Frame manager #2 module */
  87043. + e_MODULE_ID_FM2_RTC, /**< FM Real-Time-Clock */
  87044. + e_MODULE_ID_FM2_MURAM, /**< FM Multi-User-RAM */
  87045. + e_MODULE_ID_FM2_BMI, /**< FM BMI block */
  87046. + e_MODULE_ID_FM2_QMI, /**< FM QMI block */
  87047. + e_MODULE_ID_FM2_PRS, /**< FM parser block */
  87048. + e_MODULE_ID_FM2_PORT_HO0, /**< FM Host-command/offline-parsing port block */
  87049. + e_MODULE_ID_FM2_PORT_HO1, /**< FM Host-command/offline-parsing port block */
  87050. + e_MODULE_ID_FM2_PORT_HO2, /**< FM Host-command/offline-parsing port block */
  87051. + e_MODULE_ID_FM2_PORT_HO3, /**< FM Host-command/offline-parsing port block */
  87052. + e_MODULE_ID_FM2_PORT_HO4, /**< FM Host-command/offline-parsing port block */
  87053. + e_MODULE_ID_FM2_PORT_HO5, /**< FM Host-command/offline-parsing port block */
  87054. + e_MODULE_ID_FM2_PORT_HO6, /**< FM Host-command/offline-parsing port block */
  87055. + e_MODULE_ID_FM2_PORT_1GRx0, /**< FM Rx 1G MAC port block */
  87056. + e_MODULE_ID_FM2_PORT_1GRx1, /**< FM Rx 1G MAC port block */
  87057. + e_MODULE_ID_FM2_PORT_1GRx2, /**< FM Rx 1G MAC port block */
  87058. + e_MODULE_ID_FM2_PORT_1GRx3, /**< FM Rx 1G MAC port block */
  87059. + e_MODULE_ID_FM2_PORT_10GRx0, /**< FM Rx 10G MAC port block */
  87060. + e_MODULE_ID_FM2_PORT_1GTx0, /**< FM Tx 1G MAC port block */
  87061. + e_MODULE_ID_FM2_PORT_1GTx1, /**< FM Tx 1G MAC port block */
  87062. + e_MODULE_ID_FM2_PORT_1GTx2, /**< FM Tx 1G MAC port block */
  87063. + e_MODULE_ID_FM2_PORT_1GTx3, /**< FM Tx 1G MAC port block */
  87064. + e_MODULE_ID_FM2_PORT_10GTx0, /**< FM Tx 10G MAC port block */
  87065. + e_MODULE_ID_FM2_PLCR, /**< FM Policer */
  87066. + e_MODULE_ID_FM2_KG, /**< FM Keygen */
  87067. + e_MODULE_ID_FM2_DMA, /**< FM DMA */
  87068. + e_MODULE_ID_FM2_FPM, /**< FM FPM */
  87069. + e_MODULE_ID_FM2_IRAM, /**< FM Instruction-RAM */
  87070. + e_MODULE_ID_FM2_1GMDIO0, /**< FM 1G MDIO MAC 0*/
  87071. + e_MODULE_ID_FM2_1GMDIO1, /**< FM 1G MDIO MAC 1*/
  87072. + e_MODULE_ID_FM2_1GMDIO2, /**< FM 1G MDIO MAC 2*/
  87073. + e_MODULE_ID_FM2_1GMDIO3, /**< FM 1G MDIO MAC 3*/
  87074. + e_MODULE_ID_FM2_10GMDIO, /**< FM 10G MDIO */
  87075. + e_MODULE_ID_FM2_PRS_IRAM, /**< FM SW-parser Instruction-RAM */
  87076. + e_MODULE_ID_FM2_1GMAC0, /**< FM 1G MAC #0 */
  87077. + e_MODULE_ID_FM2_1GMAC1, /**< FM 1G MAC #1 */
  87078. + e_MODULE_ID_FM2_1GMAC2, /**< FM 1G MAC #2 */
  87079. + e_MODULE_ID_FM2_1GMAC3, /**< FM 1G MAC #3 */
  87080. + e_MODULE_ID_FM2_10GMAC0, /**< FM 10G MAC #0 */
  87081. +
  87082. + e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */
  87083. + e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */
  87084. + e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */
  87085. + e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */
  87086. + e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */
  87087. + e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */
  87088. + e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */
  87089. + e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */
  87090. + e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */
  87091. + e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */
  87092. + e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */
  87093. + e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */
  87094. +
  87095. + e_MODULE_ID_MPIC, /**< MPIC */
  87096. + e_MODULE_ID_GPIO, /**< GPIO */
  87097. + e_MODULE_ID_SERDES, /**< SERDES */
  87098. + e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */
  87099. + e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */
  87100. +
  87101. + e_MODULE_ID_SRIO_PORTS, /**< RapidIO controller */
  87102. + e_MODULE_ID_SRIO_MU, /**< RapidIO messaging unit module */
  87103. +
  87104. + e_MODULE_ID_DUMMY_LAST
  87105. +} e_ModuleId;
  87106. +
  87107. +#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST
  87108. +
  87109. +#if 0 /* using unified values */
  87110. +/*****************************************************************************
  87111. + INTEGRATION-SPECIFIC MODULE CODES
  87112. +******************************************************************************/
  87113. +#define MODULE_UNKNOWN 0x00000000
  87114. +#define MODULE_MEM 0x00010000
  87115. +#define MODULE_MM 0x00020000
  87116. +#define MODULE_CORE 0x00030000
  87117. +#define MODULE_CHIP 0x00040000
  87118. +#define MODULE_PLTFRM 0x00050000
  87119. +#define MODULE_PM 0x00060000
  87120. +#define MODULE_MMU 0x00070000
  87121. +#define MODULE_PIC 0x00080000
  87122. +#define MODULE_CPC 0x00090000
  87123. +#define MODULE_DUART 0x000a0000
  87124. +#define MODULE_SERDES 0x000b0000
  87125. +#define MODULE_PIO 0x000c0000
  87126. +#define MODULE_QM 0x000d0000
  87127. +#define MODULE_BM 0x000e0000
  87128. +#define MODULE_SEC 0x000f0000
  87129. +#define MODULE_LAW 0x00100000
  87130. +#define MODULE_LBC 0x00110000
  87131. +#define MODULE_PAMU 0x00120000
  87132. +#define MODULE_FM 0x00130000
  87133. +#define MODULE_FM_MURAM 0x00140000
  87134. +#define MODULE_FM_PCD 0x00150000
  87135. +#define MODULE_FM_RTC 0x00160000
  87136. +#define MODULE_FM_MAC 0x00170000
  87137. +#define MODULE_FM_PORT 0x00180000
  87138. +#define MODULE_FM_SP 0x00190000
  87139. +#define MODULE_DPA_PORT 0x001a0000
  87140. +#define MODULE_MII 0x001b0000
  87141. +#define MODULE_I2C 0x001c0000
  87142. +#define MODULE_DMA 0x001d0000
  87143. +#define MODULE_DDR 0x001e0000
  87144. +#define MODULE_ESPI 0x001f0000
  87145. +#define MODULE_DPAA_IPSEC 0x00200000
  87146. +#endif /* using unified values */
  87147. +
  87148. +/*****************************************************************************
  87149. + PAMU INTEGRATION-SPECIFIC DEFINITIONS
  87150. +******************************************************************************/
  87151. +#define PAMU_NUM_OF_PARTITIONS 5
  87152. +
  87153. +#define PAMU_PICS_AVICS_ERRATA_PAMU3
  87154. +
  87155. +/*****************************************************************************
  87156. + LAW INTEGRATION-SPECIFIC DEFINITIONS
  87157. +******************************************************************************/
  87158. +#define LAW_NUM_OF_WINDOWS 32
  87159. +#define LAW_MIN_WINDOW_SIZE 0x0000000000001000LL /**< 4KB */
  87160. +#define LAW_MAX_WINDOW_SIZE 0x0000002000000000LL /**< 64GB */
  87161. +
  87162. +
  87163. +/*****************************************************************************
  87164. + LBC INTEGRATION-SPECIFIC DEFINITIONS
  87165. +******************************************************************************/
  87166. +/**************************************************************************//**
  87167. + @Group lbc_exception_grp LBC Exception Unit
  87168. +
  87169. + @Description LBC Exception unit API functions, definitions and enums
  87170. +
  87171. + @{
  87172. +*//***************************************************************************/
  87173. +
  87174. +/**************************************************************************//**
  87175. + @Anchor lbc_exbm
  87176. +
  87177. + @Collection LBC Errors Bit Mask
  87178. +
  87179. + These errors are reported through the exceptions callback..
  87180. + The values can be or'ed in any combination in the errors mask
  87181. + parameter of the errors report structure.
  87182. +
  87183. + These errors can also be passed as a bit-mask to
  87184. + LBC_EnableErrorChecking() or LBC_DisableErrorChecking(),
  87185. + for enabling or disabling error checking.
  87186. + @{
  87187. +*//***************************************************************************/
  87188. +#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */
  87189. +#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */
  87190. +#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */
  87191. +#define LBC_ERR_ATOMIC_WRITE 0x00800000 /**< Atomic write error */
  87192. +#define LBC_ERR_ATOMIC_READ 0x00400000 /**< Atomic read error */
  87193. +#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */
  87194. +
  87195. +#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \
  87196. + LBC_ERR_WRITE_PROTECT | LBC_ERR_ATOMIC_WRITE | \
  87197. + LBC_ERR_ATOMIC_READ | LBC_ERR_CHIP_SELECT)
  87198. + /**< All possible errors */
  87199. +/* @} */
  87200. +/** @} */ /* end of lbc_exception_grp group */
  87201. +
  87202. +#define LBC_INCORRECT_ERROR_REPORT_ERRATA
  87203. +
  87204. +#define LBC_NUM_OF_BANKS 8
  87205. +#define LBC_MAX_CS_SIZE 0x0000000100000000LL
  87206. +#define LBC_ATOMIC_OPERATION_SUPPORT
  87207. +#define LBC_PARITY_SUPPORT
  87208. +#define LBC_ADDRESS_HOLD_TIME_CTRL
  87209. +#define LBC_HIGH_CLK_DIVIDERS
  87210. +#define LBC_FCM_AVAILABLE
  87211. +
  87212. +/*****************************************************************************
  87213. + GPIO INTEGRATION-SPECIFIC DEFINITIONS
  87214. +******************************************************************************/
  87215. +#define GPIO_NUM_OF_PORTS 1 /**< Number of ports in GPIO module;
  87216. + Each port contains up to 32 i/O pins. */
  87217. +
  87218. +#define GPIO_VALID_PIN_MASKS \
  87219. + { /* Port A */ 0xFFFFFFFF }
  87220. +
  87221. +#define GPIO_VALID_INTR_MASKS \
  87222. + { /* Port A */ 0xFFFFFFFF }
  87223. +
  87224. +#endif /* __PART_INTEGRATION_EXT_H */
  87225. --- /dev/null
  87226. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/math_ext.h
  87227. @@ -0,0 +1,99 @@
  87228. +/*
  87229. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  87230. + *
  87231. + * Redistribution and use in source and binary forms, with or without
  87232. + * modification, are permitted provided that the following conditions are met:
  87233. + * * Redistributions of source code must retain the above copyright
  87234. + * notice, this list of conditions and the following disclaimer.
  87235. + * * Redistributions in binary form must reproduce the above copyright
  87236. + * notice, this list of conditions and the following disclaimer in the
  87237. + * documentation and/or other materials provided with the distribution.
  87238. + * * Neither the name of Freescale Semiconductor nor the
  87239. + * names of its contributors may be used to endorse or promote products
  87240. + * derived from this software without specific prior written permission.
  87241. + *
  87242. + *
  87243. + * ALTERNATIVELY, this software may be distributed under the terms of the
  87244. + * GNU General Public License ("GPL") as published by the Free Software
  87245. + * Foundation, either version 2 of that License or (at your option) any
  87246. + * later version.
  87247. + *
  87248. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  87249. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  87250. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  87251. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  87252. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  87253. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  87254. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  87255. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  87256. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  87257. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  87258. + */
  87259. +
  87260. +
  87261. +#ifndef __MATH_EXT_H
  87262. +#define __MATH_EXT_H
  87263. +
  87264. +
  87265. +#if defined(NCSW_LINUX) && defined(__KERNEL__)
  87266. +#include <linux/math.h>
  87267. +
  87268. +#elif defined(__MWERKS__)
  87269. +#define LOW(x) ( sizeof(x)==8 ? *(1+(int32_t*)&x) : (*(int32_t*)&x))
  87270. +#define HIGH(x) (*(int32_t*)&x)
  87271. +#define ULOW(x) ( sizeof(x)==8 ? *(1+(uint32_t*)&x) : (*(uint32_t*)&x))
  87272. +#define UHIGH(x) (*(uint32_t*)&x)
  87273. +
  87274. +static const double big = 1.0e300;
  87275. +
  87276. +/* Macro for checking if a number is a power of 2 */
  87277. +static __inline__ double ceil(double x)
  87278. +{
  87279. + int32_t i0,i1,j0; /*- cc 020130 -*/
  87280. + uint32_t i,j; /*- cc 020130 -*/
  87281. + i0 = HIGH(x);
  87282. + i1 = LOW(x);
  87283. + j0 = ((i0>>20)&0x7ff)-0x3ff;
  87284. + if(j0<20) {
  87285. + if(j0<0) { /* raise inexact if x != 0 */
  87286. + if(big+x>0.0) {/* return 0*sign(x) if |x|<1 */
  87287. + if(i0<0) {i0=0x80000000;i1=0;}
  87288. + else if((i0|i1)!=0) { i0=0x3ff00000;i1=0;}
  87289. + }
  87290. + } else {
  87291. + i = (uint32_t)(0x000fffff)>>j0;
  87292. + if(((i0&i)|i1)==0) return x; /* x is integral */
  87293. + if(big+x>0.0) { /* raise inexact flag */
  87294. + if(i0>0) i0 += (0x00100000)>>j0;
  87295. + i0 &= (~i); i1=0;
  87296. + }
  87297. + }
  87298. + } else if (j0>51) {
  87299. + if(j0==0x400) return x+x; /* inf or NaN */
  87300. + else return x; /* x is integral */
  87301. + } else {
  87302. + i = ((uint32_t)(0xffffffff))>>(j0-20); /*- cc 020130 -*/
  87303. + if((i1&i)==0) return x; /* x is integral */
  87304. + if(big+x>0.0) { /* raise inexact flag */
  87305. + if(i0>0) {
  87306. + if(j0==20) i0+=1;
  87307. + else {
  87308. + j = (uint32_t)(i1 + (1<<(52-j0)));
  87309. + if(j<i1) i0+=1; /* got a carry */
  87310. + i1 = (int32_t)j;
  87311. + }
  87312. + }
  87313. + i1 &= (~i);
  87314. + }
  87315. + }
  87316. + HIGH(x) = i0;
  87317. + LOW(x) = i1;
  87318. + return x;
  87319. +}
  87320. +
  87321. +#else
  87322. +#include <math.h>
  87323. +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
  87324. +
  87325. +
  87326. +#endif /* __MATH_EXT_H */
  87327. --- /dev/null
  87328. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/ncsw_ext.h
  87329. @@ -0,0 +1,435 @@
  87330. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  87331. + * All rights reserved.
  87332. + *
  87333. + * Redistribution and use in source and binary forms, with or without
  87334. + * modification, are permitted provided that the following conditions are met:
  87335. + * * Redistributions of source code must retain the above copyright
  87336. + * notice, this list of conditions and the following disclaimer.
  87337. + * * Redistributions in binary form must reproduce the above copyright
  87338. + * notice, this list of conditions and the following disclaimer in the
  87339. + * documentation and/or other materials provided with the distribution.
  87340. + * * Neither the name of Freescale Semiconductor nor the
  87341. + * names of its contributors may be used to endorse or promote products
  87342. + * derived from this software without specific prior written permission.
  87343. + *
  87344. + *
  87345. + * ALTERNATIVELY, this software may be distributed under the terms of the
  87346. + * GNU General Public License ("GPL") as published by the Free Software
  87347. + * Foundation, either version 2 of that License or (at your option) any
  87348. + * later version.
  87349. + *
  87350. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  87351. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  87352. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  87353. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  87354. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  87355. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  87356. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  87357. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  87358. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  87359. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  87360. + */
  87361. +
  87362. +
  87363. +/**************************************************************************//**
  87364. + @File ncsw_ext.h
  87365. +
  87366. + @Description General NetCommSw Standard Definitions
  87367. +*//***************************************************************************/
  87368. +
  87369. +#ifndef __NCSW_EXT_H
  87370. +#define __NCSW_EXT_H
  87371. +
  87372. +
  87373. +#include "memcpy_ext.h"
  87374. +
  87375. +#define WRITE_BLOCK IOMemSet32 /* include memcpy_ext.h */
  87376. +#define COPY_BLOCK Mem2IOCpy32 /* include memcpy_ext.h */
  87377. +
  87378. +#define PTR_TO_UINT(_ptr) ((uintptr_t)(_ptr))
  87379. +#define UINT_TO_PTR(_val) ((void*)(uintptr_t)(_val))
  87380. +
  87381. +#define PTR_MOVE(_ptr, _offset) (void*)((uint8_t*)(_ptr) + (_offset))
  87382. +
  87383. +
  87384. +#define WRITE_UINT8_UINT24(arg, data08, data24) \
  87385. + WRITE_UINT32(arg,((uint32_t)(data08)<<24)|((uint32_t)(data24)&0x00FFFFFF))
  87386. +#define WRITE_UINT24_UINT8(arg, data24, data08) \
  87387. + WRITE_UINT32(arg,((uint32_t)(data24)<< 8)|((uint32_t)(data08)&0x000000FF))
  87388. +
  87389. +/* Little-Endian access macros */
  87390. +
  87391. +#define WRITE_UINT16_LE(arg, data) \
  87392. + WRITE_UINT16((arg), SwapUint16(data))
  87393. +
  87394. +#define WRITE_UINT32_LE(arg, data) \
  87395. + WRITE_UINT32((arg), SwapUint32(data))
  87396. +
  87397. +#define WRITE_UINT64_LE(arg, data) \
  87398. + WRITE_UINT64((arg), SwapUint64(data))
  87399. +
  87400. +#define GET_UINT16_LE(arg) \
  87401. + SwapUint16(GET_UINT16(arg))
  87402. +
  87403. +#define GET_UINT32_LE(arg) \
  87404. + SwapUint32(GET_UINT32(arg))
  87405. +
  87406. +#define GET_UINT64_LE(arg) \
  87407. + SwapUint64(GET_UINT64(arg))
  87408. +
  87409. +/* Write and Read again macros */
  87410. +#define WRITE_UINT_SYNC(size, arg, data) \
  87411. + do { \
  87412. + WRITE_UINT##size((arg), (data)); \
  87413. + CORE_MemoryBarrier(); \
  87414. + } while (0)
  87415. +
  87416. +#define WRITE_UINT8_SYNC(arg, data) WRITE_UINT_SYNC(8, (arg), (data))
  87417. +
  87418. +#define WRITE_UINT16_SYNC(arg, data) WRITE_UINT_SYNC(16, (arg), (data))
  87419. +#define WRITE_UINT32_SYNC(arg, data) WRITE_UINT_SYNC(32, (arg), (data))
  87420. +
  87421. +#define MAKE_UINT64(high32, low32) (((uint64_t)high32 << 32) | (low32))
  87422. +
  87423. +
  87424. +/*----------------------*/
  87425. +/* Miscellaneous macros */
  87426. +/*----------------------*/
  87427. +
  87428. +#define UNUSED(_x) ((void)(_x))
  87429. +
  87430. +#define KILOBYTE 0x400UL /* 1024 */
  87431. +#define MEGABYTE (KILOBYTE * KILOBYTE) /* 1024*1024 */
  87432. +#define GIGABYTE ((uint64_t)(KILOBYTE * MEGABYTE)) /* 1024*1024*1024 */
  87433. +#define TERABYTE ((uint64_t)(KILOBYTE * GIGABYTE)) /* 1024*1024*1024*1024 */
  87434. +
  87435. +#ifndef NO_IRQ
  87436. +#define NO_IRQ (0)
  87437. +#endif
  87438. +#define NCSW_MASTER_ID (0)
  87439. +
  87440. +/* Macro for checking if a number is a power of 2 */
  87441. +#define POWER_OF_2(n) (!((n) & ((n)-1)))
  87442. +
  87443. +/* Macro for calculating log of base 2 */
  87444. +#define LOG2(num, log2Num) \
  87445. + do \
  87446. + { \
  87447. + uint64_t tmp = (num); \
  87448. + log2Num = 0; \
  87449. + while (tmp > 1) \
  87450. + { \
  87451. + log2Num++; \
  87452. + tmp >>= 1; \
  87453. + } \
  87454. + } while (0)
  87455. +
  87456. +#define NEXT_POWER_OF_2(_num, _nextPow) \
  87457. +do \
  87458. +{ \
  87459. + if (POWER_OF_2(_num)) \
  87460. + _nextPow = (_num); \
  87461. + else \
  87462. + { \
  87463. + uint64_t tmp = (_num); \
  87464. + _nextPow = 1; \
  87465. + while (tmp) \
  87466. + { \
  87467. + _nextPow <<= 1; \
  87468. + tmp >>= 1; \
  87469. + } \
  87470. + } \
  87471. +} while (0)
  87472. +
  87473. +/* Ceiling division - not the fastest way, but safer in terms of overflow */
  87474. +#define DIV_CEIL(x,y) (((x)/(y)) + ((((((x)/(y)))*(y)) == (x)) ? 0 : 1))
  87475. +
  87476. +/* Round up a number to be a multiple of a second number */
  87477. +#define ROUND_UP(x,y) ((((x) + (y) - 1) / (y)) * (y))
  87478. +
  87479. +/* Timing macro for converting usec units to number of ticks. */
  87480. +/* (number of usec * clock_Hz) / 1,000,000) - since */
  87481. +/* clk is in MHz units, no division needed. */
  87482. +#define USEC_TO_CLK(usec,clk) ((usec) * (clk))
  87483. +#define CYCLES_TO_USEC(cycles,clk) ((cycles) / (clk))
  87484. +
  87485. +/* Timing macros for converting between nsec units and number of clocks. */
  87486. +#define NSEC_TO_CLK(nsec,clk) DIV_CEIL(((nsec) * (clk)), 1000)
  87487. +#define CYCLES_TO_NSEC(cycles,clk) (((cycles) * 1000) / (clk))
  87488. +
  87489. +/* Timing macros for converting between psec units and number of clocks. */
  87490. +#define PSEC_TO_CLK(psec,clk) DIV_CEIL(((psec) * (clk)), 1000000)
  87491. +#define CYCLES_TO_PSEC(cycles,clk) (((cycles) * 1000000) / (clk))
  87492. +
  87493. +/* Min, Max macros */
  87494. +#define MIN(a,b) ((a) < (b) ? (a) : (b))
  87495. +#define MAX(a,b) ((a) > (b) ? (a) : (b))
  87496. +#define IN_RANGE(min,val,max) ((min)<=(val) && (val)<=(max))
  87497. +
  87498. +#define ABS(a) ((a<0)?(a*-1):a)
  87499. +
  87500. +#if !(defined(ARRAY_SIZE))
  87501. +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
  87502. +#endif /* !defined(ARRAY_SIZE) */
  87503. +
  87504. +
  87505. +/* possible alignments */
  87506. +#define HALF_WORD_ALIGNMENT 2
  87507. +#define WORD_ALIGNMENT 4
  87508. +#define DOUBLE_WORD_ALIGNMENT 8
  87509. +#define BURST_ALIGNMENT 32
  87510. +
  87511. +#define HALF_WORD_ALIGNED 0x00000001
  87512. +#define WORD_ALIGNED 0x00000003
  87513. +#define DOUBLE_WORD_ALIGNED 0x00000007
  87514. +#define BURST_ALIGNED 0x0000001f
  87515. +#ifndef IS_ALIGNED
  87516. +#define IS_ALIGNED(n,align) (!((uint32_t)(n) & (align - 1)))
  87517. +#endif /* IS_ALIGNED */
  87518. +
  87519. +
  87520. +#define LAST_BUF 1
  87521. +#define FIRST_BUF 2
  87522. +#define SINGLE_BUF (LAST_BUF | FIRST_BUF)
  87523. +#define MIDDLE_BUF 4
  87524. +
  87525. +#define ARRAY_END -1
  87526. +
  87527. +#define ILLEGAL_BASE (~0)
  87528. +
  87529. +#define BUF_POSITION(first, last) state[(!!(last))<<1 | !!(first)]
  87530. +#define DECLARE_POSITION static uint8_t state[4] = { (uint8_t)MIDDLE_BUF, (uint8_t)FIRST_BUF, (uint8_t)LAST_BUF, (uint8_t)SINGLE_BUF };
  87531. +
  87532. +
  87533. +/**************************************************************************//**
  87534. + @Description Timers operation mode
  87535. +*//***************************************************************************/
  87536. +typedef enum e_TimerMode
  87537. +{
  87538. + e_TIMER_MODE_INVALID = 0,
  87539. + e_TIMER_MODE_FREE_RUN, /**< Free run - counter continues to increase
  87540. + after reaching the reference value. */
  87541. + e_TIMER_MODE_PERIODIC, /**< Periodic - counter restarts counting from 0
  87542. + after reaching the reference value. */
  87543. + e_TIMER_MODE_SINGLE /**< Single (one-shot) - counter stops counting
  87544. + after reaching the reference value. */
  87545. +} e_TimerMode;
  87546. +
  87547. +
  87548. +/**************************************************************************//**
  87549. + @Description Enumeration (bit flags) of communication modes (Transmit,
  87550. + receive or both).
  87551. +*//***************************************************************************/
  87552. +typedef enum e_CommMode
  87553. +{
  87554. + e_COMM_MODE_NONE = 0, /**< No transmit/receive communication */
  87555. + e_COMM_MODE_RX = 1, /**< Only receive communication */
  87556. + e_COMM_MODE_TX = 2, /**< Only transmit communication */
  87557. + e_COMM_MODE_RX_AND_TX = 3 /**< Both transmit and receive communication */
  87558. +} e_CommMode;
  87559. +
  87560. +/**************************************************************************//**
  87561. + @Description General Diagnostic Mode
  87562. +*//***************************************************************************/
  87563. +typedef enum e_DiagMode
  87564. +{
  87565. + e_DIAG_MODE_NONE = 0, /**< Normal operation; no diagnostic mode */
  87566. + e_DIAG_MODE_CTRL_LOOPBACK, /**< Loopback in the controller */
  87567. + e_DIAG_MODE_CHIP_LOOPBACK, /**< Loopback in the chip but not in the
  87568. + controller; e.g. IO-pins, SerDes, etc. */
  87569. + e_DIAG_MODE_PHY_LOOPBACK, /**< Loopback in the external PHY */
  87570. + e_DIAG_MODE_EXT_LOOPBACK, /**< Loopback in the external line (beyond the PHY) */
  87571. + e_DIAG_MODE_CTRL_ECHO, /**< Echo incoming data by the controller */
  87572. + e_DIAG_MODE_PHY_ECHO /**< Echo incoming data by the PHY */
  87573. +} e_DiagMode;
  87574. +
  87575. +/**************************************************************************//**
  87576. + @Description Possible RxStore callback responses.
  87577. +*//***************************************************************************/
  87578. +typedef enum e_RxStoreResponse
  87579. +{
  87580. + e_RX_STORE_RESPONSE_PAUSE /**< Pause invoking callback with received data;
  87581. + in polling mode, start again invoking callback
  87582. + only next time user invokes the receive routine;
  87583. + in interrupt mode, start again invoking callback
  87584. + only next time a receive event triggers an interrupt;
  87585. + in all cases, received data that are pending are not
  87586. + lost, rather, their processing is temporarily deferred;
  87587. + in all cases, received data are processed in the order
  87588. + in which they were received. */
  87589. + , e_RX_STORE_RESPONSE_CONTINUE /**< Continue invoking callback with received data. */
  87590. +} e_RxStoreResponse;
  87591. +
  87592. +
  87593. +/**************************************************************************//**
  87594. + @Description General Handle
  87595. +*//***************************************************************************/
  87596. +typedef void * t_Handle; /**< handle, used as object's descriptor */
  87597. +
  87598. +/**************************************************************************//**
  87599. + @Description MUTEX type
  87600. +*//***************************************************************************/
  87601. +typedef uint32_t t_Mutex;
  87602. +
  87603. +/**************************************************************************//**
  87604. + @Description Error Code.
  87605. +
  87606. + The high word of the error code is the code of the software
  87607. + module (driver). The low word is the error type (e_ErrorType).
  87608. + To get the values from the error code, use GET_ERROR_TYPE()
  87609. + and GET_ERROR_MODULE().
  87610. +*//***************************************************************************/
  87611. +typedef uint32_t t_Error;
  87612. +
  87613. +/**************************************************************************//**
  87614. + @Description General prototype of interrupt service routine (ISR).
  87615. +
  87616. + @Param[in] handle - Optional handle of the module handling the interrupt.
  87617. +
  87618. + @Return None
  87619. + *//***************************************************************************/
  87620. +typedef void (t_Isr)(t_Handle handle);
  87621. +
  87622. +/**************************************************************************//**
  87623. + @Anchor mem_attr
  87624. +
  87625. + @Collection Memory Attributes
  87626. +
  87627. + Various attributes of memory partitions. These values may be
  87628. + or'ed together to create a mask of all memory attributes.
  87629. + @{
  87630. +*//***************************************************************************/
  87631. +#define MEMORY_ATTR_CACHEABLE 0x00000001
  87632. + /**< Memory is cacheable */
  87633. +#define MEMORY_ATTR_QE_2ND_BUS_ACCESS 0x00000002
  87634. + /**< Memory can be accessed by QUICC Engine
  87635. + through its secondary bus interface */
  87636. +
  87637. +/* @} */
  87638. +
  87639. +
  87640. +/**************************************************************************//**
  87641. + @Function t_GetBufFunction
  87642. +
  87643. + @Description User callback function called by driver to get data buffer.
  87644. +
  87645. + User provides this function. Driver invokes it.
  87646. +
  87647. + @Param[in] h_BufferPool - A handle to buffer pool manager
  87648. + @Param[out] p_BufContextHandle - Returns the user's private context that
  87649. + should be associated with the buffer
  87650. +
  87651. + @Return Pointer to data buffer, NULL if error
  87652. + *//***************************************************************************/
  87653. +typedef uint8_t * (t_GetBufFunction)(t_Handle h_BufferPool,
  87654. + t_Handle *p_BufContextHandle);
  87655. +
  87656. +/**************************************************************************//**
  87657. + @Function t_PutBufFunction
  87658. +
  87659. + @Description User callback function called by driver to return data buffer.
  87660. +
  87661. + User provides this function. Driver invokes it.
  87662. +
  87663. + @Param[in] h_BufferPool - A handle to buffer pool manager
  87664. + @Param[in] p_Buffer - A pointer to buffer to return
  87665. + @Param[in] h_BufContext - The user's private context associated with
  87666. + the returned buffer
  87667. +
  87668. + @Return E_OK on success; Error code otherwise
  87669. + *//***************************************************************************/
  87670. +typedef t_Error (t_PutBufFunction)(t_Handle h_BufferPool,
  87671. + uint8_t *p_Buffer,
  87672. + t_Handle h_BufContext);
  87673. +
  87674. +/**************************************************************************//**
  87675. + @Function t_PhysToVirt
  87676. +
  87677. + @Description Translates a physical address to the matching virtual address.
  87678. +
  87679. + @Param[in] addr - The physical address to translate.
  87680. +
  87681. + @Return Virtual address.
  87682. +*//***************************************************************************/
  87683. +typedef void * t_PhysToVirt(physAddress_t addr);
  87684. +
  87685. +/**************************************************************************//**
  87686. + @Function t_VirtToPhys
  87687. +
  87688. + @Description Translates a virtual address to the matching physical address.
  87689. +
  87690. + @Param[in] addr - The virtual address to translate.
  87691. +
  87692. + @Return Physical address.
  87693. +*//***************************************************************************/
  87694. +typedef physAddress_t t_VirtToPhys(void *addr);
  87695. +
  87696. +/**************************************************************************//**
  87697. + @Description Buffer Pool Information Structure.
  87698. +*//***************************************************************************/
  87699. +typedef struct t_BufferPoolInfo
  87700. +{
  87701. + t_Handle h_BufferPool; /**< A handle to the buffer pool manager */
  87702. + t_GetBufFunction *f_GetBuf; /**< User callback to get a free buffer */
  87703. + t_PutBufFunction *f_PutBuf; /**< User callback to return a buffer */
  87704. + uint16_t bufferSize; /**< Buffer size (in bytes) */
  87705. +
  87706. + t_PhysToVirt *f_PhysToVirt; /**< User callback to translate pool buffers
  87707. + physical addresses to virtual addresses */
  87708. + t_VirtToPhys *f_VirtToPhys; /**< User callback to translate pool buffers
  87709. + virtual addresses to physical addresses */
  87710. +} t_BufferPoolInfo;
  87711. +
  87712. +
  87713. +/**************************************************************************//**
  87714. + @Description User callback function called by driver when transmit completed.
  87715. +
  87716. + User provides this function. Driver invokes it.
  87717. +
  87718. + @Param[in] h_App - Application's handle, as was provided to the
  87719. + driver by the user
  87720. + @Param[in] queueId - Transmit queue ID
  87721. + @Param[in] p_Data - Pointer to the data buffer
  87722. + @Param[in] h_BufContext - The user's private context associated with
  87723. + the given data buffer
  87724. + @Param[in] status - Transmit status and errors
  87725. + @Param[in] flags - Driver-dependent information
  87726. + *//***************************************************************************/
  87727. +typedef void (t_TxConfFunction)(t_Handle h_App,
  87728. + uint32_t queueId,
  87729. + uint8_t *p_Data,
  87730. + t_Handle h_BufContext,
  87731. + uint16_t status,
  87732. + uint32_t flags);
  87733. +
  87734. +/**************************************************************************//**
  87735. + @Description User callback function called by driver with receive data.
  87736. +
  87737. + User provides this function. Driver invokes it.
  87738. +
  87739. + @Param[in] h_App - Application's handle, as was provided to the
  87740. + driver by the user
  87741. + @Param[in] queueId - Receive queue ID
  87742. + @Param[in] p_Data - Pointer to the buffer with received data
  87743. + @Param[in] h_BufContext - The user's private context associated with
  87744. + the given data buffer
  87745. + @Param[in] length - Length of received data
  87746. + @Param[in] status - Receive status and errors
  87747. + @Param[in] position - Position of buffer in frame
  87748. + @Param[in] flags - Driver-dependent information
  87749. +
  87750. + @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
  87751. + operation for all ready data.
  87752. + @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation.
  87753. + *//***************************************************************************/
  87754. +typedef e_RxStoreResponse (t_RxStoreFunction)(t_Handle h_App,
  87755. + uint32_t queueId,
  87756. + uint8_t *p_Data,
  87757. + t_Handle h_BufContext,
  87758. + uint32_t length,
  87759. + uint16_t status,
  87760. + uint8_t position,
  87761. + uint32_t flags);
  87762. +
  87763. +
  87764. +#endif /* __NCSW_EXT_H */
  87765. --- /dev/null
  87766. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/net_ext.h
  87767. @@ -0,0 +1,430 @@
  87768. +/*
  87769. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  87770. + *
  87771. + * Redistribution and use in source and binary forms, with or without
  87772. + * modification, are permitted provided that the following conditions are met:
  87773. + * * Redistributions of source code must retain the above copyright
  87774. + * notice, this list of conditions and the following disclaimer.
  87775. + * * Redistributions in binary form must reproduce the above copyright
  87776. + * notice, this list of conditions and the following disclaimer in the
  87777. + * documentation and/or other materials provided with the distribution.
  87778. + * * Neither the name of Freescale Semiconductor nor the
  87779. + * names of its contributors may be used to endorse or promote products
  87780. + * derived from this software without specific prior written permission.
  87781. + *
  87782. + *
  87783. + * ALTERNATIVELY, this software may be distributed under the terms of the
  87784. + * GNU General Public License ("GPL") as published by the Free Software
  87785. + * Foundation, either version 2 of that License or (at your option) any
  87786. + * later version.
  87787. + *
  87788. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  87789. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  87790. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  87791. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  87792. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  87793. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  87794. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  87795. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  87796. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  87797. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  87798. + */
  87799. +
  87800. +
  87801. +/**************************************************************************//**
  87802. + @File net_ext.h
  87803. +
  87804. + @Description This file contains common and general netcomm headers definitions.
  87805. +*//***************************************************************************/
  87806. +#ifndef __NET_EXT_H
  87807. +#define __NET_EXT_H
  87808. +
  87809. +#include "std_ext.h"
  87810. +
  87811. +
  87812. +typedef uint8_t headerFieldPpp_t;
  87813. +
  87814. +#define NET_HEADER_FIELD_PPP_PID (1)
  87815. +#define NET_HEADER_FIELD_PPP_COMPRESSED (NET_HEADER_FIELD_PPP_PID << 1)
  87816. +#define NET_HEADER_FIELD_PPP_ALL_FIELDS ((NET_HEADER_FIELD_PPP_PID << 2) - 1)
  87817. +
  87818. +
  87819. +typedef uint8_t headerFieldPppoe_t;
  87820. +
  87821. +#define NET_HEADER_FIELD_PPPoE_VER (1)
  87822. +#define NET_HEADER_FIELD_PPPoE_TYPE (NET_HEADER_FIELD_PPPoE_VER << 1)
  87823. +#define NET_HEADER_FIELD_PPPoE_CODE (NET_HEADER_FIELD_PPPoE_VER << 2)
  87824. +#define NET_HEADER_FIELD_PPPoE_SID (NET_HEADER_FIELD_PPPoE_VER << 3)
  87825. +#define NET_HEADER_FIELD_PPPoE_LEN (NET_HEADER_FIELD_PPPoE_VER << 4)
  87826. +#define NET_HEADER_FIELD_PPPoE_SESSION (NET_HEADER_FIELD_PPPoE_VER << 5)
  87827. +#define NET_HEADER_FIELD_PPPoE_PID (NET_HEADER_FIELD_PPPoE_VER << 6)
  87828. +#define NET_HEADER_FIELD_PPPoE_ALL_FIELDS ((NET_HEADER_FIELD_PPPoE_VER << 7) - 1)
  87829. +
  87830. +#define NET_HEADER_FIELD_PPPMUX_PID (1)
  87831. +#define NET_HEADER_FIELD_PPPMUX_CKSUM (NET_HEADER_FIELD_PPPMUX_PID << 1)
  87832. +#define NET_HEADER_FIELD_PPPMUX_COMPRESSED (NET_HEADER_FIELD_PPPMUX_PID << 2)
  87833. +#define NET_HEADER_FIELD_PPPMUX_ALL_FIELDS ((NET_HEADER_FIELD_PPPMUX_PID << 3) - 1)
  87834. +
  87835. +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF (1)
  87836. +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_LXT (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 1)
  87837. +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_LEN (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 2)
  87838. +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_PID (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 3)
  87839. +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_USE_PID (NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 4)
  87840. +#define NET_HEADER_FIELD_PPPMUX_SUBFRAME_ALL_FIELDS ((NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 5) - 1)
  87841. +
  87842. +
  87843. +typedef uint8_t headerFieldEth_t;
  87844. +
  87845. +#define NET_HEADER_FIELD_ETH_DA (1)
  87846. +#define NET_HEADER_FIELD_ETH_SA (NET_HEADER_FIELD_ETH_DA << 1)
  87847. +#define NET_HEADER_FIELD_ETH_LENGTH (NET_HEADER_FIELD_ETH_DA << 2)
  87848. +#define NET_HEADER_FIELD_ETH_TYPE (NET_HEADER_FIELD_ETH_DA << 3)
  87849. +#define NET_HEADER_FIELD_ETH_FINAL_CKSUM (NET_HEADER_FIELD_ETH_DA << 4)
  87850. +#define NET_HEADER_FIELD_ETH_PADDING (NET_HEADER_FIELD_ETH_DA << 5)
  87851. +#define NET_HEADER_FIELD_ETH_ALL_FIELDS ((NET_HEADER_FIELD_ETH_DA << 6) - 1)
  87852. +
  87853. +#define NET_HEADER_FIELD_ETH_ADDR_SIZE 6
  87854. +
  87855. +typedef uint16_t headerFieldIp_t;
  87856. +
  87857. +#define NET_HEADER_FIELD_IP_VER (1)
  87858. +#define NET_HEADER_FIELD_IP_DSCP (NET_HEADER_FIELD_IP_VER << 2)
  87859. +#define NET_HEADER_FIELD_IP_ECN (NET_HEADER_FIELD_IP_VER << 3)
  87860. +#define NET_HEADER_FIELD_IP_PROTO (NET_HEADER_FIELD_IP_VER << 4)
  87861. +
  87862. +#define NET_HEADER_FIELD_IP_PROTO_SIZE 1
  87863. +
  87864. +typedef uint16_t headerFieldIpv4_t;
  87865. +
  87866. +#define NET_HEADER_FIELD_IPv4_VER (1)
  87867. +#define NET_HEADER_FIELD_IPv4_HDR_LEN (NET_HEADER_FIELD_IPv4_VER << 1)
  87868. +#define NET_HEADER_FIELD_IPv4_TOS (NET_HEADER_FIELD_IPv4_VER << 2)
  87869. +#define NET_HEADER_FIELD_IPv4_TOTAL_LEN (NET_HEADER_FIELD_IPv4_VER << 3)
  87870. +#define NET_HEADER_FIELD_IPv4_ID (NET_HEADER_FIELD_IPv4_VER << 4)
  87871. +#define NET_HEADER_FIELD_IPv4_FLAG_D (NET_HEADER_FIELD_IPv4_VER << 5)
  87872. +#define NET_HEADER_FIELD_IPv4_FLAG_M (NET_HEADER_FIELD_IPv4_VER << 6)
  87873. +#define NET_HEADER_FIELD_IPv4_OFFSET (NET_HEADER_FIELD_IPv4_VER << 7)
  87874. +#define NET_HEADER_FIELD_IPv4_TTL (NET_HEADER_FIELD_IPv4_VER << 8)
  87875. +#define NET_HEADER_FIELD_IPv4_PROTO (NET_HEADER_FIELD_IPv4_VER << 9)
  87876. +#define NET_HEADER_FIELD_IPv4_CKSUM (NET_HEADER_FIELD_IPv4_VER << 10)
  87877. +#define NET_HEADER_FIELD_IPv4_SRC_IP (NET_HEADER_FIELD_IPv4_VER << 11)
  87878. +#define NET_HEADER_FIELD_IPv4_DST_IP (NET_HEADER_FIELD_IPv4_VER << 12)
  87879. +#define NET_HEADER_FIELD_IPv4_OPTS (NET_HEADER_FIELD_IPv4_VER << 13)
  87880. +#define NET_HEADER_FIELD_IPv4_OPTS_COUNT (NET_HEADER_FIELD_IPv4_VER << 14)
  87881. +#define NET_HEADER_FIELD_IPv4_ALL_FIELDS ((NET_HEADER_FIELD_IPv4_VER << 15) - 1)
  87882. +
  87883. +#define NET_HEADER_FIELD_IPv4_ADDR_SIZE 4
  87884. +#define NET_HEADER_FIELD_IPv4_PROTO_SIZE 1
  87885. +
  87886. +
  87887. +typedef uint8_t headerFieldIpv6_t;
  87888. +
  87889. +#define NET_HEADER_FIELD_IPv6_VER (1)
  87890. +#define NET_HEADER_FIELD_IPv6_TC (NET_HEADER_FIELD_IPv6_VER << 1)
  87891. +#define NET_HEADER_FIELD_IPv6_SRC_IP (NET_HEADER_FIELD_IPv6_VER << 2)
  87892. +#define NET_HEADER_FIELD_IPv6_DST_IP (NET_HEADER_FIELD_IPv6_VER << 3)
  87893. +#define NET_HEADER_FIELD_IPv6_NEXT_HDR (NET_HEADER_FIELD_IPv6_VER << 4)
  87894. +#define NET_HEADER_FIELD_IPv6_FL (NET_HEADER_FIELD_IPv6_VER << 5)
  87895. +#define NET_HEADER_FIELD_IPv6_HOP_LIMIT (NET_HEADER_FIELD_IPv6_VER << 6)
  87896. +#define NET_HEADER_FIELD_IPv6_ALL_FIELDS ((NET_HEADER_FIELD_IPv6_VER << 7) - 1)
  87897. +
  87898. +#define NET_HEADER_FIELD_IPv6_ADDR_SIZE 16
  87899. +#define NET_HEADER_FIELD_IPv6_NEXT_HDR_SIZE 1
  87900. +
  87901. +#define NET_HEADER_FIELD_ICMP_TYPE (1)
  87902. +#define NET_HEADER_FIELD_ICMP_CODE (NET_HEADER_FIELD_ICMP_TYPE << 1)
  87903. +#define NET_HEADER_FIELD_ICMP_CKSUM (NET_HEADER_FIELD_ICMP_TYPE << 2)
  87904. +#define NET_HEADER_FIELD_ICMP_ID (NET_HEADER_FIELD_ICMP_TYPE << 3)
  87905. +#define NET_HEADER_FIELD_ICMP_SQ_NUM (NET_HEADER_FIELD_ICMP_TYPE << 4)
  87906. +#define NET_HEADER_FIELD_ICMP_ALL_FIELDS ((NET_HEADER_FIELD_ICMP_TYPE << 5) - 1)
  87907. +
  87908. +#define NET_HEADER_FIELD_ICMP_CODE_SIZE 1
  87909. +#define NET_HEADER_FIELD_ICMP_TYPE_SIZE 1
  87910. +
  87911. +#define NET_HEADER_FIELD_IGMP_VERSION (1)
  87912. +#define NET_HEADER_FIELD_IGMP_TYPE (NET_HEADER_FIELD_IGMP_VERSION << 1)
  87913. +#define NET_HEADER_FIELD_IGMP_CKSUM (NET_HEADER_FIELD_IGMP_VERSION << 2)
  87914. +#define NET_HEADER_FIELD_IGMP_DATA (NET_HEADER_FIELD_IGMP_VERSION << 3)
  87915. +#define NET_HEADER_FIELD_IGMP_ALL_FIELDS ((NET_HEADER_FIELD_IGMP_VERSION << 4) - 1)
  87916. +
  87917. +
  87918. +typedef uint16_t headerFieldTcp_t;
  87919. +
  87920. +#define NET_HEADER_FIELD_TCP_PORT_SRC (1)
  87921. +#define NET_HEADER_FIELD_TCP_PORT_DST (NET_HEADER_FIELD_TCP_PORT_SRC << 1)
  87922. +#define NET_HEADER_FIELD_TCP_SEQ (NET_HEADER_FIELD_TCP_PORT_SRC << 2)
  87923. +#define NET_HEADER_FIELD_TCP_ACK (NET_HEADER_FIELD_TCP_PORT_SRC << 3)
  87924. +#define NET_HEADER_FIELD_TCP_OFFSET (NET_HEADER_FIELD_TCP_PORT_SRC << 4)
  87925. +#define NET_HEADER_FIELD_TCP_FLAGS (NET_HEADER_FIELD_TCP_PORT_SRC << 5)
  87926. +#define NET_HEADER_FIELD_TCP_WINDOW (NET_HEADER_FIELD_TCP_PORT_SRC << 6)
  87927. +#define NET_HEADER_FIELD_TCP_CKSUM (NET_HEADER_FIELD_TCP_PORT_SRC << 7)
  87928. +#define NET_HEADER_FIELD_TCP_URGPTR (NET_HEADER_FIELD_TCP_PORT_SRC << 8)
  87929. +#define NET_HEADER_FIELD_TCP_OPTS (NET_HEADER_FIELD_TCP_PORT_SRC << 9)
  87930. +#define NET_HEADER_FIELD_TCP_OPTS_COUNT (NET_HEADER_FIELD_TCP_PORT_SRC << 10)
  87931. +#define NET_HEADER_FIELD_TCP_ALL_FIELDS ((NET_HEADER_FIELD_TCP_PORT_SRC << 11) - 1)
  87932. +
  87933. +#define NET_HEADER_FIELD_TCP_PORT_SIZE 2
  87934. +
  87935. +
  87936. +typedef uint8_t headerFieldSctp_t;
  87937. +
  87938. +#define NET_HEADER_FIELD_SCTP_PORT_SRC (1)
  87939. +#define NET_HEADER_FIELD_SCTP_PORT_DST (NET_HEADER_FIELD_SCTP_PORT_SRC << 1)
  87940. +#define NET_HEADER_FIELD_SCTP_VER_TAG (NET_HEADER_FIELD_SCTP_PORT_SRC << 2)
  87941. +#define NET_HEADER_FIELD_SCTP_CKSUM (NET_HEADER_FIELD_SCTP_PORT_SRC << 3)
  87942. +#define NET_HEADER_FIELD_SCTP_ALL_FIELDS ((NET_HEADER_FIELD_SCTP_PORT_SRC << 4) - 1)
  87943. +
  87944. +#define NET_HEADER_FIELD_SCTP_PORT_SIZE 2
  87945. +
  87946. +typedef uint8_t headerFieldDccp_t;
  87947. +
  87948. +#define NET_HEADER_FIELD_DCCP_PORT_SRC (1)
  87949. +#define NET_HEADER_FIELD_DCCP_PORT_DST (NET_HEADER_FIELD_DCCP_PORT_SRC << 1)
  87950. +#define NET_HEADER_FIELD_DCCP_ALL_FIELDS ((NET_HEADER_FIELD_DCCP_PORT_SRC << 2) - 1)
  87951. +
  87952. +#define NET_HEADER_FIELD_DCCP_PORT_SIZE 2
  87953. +
  87954. +
  87955. +typedef uint8_t headerFieldUdp_t;
  87956. +
  87957. +#define NET_HEADER_FIELD_UDP_PORT_SRC (1)
  87958. +#define NET_HEADER_FIELD_UDP_PORT_DST (NET_HEADER_FIELD_UDP_PORT_SRC << 1)
  87959. +#define NET_HEADER_FIELD_UDP_LEN (NET_HEADER_FIELD_UDP_PORT_SRC << 2)
  87960. +#define NET_HEADER_FIELD_UDP_CKSUM (NET_HEADER_FIELD_UDP_PORT_SRC << 3)
  87961. +#define NET_HEADER_FIELD_UDP_ALL_FIELDS ((NET_HEADER_FIELD_UDP_PORT_SRC << 4) - 1)
  87962. +
  87963. +#define NET_HEADER_FIELD_UDP_PORT_SIZE 2
  87964. +
  87965. +typedef uint8_t headerFieldUdpLite_t;
  87966. +
  87967. +#define NET_HEADER_FIELD_UDP_LITE_PORT_SRC (1)
  87968. +#define NET_HEADER_FIELD_UDP_LITE_PORT_DST (NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 1)
  87969. +#define NET_HEADER_FIELD_UDP_LITE_ALL_FIELDS ((NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 2) - 1)
  87970. +
  87971. +#define NET_HEADER_FIELD_UDP_LITE_PORT_SIZE 2
  87972. +
  87973. +typedef uint8_t headerFieldUdpEncapEsp_t;
  87974. +
  87975. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC (1)
  87976. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 1)
  87977. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 2)
  87978. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 3)
  87979. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 4)
  87980. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM (NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 5)
  87981. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_ALL_FIELDS ((NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 6) - 1)
  87982. +
  87983. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SIZE 2
  87984. +#define NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI_SIZE 4
  87985. +
  87986. +#define NET_HEADER_FIELD_IPHC_CID (1)
  87987. +#define NET_HEADER_FIELD_IPHC_CID_TYPE (NET_HEADER_FIELD_IPHC_CID << 1)
  87988. +#define NET_HEADER_FIELD_IPHC_HCINDEX (NET_HEADER_FIELD_IPHC_CID << 2)
  87989. +#define NET_HEADER_FIELD_IPHC_GEN (NET_HEADER_FIELD_IPHC_CID << 3)
  87990. +#define NET_HEADER_FIELD_IPHC_D_BIT (NET_HEADER_FIELD_IPHC_CID << 4)
  87991. +#define NET_HEADER_FIELD_IPHC_ALL_FIELDS ((NET_HEADER_FIELD_IPHC_CID << 5) - 1)
  87992. +
  87993. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE (1)
  87994. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_FLAGS (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 1)
  87995. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_LENGTH (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 2)
  87996. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_TSN (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 3)
  87997. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_ID (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 4)
  87998. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_SQN (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 5)
  87999. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_PAYLOAD_PID (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 6)
  88000. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_UNORDERED (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 7)
  88001. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_BEGGINING (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 8)
  88002. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_END (NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 9)
  88003. +#define NET_HEADER_FIELD_SCTP_CHUNK_DATA_ALL_FIELDS ((NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 10) - 1)
  88004. +
  88005. +#define NET_HEADER_FIELD_L2TPv2_TYPE_BIT (1)
  88006. +#define NET_HEADER_FIELD_L2TPv2_LENGTH_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 1)
  88007. +#define NET_HEADER_FIELD_L2TPv2_SEQUENCE_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 2)
  88008. +#define NET_HEADER_FIELD_L2TPv2_OFFSET_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 3)
  88009. +#define NET_HEADER_FIELD_L2TPv2_PRIORITY_BIT (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 4)
  88010. +#define NET_HEADER_FIELD_L2TPv2_VERSION (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 5)
  88011. +#define NET_HEADER_FIELD_L2TPv2_LEN (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 6)
  88012. +#define NET_HEADER_FIELD_L2TPv2_TUNNEL_ID (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 7)
  88013. +#define NET_HEADER_FIELD_L2TPv2_SESSION_ID (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 8)
  88014. +#define NET_HEADER_FIELD_L2TPv2_NS (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 9)
  88015. +#define NET_HEADER_FIELD_L2TPv2_NR (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 10)
  88016. +#define NET_HEADER_FIELD_L2TPv2_OFFSET_SIZE (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 11)
  88017. +#define NET_HEADER_FIELD_L2TPv2_FIRST_BYTE (NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 12)
  88018. +#define NET_HEADER_FIELD_L2TPv2_ALL_FIELDS ((NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 13) - 1)
  88019. +
  88020. +#define NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT (1)
  88021. +#define NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH_BIT (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 1)
  88022. +#define NET_HEADER_FIELD_L2TPv3_CTRL_SEQUENCE_BIT (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 2)
  88023. +#define NET_HEADER_FIELD_L2TPv3_CTRL_VERSION (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 3)
  88024. +#define NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 4)
  88025. +#define NET_HEADER_FIELD_L2TPv3_CTRL_CONTROL (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 5)
  88026. +#define NET_HEADER_FIELD_L2TPv3_CTRL_SENT (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 6)
  88027. +#define NET_HEADER_FIELD_L2TPv3_CTRL_RECV (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 7)
  88028. +#define NET_HEADER_FIELD_L2TPv3_CTRL_FIRST_BYTE (NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 8)
  88029. +#define NET_HEADER_FIELD_L2TPv3_CTRL_ALL_FIELDS ((NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 9) - 1)
  88030. +
  88031. +#define NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT (1)
  88032. +#define NET_HEADER_FIELD_L2TPv3_SESS_VERSION (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 1)
  88033. +#define NET_HEADER_FIELD_L2TPv3_SESS_ID (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 2)
  88034. +#define NET_HEADER_FIELD_L2TPv3_SESS_COOKIE (NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 3)
  88035. +#define NET_HEADER_FIELD_L2TPv3_SESS_ALL_FIELDS ((NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 4) - 1)
  88036. +
  88037. +
  88038. +typedef uint8_t headerFieldVlan_t;
  88039. +
  88040. +#define NET_HEADER_FIELD_VLAN_VPRI (1)
  88041. +#define NET_HEADER_FIELD_VLAN_CFI (NET_HEADER_FIELD_VLAN_VPRI << 1)
  88042. +#define NET_HEADER_FIELD_VLAN_VID (NET_HEADER_FIELD_VLAN_VPRI << 2)
  88043. +#define NET_HEADER_FIELD_VLAN_LENGTH (NET_HEADER_FIELD_VLAN_VPRI << 3)
  88044. +#define NET_HEADER_FIELD_VLAN_TYPE (NET_HEADER_FIELD_VLAN_VPRI << 4)
  88045. +#define NET_HEADER_FIELD_VLAN_ALL_FIELDS ((NET_HEADER_FIELD_VLAN_VPRI << 5) - 1)
  88046. +
  88047. +#define NET_HEADER_FIELD_VLAN_TCI (NET_HEADER_FIELD_VLAN_VPRI | \
  88048. + NET_HEADER_FIELD_VLAN_CFI | \
  88049. + NET_HEADER_FIELD_VLAN_VID)
  88050. +
  88051. +
  88052. +typedef uint8_t headerFieldLlc_t;
  88053. +
  88054. +#define NET_HEADER_FIELD_LLC_DSAP (1)
  88055. +#define NET_HEADER_FIELD_LLC_SSAP (NET_HEADER_FIELD_LLC_DSAP << 1)
  88056. +#define NET_HEADER_FIELD_LLC_CTRL (NET_HEADER_FIELD_LLC_DSAP << 2)
  88057. +#define NET_HEADER_FIELD_LLC_ALL_FIELDS ((NET_HEADER_FIELD_LLC_DSAP << 3) - 1)
  88058. +
  88059. +#define NET_HEADER_FIELD_NLPID_NLPID (1)
  88060. +#define NET_HEADER_FIELD_NLPID_ALL_FIELDS ((NET_HEADER_FIELD_NLPID_NLPID << 1) - 1)
  88061. +
  88062. +
  88063. +typedef uint8_t headerFieldSnap_t;
  88064. +
  88065. +#define NET_HEADER_FIELD_SNAP_OUI (1)
  88066. +#define NET_HEADER_FIELD_SNAP_PID (NET_HEADER_FIELD_SNAP_OUI << 1)
  88067. +#define NET_HEADER_FIELD_SNAP_ALL_FIELDS ((NET_HEADER_FIELD_SNAP_OUI << 2) - 1)
  88068. +
  88069. +
  88070. +typedef uint8_t headerFieldLlcSnap_t;
  88071. +
  88072. +#define NET_HEADER_FIELD_LLC_SNAP_TYPE (1)
  88073. +#define NET_HEADER_FIELD_LLC_SNAP_ALL_FIELDS ((NET_HEADER_FIELD_LLC_SNAP_TYPE << 1) - 1)
  88074. +
  88075. +#define NET_HEADER_FIELD_ARP_HTYPE (1)
  88076. +#define NET_HEADER_FIELD_ARP_PTYPE (NET_HEADER_FIELD_ARP_HTYPE << 1)
  88077. +#define NET_HEADER_FIELD_ARP_HLEN (NET_HEADER_FIELD_ARP_HTYPE << 2)
  88078. +#define NET_HEADER_FIELD_ARP_PLEN (NET_HEADER_FIELD_ARP_HTYPE << 3)
  88079. +#define NET_HEADER_FIELD_ARP_OPER (NET_HEADER_FIELD_ARP_HTYPE << 4)
  88080. +#define NET_HEADER_FIELD_ARP_SHA (NET_HEADER_FIELD_ARP_HTYPE << 5)
  88081. +#define NET_HEADER_FIELD_ARP_SPA (NET_HEADER_FIELD_ARP_HTYPE << 6)
  88082. +#define NET_HEADER_FIELD_ARP_THA (NET_HEADER_FIELD_ARP_HTYPE << 7)
  88083. +#define NET_HEADER_FIELD_ARP_TPA (NET_HEADER_FIELD_ARP_HTYPE << 8)
  88084. +#define NET_HEADER_FIELD_ARP_ALL_FIELDS ((NET_HEADER_FIELD_ARP_HTYPE << 9) - 1)
  88085. +
  88086. +#define NET_HEADER_FIELD_RFC2684_LLC (1)
  88087. +#define NET_HEADER_FIELD_RFC2684_NLPID (NET_HEADER_FIELD_RFC2684_LLC << 1)
  88088. +#define NET_HEADER_FIELD_RFC2684_OUI (NET_HEADER_FIELD_RFC2684_LLC << 2)
  88089. +#define NET_HEADER_FIELD_RFC2684_PID (NET_HEADER_FIELD_RFC2684_LLC << 3)
  88090. +#define NET_HEADER_FIELD_RFC2684_VPN_OUI (NET_HEADER_FIELD_RFC2684_LLC << 4)
  88091. +#define NET_HEADER_FIELD_RFC2684_VPN_IDX (NET_HEADER_FIELD_RFC2684_LLC << 5)
  88092. +#define NET_HEADER_FIELD_RFC2684_ALL_FIELDS ((NET_HEADER_FIELD_RFC2684_LLC << 6) - 1)
  88093. +
  88094. +#define NET_HEADER_FIELD_USER_DEFINED_SRCPORT (1)
  88095. +#define NET_HEADER_FIELD_USER_DEFINED_PCDID (NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 1)
  88096. +#define NET_HEADER_FIELD_USER_DEFINED_ALL_FIELDS ((NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 2) - 1)
  88097. +
  88098. +#define NET_HEADER_FIELD_PAYLOAD_BUFFER (1)
  88099. +#define NET_HEADER_FIELD_PAYLOAD_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 1)
  88100. +#define NET_HEADER_FIELD_MAX_FRM_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 2)
  88101. +#define NET_HEADER_FIELD_MIN_FRM_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 3)
  88102. +#define NET_HEADER_FIELD_PAYLOAD_TYPE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 4)
  88103. +#define NET_HEADER_FIELD_FRAME_SIZE (NET_HEADER_FIELD_PAYLOAD_BUFFER << 5)
  88104. +#define NET_HEADER_FIELD_PAYLOAD_ALL_FIELDS ((NET_HEADER_FIELD_PAYLOAD_BUFFER << 6) - 1)
  88105. +
  88106. +
  88107. +typedef uint8_t headerFieldGre_t;
  88108. +
  88109. +#define NET_HEADER_FIELD_GRE_TYPE (1)
  88110. +#define NET_HEADER_FIELD_GRE_ALL_FIELDS ((NET_HEADER_FIELD_GRE_TYPE << 1) - 1)
  88111. +
  88112. +
  88113. +typedef uint8_t headerFieldMinencap_t;
  88114. +
  88115. +#define NET_HEADER_FIELD_MINENCAP_SRC_IP (1)
  88116. +#define NET_HEADER_FIELD_MINENCAP_DST_IP (NET_HEADER_FIELD_MINENCAP_SRC_IP << 1)
  88117. +#define NET_HEADER_FIELD_MINENCAP_TYPE (NET_HEADER_FIELD_MINENCAP_SRC_IP << 2)
  88118. +#define NET_HEADER_FIELD_MINENCAP_ALL_FIELDS ((NET_HEADER_FIELD_MINENCAP_SRC_IP << 3) - 1)
  88119. +
  88120. +
  88121. +typedef uint8_t headerFieldIpsecAh_t;
  88122. +
  88123. +#define NET_HEADER_FIELD_IPSEC_AH_SPI (1)
  88124. +#define NET_HEADER_FIELD_IPSEC_AH_NH (NET_HEADER_FIELD_IPSEC_AH_SPI << 1)
  88125. +#define NET_HEADER_FIELD_IPSEC_AH_ALL_FIELDS ((NET_HEADER_FIELD_IPSEC_AH_SPI << 2) - 1)
  88126. +
  88127. +
  88128. +typedef uint8_t headerFieldIpsecEsp_t;
  88129. +
  88130. +#define NET_HEADER_FIELD_IPSEC_ESP_SPI (1)
  88131. +#define NET_HEADER_FIELD_IPSEC_ESP_SEQUENCE_NUM (NET_HEADER_FIELD_IPSEC_ESP_SPI << 1)
  88132. +#define NET_HEADER_FIELD_IPSEC_ESP_ALL_FIELDS ((NET_HEADER_FIELD_IPSEC_ESP_SPI << 2) - 1)
  88133. +
  88134. +#define NET_HEADER_FIELD_IPSEC_ESP_SPI_SIZE 4
  88135. +
  88136. +
  88137. +typedef uint8_t headerFieldMpls_t;
  88138. +
  88139. +#define NET_HEADER_FIELD_MPLS_LABEL_STACK (1)
  88140. +#define NET_HEADER_FIELD_MPLS_LABEL_STACK_ALL_FIELDS ((NET_HEADER_FIELD_MPLS_LABEL_STACK << 1) - 1)
  88141. +
  88142. +
  88143. +typedef uint8_t headerFieldMacsec_t;
  88144. +
  88145. +#define NET_HEADER_FIELD_MACSEC_SECTAG (1)
  88146. +#define NET_HEADER_FIELD_MACSEC_ALL_FIELDS ((NET_HEADER_FIELD_MACSEC_SECTAG << 1) - 1)
  88147. +
  88148. +
  88149. +typedef enum {
  88150. + HEADER_TYPE_NONE = 0,
  88151. + HEADER_TYPE_PAYLOAD,
  88152. + HEADER_TYPE_ETH,
  88153. + HEADER_TYPE_VLAN,
  88154. + HEADER_TYPE_IPv4,
  88155. + HEADER_TYPE_IPv6,
  88156. + HEADER_TYPE_IP,
  88157. + HEADER_TYPE_TCP,
  88158. + HEADER_TYPE_UDP,
  88159. + HEADER_TYPE_UDP_LITE,
  88160. + HEADER_TYPE_IPHC,
  88161. + HEADER_TYPE_SCTP,
  88162. + HEADER_TYPE_SCTP_CHUNK_DATA,
  88163. + HEADER_TYPE_PPPoE,
  88164. + HEADER_TYPE_PPP,
  88165. + HEADER_TYPE_PPPMUX,
  88166. + HEADER_TYPE_PPPMUX_SUBFRAME,
  88167. + HEADER_TYPE_L2TPv2,
  88168. + HEADER_TYPE_L2TPv3_CTRL,
  88169. + HEADER_TYPE_L2TPv3_SESS,
  88170. + HEADER_TYPE_LLC,
  88171. + HEADER_TYPE_LLC_SNAP,
  88172. + HEADER_TYPE_NLPID,
  88173. + HEADER_TYPE_SNAP,
  88174. + HEADER_TYPE_MPLS,
  88175. + HEADER_TYPE_IPSEC_AH,
  88176. + HEADER_TYPE_IPSEC_ESP,
  88177. + HEADER_TYPE_UDP_ENCAP_ESP, /* RFC 3948 */
  88178. + HEADER_TYPE_MACSEC,
  88179. + HEADER_TYPE_GRE,
  88180. + HEADER_TYPE_MINENCAP,
  88181. + HEADER_TYPE_DCCP,
  88182. + HEADER_TYPE_ICMP,
  88183. + HEADER_TYPE_IGMP,
  88184. + HEADER_TYPE_ARP,
  88185. + HEADER_TYPE_CAPWAP,
  88186. + HEADER_TYPE_CAPWAP_DTLS,
  88187. + HEADER_TYPE_RFC2684,
  88188. + HEADER_TYPE_USER_DEFINED_L2,
  88189. + HEADER_TYPE_USER_DEFINED_L3,
  88190. + HEADER_TYPE_USER_DEFINED_L4,
  88191. + HEADER_TYPE_USER_DEFINED_SHIM1,
  88192. + HEADER_TYPE_USER_DEFINED_SHIM2,
  88193. + MAX_HEADER_TYPE_COUNT
  88194. +} e_NetHeaderType;
  88195. +
  88196. +
  88197. +#endif /* __NET_EXT_H */
  88198. --- /dev/null
  88199. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/std_ext.h
  88200. @@ -0,0 +1,48 @@
  88201. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  88202. + * All rights reserved.
  88203. + *
  88204. + * Redistribution and use in source and binary forms, with or without
  88205. + * modification, are permitted provided that the following conditions are met:
  88206. + * * Redistributions of source code must retain the above copyright
  88207. + * notice, this list of conditions and the following disclaimer.
  88208. + * * Redistributions in binary form must reproduce the above copyright
  88209. + * notice, this list of conditions and the following disclaimer in the
  88210. + * documentation and/or other materials provided with the distribution.
  88211. + * * Neither the name of Freescale Semiconductor nor the
  88212. + * names of its contributors may be used to endorse or promote products
  88213. + * derived from this software without specific prior written permission.
  88214. + *
  88215. + *
  88216. + * ALTERNATIVELY, this software may be distributed under the terms of the
  88217. + * GNU General Public License ("GPL") as published by the Free Software
  88218. + * Foundation, either version 2 of that License or (at your option) any
  88219. + * later version.
  88220. + *
  88221. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  88222. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  88223. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  88224. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  88225. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  88226. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  88227. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  88228. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  88229. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  88230. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88231. + */
  88232. +
  88233. +
  88234. +/**************************************************************************//**
  88235. + @File std_ext.h
  88236. +
  88237. + @Description General Standard Definitions
  88238. +*//***************************************************************************/
  88239. +
  88240. +#ifndef __STD_EXT_H
  88241. +#define __STD_EXT_H
  88242. +
  88243. +
  88244. +#include "types_ext.h"
  88245. +#include "ncsw_ext.h"
  88246. +
  88247. +
  88248. +#endif /* __STD_EXT_H */
  88249. --- /dev/null
  88250. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/stdarg_ext.h
  88251. @@ -0,0 +1,49 @@
  88252. +/*
  88253. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  88254. + *
  88255. + * Redistribution and use in source and binary forms, with or without
  88256. + * modification, are permitted provided that the following conditions are met:
  88257. + * * Redistributions of source code must retain the above copyright
  88258. + * notice, this list of conditions and the following disclaimer.
  88259. + * * Redistributions in binary form must reproduce the above copyright
  88260. + * notice, this list of conditions and the following disclaimer in the
  88261. + * documentation and/or other materials provided with the distribution.
  88262. + * * Neither the name of Freescale Semiconductor nor the
  88263. + * names of its contributors may be used to endorse or promote products
  88264. + * derived from this software without specific prior written permission.
  88265. + *
  88266. + *
  88267. + * ALTERNATIVELY, this software may be distributed under the terms of the
  88268. + * GNU General Public License ("GPL") as published by the Free Software
  88269. + * Foundation, either version 2 of that License or (at your option) any
  88270. + * later version.
  88271. + *
  88272. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  88273. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  88274. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  88275. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  88276. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  88277. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  88278. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  88279. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  88280. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  88281. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88282. + */
  88283. +
  88284. +
  88285. +#ifndef __STDARG_EXT_H
  88286. +#define __STDARG_EXT_H
  88287. +
  88288. +
  88289. +#if defined(NCSW_LINUX) && defined(__KERNEL__)
  88290. +#include <stdarg.h>
  88291. +
  88292. +#else
  88293. +#include <stdarg.h>
  88294. +
  88295. +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
  88296. +
  88297. +#include "std_ext.h"
  88298. +
  88299. +
  88300. +#endif /* __STDARG_EXT_H */
  88301. --- /dev/null
  88302. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/stdlib_ext.h
  88303. @@ -0,0 +1,162 @@
  88304. +/*
  88305. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  88306. + *
  88307. + * Redistribution and use in source and binary forms, with or without
  88308. + * modification, are permitted provided that the following conditions are met:
  88309. + * * Redistributions of source code must retain the above copyright
  88310. + * notice, this list of conditions and the following disclaimer.
  88311. + * * Redistributions in binary form must reproduce the above copyright
  88312. + * notice, this list of conditions and the following disclaimer in the
  88313. + * documentation and/or other materials provided with the distribution.
  88314. + * * Neither the name of Freescale Semiconductor nor the
  88315. + * names of its contributors may be used to endorse or promote products
  88316. + * derived from this software without specific prior written permission.
  88317. + *
  88318. + *
  88319. + * ALTERNATIVELY, this software may be distributed under the terms of the
  88320. + * GNU General Public License ("GPL") as published by the Free Software
  88321. + * Foundation, either version 2 of that License or (at your option) any
  88322. + * later version.
  88323. + *
  88324. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  88325. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  88326. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  88327. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  88328. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  88329. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  88330. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  88331. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  88332. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  88333. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88334. + */
  88335. +
  88336. +
  88337. +
  88338. +#ifndef __STDLIB_EXT_H
  88339. +#define __STDLIB_EXT_H
  88340. +
  88341. +
  88342. +#if (defined(NCSW_LINUX)) && defined(__KERNEL__)
  88343. +#include "stdarg_ext.h"
  88344. +#include "std_ext.h"
  88345. +
  88346. +
  88347. +/**
  88348. + * strtoul - convert a string to an uint32_t
  88349. + * @cp: The start of the string
  88350. + * @endp: A pointer to the end of the parsed string will be placed here
  88351. + * @base: The number base to use
  88352. + */
  88353. +uint32_t strtoul(const char *cp,char **endp,uint32_t base);
  88354. +
  88355. +/**
  88356. + * strtol - convert a string to a int32_t
  88357. + * @cp: The start of the string
  88358. + * @endp: A pointer to the end of the parsed string will be placed here
  88359. + * @base: The number base to use
  88360. + */
  88361. +long strtol(const char *cp,char **endp,uint32_t base);
  88362. +
  88363. +/**
  88364. + * strtoull - convert a string to an uint64_t
  88365. + * @cp: The start of the string
  88366. + * @endp: A pointer to the end of the parsed string will be placed here
  88367. + * @base: The number base to use
  88368. + */
  88369. +uint64_t strtoull(const char *cp,char **endp,uint32_t base);
  88370. +
  88371. +/**
  88372. + * strtoll - convert a string to a int64 long
  88373. + * @cp: The start of the string
  88374. + * @endp: A pointer to the end of the parsed string will be placed here
  88375. + * @base: The number base to use
  88376. + */
  88377. +long long strtoll(const char *cp,char **endp,uint32_t base);
  88378. +
  88379. +/**
  88380. + * atoi - convert a character to a int
  88381. + * @s: The start of the string
  88382. + */
  88383. +int atoi(const char *s);
  88384. +
  88385. +/**
  88386. + * strnlen - Find the length of a length-limited string
  88387. + * @s: The string to be sized
  88388. + * @count: The maximum number of bytes to search
  88389. + */
  88390. +size_t strnlen(const char * s, size_t count);
  88391. +
  88392. +/**
  88393. + * strlen - Find the length of a string
  88394. + * @s: The string to be sized
  88395. + */
  88396. +size_t strlen(const char * s);
  88397. +
  88398. +/**
  88399. + * strtok - Split a string into tokens
  88400. + * @s: The string to be searched
  88401. + * @ct: The characters to search for
  88402. + *
  88403. + * WARNING: strtok is deprecated, use strsep instead.
  88404. + */
  88405. +char * strtok(char * s,const char * ct);
  88406. +
  88407. +/**
  88408. + * strncpy - Copy a length-limited, %NUL-terminated string
  88409. + * @dest: Where to copy the string to
  88410. + * @src: Where to copy the string from
  88411. + * @count: The maximum number of bytes to copy
  88412. + *
  88413. + * Note that unlike userspace strncpy, this does not %NUL-pad the buffer.
  88414. + * However, the result is not %NUL-terminated if the source exceeds
  88415. + * @count bytes.
  88416. + */
  88417. +char * strncpy(char * dest,const char *src,size_t count);
  88418. +
  88419. +/**
  88420. + * strcpy - Copy a %NUL terminated string
  88421. + * @dest: Where to copy the string to
  88422. + * @src: Where to copy the string from
  88423. + */
  88424. +char * strcpy(char * dest,const char *src);
  88425. +
  88426. +/**
  88427. + * vsscanf - Unformat a buffer into a list of arguments
  88428. + * @buf: input buffer
  88429. + * @fmt: format of buffer
  88430. + * @args: arguments
  88431. + */
  88432. +int vsscanf(const char * buf, const char * fmt, va_list args);
  88433. +
  88434. +/**
  88435. + * vsnprintf - Format a string and place it in a buffer
  88436. + * @buf: The buffer to place the result into
  88437. + * @size: The size of the buffer, including the trailing null space
  88438. + * @fmt: The format string to use
  88439. + * @args: Arguments for the format string
  88440. + *
  88441. + * Call this function if you are already dealing with a va_list.
  88442. + * You probably want snprintf instead.
  88443. + */
  88444. +int vsnprintf(char *buf, size_t size, const char *fmt, va_list args);
  88445. +
  88446. +/**
  88447. + * vsprintf - Format a string and place it in a buffer
  88448. + * @buf: The buffer to place the result into
  88449. + * @fmt: The format string to use
  88450. + * @args: Arguments for the format string
  88451. + *
  88452. + * Call this function if you are already dealing with a va_list.
  88453. + * You probably want sprintf instead.
  88454. + */
  88455. +int vsprintf(char *buf, const char *fmt, va_list args);
  88456. +
  88457. +#else
  88458. +#include <stdlib.h>
  88459. +#include <stdio.h>
  88460. +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
  88461. +
  88462. +#include "std_ext.h"
  88463. +
  88464. +
  88465. +#endif /* __STDLIB_EXT_H */
  88466. --- /dev/null
  88467. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/string_ext.h
  88468. @@ -0,0 +1,56 @@
  88469. +/*
  88470. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  88471. + *
  88472. + * Redistribution and use in source and binary forms, with or without
  88473. + * modification, are permitted provided that the following conditions are met:
  88474. + * * Redistributions of source code must retain the above copyright
  88475. + * notice, this list of conditions and the following disclaimer.
  88476. + * * Redistributions in binary form must reproduce the above copyright
  88477. + * notice, this list of conditions and the following disclaimer in the
  88478. + * documentation and/or other materials provided with the distribution.
  88479. + * * Neither the name of Freescale Semiconductor nor the
  88480. + * names of its contributors may be used to endorse or promote products
  88481. + * derived from this software without specific prior written permission.
  88482. + *
  88483. + *
  88484. + * ALTERNATIVELY, this software may be distributed under the terms of the
  88485. + * GNU General Public License ("GPL") as published by the Free Software
  88486. + * Foundation, either version 2 of that License or (at your option) any
  88487. + * later version.
  88488. + *
  88489. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  88490. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  88491. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  88492. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  88493. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  88494. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  88495. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  88496. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  88497. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  88498. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88499. + */
  88500. +
  88501. +
  88502. +#ifndef __STRING_EXT_H
  88503. +#define __STRING_EXT_H
  88504. +
  88505. +
  88506. +#if defined(NCSW_LINUX) && defined(__KERNEL__)
  88507. +#include <linux/kernel.h>
  88508. +#include <linux/string.h>
  88509. +extern char * strtok ( char * str, const char * delimiters );
  88510. +
  88511. +#elif defined(__KERNEL__)
  88512. +#include "linux/types.h"
  88513. +#include "linux/posix_types.h"
  88514. +#include "linux/string.h"
  88515. +
  88516. +#else
  88517. +#include <string.h>
  88518. +
  88519. +#endif /* defined(NCSW_LINUX) && defined(__KERNEL__) */
  88520. +
  88521. +#include "std_ext.h"
  88522. +
  88523. +
  88524. +#endif /* __STRING_EXT_H */
  88525. --- /dev/null
  88526. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/types_ext.h
  88527. @@ -0,0 +1,62 @@
  88528. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  88529. + * All rights reserved.
  88530. + *
  88531. + * Redistribution and use in source and binary forms, with or without
  88532. + * modification, are permitted provided that the following conditions are met:
  88533. + * * Redistributions of source code must retain the above copyright
  88534. + * notice, this list of conditions and the following disclaimer.
  88535. + * * Redistributions in binary form must reproduce the above copyright
  88536. + * notice, this list of conditions and the following disclaimer in the
  88537. + * documentation and/or other materials provided with the distribution.
  88538. + * * Neither the name of Freescale Semiconductor nor the
  88539. + * names of its contributors may be used to endorse or promote products
  88540. + * derived from this software without specific prior written permission.
  88541. + *
  88542. + *
  88543. + * ALTERNATIVELY, this software may be distributed under the terms of the
  88544. + * GNU General Public License ("GPL") as published by the Free Software
  88545. + * Foundation, either version 2 of that License or (at your option) any
  88546. + * later version.
  88547. + *
  88548. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  88549. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  88550. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  88551. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  88552. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  88553. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  88554. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  88555. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  88556. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  88557. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88558. + */
  88559. +
  88560. +
  88561. +/**************************************************************************//**
  88562. + @File types_ext.h
  88563. +
  88564. + @Description General types Standard Definitions
  88565. +*//***************************************************************************/
  88566. +
  88567. +#ifndef __TYPES_EXT_H
  88568. +#define __TYPES_EXT_H
  88569. +
  88570. +#if defined(NCSW_LINUX)
  88571. +#include "types_linux.h"
  88572. +
  88573. +#elif defined(NCSW_VXWORKS)
  88574. +#include "types_vxworks.h"
  88575. +
  88576. +#elif defined(__GNUC__) && defined(__cplusplus)
  88577. +#include "types_bb_gpp.h"
  88578. +
  88579. +#elif defined(__GNUC__)
  88580. +#include "types_bb_gcc.h"
  88581. +
  88582. +#elif defined(__ghs__)
  88583. +#include "types_ghs.h"
  88584. +
  88585. +#else
  88586. +#include "types_dflt.h"
  88587. +#endif /* defined (__ROCOO__) */
  88588. +
  88589. +#endif /* __TYPES_EXT_H */
  88590. --- /dev/null
  88591. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/xx_common.h
  88592. @@ -0,0 +1,56 @@
  88593. +/*
  88594. + * Copyright 2012 Freescale Semiconductor Inc.
  88595. + *
  88596. + * Redistribution and use in source and binary forms, with or without
  88597. + * modification, are permitted provided that the following conditions are met:
  88598. + * * Redistributions of source code must retain the above copyright
  88599. + * notice, this list of conditions and the following disclaimer.
  88600. + * * Redistributions in binary form must reproduce the above copyright
  88601. + * notice, this list of conditions and the following disclaimer in the
  88602. + * documentation and/or other materials provided with the distribution.
  88603. + * * Neither the name of Freescale Semiconductor nor the
  88604. + * names of its contributors may be used to endorse or promote products
  88605. + * derived from this software without specific prior written permission.
  88606. + *
  88607. + *
  88608. + * ALTERNATIVELY, this software may be distributed under the terms of the
  88609. + * GNU General Public License ("GPL") as published by the Free Software
  88610. + * Foundation, either version 2 of that License or (at your option) any
  88611. + * later version.
  88612. + *
  88613. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  88614. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  88615. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  88616. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  88617. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  88618. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  88619. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  88620. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  88621. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  88622. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88623. + */
  88624. +
  88625. +
  88626. +/**************************************************************************//**
  88627. + @File debug_ext.h
  88628. +
  88629. + @Description Debug mode definitions.
  88630. +*//***************************************************************************/
  88631. +
  88632. +#ifndef __XX_COMMON_H
  88633. +#define __XX_COMMON_H
  88634. +
  88635. +/*****************************************************************************
  88636. + * UNIFIED MODULE CODES
  88637. + *****************************************************************************/
  88638. +#define MODULE_UNKNOWN 0x00000000
  88639. +#define MODULE_FM 0x00010000
  88640. +#define MODULE_FM_MURAM 0x00020000
  88641. +#define MODULE_FM_PCD 0x00030000
  88642. +#define MODULE_FM_RTC 0x00040000
  88643. +#define MODULE_FM_MAC 0x00050000
  88644. +#define MODULE_FM_PORT 0x00060000
  88645. +#define MODULE_MM 0x00070000
  88646. +#define MODULE_FM_SP 0x00080000
  88647. +#define MODULE_FM_MACSEC 0x00090000
  88648. +#endif /* __XX_COMMON_H */
  88649. --- /dev/null
  88650. +++ b/drivers/net/ethernet/freescale/sdk_fman/inc/xx_ext.h
  88651. @@ -0,0 +1,791 @@
  88652. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
  88653. + * All rights reserved.
  88654. + *
  88655. + * Redistribution and use in source and binary forms, with or without
  88656. + * modification, are permitted provided that the following conditions are met:
  88657. + * * Redistributions of source code must retain the above copyright
  88658. + * notice, this list of conditions and the following disclaimer.
  88659. + * * Redistributions in binary form must reproduce the above copyright
  88660. + * notice, this list of conditions and the following disclaimer in the
  88661. + * documentation and/or other materials provided with the distribution.
  88662. + * * Neither the name of Freescale Semiconductor nor the
  88663. + * names of its contributors may be used to endorse or promote products
  88664. + * derived from this software without specific prior written permission.
  88665. + *
  88666. + *
  88667. + * ALTERNATIVELY, this software may be distributed under the terms of the
  88668. + * GNU General Public License ("GPL") as published by the Free Software
  88669. + * Foundation, either version 2 of that License or (at your option) any
  88670. + * later version.
  88671. + *
  88672. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  88673. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  88674. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  88675. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  88676. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  88677. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  88678. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  88679. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  88680. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  88681. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  88682. + */
  88683. +
  88684. +
  88685. +/**************************************************************************//**
  88686. + @File xx_ext.h
  88687. +
  88688. + @Description Prototypes, externals and typedefs for system-supplied
  88689. + (external) routines
  88690. +*//***************************************************************************/
  88691. +
  88692. +#ifndef __XX_EXT_H
  88693. +#define __XX_EXT_H
  88694. +
  88695. +#include "std_ext.h"
  88696. +#include "xx_common.h"
  88697. +#include "part_ext.h"
  88698. +
  88699. +
  88700. +
  88701. +/**************************************************************************//**
  88702. + @Group xx_id XX Interface (System call hooks)
  88703. +
  88704. + @Description Prototypes, externals and typedefs for system-supplied
  88705. + (external) routines
  88706. +
  88707. + @{
  88708. +*//***************************************************************************/
  88709. +
  88710. +#ifdef DEBUG_XX_MALLOC
  88711. +void * XX_MallocDebug(uint32_t size, char *fname, int line);
  88712. +
  88713. +void * XX_MallocSmartDebug(uint32_t size,
  88714. + int memPartitionId,
  88715. + uint32_t alignment,
  88716. + char *fname,
  88717. + int line);
  88718. +
  88719. +#define XX_Malloc(sz) \
  88720. + XX_MallocDebug((sz), __FILE__, __LINE__)
  88721. +
  88722. +#define XX_MallocSmart(sz, memt, al) \
  88723. + XX_MallocSmartDebug((sz), (memt), (al), __FILE__, __LINE__)
  88724. +
  88725. +#else /* not DEBUG_XX_MALLOC */
  88726. +/**************************************************************************//**
  88727. + @Function XX_Malloc
  88728. +
  88729. + @Description allocates contiguous block of memory.
  88730. +
  88731. + @Param[in] size - Number of bytes to allocate.
  88732. +
  88733. + @Return The address of the newly allocated block on success, NULL on failure.
  88734. +*//***************************************************************************/
  88735. +void * XX_Malloc(uint32_t size);
  88736. +
  88737. +/**************************************************************************//**
  88738. + @Function XX_MallocSmart
  88739. +
  88740. + @Description Allocates contiguous block of memory in a specified
  88741. + alignment and from the specified segment.
  88742. +
  88743. + @Param[in] size - Number of bytes to allocate.
  88744. + @Param[in] memPartitionId - Memory partition ID; The value zero must
  88745. + be mapped to the default heap partition.
  88746. + @Param[in] alignment - Required memory alignment (in bytes).
  88747. +
  88748. + @Return The address of the newly allocated block on success, NULL on failure.
  88749. +*//***************************************************************************/
  88750. +void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment);
  88751. +#endif /* not DEBUG_XX_MALLOC */
  88752. +
  88753. +/**************************************************************************//**
  88754. + @Function XX_FreeSmart
  88755. +
  88756. + @Description Frees the memory block pointed to by "p".
  88757. + Only for memory allocated by XX_MallocSmart
  88758. +
  88759. + @Param[in] p_Memory - pointer to the memory block.
  88760. +
  88761. + @Return None.
  88762. +*//***************************************************************************/
  88763. +void XX_FreeSmart(void *p_Memory);
  88764. +
  88765. +/**************************************************************************//**
  88766. + @Function XX_Free
  88767. +
  88768. + @Description frees the memory block pointed to by "p".
  88769. +
  88770. + @Param[in] p_Memory - pointer to the memory block.
  88771. +
  88772. + @Return None.
  88773. +*//***************************************************************************/
  88774. +void XX_Free(void *p_Memory);
  88775. +
  88776. +/**************************************************************************//**
  88777. + @Function XX_Print
  88778. +
  88779. + @Description print a string.
  88780. +
  88781. + @Param[in] str - string to print.
  88782. +
  88783. + @Return None.
  88784. +*//***************************************************************************/
  88785. +void XX_Print(char *str, ...);
  88786. +
  88787. +/**************************************************************************//**
  88788. + @Function XX_SetIntr
  88789. +
  88790. + @Description Set an interrupt service routine for a specific interrupt source.
  88791. +
  88792. + @Param[in] irq - Interrupt ID (system-specific number).
  88793. + @Param[in] f_Isr - Callback routine that will be called when the interrupt occurs.
  88794. + @Param[in] handle - The argument for the user callback routine.
  88795. +
  88796. + @Return E_OK on success; error code otherwise..
  88797. +*//***************************************************************************/
  88798. +t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle);
  88799. +
  88800. +/**************************************************************************//**
  88801. + @Function XX_FreeIntr
  88802. +
  88803. + @Description Free a specific interrupt and a specific callback routine.
  88804. +
  88805. + @Param[in] irq - Interrupt ID (system-specific number).
  88806. +
  88807. + @Return E_OK on success; error code otherwise..
  88808. +*//***************************************************************************/
  88809. +t_Error XX_FreeIntr(int irq);
  88810. +
  88811. +/**************************************************************************//**
  88812. + @Function XX_EnableIntr
  88813. +
  88814. + @Description Enable a specific interrupt.
  88815. +
  88816. + @Param[in] irq - Interrupt ID (system-specific number).
  88817. +
  88818. + @Return E_OK on success; error code otherwise..
  88819. +*//***************************************************************************/
  88820. +t_Error XX_EnableIntr(int irq);
  88821. +
  88822. +/**************************************************************************//**
  88823. + @Function XX_DisableIntr
  88824. +
  88825. + @Description Disable a specific interrupt.
  88826. +
  88827. + @Param[in] irq - Interrupt ID (system-specific number).
  88828. +
  88829. + @Return E_OK on success; error code otherwise..
  88830. +*//***************************************************************************/
  88831. +t_Error XX_DisableIntr(int irq);
  88832. +
  88833. +/**************************************************************************//**
  88834. + @Function XX_DisableAllIntr
  88835. +
  88836. + @Description Disable all interrupts by masking them at the CPU.
  88837. +
  88838. + @Return A value that represents the interrupts state before the
  88839. + operation, and should be passed to the matching
  88840. + XX_RestoreAllIntr() call.
  88841. +*//***************************************************************************/
  88842. +uint32_t XX_DisableAllIntr(void);
  88843. +
  88844. +/**************************************************************************//**
  88845. + @Function XX_RestoreAllIntr
  88846. +
  88847. + @Description Restore previous state of interrupts level at the CPU.
  88848. +
  88849. + @Param[in] flags - A value that represents the interrupts state to restore,
  88850. + as returned by the matching call for XX_DisableAllIntr().
  88851. +
  88852. + @Return None.
  88853. +*//***************************************************************************/
  88854. +void XX_RestoreAllIntr(uint32_t flags);
  88855. +
  88856. +
  88857. +/**************************************************************************//**
  88858. + @Function XX_Exit
  88859. +
  88860. + @Description Stop execution and report status (where it is applicable)
  88861. +
  88862. + @Param[in] status - exit status
  88863. +*//***************************************************************************/
  88864. +void XX_Exit(int status);
  88865. +
  88866. +
  88867. +/*****************************************************************************/
  88868. +/* Tasklet Service Routines */
  88869. +/*****************************************************************************/
  88870. +typedef t_Handle t_TaskletHandle;
  88871. +
  88872. +/**************************************************************************//**
  88873. + @Function XX_InitTasklet
  88874. +
  88875. + @Description Create and initialize a tasklet object.
  88876. +
  88877. + @Param[in] routine - A routine to be ran as a tasklet.
  88878. + @Param[in] data - An argument to pass to the tasklet.
  88879. +
  88880. + @Return Tasklet handle is returned on success. NULL is returned otherwise.
  88881. +*//***************************************************************************/
  88882. +t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data);
  88883. +
  88884. +/**************************************************************************//**
  88885. + @Function XX_FreeTasklet
  88886. +
  88887. + @Description Free a tasklet object.
  88888. +
  88889. + @Param[in] h_Tasklet - A handle to a tasklet to be free.
  88890. +
  88891. + @Return None.
  88892. +*//***************************************************************************/
  88893. +void XX_FreeTasklet (t_TaskletHandle h_Tasklet);
  88894. +
  88895. +/**************************************************************************//**
  88896. + @Function XX_ScheduleTask
  88897. +
  88898. + @Description Schedule a tasklet object.
  88899. +
  88900. + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled.
  88901. + @Param[in] immediate - Indicate whether to schedule this tasklet on
  88902. + the immediate queue or on the delayed one.
  88903. +
  88904. + @Return 0 - on success. Error code - otherwise.
  88905. +*//***************************************************************************/
  88906. +int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate);
  88907. +
  88908. +/**************************************************************************//**
  88909. + @Function XX_FlushScheduledTasks
  88910. +
  88911. + @Description Flush all tasks there are in the scheduled tasks queue.
  88912. +
  88913. + @Return None.
  88914. +*//***************************************************************************/
  88915. +void XX_FlushScheduledTasks(void);
  88916. +
  88917. +/**************************************************************************//**
  88918. + @Function XX_TaskletIsQueued
  88919. +
  88920. + @Description Check if task is queued.
  88921. +
  88922. + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled.
  88923. +
  88924. + @Return 1 - task is queued. 0 - otherwise.
  88925. +*//***************************************************************************/
  88926. +int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet);
  88927. +
  88928. +/**************************************************************************//**
  88929. + @Function XX_SetTaskletData
  88930. +
  88931. + @Description Set data to a scheduled task. Used to change data of already
  88932. + scheduled task.
  88933. +
  88934. + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled.
  88935. + @Param[in] data - Data to be set.
  88936. +*//***************************************************************************/
  88937. +void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data);
  88938. +
  88939. +/**************************************************************************//**
  88940. + @Function XX_GetTaskletData
  88941. +
  88942. + @Description Get the data of scheduled task.
  88943. +
  88944. + @Param[in] h_Tasklet - A handle to a tasklet to be scheduled.
  88945. +
  88946. + @Return handle to the data of the task.
  88947. +*//***************************************************************************/
  88948. +t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet);
  88949. +
  88950. +/**************************************************************************//**
  88951. + @Function XX_BottomHalf
  88952. +
  88953. + @Description Bottom half implementation, invoked by the interrupt handler.
  88954. +
  88955. + This routine handles all bottom-half tasklets with interrupts
  88956. + enabled.
  88957. +
  88958. + @Return None.
  88959. +*//***************************************************************************/
  88960. +void XX_BottomHalf(void);
  88961. +
  88962. +
  88963. +/*****************************************************************************/
  88964. +/* Spinlock Service Routines */
  88965. +/*****************************************************************************/
  88966. +
  88967. +/**************************************************************************//**
  88968. + @Function XX_InitSpinlock
  88969. +
  88970. + @Description Creates a spinlock.
  88971. +
  88972. + @Return Spinlock handle is returned on success; NULL otherwise.
  88973. +*//***************************************************************************/
  88974. +t_Handle XX_InitSpinlock(void);
  88975. +
  88976. +/**************************************************************************//**
  88977. + @Function XX_FreeSpinlock
  88978. +
  88979. + @Description Frees the memory allocated for the spinlock creation.
  88980. +
  88981. + @Param[in] h_Spinlock - A handle to a spinlock.
  88982. +
  88983. + @Return None.
  88984. +*//***************************************************************************/
  88985. +void XX_FreeSpinlock(t_Handle h_Spinlock);
  88986. +
  88987. +/**************************************************************************//**
  88988. + @Function XX_LockSpinlock
  88989. +
  88990. + @Description Locks a spinlock.
  88991. +
  88992. + @Param[in] h_Spinlock - A handle to a spinlock.
  88993. +
  88994. + @Return None.
  88995. +*//***************************************************************************/
  88996. +void XX_LockSpinlock(t_Handle h_Spinlock);
  88997. +
  88998. +/**************************************************************************//**
  88999. + @Function XX_UnlockSpinlock
  89000. +
  89001. + @Description Unlocks a spinlock.
  89002. +
  89003. + @Param[in] h_Spinlock - A handle to a spinlock.
  89004. +
  89005. + @Return None.
  89006. +*//***************************************************************************/
  89007. +void XX_UnlockSpinlock(t_Handle h_Spinlock);
  89008. +
  89009. +/**************************************************************************//**
  89010. + @Function XX_LockIntrSpinlock
  89011. +
  89012. + @Description Locks a spinlock (interrupt safe).
  89013. +
  89014. + @Param[in] h_Spinlock - A handle to a spinlock.
  89015. +
  89016. + @Return A value that represents the interrupts state before the
  89017. + operation, and should be passed to the matching
  89018. + XX_UnlockIntrSpinlock() call.
  89019. +*//***************************************************************************/
  89020. +uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock);
  89021. +
  89022. +/**************************************************************************//**
  89023. + @Function XX_UnlockIntrSpinlock
  89024. +
  89025. + @Description Unlocks a spinlock (interrupt safe).
  89026. +
  89027. + @Param[in] h_Spinlock - A handle to a spinlock.
  89028. + @Param[in] intrFlags - A value that represents the interrupts state to
  89029. + restore, as returned by the matching call for
  89030. + XX_LockIntrSpinlock().
  89031. +
  89032. + @Return None.
  89033. +*//***************************************************************************/
  89034. +void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags);
  89035. +
  89036. +
  89037. +/*****************************************************************************/
  89038. +/* Timers Service Routines */
  89039. +/*****************************************************************************/
  89040. +
  89041. +/**************************************************************************//**
  89042. + @Function XX_CurrentTime
  89043. +
  89044. + @Description Returns current system time.
  89045. +
  89046. + @Return Current system time (in milliseconds).
  89047. +*//***************************************************************************/
  89048. +uint32_t XX_CurrentTime(void);
  89049. +
  89050. +/**************************************************************************//**
  89051. + @Function XX_CreateTimer
  89052. +
  89053. + @Description Creates a timer.
  89054. +
  89055. + @Return Timer handle is returned on success; NULL otherwise.
  89056. +*//***************************************************************************/
  89057. +t_Handle XX_CreateTimer(void);
  89058. +
  89059. +/**************************************************************************//**
  89060. + @Function XX_FreeTimer
  89061. +
  89062. + @Description Frees the memory allocated for the timer creation.
  89063. +
  89064. + @Param[in] h_Timer - A handle to a timer.
  89065. +
  89066. + @Return None.
  89067. +*//***************************************************************************/
  89068. +void XX_FreeTimer(t_Handle h_Timer);
  89069. +
  89070. +/**************************************************************************//**
  89071. + @Function XX_StartTimer
  89072. +
  89073. + @Description Starts a timer.
  89074. +
  89075. + The user can select to start the timer as periodic timer or as
  89076. + one-shot timer. The user should provide a callback routine that
  89077. + will be called when the timer expires.
  89078. +
  89079. + @Param[in] h_Timer - A handle to a timer.
  89080. + @Param[in] msecs - Timer expiration period (in milliseconds).
  89081. + @Param[in] periodic - TRUE for a periodic timer;
  89082. + FALSE for a one-shot timer..
  89083. + @Param[in] f_TimerExpired - A callback routine to be called when the
  89084. + timer expires.
  89085. + @Param[in] h_Arg - The argument to pass in the timer-expired
  89086. + callback routine.
  89087. +
  89088. + @Return None.
  89089. +*//***************************************************************************/
  89090. +void XX_StartTimer(t_Handle h_Timer,
  89091. + uint32_t msecs,
  89092. + bool periodic,
  89093. + void (*f_TimerExpired)(t_Handle h_Arg),
  89094. + t_Handle h_Arg);
  89095. +
  89096. +/**************************************************************************//**
  89097. + @Function XX_StopTimer
  89098. +
  89099. + @Description Frees the memory allocated for the timer creation.
  89100. +
  89101. + @Param[in] h_Timer - A handle to a timer.
  89102. +
  89103. + @Return None.
  89104. +*//***************************************************************************/
  89105. +void XX_StopTimer(t_Handle h_Timer);
  89106. +
  89107. +/**************************************************************************//**
  89108. + @Function XX_ModTimer
  89109. +
  89110. + @Description Updates the expiration time of a timer.
  89111. +
  89112. + This routine adds the given time to the current system time,
  89113. + and sets this value as the new expiration time of the timer.
  89114. +
  89115. + @Param[in] h_Timer - A handle to a timer.
  89116. + @Param[in] msecs - The new interval until timer expiration
  89117. + (in milliseconds).
  89118. +
  89119. + @Return None.
  89120. +*//***************************************************************************/
  89121. +void XX_ModTimer(t_Handle h_Timer, uint32_t msecs);
  89122. +
  89123. +/**************************************************************************//**
  89124. + @Function XX_Sleep
  89125. +
  89126. + @Description Non-busy wait until the desired time (in milliseconds) has passed.
  89127. +
  89128. + @Param[in] msecs - The requested sleep time (in milliseconds).
  89129. +
  89130. + @Return Zero if the requested time has elapsed; Otherwise, the value
  89131. + returned will be the unslept amount) in milliseconds.
  89132. +
  89133. + @Cautions This routine enables interrupts during its wait time.
  89134. +*//***************************************************************************/
  89135. +uint32_t XX_Sleep(uint32_t msecs);
  89136. +
  89137. +/**************************************************************************//**
  89138. + @Function XX_UDelay
  89139. +
  89140. + @Description Busy-wait until the desired time (in microseconds) has passed.
  89141. +
  89142. + @Param[in] usecs - The requested delay time (in microseconds).
  89143. +
  89144. + @Return None.
  89145. +
  89146. + @Cautions It is highly unrecommended to call this routine during interrupt
  89147. + time, because the system time may not be updated properly during
  89148. + the delay loop. The behavior of this routine during interrupt
  89149. + time is unexpected.
  89150. +*//***************************************************************************/
  89151. +void XX_UDelay(uint32_t usecs);
  89152. +
  89153. +
  89154. +/*****************************************************************************/
  89155. +/* Other Service Routines */
  89156. +/*****************************************************************************/
  89157. +
  89158. +/**************************************************************************//**
  89159. + @Function XX_PhysToVirt
  89160. +
  89161. + @Description Translates a physical address to the matching virtual address.
  89162. +
  89163. + @Param[in] addr - The physical address to translate.
  89164. +
  89165. + @Return Virtual address.
  89166. +*//***************************************************************************/
  89167. +void * XX_PhysToVirt(physAddress_t addr);
  89168. +
  89169. +/**************************************************************************//**
  89170. + @Function XX_VirtToPhys
  89171. +
  89172. + @Description Translates a virtual address to the matching physical address.
  89173. +
  89174. + @Param[in] addr - The virtual address to translate.
  89175. +
  89176. + @Return Physical address.
  89177. +*//***************************************************************************/
  89178. +physAddress_t XX_VirtToPhys(void *addr);
  89179. +
  89180. +
  89181. +/**************************************************************************//**
  89182. + @Group xx_ipc XX Inter-Partition-Communication API
  89183. +
  89184. + @Description The following API is to be used when working with multiple
  89185. + partitions configuration.
  89186. +
  89187. + @{
  89188. +*//***************************************************************************/
  89189. +
  89190. +#define XX_IPC_MAX_ADDR_NAME_LENGTH 16 /**< Maximum length of an endpoint name string;
  89191. + The IPC service can use this constant to limit
  89192. + the storage space for IPC endpoint names. */
  89193. +
  89194. +
  89195. +/**************************************************************************//**
  89196. + @Function t_IpcMsgCompletion
  89197. +
  89198. + @Description Callback function used upon IPC non-blocking transaction completion
  89199. + to return message buffer to the caller and to forward reply if available.
  89200. +
  89201. + This callback function may be attached by the source endpoint to any outgoing
  89202. + IPC message to indicate a non-blocking send (see also XX_IpcSendMessage() routine).
  89203. + Upon completion of an IPC transaction (consisting of a message and an optional reply),
  89204. + the IPC service invokes this callback routine to return the message buffer to the sender
  89205. + and to provide the received reply, if requested.
  89206. +
  89207. + User provides this function. Driver invokes it.
  89208. +
  89209. + @Param[in] h_Module - Abstract handle to the sending module - the same handle as was passed
  89210. + in the XX_IpcSendMessage() function; This handle is typically used to point
  89211. + to the internal data structure of the source endpoint.
  89212. + @Param[in] p_Msg - Pointer to original (sent) message buffer;
  89213. + The source endpoint can free (or reuse) this buffer when message
  89214. + completion callback is called.
  89215. + @Param[in] p_Reply - Pointer to (received) reply buffer;
  89216. + This pointer is the same as was provided by the source endpoint in
  89217. + XX_IpcSendMessage().
  89218. + @Param[in] replyLength - Length (in bytes) of actual data in the reply buffer.
  89219. + @Param[in] status - Completion status - E_OK or failure indication, e.g. IPC transaction completion
  89220. + timeout.
  89221. +
  89222. + @Return None
  89223. + *//***************************************************************************/
  89224. +typedef void (t_IpcMsgCompletion)(t_Handle h_Module,
  89225. + uint8_t *p_Msg,
  89226. + uint8_t *p_Reply,
  89227. + uint32_t replyLength,
  89228. + t_Error status);
  89229. +
  89230. +/**************************************************************************//**
  89231. + @Function t_IpcMsgHandler
  89232. +
  89233. + @Description Callback function used as IPC message handler.
  89234. +
  89235. + The IPC service invokes message handlers for each IPC message received.
  89236. + The actual function pointer should be registered by each destination endpoint
  89237. + via the XX_IpcRegisterMsgHandler() routine.
  89238. +
  89239. + User provides this function. Driver invokes it.
  89240. +
  89241. + @Param[in] h_Module - Abstract handle to the message handling module - the same handle as
  89242. + was passed in the XX_IpcRegisterMsgHandler() function; this handle is
  89243. + typically used to point to the internal data structure of the destination
  89244. + endpoint.
  89245. + @Param[in] p_Msg - Pointer to message buffer with data received from peer.
  89246. + @Param[in] msgLength - Length (in bytes) of message data.
  89247. + @Param[in] p_Reply - Pointer to reply buffer, to be filled by the message handler and then sent
  89248. + by the IPC service;
  89249. + The reply buffer is allocated by the IPC service with size equals to the
  89250. + replyLength parameter provided in message handler registration (see
  89251. + XX_IpcRegisterMsgHandler() function);
  89252. + If replyLength was initially specified as zero during message handler registration,
  89253. + the IPC service may set this pointer to NULL and assume that a reply is not needed;
  89254. + The IPC service is also responsible for freeing the reply buffer after the
  89255. + reply has been sent or dismissed.
  89256. + @Param[in,out] p_ReplyLength - Pointer to reply length, which has a dual role in this function:
  89257. + [In] equals the replyLength parameter provided in message handler
  89258. + registration (see XX_IpcRegisterMsgHandler() function), and
  89259. + [Out] should be updated by message handler to the actual reply length; if
  89260. + this value is set to zero, the IPC service must assume that a reply should
  89261. + not be sent;
  89262. + Note: If p_Reply is not NULL, p_ReplyLength must not be NULL as well.
  89263. +
  89264. + @Return E_OK on success; Error code otherwise.
  89265. + *//***************************************************************************/
  89266. +typedef t_Error (t_IpcMsgHandler)(t_Handle h_Module,
  89267. + uint8_t *p_Msg,
  89268. + uint32_t msgLength,
  89269. + uint8_t *p_Reply,
  89270. + uint32_t *p_ReplyLength);
  89271. +
  89272. +/**************************************************************************//**
  89273. + @Function XX_IpcRegisterMsgHandler
  89274. +
  89275. + @Description IPC mailbox registration.
  89276. +
  89277. + This function is used for registering an IPC message handler in the IPC service.
  89278. + This function is called by each destination endpoint to indicate that it is ready
  89279. + to handle incoming messages. The IPC service invokes the message handler upon receiving
  89280. + a message addressed to the specified destination endpoint.
  89281. +
  89282. + @Param[in] addr - The address name string associated with the destination endpoint;
  89283. + This address must be unique across the IPC service domain to ensure
  89284. + correct message routing.
  89285. + @Param[in] f_MsgHandler - Pointer to the message handler callback for processing incoming
  89286. + message; invoked by the IPC service upon receiving a message
  89287. + addressed to the destination endpoint specified by the addr
  89288. + parameter.
  89289. + @Param[in] h_Module - Abstract handle to the message handling module, passed unchanged
  89290. + to f_MsgHandler callback function.
  89291. + @Param[in] replyLength - The maximal data length (in bytes) of any reply that the specified message handler
  89292. + may generate; the IPC service provides the message handler with buffer
  89293. + for reply according to the length specified here (refer also to the description
  89294. + of #t_IpcMsgHandler callback function type);
  89295. + This size shall be zero if the message handler never generates replies.
  89296. +
  89297. + @Return E_OK on success; Error code otherwise.
  89298. +*//***************************************************************************/
  89299. +t_Error XX_IpcRegisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH],
  89300. + t_IpcMsgHandler *f_MsgHandler,
  89301. + t_Handle h_Module,
  89302. + uint32_t replyLength);
  89303. +
  89304. +/**************************************************************************//**
  89305. + @Function XX_IpcUnregisterMsgHandler
  89306. +
  89307. + @Description Release IPC mailbox routine.
  89308. +
  89309. + This function is used for unregistering an IPC message handler from the IPC service.
  89310. + This function is called by each destination endpoint to indicate that it is no longer
  89311. + capable of handling incoming messages.
  89312. +
  89313. + @Param[in] addr - The address name string associated with the destination endpoint;
  89314. + This address is the same as was used when the message handler was
  89315. + registered via XX_IpcRegisterMsgHandler().
  89316. +
  89317. + @Return E_OK on success; Error code otherwise.
  89318. +*//***************************************************************************/
  89319. +t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH]);
  89320. +
  89321. +/**************************************************************************//**
  89322. + @Function XX_IpcInitSession
  89323. +
  89324. + @Description This function is used for creating an IPC session between the source endpoint
  89325. + and the destination endpoint.
  89326. +
  89327. + The actual implementation and representation of a session is left for the IPC service.
  89328. + The function returns an abstract handle to the created session. This handle shall be used
  89329. + by the source endpoint in subsequent calls to XX_IpcSendMessage().
  89330. + The IPC service assumes that before this function is called, no messages are sent from
  89331. + the specified source endpoint to the specified destination endpoint.
  89332. +
  89333. + The IPC service may use a connection-oriented approach or a connectionless approach (or both)
  89334. + as described below.
  89335. +
  89336. + @par Connection-Oriented Approach
  89337. +
  89338. + The IPC service may implement a session in a connection-oriented approach - when this function is called,
  89339. + the IPC service should take the necessary steps to bring up a source-to-destination channel for messages
  89340. + and a destination-to-source channel for replies. The returned handle should represent the internal
  89341. + representation of these channels.
  89342. +
  89343. + @par Connectionless Approach
  89344. +
  89345. + The IPC service may implement a session in a connectionless approach - when this function is called, the
  89346. + IPC service should not perform any particular steps, but it must store the pair of source and destination
  89347. + addresses in some session representation and return it as a handle. When XX_IpcSendMessage() shall be
  89348. + called, the IPC service may use this handle to provide the necessary identifiers for routing the messages
  89349. + through the connectionless medium.
  89350. +
  89351. + @Param[in] destAddr - The address name string associated with the destination endpoint.
  89352. + @Param[in] srcAddr - The address name string associated with the source endpoint.
  89353. +
  89354. + @Return Abstract handle to the initialized session, or NULL on error.
  89355. +*//***************************************************************************/
  89356. +t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH],
  89357. + char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH]);
  89358. +
  89359. +/**************************************************************************//**
  89360. + @Function XX_IpcFreeSession
  89361. +
  89362. + @Description This function is used for terminating an existing IPC session between a source endpoint
  89363. + and a destination endpoint.
  89364. +
  89365. + The IPC service assumes that after this function is called, no messages shall be sent from
  89366. + the associated source endpoint to the associated destination endpoint.
  89367. +
  89368. + @Param[in] h_Session - Abstract handle to the IPC session - the same handle as was originally
  89369. + returned by the XX_IpcInitSession() function.
  89370. +
  89371. + @Return E_OK on success; Error code otherwise.
  89372. +*//***************************************************************************/
  89373. +t_Error XX_IpcFreeSession(t_Handle h_Session);
  89374. +
  89375. +/**************************************************************************//**
  89376. + @Function XX_IpcSendMessage
  89377. +
  89378. + @Description IPC message send routine.
  89379. +
  89380. + This function may be used by a source endpoint to send an IPC message to a destination
  89381. + endpoint. The source endpoint cannot send a message to the destination endpoint without
  89382. + first initiating a session with that destination endpoint via XX_IpcInitSession() routine.
  89383. +
  89384. + The source endpoint must provide the buffer pointer and length of the outgoing message.
  89385. + Optionally, it may also provide a buffer for an expected reply. In the latter case, the
  89386. + transaction is not considered complete by the IPC service until the reply has been received.
  89387. + If the source endpoint does not provide a reply buffer, the transaction is considered
  89388. + complete after the message has been sent. The source endpoint must keep the message (and
  89389. + optional reply) buffers valid until the transaction is complete.
  89390. +
  89391. + @par Non-blocking mode
  89392. +
  89393. + The source endpoint may request a non-blocking send by providing a non-NULL pointer to a message
  89394. + completion callback function (f_Completion). Upon completion of the IPC transaction (consisting of a
  89395. + message and an optional reply), the IPC service invokes this callback routine to return the message
  89396. + buffer to the sender and to provide the received reply, if requested.
  89397. +
  89398. + @par Blocking mode
  89399. +
  89400. + The source endpoint may request a blocking send by setting f_Completion to NULL. The function is
  89401. + expected to block until the IPC transaction is complete - either the reply has been received or (if no reply
  89402. + was requested) the message has been sent.
  89403. +
  89404. + @Param[in] h_Session - Abstract handle to the IPC session - the same handle as was originally
  89405. + returned by the XX_IpcInitSession() function.
  89406. + @Param[in] p_Msg - Pointer to message buffer to send.
  89407. + @Param[in] msgLength - Length (in bytes) of actual data in the message buffer.
  89408. + @Param[in] p_Reply - Pointer to reply buffer - if this buffer is not NULL, the IPC service
  89409. + fills this buffer with the received reply data;
  89410. + In blocking mode, the reply data must be valid when the function returns;
  89411. + In non-blocking mode, the reply data is valid when f_Completion is called;
  89412. + If this pointer is NULL, no reply is expected.
  89413. + @Param[in,out] p_ReplyLength - Pointer to reply length, which has a dual role in this function:
  89414. + [In] specifies the maximal length (in bytes) of the reply buffer pointed by
  89415. + p_Reply, and
  89416. + [Out] in non-blocking mode this value is updated by the IPC service to the
  89417. + actual reply length (in bytes).
  89418. + @Param[in] f_Completion - Pointer to a completion callback to be used in non-blocking send mode;
  89419. + The completion callback is invoked by the IPC service upon
  89420. + completion of the IPC transaction (consisting of a message and an optional
  89421. + reply);
  89422. + If this pointer is NULL, the function is expected to block until the IPC
  89423. + transaction is complete.
  89424. + @Param[in] h_Arg - Abstract handle to the sending module; passed unchanged to the f_Completion
  89425. + callback function as the first argument.
  89426. +
  89427. + @Return E_OK on success; Error code otherwise.
  89428. +*//***************************************************************************/
  89429. +t_Error XX_IpcSendMessage(t_Handle h_Session,
  89430. + uint8_t *p_Msg,
  89431. + uint32_t msgLength,
  89432. + uint8_t *p_Reply,
  89433. + uint32_t *p_ReplyLength,
  89434. + t_IpcMsgCompletion *f_Completion,
  89435. + t_Handle h_Arg);
  89436. +
  89437. +
  89438. +/** @} */ /* end of xx_ipc group */
  89439. +/** @} */ /* end of xx_id group */
  89440. +
  89441. +
  89442. +#endif /* __XX_EXT_H */
  89443. --- /dev/null
  89444. +++ b/drivers/net/ethernet/freescale/sdk_fman/ls1043_dflags.h
  89445. @@ -0,0 +1,56 @@
  89446. +/*
  89447. + * Copyright 2012 Freescale Semiconductor Inc.
  89448. + *
  89449. + * Redistribution and use in source and binary forms, with or without
  89450. + * modification, are permitted provided that the following conditions are met:
  89451. + * * Redistributions of source code must retain the above copyright
  89452. + * notice, this list of conditions and the following disclaimer.
  89453. + * * Redistributions in binary form must reproduce the above copyright
  89454. + * notice, this list of conditions and the following disclaimer in the
  89455. + * documentation and/or other materials provided with the distribution.
  89456. + * * Neither the name of Freescale Semiconductor nor the
  89457. + * names of its contributors may be used to endorse or promote products
  89458. + * derived from this software without specific prior written permission.
  89459. + *
  89460. + *
  89461. + * ALTERNATIVELY, this software may be distributed under the terms of the
  89462. + * GNU General Public License ("GPL") as published by the Free Software
  89463. + * Foundation, either version 2 of that License or (at your option) any
  89464. + * later version.
  89465. + *
  89466. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  89467. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  89468. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  89469. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  89470. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  89471. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  89472. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  89473. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  89474. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  89475. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  89476. + */
  89477. +
  89478. +#ifndef __dflags_h
  89479. +#define __dflags_h
  89480. +
  89481. +
  89482. +#define NCSW_LINUX
  89483. +
  89484. +#define LS1043
  89485. +
  89486. +#define DEBUG_ERRORS 1
  89487. +
  89488. +#if defined(DEBUG)
  89489. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO
  89490. +
  89491. +#define DEBUG_XX_MALLOC
  89492. +#define DEBUG_MEM_LEAKS
  89493. +
  89494. +#else
  89495. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING
  89496. +#endif /* (DEBUG) */
  89497. +
  89498. +#define REPORT_EVENTS 1
  89499. +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR
  89500. +
  89501. +#endif /* __dflags_h */
  89502. --- /dev/null
  89503. +++ b/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  89504. @@ -0,0 +1,53 @@
  89505. +#
  89506. +# Makefile config for the Freescale NetcommSW
  89507. +#
  89508. +NET_DPA = $(srctree)/drivers/net
  89509. +DRV_DPA = $(srctree)/drivers/net/ethernet/freescale/sdk_dpaa
  89510. +FMAN = $(srctree)/drivers/net/ethernet/freescale/sdk_fman
  89511. +
  89512. +ifeq ("$(CONFIG_FMAN_P3040_P4080_P5020)", "y")
  89513. +ccflags-y +=-include $(FMAN)/p3040_4080_5020_dflags.h
  89514. +endif
  89515. +ifeq ("$(CONFIG_FMAN_P1023)", "y")
  89516. +ccflags-y +=-include $(FMAN)/p1023_dflags.h
  89517. +endif
  89518. +ifdef CONFIG_FMAN_V3H
  89519. +ccflags-y +=-include $(FMAN)/fmanv3h_dflags.h
  89520. +endif
  89521. +ifdef CONFIG_FMAN_V3L
  89522. +ccflags-y +=-include $(FMAN)/fmanv3l_dflags.h
  89523. +endif
  89524. +ifdef CONFIG_FMAN_ARM
  89525. +ccflags-y +=-include $(FMAN)/ls1043_dflags.h
  89526. +endif
  89527. +
  89528. +ccflags-y += -I$(DRV_DPA)/
  89529. +ccflags-y += -I$(FMAN)/inc
  89530. +ccflags-y += -I$(FMAN)/inc/cores
  89531. +ccflags-y += -I$(FMAN)/inc/etc
  89532. +ccflags-y += -I$(FMAN)/inc/Peripherals
  89533. +ccflags-y += -I$(FMAN)/inc/flib
  89534. +
  89535. +ifeq ("$(CONFIG_FMAN_P3040_P4080_P5020)", "y")
  89536. +ccflags-y += -I$(FMAN)/inc/integrations/P3040_P4080_P5020
  89537. +endif
  89538. +ifeq ("$(CONFIG_FMAN_P1023)", "y")
  89539. +ccflags-y += -I$(FMAN)/inc/integrations/P1023
  89540. +endif
  89541. +ifdef CONFIG_FMAN_V3H
  89542. +ccflags-y += -I$(FMAN)/inc/integrations/FMANV3H
  89543. +endif
  89544. +ifdef CONFIG_FMAN_V3L
  89545. +ccflags-y += -I$(FMAN)/inc/integrations/FMANV3L
  89546. +endif
  89547. +ifdef CONFIG_FMAN_ARM
  89548. +ccflags-y += -I$(FMAN)/inc/integrations/LS1043
  89549. +endif
  89550. +
  89551. +ccflags-y += -I$(FMAN)/src/inc
  89552. +ccflags-y += -I$(FMAN)/src/inc/system
  89553. +ccflags-y += -I$(FMAN)/src/inc/wrapper
  89554. +ccflags-y += -I$(FMAN)/src/inc/xx
  89555. +ccflags-y += -I$(srctree)/include/uapi/linux/fmd
  89556. +ccflags-y += -I$(srctree)/include/uapi/linux/fmd/Peripherals
  89557. +ccflags-y += -I$(srctree)/include/uapi/linux/fmd/integrations
  89558. --- /dev/null
  89559. +++ b/drivers/net/ethernet/freescale/sdk_fman/p1023_dflags.h
  89560. @@ -0,0 +1,65 @@
  89561. +/*
  89562. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  89563. + *
  89564. + * Redistribution and use in source and binary forms, with or without
  89565. + * modification, are permitted provided that the following conditions are met:
  89566. + * * Redistributions of source code must retain the above copyright
  89567. + * notice, this list of conditions and the following disclaimer.
  89568. + * * Redistributions in binary form must reproduce the above copyright
  89569. + * notice, this list of conditions and the following disclaimer in the
  89570. + * documentation and/or other materials provided with the distribution.
  89571. + * * Neither the name of Freescale Semiconductor nor the
  89572. + * names of its contributors may be used to endorse or promote products
  89573. + * derived from this software without specific prior written permission.
  89574. + *
  89575. + *
  89576. + * ALTERNATIVELY, this software may be distributed under the terms of the
  89577. + * GNU General Public License ("GPL") as published by the Free Software
  89578. + * Foundation, either version 2 of that License or (at your option) any
  89579. + * later version.
  89580. + *
  89581. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  89582. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  89583. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  89584. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  89585. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  89586. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  89587. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  89588. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  89589. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  89590. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  89591. + */
  89592. +
  89593. +#ifndef __dflags_h
  89594. +#define __dflags_h
  89595. +
  89596. +
  89597. +#define NCSW_LINUX
  89598. +#if 0
  89599. +#define DEBUG
  89600. +#endif
  89601. +
  89602. +#define P1023
  89603. +#define NCSW_PPC_CORE
  89604. +
  89605. +#define DEBUG_ERRORS 1
  89606. +
  89607. +#if defined(DEBUG)
  89608. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO
  89609. +
  89610. +#define DEBUG_XX_MALLOC
  89611. +#define DEBUG_MEM_LEAKS
  89612. +
  89613. +#else
  89614. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING
  89615. +#endif /* (DEBUG) */
  89616. +
  89617. +#define REPORT_EVENTS 1
  89618. +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR
  89619. +
  89620. +#ifdef CONFIG_P4080_SIM
  89621. +#error "Do not define CONFIG_P4080_SIM..."
  89622. +#endif
  89623. +
  89624. +
  89625. +#endif /* __dflags_h */
  89626. --- /dev/null
  89627. +++ b/drivers/net/ethernet/freescale/sdk_fman/p3040_4080_5020_dflags.h
  89628. @@ -0,0 +1,62 @@
  89629. +/*
  89630. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  89631. + *
  89632. + * Redistribution and use in source and binary forms, with or without
  89633. + * modification, are permitted provided that the following conditions are met:
  89634. + * * Redistributions of source code must retain the above copyright
  89635. + * notice, this list of conditions and the following disclaimer.
  89636. + * * Redistributions in binary form must reproduce the above copyright
  89637. + * notice, this list of conditions and the following disclaimer in the
  89638. + * documentation and/or other materials provided with the distribution.
  89639. + * * Neither the name of Freescale Semiconductor nor the
  89640. + * names of its contributors may be used to endorse or promote products
  89641. + * derived from this software without specific prior written permission.
  89642. + *
  89643. + *
  89644. + * ALTERNATIVELY, this software may be distributed under the terms of the
  89645. + * GNU General Public License ("GPL") as published by the Free Software
  89646. + * Foundation, either version 2 of that License or (at your option) any
  89647. + * later version.
  89648. + *
  89649. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  89650. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  89651. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  89652. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  89653. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  89654. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  89655. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  89656. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  89657. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  89658. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  89659. + */
  89660. +
  89661. +#ifndef __dflags_h
  89662. +#define __dflags_h
  89663. +
  89664. +
  89665. +#define NCSW_LINUX
  89666. +
  89667. +#define P4080
  89668. +#define NCSW_PPC_CORE
  89669. +
  89670. +#define DEBUG_ERRORS 1
  89671. +
  89672. +#if defined(DEBUG)
  89673. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO
  89674. +
  89675. +#define DEBUG_XX_MALLOC
  89676. +#define DEBUG_MEM_LEAKS
  89677. +
  89678. +#else
  89679. +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING
  89680. +#endif /* (DEBUG) */
  89681. +
  89682. +#define REPORT_EVENTS 1
  89683. +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR
  89684. +
  89685. +#ifdef CONFIG_P4080_SIM
  89686. +#define SIMULATOR
  89687. +#endif /* CONFIG_P4080_SIM */
  89688. +
  89689. +
  89690. +#endif /* __dflags_h */
  89691. --- /dev/null
  89692. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/Makefile
  89693. @@ -0,0 +1,11 @@
  89694. +#
  89695. +# Makefile for the Freescale Ethernet controllers
  89696. +#
  89697. +ccflags-y += -DVERSION=\"\"
  89698. +#
  89699. +#Include netcomm SW specific definitions
  89700. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  89701. +#
  89702. +obj-y += system/
  89703. +obj-y += wrapper/
  89704. +obj-y += xx/
  89705. --- /dev/null
  89706. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_ext.h
  89707. @@ -0,0 +1,118 @@
  89708. +/*
  89709. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  89710. + *
  89711. + * Redistribution and use in source and binary forms, with or without
  89712. + * modification, are permitted provided that the following conditions are met:
  89713. + * * Redistributions of source code must retain the above copyright
  89714. + * notice, this list of conditions and the following disclaimer.
  89715. + * * Redistributions in binary form must reproduce the above copyright
  89716. + * notice, this list of conditions and the following disclaimer in the
  89717. + * documentation and/or other materials provided with the distribution.
  89718. + * * Neither the name of Freescale Semiconductor nor the
  89719. + * names of its contributors may be used to endorse or promote products
  89720. + * derived from this software without specific prior written permission.
  89721. + *
  89722. + *
  89723. + * ALTERNATIVELY, this software may be distributed under the terms of the
  89724. + * GNU General Public License ("GPL") as published by the Free Software
  89725. + * Foundation, either version 2 of that License or (at your option) any
  89726. + * later version.
  89727. + *
  89728. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  89729. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  89730. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  89731. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  89732. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  89733. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  89734. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  89735. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  89736. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  89737. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  89738. + */
  89739. +
  89740. +#ifndef __SYS_EXT_H
  89741. +#define __SYS_EXT_H
  89742. +
  89743. +#include "std_ext.h"
  89744. +
  89745. +
  89746. +/**************************************************************************//**
  89747. + @Group sys_grp System Interfaces
  89748. +
  89749. + @Description Linux system programming interfaces.
  89750. +
  89751. + @{
  89752. +*//***************************************************************************/
  89753. +
  89754. +/**************************************************************************//**
  89755. + @Group sys_gen_grp System General Interface
  89756. +
  89757. + @Description General definitions, structures and routines of the linux
  89758. + system programming interface.
  89759. +
  89760. + @{
  89761. +*//***************************************************************************/
  89762. +
  89763. +/**************************************************************************//**
  89764. + @Collection Macros for Advanced Configuration Requests
  89765. + @{
  89766. +*//***************************************************************************/
  89767. +#define SYS_MAX_ADV_CONFIG_ARGS 4
  89768. + /**< Maximum number of arguments in
  89769. + an advanced configuration entry */
  89770. +/* @} */
  89771. +
  89772. +/**************************************************************************//**
  89773. + @Description System Object Advanced Configuration Entry
  89774. +
  89775. + This structure represents a single request for an advanced
  89776. + configuration call on the initialized object. An array of such
  89777. + requests may be contained in the settings structure of the
  89778. + corresponding object.
  89779. +
  89780. + The maximum number of arguments is limited to #SYS_MAX_ADV_CONFIG_ARGS.
  89781. +*//***************************************************************************/
  89782. +typedef struct t_SysObjectAdvConfigEntry
  89783. +{
  89784. + void *p_Function; /**< Pointer to advanced configuration routine */
  89785. +
  89786. + uintptr_t args[SYS_MAX_ADV_CONFIG_ARGS];
  89787. + /**< Array of arguments for the specified routine;
  89788. + All arguments should be casted to uint32_t. */
  89789. +} t_SysObjectAdvConfigEntry;
  89790. +
  89791. +
  89792. +/** @} */ /* end of sys_gen_grp */
  89793. +/** @} */ /* end of sys_grp */
  89794. +
  89795. +#define NCSW_PARAMS(_num, _params) ADV_CONFIG_PARAMS_##_num _params
  89796. +
  89797. +#define ADV_CONFIG_PARAMS_1(_type) \
  89798. + , (_type)p_Entry->args[0]
  89799. +
  89800. +#define SET_ADV_CONFIG_ARGS_1(_arg0) \
  89801. + p_Entry->args[0] = (uintptr_t )(_arg0); \
  89802. +
  89803. +#define ARGS(_num, _params) SET_ADV_CONFIG_ARGS_##_num _params
  89804. +
  89805. +#define ADD_ADV_CONFIG_START(_p_Entries, _maxEntries) \
  89806. + { \
  89807. + t_SysObjectAdvConfigEntry *p_Entry; \
  89808. + t_SysObjectAdvConfigEntry *p_Entrys = (_p_Entries); \
  89809. + int i=0, max = (_maxEntries); \
  89810. +
  89811. +#define ADD_ADV_CONFIG_END \
  89812. + }
  89813. +
  89814. +#define ADV_CONFIG_CHECK_START(_p_Entry) \
  89815. + { \
  89816. + t_SysObjectAdvConfigEntry *p_Entry = _p_Entry; \
  89817. + t_Error errCode; \
  89818. +
  89819. +#define ADV_CONFIG_CHECK(_handle, _func, _params) \
  89820. + if (p_Entry->p_Function == _func) \
  89821. + { \
  89822. + errCode = _func(_handle _params); \
  89823. + } else
  89824. +
  89825. +#endif /* __SYS_EXT_H */
  89826. --- /dev/null
  89827. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/system/sys_io_ext.h
  89828. @@ -0,0 +1,46 @@
  89829. +/*
  89830. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  89831. + *
  89832. + * Redistribution and use in source and binary forms, with or without
  89833. + * modification, are permitted provided that the following conditions are met:
  89834. + * * Redistributions of source code must retain the above copyright
  89835. + * notice, this list of conditions and the following disclaimer.
  89836. + * * Redistributions in binary form must reproduce the above copyright
  89837. + * notice, this list of conditions and the following disclaimer in the
  89838. + * documentation and/or other materials provided with the distribution.
  89839. + * * Neither the name of Freescale Semiconductor nor the
  89840. + * names of its contributors may be used to endorse or promote products
  89841. + * derived from this software without specific prior written permission.
  89842. + *
  89843. + *
  89844. + * ALTERNATIVELY, this software may be distributed under the terms of the
  89845. + * GNU General Public License ("GPL") as published by the Free Software
  89846. + * Foundation, either version 2 of that License or (at your option) any
  89847. + * later version.
  89848. + *
  89849. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  89850. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  89851. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  89852. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  89853. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  89854. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  89855. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  89856. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  89857. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  89858. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  89859. + */
  89860. +
  89861. +#ifndef __SYS_IO_EXT_H
  89862. +#define __SYS_IO_EXT_H
  89863. +
  89864. +#include "std_ext.h"
  89865. +#include "error_ext.h"
  89866. +
  89867. +
  89868. +t_Error SYS_RegisterIoMap (uint64_t virtAddr, uint64_t physAddr, uint32_t size);
  89869. +t_Error SYS_UnregisterIoMap (uint64_t virtAddr);
  89870. +uint64_t SYS_PhysToVirt (uint64_t addr);
  89871. +uint64_t SYS_VirtToPhys (uint64_t addr);
  89872. +
  89873. +
  89874. +#endif /* __SYS_IO_EXT_H */
  89875. --- /dev/null
  89876. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/types_linux.h
  89877. @@ -0,0 +1,208 @@
  89878. +/*
  89879. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  89880. + *
  89881. + * Redistribution and use in source and binary forms, with or without
  89882. + * modification, are permitted provided that the following conditions are met:
  89883. + * * Redistributions of source code must retain the above copyright
  89884. + * notice, this list of conditions and the following disclaimer.
  89885. + * * Redistributions in binary form must reproduce the above copyright
  89886. + * notice, this list of conditions and the following disclaimer in the
  89887. + * documentation and/or other materials provided with the distribution.
  89888. + * * Neither the name of Freescale Semiconductor nor the
  89889. + * names of its contributors may be used to endorse or promote products
  89890. + * derived from this software without specific prior written permission.
  89891. + *
  89892. + *
  89893. + * ALTERNATIVELY, this software may be distributed under the terms of the
  89894. + * GNU General Public License ("GPL") as published by the Free Software
  89895. + * Foundation, either version 2 of that License or (at your option) any
  89896. + * later version.
  89897. + *
  89898. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  89899. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  89900. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  89901. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  89902. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  89903. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  89904. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  89905. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  89906. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  89907. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  89908. + */
  89909. +
  89910. +#ifndef __TYPES_LINUX_H__
  89911. +#define __TYPES_LINUX_H__
  89912. +
  89913. +#include <linux/version.h>
  89914. +
  89915. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  89916. +#define MODVERSIONS
  89917. +#endif
  89918. +#ifdef MODVERSIONS
  89919. +#include <config/modversions.h>
  89920. +#endif /* MODVERSIONS */
  89921. +
  89922. +#include <linux/kernel.h>
  89923. +#include <linux/types.h>
  89924. +#include <asm/io.h>
  89925. +#include <linux/delay.h>
  89926. +
  89927. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
  89928. + #error "This kernel is probably not supported!!!"
  89929. +#elif (!((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)) || \
  89930. + (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)) || \
  89931. + (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,30))))
  89932. + #warning "This kernel is probably not supported!!! You may need to add some fixes."
  89933. +#endif /* LINUX_VERSION_CODE */
  89934. +
  89935. +
  89936. +typedef float float_t; /* Single precision floating point */
  89937. +typedef double double_t; /* Double precision floating point */
  89938. +
  89939. +
  89940. +#define _Packed
  89941. +#define _PackedType __attribute__ ((packed))
  89942. +
  89943. +typedef phys_addr_t physAddress_t;
  89944. +
  89945. +#define UINT8_MAX 0xFF
  89946. +#define UINT8_MIN 0
  89947. +#define UINT16_MAX 0xFFFF
  89948. +#define UINT16_MIN 0
  89949. +#define UINT32_MAX 0xFFFFFFFF
  89950. +#define UINT32_MIN 0
  89951. +#define UINT64_MAX 0xFFFFFFFFFFFFFFFFLL
  89952. +#define UINT64_MIN 0
  89953. +#define INT8_MAX 0x7F
  89954. +#define INT8_MIN 0x80
  89955. +#define INT16_MAX 0x7FFF
  89956. +#define INT16_MIN 0x8000
  89957. +#define INT32_MAX 0x7FFFFFFF
  89958. +#define INT32_MIN 0x80000000
  89959. +#define INT64_MAX 0x7FFFFFFFFFFFFFFFLL
  89960. +#define INT64_MIN 0x8000000000000000LL
  89961. +
  89962. +#define ON 1
  89963. +#define OFF 0
  89964. +
  89965. +#define FALSE false
  89966. +#define TRUE true
  89967. +
  89968. +
  89969. +/************************/
  89970. +/* memory access macros */
  89971. +/************************/
  89972. +#ifdef CONFIG_FMAN_ARM
  89973. +#define in_be16(a) __be16_to_cpu(__raw_readw(a))
  89974. +#define in_be32(a) __be32_to_cpu(__raw_readl(a))
  89975. +#define out_be16(a, v) __raw_writew(__cpu_to_be16(v), a)
  89976. +#define out_be32(a, v) __raw_writel(__cpu_to_be32(v), a)
  89977. +#endif
  89978. +
  89979. +#define GET_UINT8(arg) *(volatile uint8_t *)(&(arg))
  89980. +#define GET_UINT16(arg) in_be16(&(arg))//*(volatile uint16_t*)(&(arg))
  89981. +#define GET_UINT32(arg) in_be32(&(arg))//*(volatile uint32_t*)(&(arg))
  89982. +#define GET_UINT64(arg) *(volatile uint64_t*)(&(arg))
  89983. +
  89984. +#ifdef VERBOSE_WRITE
  89985. +void XX_Print(char *str, ...);
  89986. +#define WRITE_UINT8(arg, data) \
  89987. + do { XX_Print("ADDR: 0x%08x, VAL: 0x%02x\r\n", (uint32_t)&(arg), (data)); *(volatile uint8_t *)(&(arg)) = (data); } while (0)
  89988. +#define WRITE_UINT16(arg, data) \
  89989. + do { XX_Print("ADDR: 0x%08x, VAL: 0x%04x\r\n", (uint32_t)&(arg), (data)); out_be16(&(arg), data); /* *(volatile uint16_t*)(&(arg)) = (data);*/ } while (0)
  89990. +#define WRITE_UINT32(arg, data) \
  89991. + do { XX_Print("ADDR: 0x%08x, VAL: 0x%08x\r\n", (uint32_t)&(arg), (data)); out_be32(&(arg), data); /* *(volatile uint32_t*)(&(arg)) = (data);*/ } while (0)
  89992. +#define WRITE_UINT64(arg, data) \
  89993. + do { XX_Print("ADDR: 0x%08x, VAL: 0x%016llx\r\n", (uint32_t)&(arg), (data)); *(volatile uint64_t*)(&(arg)) = (data); } while (0)
  89994. +
  89995. +#else /* not VERBOSE_WRITE */
  89996. +#define WRITE_UINT8(arg, data) *(volatile uint8_t *)(&(arg)) = (data)
  89997. +#define WRITE_UINT16(arg, data) out_be16(&(arg), data)//*(volatile uint16_t*)(&(arg)) = (data)
  89998. +#define WRITE_UINT32(arg, data) out_be32(&(arg), data)//*(volatile unsigned int *)(&(arg)) = (data)
  89999. +#define WRITE_UINT64(arg, data) *(volatile uint64_t*)(&(arg)) = (data)
  90000. +#endif /* not VERBOSE_WRITE */
  90001. +
  90002. +
  90003. +/*****************************************************************************/
  90004. +/* General stuff */
  90005. +/*****************************************************************************/
  90006. +#ifdef ARRAY_SIZE
  90007. +#undef ARRAY_SIZE
  90008. +#endif /* ARRAY_SIZE */
  90009. +
  90010. +#ifdef MAJOR
  90011. +#undef MAJOR
  90012. +#endif /* MAJOR */
  90013. +
  90014. +#ifdef MINOR
  90015. +#undef MINOR
  90016. +#endif /* MINOR */
  90017. +
  90018. +#ifdef QE_SIZEOF_BD
  90019. +#undef QE_SIZEOF_BD
  90020. +#endif /* QE_SIZEOF_BD */
  90021. +
  90022. +#ifdef BD_BUFFER_CLEAR
  90023. +#undef BD_BUFFER_CLEAR
  90024. +#endif /* BD_BUFFER_CLEAR */
  90025. +
  90026. +#ifdef BD_BUFFER
  90027. +#undef BD_BUFFER
  90028. +#endif /* BD_BUFFER */
  90029. +
  90030. +#ifdef BD_STATUS_AND_LENGTH_SET
  90031. +#undef BD_STATUS_AND_LENGTH_SET
  90032. +#endif /* BD_STATUS_AND_LENGTH_SET */
  90033. +
  90034. +#ifdef BD_STATUS_AND_LENGTH
  90035. +#undef BD_STATUS_AND_LENGTH
  90036. +#endif /* BD_STATUS_AND_LENGTH */
  90037. +
  90038. +#ifdef BD_BUFFER_ARG
  90039. +#undef BD_BUFFER_ARG
  90040. +#endif /* BD_BUFFER_ARG */
  90041. +
  90042. +#ifdef BD_GET_NEXT
  90043. +#undef BD_GET_NEXT
  90044. +#endif /* BD_GET_NEXT */
  90045. +
  90046. +#ifdef QE_SDEBCR_BA_MASK
  90047. +#undef QE_SDEBCR_BA_MASK
  90048. +#endif /* QE_SDEBCR_BA_MASK */
  90049. +
  90050. +#ifdef BD_BUFFER_SET
  90051. +#undef BD_BUFFER_SET
  90052. +#endif /* BD_BUFFER_SET */
  90053. +
  90054. +#ifdef UPGCR_PROTOCOL
  90055. +#undef UPGCR_PROTOCOL
  90056. +#endif /* UPGCR_PROTOCOL */
  90057. +
  90058. +#ifdef UPGCR_TMS
  90059. +#undef UPGCR_TMS
  90060. +#endif /* UPGCR_TMS */
  90061. +
  90062. +#ifdef UPGCR_RMS
  90063. +#undef UPGCR_RMS
  90064. +#endif /* UPGCR_RMS */
  90065. +
  90066. +#ifdef UPGCR_ADDR
  90067. +#undef UPGCR_ADDR
  90068. +#endif /* UPGCR_ADDR */
  90069. +
  90070. +#ifdef UPGCR_DIAG
  90071. +#undef UPGCR_DIAG
  90072. +#endif /* UPGCR_DIAG */
  90073. +
  90074. +#ifdef NCSW_PARAMS
  90075. +#undef NCSW_PARAMS
  90076. +#endif /* NCSW_PARAMS */
  90077. +
  90078. +#ifdef NO_IRQ
  90079. +#undef NO_IRQ
  90080. +#endif /* NO_IRQ */
  90081. +
  90082. +#define PRINT_LINE XX_Print("%s:\n %s [%d]\n",__FILE__,__FUNCTION__,__LINE__);
  90083. +
  90084. +
  90085. +#endif /* __TYPES_LINUX_H__ */
  90086. --- /dev/null
  90087. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/fsl_fman_test.h
  90088. @@ -0,0 +1,84 @@
  90089. +/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
  90090. + * All rights reserved.
  90091. + *
  90092. + * Redistribution and use in source and binary forms, with or without
  90093. + * modification, are permitted provided that the following conditions are met:
  90094. + * * Redistributions of source code must retain the above copyright
  90095. + * notice, this list of conditions and the following disclaimer.
  90096. + * * Redistributions in binary form must reproduce the above copyright
  90097. + * notice, this list of conditions and the following disclaimer in the
  90098. + * documentation and/or other materials provided with the distribution.
  90099. + * * Neither the name of Freescale Semiconductor nor the
  90100. + * names of its contributors may be used to endorse or promote products
  90101. + * derived from this software without specific prior written permission.
  90102. + *
  90103. + *
  90104. + * ALTERNATIVELY, this software may be distributed under the terms of the
  90105. + * GNU General Public License ("GPL") as published by the Free Software
  90106. + * Foundation, either version 2 of that License or (at your option) any
  90107. + * later version.
  90108. + *
  90109. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  90110. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  90111. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  90112. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  90113. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  90114. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  90115. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  90116. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  90117. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  90118. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  90119. + */
  90120. +
  90121. +/******************************************************************************
  90122. + @File fsl_fman_test.h
  90123. +
  90124. + @Description
  90125. +*//***************************************************************************/
  90126. +
  90127. +#ifndef __FSL_FMAN_TEST_H
  90128. +#define __FSL_FMAN_TEST_H
  90129. +
  90130. +#include <linux/types.h>
  90131. +#include <linux/smp.h> /* raw_smp_processor_id() */
  90132. +
  90133. +//#define FMT_K_DBG
  90134. +//#define FMT_K_DBG_RUNTIME
  90135. +
  90136. +#define _fmt_prk(stage, format, arg...) \
  90137. + printk(stage "fmt (cpu:%u): " format, raw_smp_processor_id(), ##arg)
  90138. +
  90139. +#define _fmt_inf(format, arg...) _fmt_prk(KERN_INFO, format, ##arg)
  90140. +#define _fmt_wrn(format, arg...) _fmt_prk(KERN_WARNING, format, ##arg)
  90141. +#define _fmt_err(format, arg...) _fmt_prk(KERN_ERR, format, ##arg)
  90142. +
  90143. +/* there are two macros for debugging: for runtime and generic.
  90144. + * Helps when the runtime functions are not targeted for debugging,
  90145. + * thus all the unnecessary information will be skipped.
  90146. + */
  90147. +/* used for generic debugging */
  90148. +#if defined(FMT_K_DBG)
  90149. + #define _fmt_dbg(format, arg...) \
  90150. + printk("fmt [%s:%u](cpu:%u) - " format, \
  90151. + __func__, __LINE__, raw_smp_processor_id(), ##arg)
  90152. +#else
  90153. +# define _fmt_dbg(arg...)
  90154. +#endif
  90155. +
  90156. +/* used for debugging runtime functions */
  90157. +#if defined(FMT_K_DBG_RUNTIME)
  90158. + #define _fmt_dbgr(format, arg...) \
  90159. + printk("fmt [%s:%u](cpu:%u) - " format, \
  90160. + __func__, __LINE__, raw_smp_processor_id(), ##arg)
  90161. +#else
  90162. +# define _fmt_dbgr(arg...)
  90163. +#endif
  90164. +
  90165. +#define FMT_RX_ERR_Q 0xffffffff
  90166. +#define FMT_RX_DFLT_Q 0xfffffffe
  90167. +#define FMT_TX_ERR_Q 0xfffffffd
  90168. +#define FMT_TX_CONF_Q 0xfffffffc
  90169. +
  90170. +#define FMAN_TEST_MAX_TX_FQS 8
  90171. +
  90172. +#endif /* __FSL_FMAN_TEST_H */
  90173. --- /dev/null
  90174. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h
  90175. @@ -0,0 +1,127 @@
  90176. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  90177. + * All rights reserved.
  90178. + *
  90179. + * Redistribution and use in source and binary forms, with or without
  90180. + * modification, are permitted provided that the following conditions are met:
  90181. + * * Redistributions of source code must retain the above copyright
  90182. + * notice, this list of conditions and the following disclaimer.
  90183. + * * Redistributions in binary form must reproduce the above copyright
  90184. + * notice, this list of conditions and the following disclaimer in the
  90185. + * documentation and/or other materials provided with the distribution.
  90186. + * * Neither the name of Freescale Semiconductor nor the
  90187. + * names of its contributors may be used to endorse or promote products
  90188. + * derived from this software without specific prior written permission.
  90189. + *
  90190. + *
  90191. + * ALTERNATIVELY, this software may be distributed under the terms of the
  90192. + * GNU General Public License ("GPL") as published by the Free Software
  90193. + * Foundation, either version 2 of that License or (at your option) any
  90194. + * later version.
  90195. + *
  90196. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  90197. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  90198. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  90199. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  90200. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  90201. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  90202. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  90203. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  90204. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  90205. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  90206. + */
  90207. +
  90208. +/*
  90209. + @File lnxwrp_exp_sym.h
  90210. + @Description FMan exported routines
  90211. +*/
  90212. +
  90213. +#ifndef __LNXWRP_EXP_SYM_H
  90214. +#define __LNXWRP_EXP_SYM_H
  90215. +
  90216. +#include "fm_port_ext.h"
  90217. +#include "fm_pcd_ext.h"
  90218. +#include "fm_mac_ext.h"
  90219. +
  90220. +
  90221. +/* FMAN Port exported routines */
  90222. +EXPORT_SYMBOL(FM_PORT_Disable);
  90223. +EXPORT_SYMBOL(FM_PORT_Enable);
  90224. +EXPORT_SYMBOL(FM_PORT_SetPCD);
  90225. +
  90226. +/* Runtime PCD exported routines */
  90227. +EXPORT_SYMBOL(FM_PCD_Enable);
  90228. +EXPORT_SYMBOL(FM_PCD_Disable);
  90229. +EXPORT_SYMBOL(FM_PCD_GetCounter);
  90230. +EXPORT_SYMBOL(FM_PCD_PrsLoadSw);
  90231. +EXPORT_SYMBOL(FM_PCD_KgSetDfltValue);
  90232. +EXPORT_SYMBOL(FM_PCD_KgSetAdditionalDataAfterParsing);
  90233. +EXPORT_SYMBOL(FM_PCD_SetException);
  90234. +EXPORT_SYMBOL(FM_PCD_ModifyCounter);
  90235. +EXPORT_SYMBOL(FM_PCD_SetPlcrStatistics);
  90236. +EXPORT_SYMBOL(FM_PCD_SetPrsStatistics);
  90237. +EXPORT_SYMBOL(FM_PCD_ForceIntr);
  90238. +EXPORT_SYMBOL(FM_PCD_HcTxConf);
  90239. +
  90240. +EXPORT_SYMBOL(FM_PCD_NetEnvCharacteristicsSet);
  90241. +EXPORT_SYMBOL(FM_PCD_NetEnvCharacteristicsDelete);
  90242. +EXPORT_SYMBOL(FM_PCD_KgSchemeSet);
  90243. +EXPORT_SYMBOL(FM_PCD_KgSchemeDelete);
  90244. +EXPORT_SYMBOL(FM_PCD_KgSchemeGetCounter);
  90245. +EXPORT_SYMBOL(FM_PCD_KgSchemeSetCounter);
  90246. +EXPORT_SYMBOL(FM_PCD_CcRootBuild);
  90247. +EXPORT_SYMBOL(FM_PCD_CcRootDelete);
  90248. +EXPORT_SYMBOL(FM_PCD_MatchTableSet);
  90249. +EXPORT_SYMBOL(FM_PCD_MatchTableDelete);
  90250. +EXPORT_SYMBOL(FM_PCD_CcRootModifyNextEngine);
  90251. +EXPORT_SYMBOL(FM_PCD_MatchTableModifyNextEngine);
  90252. +EXPORT_SYMBOL(FM_PCD_MatchTableFindNModifyNextEngine);
  90253. +EXPORT_SYMBOL(FM_PCD_MatchTableModifyMissNextEngine);
  90254. +EXPORT_SYMBOL(FM_PCD_MatchTableRemoveKey);
  90255. +EXPORT_SYMBOL(FM_PCD_MatchTableFindNRemoveKey);
  90256. +EXPORT_SYMBOL(FM_PCD_MatchTableAddKey);
  90257. +EXPORT_SYMBOL(FM_PCD_MatchTableModifyKeyAndNextEngine);
  90258. +EXPORT_SYMBOL(FM_PCD_MatchTableFindNModifyKeyAndNextEngine);
  90259. +EXPORT_SYMBOL(FM_PCD_MatchTableModifyKey);
  90260. +EXPORT_SYMBOL(FM_PCD_MatchTableFindNModifyKey);
  90261. +EXPORT_SYMBOL(FM_PCD_MatchTableGetIndexedHashBucket);
  90262. +EXPORT_SYMBOL(FM_PCD_MatchTableGetNextEngine);
  90263. +EXPORT_SYMBOL(FM_PCD_MatchTableGetKeyCounter);
  90264. +EXPORT_SYMBOL(FM_PCD_MatchTableGetKeyStatistics);
  90265. +EXPORT_SYMBOL(FM_PCD_MatchTableFindNGetKeyStatistics);
  90266. +EXPORT_SYMBOL(FM_PCD_MatchTableGetMissStatistics);
  90267. +EXPORT_SYMBOL(FM_PCD_HashTableGetMissStatistics);
  90268. +EXPORT_SYMBOL(FM_PCD_HashTableSet);
  90269. +EXPORT_SYMBOL(FM_PCD_HashTableDelete);
  90270. +EXPORT_SYMBOL(FM_PCD_HashTableAddKey);
  90271. +EXPORT_SYMBOL(FM_PCD_HashTableRemoveKey);
  90272. +EXPORT_SYMBOL(FM_PCD_HashTableModifyNextEngine);
  90273. +EXPORT_SYMBOL(FM_PCD_HashTableModifyMissNextEngine);
  90274. +EXPORT_SYMBOL(FM_PCD_HashTableGetMissNextEngine);
  90275. +EXPORT_SYMBOL(FM_PCD_HashTableFindNGetKeyStatistics);
  90276. +EXPORT_SYMBOL(FM_PCD_PlcrProfileSet);
  90277. +EXPORT_SYMBOL(FM_PCD_PlcrProfileDelete);
  90278. +EXPORT_SYMBOL(FM_PCD_PlcrProfileGetCounter);
  90279. +EXPORT_SYMBOL(FM_PCD_PlcrProfileSetCounter);
  90280. +EXPORT_SYMBOL(FM_PCD_ManipNodeSet);
  90281. +EXPORT_SYMBOL(FM_PCD_ManipNodeDelete);
  90282. +EXPORT_SYMBOL(FM_PCD_ManipGetStatistics);
  90283. +EXPORT_SYMBOL(FM_PCD_ManipNodeReplace);
  90284. +#if (DPAA_VERSION >= 11)
  90285. +EXPORT_SYMBOL(FM_PCD_FrmReplicSetGroup);
  90286. +EXPORT_SYMBOL(FM_PCD_FrmReplicDeleteGroup);
  90287. +EXPORT_SYMBOL(FM_PCD_FrmReplicAddMember);
  90288. +EXPORT_SYMBOL(FM_PCD_FrmReplicRemoveMember);
  90289. +#endif /* DPAA_VERSION >= 11 */
  90290. +
  90291. +#ifdef FM_CAPWAP_SUPPORT
  90292. +EXPORT_SYMBOL(FM_PCD_StatisticsSetNode);
  90293. +#endif /* FM_CAPWAP_SUPPORT */
  90294. +
  90295. +EXPORT_SYMBOL(FM_PCD_SetAdvancedOffloadSupport);
  90296. +
  90297. +/* FMAN MAC exported routines */
  90298. +EXPORT_SYMBOL(FM_MAC_GetStatistics);
  90299. +
  90300. +EXPORT_SYMBOL(FM_GetSpecialOperationCoding);
  90301. +
  90302. +#endif /* __LNXWRP_EXP_SYM_H */
  90303. --- /dev/null
  90304. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fm_ext.h
  90305. @@ -0,0 +1,163 @@
  90306. +/*
  90307. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  90308. + *
  90309. + * Redistribution and use in source and binary forms, with or without
  90310. + * modification, are permitted provided that the following conditions are met:
  90311. + * * Redistributions of source code must retain the above copyright
  90312. + * notice, this list of conditions and the following disclaimer.
  90313. + * * Redistributions in binary form must reproduce the above copyright
  90314. + * notice, this list of conditions and the following disclaimer in the
  90315. + * documentation and/or other materials provided with the distribution.
  90316. + * * Neither the name of Freescale Semiconductor nor the
  90317. + * names of its contributors may be used to endorse or promote products
  90318. + * derived from this software without specific prior written permission.
  90319. + *
  90320. + *
  90321. + * ALTERNATIVELY, this software may be distributed under the terms of the
  90322. + * GNU General Public License ("GPL") as published by the Free Software
  90323. + * Foundation, either version 2 of that License or (at your option) any
  90324. + * later version.
  90325. + *
  90326. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  90327. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  90328. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  90329. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  90330. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  90331. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  90332. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  90333. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  90334. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  90335. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  90336. + */
  90337. +
  90338. +/******************************************************************************
  90339. + @File lnxwrp_fm_ext.h
  90340. +
  90341. + @Description TODO
  90342. +*//***************************************************************************/
  90343. +
  90344. +#ifndef __LNXWRP_FM_EXT_H
  90345. +#define __LNXWRP_FM_EXT_H
  90346. +
  90347. +#include "std_ext.h"
  90348. +#include "sys_ext.h"
  90349. +#include "fm_ext.h"
  90350. +#include "fm_muram_ext.h"
  90351. +#include "fm_pcd_ext.h"
  90352. +#include "fm_port_ext.h"
  90353. +#include "fm_mac_ext.h"
  90354. +#include "fm_rtc_ext.h"
  90355. +
  90356. +
  90357. +/**************************************************************************//**
  90358. + @Group FM_LnxKern_grp Frame Manager Linux wrapper API
  90359. +
  90360. + @Description FM API functions, definitions and enums.
  90361. +
  90362. + @{
  90363. +*//***************************************************************************/
  90364. +
  90365. +/**************************************************************************//**
  90366. + @Group FM_LnxKern_init_grp Initialization Unit
  90367. +
  90368. + @Description Initialization Unit
  90369. +
  90370. + Initialization Flow:
  90371. + Initialization of the FM Module will be carried out by the Linux
  90372. + kernel according to the following sequence:
  90373. + a. Calling the initialization routine with no parameters.
  90374. + b. The driver will register to the Device-Tree.
  90375. + c. The Linux Device-Tree will initiate a call to the driver for
  90376. + initialization.
  90377. + d. The driver will read the appropriate information from the Device-Tree
  90378. + e. [Optional] Calling the advance initialization routines to change
  90379. + driver's defaults.
  90380. + f. Initialization of the device will be automatically upon using it.
  90381. +
  90382. + @{
  90383. +*//***************************************************************************/
  90384. +
  90385. +typedef struct t_WrpFmDevSettings
  90386. +{
  90387. + t_FmParams param;
  90388. + t_SysObjectAdvConfigEntry *advConfig;
  90389. +} t_WrpFmDevSettings;
  90390. +
  90391. +typedef struct t_WrpFmPcdDevSettings
  90392. +{
  90393. + t_FmPcdParams param;
  90394. + t_SysObjectAdvConfigEntry *advConfig;
  90395. +} t_WrpFmPcdDevSettings;
  90396. +
  90397. +typedef struct t_WrpFmPortDevSettings
  90398. +{
  90399. + bool frag_enabled;
  90400. + t_FmPortParams param;
  90401. + t_SysObjectAdvConfigEntry *advConfig;
  90402. +} t_WrpFmPortDevSettings;
  90403. +
  90404. +typedef struct t_WrpFmMacDevSettings
  90405. +{
  90406. + t_FmMacParams param;
  90407. + t_SysObjectAdvConfigEntry *advConfig;
  90408. +} t_WrpFmMacDevSettings;
  90409. +
  90410. +
  90411. +/**************************************************************************//**
  90412. + @Function LNXWRP_FM_Init
  90413. +
  90414. + @Description Initialize the FM linux wrapper.
  90415. +
  90416. + @Return A handle (descriptor) of the newly created FM Linux wrapper
  90417. + structure.
  90418. +*//***************************************************************************/
  90419. +t_Handle LNXWRP_FM_Init(void);
  90420. +
  90421. +/**************************************************************************//**
  90422. + @Function LNXWRP_FM_Free
  90423. +
  90424. + @Description Free the FM linux wrapper.
  90425. +
  90426. + @Param[in] h_LnxWrpFm - A handle to the FM linux wrapper.
  90427. +
  90428. + @Return E_OK on success; Error code otherwise.
  90429. +*//***************************************************************************/
  90430. +t_Error LNXWRP_FM_Free(t_Handle h_LnxWrpFm);
  90431. +
  90432. +/**************************************************************************//**
  90433. + @Function LNXWRP_FM_GetMacHandle
  90434. +
  90435. + @Description Get the FM-MAC LLD handle from the FM linux wrapper.
  90436. +
  90437. + @Param[in] h_LnxWrpFm - A handle to the FM linux wrapper.
  90438. + @Param[in] fmId - Index of the FM device to get the MAC handle from.
  90439. + @Param[in] macId - Index of the mac handle.
  90440. +
  90441. + @Return A handle of the LLD compressor.
  90442. +*//***************************************************************************/
  90443. +t_Handle LNXWRP_FM_GetMacHandle(t_Handle h_LnxWrpFm, uint8_t fmId, uint8_t macId);
  90444. +
  90445. +#ifdef CONFIG_FSL_SDK_FMAN_TEST
  90446. +t_Handle LNXWRP_FM_TEST_Init(void);
  90447. +t_Error LNXWRP_FM_TEST_Free(t_Handle h_FmTestLnxWrp);
  90448. +#endif /* CONFIG_FSL_SDK_FMAN_TEST */
  90449. +
  90450. +/** @} */ /* end of FM_LnxKern_init_grp group */
  90451. +
  90452. +
  90453. +/**************************************************************************//**
  90454. + @Group FM_LnxKern_ctrl_grp Control Unit
  90455. +
  90456. + @Description Control Unit
  90457. +
  90458. + TODO
  90459. + @{
  90460. +*//***************************************************************************/
  90461. +
  90462. +#include "lnxwrp_fsl_fman.h"
  90463. +
  90464. +/** @} */ /* end of FM_LnxKern_ctrl_grp group */
  90465. +/** @} */ /* end of FM_LnxKern_grp group */
  90466. +
  90467. +
  90468. +#endif /* __LNXWRP_FM_EXT_H */
  90469. --- /dev/null
  90470. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_fsl_fman.h
  90471. @@ -0,0 +1,919 @@
  90472. +/*
  90473. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  90474. + *
  90475. + * Redistribution and use in source and binary forms, with or without
  90476. + * modification, are permitted provided that the following conditions are met:
  90477. + * * Redistributions of source code must retain the above copyright
  90478. + * notice, this list of conditions and the following disclaimer.
  90479. + * * Redistributions in binary form must reproduce the above copyright
  90480. + * notice, this list of conditions and the following disclaimer in the
  90481. + * documentation and/or other materials provided with the distribution.
  90482. + * * Neither the name of Freescale Semiconductor nor the
  90483. + * names of its contributors may be used to endorse or promote products
  90484. + * derived from this software without specific prior written permission.
  90485. + *
  90486. + *
  90487. + * ALTERNATIVELY, this software may be distributed under the terms of the
  90488. + * GNU General Public License ("GPL") as published by the Free Software
  90489. + * Foundation, either version 2 of that License or (at your option) any
  90490. + * later version.
  90491. + *
  90492. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  90493. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  90494. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  90495. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  90496. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  90497. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  90498. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  90499. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  90500. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  90501. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  90502. + */
  90503. +
  90504. +/******************************************************************************
  90505. + @File lnxwrp_fsl_fman.h
  90506. +
  90507. + @Description Linux internal kernel API
  90508. +*//***************************************************************************/
  90509. +
  90510. +#ifndef __LNXWRP_FSL_FMAN_H
  90511. +#define __LNXWRP_FSL_FMAN_H
  90512. +
  90513. +#include <linux/types.h>
  90514. +#include <linux/device.h> /* struct device */
  90515. +#include <linux/fsl_qman.h> /* struct qman_fq */
  90516. +#include "dpaa_integration_ext.h"
  90517. +#include "fm_port_ext.h"
  90518. +#include "fm_mac_ext.h"
  90519. +#include "fm_macsec_ext.h"
  90520. +#include "fm_rtc_ext.h"
  90521. +
  90522. +/**************************************************************************//**
  90523. + @Group FM_LnxKern_grp Frame Manager Linux wrapper API
  90524. +
  90525. + @Description FM API functions, definitions and enums.
  90526. +
  90527. + @{
  90528. +*//***************************************************************************/
  90529. +
  90530. +/**************************************************************************//**
  90531. + @Group FM_LnxKern_ctrl_grp Control Unit
  90532. +
  90533. + @Description Control Unit
  90534. +
  90535. + Internal Kernel Control Unit API
  90536. + @{
  90537. +*//***************************************************************************/
  90538. +
  90539. +/*****************************************************************************/
  90540. +/* Internal Linux kernel routines */
  90541. +/*****************************************************************************/
  90542. +
  90543. +/**************************************************************************//**
  90544. + @Description MACSEC Exceptions wrapper
  90545. +*//***************************************************************************/
  90546. +typedef enum fm_macsec_exception {
  90547. + SINGLE_BIT_ECC = e_FM_MACSEC_EX_SINGLE_BIT_ECC,
  90548. + MULTI_BIT_ECC = e_FM_MACSEC_EX_MULTI_BIT_ECC
  90549. +} fm_macsec_exception;
  90550. +
  90551. +/**************************************************************************//**
  90552. + @Description Unknown sci frame treatment wrapper
  90553. +*//***************************************************************************/
  90554. +typedef enum fm_macsec_unknown_sci_frame_treatment {
  90555. + SCI_DISCARD_BOTH = e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH,
  90556. + SCI_DISCARD_UNCTRL_DELIVER_DISCARD_CTRL = \
  90557. + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED,
  90558. + SCI_DELIVER_UNCTRL_DISCARD_CTRL = \
  90559. + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED,
  90560. + SCI_DELIVER_DISCARD_UNCTRL_DELIVER_DISCARD_CTRL = \
  90561. + e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DELIVER_OR_DISCARD_UNCONTROLLED_DELIVER_OR_DISCARD_CONTROLLED
  90562. +} fm_macsec_unknown_sci_frame_treatment;
  90563. +
  90564. +/**************************************************************************//**
  90565. + @Description Untag frame treatment wrapper
  90566. +*//***************************************************************************/
  90567. +typedef enum fm_macsec_untag_frame_treatment {
  90568. + UNTAG_DELIVER_UNCTRL_DISCARD_CTRL = \
  90569. + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED,
  90570. + UNTAG_DISCARD_BOTH = e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_BOTH,
  90571. + UNTAG_DISCARD_UNCTRL_DELIVER_CTRL_UNMODIFIED = \
  90572. + e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DISCARD_UNCONTROLLED_DELIVER_CONTROLLED_UNMODIFIED
  90573. +} fm_macsec_untag_frame_treatment;
  90574. +
  90575. +/**************************************************************************//**
  90576. +@Description MACSEC SECY Cipher Suite wrapper
  90577. +*//***************************************************************************/
  90578. +typedef enum fm_macsec_secy_cipher_suite {
  90579. + SECY_GCM_AES_128 = e_FM_MACSEC_SECY_GCM_AES_128, /**< GCM-AES-128 */
  90580. +#if (DPAA_VERSION >= 11)
  90581. + SECY_GCM_AES_256 = e_FM_MACSEC_SECY_GCM_AES_256 /**< GCM-AES-256 */
  90582. +#endif /* (DPAA_VERSION >= 11) */
  90583. +} fm_macsec_secy_cipher_suite;
  90584. +
  90585. +/**************************************************************************//**
  90586. + @Description MACSEC SECY Exceptions wrapper
  90587. +*//***************************************************************************/
  90588. +typedef enum fm_macsec_secy_exception {
  90589. + SECY_EX_FRAME_DISCARDED = e_FM_MACSEC_SECY_EX_FRAME_DISCARDED
  90590. +} fm_macsec_secy_exception;
  90591. +
  90592. +/**************************************************************************//**
  90593. + @Description MACSEC SECY Events wrapper
  90594. +*//***************************************************************************/
  90595. +typedef enum fm_macsec_secy_event {
  90596. + SECY_EV_NEXT_PN = e_FM_MACSEC_SECY_EV_NEXT_PN
  90597. +} fm_macsec_secy_event;
  90598. +
  90599. +/**************************************************************************//**
  90600. + @Description Valid frame behaviors wrapper
  90601. +*//***************************************************************************/
  90602. +typedef enum fm_macsec_valid_frame_behavior {
  90603. + VALID_FRAME_BEHAVIOR_DISABLE = e_FM_MACSEC_VALID_FRAME_BEHAVIOR_DISABLE,
  90604. + VALID_FRAME_BEHAVIOR_CHECK = e_FM_MACSEC_VALID_FRAME_BEHAVIOR_CHECK,
  90605. + VALID_FRAME_BEHAVIOR_STRICT = e_FM_MACSEC_VALID_FRAME_BEHAVIOR_STRICT
  90606. +} fm_macsec_valid_frame_behavior;
  90607. +
  90608. +/**************************************************************************//**
  90609. + @Description SCI insertion modes wrapper
  90610. +*//***************************************************************************/
  90611. +typedef enum fm_macsec_sci_insertion_mode {
  90612. + SCI_INSERTION_MODE_EXPLICIT_SECTAG = \
  90613. + e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_SECTAG,
  90614. + SCI_INSERTION_MODE_EXPLICIT_MAC_SA = \
  90615. + e_FM_MACSEC_SCI_INSERTION_MODE_EXPLICIT_MAC_SA,
  90616. + SCI_INSERTION_MODE_IMPLICT_PTP = e_FM_MACSEC_SCI_INSERTION_MODE_IMPLICT_PTP
  90617. +} fm_macsec_sci_insertion_mode;
  90618. +
  90619. +typedef macsecSAKey_t macsec_sa_key_t;
  90620. +typedef macsecSCI_t macsec_sci_t;
  90621. +typedef macsecAN_t macsec_an_t;
  90622. +typedef t_Handle handle_t;
  90623. +
  90624. +/**************************************************************************//**
  90625. + @Function fm_macsec_secy_exception_callback wrapper
  90626. + @Description Exceptions user callback routine, will be called upon an
  90627. + exception passing the exception identification.
  90628. + @Param[in] app_h A handle to an application layer object; This handle
  90629. + will be passed by the driver upon calling this callback.
  90630. + @Param[in] exception The exception.
  90631. +*//***************************************************************************/
  90632. +typedef void (fm_macsec_secy_exception_callback) (handle_t app_h,
  90633. + fm_macsec_secy_exception exception);
  90634. +
  90635. +/**************************************************************************//**
  90636. + @Function fm_macsec_secy_event_callback wrapper
  90637. + @Description Events user callback routine, will be called upon an
  90638. + event passing the event identification.
  90639. + @Param[in] app_h A handle to an application layer object; This handle
  90640. + will be passed by the driver upon calling this callback.
  90641. + @Param[in] event The event.
  90642. +*//***************************************************************************/
  90643. +typedef void (fm_macsec_secy_event_callback) (handle_t app_h,
  90644. + fm_macsec_secy_event event);
  90645. +
  90646. +/**************************************************************************//**
  90647. + @Function fm_macsec_exception_callback wrapper
  90648. + @Description Exceptions user callback routine, will be called upon an
  90649. + exception passing the exception identification.
  90650. + @Param[in] app_h A handle to an application layer object; This handle
  90651. + will be passed by the driver upon calling this callback.
  90652. + @Param[in] exception The exception.
  90653. +*//***************************************************************************/
  90654. +typedef void (fm_macsec_exception_callback) (handle_t app_h,
  90655. + fm_macsec_exception exception);
  90656. +
  90657. +/**************************************************************************//**
  90658. + @Description MACSEC SecY SC Params wrapper
  90659. +*//***************************************************************************/
  90660. +struct fm_macsec_secy_sc_params {
  90661. + macsec_sci_t sci;
  90662. + fm_macsec_secy_cipher_suite cipher_suite;
  90663. +};
  90664. +
  90665. +/**************************************************************************//**
  90666. + @Description FM MACSEC SecY config input wrapper
  90667. +*//***************************************************************************/
  90668. +struct fm_macsec_secy_params {
  90669. + handle_t fm_macsec_h;
  90670. + struct fm_macsec_secy_sc_params tx_sc_params;
  90671. + uint32_t num_receive_channels;
  90672. + fm_macsec_secy_exception_callback *exception_f;
  90673. + fm_macsec_secy_event_callback *event_f;
  90674. + handle_t app_h;
  90675. +};
  90676. +
  90677. +/**************************************************************************//**
  90678. + @Description FM MACSEC config input wrapper
  90679. +*//***************************************************************************/
  90680. +struct fm_macsec_params {
  90681. + handle_t fm_h;
  90682. + bool guest_mode;
  90683. +
  90684. + union {
  90685. + struct {
  90686. + uint8_t fm_mac_id;
  90687. + } guest_params;
  90688. +
  90689. + struct {
  90690. + uintptr_t base_addr;
  90691. + handle_t fm_mac_h;
  90692. + fm_macsec_exception_callback *exception_f;
  90693. + handle_t app_h;
  90694. + } non_guest_params;
  90695. + };
  90696. +
  90697. +};
  90698. +
  90699. +/**************************************************************************//**
  90700. + @Description FM device opaque structure used for type checking
  90701. +*//***************************************************************************/
  90702. +struct fm;
  90703. +
  90704. +/**************************************************************************//**
  90705. + @Description FM MAC device opaque structure used for type checking
  90706. +*//***************************************************************************/
  90707. +struct fm_mac_dev;
  90708. +
  90709. +/**************************************************************************//**
  90710. + @Description FM MACSEC device opaque structure used for type checking
  90711. +*//***************************************************************************/
  90712. +struct fm_macsec_dev;
  90713. +struct fm_macsec_secy_dev;
  90714. +
  90715. +/**************************************************************************//**
  90716. + @Description A structure ..,
  90717. +*//***************************************************************************/
  90718. +struct fm_port;
  90719. +
  90720. +typedef int (*alloc_pcd_fqids)(struct device *dev, uint32_t num,
  90721. + uint8_t alignment, uint32_t *base_fqid);
  90722. +
  90723. +typedef int (*free_pcd_fqids)(struct device *dev, uint32_t base_fqid);
  90724. +
  90725. +struct fm_port_pcd_param {
  90726. + alloc_pcd_fqids cba;
  90727. + free_pcd_fqids cbf;
  90728. + struct device *dev;
  90729. +};
  90730. +
  90731. +/**************************************************************************//**
  90732. + @Description A structure of information about each of the external
  90733. + buffer pools used by the port,
  90734. +*//***************************************************************************/
  90735. +struct fm_port_pool_param {
  90736. + uint8_t id; /**< External buffer pool id */
  90737. + uint16_t size; /**< External buffer pool buffer size */
  90738. +};
  90739. +
  90740. +/**************************************************************************//**
  90741. + @Description structure for additional port parameters
  90742. +*//***************************************************************************/
  90743. +struct fm_port_params {
  90744. + uint32_t errq; /**< Error Queue Id. */
  90745. + uint32_t defq; /**< For Tx and HC - Default Confirmation queue,
  90746. + 0 means no Tx conf for processed frames.
  90747. + For Rx and OP - default Rx queue. */
  90748. + uint8_t num_pools; /**< Number of pools use by this port */
  90749. + struct fm_port_pool_param pool_param[FM_PORT_MAX_NUM_OF_EXT_POOLS];
  90750. + /**< Parameters for each pool */
  90751. + uint16_t priv_data_size; /**< Area that user may save for his own
  90752. + need (E.g. save the SKB) */
  90753. + bool parse_results; /**< Put the parser-results in the Rx/Tx buffer */
  90754. + bool hash_results; /**< Put the hash-results in the Rx/Tx buffer */
  90755. + bool time_stamp; /**< Put the time-stamp in the Rx/Tx buffer */
  90756. + bool frag_enable; /**< Fragmentation support, for OP only */
  90757. + uint16_t data_align; /**< value for selecting a data alignment (must be a power of 2);
  90758. + if write optimization is used, must be >= 16. */
  90759. + uint8_t manip_extra_space; /**< Maximum extra size needed (insertion-size minus removal-size);
  90760. + Note that this field impacts the size of the buffer-prefix
  90761. + (i.e. it pushes the data offset); */
  90762. +};
  90763. +
  90764. +/**************************************************************************//**
  90765. + @Function fm_bind
  90766. +
  90767. + @Description Bind to a specific FM device.
  90768. +
  90769. + @Param[in] fm_dev - the OF handle of the FM device.
  90770. +
  90771. + @Return A handle of the FM device.
  90772. +
  90773. + @Cautions Allowed only after the port was created.
  90774. +*//***************************************************************************/
  90775. +struct fm *fm_bind(struct device *fm_dev);
  90776. +
  90777. +/**************************************************************************//**
  90778. + @Function fm_unbind
  90779. +
  90780. + @Description Un-bind from a specific FM device.
  90781. +
  90782. + @Param[in] fm - A handle of the FM device.
  90783. +
  90784. + @Cautions Allowed only after the port was created.
  90785. +*//***************************************************************************/
  90786. +void fm_unbind(struct fm *fm);
  90787. +
  90788. +void *fm_get_handle(struct fm *fm);
  90789. +void *fm_get_rtc_handle(struct fm *fm);
  90790. +struct resource *fm_get_mem_region(struct fm *fm);
  90791. +
  90792. +/**************************************************************************//**
  90793. + @Function fm_port_bind
  90794. +
  90795. + @Description Bind to a specific FM-port device (may be Rx or Tx port).
  90796. +
  90797. + @Param[in] fm_port_dev - the OF handle of the FM port device.
  90798. +
  90799. + @Return A handle of the FM port device.
  90800. +
  90801. + @Cautions Allowed only after the port was created.
  90802. +*//***************************************************************************/
  90803. +struct fm_port *fm_port_bind(struct device *fm_port_dev);
  90804. +
  90805. +/**************************************************************************//**
  90806. + @Function fm_port_unbind
  90807. +
  90808. + @Description Un-bind from a specific FM-port device (may be Rx or Tx port).
  90809. +
  90810. + @Param[in] port - A handle of the FM port device.
  90811. +
  90812. + @Cautions Allowed only after the port was created.
  90813. +*//***************************************************************************/
  90814. +void fm_port_unbind(struct fm_port *port);
  90815. +
  90816. +/**************************************************************************//**
  90817. + @Function fm_set_rx_port_params
  90818. +
  90819. + @Description Configure parameters for a specific Rx FM-port device.
  90820. +
  90821. + @Param[in] port - A handle of the FM port device.
  90822. + @Param[in] params - Rx port parameters
  90823. +
  90824. + @Cautions Allowed only after the port is binded.
  90825. +*//***************************************************************************/
  90826. +void fm_set_rx_port_params(struct fm_port *port,
  90827. + struct fm_port_params *params);
  90828. +
  90829. +/**************************************************************************//**
  90830. + @Function fm_port_pcd_bind
  90831. +
  90832. + @Description Bind as a listener on a port PCD.
  90833. +
  90834. + @Param[in] port - A handle of the FM port device.
  90835. + @Param[in] params - PCD port parameters
  90836. +
  90837. + @Cautions Allowed only after the port is binded.
  90838. +*//***************************************************************************/
  90839. +void fm_port_pcd_bind (struct fm_port *port, struct fm_port_pcd_param *params);
  90840. +
  90841. +/**************************************************************************//**
  90842. + @Function fm_port_get_buff_layout_ext_params
  90843. +
  90844. + @Description Get data_align and manip_extra_space from the device tree
  90845. + chosen node if applied.
  90846. + This function will only update these two parameters.
  90847. + When this port has no such parameters in the device tree
  90848. + values will be set to 0.
  90849. +
  90850. + @Param[in] port - A handle of the FM port device.
  90851. + @Param[in] params - PCD port parameters
  90852. +
  90853. + @Cautions Allowed only after the port is binded.
  90854. +*//***************************************************************************/
  90855. +void fm_port_get_buff_layout_ext_params(struct fm_port *port, struct fm_port_params *params);
  90856. +
  90857. +/**************************************************************************//**
  90858. + @Function fm_get_tx_port_channel
  90859. +
  90860. + @Description Get qman-channel number for this Tx port.
  90861. +
  90862. + @Param[in] port - A handle of the FM port device.
  90863. +
  90864. + @Return qman-channel number for this Tx port.
  90865. +
  90866. + @Cautions Allowed only after the port is binded.
  90867. +*//***************************************************************************/
  90868. +uint16_t fm_get_tx_port_channel(struct fm_port *port);
  90869. +
  90870. +/**************************************************************************//**
  90871. + @Function fm_set_tx_port_params
  90872. +
  90873. + @Description Configure parameters for a specific Tx FM-port device
  90874. +
  90875. + @Param[in] port - A handle of the FM port device.
  90876. + @Param[in] params - Tx port parameters
  90877. +
  90878. + @Cautions Allowed only after the port is binded.
  90879. +*//***************************************************************************/
  90880. +void fm_set_tx_port_params(struct fm_port *port, struct fm_port_params *params);
  90881. +
  90882. +
  90883. +/**************************************************************************//**
  90884. + @Function fm_mac_set_handle
  90885. +
  90886. + @Description Set mac handle
  90887. +
  90888. + @Param[in] h_lnx_wrp_fm_dev - A handle of the LnxWrp FM device.
  90889. + @Param[in] h_fm_mac - A handle of the LnxWrp FM MAC device.
  90890. + @Param[in] mac_id - MAC id.
  90891. +*//***************************************************************************/
  90892. +void fm_mac_set_handle(t_Handle h_lnx_wrp_fm_dev, t_Handle h_fm_mac,
  90893. + int mac_id);
  90894. +
  90895. +/**************************************************************************//**
  90896. + @Function fm_port_enable
  90897. +
  90898. + @Description Enable specific FM-port device (may be Rx or Tx port).
  90899. +
  90900. + @Param[in] port - A handle of the FM port device.
  90901. +
  90902. + @Cautions Allowed only after the port is initialized.
  90903. +*//***************************************************************************/
  90904. +int fm_port_enable(struct fm_port *port);
  90905. +
  90906. +/**************************************************************************//**
  90907. + @Function fm_port_disable
  90908. +
  90909. + @Description Disable specific FM-port device (may be Rx or Tx port).
  90910. +
  90911. + @Param[in] port - A handle of the FM port device.
  90912. +
  90913. + @Cautions Allowed only after the port is initialized.
  90914. +*//***************************************************************************/
  90915. +int fm_port_disable(struct fm_port *port);
  90916. +
  90917. +void *fm_port_get_handle(const struct fm_port *port);
  90918. +
  90919. +u64 *fm_port_get_buffer_time_stamp(const struct fm_port *port,
  90920. + const void *data);
  90921. +
  90922. +/**************************************************************************//**
  90923. + @Function fm_port_get_base_address
  90924. +
  90925. + @Description Get base address of this port. Useful for accessing
  90926. + port-specific registers (i.e., not common ones).
  90927. +
  90928. + @Param[in] port - A handle of the FM port device.
  90929. +
  90930. + @Param[out] base_addr - The port's base addr (virtual address).
  90931. +*//***************************************************************************/
  90932. +void fm_port_get_base_addr(const struct fm_port *port, uint64_t *base_addr);
  90933. +
  90934. +/**************************************************************************//**
  90935. + @Function fm_mutex_lock
  90936. +
  90937. + @Description Lock function required before any FMD/LLD call.
  90938. +*//***************************************************************************/
  90939. +void fm_mutex_lock(void);
  90940. +
  90941. +/**************************************************************************//**
  90942. + @Function fm_mutex_unlock
  90943. +
  90944. + @Description Unlock function required after any FMD/LLD call.
  90945. +*//***************************************************************************/
  90946. +void fm_mutex_unlock(void);
  90947. +
  90948. +/**************************************************************************//**
  90949. + @Function fm_get_max_frm
  90950. +
  90951. + @Description Get the maximum frame size
  90952. +*//***************************************************************************/
  90953. +int fm_get_max_frm(void);
  90954. +
  90955. +/**************************************************************************//**
  90956. + @Function fm_get_rx_extra_headroom
  90957. +
  90958. + @Description Get the extra headroom size
  90959. +*//***************************************************************************/
  90960. +int fm_get_rx_extra_headroom(void);
  90961. +
  90962. +/**************************************************************************//**
  90963. +@Function fm_port_set_rate_limit
  90964. +
  90965. +@Description Configure Shaper parameter on FM-port device (Tx port).
  90966. +
  90967. +@Param[in] port - A handle of the FM port device.
  90968. +@Param[in] max_burst_size - Value of maximum burst size allowed.
  90969. +@Param[in] rate_limit - The required rate value.
  90970. +
  90971. +@Cautions Allowed only after the port is initialized.
  90972. +*//***************************************************************************/
  90973. +int fm_port_set_rate_limit(struct fm_port *port,
  90974. + uint16_t max_burst_size,
  90975. + uint32_t rate_limit);
  90976. +/**************************************************************************//**
  90977. +@Function fm_port_set_rate_limit
  90978. +
  90979. +@Description Delete Shaper configuration on FM-port device (Tx port).
  90980. +
  90981. +@Param[in] port - A handle of the FM port device.
  90982. +
  90983. +@Cautions Allowed only after the port is initialized.
  90984. +*//***************************************************************************/
  90985. +int fm_port_del_rate_limit(struct fm_port *port);
  90986. +
  90987. +struct auto_res_tables_sizes
  90988. +{
  90989. + uint16_t max_num_of_arp_entries;
  90990. + uint16_t max_num_of_echo_ipv4_entries;
  90991. + uint16_t max_num_of_ndp_entries;
  90992. + uint16_t max_num_of_echo_ipv6_entries;
  90993. + uint16_t max_num_of_snmp_ipv4_entries;
  90994. + uint16_t max_num_of_snmp_ipv6_entries;
  90995. + uint16_t max_num_of_snmp_oid_entries;
  90996. + uint16_t max_num_of_snmp_char; /* total amount of character needed
  90997. + for the snmp table */
  90998. + uint16_t max_num_of_ip_prot_filtering;
  90999. + uint16_t max_num_of_tcp_port_filtering;
  91000. + uint16_t max_num_of_udp_port_filtering;
  91001. +};
  91002. +/* ARP */
  91003. +struct auto_res_arp_entry
  91004. +{
  91005. + uint32_t ip_address;
  91006. + uint8_t mac[6];
  91007. + bool is_vlan;
  91008. + uint16_t vid;
  91009. +};
  91010. +struct auto_res_arp_info
  91011. +{
  91012. + uint8_t table_size;
  91013. + struct auto_res_arp_entry *auto_res_table;
  91014. + bool enable_conflict_detection; /* when TRUE
  91015. + Conflict Detection will be checked and wake the host if
  91016. + needed */
  91017. +};
  91018. +
  91019. +/* NDP */
  91020. +struct auto_res_ndp_entry
  91021. +{
  91022. + uint32_t ip_address[4];
  91023. + uint8_t mac[6];
  91024. + bool is_vlan;
  91025. + uint16_t vid;
  91026. +};
  91027. +struct auto_res_ndp_info
  91028. +{
  91029. + uint32_t multicast_group;
  91030. + uint8_t table_size_assigned;
  91031. + struct auto_res_ndp_entry *auto_res_table_assigned; /* This list
  91032. + refer to solicitation IP addresses. Note that all IP adresses
  91033. + must be from the same multicast group. This will be checked and
  91034. + if not operation will fail. */
  91035. + uint8_t table_size_tmp;
  91036. + struct auto_res_ndp_entry *auto_res_table_tmp; /* This list
  91037. + refer to temp IP addresses. Note that all temp IP adresses must
  91038. + be from the same multicast group. This will be checked and if
  91039. + not operation will fail. */
  91040. +
  91041. + bool enable_conflict_detection; /* when TRUE
  91042. + Conflict Detection will be checked and wake the host if
  91043. + needed */
  91044. +};
  91045. +
  91046. +/* ICMP ECHO */
  91047. +struct auto_res_echo_ipv4_info
  91048. +{
  91049. + uint8_t table_size;
  91050. + struct auto_res_arp_entry *auto_res_table;
  91051. +};
  91052. +
  91053. +struct auto_res_echo_ipv6_info
  91054. +{
  91055. + uint8_t table_size;
  91056. + struct auto_res_ndp_entry *auto_res_table;
  91057. +};
  91058. +
  91059. +/* SNMP */
  91060. +struct auto_res_snmp_entry
  91061. +{
  91062. + uint16_t oidSize;
  91063. + uint8_t *oidVal; /* only the oid string */
  91064. + uint16_t resSize;
  91065. + uint8_t *resVal; /* resVal will be the entire reply,
  91066. + i.e. "Type|Length|Value" */
  91067. +};
  91068. +
  91069. +/**************************************************************************//**
  91070. + @Description Deep Sleep Auto Response SNMP IPv4 Addresses Table Entry
  91071. + Refer to the FMan Controller spec for more details.
  91072. +*//***************************************************************************/
  91073. +struct auto_res_snmp_ipv4addr_tbl_entry
  91074. +{
  91075. + uint32_t ipv4addr; /*!< 32 bit IPv4 Address. */
  91076. + bool is_vlan;
  91077. + uint16_t vid; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  91078. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  91079. +};
  91080. +
  91081. +/**************************************************************************//**
  91082. + @Description Deep Sleep Auto Response SNMP IPv6 Addresses Table Entry
  91083. + Refer to the FMan Controller spec for more details.
  91084. +*//***************************************************************************/
  91085. +struct auto_res_snmp_ipv6addr_tbl_entry
  91086. +{
  91087. + uint32_t ipv6Addr[4]; /*!< 4 * 32 bit IPv6 Address. */
  91088. + bool isVlan;
  91089. + uint16_t vid; /*!< 12 bits VLAN ID. The 4 left-most bits should be cleared */
  91090. + /*!< This field should be 0x0000 for an entry with no VLAN tag or a null VLAN ID. */
  91091. +};
  91092. +
  91093. +struct auto_res_snmp_info
  91094. +{
  91095. + uint16_t control; /**< Control bits [0-15]. */
  91096. + uint16_t max_snmp_msg_length; /**< Maximal allowed SNMP message length. */
  91097. + uint16_t num_ipv4_addresses; /**< Number of entries in IPv4 addresses table. */
  91098. + uint16_t num_ipv6_addresses; /**< Number of entries in IPv6 addresses table. */
  91099. + struct auto_res_snmp_ipv4addr_tbl_entry *ipv4addr_tbl; /**< Pointer to IPv4 addresses table. */
  91100. + struct auto_res_snmp_ipv6addr_tbl_entry *ipv6addr_tbl; /**< Pointer to IPv6 addresses table. */
  91101. + char *community_read_write_string;
  91102. + char *community_read_only_string;
  91103. + struct auto_res_snmp_entry *oid_table;
  91104. + uint32_t oid_table_size;
  91105. + uint32_t *statistics;
  91106. +};
  91107. +
  91108. +/* Filtering */
  91109. +struct auto_res_port_filtering_entry
  91110. +{
  91111. + uint16_t src_port;
  91112. + uint16_t dst_port;
  91113. + uint16_t src_port_mask;
  91114. + uint16_t dst_port_mask;
  91115. +};
  91116. +struct auto_res_filtering_info
  91117. +{
  91118. + /* IP protocol filtering parameters */
  91119. + uint8_t ip_prot_table_size;
  91120. + uint8_t *ip_prot_table_ptr;
  91121. + bool ip_prot_pass_on_hit; /* when TRUE, miss in the table will
  91122. + cause the packet to be droped, hit will pass the packet to
  91123. + UDP/TCP filters if needed and if not to the classification
  91124. + tree. If the classification tree will pass the packet to a
  91125. + queue it will cause a wake interupt. When FALSE it the other
  91126. + way around. */
  91127. + /* UDP port filtering parameters */
  91128. + uint8_t udp_ports_table_size;
  91129. + struct auto_res_port_filtering_entry *udp_ports_table_ptr;
  91130. + bool udp_port_pass_on_hit; /* when TRUE, miss in the table will
  91131. + cause the packet to be droped, hit will pass the packet to
  91132. + classification tree. If the classification tree will pass the
  91133. + packet to a queue it will cause a wake interupt. When FALSE it
  91134. + the other way around. */
  91135. + /* TCP port filtering parameters */
  91136. + uint16_t tcp_flags_mask;
  91137. + uint8_t tcp_ports_table_size;
  91138. + struct auto_res_port_filtering_entry *tcp_ports_table_ptr;
  91139. + bool tcp_port_pass_on_hit; /* when TRUE, miss in the table will
  91140. + cause the packet to be droped, hit will pass the packet to
  91141. + classification tree. If the classification tree will pass the
  91142. + packet to a queue it will cause a wake interupt. When FALSE it
  91143. + the other way around. */
  91144. +};
  91145. +
  91146. +struct auto_res_port_params
  91147. +{
  91148. + t_Handle h_FmPortTx;
  91149. + struct auto_res_arp_info *p_auto_res_arp_info;
  91150. + struct auto_res_echo_ipv4_info *p_auto_res_echo_ipv4_info;
  91151. + struct auto_res_ndp_info *p_auto_res_ndp_info;
  91152. + struct auto_res_echo_ipv6_info *p_auto_res_echo_ipv6_info;
  91153. + struct auto_res_snmp_info *p_auto_res_snmp_info;
  91154. + struct auto_res_filtering_info *p_auto_res_filtering_info;
  91155. +};
  91156. +
  91157. +struct auto_res_port_stats
  91158. +{
  91159. + uint32_t arp_ar_cnt;
  91160. + uint32_t echo_icmpv4_ar_cnt;
  91161. + uint32_t ndp_ar_cnt;
  91162. + uint32_t echo_icmpv6_ar_cnt;
  91163. +};
  91164. +
  91165. +int fm_port_config_autores_for_deepsleep_support(struct fm_port *port,
  91166. + struct auto_res_tables_sizes *params);
  91167. +
  91168. +int fm_port_enter_autores_for_deepsleep(struct fm_port *port,
  91169. + struct auto_res_port_params *params);
  91170. +
  91171. +void fm_port_exit_auto_res_for_deep_sleep(struct fm_port *port_rx,
  91172. + struct fm_port *port_tx);
  91173. +
  91174. +bool fm_port_is_in_auto_res_mode(struct fm_port *port);
  91175. +
  91176. +struct auto_res_tables_sizes *fm_port_get_autores_maxsize(
  91177. + struct fm_port *port);
  91178. +
  91179. +int fm_port_get_autores_stats(struct fm_port *port, struct auto_res_port_stats
  91180. + *stats);
  91181. +
  91182. +int fm_port_resume(struct fm_port *port);
  91183. +
  91184. +int fm_port_suspend(struct fm_port *port);
  91185. +
  91186. +#ifdef CONFIG_FMAN_PFC
  91187. +/**************************************************************************//**
  91188. +@Function fm_port_set_pfc_priorities_mapping_to_qman_wq
  91189. +
  91190. +@Description Associate a QMan Work Queue with a PFC priority on this
  91191. + FM-port device (Tx port).
  91192. +
  91193. +@Param[in] port - A handle of the FM port device.
  91194. +
  91195. +@Param[in] prio - The PFC priority.
  91196. +
  91197. +@Param[in] wq - The Work Queue associated with the PFC priority.
  91198. +
  91199. +@Cautions Allowed only after the port is initialized.
  91200. +*//***************************************************************************/
  91201. +int fm_port_set_pfc_priorities_mapping_to_qman_wq(struct fm_port *port,
  91202. + uint8_t prio, uint8_t wq);
  91203. +#endif
  91204. +
  91205. +/**************************************************************************//**
  91206. +@Function fm_mac_set_exception
  91207. +
  91208. +@Description Set MAC exception state.
  91209. +
  91210. +@Param[in] fm_mac_dev - A handle of the FM MAC device.
  91211. +@Param[in] exception - FM MAC exception type.
  91212. +@Param[in] enable - new state.
  91213. +
  91214. +*//***************************************************************************/
  91215. +int fm_mac_set_exception(struct fm_mac_dev *fm_mac_dev,
  91216. + e_FmMacExceptions exception, bool enable);
  91217. +
  91218. +int fm_mac_free(struct fm_mac_dev *fm_mac_dev);
  91219. +
  91220. +struct fm_mac_dev *fm_mac_config(t_FmMacParams *params);
  91221. +
  91222. +int fm_mac_config_max_frame_length(struct fm_mac_dev *fm_mac_dev,
  91223. + int len);
  91224. +
  91225. +int fm_mac_config_pad_and_crc(struct fm_mac_dev *fm_mac_dev, bool enable);
  91226. +
  91227. +int fm_mac_config_half_duplex(struct fm_mac_dev *fm_mac_dev, bool enable);
  91228. +
  91229. +int fm_mac_config_reset_on_init(struct fm_mac_dev *fm_mac_dev, bool enable);
  91230. +
  91231. +int fm_mac_init(struct fm_mac_dev *fm_mac_dev);
  91232. +
  91233. +int fm_mac_get_version(struct fm_mac_dev *fm_mac_dev, uint32_t *version);
  91234. +
  91235. +int fm_mac_enable(struct fm_mac_dev *fm_mac_dev);
  91236. +
  91237. +int fm_mac_disable(struct fm_mac_dev *fm_mac_dev);
  91238. +
  91239. +int fm_mac_set_promiscuous(struct fm_mac_dev *fm_mac_dev,
  91240. + bool enable);
  91241. +
  91242. +int fm_mac_remove_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
  91243. + t_EnetAddr *mac_addr);
  91244. +
  91245. +int fm_mac_add_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
  91246. + t_EnetAddr *mac_addr);
  91247. +
  91248. +int fm_mac_modify_mac_addr(struct fm_mac_dev *fm_mac_dev,
  91249. + uint8_t *addr);
  91250. +
  91251. +int fm_mac_adjust_link(struct fm_mac_dev *fm_mac_dev,
  91252. + bool link, int speed, bool duplex);
  91253. +
  91254. +int fm_mac_enable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev);
  91255. +
  91256. +int fm_mac_disable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev);
  91257. +
  91258. +int fm_mac_set_rx_pause_frames(
  91259. + struct fm_mac_dev *fm_mac_dev, bool en);
  91260. +
  91261. +int fm_mac_set_tx_pause_frames(struct fm_mac_dev *fm_mac_dev,
  91262. + bool en);
  91263. +
  91264. +int fm_rtc_enable(struct fm *fm_dev);
  91265. +
  91266. +int fm_rtc_disable(struct fm *fm_dev);
  91267. +
  91268. +int fm_rtc_get_cnt(struct fm *fm_dev, uint64_t *ts);
  91269. +
  91270. +int fm_rtc_set_cnt(struct fm *fm_dev, uint64_t ts);
  91271. +
  91272. +int fm_rtc_get_drift(struct fm *fm_dev, uint32_t *drift);
  91273. +
  91274. +int fm_rtc_set_drift(struct fm *fm_dev, uint32_t drift);
  91275. +
  91276. +int fm_rtc_set_alarm(struct fm *fm_dev, uint32_t id,
  91277. + uint64_t time);
  91278. +
  91279. +int fm_rtc_set_fiper(struct fm *fm_dev, uint32_t id,
  91280. + uint64_t fiper);
  91281. +
  91282. +int fm_mac_set_wol(struct fm_port *port, struct fm_mac_dev *fm_mac_dev,
  91283. + bool en);
  91284. +
  91285. +/**************************************************************************//**
  91286. +@Function fm_macsec_set_exception
  91287. +
  91288. +@Description Set MACSEC exception state.
  91289. +
  91290. +@Param[in] fm_macsec_dev - A handle of the FM MACSEC device.
  91291. +@Param[in] exception - FM MACSEC exception type.
  91292. +@Param[in] enable - new state.
  91293. +
  91294. +*//***************************************************************************/
  91295. +
  91296. +int fm_macsec_set_exception(struct fm_macsec_dev *fm_macsec_dev,
  91297. + fm_macsec_exception exception, bool enable);
  91298. +int fm_macsec_free(struct fm_macsec_dev *fm_macsec_dev);
  91299. +struct fm_macsec_dev *fm_macsec_config(struct fm_macsec_params *fm_params);
  91300. +int fm_macsec_init(struct fm_macsec_dev *fm_macsec_dev);
  91301. +int fm_macsec_config_unknown_sci_frame_treatment(struct fm_macsec_dev
  91302. + *fm_macsec_dev,
  91303. + fm_macsec_unknown_sci_frame_treatment treat_mode);
  91304. +int fm_macsec_config_invalid_tags_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
  91305. + bool deliver_uncontrolled);
  91306. +int fm_macsec_config_kay_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
  91307. + bool discard_uncontrolled);
  91308. +int fm_macsec_config_untag_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
  91309. + fm_macsec_untag_frame_treatment treat_mode);
  91310. +int fm_macsec_config_pn_exhaustion_threshold(struct fm_macsec_dev *fm_macsec_dev,
  91311. + uint32_t pnExhThr);
  91312. +int fm_macsec_config_keys_unreadable(struct fm_macsec_dev *fm_macsec_dev);
  91313. +int fm_macsec_config_sectag_without_sci(struct fm_macsec_dev *fm_macsec_dev);
  91314. +int fm_macsec_config_exception(struct fm_macsec_dev *fm_macsec_dev,
  91315. + fm_macsec_exception exception, bool enable);
  91316. +int fm_macsec_get_revision(struct fm_macsec_dev *fm_macsec_dev,
  91317. + int *macsec_revision);
  91318. +int fm_macsec_enable(struct fm_macsec_dev *fm_macsec_dev);
  91319. +int fm_macsec_disable(struct fm_macsec_dev *fm_macsec_dev);
  91320. +
  91321. +
  91322. +int fm_macsec_secy_config_exception(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91323. + fm_macsec_secy_exception exception,
  91324. + bool enable);
  91325. +int fm_macsec_secy_free(struct fm_macsec_secy_dev *fm_macsec_secy_dev);
  91326. +struct fm_macsec_secy_dev *fm_macsec_secy_config(struct fm_macsec_secy_params *secy_params);
  91327. +int fm_macsec_secy_init(struct fm_macsec_secy_dev *fm_macsec_secy_dev);
  91328. +int fm_macsec_secy_config_sci_insertion_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91329. + fm_macsec_sci_insertion_mode sci_insertion_mode);
  91330. +int fm_macsec_secy_config_protect_frames(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91331. + bool protect_frames);
  91332. +int fm_macsec_secy_config_replay_window(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91333. + bool replay_protect, uint32_t replay_window);
  91334. +int fm_macsec_secy_config_validation_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91335. + fm_macsec_valid_frame_behavior validate_frames);
  91336. +int fm_macsec_secy_config_confidentiality(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91337. + bool confidentiality_enable,
  91338. + uint32_t confidentiality_offset);
  91339. +int fm_macsec_secy_config_point_to_point(struct fm_macsec_secy_dev *fm_macsec_secy_dev);
  91340. +int fm_macsec_secy_config_event(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91341. + fm_macsec_secy_event event,
  91342. + bool enable);
  91343. +struct rx_sc_dev *fm_macsec_secy_create_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91344. + struct fm_macsec_secy_sc_params *params);
  91345. +int fm_macsec_secy_delete_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91346. + struct rx_sc_dev *sc);
  91347. +int fm_macsec_secy_create_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91348. + struct rx_sc_dev *sc, macsec_an_t an,
  91349. + uint32_t lowest_pn, macsec_sa_key_t key);
  91350. +int fm_macsec_secy_delete_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91351. + struct rx_sc_dev *sc, macsec_an_t an);
  91352. +int fm_macsec_secy_rxsa_enable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91353. + struct rx_sc_dev *sc,
  91354. + macsec_an_t an);
  91355. +int fm_macsec_secy_rxsa_disable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91356. + struct rx_sc_dev *sc,
  91357. + macsec_an_t an);
  91358. +int fm_macsec_secy_rxsa_update_next_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91359. + struct rx_sc_dev *sc,
  91360. + macsec_an_t an, uint32_t updt_next_pn);
  91361. +int fm_macsec_secy_rxsa_update_lowest_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91362. + struct rx_sc_dev *sc,
  91363. + macsec_an_t an, uint32_t updt_lowest_pn);
  91364. +int fm_macsec_secy_rxsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91365. + struct rx_sc_dev *sc,
  91366. + macsec_an_t an, macsec_sa_key_t key);
  91367. +int fm_macsec_secy_create_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91368. + macsec_an_t an, macsec_sa_key_t key);
  91369. +int fm_macsec_secy_delete_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91370. + macsec_an_t an);
  91371. +int fm_macsec_secy_txsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91372. + macsec_an_t next_active_an,
  91373. + macsec_sa_key_t key);
  91374. +int fm_macsec_secy_txsa_set_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91375. + macsec_an_t an);
  91376. +int fm_macsec_secy_txsa_get_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91377. + macsec_an_t *p_an);
  91378. +int fm_macsec_secy_get_rxsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91379. + struct rx_sc_dev *sc, uint32_t *sc_phys_id);
  91380. +int fm_macsec_secy_get_txsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  91381. + uint32_t *sc_phys_id);
  91382. +
  91383. +/** @} */ /* end of FM_LnxKern_ctrl_grp group */
  91384. +/** @} */ /* end of FM_LnxKern_grp group */
  91385. +
  91386. +/* default values for initializing PTP 1588 timer clock */
  91387. +#define DPA_PTP_NOMINAL_FREQ_PERIOD_SHIFT 2 /* power of 2 for better performance */
  91388. +#define DPA_PTP_NOMINAL_FREQ_PERIOD_NS (1 << DPA_PTP_NOMINAL_FREQ_PERIOD_SHIFT) /* 4ns,250MHz */
  91389. +
  91390. +#endif /* __LNXWRP_FSL_FMAN_H */
  91391. --- /dev/null
  91392. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/xx/xx.h
  91393. @@ -0,0 +1,50 @@
  91394. +/*
  91395. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  91396. + *
  91397. + * Redistribution and use in source and binary forms, with or without
  91398. + * modification, are permitted provided that the following conditions are met:
  91399. + * * Redistributions of source code must retain the above copyright
  91400. + * notice, this list of conditions and the following disclaimer.
  91401. + * * Redistributions in binary form must reproduce the above copyright
  91402. + * notice, this list of conditions and the following disclaimer in the
  91403. + * documentation and/or other materials provided with the distribution.
  91404. + * * Neither the name of Freescale Semiconductor nor the
  91405. + * names of its contributors may be used to endorse or promote products
  91406. + * derived from this software without specific prior written permission.
  91407. + *
  91408. + *
  91409. + * ALTERNATIVELY, this software may be distributed under the terms of the
  91410. + * GNU General Public License ("GPL") as published by the Free Software
  91411. + * Foundation, either version 2 of that License or (at your option) any
  91412. + * later version.
  91413. + *
  91414. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  91415. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  91416. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  91417. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  91418. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  91419. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  91420. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  91421. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  91422. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  91423. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  91424. + */
  91425. +
  91426. +#ifndef __XX_H
  91427. +#define __XX_H
  91428. +
  91429. +#include "xx_ext.h"
  91430. +
  91431. +void * xx_Malloc(uint32_t n);
  91432. +void xx_Free(void *p);
  91433. +
  91434. +void *xx_MallocSmart(uint32_t size, int memPartitionId, uint32_t align);
  91435. +void xx_FreeSmart(void *p);
  91436. +
  91437. +/* never used: */
  91438. +#define GetDeviceName(irq) ((char *)NULL)
  91439. +
  91440. +int GetDeviceIrqNum(int irq);
  91441. +
  91442. +
  91443. +#endif /* __XX_H */
  91444. --- /dev/null
  91445. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/system/Makefile
  91446. @@ -0,0 +1,10 @@
  91447. +#
  91448. +# Makefile for the Freescale Ethernet controllers
  91449. +#
  91450. +ccflags-y += -DVERSION=\"\"
  91451. +#
  91452. +#Include netcomm SW specific definitions
  91453. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  91454. +#
  91455. +
  91456. +obj-y += sys_io.o
  91457. --- /dev/null
  91458. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/system/sys_io.c
  91459. @@ -0,0 +1,171 @@
  91460. +/*
  91461. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  91462. + *
  91463. + * Redistribution and use in source and binary forms, with or without
  91464. + * modification, are permitted provided that the following conditions are met:
  91465. + * * Redistributions of source code must retain the above copyright
  91466. + * notice, this list of conditions and the following disclaimer.
  91467. + * * Redistributions in binary form must reproduce the above copyright
  91468. + * notice, this list of conditions and the following disclaimer in the
  91469. + * documentation and/or other materials provided with the distribution.
  91470. + * * Neither the name of Freescale Semiconductor nor the
  91471. + * names of its contributors may be used to endorse or promote products
  91472. + * derived from this software without specific prior written permission.
  91473. + *
  91474. + *
  91475. + * ALTERNATIVELY, this software may be distributed under the terms of the
  91476. + * GNU General Public License ("GPL") as published by the Free Software
  91477. + * Foundation, either version 2 of that License or (at your option) any
  91478. + * later version.
  91479. + *
  91480. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  91481. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  91482. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  91483. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  91484. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  91485. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  91486. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  91487. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  91488. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  91489. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  91490. + */
  91491. +
  91492. +#include <linux/version.h>
  91493. +
  91494. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  91495. +#define MODVERSIONS
  91496. +#endif
  91497. +#ifdef MODVERSIONS
  91498. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
  91499. +#include <linux/modversions.h>
  91500. +#else
  91501. +#include <config/modversions.h>
  91502. +#endif /* LINUX_VERSION_CODE */
  91503. +#endif /* MODVERSIONS */
  91504. +
  91505. +#include <linux/module.h>
  91506. +#include <linux/kernel.h>
  91507. +
  91508. +#include <asm/io.h>
  91509. +
  91510. +#include "std_ext.h"
  91511. +#include "error_ext.h"
  91512. +#include "string_ext.h"
  91513. +#include "list_ext.h"
  91514. +#include "sys_io_ext.h"
  91515. +
  91516. +
  91517. +#define __ERR_MODULE__ MODULE_UNKNOWN
  91518. +
  91519. +
  91520. +typedef struct {
  91521. + uint64_t virtAddr;
  91522. + uint64_t physAddr;
  91523. + uint32_t size;
  91524. + t_List node;
  91525. +} t_IoMap;
  91526. +#define IOMAP_OBJECT(ptr) LIST_OBJECT(ptr, t_IoMap, node)
  91527. +
  91528. +LIST(mapsList);
  91529. +
  91530. +
  91531. +static void EnqueueIoMap(t_IoMap *p_IoMap)
  91532. +{
  91533. + uint32_t intFlags;
  91534. +
  91535. + intFlags = XX_DisableAllIntr();
  91536. + LIST_AddToTail(&p_IoMap->node, &mapsList);
  91537. + XX_RestoreAllIntr(intFlags);
  91538. +}
  91539. +
  91540. +static t_IoMap * FindIoMapByVirtAddr(uint64_t addr)
  91541. +{
  91542. + t_IoMap *p_IoMap;
  91543. + t_List *p_Pos;
  91544. +
  91545. + LIST_FOR_EACH(p_Pos, &mapsList)
  91546. + {
  91547. + p_IoMap = IOMAP_OBJECT(p_Pos);
  91548. + if ((addr >= p_IoMap->virtAddr) && (addr < p_IoMap->virtAddr+p_IoMap->size))
  91549. + return p_IoMap;
  91550. + }
  91551. +
  91552. + return NULL;
  91553. +}
  91554. +
  91555. +static t_IoMap * FindIoMapByPhysAddr(uint64_t addr)
  91556. +{
  91557. + t_IoMap *p_IoMap;
  91558. + t_List *p_Pos;
  91559. +
  91560. + LIST_FOR_EACH(p_Pos, &mapsList)
  91561. + {
  91562. + p_IoMap = IOMAP_OBJECT(p_Pos);
  91563. + if ((addr >= p_IoMap->physAddr) && (addr < p_IoMap->physAddr+p_IoMap->size))
  91564. + return p_IoMap;
  91565. + }
  91566. +
  91567. + return NULL;
  91568. +}
  91569. +
  91570. +t_Error SYS_RegisterIoMap (uint64_t virtAddr, uint64_t physAddr, uint32_t size)
  91571. +{
  91572. + t_IoMap *p_IoMap;
  91573. +
  91574. + p_IoMap = (t_IoMap*)XX_Malloc(sizeof(t_IoMap));
  91575. + if (!p_IoMap)
  91576. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("message handler object!!!"));
  91577. + memset(p_IoMap, 0, sizeof(t_IoMap));
  91578. +
  91579. + p_IoMap->virtAddr = virtAddr;
  91580. + p_IoMap->physAddr = physAddr;
  91581. + p_IoMap->size = size;
  91582. +
  91583. + INIT_LIST(&p_IoMap->node);
  91584. + EnqueueIoMap(p_IoMap);
  91585. +
  91586. + return E_OK;
  91587. +}
  91588. +
  91589. +t_Error SYS_UnregisterIoMap (uint64_t virtAddr)
  91590. +{
  91591. + t_IoMap *p_IoMap = FindIoMapByVirtAddr(virtAddr);
  91592. + if (!p_IoMap)
  91593. + RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
  91594. +
  91595. + LIST_Del(&p_IoMap->node);
  91596. + XX_Free(p_IoMap);
  91597. +
  91598. + return E_OK;
  91599. +}
  91600. +
  91601. +uint64_t SYS_PhysToVirt(uint64_t addr)
  91602. +{
  91603. + t_IoMap *p_IoMap = FindIoMapByPhysAddr(addr);
  91604. + if (p_IoMap)
  91605. + {
  91606. + /* This is optimization - put the latest in the list-head - like a cache */
  91607. + if (mapsList.p_Next != &p_IoMap->node)
  91608. + {
  91609. + uint32_t intFlags = XX_DisableAllIntr();
  91610. + LIST_DelAndInit(&p_IoMap->node);
  91611. + LIST_Add(&p_IoMap->node, &mapsList);
  91612. + XX_RestoreAllIntr(intFlags);
  91613. + }
  91614. + return (uint64_t)(addr - p_IoMap->physAddr + p_IoMap->virtAddr);
  91615. + }
  91616. + return PTR_TO_UINT(phys_to_virt((unsigned long)addr));
  91617. +}
  91618. +
  91619. +uint64_t SYS_VirtToPhys(uint64_t addr)
  91620. +{
  91621. + t_IoMap *p_IoMap;
  91622. +
  91623. + if (addr == 0)
  91624. + return 0;
  91625. +
  91626. + p_IoMap = FindIoMapByVirtAddr(addr);
  91627. + if (p_IoMap)
  91628. + return (uint64_t)(addr - p_IoMap->virtAddr + p_IoMap->physAddr);
  91629. + return (uint64_t)virt_to_phys(UINT_TO_PTR(addr));
  91630. +}
  91631. --- /dev/null
  91632. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/Makefile
  91633. @@ -0,0 +1,19 @@
  91634. +#
  91635. +# Makefile for the Freescale Ethernet controllers
  91636. +#
  91637. +ccflags-y += -DVERSION=\"\"
  91638. +#
  91639. +#Include netcomm SW specific definitions
  91640. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  91641. +
  91642. +NCSW_FM_INC = $(srctree)/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/inc
  91643. +
  91644. +ccflags-y += -I$(NCSW_FM_INC)
  91645. +ccflags-y += -I$(NET_DPA)
  91646. +
  91647. +obj-y += fsl-ncsw-PFM.o
  91648. +obj-$(CONFIG_FSL_SDK_FMAN_TEST) += fman_test.o
  91649. +
  91650. +fsl-ncsw-PFM-objs := lnxwrp_fm.o lnxwrp_fm_port.o lnxwrp_ioctls_fm.o \
  91651. + lnxwrp_sysfs.o lnxwrp_sysfs_fm.o lnxwrp_sysfs_fm_port.o
  91652. +obj-$(CONFIG_COMPAT) += lnxwrp_ioctls_fm_compat.o
  91653. --- /dev/null
  91654. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/fman_test.c
  91655. @@ -0,0 +1,1665 @@
  91656. +/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
  91657. + * All rights reserved.
  91658. + *
  91659. + * Redistribution and use in source and binary forms, with or without
  91660. + * modification, are permitted provided that the following conditions are met:
  91661. + * * Redistributions of source code must retain the above copyright
  91662. + * notice, this list of conditions and the following disclaimer.
  91663. + * * Redistributions in binary form must reproduce the above copyright
  91664. + * notice, this list of conditions and the following disclaimer in the
  91665. + * documentation and/or other materials provided with the distribution.
  91666. + * * Neither the name of Freescale Semiconductor nor the
  91667. + * names of its contributors may be used to endorse or promote products
  91668. + * derived from this software without specific prior written permission.
  91669. + *
  91670. + *
  91671. + * ALTERNATIVELY, this software may be distributed under the terms of the
  91672. + * GNU General Public License ("GPL") as published by the Free Software
  91673. + * Foundation, either version 2 of that License or (at your option) any
  91674. + * later version.
  91675. + *
  91676. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  91677. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  91678. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  91679. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  91680. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  91681. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  91682. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  91683. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  91684. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  91685. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  91686. + */
  91687. +
  91688. +/*
  91689. + @File fman_test.c
  91690. + @Authors Pistirica Sorin Andrei
  91691. + @Description FM Linux test environment
  91692. +*/
  91693. +
  91694. +#include <linux/kernel.h>
  91695. +#include <linux/module.h>
  91696. +#include <linux/fs.h>
  91697. +#include <linux/cdev.h>
  91698. +#include <linux/device.h>
  91699. +#include <linux/io.h>
  91700. +#include <linux/ioport.h>
  91701. +#include <linux/of_platform.h>
  91702. +#include <linux/ip.h>
  91703. +#include <linux/compat.h>
  91704. +#include <linux/uaccess.h>
  91705. +#include <linux/errno.h>
  91706. +#include <linux/netdevice.h>
  91707. +#include <linux/spinlock.h>
  91708. +#include <linux/types.h>
  91709. +#include <linux/fsl_qman.h>
  91710. +#include <linux/fsl_bman.h>
  91711. +
  91712. +/* private headers */
  91713. +#include "fm_ext.h"
  91714. +#include "lnxwrp_fsl_fman.h"
  91715. +#include "fm_port_ext.h"
  91716. +#if (DPAA_VERSION == 11)
  91717. +#include "../../Peripherals/FM/MAC/memac.h"
  91718. +#endif
  91719. +#include "fm_test_ioctls.h"
  91720. +#include "fsl_fman_test.h"
  91721. +
  91722. +#include "dpaa_eth.h"
  91723. +#include "dpaa_eth_common.h"
  91724. +
  91725. +#define FMT_FRM_WATERMARK 0xdeadbeefdeadbeeaLL
  91726. +
  91727. +struct fmt_frame_s {
  91728. + ioc_fmt_buff_desc_t buff;
  91729. + struct list_head list;
  91730. +};
  91731. +
  91732. +struct fmt_fqs_s {
  91733. + struct qman_fq fq_base;
  91734. + bool init;
  91735. + struct fmt_port_s *fmt_port_priv;
  91736. +};
  91737. +
  91738. +struct fmt_port_pcd_s {
  91739. + int num_queues;
  91740. + struct fmt_fqs_s *fmt_pcd_fqs;
  91741. + uint32_t fqid_base;
  91742. +};
  91743. +
  91744. +/* char dev structure: fm test port */
  91745. +struct fmt_port_s {
  91746. + bool valid;
  91747. + uint8_t id;
  91748. + ioc_fmt_port_type port_type;
  91749. + ioc_diag_mode diag;
  91750. + bool compat_test_type;
  91751. +
  91752. + /* fm ports */
  91753. + /* ! for oh ports p_tx_fm_port_dev == p_rx_fm_port_dev &&
  91754. + * p_tx_port == p_rx_port */
  91755. + /* t_LnxWrpFmPortDev */
  91756. + struct fm_port *p_tx_port;
  91757. + /* t_LnxWrpFmPortDev->h_Dev: t_FmPort */
  91758. + void *p_tx_fm_port_dev;
  91759. + /* t_LnxWrpFmPortDev */
  91760. + struct fm_port *p_rx_port;
  91761. + /* t_LnxWrpFmPortDev->h_Dev: t_FmPort */
  91762. + void *p_rx_fm_port_dev;
  91763. +
  91764. + void *p_mac_dev;
  91765. + uint64_t fm_phys_base_addr;
  91766. +
  91767. + /* read/write queue manipulation */
  91768. + spinlock_t rx_q_lock;
  91769. + struct list_head rx_q;
  91770. +
  91771. + /* tx queuee for injecting traffic */
  91772. + int num_of_tx_fqs;
  91773. + struct fmt_fqs_s p_tx_fqs[FMAN_TEST_MAX_TX_FQS];
  91774. +
  91775. + /* pcd private queues manipulation */
  91776. + struct fmt_port_pcd_s fmt_port_pcd;
  91777. +
  91778. + /* debugging stuff */
  91779. +
  91780. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  91781. + atomic_t enqueue_to_qman_frm;
  91782. + atomic_t enqueue_to_rxq;
  91783. + atomic_t dequeue_from_rxq;
  91784. + atomic_t not_enqueue_to_rxq_wrong_frm;
  91785. +#endif
  91786. +
  91787. +};
  91788. +
  91789. +/* The devices. */
  91790. +struct fmt_s {
  91791. + int major;
  91792. + struct fmt_port_s ports[IOC_FMT_MAX_NUM_OF_PORTS];
  91793. + struct class *fmt_class;
  91794. +};
  91795. +
  91796. +/* fm test structure */
  91797. +static struct fmt_s fm_test;
  91798. +
  91799. +#if (DPAA_VERSION == 11)
  91800. +struct mac_priv_s {
  91801. + t_Handle mac;
  91802. +};
  91803. +#endif
  91804. +
  91805. +#define DTSEC_BASE_ADDR 0x000e0000
  91806. +#define DTSEC_MEM_RANGE 0x00002000
  91807. +#define MAC_1G_MACCFG1 0x00000100
  91808. +#define MAC_1G_LOOP_MASK 0x00000100
  91809. +static int set_1gmac_loopback(
  91810. + struct fmt_port_s *fmt_port,
  91811. + bool en)
  91812. +{
  91813. +#if (DPAA_VERSION <= 10)
  91814. + uint32_t dtsec_idx = fmt_port->id; /* dtsec for which port */
  91815. + uint32_t dtsec_idx_off = dtsec_idx * DTSEC_MEM_RANGE;
  91816. + phys_addr_t maccfg1_hw;
  91817. + void *maccfg1_map;
  91818. + uint32_t maccfg1_val;
  91819. +
  91820. + /* compute the maccfg1 register address */
  91821. + maccfg1_hw = fmt_port->fm_phys_base_addr +
  91822. + (phys_addr_t)(DTSEC_BASE_ADDR +
  91823. + dtsec_idx_off +
  91824. + MAC_1G_MACCFG1);
  91825. +
  91826. + /* map register */
  91827. + maccfg1_map = ioremap(maccfg1_hw, sizeof(u32));
  91828. +
  91829. + /* set register */
  91830. + maccfg1_val = in_be32(maccfg1_map);
  91831. + if (en)
  91832. + maccfg1_val |= MAC_1G_LOOP_MASK;
  91833. + else
  91834. + maccfg1_val &= ~MAC_1G_LOOP_MASK;
  91835. + out_be32(maccfg1_map, maccfg1_val);
  91836. +
  91837. + /* unmap register */
  91838. + iounmap(maccfg1_map);
  91839. +#else
  91840. + struct mac_device *mac_dev;
  91841. + struct mac_priv_s *priv;
  91842. + t_Memac *p_memac;
  91843. +
  91844. + if (!fmt_port)
  91845. + return -EINVAL;
  91846. +
  91847. + mac_dev = (struct mac_device *)fmt_port->p_mac_dev;
  91848. +
  91849. + if (!mac_dev)
  91850. + return -EINVAL;
  91851. +
  91852. + priv = macdev_priv(mac_dev);
  91853. +
  91854. + if (!priv)
  91855. + return -EINVAL;
  91856. +
  91857. + p_memac = priv->mac;
  91858. +
  91859. + if (!p_memac)
  91860. + return -EINVAL;
  91861. +
  91862. + memac_set_loopback(p_memac->p_MemMap, en);
  91863. +#endif
  91864. + return 0;
  91865. +}
  91866. +
  91867. +/* TODO: re-write this function */
  91868. +static int set_10gmac_int_loopback(
  91869. + struct fmt_port_s *fmt_port,
  91870. + bool en)
  91871. +{
  91872. +#ifndef FM_10G_MAC_NO_CTRL_LOOPBACK
  91873. +#define FM_10GMAC0_OFFSET 0x000f0000
  91874. +#define FM_10GMAC_CMD_CONF_CTRL_OFFSET 0x8
  91875. +#define CMD_CFG_LOOPBACK_EN 0x00000400
  91876. +
  91877. + uint64_t base_addr, reg_addr;
  91878. + uint32_t tmp_val;
  91879. +
  91880. + base_addr = fmt_port->fm_phys_base_addr + (FM_10GMAC0_OFFSET +
  91881. + ((fmt_port->id-FM_MAX_NUM_OF_1G_RX_PORTS)*0x2000));
  91882. +
  91883. + base_addr = PTR_TO_UINT(ioremap(base_addr, 0x1000));
  91884. +
  91885. + reg_addr = base_addr + FM_10GMAC_CMD_CONF_CTRL_OFFSET;
  91886. + tmp_val = GET_UINT32(*((uint32_t *)UINT_TO_PTR(reg_addr)));
  91887. + if (en)
  91888. + tmp_val |= CMD_CFG_LOOPBACK_EN;
  91889. + else
  91890. + tmp_val &= ~CMD_CFG_LOOPBACK_EN;
  91891. + WRITE_UINT32(*((uint32_t *)UINT_TO_PTR(reg_addr)), tmp_val);
  91892. +
  91893. + iounmap(UINT_TO_PTR(base_addr));
  91894. +
  91895. + return 0;
  91896. +#else
  91897. + _fmt_err("TGEC don't have internal-loopback.\n");
  91898. + return -EPERM;
  91899. +#endif
  91900. +}
  91901. +
  91902. +static int set_mac_int_loopback(struct fmt_port_s *fmt_port, bool en)
  91903. +{
  91904. + int _err = 0;
  91905. +
  91906. + switch (fmt_port->port_type) {
  91907. +
  91908. + case e_IOC_FMT_PORT_T_RXTX:
  91909. + /* 1G port */
  91910. + if (fmt_port->id < FM_MAX_NUM_OF_1G_RX_PORTS)
  91911. + _err = set_1gmac_loopback(fmt_port, en);
  91912. + /* 10g port */
  91913. + else if ((fmt_port->id >= FM_MAX_NUM_OF_1G_RX_PORTS) &&
  91914. + (fmt_port->id < FM_MAX_NUM_OF_1G_RX_PORTS +
  91915. + FM_MAX_NUM_OF_10G_RX_PORTS)) {
  91916. +
  91917. + _err = set_10gmac_int_loopback(fmt_port, en);
  91918. + } else
  91919. + _err = -EINVAL;
  91920. + break;
  91921. + /* op port does not have MAC (loopback mode) */
  91922. + case e_IOC_FMT_PORT_T_OP:
  91923. +
  91924. + _err = 0;
  91925. + break;
  91926. + default:
  91927. +
  91928. + _err = -EPERM;
  91929. + break;
  91930. + }
  91931. +
  91932. + return _err;
  91933. +}
  91934. +
  91935. +static void enqueue_fmt_frame(
  91936. + struct fmt_port_s *fmt_port,
  91937. + struct fmt_frame_s *p_fmt_frame)
  91938. +{
  91939. + spinlock_t *rx_q_lock = NULL;
  91940. +
  91941. + rx_q_lock = &fmt_port->rx_q_lock;
  91942. +
  91943. + spin_lock(rx_q_lock);
  91944. + list_add_tail(&p_fmt_frame->list, &fmt_port->rx_q);
  91945. + spin_unlock(rx_q_lock);
  91946. +
  91947. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  91948. + atomic_inc(&fmt_port->enqueue_to_rxq);
  91949. +#endif
  91950. +}
  91951. +
  91952. +static struct fmt_frame_s *dequeue_fmt_frame(
  91953. + struct fmt_port_s *fmt_port)
  91954. +{
  91955. + struct fmt_frame_s *p_fmt_frame = NULL;
  91956. + spinlock_t *rx_q_lock = NULL;
  91957. +
  91958. + rx_q_lock = &fmt_port->rx_q_lock;
  91959. +
  91960. + spin_lock(rx_q_lock);
  91961. +
  91962. +#define list_last_entry(ptr, type, member) list_entry((ptr)->prev, type, member)
  91963. +
  91964. + if (!list_empty(&fmt_port->rx_q)) {
  91965. + p_fmt_frame = list_last_entry(&fmt_port->rx_q,
  91966. + struct fmt_frame_s,
  91967. + list);
  91968. + list_del(&p_fmt_frame->list);
  91969. +
  91970. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  91971. + atomic_inc(&fmt_port->dequeue_from_rxq);
  91972. +#endif
  91973. + }
  91974. +
  91975. + spin_unlock(rx_q_lock);
  91976. +
  91977. + return p_fmt_frame;
  91978. +}
  91979. +
  91980. +/* eth-dev -to- fmt port association */
  91981. +struct fmt_port_s *match_dpa_to_fmt_port(
  91982. + struct dpa_priv_s *dpa_priv) {
  91983. + struct mac_device *mac_dev = dpa_priv->mac_dev;
  91984. + struct fm_port *fm_port = (struct fm_port *) mac_dev;
  91985. + struct fmt_port_s *fmt_port = NULL;
  91986. + int i;
  91987. +
  91988. + _fmt_dbgr("calling...\n");
  91989. +
  91990. + /* find the FM-test-port object */
  91991. + for (i = 0; i < IOC_FMT_MAX_NUM_OF_PORTS; i++)
  91992. + if ((fm_test.ports[i].p_mac_dev &&
  91993. + mac_dev == fm_test.ports[i].p_mac_dev) ||
  91994. + fm_port == fm_test.ports[i].p_tx_port) {
  91995. +
  91996. + fmt_port = &fm_test.ports[i];
  91997. + break;
  91998. + }
  91999. +
  92000. + _fmt_dbgr("called\n");
  92001. + return fmt_port;
  92002. +}
  92003. +
  92004. +void dump_frame(
  92005. + uint8_t *buffer,
  92006. + uint32_t size)
  92007. +{
  92008. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  92009. + unsigned int i;
  92010. +
  92011. + for (i = 0; i < size; i++) {
  92012. + if (i%16 == 0)
  92013. + printk(KERN_DEBUG "\n");
  92014. + printk(KERN_DEBUG "%2x ", *(buffer+i));
  92015. + }
  92016. +#endif
  92017. + return;
  92018. +}
  92019. +
  92020. +bool test_and_steal_frame(struct fmt_port_s *fmt_port,
  92021. + uint32_t fqid,
  92022. + uint8_t *buffer,
  92023. + uint32_t size)
  92024. +{
  92025. + struct fmt_frame_s *p_fmt_frame = NULL;
  92026. + bool test_and_steal_frame_frame;
  92027. + uint32_t data_offset;
  92028. + uint32_t i;
  92029. +
  92030. + _fmt_dbgr("calling...\n");
  92031. +
  92032. + if (!fmt_port || !fmt_port->p_rx_fm_port_dev)
  92033. + return false;
  92034. +
  92035. + /* check watermark */
  92036. + test_and_steal_frame_frame = false;
  92037. + for (i = 0; i < size; i++) {
  92038. + uint64_t temp = *((uint64_t *)(buffer + i));
  92039. +
  92040. + if (temp == (uint64_t) FMT_FRM_WATERMARK) {
  92041. + _fmt_dbgr("watermark found!\n");
  92042. + test_and_steal_frame_frame = true;
  92043. + break;
  92044. + }
  92045. + }
  92046. +
  92047. + if (!test_and_steal_frame_frame) {
  92048. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  92049. + atomic_inc(&fmt_port->not_enqueue_to_rxq_wrong_frm);
  92050. +#endif
  92051. + _fmt_dbgr("NOT watermark found!\n");
  92052. + return false;
  92053. + }
  92054. +
  92055. + /* do not enqueue the tx conf/err frames */
  92056. + if ((fqid == FMT_TX_CONF_Q) || (fqid == FMT_TX_ERR_Q))
  92057. + goto _test_and_steal_frame_return_true;
  92058. +
  92059. + _fmt_dbgr("on port %d got FMUC frame\n", fmt_port->id);
  92060. + data_offset = FM_PORT_GetBufferDataOffset(
  92061. + fmt_port->p_rx_fm_port_dev);
  92062. +
  92063. + p_fmt_frame = kmalloc(sizeof(struct fmt_frame_s), GFP_KERNEL);
  92064. +
  92065. + /* dump frame... no more space left on device */
  92066. + if (p_fmt_frame == NULL) {
  92067. + _fmt_err("no space left on device!\n");
  92068. + goto _test_and_steal_frame_return_true;
  92069. + }
  92070. +
  92071. + memset(p_fmt_frame, 0, sizeof(struct fmt_frame_s));
  92072. + p_fmt_frame->buff.p_data = kmalloc(size * sizeof(uint8_t), GFP_KERNEL);
  92073. +
  92074. + /* No more space left on device*/
  92075. + if (p_fmt_frame->buff.p_data == NULL) {
  92076. + _fmt_err("no space left on device!\n");
  92077. + kfree(p_fmt_frame);
  92078. + goto _test_and_steal_frame_return_true;
  92079. + }
  92080. +
  92081. + p_fmt_frame->buff.size = size-data_offset;
  92082. + p_fmt_frame->buff.qid = fqid;
  92083. +
  92084. + memcpy(p_fmt_frame->buff.p_data,
  92085. + (uint8_t *)PTR_MOVE(buffer, data_offset),
  92086. + p_fmt_frame->buff.size);
  92087. +
  92088. + memcpy(p_fmt_frame->buff.buff_context.fm_prs_res,
  92089. + FM_PORT_GetBufferPrsResult(fmt_port->p_rx_fm_port_dev,
  92090. + (char *)buffer),
  92091. + 32);
  92092. +
  92093. + /* enqueue frame - this frame will go to us */
  92094. + enqueue_fmt_frame(fmt_port, p_fmt_frame);
  92095. +
  92096. +_test_and_steal_frame_return_true:
  92097. + return true;
  92098. +}
  92099. +
  92100. +static int fmt_fq_release(const struct qm_fd *fd)
  92101. +{
  92102. + struct dpa_bp *_dpa_bp;
  92103. + struct bm_buffer _bmb;
  92104. +
  92105. + if (fd->format == qm_fd_contig) {
  92106. + _dpa_bp = dpa_bpid2pool(fd->bpid);
  92107. + BUG_ON(IS_ERR(_dpa_bp));
  92108. +
  92109. + _bmb.hi = fd->addr_hi;
  92110. + _bmb.lo = fd->addr_lo;
  92111. +
  92112. + while (bman_release(_dpa_bp->pool, &_bmb, 1, 0))
  92113. + cpu_relax();
  92114. +
  92115. + } else {
  92116. + _fmt_err("frame not supported !\n");
  92117. + return -1;
  92118. + }
  92119. +
  92120. + return 0;
  92121. +}
  92122. +
  92123. +/* sync it w/ dpaa_eth.c: DPA_BP_HEAD */
  92124. +#define DPA_BP_HEADROOM (DPA_TX_PRIV_DATA_SIZE + \
  92125. + fm_get_rx_extra_headroom() + \
  92126. + DPA_PARSE_RESULTS_SIZE + \
  92127. + DPA_HASH_RESULTS_SIZE)
  92128. +#define MAC_HEADER_LENGTH 14
  92129. +#define L2_AND_HEADROOM_OFF ((DPA_BP_HEADROOM) + (MAC_HEADER_LENGTH))
  92130. +
  92131. +/* dpa ingress hooks definition */
  92132. +enum dpaa_eth_hook_result fmt_rx_default_hook(
  92133. + struct sk_buff *skb,
  92134. + struct net_device *net_dev,
  92135. + u32 fqid)
  92136. +{
  92137. + struct dpa_priv_s *dpa_priv = NULL;
  92138. + struct fmt_port_s *fmt_port = NULL;
  92139. + uint8_t *buffer;
  92140. + uint32_t buffer_len;
  92141. +
  92142. + _fmt_dbgr("calling...\n");
  92143. +
  92144. + dpa_priv = netdev_priv(net_dev);
  92145. + fmt_port = match_dpa_to_fmt_port(dpa_priv);
  92146. +
  92147. + /* conversion from skb to fd:
  92148. + * skb cames processed for L3, so we need to go back for
  92149. + * layer 2 offset */
  92150. + buffer = (uint8_t *)(skb->data - ((int)L2_AND_HEADROOM_OFF));
  92151. + buffer_len = skb->len + ((int)L2_AND_HEADROOM_OFF);
  92152. +
  92153. + /* if is not out frame let dpa to handle it */
  92154. + if (test_and_steal_frame(fmt_port,
  92155. + FMT_RX_DFLT_Q,
  92156. + buffer,
  92157. + buffer_len))
  92158. + goto _fmt_rx_default_hook_stolen;
  92159. +
  92160. + _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
  92161. + return DPAA_ETH_CONTINUE;
  92162. +
  92163. +_fmt_rx_default_hook_stolen:
  92164. + dev_kfree_skb(skb);
  92165. +
  92166. + _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
  92167. + return DPAA_ETH_STOLEN;
  92168. +}
  92169. +
  92170. +enum dpaa_eth_hook_result fmt_rx_error_hook(
  92171. + struct net_device *net_dev,
  92172. + const struct qm_fd *fd,
  92173. + u32 fqid)
  92174. +{
  92175. + struct dpa_priv_s *dpa_priv = NULL;
  92176. + struct dpa_bp *dpa_bp = NULL;
  92177. + struct fmt_port_s *fmt_port = NULL;
  92178. + void *fd_virt_addr = NULL;
  92179. + dma_addr_t addr = qm_fd_addr(fd);
  92180. +
  92181. + _fmt_dbgr("calling...\n");
  92182. +
  92183. + dpa_priv = netdev_priv(net_dev);
  92184. + fmt_port = match_dpa_to_fmt_port(dpa_priv);
  92185. +
  92186. + /* dpaa doesn't do this... we have to do it here */
  92187. + dpa_bp = dpa_bpid2pool(fd->bpid);
  92188. + dma_unmap_single(dpa_bp->dev, addr, dpa_bp->size, DMA_BIDIRECTIONAL);
  92189. +
  92190. + fd_virt_addr = phys_to_virt(addr);
  92191. + /* if is not out frame let dpa to handle it */
  92192. + if (test_and_steal_frame(fmt_port,
  92193. + FMT_RX_ERR_Q,
  92194. + fd_virt_addr,
  92195. + fd->length20 + fd->offset)) {
  92196. + goto _fmt_rx_error_hook_stolen;
  92197. + }
  92198. +
  92199. + _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
  92200. + return DPAA_ETH_CONTINUE;
  92201. +
  92202. +_fmt_rx_error_hook_stolen:
  92203. + /* the frame data doesn't matter,
  92204. + * so, no mapping is needed */
  92205. + fmt_fq_release(fd);
  92206. +
  92207. + _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
  92208. + return DPAA_ETH_STOLEN;
  92209. +}
  92210. +
  92211. +enum dpaa_eth_hook_result fmt_tx_confirm_hook(
  92212. + struct net_device *net_dev,
  92213. + const struct qm_fd *fd,
  92214. + u32 fqid)
  92215. +{
  92216. + struct dpa_priv_s *dpa_priv = NULL;
  92217. + struct fmt_port_s *fmt_port = NULL;
  92218. + dma_addr_t addr = qm_fd_addr(fd);
  92219. + void *fd_virt_addr = NULL;
  92220. + uint32_t fd_len = 0;
  92221. +
  92222. + _fmt_dbgr("calling...\n");
  92223. +
  92224. + dpa_priv = netdev_priv(net_dev);
  92225. + fmt_port = match_dpa_to_fmt_port(dpa_priv);
  92226. +
  92227. + fd_virt_addr = phys_to_virt(addr);
  92228. + fd_len = fd->length20 + fd->offset;
  92229. +
  92230. + if (fd_len > fm_get_max_frm()) {
  92231. + _fmt_err("tx confirm bad frame size: %u!\n", fd_len);
  92232. + goto _fmt_tx_confirm_hook_continue;
  92233. + }
  92234. +
  92235. + if (test_and_steal_frame(fmt_port,
  92236. + FMT_TX_CONF_Q,
  92237. + fd_virt_addr,
  92238. + fd_len))
  92239. + goto _fmt_tx_confirm_hook_stolen;
  92240. +
  92241. +_fmt_tx_confirm_hook_continue:
  92242. + _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
  92243. + return DPAA_ETH_CONTINUE;
  92244. +
  92245. +_fmt_tx_confirm_hook_stolen:
  92246. + kfree(fd_virt_addr);
  92247. +
  92248. + _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
  92249. + return DPAA_ETH_STOLEN;
  92250. +}
  92251. +
  92252. +enum dpaa_eth_hook_result fmt_tx_confirm_error_hook(
  92253. + struct net_device *net_dev,
  92254. + const struct qm_fd *fd,
  92255. + u32 fqid)
  92256. +{
  92257. + struct dpa_priv_s *dpa_priv = NULL;
  92258. + struct fmt_port_s *fmt_port = NULL;
  92259. + dma_addr_t addr = qm_fd_addr(fd);
  92260. + void *fd_virt_addr = NULL;
  92261. + uint32_t fd_len = 0;
  92262. +
  92263. + _fmt_dbgr("calling...\n");
  92264. +
  92265. + dpa_priv = netdev_priv(net_dev);
  92266. + fmt_port = match_dpa_to_fmt_port(dpa_priv);
  92267. +
  92268. + fd_virt_addr = phys_to_virt(addr);
  92269. + fd_len = fd->length20 + fd->offset;
  92270. +
  92271. + if (fd_len > fm_get_max_frm()) {
  92272. + _fmt_err("tx confirm err bad frame size: %u !\n", fd_len);
  92273. + goto _priv_ingress_tx_err_continue;
  92274. + }
  92275. +
  92276. + if (test_and_steal_frame(fmt_port, FMT_TX_ERR_Q, fd_virt_addr, fd_len))
  92277. + goto _priv_ingress_tx_err_stolen;
  92278. +
  92279. +_priv_ingress_tx_err_continue:
  92280. + _fmt_dbgr("called:DPAA_ETH_CONTINUE.\n");
  92281. + return DPAA_ETH_CONTINUE;
  92282. +
  92283. +_priv_ingress_tx_err_stolen:
  92284. + kfree(fd_virt_addr);
  92285. +
  92286. + _fmt_dbgr("called:DPAA_ETH_STOLEN.\n");
  92287. + return DPAA_ETH_STOLEN;
  92288. +}
  92289. +
  92290. +/* egress callbacks definition */
  92291. +enum qman_cb_dqrr_result fmt_egress_dqrr(
  92292. + struct qman_portal *portal,
  92293. + struct qman_fq *fq,
  92294. + const struct qm_dqrr_entry *dqrr)
  92295. +{
  92296. + /* this callback should never be called */
  92297. + BUG();
  92298. + return qman_cb_dqrr_consume;
  92299. +}
  92300. +
  92301. +static void fmt_egress_error_dqrr(
  92302. + struct qman_portal *p,
  92303. + struct qman_fq *fq,
  92304. + const struct qm_mr_entry *msg)
  92305. +{
  92306. + uint8_t *fd_virt_addr = NULL;
  92307. +
  92308. + /* tx failure, on the ern callback - release buffer */
  92309. + fd_virt_addr = (uint8_t *)phys_to_virt(qm_fd_addr(&msg->ern.fd));
  92310. + kfree(fd_virt_addr);
  92311. +
  92312. + return;
  92313. +}
  92314. +
  92315. +static const struct qman_fq fmt_egress_fq = {
  92316. + .cb = { .dqrr = fmt_egress_dqrr,
  92317. + .ern = fmt_egress_error_dqrr,
  92318. + .fqs = NULL}
  92319. +};
  92320. +
  92321. +int fmt_fq_alloc(
  92322. + struct fmt_fqs_s *fmt_fqs,
  92323. + const struct qman_fq *qman_fq,
  92324. + uint32_t fqid, uint32_t flags,
  92325. + uint16_t channel, uint8_t wq)
  92326. +{
  92327. + int _errno = 0;
  92328. +
  92329. + _fmt_dbg("calling...\n");
  92330. +
  92331. + fmt_fqs->fq_base = *qman_fq;
  92332. +
  92333. + if (fqid == 0) {
  92334. + flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
  92335. + flags &= ~QMAN_FQ_FLAG_NO_MODIFY;
  92336. + } else
  92337. + flags &= ~QMAN_FQ_FLAG_DYNAMIC_FQID;
  92338. +
  92339. + fmt_fqs->init = !(flags & QMAN_FQ_FLAG_NO_MODIFY);
  92340. +
  92341. + _errno = qman_create_fq(fqid, flags, &fmt_fqs->fq_base);
  92342. + if (_errno < 0) {
  92343. + _fmt_err("frame queues create failed.\n");
  92344. + return -EINVAL;
  92345. + }
  92346. +
  92347. + if (fmt_fqs->init) {
  92348. + struct qm_mcc_initfq initfq;
  92349. +
  92350. + initfq.we_mask = QM_INITFQ_WE_DESTWQ;
  92351. + initfq.fqd.dest.channel = channel;
  92352. + initfq.fqd.dest.wq = wq;
  92353. +
  92354. + _errno = qman_init_fq(&fmt_fqs->fq_base,
  92355. + QMAN_INITFQ_FLAG_SCHED,
  92356. + &initfq);
  92357. + if (_errno < 0) {
  92358. + _fmt_err("frame queues init erorr.\n");
  92359. + qman_destroy_fq(&fmt_fqs->fq_base, 0);
  92360. + return -EINVAL;
  92361. + }
  92362. + }
  92363. +
  92364. + _fmt_dbg("called.\n");
  92365. + return 0;
  92366. +}
  92367. +
  92368. +static int fmt_fq_free(struct fmt_fqs_s *fmt_fq)
  92369. +{
  92370. + int _err = 0;
  92371. +
  92372. + _fmt_dbg("calling...\n");
  92373. +
  92374. + if (fmt_fq->init) {
  92375. + _err = qman_retire_fq(&fmt_fq->fq_base, NULL);
  92376. + if (unlikely(_err < 0))
  92377. + _fmt_err("qman_retire_fq(%u) = %d\n",
  92378. + qman_fq_fqid(&fmt_fq->fq_base), _err);
  92379. +
  92380. + _err = qman_oos_fq(&fmt_fq->fq_base);
  92381. + if (unlikely(_err < 0))
  92382. + _fmt_err("qman_oos_fq(%u) = %d\n",
  92383. + qman_fq_fqid(&fmt_fq->fq_base), _err);
  92384. + }
  92385. +
  92386. + qman_destroy_fq(&fmt_fq->fq_base, 0);
  92387. +
  92388. + _fmt_dbg("called.\n");
  92389. + return _err;
  92390. +}
  92391. +
  92392. +/* private pcd dqrr calbacks */
  92393. +static enum qman_cb_dqrr_result fmt_pcd_dqrr(
  92394. + struct qman_portal *portal,
  92395. + struct qman_fq *fq,
  92396. + const struct qm_dqrr_entry *dq)
  92397. +{
  92398. + struct dpa_bp *dpa_bp = NULL;
  92399. + dma_addr_t addr = qm_fd_addr(&dq->fd);
  92400. + uint8_t *fd_virt_addr = NULL;
  92401. + struct fmt_port_s *fmt_port;
  92402. + struct fmt_port_pcd_s *fmt_port_pcd;
  92403. + uint32_t relative_fqid = 0;
  92404. + uint32_t fd_len = 0;
  92405. +
  92406. + _fmt_dbgr("calling...\n");
  92407. +
  92408. + /* upcast - from pcd_alloc_fq */
  92409. + fmt_port = ((struct fmt_fqs_s *)fq)->fmt_port_priv;
  92410. + if (!fmt_port) {
  92411. + _fmt_err(" wrong fmt port -to- fq match.\n");
  92412. + goto _fmt_pcd_dqrr_return;
  92413. + }
  92414. + fmt_port_pcd = &fmt_port->fmt_port_pcd;
  92415. +
  92416. + relative_fqid = dq->fqid - fmt_port_pcd->fqid_base;
  92417. + _fmt_dbgr("pcd dqrr got frame on relative fq:%u@base:%u\n",
  92418. + relative_fqid, fmt_port_pcd->fqid_base);
  92419. +
  92420. + fd_len = dq->fd.length20 + dq->fd.offset;
  92421. +
  92422. + if (fd_len > fm_get_max_frm()) {
  92423. + _fmt_err("pcd dqrr wrong frame size: %u (%u:%u)!\n",
  92424. + fd_len, dq->fd.length20, dq->fd.offset);
  92425. + goto _fmt_pcd_dqrr_return;
  92426. + }
  92427. +
  92428. + dpa_bp = dpa_bpid2pool(dq->fd.bpid);
  92429. + dma_unmap_single(dpa_bp->dev, addr, dpa_bp->size, DMA_BIDIRECTIONAL);
  92430. +
  92431. + fd_virt_addr = phys_to_virt(addr);
  92432. + if (!test_and_steal_frame(fmt_port, relative_fqid, fd_virt_addr,
  92433. + fd_len)) {
  92434. +
  92435. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  92436. + atomic_inc(&fmt_port->not_enqueue_to_rxq_wrong_frm);
  92437. +#endif
  92438. + _fmt_wrn("pcd dqrr unrecognized frame@fqid: %u,"
  92439. + " frame len: %u (dropped).\n",
  92440. + dq->fqid, dq->fd.length20);
  92441. + dump_frame(fd_virt_addr, fd_len);
  92442. + }
  92443. +
  92444. +_fmt_pcd_dqrr_return:
  92445. + /* no need to map again here */
  92446. + fmt_fq_release(&dq->fd);
  92447. +
  92448. + _fmt_dbgr("calle.\n");
  92449. + return qman_cb_dqrr_consume;
  92450. +}
  92451. +
  92452. +static void fmt_pcd_err_dqrr(
  92453. + struct qman_portal *qm,
  92454. + struct qman_fq *fq,
  92455. + const struct qm_mr_entry *msg)
  92456. +{
  92457. + _fmt_err("this callback should never be called.\n");
  92458. + BUG();
  92459. + return;
  92460. +}
  92461. +
  92462. +static void fmt_pcd_fqs_dqrr(
  92463. + struct qman_portal *qm,
  92464. + struct qman_fq *fq,
  92465. + const struct qm_mr_entry *msg)
  92466. +{
  92467. + _fmt_dbg(" fq state(0x%x)@fqid(%u.\n", msg->fq.fqs, msg->fq.fqid);
  92468. + return;
  92469. +}
  92470. +
  92471. +/* private pcd queue template */
  92472. +static const struct qman_fq pcd_fq = {
  92473. + .cb = { .dqrr = fmt_pcd_dqrr,
  92474. + .ern = fmt_pcd_err_dqrr,
  92475. + .fqs = fmt_pcd_fqs_dqrr}
  92476. +};
  92477. +
  92478. +/* defined as weak in dpaa driver. */
  92479. +/* ! parameters come from IOCTL call - US */
  92480. +int dpa_alloc_pcd_fqids(
  92481. + struct device *dev,
  92482. + uint32_t num, uint8_t alignment,
  92483. + uint32_t *base_fqid)
  92484. +{
  92485. + int _err = 0, i;
  92486. + struct net_device *net_dev = NULL;
  92487. + struct dpa_priv_s *dpa_priv = NULL;
  92488. + struct fmt_port_pcd_s *fmt_port_pcd = NULL;
  92489. + struct fmt_fqs_s *fmt_fqs = NULL;
  92490. + struct fmt_port_s *fmt_port = NULL;
  92491. + int num_allocated = 0;
  92492. +
  92493. + _fmt_dbg("calling...\n");
  92494. +
  92495. + net_dev = (typeof(net_dev))dev_get_drvdata(dev);
  92496. + dpa_priv = (typeof(dpa_priv))netdev_priv(net_dev);
  92497. +
  92498. + if (!netif_msg_probe(dpa_priv)) {
  92499. + _fmt_err("dpa not probe.\n");
  92500. + _err = -ENODEV;
  92501. + goto _pcd_alloc_fqs_err;
  92502. + }
  92503. +
  92504. + fmt_port = match_dpa_to_fmt_port(dpa_priv);
  92505. + if (!fmt_port) {
  92506. + _fmt_err("fmt port not found.");
  92507. + _err = -EINVAL;
  92508. + goto _pcd_alloc_fqs_err;
  92509. + }
  92510. +
  92511. + fmt_port_pcd = &fmt_port->fmt_port_pcd;
  92512. +
  92513. + num_allocated = qman_alloc_fqid_range(base_fqid, num, alignment, 0);
  92514. +
  92515. + if ((num_allocated <= 0) ||
  92516. + (num_allocated < num) ||
  92517. + (alignment && (*base_fqid) % alignment)) {
  92518. + *base_fqid = 0;
  92519. + _fmt_err("Failed to alloc pcd fqs rang.\n");
  92520. + _err = -EINVAL;
  92521. + goto _pcd_alloc_fqs_err;
  92522. + }
  92523. +
  92524. + _fmt_dbg("wanted %d fqs(align %d), got %d fqids@%u.\n",
  92525. + num, alignment, num_allocated, *base_fqid);
  92526. +
  92527. + /* alloc pcd queues */
  92528. + fmt_port_pcd->fmt_pcd_fqs = kmalloc(num_allocated *
  92529. + sizeof(struct fmt_fqs_s),
  92530. + GFP_KERNEL);
  92531. + fmt_port_pcd->num_queues = num_allocated;
  92532. + fmt_port_pcd->fqid_base = *base_fqid;
  92533. + fmt_fqs = fmt_port_pcd->fmt_pcd_fqs;
  92534. +
  92535. + /* alloc the pcd queues */
  92536. + for (i = 0; i < num_allocated; i++, fmt_fqs++) {
  92537. + _err = fmt_fq_alloc(
  92538. + fmt_fqs,
  92539. + &pcd_fq,
  92540. + (*base_fqid) + i, QMAN_FQ_FLAG_NO_ENQUEUE,
  92541. + dpa_priv->channel, 7);
  92542. +
  92543. + if (_err < 0)
  92544. + goto _pcd_alloc_fqs_err;
  92545. +
  92546. + /* upcast to identify from where the frames came from */
  92547. + fmt_fqs->fmt_port_priv = fmt_port;
  92548. + }
  92549. +
  92550. + _fmt_dbg("called.\n");
  92551. + return _err;
  92552. +_pcd_alloc_fqs_err:
  92553. + if (num_allocated > 0)
  92554. + qman_release_fqid_range(*base_fqid, num_allocated);
  92555. + /*TODO: free fmt_pcd_fqs if are any */
  92556. +
  92557. + _fmt_dbg("called(_err:%d).\n", _err);
  92558. + return _err;
  92559. +}
  92560. +
  92561. +/* defined as weak in dpaa driver. */
  92562. +int dpa_free_pcd_fqids(
  92563. + struct device *dev,
  92564. + uint32_t base_fqid)
  92565. +{
  92566. +
  92567. + int _err = 0, i;
  92568. + struct net_device *net_dev = NULL;
  92569. + struct dpa_priv_s *dpa_priv = NULL;
  92570. + struct fmt_port_pcd_s *fmt_port_pcd = NULL;
  92571. + struct fmt_fqs_s *fmt_fqs = NULL;
  92572. + struct fmt_port_s *fmt_port = NULL;
  92573. + int num_allocated = 0;
  92574. +
  92575. + _fmt_dbg("calling...\n");
  92576. +
  92577. + net_dev = (typeof(net_dev))dev_get_drvdata(dev);
  92578. + dpa_priv = (typeof(dpa_priv))netdev_priv(net_dev);
  92579. +
  92580. + if (!netif_msg_probe(dpa_priv)) {
  92581. + _fmt_err("dpa not probe.\n");
  92582. + _err = -ENODEV;
  92583. + goto _pcd_free_fqs_err;
  92584. + }
  92585. +
  92586. + fmt_port = match_dpa_to_fmt_port(dpa_priv);
  92587. + if (!fmt_port) {
  92588. + _fmt_err("fmt port not found.");
  92589. + _err = -EINVAL;
  92590. + goto _pcd_free_fqs_err;
  92591. + }
  92592. +
  92593. + fmt_port_pcd = &fmt_port->fmt_port_pcd;
  92594. + num_allocated = fmt_port_pcd->num_queues;
  92595. + fmt_fqs = fmt_port_pcd->fmt_pcd_fqs;
  92596. +
  92597. + for (i = 0; i < num_allocated; i++, fmt_fqs++)
  92598. + fmt_fq_free(fmt_fqs);
  92599. +
  92600. + qman_release_fqid_range(base_fqid,num_allocated);
  92601. +
  92602. + kfree(fmt_port_pcd->fmt_pcd_fqs);
  92603. + memset(fmt_port_pcd, 0, sizeof(*fmt_port_pcd));
  92604. +
  92605. + /* debugging stuff */
  92606. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  92607. + _fmt_dbg(" portid: %u.\n", fmt_port->id);
  92608. + _fmt_dbg(" frames enqueue to qman: %u.\n",
  92609. + atomic_read(&fmt_port->enqueue_to_qman_frm));
  92610. + _fmt_dbg(" frames enqueue to rxq: %u.\n",
  92611. + atomic_read(&fmt_port->enqueue_to_rxq));
  92612. + _fmt_dbg(" frames dequeue from rxq: %u.\n",
  92613. + atomic_read(&fmt_port->dequeue_from_rxq));
  92614. + _fmt_dbg(" frames not enqueue to rxq - wrong frm: %u.\n",
  92615. + atomic_read(&fmt_port->not_enqueue_to_rxq_wrong_frm));
  92616. + atomic_set(&fmt_port->enqueue_to_qman_frm, 0);
  92617. + atomic_set(&fmt_port->enqueue_to_rxq, 0);
  92618. + atomic_set(&fmt_port->dequeue_from_rxq, 0);
  92619. + atomic_set(&fmt_port->not_enqueue_to_rxq_wrong_frm, 0);
  92620. +#endif
  92621. + return 0;
  92622. +
  92623. +_pcd_free_fqs_err:
  92624. + return _err;
  92625. +}
  92626. +
  92627. +static int fmt_port_init(
  92628. + struct fmt_port_s *fmt_port,
  92629. + ioc_fmt_port_param_t *p_Params)
  92630. +{
  92631. + struct device_node *fm_node, *fm_port_node;
  92632. + const uint32_t *uint32_prop;
  92633. + int _errno = 0, lenp = 0, i;
  92634. + static struct of_device_id fm_node_of_match[] = {
  92635. + { .compatible = "fsl,fman", },
  92636. + { /* end of list */ },
  92637. + };
  92638. +
  92639. + _fmt_dbg("calling...\n");
  92640. +
  92641. + /* init send/receive tu US list */
  92642. + INIT_LIST_HEAD(&fmt_port->rx_q);
  92643. +
  92644. + /* check parameters */
  92645. + if (p_Params->num_tx_queues > FMAN_TEST_MAX_TX_FQS ||
  92646. + p_Params->fm_port_id > IOC_FMT_MAX_NUM_OF_PORTS) {
  92647. + _fmt_dbg("wrong test parameters.\n");
  92648. + return -EINVAL;
  92649. + }
  92650. +
  92651. + /* set port parameters */
  92652. + fmt_port->num_of_tx_fqs = p_Params->num_tx_queues;
  92653. + fmt_port->id = p_Params->fm_port_id;
  92654. + fmt_port->port_type = p_Params->fm_port_type;
  92655. + fmt_port->diag = e_IOC_DIAG_MODE_NONE;
  92656. +
  92657. + /* init debugging stuff */
  92658. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  92659. + atomic_set(&fmt_port->enqueue_to_qman_frm, 0);
  92660. + atomic_set(&fmt_port->enqueue_to_rxq, 0);
  92661. + atomic_set(&fmt_port->dequeue_from_rxq, 0);
  92662. + atomic_set(&fmt_port->not_enqueue_to_rxq_wrong_frm, 0);
  92663. +#endif
  92664. +
  92665. + /* TODO: This should be done at probe time not at runtime
  92666. + * very ugly function */
  92667. + /* fill fmt port properties from dts */
  92668. + for_each_matching_node(fm_node, fm_node_of_match) {
  92669. +
  92670. + uint32_prop = (uint32_t *)of_get_property(fm_node,
  92671. + "cell-index", &lenp);
  92672. + if (unlikely(uint32_prop == NULL)) {
  92673. + _fmt_wrn("of_get_property(%s, cell-index) invalid",
  92674. + fm_node->full_name);
  92675. + return -EINVAL;
  92676. + }
  92677. + if (WARN_ON(lenp != sizeof(uint32_t))) {
  92678. + _fmt_wrn("of_get_property(%s, cell-index) invalid",
  92679. + fm_node->full_name);
  92680. + return -EINVAL;
  92681. + }
  92682. +
  92683. + if (*uint32_prop == p_Params->fm_id) {
  92684. + struct resource res;
  92685. +
  92686. + /* Get the FM address */
  92687. + _errno = of_address_to_resource(fm_node, 0, &res);
  92688. + if (unlikely(_errno < 0)) {
  92689. + _fmt_wrn("of_address_to_resource() = %u.\n", _errno);
  92690. + return -EINVAL;
  92691. + }
  92692. +
  92693. + fmt_port->fm_phys_base_addr = res.start;
  92694. +
  92695. + for_each_child_of_node(fm_node, fm_port_node) {
  92696. + struct platform_device *of_dev;
  92697. +
  92698. + if (!of_device_is_available(fm_port_node))
  92699. + continue;
  92700. +
  92701. + uint32_prop = (uint32_t *)of_get_property(
  92702. + fm_port_node,
  92703. + "cell-index",
  92704. + &lenp);
  92705. + if (uint32_prop == NULL)
  92706. + continue;
  92707. +
  92708. + if (of_device_is_compatible(fm_port_node,
  92709. + "fsl,fman-port-oh") &&
  92710. + (fmt_port->port_type == e_IOC_FMT_PORT_T_OP)) {
  92711. +
  92712. + if (*uint32_prop == fmt_port->id) {
  92713. + of_dev = of_find_device_by_node(fm_port_node);
  92714. + if (unlikely(of_dev == NULL)) {
  92715. + _fmt_wrn("fm id invalid\n");
  92716. + return -EINVAL;
  92717. + }
  92718. +
  92719. + fmt_port->p_tx_port =
  92720. + fm_port_bind(&of_dev->dev);
  92721. + fmt_port->p_tx_fm_port_dev =
  92722. + (void *)fm_port_get_handle(
  92723. + fmt_port->p_tx_port);
  92724. + fmt_port->p_rx_port =
  92725. + fmt_port->p_tx_port;
  92726. + fmt_port->p_rx_fm_port_dev =
  92727. + fmt_port->p_tx_fm_port_dev;
  92728. + fmt_port->p_mac_dev = NULL;
  92729. + break;
  92730. + }
  92731. + } else if ((*uint32_prop == fmt_port->id) &&
  92732. + fmt_port->port_type == e_IOC_FMT_PORT_T_RXTX) {
  92733. +
  92734. + of_dev = of_find_device_by_node(fm_port_node);
  92735. + if (unlikely(of_dev == NULL)) {
  92736. + _fmt_wrn("dtb fm id invalid value");
  92737. + return -EINVAL;
  92738. + }
  92739. +
  92740. + if (of_device_is_compatible(fm_port_node,
  92741. + "fsl,fman-port-1g-tx")) {
  92742. + fmt_port->p_tx_port =
  92743. + fm_port_bind(&of_dev->dev);
  92744. + fmt_port->p_tx_fm_port_dev = (void *)
  92745. + fm_port_get_handle(
  92746. + fmt_port->p_tx_port);
  92747. + } else if (of_device_is_compatible(fm_port_node,
  92748. + "fsl,fman-port-1g-rx")) {
  92749. + fmt_port->p_rx_port =
  92750. + fm_port_bind(&of_dev->dev);
  92751. + fmt_port->p_rx_fm_port_dev = (void *)
  92752. + fm_port_get_handle(
  92753. + fmt_port->p_rx_port);
  92754. + } else if (of_device_is_compatible(fm_port_node,
  92755. + "fsl,fman-1g-mac") ||
  92756. + of_device_is_compatible(fm_port_node,
  92757. + "fsl,fman-memac"))
  92758. + fmt_port->p_mac_dev =
  92759. + (typeof(fmt_port->p_mac_dev))
  92760. + dev_get_drvdata(&of_dev->dev);
  92761. + else
  92762. + continue;
  92763. +
  92764. + if (fmt_port->p_tx_fm_port_dev &&
  92765. + fmt_port->p_rx_fm_port_dev && fmt_port->p_mac_dev)
  92766. + break;
  92767. + } else if (((*uint32_prop + FM_MAX_NUM_OF_1G_RX_PORTS) ==
  92768. + fmt_port->id) &&
  92769. + fmt_port->port_type == e_IOC_FMT_PORT_T_RXTX) {
  92770. +
  92771. + of_dev = of_find_device_by_node(fm_port_node);
  92772. + if (unlikely(of_dev == NULL)) {
  92773. + _fmt_wrn("dtb fm id invalid value\n");
  92774. + return -EINVAL;
  92775. + }
  92776. +
  92777. + if (of_device_is_compatible(fm_port_node,
  92778. + "fsl,fman-port-10g-tx")) {
  92779. + fmt_port->p_tx_port =
  92780. + fm_port_bind(&of_dev->dev);
  92781. + fmt_port->p_tx_fm_port_dev = (void *)
  92782. + fm_port_get_handle(
  92783. + fmt_port->p_tx_port);
  92784. + } else if (of_device_is_compatible(fm_port_node,
  92785. + "fsl,fman-port-10g-rx")) {
  92786. + fmt_port->p_rx_port =
  92787. + fm_port_bind(&of_dev->dev);
  92788. + fmt_port->p_rx_fm_port_dev = (void *)
  92789. + fm_port_get_handle(
  92790. + fmt_port->p_rx_port);
  92791. + } else if (of_device_is_compatible(fm_port_node,
  92792. + "fsl,fman-10g-mac") ||
  92793. + of_device_is_compatible(fm_port_node,
  92794. + "fsl,fman-memac"))
  92795. + fmt_port->p_mac_dev =
  92796. + (typeof(fmt_port->p_mac_dev))
  92797. + dev_get_drvdata(&of_dev->dev);
  92798. + else
  92799. + continue;
  92800. +
  92801. + if (fmt_port->p_tx_fm_port_dev &&
  92802. + fmt_port->p_rx_fm_port_dev && fmt_port->p_mac_dev)
  92803. + break;
  92804. + }
  92805. + } /* for_each_child */
  92806. + }
  92807. + } /* for each matching node */
  92808. +
  92809. + if (fmt_port->p_tx_fm_port_dev == 0 ||
  92810. + fmt_port->p_rx_fm_port_dev == 0) {
  92811. +
  92812. + _fmt_err("bad fm port pointers.\n");
  92813. + return -EINVAL;
  92814. + }
  92815. +
  92816. + _fmt_dbg("alloc %u tx queues.\n", fmt_port->num_of_tx_fqs);
  92817. +
  92818. + /* init fman test egress dynamic frame queues */
  92819. + for (i = 0; i < fmt_port->num_of_tx_fqs; i++) {
  92820. + int _errno;
  92821. + _errno = fmt_fq_alloc(
  92822. + &fmt_port->p_tx_fqs[i],
  92823. + &fmt_egress_fq,
  92824. + 0,
  92825. + QMAN_FQ_FLAG_TO_DCPORTAL,
  92826. + fm_get_tx_port_channel(fmt_port->p_tx_port),
  92827. + i);
  92828. +
  92829. + if (_errno < 0) {
  92830. + _fmt_err("tx queues allocation failed.\n");
  92831. + /* TODO: memory leak here if 1 queue is allocated and
  92832. + * next queues are failing ... */
  92833. + return -EINVAL;
  92834. + }
  92835. + }
  92836. +
  92837. + /* port is valid and ready to use. */
  92838. + fmt_port->valid = TRUE;
  92839. +
  92840. + _fmt_dbg("called.\n");
  92841. + return 0;
  92842. +}
  92843. +
  92844. +/* fm test chardev functions */
  92845. +static int fmt_open(struct inode *inode, struct file *file)
  92846. +{
  92847. + unsigned int minor = iminor(inode);
  92848. +
  92849. + _fmt_dbg("calling...\n");
  92850. +
  92851. + if (file->private_data != NULL)
  92852. + return 0;
  92853. +
  92854. + /* The minor represent the port number.
  92855. + * Set the port structure accordingly, thus all the operations
  92856. + * will be done on this port. */
  92857. + if ((minor >= DEV_FM_TEST_PORTS_MINOR_BASE) &&
  92858. + (minor < DEV_FM_TEST_MAX_MINORS))
  92859. + file->private_data = &fm_test.ports[minor];
  92860. + else
  92861. + return -ENXIO;
  92862. +
  92863. + _fmt_dbg("called.\n");
  92864. + return 0;
  92865. +}
  92866. +
  92867. +static int fmt_close(struct inode *inode, struct file *file)
  92868. +{
  92869. + struct fmt_port_s *fmt_port = NULL;
  92870. + struct fmt_frame_s *fmt_frame = NULL;
  92871. +
  92872. + int err = 0;
  92873. +
  92874. + _fmt_dbg("calling...\n");
  92875. +
  92876. + fmt_port = file->private_data;
  92877. + if (!fmt_port)
  92878. + return -ENODEV;
  92879. +
  92880. + /* Close the current test port by invalidating it. */
  92881. + fmt_port->valid = FALSE;
  92882. +
  92883. + /* clean the fmt port queue */
  92884. + while ((fmt_frame = dequeue_fmt_frame(fmt_port)) != NULL) {
  92885. + if (fmt_frame && fmt_frame->buff.p_data){
  92886. + kfree(fmt_frame->buff.p_data);
  92887. + kfree(fmt_frame);
  92888. + }
  92889. + }
  92890. +
  92891. + /* !!! the qman queues are cleaning from fm_ioctl...
  92892. + * - very ugly */
  92893. +
  92894. + _fmt_dbg("called.\n");
  92895. + return err;
  92896. +}
  92897. +
  92898. +static int fmt_ioctls(unsigned int minor,
  92899. + struct file *file,
  92900. + unsigned int cmd,
  92901. + unsigned long arg,
  92902. + bool compat)
  92903. +{
  92904. + struct fmt_port_s *fmt_port = NULL;
  92905. +
  92906. + _fmt_dbg("IOCTL minor:%u "
  92907. + " arg:0x%08lx ioctl cmd (0x%08x):(0x%02x:0x%02x.\n",
  92908. + minor, arg, cmd, _IOC_TYPE(cmd), _IOC_NR(cmd));
  92909. +
  92910. + fmt_port = file->private_data;
  92911. + if (!fmt_port) {
  92912. + _fmt_err("invalid fmt port.\n");
  92913. + return -ENODEV;
  92914. + }
  92915. +
  92916. + /* set test type properly */
  92917. + if (compat)
  92918. + fmt_port->compat_test_type = true;
  92919. + else
  92920. + fmt_port->compat_test_type = false;
  92921. +
  92922. + switch (cmd) {
  92923. + case FMT_PORT_IOC_INIT:
  92924. + {
  92925. + ioc_fmt_port_param_t param;
  92926. +
  92927. + if (fmt_port->valid) {
  92928. + _fmt_wrn("port is already initialized.\n");
  92929. + return -EFAULT;
  92930. + }
  92931. +#if defined(CONFIG_COMPAT)
  92932. + if (compat) {
  92933. + if (copy_from_user(&param,
  92934. + (ioc_fmt_port_param_t *)compat_ptr(arg),
  92935. + sizeof(ioc_fmt_port_param_t)))
  92936. +
  92937. + return -EFAULT;
  92938. + } else
  92939. +#endif
  92940. + {
  92941. + if (copy_from_user(&param,
  92942. + (ioc_fmt_port_param_t *) arg,
  92943. + sizeof(ioc_fmt_port_param_t)))
  92944. +
  92945. + return -EFAULT;
  92946. + }
  92947. +
  92948. + return fmt_port_init(fmt_port, &param);
  92949. + }
  92950. +
  92951. + case FMT_PORT_IOC_SET_DIAG_MODE:
  92952. + if (get_user(fmt_port->diag, (ioc_diag_mode *)arg))
  92953. + return -EFAULT;
  92954. +
  92955. + if (fmt_port->diag == e_IOC_DIAG_MODE_CTRL_LOOPBACK)
  92956. + return set_mac_int_loopback(fmt_port, TRUE);
  92957. + else
  92958. + return set_mac_int_loopback(fmt_port, FALSE);
  92959. + break;
  92960. +
  92961. + case FMT_PORT_IOC_SET_DPAECHO_MODE:
  92962. + case FMT_PORT_IOC_SET_IP_HEADER_MANIP:
  92963. + default:
  92964. + _fmt_wrn("ioctl unimplemented minor:%u@ioctl"
  92965. + " cmd:0x%08x(type:0x%02x, nr:0x%02x.\n",
  92966. + minor, cmd, _IOC_TYPE(cmd), _IOC_NR(cmd));
  92967. + return -EFAULT;
  92968. + }
  92969. +
  92970. + return 0;
  92971. +}
  92972. +
  92973. +#ifdef CONFIG_COMPAT
  92974. +static long fmt_compat_ioctl(
  92975. + struct file *file,
  92976. + unsigned int cmd,
  92977. + unsigned long arg)
  92978. +{
  92979. + unsigned int minor = iminor(file->f_path.dentry->d_inode);
  92980. +
  92981. + _fmt_dbg("calling...\n");
  92982. + return fmt_ioctls(minor, file, cmd, arg, true);
  92983. +}
  92984. +#endif
  92985. +
  92986. +static long fmt_ioctl(
  92987. + struct file *file,
  92988. + unsigned int cmd,
  92989. + unsigned long arg)
  92990. +{
  92991. + unsigned int minor = iminor(file->f_path.dentry->d_inode);
  92992. + unsigned int res;
  92993. +
  92994. + _fmt_dbg("calling...\n");
  92995. +
  92996. + fm_mutex_lock();
  92997. + res = fmt_ioctls(minor, file, cmd, arg, false);
  92998. + fm_mutex_unlock();
  92999. +
  93000. + _fmt_dbg("called.\n");
  93001. +
  93002. + return res;
  93003. +}
  93004. +
  93005. +#ifdef CONFIG_COMPAT
  93006. +void copy_compat_test_frame_buffer(
  93007. + ioc_fmt_buff_desc_t *buff,
  93008. + ioc_fmt_compat_buff_desc_t *compat_buff)
  93009. +{
  93010. + compat_buff->qid = buff->qid;
  93011. + compat_buff->p_data = ptr_to_compat(buff->p_data);
  93012. + compat_buff->size = buff->size;
  93013. + compat_buff->status = buff->status;
  93014. +
  93015. + compat_buff->buff_context.p_user_priv =
  93016. + ptr_to_compat(buff->buff_context.p_user_priv);
  93017. + memcpy(compat_buff->buff_context.fm_prs_res,
  93018. + buff->buff_context.fm_prs_res,
  93019. + FM_PRS_MAX * sizeof(uint8_t));
  93020. + memcpy(compat_buff->buff_context.fm_time_stamp,
  93021. + buff->buff_context.fm_time_stamp,
  93022. + FM_TIME_STAMP_MAX * sizeof(uint8_t));
  93023. +}
  93024. +#endif
  93025. +
  93026. +ssize_t fmt_read(
  93027. + struct file *file,
  93028. + char __user *buf,
  93029. + size_t size,
  93030. + loff_t *ppos)
  93031. +{
  93032. + struct fmt_port_s *fmt_port = NULL;
  93033. + struct fmt_frame_s *p_fmt_frame = NULL;
  93034. + ssize_t cnt = 0;
  93035. +
  93036. + fmt_port = file->private_data;
  93037. + if (!fmt_port || !fmt_port->valid) {
  93038. + _fmt_err("fmt port not valid!\n");
  93039. + return -ENODEV;
  93040. + }
  93041. +
  93042. + p_fmt_frame = dequeue_fmt_frame(fmt_port);
  93043. + if (p_fmt_frame == NULL)
  93044. + return 0;
  93045. +
  93046. + _fmt_dbgr("calling...\n");
  93047. +
  93048. +#ifdef CONFIG_COMPAT
  93049. + if (fmt_port->compat_test_type){
  93050. + cnt = sizeof(ioc_fmt_compat_buff_desc_t);
  93051. + }
  93052. + else
  93053. +#endif
  93054. + {
  93055. + cnt = sizeof(ioc_fmt_buff_desc_t);
  93056. + }
  93057. +
  93058. + if (size < cnt) {
  93059. + _fmt_err("illegal buffer-size!\n");
  93060. + cnt = 0;
  93061. + goto _fmt_read_return;
  93062. + }
  93063. +
  93064. + /* Copy structure */
  93065. +#ifdef CONFIG_COMPAT
  93066. + if (fmt_port->compat_test_type) {
  93067. + {
  93068. + ioc_fmt_compat_buff_desc_t compat_buff;
  93069. + copy_compat_test_frame_buffer(&p_fmt_frame->buff,
  93070. + &compat_buff);
  93071. +
  93072. + if (copy_to_user(buf, &compat_buff, cnt)) {
  93073. + _fmt_err("copy_to_user failed!\n");
  93074. + goto _fmt_read_return;
  93075. + }
  93076. + }
  93077. +
  93078. + ((ioc_fmt_compat_buff_desc_t *)buf)->p_data =
  93079. + ptr_to_compat(buf+sizeof(ioc_fmt_compat_buff_desc_t));
  93080. + cnt += MIN(p_fmt_frame->buff.size, size-cnt);
  93081. + } else
  93082. +#endif
  93083. + {
  93084. + if (copy_to_user(buf, &p_fmt_frame->buff, cnt)) {
  93085. + _fmt_err("copy_to_user failed!\n");
  93086. + goto _fmt_read_return;
  93087. + }
  93088. +
  93089. + ((ioc_fmt_buff_desc_t *)buf)->p_data =
  93090. + buf + sizeof(ioc_fmt_buff_desc_t);
  93091. + cnt += MIN(p_fmt_frame->buff.size, size-cnt);
  93092. + }
  93093. +
  93094. + if (size < cnt) {
  93095. + _fmt_err("illegal buffer-size!\n");
  93096. + goto _fmt_read_return;
  93097. + }
  93098. +
  93099. + /* copy frame */
  93100. +#ifdef CONFIG_COMPAT
  93101. + if (fmt_port->compat_test_type) {
  93102. + if (copy_to_user(buf+sizeof(ioc_fmt_compat_buff_desc_t),
  93103. + p_fmt_frame->buff.p_data, cnt)) {
  93104. + _fmt_err("copy_to_user failed!\n");
  93105. + goto _fmt_read_return;
  93106. + }
  93107. + } else
  93108. +#endif
  93109. + {
  93110. + if (copy_to_user(buf+sizeof(ioc_fmt_buff_desc_t),
  93111. + p_fmt_frame->buff.p_data, cnt)) {
  93112. + _fmt_err("copy_to_user failed!\n");
  93113. + goto _fmt_read_return;
  93114. + }
  93115. + }
  93116. +
  93117. +_fmt_read_return:
  93118. + kfree(p_fmt_frame->buff.p_data);
  93119. + kfree(p_fmt_frame);
  93120. +
  93121. + _fmt_dbgr("called.\n");
  93122. + return cnt;
  93123. +}
  93124. +
  93125. +ssize_t fmt_write(
  93126. + struct file *file,
  93127. + const char __user *buf,
  93128. + size_t size,
  93129. + loff_t *ppos)
  93130. +{
  93131. + struct fmt_port_s *fmt_port = NULL;
  93132. + ioc_fmt_buff_desc_t buff_desc;
  93133. +#ifdef CONFIG_COMPAT
  93134. + ioc_fmt_compat_buff_desc_t buff_desc_compat;
  93135. +#endif
  93136. + uint8_t *p_data = NULL;
  93137. + uint32_t data_offset;
  93138. + int _errno;
  93139. + t_DpaaFD fd;
  93140. +
  93141. + _fmt_dbgr("calling...\n");
  93142. +
  93143. + fmt_port = file->private_data;
  93144. + if (!fmt_port || !fmt_port->valid) {
  93145. + _fmt_err("fmt port not valid.\n");
  93146. + return -EINVAL;
  93147. + }
  93148. +
  93149. + /* If Compat (32B UserSpace - 64B KernelSpace) */
  93150. +#ifdef CONFIG_COMPAT
  93151. + if (fmt_port->compat_test_type) {
  93152. + if (size < sizeof(ioc_fmt_compat_buff_desc_t)) {
  93153. + _fmt_err("invalid buff_desc size.\n");
  93154. + return -EFAULT;
  93155. + }
  93156. +
  93157. + if (copy_from_user(&buff_desc_compat, buf,
  93158. + sizeof(ioc_fmt_compat_buff_desc_t)))
  93159. + return -EFAULT;
  93160. +
  93161. + buff_desc.qid = buff_desc_compat.qid;
  93162. + buff_desc.p_data = compat_ptr(buff_desc_compat.p_data);
  93163. + buff_desc.size = buff_desc_compat.size;
  93164. + buff_desc.status = buff_desc_compat.status;
  93165. +
  93166. + buff_desc.buff_context.p_user_priv =
  93167. + compat_ptr(buff_desc_compat.buff_context.p_user_priv);
  93168. + memcpy(buff_desc.buff_context.fm_prs_res,
  93169. + buff_desc_compat.buff_context.fm_prs_res,
  93170. + FM_PRS_MAX * sizeof(uint8_t));
  93171. + memcpy(buff_desc.buff_context.fm_time_stamp,
  93172. + buff_desc_compat.buff_context.fm_time_stamp,
  93173. + FM_TIME_STAMP_MAX * sizeof(uint8_t));
  93174. + } else
  93175. +#endif
  93176. + {
  93177. + if (size < sizeof(ioc_fmt_buff_desc_t)) {
  93178. + _fmt_err("invalid buff_desc size.\n");
  93179. + return -EFAULT;
  93180. + }
  93181. +
  93182. + if (copy_from_user(&buff_desc, (ioc_fmt_buff_desc_t *)buf,
  93183. + sizeof(ioc_fmt_buff_desc_t)))
  93184. + return -EFAULT;
  93185. + }
  93186. +
  93187. + data_offset = FM_PORT_GetBufferDataOffset(fmt_port->p_tx_fm_port_dev);
  93188. + p_data = kmalloc(buff_desc.size+data_offset, GFP_KERNEL);
  93189. + if (!p_data)
  93190. + return -ENOMEM;
  93191. +
  93192. + /* If Compat (32UserSpace - 64KernelSpace) the buff_desc.p_data is ok */
  93193. + if (copy_from_user((uint8_t *)PTR_MOVE(p_data, data_offset),
  93194. + buff_desc.p_data,
  93195. + buff_desc.size)) {
  93196. + kfree(p_data);
  93197. + return -EFAULT;
  93198. + }
  93199. +
  93200. + /* TODO: dma_map_single here (cannot access the bpool struct) */
  93201. +
  93202. + /* prepare fd */
  93203. + memset(&fd, 0, sizeof(fd));
  93204. + DPAA_FD_SET_ADDR(&fd, p_data);
  93205. + DPAA_FD_SET_OFFSET(&fd, data_offset);
  93206. + DPAA_FD_SET_LENGTH(&fd, buff_desc.size);
  93207. +
  93208. + _errno = qman_enqueue(&fmt_port->p_tx_fqs[buff_desc.qid].fq_base,
  93209. + (struct qm_fd *)&fd, 0);
  93210. + if (_errno) {
  93211. + buff_desc.status = (uint32_t)_errno;
  93212. + if (copy_to_user((ioc_fmt_buff_desc_t *)buf, &buff_desc,
  93213. + sizeof(ioc_fmt_buff_desc_t))) {
  93214. + kfree(p_data);
  93215. + return -EFAULT;
  93216. + }
  93217. + }
  93218. +
  93219. + /* for debugging */
  93220. +#if defined(FMT_K_DBG) || defined(FMT_K_DBG_RUNTIME)
  93221. + atomic_inc(&fmt_port->enqueue_to_qman_frm);
  93222. +#endif
  93223. + _fmt_dbgr("called.\n");
  93224. + return buff_desc.size;
  93225. +}
  93226. +
  93227. +/* fm test character device definition */
  93228. +static const struct file_operations fmt_fops =
  93229. +{
  93230. + .owner = THIS_MODULE,
  93231. +#ifdef CONFIG_COMPAT
  93232. + .compat_ioctl = fmt_compat_ioctl,
  93233. +#endif
  93234. + .unlocked_ioctl = fmt_ioctl,
  93235. + .open = fmt_open,
  93236. + .release = fmt_close,
  93237. + .read = fmt_read,
  93238. + .write = fmt_write,
  93239. +};
  93240. +
  93241. +static int fmt_init(void)
  93242. +{
  93243. + int id;
  93244. +
  93245. + _fmt_dbg("calling...\n");
  93246. +
  93247. + /* Register to the /dev for IOCTL API */
  93248. + /* Register dynamically a new major number for the character device: */
  93249. + fm_test.major = register_chrdev(0, DEV_FM_TEST_NAME, &fmt_fops);
  93250. + if (fm_test.major <= 0) {
  93251. + _fmt_wrn("Failed to allocate major number for device %s.\n",
  93252. + DEV_FM_TEST_NAME);
  93253. + return -ENODEV;
  93254. + }
  93255. +
  93256. + /* Creating class for FMan_test */
  93257. + fm_test.fmt_class = class_create(THIS_MODULE, DEV_FM_TEST_NAME);
  93258. + if (IS_ERR(fm_test.fmt_class)) {
  93259. + unregister_chrdev(fm_test.major, DEV_FM_TEST_NAME);
  93260. + _fmt_wrn("Error creating %s class.\n", DEV_FM_TEST_NAME);
  93261. + return -ENODEV;
  93262. + }
  93263. +
  93264. + for (id = 0; id < IOC_FMT_MAX_NUM_OF_PORTS; id++)
  93265. + if (NULL == device_create(fm_test.fmt_class, NULL,
  93266. + MKDEV(fm_test.major,
  93267. + DEV_FM_TEST_PORTS_MINOR_BASE + id), NULL,
  93268. + DEV_FM_TEST_NAME "%d", id)) {
  93269. +
  93270. + _fmt_err("Error creating %s device.\n",
  93271. + DEV_FM_TEST_NAME);
  93272. + return -ENODEV;
  93273. + }
  93274. +
  93275. + return 0;
  93276. +}
  93277. +
  93278. +static void fmt_free(void)
  93279. +{
  93280. + int id;
  93281. +
  93282. + for (id = 0; id < IOC_FMT_MAX_NUM_OF_PORTS; id++)
  93283. + device_destroy(fm_test.fmt_class, MKDEV(fm_test.major,
  93284. + DEV_FM_TEST_PORTS_MINOR_BASE + id));
  93285. + class_destroy(fm_test.fmt_class);
  93286. +}
  93287. +
  93288. +static int __init __cold fmt_load(void)
  93289. +{
  93290. + struct dpaa_eth_hooks_s priv_dpaa_eth_hooks;
  93291. +
  93292. + /* set dpaa hooks for default queues */
  93293. + memset(&priv_dpaa_eth_hooks, 0, sizeof(priv_dpaa_eth_hooks));
  93294. + priv_dpaa_eth_hooks.rx_default = fmt_rx_default_hook;
  93295. + priv_dpaa_eth_hooks.rx_error = fmt_rx_error_hook;
  93296. + priv_dpaa_eth_hooks.tx_confirm = fmt_tx_confirm_hook;
  93297. + priv_dpaa_eth_hooks.tx_error = fmt_tx_confirm_error_hook;
  93298. +
  93299. + fsl_dpaa_eth_set_hooks(&priv_dpaa_eth_hooks);
  93300. +
  93301. + /* initialize the fman test environment */
  93302. + if (fmt_init() < 0) {
  93303. + _fmt_err("Failed to init FM-test modul.\n");
  93304. + fmt_free();
  93305. + return -ENODEV;
  93306. + }
  93307. +
  93308. + _fmt_inf("FSL FM test module loaded.\n");
  93309. +
  93310. + return 0;
  93311. +}
  93312. +
  93313. +static void __exit __cold fmt_unload(void)
  93314. +{
  93315. + fmt_free();
  93316. + _fmt_inf("FSL FM test module unloaded.\n");
  93317. +}
  93318. +
  93319. +module_init(fmt_load);
  93320. +module_exit(fmt_unload);
  93321. --- /dev/null
  93322. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.c
  93323. @@ -0,0 +1,2795 @@
  93324. +/*
  93325. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  93326. + *
  93327. + * Redistribution and use in source and binary forms, with or without
  93328. + * modification, are permitted provided that the following conditions are met:
  93329. + * * Redistributions of source code must retain the above copyright
  93330. + * notice, this list of conditions and the following disclaimer.
  93331. + * * Redistributions in binary form must reproduce the above copyright
  93332. + * notice, this list of conditions and the following disclaimer in the
  93333. + * documentation and/or other materials provided with the distribution.
  93334. + * * Neither the name of Freescale Semiconductor nor the
  93335. + * names of its contributors may be used to endorse or promote products
  93336. + * derived from this software without specific prior written permission.
  93337. + *
  93338. + *
  93339. + * ALTERNATIVELY, this software may be distributed under the terms of the
  93340. + * GNU General Public License ("GPL") as published by the Free Software
  93341. + * Foundation, either version 2 of that License or (at your option) any
  93342. + * later version.
  93343. + *
  93344. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  93345. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  93346. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  93347. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  93348. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  93349. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  93350. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  93351. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  93352. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  93353. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  93354. + */
  93355. +
  93356. +/*
  93357. + @File lnxwrp_fm.c
  93358. + @Author Shlomi Gridish
  93359. + @Description FM Linux wrapper functions.
  93360. +*/
  93361. +
  93362. +#include <linux/version.h>
  93363. +#include <linux/slab.h>
  93364. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  93365. +#define MODVERSIONS
  93366. +#endif
  93367. +#ifdef MODVERSIONS
  93368. +#include <config/modversions.h>
  93369. +#endif /* MODVERSIONS */
  93370. +#include <linux/kernel.h>
  93371. +#include <linux/module.h>
  93372. +#include <linux/fs.h>
  93373. +#include <linux/cdev.h>
  93374. +#include <linux/device.h>
  93375. +#include <linux/irq.h>
  93376. +#include <linux/interrupt.h>
  93377. +#include <linux/io.h>
  93378. +#include <linux/ioport.h>
  93379. +#include <linux/of_platform.h>
  93380. +#include <linux/of_address.h>
  93381. +#include <linux/of_irq.h>
  93382. +#include <linux/clk.h>
  93383. +#include <asm/uaccess.h>
  93384. +#include <asm/errno.h>
  93385. +#include <linux/fsl/qe.h> /* For struct qe_firmware */
  93386. +#ifndef CONFIG_FMAN_ARM
  93387. +#include <sysdev/fsl_soc.h>
  93388. +#include <linux/fsl/guts.h>
  93389. +#endif
  93390. +#include <linux/stat.h> /* For file access mask */
  93391. +#include <linux/skbuff.h>
  93392. +#include <linux/proc_fs.h>
  93393. +
  93394. +/* NetCommSw Headers --------------- */
  93395. +#include "std_ext.h"
  93396. +#include "error_ext.h"
  93397. +#include "sprint_ext.h"
  93398. +#include "debug_ext.h"
  93399. +#include "sys_io_ext.h"
  93400. +
  93401. +#include "fm_ioctls.h"
  93402. +
  93403. +#include "lnxwrp_fm.h"
  93404. +#include "lnxwrp_resources.h"
  93405. +#include "lnxwrp_sysfs_fm.h"
  93406. +#include "lnxwrp_sysfs_fm_port.h"
  93407. +#include "lnxwrp_exp_sym.h"
  93408. +#include "fm_common.h"
  93409. +#include "../../sdk_fman/Peripherals/FM/fm.h"
  93410. +#define __ERR_MODULE__ MODULE_FM
  93411. +
  93412. +extern struct device_node *GetFmPortAdvArgsDevTreeNode (struct device_node *fm_node,
  93413. + e_FmPortType portType,
  93414. + uint8_t portId);
  93415. +
  93416. +#define PROC_PRINT(args...) offset += sprintf(buf+offset,args)
  93417. +
  93418. +#define ADD_ADV_CONFIG_NO_RET(_func, _param) \
  93419. + do { \
  93420. + if (i<max){ \
  93421. + p_Entry = &p_Entrys[i]; \
  93422. + p_Entry->p_Function = _func; \
  93423. + _param \
  93424. + i++; \
  93425. + } \
  93426. + else \
  93427. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,\
  93428. + ("Number of advanced-configuration entries exceeded"));\
  93429. + } while (0)
  93430. +
  93431. +/* Bootarg used to override the Kconfig FSL_FM_MAX_FRAME_SIZE value */
  93432. +#define FSL_FM_MAX_FRM_BOOTARG "fsl_fm_max_frm"
  93433. +
  93434. +/* Bootarg used to override FSL_FM_RX_EXTRA_HEADROOM Kconfig value */
  93435. +#define FSL_FM_RX_EXTRA_HEADROOM_BOOTARG "fsl_fm_rx_extra_headroom"
  93436. +
  93437. +/* Minimum and maximum value for the fsl_fm_rx_extra_headroom bootarg */
  93438. +#define FSL_FM_RX_EXTRA_HEADROOM_MIN 16
  93439. +#define FSL_FM_RX_EXTRA_HEADROOM_MAX 384
  93440. +
  93441. +#define FSL_FM_PAUSE_TIME_ENABLE 0xf000
  93442. +#define FSL_FM_PAUSE_TIME_DISABLE 0
  93443. +#define FSL_FM_PAUSE_THRESH_DEFAULT 0
  93444. +
  93445. +/*
  93446. + * Max frame size, across all interfaces.
  93447. + * Configurable from Kconfig or bootargs, to avoid allocating
  93448. + * oversized (socket) buffers when not using jumbo frames.
  93449. + * Must be large enough to accommodate the network MTU, but small enough
  93450. + * to avoid wasting skb memory.
  93451. + *
  93452. + * Could be overridden once, at boot-time, via the
  93453. + * fm_set_max_frm() callback.
  93454. + */
  93455. +int fsl_fm_max_frm = CONFIG_FSL_FM_MAX_FRAME_SIZE;
  93456. +
  93457. +/*
  93458. + * Extra headroom for Rx buffers.
  93459. + * FMan is instructed to allocate, on the Rx path, this amount of
  93460. + * space at the beginning of a data buffer, beside the DPA private
  93461. + * data area and the IC fields.
  93462. + * Does not impact Tx buffer layout.
  93463. + *
  93464. + * Configurable from Kconfig or bootargs. Zero by default, it's needed
  93465. + * on particular forwarding scenarios that add extra headers to the
  93466. + * forwarded frame.
  93467. + */
  93468. +int fsl_fm_rx_extra_headroom = CONFIG_FSL_FM_RX_EXTRA_HEADROOM;
  93469. +
  93470. +#ifdef CONFIG_FMAN_PFC
  93471. +static int fsl_fm_pfc_quanta[] = {
  93472. + CONFIG_FMAN_PFC_QUANTA_0,
  93473. + CONFIG_FMAN_PFC_QUANTA_1,
  93474. + CONFIG_FMAN_PFC_QUANTA_2,
  93475. + CONFIG_FMAN_PFC_QUANTA_3
  93476. +};
  93477. +#endif
  93478. +
  93479. +static t_LnxWrpFm lnxWrpFm;
  93480. +
  93481. +int fm_get_max_frm()
  93482. +{
  93483. + return fsl_fm_max_frm;
  93484. +}
  93485. +EXPORT_SYMBOL(fm_get_max_frm);
  93486. +
  93487. +int fm_get_rx_extra_headroom()
  93488. +{
  93489. + return ALIGN(fsl_fm_rx_extra_headroom, 16);
  93490. +}
  93491. +EXPORT_SYMBOL(fm_get_rx_extra_headroom);
  93492. +
  93493. +static int __init fm_set_max_frm(char *str)
  93494. +{
  93495. + int ret = 0;
  93496. +
  93497. + ret = get_option(&str, &fsl_fm_max_frm);
  93498. + if (ret != 1) {
  93499. + /*
  93500. + * This will only work if CONFIG_EARLY_PRINTK is compiled in,
  93501. + * and something like "earlyprintk=serial,uart0,115200" is
  93502. + * specified in the bootargs
  93503. + */
  93504. + printk(KERN_WARNING "No suitable %s=<int> prop in bootargs; "
  93505. + "will use the default FSL_FM_MAX_FRAME_SIZE (%d) "
  93506. + "from Kconfig.\n", FSL_FM_MAX_FRM_BOOTARG,
  93507. + CONFIG_FSL_FM_MAX_FRAME_SIZE);
  93508. +
  93509. + fsl_fm_max_frm = CONFIG_FSL_FM_MAX_FRAME_SIZE;
  93510. + return 1;
  93511. + }
  93512. +
  93513. + /* Don't allow invalid bootargs; fallback to the Kconfig value */
  93514. + if (fsl_fm_max_frm < 64 || fsl_fm_max_frm > 9600) {
  93515. + printk(KERN_WARNING "Invalid %s=%d in bootargs, valid range is "
  93516. + "64-9600. Falling back to the FSL_FM_MAX_FRAME_SIZE (%d) "
  93517. + "from Kconfig.\n",
  93518. + FSL_FM_MAX_FRM_BOOTARG, fsl_fm_max_frm,
  93519. + CONFIG_FSL_FM_MAX_FRAME_SIZE);
  93520. +
  93521. + fsl_fm_max_frm = CONFIG_FSL_FM_MAX_FRAME_SIZE;
  93522. + return 1;
  93523. + }
  93524. +
  93525. + printk(KERN_INFO "Using fsl_fm_max_frm=%d from bootargs\n",
  93526. + fsl_fm_max_frm);
  93527. + return 0;
  93528. +}
  93529. +early_param(FSL_FM_MAX_FRM_BOOTARG, fm_set_max_frm);
  93530. +
  93531. +static int __init fm_set_rx_extra_headroom(char *str)
  93532. +{
  93533. + int ret;
  93534. +
  93535. + ret = get_option(&str, &fsl_fm_rx_extra_headroom);
  93536. +
  93537. + if (ret != 1) {
  93538. + printk(KERN_WARNING "No suitable %s=<int> prop in bootargs; "
  93539. + "will use the default FSL_FM_RX_EXTRA_HEADROOM (%d) "
  93540. + "from Kconfig.\n", FSL_FM_RX_EXTRA_HEADROOM_BOOTARG,
  93541. + CONFIG_FSL_FM_RX_EXTRA_HEADROOM);
  93542. + fsl_fm_rx_extra_headroom = CONFIG_FSL_FM_RX_EXTRA_HEADROOM;
  93543. +
  93544. + return 1;
  93545. + }
  93546. +
  93547. + if (fsl_fm_rx_extra_headroom < FSL_FM_RX_EXTRA_HEADROOM_MIN ||
  93548. + fsl_fm_rx_extra_headroom > FSL_FM_RX_EXTRA_HEADROOM_MAX) {
  93549. + printk(KERN_WARNING "Invalid value for %s=%d prop in "
  93550. + "bootargs; will use the default "
  93551. + "FSL_FM_RX_EXTRA_HEADROOM (%d) from Kconfig.\n",
  93552. + FSL_FM_RX_EXTRA_HEADROOM_BOOTARG,
  93553. + fsl_fm_rx_extra_headroom,
  93554. + CONFIG_FSL_FM_RX_EXTRA_HEADROOM);
  93555. + fsl_fm_rx_extra_headroom = CONFIG_FSL_FM_RX_EXTRA_HEADROOM;
  93556. + }
  93557. +
  93558. + printk(KERN_INFO "Using fsl_fm_rx_extra_headroom=%d from bootargs\n",
  93559. + fsl_fm_rx_extra_headroom);
  93560. +
  93561. + return 0;
  93562. +}
  93563. +early_param(FSL_FM_RX_EXTRA_HEADROOM_BOOTARG, fm_set_rx_extra_headroom);
  93564. +
  93565. +static irqreturn_t fm_irq(int irq, void *_dev)
  93566. +{
  93567. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *)_dev;
  93568. +#ifdef CONFIG_PM_SLEEP
  93569. + t_Fm *p_Fm = (t_Fm*)p_LnxWrpFmDev->h_Dev;
  93570. +#endif
  93571. + if (!p_LnxWrpFmDev || !p_LnxWrpFmDev->h_Dev)
  93572. + return IRQ_NONE;
  93573. +
  93574. +#ifdef CONFIG_PM_SLEEP
  93575. + if (fman_get_normal_pending(p_Fm->p_FmFpmRegs) & INTR_EN_WAKEUP)
  93576. + {
  93577. + pm_wakeup_event(p_LnxWrpFmDev->dev, 200);
  93578. + }
  93579. +#endif
  93580. + FM_EventIsr(p_LnxWrpFmDev->h_Dev);
  93581. + return IRQ_HANDLED;
  93582. +}
  93583. +
  93584. +static irqreturn_t fm_err_irq(int irq, void *_dev)
  93585. +{
  93586. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *)_dev;
  93587. +
  93588. + if (!p_LnxWrpFmDev || !p_LnxWrpFmDev->h_Dev)
  93589. + return IRQ_NONE;
  93590. +
  93591. + if (FM_ErrorIsr(p_LnxWrpFmDev->h_Dev) == E_OK)
  93592. + return IRQ_HANDLED;
  93593. +
  93594. + return IRQ_NONE;
  93595. +}
  93596. +
  93597. +/* used to protect FMD/LLD from concurrent calls in functions fm_mutex_lock / fm_mutex_unlock */
  93598. +static struct mutex lnxwrp_mutex;
  93599. +
  93600. +static t_LnxWrpFmDev * CreateFmDev(uint8_t id)
  93601. +{
  93602. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  93603. + int j;
  93604. +
  93605. + p_LnxWrpFmDev = (t_LnxWrpFmDev *)XX_Malloc(sizeof(t_LnxWrpFmDev));
  93606. + if (!p_LnxWrpFmDev)
  93607. + {
  93608. + REPORT_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  93609. + return NULL;
  93610. + }
  93611. +
  93612. + memset(p_LnxWrpFmDev, 0, sizeof(t_LnxWrpFmDev));
  93613. + p_LnxWrpFmDev->fmDevSettings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
  93614. + memset(p_LnxWrpFmDev->fmDevSettings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
  93615. + p_LnxWrpFmDev->fmPcdDevSettings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
  93616. + memset(p_LnxWrpFmDev->fmPcdDevSettings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
  93617. + p_LnxWrpFmDev->hcPort.settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
  93618. + memset(p_LnxWrpFmDev->hcPort.settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
  93619. + for (j=0; j<FM_MAX_NUM_OF_RX_PORTS; j++)
  93620. + {
  93621. + p_LnxWrpFmDev->rxPorts[j].settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
  93622. + memset(p_LnxWrpFmDev->rxPorts[j].settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
  93623. + }
  93624. + for (j=0; j<FM_MAX_NUM_OF_TX_PORTS; j++)
  93625. + {
  93626. + p_LnxWrpFmDev->txPorts[j].settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
  93627. + memset(p_LnxWrpFmDev->txPorts[j].settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
  93628. + }
  93629. + for (j=0; j<FM_MAX_NUM_OF_OH_PORTS-1; j++)
  93630. + {
  93631. + p_LnxWrpFmDev->opPorts[j].settings.advConfig = (t_SysObjectAdvConfigEntry*)XX_Malloc(FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry));
  93632. + memset(p_LnxWrpFmDev->opPorts[j].settings.advConfig, 0, (FM_MAX_NUM_OF_ADV_SETTINGS*sizeof(t_SysObjectAdvConfigEntry)));
  93633. + }
  93634. +
  93635. + return p_LnxWrpFmDev;
  93636. +}
  93637. +
  93638. +static void DestroyFmDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
  93639. +{
  93640. + int j;
  93641. +
  93642. + for (j=0; j<FM_MAX_NUM_OF_OH_PORTS-1; j++)
  93643. + if (p_LnxWrpFmDev->opPorts[j].settings.advConfig)
  93644. + XX_Free(p_LnxWrpFmDev->opPorts[j].settings.advConfig);
  93645. + for (j=0; j<FM_MAX_NUM_OF_TX_PORTS; j++)
  93646. + if (p_LnxWrpFmDev->txPorts[j].settings.advConfig)
  93647. + XX_Free(p_LnxWrpFmDev->txPorts[j].settings.advConfig);
  93648. + for (j=0; j<FM_MAX_NUM_OF_RX_PORTS; j++)
  93649. + if (p_LnxWrpFmDev->rxPorts[j].settings.advConfig)
  93650. + XX_Free(p_LnxWrpFmDev->rxPorts[j].settings.advConfig);
  93651. + if (p_LnxWrpFmDev->hcPort.settings.advConfig)
  93652. + XX_Free(p_LnxWrpFmDev->hcPort.settings.advConfig);
  93653. + if (p_LnxWrpFmDev->fmPcdDevSettings.advConfig)
  93654. + XX_Free(p_LnxWrpFmDev->fmPcdDevSettings.advConfig);
  93655. + if (p_LnxWrpFmDev->fmDevSettings.advConfig)
  93656. + XX_Free(p_LnxWrpFmDev->fmDevSettings.advConfig);
  93657. +
  93658. + XX_Free(p_LnxWrpFmDev);
  93659. +}
  93660. +
  93661. +static t_Error FillRestFmInfo(t_LnxWrpFmDev *p_LnxWrpFmDev)
  93662. +{
  93663. +#define FM_BMI_PPIDS_OFFSET 0x00080304
  93664. +#define FM_DMA_PLR_OFFSET 0x000c2060
  93665. +#define FM_FPM_IP_REV_1_OFFSET 0x000c30c4
  93666. +#define DMA_HIGH_LIODN_MASK 0x0FFF0000
  93667. +#define DMA_LOW_LIODN_MASK 0x00000FFF
  93668. +#define DMA_LIODN_SHIFT 16
  93669. +
  93670. +typedef _Packed struct {
  93671. + uint32_t plr[32];
  93672. +} _PackedType t_Plr;
  93673. +
  93674. +typedef _Packed struct {
  93675. + volatile uint32_t fmbm_ppid[63];
  93676. +} _PackedType t_Ppids;
  93677. +
  93678. + t_Plr *p_Plr;
  93679. + t_Ppids *p_Ppids;
  93680. + int i,j;
  93681. + uint32_t fmRev;
  93682. +
  93683. + static const uint8_t phys1GRxPortId[] = {0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf};
  93684. + static const uint8_t phys10GRxPortId[] = {0x10,0x11};
  93685. +#if (DPAA_VERSION >= 11)
  93686. + static const uint8_t physOhPortId[] = {/* 0x1, */0x2,0x3,0x4,0x5,0x6,0x7};
  93687. +#else
  93688. + static const uint8_t physOhPortId[] = {0x1,0x2,0x3,0x4,0x5,0x6,0x7};
  93689. +#endif
  93690. + static const uint8_t phys1GTxPortId[] = {0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f};
  93691. + static const uint8_t phys10GTxPortId[] = {0x30,0x31};
  93692. +
  93693. + fmRev = (uint32_t)(*((volatile uint32_t *)UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr+FM_FPM_IP_REV_1_OFFSET)));
  93694. + fmRev &= 0xffff;
  93695. +
  93696. + p_Plr = (t_Plr *)UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr+FM_DMA_PLR_OFFSET);
  93697. +#ifdef MODULE
  93698. + for (i=0;i<FM_MAX_NUM_OF_PARTITIONS/2;i++)
  93699. + p_Plr->plr[i] = 0;
  93700. +#endif /* MODULE */
  93701. +
  93702. + for (i=0; i<FM_MAX_NUM_OF_PARTITIONS; i++)
  93703. + {
  93704. + uint16_t liodnBase = (uint16_t)((i%2) ?
  93705. + (p_Plr->plr[i/2] & DMA_LOW_LIODN_MASK) :
  93706. + ((p_Plr->plr[i/2] & DMA_HIGH_LIODN_MASK) >> DMA_LIODN_SHIFT));
  93707. +#ifdef FM_PARTITION_ARRAY
  93708. + /* TODO: this was .liodnPerPartition[i] = liodnBase; is the index meaning the same? */
  93709. + p_LnxWrpFmDev->fmDevSettings.param.liodnBasePerPort[i] = liodnBase;
  93710. +#endif /* FM_PARTITION_ARRAY */
  93711. +
  93712. + if ((i >= phys1GRxPortId[0]) &&
  93713. + (i <= phys1GRxPortId[FM_MAX_NUM_OF_1G_RX_PORTS-1]))
  93714. + {
  93715. + for (j=0; j<ARRAY_SIZE(phys1GRxPortId); j++)
  93716. + if (phys1GRxPortId[j] == i)
  93717. + break;
  93718. + ASSERT_COND(j<ARRAY_SIZE(phys1GRxPortId));
  93719. + p_LnxWrpFmDev->rxPorts[j].settings.param.liodnBase = liodnBase;
  93720. + }
  93721. + else if (FM_MAX_NUM_OF_10G_RX_PORTS &&
  93722. + (i >= phys10GRxPortId[0]) &&
  93723. + (i <= phys10GRxPortId[FM_MAX_NUM_OF_10G_RX_PORTS-1]))
  93724. + {
  93725. + for (j=0; j<ARRAY_SIZE(phys10GRxPortId); j++)
  93726. + if (phys10GRxPortId[j] == i)
  93727. + break;
  93728. + ASSERT_COND(j<ARRAY_SIZE(phys10GRxPortId));
  93729. + p_LnxWrpFmDev->rxPorts[FM_MAX_NUM_OF_1G_RX_PORTS+j].settings.param.liodnBase = liodnBase;
  93730. + }
  93731. + else if ((i >= physOhPortId[0]) &&
  93732. + (i <= physOhPortId[FM_MAX_NUM_OF_OH_PORTS-1]))
  93733. + {
  93734. + for (j=0; j<ARRAY_SIZE(physOhPortId); j++)
  93735. + if (physOhPortId[j] == i)
  93736. + break;
  93737. + ASSERT_COND(j<ARRAY_SIZE(physOhPortId));
  93738. + if (j == 0)
  93739. + p_LnxWrpFmDev->hcPort.settings.param.liodnBase = liodnBase;
  93740. + else
  93741. + p_LnxWrpFmDev->opPorts[j - 1].settings.param.liodnBase = liodnBase;
  93742. + }
  93743. + else if ((i >= phys1GTxPortId[0]) &&
  93744. + (i <= phys1GTxPortId[FM_MAX_NUM_OF_1G_TX_PORTS-1]))
  93745. + {
  93746. + for (j=0; j<ARRAY_SIZE(phys1GTxPortId); j++)
  93747. + if (phys1GTxPortId[j] == i)
  93748. + break;
  93749. + ASSERT_COND(j<ARRAY_SIZE(phys1GTxPortId));
  93750. + p_LnxWrpFmDev->txPorts[j].settings.param.liodnBase = liodnBase;
  93751. + }
  93752. + else if (FM_MAX_NUM_OF_10G_TX_PORTS &&
  93753. + (i >= phys10GTxPortId[0]) &&
  93754. + (i <= phys10GTxPortId[FM_MAX_NUM_OF_10G_TX_PORTS-1]))
  93755. + {
  93756. + for (j=0; j<ARRAY_SIZE(phys10GTxPortId); j++)
  93757. + if (phys10GTxPortId[j] == i)
  93758. + break;
  93759. + ASSERT_COND(j<ARRAY_SIZE(phys10GTxPortId));
  93760. + p_LnxWrpFmDev->txPorts[FM_MAX_NUM_OF_1G_TX_PORTS+j].settings.param.liodnBase = liodnBase;
  93761. + }
  93762. + }
  93763. +
  93764. + p_Ppids = (t_Ppids *)UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr+FM_BMI_PPIDS_OFFSET);
  93765. +
  93766. + for (i=0; i<FM_MAX_NUM_OF_1G_RX_PORTS; i++)
  93767. + p_LnxWrpFmDev->rxPorts[i].settings.param.specificParams.rxParams.liodnOffset =
  93768. + p_Ppids->fmbm_ppid[phys1GRxPortId[i]-1];
  93769. +
  93770. + for (i=0; i<FM_MAX_NUM_OF_10G_RX_PORTS; i++)
  93771. + p_LnxWrpFmDev->rxPorts[FM_MAX_NUM_OF_1G_RX_PORTS+i].settings.param.specificParams.rxParams.liodnOffset =
  93772. + p_Ppids->fmbm_ppid[phys10GRxPortId[i]-1];
  93773. +
  93774. + return E_OK;
  93775. +}
  93776. +
  93777. +/**
  93778. + * FindFmanMicrocode - find the Fman microcode
  93779. + *
  93780. + * This function returns a pointer to the QE Firmware blob that holds
  93781. + * the Fman microcode. We use the QE Firmware structure because Fman microcode
  93782. + * is similar to QE microcode, so there's no point in defining a new layout.
  93783. + *
  93784. + * Current versions of U-Boot embed the Fman firmware into the device tree,
  93785. + * so we check for that first. Each Fman node in the device tree contains a
  93786. + * node or a pointer to node that holds the firmware. Technically, we should
  93787. + * be fetching the firmware node for the current Fman, but we don't have that
  93788. + * information any more, so we assume that there is only one firmware node in
  93789. + * the device tree, and that all Fmen use the same firmware.
  93790. + */
  93791. +static const struct qe_firmware *FindFmanMicrocode(void)
  93792. +{
  93793. + static const struct qe_firmware *P4080_UCPatch;
  93794. + struct device_node *np;
  93795. +
  93796. + if (P4080_UCPatch)
  93797. + return P4080_UCPatch;
  93798. +
  93799. + /* The firmware should be inside the device tree. */
  93800. + np = of_find_compatible_node(NULL, NULL, "fsl,fman-firmware");
  93801. + if (np) {
  93802. + P4080_UCPatch = of_get_property(np, "fsl,firmware", NULL);
  93803. + of_node_put(np);
  93804. + if (P4080_UCPatch)
  93805. + return P4080_UCPatch;
  93806. + else
  93807. + REPORT_ERROR(WARNING, E_NOT_FOUND, ("firmware node is incomplete"));
  93808. + }
  93809. +
  93810. + /* Returning NULL here forces the reuse of the IRAM content */
  93811. + return NULL;
  93812. +}
  93813. +#define SVR_SECURITY_MASK 0x00080000
  93814. +#define SVR_PERSONALITY_MASK 0x0000FF00
  93815. +#define SVR_VER_IGNORE_MASK (SVR_SECURITY_MASK | SVR_PERSONALITY_MASK)
  93816. +#define SVR_B4860_REV1_VALUE 0x86800010
  93817. +#define SVR_B4860_REV2_VALUE 0x86800020
  93818. +#define SVR_T4240_VALUE 0x82400000
  93819. +#define SVR_T4120_VALUE 0x82400100
  93820. +#define SVR_T4160_VALUE 0x82410000
  93821. +#define SVR_T4080_VALUE 0x82410200
  93822. +#define SVR_T4_DEVICE_ID 0x82400000
  93823. +#define SVR_DEVICE_ID_MASK 0xFFF00000
  93824. +
  93825. +static t_LnxWrpFmDev * ReadFmDevTreeNode (struct platform_device *of_dev)
  93826. +{
  93827. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  93828. + struct device_node *fm_node, *dev_node;
  93829. + struct of_device_id name;
  93830. + struct resource res;
  93831. + struct clk *clk;
  93832. + u32 clk_rate;
  93833. + const uint32_t *uint32_prop;
  93834. + int _errno=0, lenp;
  93835. + uint32_t tmp_prop;
  93836. +
  93837. + fm_node = of_node_get(of_dev->dev.of_node);
  93838. +
  93839. + uint32_prop = (uint32_t *)of_get_property(fm_node, "cell-index", &lenp);
  93840. + if (unlikely(uint32_prop == NULL)) {
  93841. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_get_property(%s, cell-index) failed", fm_node->full_name));
  93842. + return NULL;
  93843. + }
  93844. + tmp_prop = be32_to_cpu(*uint32_prop);
  93845. +
  93846. + if (WARN_ON(lenp != sizeof(uint32_t)))
  93847. + return NULL;
  93848. +
  93849. + if (tmp_prop > INTG_MAX_NUM_OF_FM) {
  93850. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("fm id!"));
  93851. + return NULL;
  93852. + }
  93853. + p_LnxWrpFmDev = CreateFmDev(tmp_prop);
  93854. + if (!p_LnxWrpFmDev) {
  93855. + REPORT_ERROR(MAJOR, E_NULL_POINTER, NO_MSG);
  93856. + return NULL;
  93857. + }
  93858. + p_LnxWrpFmDev->dev = &of_dev->dev;
  93859. + p_LnxWrpFmDev->id = tmp_prop;
  93860. +
  93861. + /* Get the FM interrupt */
  93862. + p_LnxWrpFmDev->irq = of_irq_to_resource(fm_node, 0, NULL);
  93863. + if (unlikely(p_LnxWrpFmDev->irq == /*NO_IRQ*/0)) {
  93864. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_irq_to_resource() = %d", NO_IRQ));
  93865. + return NULL;
  93866. + }
  93867. +
  93868. + /* Get the FM error interrupt */
  93869. + p_LnxWrpFmDev->err_irq = of_irq_to_resource(fm_node, 1, NULL);
  93870. +
  93871. + if (unlikely(p_LnxWrpFmDev->err_irq == /*NO_IRQ*/0)) {
  93872. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_irq_to_resource() = %d", NO_IRQ));
  93873. + return NULL;
  93874. + }
  93875. +
  93876. + /* Get the FM address */
  93877. + _errno = of_address_to_resource(fm_node, 0, &res);
  93878. + if (unlikely(_errno < 0)) {
  93879. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
  93880. + return NULL;
  93881. + }
  93882. +
  93883. +
  93884. + p_LnxWrpFmDev->fmBaseAddr = 0;
  93885. + p_LnxWrpFmDev->fmPhysBaseAddr = res.start;
  93886. + p_LnxWrpFmDev->fmMemSize = res.end + 1 - res.start;
  93887. +
  93888. + clk = of_clk_get(fm_node, 0);
  93889. + if (IS_ERR(clk)) {
  93890. + dev_err(&of_dev->dev, "%s: Failed to get FM clock structure\n",
  93891. + __func__);
  93892. + of_node_put(fm_node);
  93893. + return NULL;
  93894. + }
  93895. +
  93896. + clk_rate = clk_get_rate(clk);
  93897. + if (!clk_rate) {
  93898. + dev_err(&of_dev->dev, "%s: Failed to determine FM clock rate\n",
  93899. + __func__);
  93900. + of_node_put(fm_node);
  93901. + return NULL;
  93902. + }
  93903. +
  93904. + p_LnxWrpFmDev->fmDevSettings.param.fmClkFreq = DIV_ROUND_UP(clk_rate, 1000000); /* In MHz, rounded */
  93905. + /* Get the MURAM base address and size */
  93906. + memset(&name, 0, sizeof(struct of_device_id));
  93907. + if (WARN_ON(strlen("muram") >= sizeof(name.name)))
  93908. + return NULL;
  93909. + strcpy(name.name, "muram");
  93910. + if (WARN_ON(strlen("fsl,fman-muram") >= sizeof(name.compatible)))
  93911. + return NULL;
  93912. + strcpy(name.compatible, "fsl,fman-muram");
  93913. + for_each_child_of_node(fm_node, dev_node) {
  93914. + if (likely(of_match_node(&name, dev_node) != NULL)) {
  93915. + _errno = of_address_to_resource(dev_node, 0, &res);
  93916. + if (unlikely(_errno < 0)) {
  93917. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
  93918. + return NULL;
  93919. + }
  93920. +
  93921. + p_LnxWrpFmDev->fmMuramBaseAddr = 0;
  93922. + p_LnxWrpFmDev->fmMuramPhysBaseAddr = res.start;
  93923. + p_LnxWrpFmDev->fmMuramMemSize = res.end + 1 - res.start;
  93924. +
  93925. +#ifndef CONFIG_FMAN_ARM
  93926. + {
  93927. + uint32_t svr;
  93928. + svr = mfspr(SPRN_SVR);
  93929. +
  93930. + if ((svr & ~SVR_VER_IGNORE_MASK) >= SVR_B4860_REV2_VALUE)
  93931. + p_LnxWrpFmDev->fmMuramMemSize = 0x80000;
  93932. + }
  93933. +#endif
  93934. + }
  93935. + }
  93936. +
  93937. + /* Get the RTC base address and size */
  93938. + memset(&name, 0, sizeof(struct of_device_id));
  93939. + if (WARN_ON(strlen("rtc") >= sizeof(name.name)))
  93940. + return NULL;
  93941. + strcpy(name.name, "rtc");
  93942. + if (WARN_ON(strlen("fsl,fman-rtc") >= sizeof(name.compatible)))
  93943. + return NULL;
  93944. + strcpy(name.compatible, "fsl,fman-rtc");
  93945. + for_each_child_of_node(fm_node, dev_node) {
  93946. + if (likely(of_match_node(&name, dev_node) != NULL)) {
  93947. + _errno = of_address_to_resource(dev_node, 0, &res);
  93948. + if (unlikely(_errno < 0)) {
  93949. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
  93950. + return NULL;
  93951. + }
  93952. +
  93953. + p_LnxWrpFmDev->fmRtcBaseAddr = 0;
  93954. + p_LnxWrpFmDev->fmRtcPhysBaseAddr = res.start;
  93955. + p_LnxWrpFmDev->fmRtcMemSize = res.end + 1 - res.start;
  93956. + }
  93957. + }
  93958. +
  93959. +#if (DPAA_VERSION >= 11)
  93960. + /* Get the VSP base address */
  93961. + for_each_child_of_node(fm_node, dev_node) {
  93962. + if (of_device_is_compatible(dev_node, "fsl,fman-vsps")) {
  93963. + _errno = of_address_to_resource(dev_node, 0, &res);
  93964. + if (unlikely(_errno < 0)) {
  93965. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("of_address_to_resource() = %d", _errno));
  93966. + return NULL;
  93967. + }
  93968. + p_LnxWrpFmDev->fmVspBaseAddr = 0;
  93969. + p_LnxWrpFmDev->fmVspPhysBaseAddr = res.start;
  93970. + p_LnxWrpFmDev->fmVspMemSize = res.end + 1 - res.start;
  93971. + }
  93972. + }
  93973. +#endif
  93974. +
  93975. + /* Get all PCD nodes */
  93976. + memset(&name, 0, sizeof(struct of_device_id));
  93977. + if (WARN_ON(strlen("parser") >= sizeof(name.name)))
  93978. + return NULL;
  93979. + strcpy(name.name, "parser");
  93980. + if (WARN_ON(strlen("fsl,fman-parser") >= sizeof(name.compatible)))
  93981. + return NULL;
  93982. + strcpy(name.compatible, "fsl,fman-parser");
  93983. + for_each_child_of_node(fm_node, dev_node)
  93984. + if (likely(of_match_node(&name, dev_node) != NULL))
  93985. + p_LnxWrpFmDev->prsActive = TRUE;
  93986. +
  93987. + memset(&name, 0, sizeof(struct of_device_id));
  93988. + if (WARN_ON(strlen("keygen") >= sizeof(name.name)))
  93989. + return NULL;
  93990. + strcpy(name.name, "keygen");
  93991. + if (WARN_ON(strlen("fsl,fman-keygen") >= sizeof(name.compatible)))
  93992. + return NULL;
  93993. + strcpy(name.compatible, "fsl,fman-keygen");
  93994. + for_each_child_of_node(fm_node, dev_node)
  93995. + if (likely(of_match_node(&name, dev_node) != NULL))
  93996. + p_LnxWrpFmDev->kgActive = TRUE;
  93997. +
  93998. + memset(&name, 0, sizeof(struct of_device_id));
  93999. + if (WARN_ON(strlen("cc") >= sizeof(name.name)))
  94000. + return NULL;
  94001. + strcpy(name.name, "cc");
  94002. + if (WARN_ON(strlen("fsl,fman-cc") >= sizeof(name.compatible)))
  94003. + return NULL;
  94004. + strcpy(name.compatible, "fsl,fman-cc");
  94005. + for_each_child_of_node(fm_node, dev_node)
  94006. + if (likely(of_match_node(&name, dev_node) != NULL))
  94007. + p_LnxWrpFmDev->ccActive = TRUE;
  94008. +
  94009. + memset(&name, 0, sizeof(struct of_device_id));
  94010. + if (WARN_ON(strlen("policer") >= sizeof(name.name)))
  94011. + return NULL;
  94012. + strcpy(name.name, "policer");
  94013. + if (WARN_ON(strlen("fsl,fman-policer") >= sizeof(name.compatible)))
  94014. + return NULL;
  94015. + strcpy(name.compatible, "fsl,fman-policer");
  94016. + for_each_child_of_node(fm_node, dev_node)
  94017. + if (likely(of_match_node(&name, dev_node) != NULL))
  94018. + p_LnxWrpFmDev->plcrActive = TRUE;
  94019. +
  94020. + if (p_LnxWrpFmDev->prsActive || p_LnxWrpFmDev->kgActive ||
  94021. + p_LnxWrpFmDev->ccActive || p_LnxWrpFmDev->plcrActive)
  94022. + p_LnxWrpFmDev->pcdActive = TRUE;
  94023. +
  94024. + if (p_LnxWrpFmDev->pcdActive)
  94025. + {
  94026. + const char *str_prop = (char *)of_get_property(fm_node, "fsl,default-pcd", &lenp);
  94027. + if (str_prop) {
  94028. + if (strncmp(str_prop, "3-tuple", strlen("3-tuple")) == 0)
  94029. + p_LnxWrpFmDev->defPcd = e_FM_PCD_3_TUPLE;
  94030. + }
  94031. + else
  94032. + p_LnxWrpFmDev->defPcd = e_NO_PCD;
  94033. + }
  94034. +
  94035. + of_node_put(fm_node);
  94036. +
  94037. + p_LnxWrpFmDev->hcCh =
  94038. + qman_affine_channel(cpumask_first(qman_affine_cpus()));
  94039. +
  94040. + p_LnxWrpFmDev->active = TRUE;
  94041. +
  94042. + return p_LnxWrpFmDev;
  94043. +}
  94044. +
  94045. +struct device_node *GetFmAdvArgsDevTreeNode (uint8_t fmIndx)
  94046. +{
  94047. + struct device_node *dev_node;
  94048. + const uint32_t *uint32_prop;
  94049. + int lenp;
  94050. + uint32_t tmp_prop;
  94051. +
  94052. + for_each_compatible_node(dev_node, NULL, "fsl,fman-extended-args") {
  94053. + uint32_prop = (uint32_t *)of_get_property(dev_node, "cell-index", &lenp);
  94054. + if (unlikely(uint32_prop == NULL)) {
  94055. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  94056. + ("of_get_property(%s, cell-index) failed",
  94057. + dev_node->full_name));
  94058. + return NULL;
  94059. + }
  94060. + tmp_prop = be32_to_cpu(*uint32_prop);
  94061. + if (WARN_ON(lenp != sizeof(uint32_t)))
  94062. + return NULL;
  94063. + if (tmp_prop > INTG_MAX_NUM_OF_FM) {
  94064. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("fm id!"));
  94065. + return NULL;
  94066. + }
  94067. + if (fmIndx == tmp_prop)
  94068. + return dev_node;
  94069. + }
  94070. +
  94071. + return NULL;
  94072. +}
  94073. +
  94074. +static t_Error CheckNConfigFmAdvArgs (t_LnxWrpFmDev *p_LnxWrpFmDev)
  94075. +{
  94076. + struct device_node *dev_node;
  94077. + t_Error err = E_INVALID_VALUE;
  94078. + const uint32_t *uint32_prop;
  94079. + const char *str_prop;
  94080. + int lenp;
  94081. + uint32_t tmp_prop;
  94082. +
  94083. + dev_node = GetFmAdvArgsDevTreeNode(p_LnxWrpFmDev->id);
  94084. + if (!dev_node) /* no advance parameters for FMan */
  94085. + return E_OK;
  94086. +
  94087. + str_prop = (char *)of_get_property(dev_node, "dma-aid-mode", &lenp);
  94088. + if (str_prop) {
  94089. + if (strcmp(str_prop, "port") == 0)
  94090. + err = FM_ConfigDmaAidMode(p_LnxWrpFmDev->h_Dev, e_FM_DMA_AID_OUT_PORT_ID);
  94091. + else if (strcmp(str_prop, "tnum") == 0)
  94092. + err = FM_ConfigDmaAidMode(p_LnxWrpFmDev->h_Dev, e_FM_DMA_AID_OUT_TNUM);
  94093. +
  94094. + if (err != E_OK)
  94095. + RETURN_ERROR(MINOR, err, NO_MSG);
  94096. + }
  94097. +
  94098. + uint32_prop = (uint32_t *)of_get_property(dev_node,
  94099. + "total-fifo-size", &lenp);
  94100. + if (uint32_prop) {
  94101. + tmp_prop = be32_to_cpu(*uint32_prop);
  94102. + if (WARN_ON(lenp != sizeof(uint32_t)))
  94103. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  94104. +
  94105. + if (FM_ConfigTotalFifoSize(p_LnxWrpFmDev->h_Dev,
  94106. + tmp_prop) != E_OK)
  94107. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  94108. + }
  94109. +
  94110. + uint32_prop = (uint32_t *)of_get_property(dev_node, "tnum-aging-period",
  94111. + &lenp);
  94112. + if (uint32_prop) {
  94113. + tmp_prop = be32_to_cpu(*uint32_prop);
  94114. + if (WARN_ON(lenp != sizeof(uint32_t)))
  94115. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  94116. +
  94117. + err = FM_ConfigTnumAgingPeriod(p_LnxWrpFmDev->h_Dev,
  94118. + (uint16_t)tmp_prop/*tnumAgingPeriod*/);
  94119. +
  94120. + if (err != E_OK)
  94121. + RETURN_ERROR(MINOR, err, NO_MSG);
  94122. + }
  94123. +
  94124. + of_node_put(dev_node);
  94125. +
  94126. + return E_OK;
  94127. +}
  94128. +
  94129. +static void LnxwrpFmDevExceptionsCb(t_Handle h_App, e_FmExceptions exception)
  94130. +{
  94131. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *)h_App;
  94132. +
  94133. + ASSERT_COND(p_LnxWrpFmDev);
  94134. +
  94135. + DBG(INFO, ("got fm exception %d", exception));
  94136. +
  94137. + /* do nothing */
  94138. + UNUSED(exception);
  94139. +}
  94140. +
  94141. +static void LnxwrpFmDevBusErrorCb(t_Handle h_App,
  94142. + e_FmPortType portType,
  94143. + uint8_t portId,
  94144. + uint64_t addr,
  94145. + uint8_t tnum,
  94146. + uint16_t liodn)
  94147. +{
  94148. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *)h_App;
  94149. +
  94150. + ASSERT_COND(p_LnxWrpFmDev);
  94151. +
  94152. + /* do nothing */
  94153. + UNUSED(portType);UNUSED(portId);UNUSED(addr);UNUSED(tnum);UNUSED(liodn);
  94154. +}
  94155. +
  94156. +static t_Error ConfigureFmDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
  94157. +{
  94158. + struct resource *dev_res;
  94159. + int _errno;
  94160. +
  94161. + if (!p_LnxWrpFmDev->active)
  94162. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM not configured!!!"));
  94163. +
  94164. +#ifndef MODULE
  94165. + _errno = can_request_irq(p_LnxWrpFmDev->irq, 0);
  94166. + if (unlikely(_errno < 0))
  94167. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("can_request_irq() = %d", _errno));
  94168. +#endif
  94169. + _errno = devm_request_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->irq, fm_irq, 0, "fman", p_LnxWrpFmDev);
  94170. + if (unlikely(_errno < 0))
  94171. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("request_irq(%d) = %d", p_LnxWrpFmDev->irq, _errno));
  94172. +
  94173. + enable_irq_wake(p_LnxWrpFmDev->irq);
  94174. +
  94175. + if (p_LnxWrpFmDev->err_irq != 0) {
  94176. +#ifndef MODULE
  94177. + _errno = can_request_irq(p_LnxWrpFmDev->err_irq, 0);
  94178. + if (unlikely(_errno < 0))
  94179. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("can_request_irq() = %d", _errno));
  94180. +#endif
  94181. + _errno = devm_request_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->err_irq, fm_err_irq, IRQF_SHARED, "fman-err", p_LnxWrpFmDev);
  94182. + if (unlikely(_errno < 0))
  94183. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("request_irq(%d) = %d", p_LnxWrpFmDev->err_irq, _errno));
  94184. +
  94185. + enable_irq_wake(p_LnxWrpFmDev->err_irq);
  94186. + }
  94187. +
  94188. + p_LnxWrpFmDev->res = devm_request_mem_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize, "fman");
  94189. + if (unlikely(p_LnxWrpFmDev->res == NULL))
  94190. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("request_mem_region() failed"));
  94191. +
  94192. + p_LnxWrpFmDev->fmBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize));
  94193. + if (unlikely(p_LnxWrpFmDev->fmBaseAddr == 0))
  94194. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
  94195. +
  94196. + if (SYS_RegisterIoMap((uint64_t)p_LnxWrpFmDev->fmBaseAddr, (uint64_t)p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize) != E_OK)
  94197. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM memory map"));
  94198. +
  94199. + dev_res = __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize, "fman-muram");
  94200. + if (unlikely(dev_res == NULL))
  94201. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("__devm_request_region() failed"));
  94202. +
  94203. + p_LnxWrpFmDev->fmMuramBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize));
  94204. + if (unlikely(p_LnxWrpFmDev->fmMuramBaseAddr == 0))
  94205. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
  94206. +
  94207. + if (SYS_RegisterIoMap((uint64_t)p_LnxWrpFmDev->fmMuramBaseAddr, (uint64_t)p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize) != E_OK)
  94208. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM MURAM memory map"));
  94209. +
  94210. + if (p_LnxWrpFmDev->fmRtcPhysBaseAddr)
  94211. + {
  94212. + dev_res = __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize, "fman-rtc");
  94213. + if (unlikely(dev_res == NULL))
  94214. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("__devm_request_region() failed"));
  94215. +
  94216. + p_LnxWrpFmDev->fmRtcBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize));
  94217. + if (unlikely(p_LnxWrpFmDev->fmRtcBaseAddr == 0))
  94218. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
  94219. +
  94220. + if (SYS_RegisterIoMap((uint64_t)p_LnxWrpFmDev->fmRtcBaseAddr, (uint64_t)p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize) != E_OK)
  94221. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-RTC memory map"));
  94222. + }
  94223. +
  94224. +#if (DPAA_VERSION >= 11)
  94225. + if (p_LnxWrpFmDev->fmVspPhysBaseAddr) {
  94226. + dev_res = __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmVspPhysBaseAddr, p_LnxWrpFmDev->fmVspMemSize, "fman-vsp");
  94227. + if (unlikely(dev_res == NULL))
  94228. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("__devm_request_region() failed"));
  94229. +
  94230. + p_LnxWrpFmDev->fmVspBaseAddr = PTR_TO_UINT(devm_ioremap(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmVspPhysBaseAddr, p_LnxWrpFmDev->fmVspMemSize));
  94231. + if (unlikely(p_LnxWrpFmDev->fmVspBaseAddr == 0))
  94232. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("devm_ioremap() failed"));
  94233. + }
  94234. +#endif
  94235. +
  94236. + p_LnxWrpFmDev->fmDevSettings.param.baseAddr = p_LnxWrpFmDev->fmBaseAddr;
  94237. + p_LnxWrpFmDev->fmDevSettings.param.fmId = p_LnxWrpFmDev->id;
  94238. + p_LnxWrpFmDev->fmDevSettings.param.irq = NO_IRQ;
  94239. + p_LnxWrpFmDev->fmDevSettings.param.errIrq = NO_IRQ;
  94240. + p_LnxWrpFmDev->fmDevSettings.param.f_Exception = LnxwrpFmDevExceptionsCb;
  94241. + p_LnxWrpFmDev->fmDevSettings.param.f_BusError = LnxwrpFmDevBusErrorCb;
  94242. + p_LnxWrpFmDev->fmDevSettings.param.h_App = p_LnxWrpFmDev;
  94243. +
  94244. + return FillRestFmInfo(p_LnxWrpFmDev);
  94245. +}
  94246. +
  94247. +#ifndef CONFIG_FMAN_ARM
  94248. +/*
  94249. + * Table for matching compatible strings, for device tree
  94250. + * guts node, for QorIQ SOCs.
  94251. + * "fsl,qoriq-device-config-2.0" corresponds to T4 & B4
  94252. + * SOCs. For the older SOCs "fsl,qoriq-device-config-1.0"
  94253. + * string would be used.
  94254. +*/
  94255. +static const struct of_device_id guts_device_ids[] = {
  94256. + { .compatible = "fsl,qoriq-device-config-1.0", },
  94257. + { .compatible = "fsl,qoriq-device-config-2.0", },
  94258. + {}
  94259. +};
  94260. +
  94261. +static unsigned int get_rcwsr(int regnum)
  94262. +{
  94263. + struct ccsr_guts __iomem *guts_regs = NULL;
  94264. + struct device_node *guts_node;
  94265. +
  94266. + guts_node = of_find_matching_node(NULL, guts_device_ids);
  94267. + if (!guts_node) {
  94268. + pr_err("could not find GUTS node\n");
  94269. + return 0;
  94270. + }
  94271. + guts_regs = of_iomap(guts_node, 0);
  94272. + of_node_put(guts_node);
  94273. + if (!guts_regs) {
  94274. + pr_err("ioremap of GUTS node failed\n");
  94275. + return 0;
  94276. + }
  94277. +
  94278. + return ioread32be(&guts_regs->rcwsr[regnum]);
  94279. +}
  94280. +#endif
  94281. +
  94282. +static t_Error InitFmDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
  94283. +{
  94284. + const struct qe_firmware *fw;
  94285. +
  94286. + if (!p_LnxWrpFmDev->active)
  94287. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM not configured!!!"));
  94288. +
  94289. + if ((p_LnxWrpFmDev->h_MuramDev = FM_MURAM_ConfigAndInit(p_LnxWrpFmDev->fmMuramBaseAddr, p_LnxWrpFmDev->fmMuramMemSize)) == NULL)
  94290. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-MURAM!"));
  94291. +
  94292. + /* Loading the fman-controller code */
  94293. + fw = FindFmanMicrocode();
  94294. +
  94295. + if (!fw) {
  94296. + /* this forces the reuse of the current IRAM content */
  94297. + p_LnxWrpFmDev->fmDevSettings.param.firmware.size = 0;
  94298. + p_LnxWrpFmDev->fmDevSettings.param.firmware.p_Code = NULL;
  94299. + } else {
  94300. + p_LnxWrpFmDev->fmDevSettings.param.firmware.p_Code =
  94301. + (void *) fw + be32_to_cpu(fw->microcode[0].code_offset);
  94302. + p_LnxWrpFmDev->fmDevSettings.param.firmware.size =
  94303. + sizeof(u32) * be32_to_cpu(fw->microcode[0].count);
  94304. + DBG(INFO, ("Loading fman-controller code version %d.%d.%d",
  94305. + fw->microcode[0].major,
  94306. + fw->microcode[0].minor,
  94307. + fw->microcode[0].revision));
  94308. + }
  94309. +
  94310. +#ifdef CONFIG_FMAN_ARM
  94311. + { /* endianness adjustments: byteswap the ucode retrieved from the f/w blob */
  94312. + int i;
  94313. + int usz = p_LnxWrpFmDev->fmDevSettings.param.firmware.size;
  94314. + void * p_Code = p_LnxWrpFmDev->fmDevSettings.param.firmware.p_Code;
  94315. +
  94316. + for(i=0; i < usz / 4; ++i)
  94317. + ((u32 *)p_Code)[i] = be32_to_cpu(((u32 *)p_Code)[i]);
  94318. + }
  94319. +#endif
  94320. +
  94321. + p_LnxWrpFmDev->fmDevSettings.param.h_FmMuram = p_LnxWrpFmDev->h_MuramDev;
  94322. +
  94323. +#if (DPAA_VERSION >= 11)
  94324. + if (p_LnxWrpFmDev->fmVspBaseAddr) {
  94325. + p_LnxWrpFmDev->fmDevSettings.param.vspBaseAddr = p_LnxWrpFmDev->fmVspBaseAddr;
  94326. + p_LnxWrpFmDev->fmDevSettings.param.partVSPBase = 0;
  94327. + p_LnxWrpFmDev->fmDevSettings.param.partNumOfVSPs = FM_VSP_MAX_NUM_OF_ENTRIES;
  94328. + }
  94329. +#endif
  94330. +
  94331. +#ifdef CONFIG_FMAN_ARM
  94332. + p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio = 1;
  94333. +#else
  94334. + if(p_LnxWrpFmDev->fmDevSettings.param.fmId == 0)
  94335. + p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio =
  94336. + !!(get_rcwsr(4) & 0x2); /* RCW[FM_MAC_RAT0] */
  94337. + else
  94338. + p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio =
  94339. + !!(get_rcwsr(4) & 0x1); /* RCW[FM_MAC_RAT1] */
  94340. +
  94341. + {
  94342. + /* T4 Devices ClkRatio is always 1 regardless of RCW[FM_MAC_RAT1] */
  94343. + uint32_t svr;
  94344. + svr = mfspr(SPRN_SVR);
  94345. +
  94346. + if ((svr & SVR_DEVICE_ID_MASK) == SVR_T4_DEVICE_ID)
  94347. + p_LnxWrpFmDev->fmDevSettings.param.fmMacClkRatio = 1;
  94348. + }
  94349. +#endif /* CONFIG_FMAN_ARM */
  94350. +
  94351. + if ((p_LnxWrpFmDev->h_Dev = FM_Config(&p_LnxWrpFmDev->fmDevSettings.param)) == NULL)
  94352. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM"));
  94353. +
  94354. +
  94355. + if (FM_ConfigResetOnInit(p_LnxWrpFmDev->h_Dev, TRUE) != E_OK)
  94356. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM"));
  94357. +
  94358. +#ifdef CONFIG_FMAN_P1023
  94359. + if (FM_ConfigDmaAidOverride(p_LnxWrpFmDev->h_Dev, TRUE) != E_OK)
  94360. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM"));
  94361. +#endif
  94362. +
  94363. +
  94364. + CheckNConfigFmAdvArgs(p_LnxWrpFmDev);
  94365. +
  94366. + if (FM_Init(p_LnxWrpFmDev->h_Dev) != E_OK)
  94367. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM"));
  94368. +
  94369. + /* TODO: Why we mask these interrupts? */
  94370. + if (p_LnxWrpFmDev->err_irq == 0) {
  94371. + FM_SetException(p_LnxWrpFmDev->h_Dev, e_FM_EX_DMA_BUS_ERROR,FALSE);
  94372. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_READ_ECC,FALSE);
  94373. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_SYSTEM_WRITE_ECC,FALSE);
  94374. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_FM_WRITE_ECC,FALSE);
  94375. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_DMA_SINGLE_PORT_ECC, FALSE);
  94376. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_FPM_STALL_ON_TASKS , FALSE);
  94377. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_FPM_SINGLE_ECC, FALSE);
  94378. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_FPM_DOUBLE_ECC,FALSE);
  94379. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_QMI_SINGLE_ECC, FALSE);
  94380. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_QMI_DOUBLE_ECC,FALSE);
  94381. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,FALSE);
  94382. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_LIST_RAM_ECC,FALSE);
  94383. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_STORAGE_PROFILE_ECC, FALSE);
  94384. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_STATISTICS_RAM_ECC, FALSE);
  94385. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_BMI_DISPATCH_RAM_ECC, FALSE);
  94386. + FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_IRAM_ECC,FALSE);
  94387. + /* TODO: FmDisableRamsEcc assert for ramsEccOwners.
  94388. + * FM_SetException(p_LnxWrpFmDev->h_Dev,e_FM_EX_MURAM_ECC,FALSE);*/
  94389. + }
  94390. +
  94391. + if (p_LnxWrpFmDev->fmRtcBaseAddr)
  94392. + {
  94393. + t_FmRtcParams fmRtcParam;
  94394. +
  94395. + memset(&fmRtcParam, 0, sizeof(fmRtcParam));
  94396. + fmRtcParam.h_App = p_LnxWrpFmDev;
  94397. + fmRtcParam.h_Fm = p_LnxWrpFmDev->h_Dev;
  94398. + fmRtcParam.baseAddress = p_LnxWrpFmDev->fmRtcBaseAddr;
  94399. +
  94400. + if(!(p_LnxWrpFmDev->h_RtcDev = FM_RTC_Config(&fmRtcParam)))
  94401. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-RTC"));
  94402. +
  94403. + if (FM_RTC_ConfigPeriod(p_LnxWrpFmDev->h_RtcDev, DPA_PTP_NOMINAL_FREQ_PERIOD_NS) != E_OK)
  94404. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-RTC"));
  94405. +
  94406. + if (FM_RTC_Init(p_LnxWrpFmDev->h_RtcDev) != E_OK)
  94407. + RETURN_ERROR(MAJOR, E_INVALID_STATE, ("FM-RTC"));
  94408. + }
  94409. +
  94410. + return E_OK;
  94411. +}
  94412. +
  94413. +/* TODO: to be moved back here */
  94414. +extern void FreeFmPcdDev(t_LnxWrpFmDev *p_LnxWrpFmDev);
  94415. +
  94416. +static void FreeFmDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
  94417. +{
  94418. + if (!p_LnxWrpFmDev->active)
  94419. + return;
  94420. +
  94421. + FreeFmPcdDev(p_LnxWrpFmDev);
  94422. +
  94423. + if (p_LnxWrpFmDev->h_RtcDev)
  94424. + FM_RTC_Free(p_LnxWrpFmDev->h_RtcDev);
  94425. +
  94426. + if (p_LnxWrpFmDev->h_Dev)
  94427. + FM_Free(p_LnxWrpFmDev->h_Dev);
  94428. +
  94429. + if (p_LnxWrpFmDev->h_MuramDev)
  94430. + FM_MURAM_Free(p_LnxWrpFmDev->h_MuramDev);
  94431. +
  94432. + if (p_LnxWrpFmDev->fmRtcBaseAddr)
  94433. + {
  94434. + SYS_UnregisterIoMap(p_LnxWrpFmDev->fmRtcBaseAddr);
  94435. + devm_iounmap(p_LnxWrpFmDev->dev, UINT_TO_PTR(p_LnxWrpFmDev->fmRtcBaseAddr));
  94436. + __devm_release_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmRtcPhysBaseAddr, p_LnxWrpFmDev->fmRtcMemSize);
  94437. + }
  94438. + SYS_UnregisterIoMap(p_LnxWrpFmDev->fmMuramBaseAddr);
  94439. + devm_iounmap(p_LnxWrpFmDev->dev, UINT_TO_PTR(p_LnxWrpFmDev->fmMuramBaseAddr));
  94440. + __devm_release_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res, p_LnxWrpFmDev->fmMuramPhysBaseAddr, p_LnxWrpFmDev->fmMuramMemSize);
  94441. + SYS_UnregisterIoMap(p_LnxWrpFmDev->fmBaseAddr);
  94442. + devm_iounmap(p_LnxWrpFmDev->dev, UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr));
  94443. + devm_release_mem_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->fmPhysBaseAddr, p_LnxWrpFmDev->fmMemSize);
  94444. + if (p_LnxWrpFmDev->err_irq != 0) {
  94445. + devm_free_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->err_irq, p_LnxWrpFmDev);
  94446. + }
  94447. +
  94448. + devm_free_irq(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->irq, p_LnxWrpFmDev);
  94449. +}
  94450. +
  94451. +/* FMan character device file operations */
  94452. +extern struct file_operations fm_fops;
  94453. +
  94454. +static int /*__devinit*/ fm_probe(struct platform_device *of_dev)
  94455. +{
  94456. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  94457. +
  94458. + if ((p_LnxWrpFmDev = ReadFmDevTreeNode(of_dev)) == NULL)
  94459. + return -EIO;
  94460. + if (ConfigureFmDev(p_LnxWrpFmDev) != E_OK)
  94461. + return -EIO;
  94462. + if (InitFmDev(p_LnxWrpFmDev) != E_OK)
  94463. + return -EIO;
  94464. +
  94465. + /* IOCTL ABI checking */
  94466. + LnxWrpPCDIOCTLEnumChecking();
  94467. + LnxWrpPCDIOCTLTypeChecking();
  94468. +
  94469. + Sprint (p_LnxWrpFmDev->name, "%s%d", DEV_FM_NAME, p_LnxWrpFmDev->id);
  94470. +
  94471. + /* Register to the /dev for IOCTL API */
  94472. + /* Register dynamically a new major number for the character device: */
  94473. + if ((p_LnxWrpFmDev->major = register_chrdev(0, p_LnxWrpFmDev->name, &fm_fops)) <= 0) {
  94474. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Failed to allocate a major number for device \"%s\"", p_LnxWrpFmDev->name));
  94475. + return -EIO;
  94476. + }
  94477. +
  94478. + /* Creating classes for FM */
  94479. + DBG(TRACE ,("class_create fm_class"));
  94480. + p_LnxWrpFmDev->fm_class = class_create(THIS_MODULE, p_LnxWrpFmDev->name);
  94481. + if (IS_ERR(p_LnxWrpFmDev->fm_class)) {
  94482. + unregister_chrdev(p_LnxWrpFmDev->major, p_LnxWrpFmDev->name);
  94483. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("class_create error fm_class"));
  94484. + return -EIO;
  94485. + }
  94486. +
  94487. + device_create(p_LnxWrpFmDev->fm_class, NULL, MKDEV(p_LnxWrpFmDev->major, DEV_FM_MINOR_BASE), NULL,
  94488. + "fm%d", p_LnxWrpFmDev->id);
  94489. + device_create(p_LnxWrpFmDev->fm_class, NULL, MKDEV(p_LnxWrpFmDev->major, DEV_FM_PCD_MINOR_BASE), NULL,
  94490. + "fm%d-pcd", p_LnxWrpFmDev->id);
  94491. + dev_set_drvdata(p_LnxWrpFmDev->dev, p_LnxWrpFmDev);
  94492. +
  94493. + /* create sysfs entries for stats and regs */
  94494. + if ( fm_sysfs_create(p_LnxWrpFmDev->dev) !=0 )
  94495. + {
  94496. + FreeFmDev(p_LnxWrpFmDev);
  94497. + REPORT_ERROR(MAJOR, E_INVALID_STATE, ("Unable to create sysfs entry - fm!!!"));
  94498. + return -EIO;
  94499. + }
  94500. +
  94501. +#ifdef CONFIG_PM
  94502. + device_set_wakeup_capable(p_LnxWrpFmDev->dev, true);
  94503. +#endif
  94504. +
  94505. + DBG(TRACE, ("FM%d probed", p_LnxWrpFmDev->id));
  94506. +
  94507. + return 0;
  94508. +}
  94509. +
  94510. +static int fm_remove(struct platform_device *of_dev)
  94511. +{
  94512. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  94513. + struct device *dev;
  94514. +
  94515. + dev = &of_dev->dev;
  94516. + p_LnxWrpFmDev = dev_get_drvdata(dev);
  94517. +
  94518. + fm_sysfs_destroy(dev);
  94519. +
  94520. + DBG(TRACE, ("destroy fm_class"));
  94521. + device_destroy(p_LnxWrpFmDev->fm_class, MKDEV(p_LnxWrpFmDev->major, DEV_FM_MINOR_BASE));
  94522. + device_destroy(p_LnxWrpFmDev->fm_class, MKDEV(p_LnxWrpFmDev->major, DEV_FM_PCD_MINOR_BASE));
  94523. + class_destroy(p_LnxWrpFmDev->fm_class);
  94524. +
  94525. + /* Destroy chardev */
  94526. + unregister_chrdev(p_LnxWrpFmDev->major, p_LnxWrpFmDev->name);
  94527. +
  94528. + FreeFmDev(p_LnxWrpFmDev);
  94529. +
  94530. + DestroyFmDev(p_LnxWrpFmDev);
  94531. +
  94532. + dev_set_drvdata(dev, NULL);
  94533. +
  94534. + return 0;
  94535. +}
  94536. +
  94537. +static const struct of_device_id fm_match[] = {
  94538. + {
  94539. + .compatible = "fsl,fman"
  94540. + },
  94541. + {}
  94542. +};
  94543. +#ifndef MODULE
  94544. +MODULE_DEVICE_TABLE(of, fm_match);
  94545. +#endif /* !MODULE */
  94546. +
  94547. +#ifdef CONFIG_PM
  94548. +
  94549. +#define SCFG_FMCLKDPSLPCR_ADDR 0xFFE0FC00C
  94550. +#define SCFG_FMCLKDPSLPCR_DS_VAL 0x48402000
  94551. +#define SCFG_FMCLKDPSLPCR_NORMAL_VAL 0x00402000
  94552. +
  94553. +struct device *g_fm_dev;
  94554. +
  94555. +static int fm_soc_suspend(struct device *dev)
  94556. +{
  94557. + int err = 0;
  94558. + uint32_t *fmclk;
  94559. + t_LnxWrpFmDev *p_LnxWrpFmDev = dev_get_drvdata(get_device(dev));
  94560. + g_fm_dev = dev;
  94561. + fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
  94562. + WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_DS_VAL);
  94563. + if (p_LnxWrpFmDev->h_DsarRxPort)
  94564. + {
  94565. +#ifdef CONFIG_FSL_QORIQ_PM
  94566. + device_set_wakeup_enable(p_LnxWrpFmDev->dev, 1);
  94567. +#endif
  94568. + err = FM_PORT_EnterDsarFinal(p_LnxWrpFmDev->h_DsarRxPort,
  94569. + p_LnxWrpFmDev->h_DsarTxPort);
  94570. + }
  94571. + return err;
  94572. +}
  94573. +
  94574. +static int fm_soc_resume(struct device *dev)
  94575. +{
  94576. + t_LnxWrpFmDev *p_LnxWrpFmDev = dev_get_drvdata(get_device(dev));
  94577. + uint32_t *fmclk;
  94578. + fmclk = ioremap(SCFG_FMCLKDPSLPCR_ADDR, 4);
  94579. + WRITE_UINT32(*fmclk, SCFG_FMCLKDPSLPCR_NORMAL_VAL);
  94580. + if (p_LnxWrpFmDev->h_DsarRxPort)
  94581. + {
  94582. +#ifdef CONFIG_FSL_QORIQ_PM
  94583. + device_set_wakeup_enable(p_LnxWrpFmDev->dev, 0);
  94584. +#endif
  94585. + FM_PORT_ExitDsar(p_LnxWrpFmDev->h_DsarRxPort,
  94586. + p_LnxWrpFmDev->h_DsarTxPort);
  94587. + p_LnxWrpFmDev->h_DsarRxPort = 0;
  94588. + p_LnxWrpFmDev->h_DsarTxPort = 0;
  94589. + }
  94590. + return 0;
  94591. +}
  94592. +
  94593. +static const struct dev_pm_ops fm_pm_ops = {
  94594. + .suspend = fm_soc_suspend,
  94595. + .resume = fm_soc_resume,
  94596. +};
  94597. +
  94598. +#define FM_PM_OPS (&fm_pm_ops)
  94599. +
  94600. +#else /* CONFIG_PM */
  94601. +
  94602. +#define FM_PM_OPS NULL
  94603. +
  94604. +#endif /* CONFIG_PM */
  94605. +
  94606. +static struct platform_driver fm_driver = {
  94607. + .driver = {
  94608. + .name = "fsl-fman",
  94609. + .of_match_table = fm_match,
  94610. + .owner = THIS_MODULE,
  94611. + .pm = FM_PM_OPS,
  94612. + },
  94613. + .probe = fm_probe,
  94614. + .remove = fm_remove
  94615. +};
  94616. +
  94617. +t_Handle LNXWRP_FM_Init(void)
  94618. +{
  94619. + memset(&lnxWrpFm, 0, sizeof(lnxWrpFm));
  94620. + mutex_init(&lnxwrp_mutex);
  94621. +
  94622. + /* Register to the DTB for basic FM API */
  94623. + platform_driver_register(&fm_driver);
  94624. +
  94625. + return &lnxWrpFm;
  94626. +}
  94627. +
  94628. +t_Error LNXWRP_FM_Free(t_Handle h_LnxWrpFm)
  94629. +{
  94630. + platform_driver_unregister(&fm_driver);
  94631. + mutex_destroy(&lnxwrp_mutex);
  94632. +
  94633. + return E_OK;
  94634. +}
  94635. +
  94636. +
  94637. +struct fm * fm_bind(struct device *fm_dev)
  94638. +{
  94639. + return (struct fm *)(dev_get_drvdata(get_device(fm_dev)));
  94640. +}
  94641. +EXPORT_SYMBOL(fm_bind);
  94642. +
  94643. +void fm_unbind(struct fm *fm)
  94644. +{
  94645. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
  94646. +
  94647. + put_device(p_LnxWrpFmDev->dev);
  94648. +}
  94649. +EXPORT_SYMBOL(fm_unbind);
  94650. +
  94651. +struct resource * fm_get_mem_region(struct fm *fm)
  94652. +{
  94653. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
  94654. +
  94655. + return p_LnxWrpFmDev->res;
  94656. +}
  94657. +EXPORT_SYMBOL(fm_get_mem_region);
  94658. +
  94659. +void * fm_get_handle(struct fm *fm)
  94660. +{
  94661. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
  94662. +
  94663. + return (void *)p_LnxWrpFmDev->h_Dev;
  94664. +}
  94665. +EXPORT_SYMBOL(fm_get_handle);
  94666. +
  94667. +void * fm_get_rtc_handle(struct fm *fm)
  94668. +{
  94669. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev*)fm;
  94670. +
  94671. + return (void *)p_LnxWrpFmDev->h_RtcDev;
  94672. +}
  94673. +EXPORT_SYMBOL(fm_get_rtc_handle);
  94674. +
  94675. +struct fm_port * fm_port_bind (struct device *fm_port_dev)
  94676. +{
  94677. + return (struct fm_port *)(dev_get_drvdata(get_device(fm_port_dev)));
  94678. +}
  94679. +EXPORT_SYMBOL(fm_port_bind);
  94680. +
  94681. +void fm_port_unbind(struct fm_port *port)
  94682. +{
  94683. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
  94684. +
  94685. + put_device(p_LnxWrpFmPortDev->dev);
  94686. +}
  94687. +EXPORT_SYMBOL(fm_port_unbind);
  94688. +
  94689. +void *fm_port_get_handle(const struct fm_port *port)
  94690. +{
  94691. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
  94692. +
  94693. + return (void *)p_LnxWrpFmPortDev->h_Dev;
  94694. +}
  94695. +EXPORT_SYMBOL(fm_port_get_handle);
  94696. +
  94697. +u64 *fm_port_get_buffer_time_stamp(const struct fm_port *port,
  94698. + const void *data)
  94699. +{
  94700. + return FM_PORT_GetBufferTimeStamp(fm_port_get_handle(port),
  94701. + (void *)data);
  94702. +}
  94703. +EXPORT_SYMBOL(fm_port_get_buffer_time_stamp);
  94704. +
  94705. +void fm_port_get_base_addr(const struct fm_port *port, uint64_t *base_addr)
  94706. +{
  94707. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94708. +
  94709. + *base_addr = p_LnxWrpFmPortDev->settings.param.baseAddr;
  94710. +}
  94711. +EXPORT_SYMBOL(fm_port_get_base_addr);
  94712. +
  94713. +void fm_port_pcd_bind (struct fm_port *port, struct fm_port_pcd_param *params)
  94714. +{
  94715. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
  94716. +
  94717. + p_LnxWrpFmPortDev->pcd_owner_params.cba = params->cba;
  94718. + p_LnxWrpFmPortDev->pcd_owner_params.cbf = params->cbf;
  94719. + p_LnxWrpFmPortDev->pcd_owner_params.dev = params->dev;
  94720. +}
  94721. +EXPORT_SYMBOL(fm_port_pcd_bind);
  94722. +
  94723. +void fm_port_get_buff_layout_ext_params(struct fm_port *port, struct fm_port_params *params)
  94724. +{
  94725. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94726. + struct device_node *fm_node, *port_node;
  94727. + const uint32_t *uint32_prop;
  94728. + int lenp;
  94729. +
  94730. + params->data_align = 0;
  94731. + params->manip_extra_space = 0;
  94732. +
  94733. + fm_node = GetFmAdvArgsDevTreeNode(((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev)->id);
  94734. + if (!fm_node) /* no advance parameters for FMan */
  94735. + return;
  94736. +
  94737. + port_node = GetFmPortAdvArgsDevTreeNode(fm_node,
  94738. + p_LnxWrpFmPortDev->settings.param.portType,
  94739. + p_LnxWrpFmPortDev->settings.param.portId);
  94740. + if (!port_node) /* no advance parameters for FMan-Port */
  94741. + return;
  94742. +
  94743. + uint32_prop = (uint32_t *)of_get_property(port_node, "buffer-layout", &lenp);
  94744. + if (uint32_prop) {
  94745. + if (WARN_ON(lenp != sizeof(uint32_t)*2))
  94746. + return;
  94747. +
  94748. + params->manip_extra_space = (uint8_t)be32_to_cpu(uint32_prop[0]);
  94749. + params->data_align = (uint16_t)be32_to_cpu(uint32_prop[1]);
  94750. + }
  94751. +
  94752. + of_node_put(port_node);
  94753. + of_node_put(fm_node);
  94754. +}
  94755. +EXPORT_SYMBOL(fm_port_get_buff_layout_ext_params);
  94756. +
  94757. +uint16_t fm_get_tx_port_channel(struct fm_port *port)
  94758. +{
  94759. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
  94760. +
  94761. + return p_LnxWrpFmPortDev->txCh;
  94762. +}
  94763. +EXPORT_SYMBOL(fm_get_tx_port_channel);
  94764. +
  94765. +int fm_port_enable (struct fm_port *port)
  94766. +{
  94767. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
  94768. + t_Error err = FM_PORT_Enable(p_LnxWrpFmPortDev->h_Dev);
  94769. +
  94770. + return GET_ERROR_TYPE(err);
  94771. +}
  94772. +EXPORT_SYMBOL(fm_port_enable);
  94773. +
  94774. +int fm_port_disable(struct fm_port *port)
  94775. +{
  94776. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)port;
  94777. + t_Error err = FM_PORT_Disable(p_LnxWrpFmPortDev->h_Dev);
  94778. +
  94779. + return GET_ERROR_TYPE(err);
  94780. +}
  94781. +EXPORT_SYMBOL(fm_port_disable);
  94782. +
  94783. +int fm_port_set_rate_limit(struct fm_port *port,
  94784. + uint16_t max_burst_size,
  94785. + uint32_t rate_limit)
  94786. +{
  94787. + t_FmPortRateLimit param;
  94788. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94789. + int err = 0;
  94790. +
  94791. + param.maxBurstSize = max_burst_size;
  94792. + param.rateLimit = rate_limit;
  94793. + param.rateLimitDivider = 0;
  94794. +
  94795. + err = FM_PORT_SetRateLimit(p_LnxWrpFmPortDev->h_Dev, &param);
  94796. + return err;
  94797. +}
  94798. +EXPORT_SYMBOL(fm_port_set_rate_limit);
  94799. +
  94800. +int fm_port_del_rate_limit(struct fm_port *port)
  94801. +{
  94802. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94803. +
  94804. + FM_PORT_DeleteRateLimit(p_LnxWrpFmPortDev->h_Dev);
  94805. + return 0;
  94806. +}
  94807. +EXPORT_SYMBOL(fm_port_del_rate_limit);
  94808. +
  94809. +void FM_PORT_Dsar_DumpRegs(void);
  94810. +int ar_showmem(struct file *file, const char __user *buffer,
  94811. + unsigned long count, void *data)
  94812. +{
  94813. + FM_PORT_Dsar_DumpRegs();
  94814. + return 2;
  94815. +}
  94816. +
  94817. +struct auto_res_tables_sizes *fm_port_get_autores_maxsize(
  94818. + struct fm_port *port)
  94819. +{
  94820. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94821. + return &p_LnxWrpFmPortDev->dsar_table_sizes;
  94822. +}
  94823. +EXPORT_SYMBOL(fm_port_get_autores_maxsize);
  94824. +
  94825. +int fm_port_enter_autores_for_deepsleep(struct fm_port *port,
  94826. + struct auto_res_port_params *params)
  94827. +{
  94828. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94829. + t_LnxWrpFmDev* p_LnxWrpFmDev = (t_LnxWrpFmDev*)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  94830. + p_LnxWrpFmDev->h_DsarRxPort = p_LnxWrpFmPortDev->h_Dev;
  94831. + p_LnxWrpFmDev->h_DsarTxPort = params->h_FmPortTx;
  94832. +
  94833. + /*Register other under /proc/autoresponse */
  94834. + if (WARN_ON(sizeof(t_FmPortDsarParams) != sizeof(struct auto_res_port_params)))
  94835. + return -EFAULT;
  94836. +
  94837. + FM_PORT_EnterDsar(p_LnxWrpFmPortDev->h_Dev, (t_FmPortDsarParams*)params);
  94838. + return 0;
  94839. +}
  94840. +EXPORT_SYMBOL(fm_port_enter_autores_for_deepsleep);
  94841. +
  94842. +void fm_port_exit_auto_res_for_deep_sleep(struct fm_port *port_rx,
  94843. + struct fm_port *port_tx)
  94844. +{
  94845. +}
  94846. +EXPORT_SYMBOL(fm_port_exit_auto_res_for_deep_sleep);
  94847. +
  94848. +int fm_port_get_autores_stats(struct fm_port *port,
  94849. + struct auto_res_port_stats *stats)
  94850. +{
  94851. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94852. + if (WARN_ON(sizeof(t_FmPortDsarStats) != sizeof(struct auto_res_port_stats)))
  94853. + return -EFAULT;
  94854. + return FM_PORT_GetDsarStats(p_LnxWrpFmPortDev->h_Dev, (t_FmPortDsarStats*)stats);
  94855. +}
  94856. +EXPORT_SYMBOL(fm_port_get_autores_stats);
  94857. +
  94858. +int fm_port_suspend(struct fm_port *port)
  94859. +{
  94860. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94861. + if (!FM_PORT_IsInDsar(p_LnxWrpFmPortDev->h_Dev))
  94862. + return FM_PORT_Disable(p_LnxWrpFmPortDev->h_Dev);
  94863. + else
  94864. + return 0;
  94865. +}
  94866. +EXPORT_SYMBOL(fm_port_suspend);
  94867. +
  94868. +int fm_port_resume(struct fm_port *port)
  94869. +{
  94870. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94871. + if (!FM_PORT_IsInDsar(p_LnxWrpFmPortDev->h_Dev))
  94872. + return FM_PORT_Enable(p_LnxWrpFmPortDev->h_Dev);
  94873. + else
  94874. + return 0;
  94875. +}
  94876. +EXPORT_SYMBOL(fm_port_resume);
  94877. +
  94878. +bool fm_port_is_in_auto_res_mode(struct fm_port *port)
  94879. +{
  94880. + return FM_PORT_IsInDsar(port);
  94881. +}
  94882. +EXPORT_SYMBOL(fm_port_is_in_auto_res_mode);
  94883. +
  94884. +#ifdef CONFIG_FMAN_PFC
  94885. +int fm_port_set_pfc_priorities_mapping_to_qman_wq(struct fm_port *port,
  94886. + uint8_t prio, uint8_t wq)
  94887. +{
  94888. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  94889. + int err;
  94890. + int _errno;
  94891. +
  94892. + err = FM_PORT_SetPfcPrioritiesMappingToQmanWQ(p_LnxWrpFmPortDev->h_Dev,
  94893. + prio, wq);
  94894. + _errno = -GET_ERROR_TYPE(err);
  94895. + if (unlikely(_errno < 0))
  94896. + pr_err("FM_PORT_SetPfcPrioritiesMappingToQmanWQ() = 0x%08x\n", err);
  94897. +
  94898. + return _errno;
  94899. +}
  94900. +EXPORT_SYMBOL(fm_port_set_pfc_priorities_mapping_to_qman_wq);
  94901. +#endif
  94902. +
  94903. +int fm_mac_set_exception(struct fm_mac_dev *fm_mac_dev,
  94904. + e_FmMacExceptions exception, bool enable)
  94905. +{
  94906. + int err;
  94907. + int _errno;
  94908. +
  94909. + err = FM_MAC_SetException(fm_mac_dev, exception, enable);
  94910. +
  94911. + _errno = -GET_ERROR_TYPE(err);
  94912. + if (unlikely(_errno < 0))
  94913. + pr_err("FM_MAC_SetException() = 0x%08x\n", err);
  94914. +
  94915. + return _errno;
  94916. +}
  94917. +EXPORT_SYMBOL(fm_mac_set_exception);
  94918. +
  94919. +int fm_mac_free(struct fm_mac_dev *fm_mac_dev)
  94920. +{
  94921. + int err;
  94922. + int _error;
  94923. +
  94924. + err = FM_MAC_Free(fm_mac_dev);
  94925. + _error = -GET_ERROR_TYPE(err);
  94926. +
  94927. + if (unlikely(_error < 0))
  94928. + pr_err("FM_MAC_Free() = 0x%08x\n", err);
  94929. +
  94930. + return _error;
  94931. +}
  94932. +EXPORT_SYMBOL(fm_mac_free);
  94933. +
  94934. +struct fm_mac_dev *fm_mac_config(t_FmMacParams *params)
  94935. +{
  94936. + struct fm_mac_dev *fm_mac_dev;
  94937. +
  94938. + fm_mac_dev = FM_MAC_Config(params);
  94939. + if (unlikely(fm_mac_dev == NULL))
  94940. + pr_err("FM_MAC_Config() failed\n");
  94941. +
  94942. + return fm_mac_dev;
  94943. +}
  94944. +EXPORT_SYMBOL(fm_mac_config);
  94945. +
  94946. +int fm_mac_config_max_frame_length(struct fm_mac_dev *fm_mac_dev,
  94947. + int len)
  94948. +{
  94949. + int err;
  94950. + int _errno;
  94951. +
  94952. + err = FM_MAC_ConfigMaxFrameLength(fm_mac_dev, len);
  94953. + _errno = -GET_ERROR_TYPE(err);
  94954. + if (unlikely(_errno < 0))
  94955. + pr_err("FM_MAC_ConfigMaxFrameLength() = 0x%08x\n", err);
  94956. +
  94957. + return _errno;
  94958. +}
  94959. +EXPORT_SYMBOL(fm_mac_config_max_frame_length);
  94960. +
  94961. +int fm_mac_config_pad_and_crc(struct fm_mac_dev *fm_mac_dev, bool enable)
  94962. +{
  94963. + int err;
  94964. + int _errno;
  94965. +
  94966. + err = FM_MAC_ConfigPadAndCrc(fm_mac_dev, enable);
  94967. + _errno = -GET_ERROR_TYPE(err);
  94968. + if (unlikely(_errno < 0))
  94969. + pr_err("FM_MAC_ConfigPadAndCrc() = 0x%08x\n", err);
  94970. +
  94971. + return _errno;
  94972. +}
  94973. +EXPORT_SYMBOL(fm_mac_config_pad_and_crc);
  94974. +
  94975. +int fm_mac_config_half_duplex(struct fm_mac_dev *fm_mac_dev, bool enable)
  94976. +{
  94977. + int err;
  94978. + int _errno;
  94979. +
  94980. + err = FM_MAC_ConfigHalfDuplex(fm_mac_dev, enable);
  94981. + _errno = -GET_ERROR_TYPE(err);
  94982. + if (unlikely(_errno < 0))
  94983. + pr_err("FM_MAC_ConfigHalfDuplex() = 0x%08x\n", err);
  94984. +
  94985. + return _errno;
  94986. +}
  94987. +EXPORT_SYMBOL(fm_mac_config_half_duplex);
  94988. +
  94989. +int fm_mac_config_reset_on_init(struct fm_mac_dev *fm_mac_dev, bool enable)
  94990. +{
  94991. + int err;
  94992. + int _errno;
  94993. +
  94994. + err = FM_MAC_ConfigResetOnInit(fm_mac_dev, enable);
  94995. + _errno = -GET_ERROR_TYPE(err);
  94996. + if (unlikely(_errno < 0))
  94997. + pr_err("FM_MAC_ConfigResetOnInit() = 0x%08x\n", err);
  94998. +
  94999. + return _errno;
  95000. +}
  95001. +EXPORT_SYMBOL(fm_mac_config_reset_on_init);
  95002. +
  95003. +int fm_mac_init(struct fm_mac_dev *fm_mac_dev)
  95004. +{
  95005. + int err;
  95006. + int _errno;
  95007. +
  95008. + err = FM_MAC_Init(fm_mac_dev);
  95009. + _errno = -GET_ERROR_TYPE(err);
  95010. + if (unlikely(_errno < 0))
  95011. + pr_err("FM_MAC_Init() = 0x%08x\n", err);
  95012. +
  95013. + return _errno;
  95014. +}
  95015. +EXPORT_SYMBOL(fm_mac_init);
  95016. +
  95017. +int fm_mac_get_version(struct fm_mac_dev *fm_mac_dev, uint32_t *version)
  95018. +{
  95019. + int err;
  95020. + int _errno;
  95021. +
  95022. + err = FM_MAC_GetVesrion(fm_mac_dev, version);
  95023. + _errno = -GET_ERROR_TYPE(err);
  95024. + if (unlikely(_errno < 0))
  95025. + pr_err("FM_MAC_GetVesrion() = 0x%08x\n", err);
  95026. +
  95027. + return _errno;
  95028. +}
  95029. +EXPORT_SYMBOL(fm_mac_get_version);
  95030. +
  95031. +int fm_mac_enable(struct fm_mac_dev *fm_mac_dev)
  95032. +{
  95033. + int _errno;
  95034. + t_Error err;
  95035. +
  95036. + err = FM_MAC_Enable(fm_mac_dev, e_COMM_MODE_RX_AND_TX);
  95037. + _errno = -GET_ERROR_TYPE(err);
  95038. + if (unlikely(_errno < 0))
  95039. + pr_err("FM_MAC_Enable() = 0x%08x\n", err);
  95040. +
  95041. + return _errno;
  95042. +}
  95043. +EXPORT_SYMBOL(fm_mac_enable);
  95044. +
  95045. +int fm_mac_disable(struct fm_mac_dev *fm_mac_dev)
  95046. +{
  95047. + int _errno;
  95048. + t_Error err;
  95049. +
  95050. + err = FM_MAC_Disable(fm_mac_dev, e_COMM_MODE_RX_AND_TX);
  95051. + _errno = -GET_ERROR_TYPE(err);
  95052. + if (unlikely(_errno < 0))
  95053. + pr_err("FM_MAC_Disable() = 0x%08x\n", err);
  95054. +
  95055. + return _errno;
  95056. +}
  95057. +EXPORT_SYMBOL(fm_mac_disable);
  95058. +
  95059. +int fm_mac_set_promiscuous(struct fm_mac_dev *fm_mac_dev,
  95060. + bool enable)
  95061. +{
  95062. + int _errno;
  95063. + t_Error err;
  95064. +
  95065. + err = FM_MAC_SetPromiscuous(fm_mac_dev, enable);
  95066. + _errno = -GET_ERROR_TYPE(err);
  95067. + if (unlikely(_errno < 0))
  95068. + pr_err("FM_MAC_SetPromiscuous() = 0x%08x\n", err);
  95069. +
  95070. + return _errno;
  95071. +}
  95072. +EXPORT_SYMBOL(fm_mac_set_promiscuous);
  95073. +
  95074. +int fm_mac_remove_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
  95075. + t_EnetAddr *mac_addr)
  95076. +{
  95077. + int _errno;
  95078. + t_Error err;
  95079. +
  95080. + err = FM_MAC_RemoveHashMacAddr(fm_mac_dev, mac_addr);
  95081. + _errno = -GET_ERROR_TYPE(err);
  95082. + if (_errno < 0) {
  95083. + pr_err("FM_MAC_RemoveHashMacAddr() = 0x%08x\n", err);
  95084. + return _errno;
  95085. + }
  95086. +
  95087. + return 0;
  95088. +}
  95089. +EXPORT_SYMBOL(fm_mac_remove_hash_mac_addr);
  95090. +
  95091. +int fm_mac_add_hash_mac_addr(struct fm_mac_dev *fm_mac_dev,
  95092. + t_EnetAddr *mac_addr)
  95093. +{
  95094. + int _errno;
  95095. + t_Error err;
  95096. +
  95097. + err = FM_MAC_AddHashMacAddr(fm_mac_dev, mac_addr);
  95098. + _errno = -GET_ERROR_TYPE(err);
  95099. + if (_errno < 0) {
  95100. + pr_err("FM_MAC_AddHashMacAddr() = 0x%08x\n", err);
  95101. + return _errno;
  95102. + }
  95103. +
  95104. + return 0;
  95105. +}
  95106. +EXPORT_SYMBOL(fm_mac_add_hash_mac_addr);
  95107. +
  95108. +int fm_mac_modify_mac_addr(struct fm_mac_dev *fm_mac_dev,
  95109. + uint8_t *addr)
  95110. +{
  95111. + int _errno;
  95112. + t_Error err;
  95113. +
  95114. + err = FM_MAC_ModifyMacAddr(fm_mac_dev, (t_EnetAddr *)addr);
  95115. + _errno = -GET_ERROR_TYPE(err);
  95116. + if (_errno < 0)
  95117. + pr_err("FM_MAC_ModifyMacAddr() = 0x%08x\n", err);
  95118. +
  95119. + return _errno;
  95120. +}
  95121. +EXPORT_SYMBOL(fm_mac_modify_mac_addr);
  95122. +
  95123. +int fm_mac_adjust_link(struct fm_mac_dev *fm_mac_dev,
  95124. + bool link, int speed, bool duplex)
  95125. +{
  95126. + int _errno;
  95127. + t_Error err;
  95128. +
  95129. + if (!link) {
  95130. +#if (DPAA_VERSION < 11)
  95131. + FM_MAC_RestartAutoneg(fm_mac_dev);
  95132. +#endif
  95133. + return 0;
  95134. + }
  95135. +
  95136. + err = FM_MAC_AdjustLink(fm_mac_dev, speed, duplex);
  95137. + _errno = -GET_ERROR_TYPE(err);
  95138. + if (unlikely(_errno < 0))
  95139. + pr_err("FM_MAC_AdjustLink() = 0x%08x\n", err);
  95140. +
  95141. + return _errno;
  95142. +}
  95143. +EXPORT_SYMBOL(fm_mac_adjust_link);
  95144. +
  95145. +int fm_mac_enable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev)
  95146. +{
  95147. + int _errno;
  95148. + t_Error err;
  95149. +
  95150. + err = FM_MAC_Enable1588TimeStamp(fm_mac_dev);
  95151. + _errno = -GET_ERROR_TYPE(err);
  95152. + if (unlikely(_errno < 0))
  95153. + pr_err("FM_MAC_Enable1588TimeStamp() = 0x%08x\n", err);
  95154. + return _errno;
  95155. +}
  95156. +EXPORT_SYMBOL(fm_mac_enable_1588_time_stamp);
  95157. +
  95158. +int fm_mac_disable_1588_time_stamp(struct fm_mac_dev *fm_mac_dev)
  95159. +{
  95160. + int _errno;
  95161. + t_Error err;
  95162. +
  95163. + err = FM_MAC_Disable1588TimeStamp(fm_mac_dev);
  95164. + _errno = -GET_ERROR_TYPE(err);
  95165. + if (unlikely(_errno < 0))
  95166. + pr_err("FM_MAC_Disable1588TimeStamp() = 0x%08x\n", err);
  95167. + return _errno;
  95168. +}
  95169. +EXPORT_SYMBOL(fm_mac_disable_1588_time_stamp);
  95170. +
  95171. +int fm_mac_set_rx_pause_frames(
  95172. + struct fm_mac_dev *fm_mac_dev, bool en)
  95173. +{
  95174. + int _errno;
  95175. + t_Error err;
  95176. +
  95177. + /* if rx pause is enabled, do NOT ignore pause frames */
  95178. + err = FM_MAC_SetRxIgnorePauseFrames(fm_mac_dev, !en);
  95179. +
  95180. + _errno = -GET_ERROR_TYPE(err);
  95181. + if (_errno < 0)
  95182. + pr_err("FM_MAC_SetRxIgnorePauseFrames() = 0x%08x\n", err);
  95183. +
  95184. + return _errno;
  95185. +}
  95186. +EXPORT_SYMBOL(fm_mac_set_rx_pause_frames);
  95187. +
  95188. +#ifdef CONFIG_FMAN_PFC
  95189. +int fm_mac_set_tx_pause_frames(struct fm_mac_dev *fm_mac_dev,
  95190. + bool en)
  95191. +{
  95192. + int _errno, i;
  95193. + t_Error err;
  95194. +
  95195. + if (en)
  95196. + for (i = 0; i < CONFIG_FMAN_PFC_COS_COUNT; i++) {
  95197. + err = FM_MAC_SetTxPauseFrames(fm_mac_dev,
  95198. + i, fsl_fm_pfc_quanta[i],
  95199. + FSL_FM_PAUSE_THRESH_DEFAULT);
  95200. + _errno = -GET_ERROR_TYPE(err);
  95201. + if (_errno < 0) {
  95202. + pr_err("FM_MAC_SetTxPauseFrames() = 0x%08x\n", err);
  95203. + return _errno;
  95204. + }
  95205. + }
  95206. + else
  95207. + for (i = 0; i < CONFIG_FMAN_PFC_COS_COUNT; i++) {
  95208. + err = FM_MAC_SetTxPauseFrames(fm_mac_dev,
  95209. + i, FSL_FM_PAUSE_TIME_DISABLE,
  95210. + FSL_FM_PAUSE_THRESH_DEFAULT);
  95211. + _errno = -GET_ERROR_TYPE(err);
  95212. + if (_errno < 0) {
  95213. + pr_err("FM_MAC_SetTxPauseFrames() = 0x%08x\n", err);
  95214. + return _errno;
  95215. + }
  95216. + }
  95217. +
  95218. + return _errno;
  95219. +}
  95220. +#else
  95221. +int fm_mac_set_tx_pause_frames(struct fm_mac_dev *fm_mac_dev,
  95222. + bool en)
  95223. +{
  95224. + int _errno;
  95225. + t_Error err;
  95226. +
  95227. + if (en)
  95228. + err = FM_MAC_SetTxAutoPauseFrames(fm_mac_dev,
  95229. + FSL_FM_PAUSE_TIME_ENABLE);
  95230. + else
  95231. + err = FM_MAC_SetTxAutoPauseFrames(fm_mac_dev,
  95232. + FSL_FM_PAUSE_TIME_DISABLE);
  95233. +
  95234. + _errno = -GET_ERROR_TYPE(err);
  95235. + if (_errno < 0)
  95236. + pr_err("FM_MAC_SetTxAutoPauseFrames() = 0x%08x\n", err);
  95237. +
  95238. + return _errno;
  95239. +}
  95240. +#endif
  95241. +EXPORT_SYMBOL(fm_mac_set_tx_pause_frames);
  95242. +
  95243. +int fm_rtc_enable(struct fm *fm_dev)
  95244. +{
  95245. + int _errno;
  95246. + t_Error err;
  95247. +
  95248. + err = FM_RTC_Enable(fm_get_rtc_handle(fm_dev), 0);
  95249. + _errno = -GET_ERROR_TYPE(err);
  95250. + if (unlikely(_errno < 0))
  95251. + pr_err("FM_RTC_Enable = 0x%08x\n", err);
  95252. +
  95253. + return _errno;
  95254. +}
  95255. +EXPORT_SYMBOL(fm_rtc_enable);
  95256. +
  95257. +int fm_rtc_disable(struct fm *fm_dev)
  95258. +{
  95259. + int _errno;
  95260. + t_Error err;
  95261. +
  95262. + err = FM_RTC_Disable(fm_get_rtc_handle(fm_dev));
  95263. + _errno = -GET_ERROR_TYPE(err);
  95264. + if (unlikely(_errno < 0))
  95265. + pr_err("FM_RTC_Disable = 0x%08x\n", err);
  95266. +
  95267. + return _errno;
  95268. +}
  95269. +EXPORT_SYMBOL(fm_rtc_disable);
  95270. +
  95271. +int fm_rtc_get_cnt(struct fm *fm_dev, uint64_t *ts)
  95272. +{
  95273. + int _errno;
  95274. + t_Error err;
  95275. +
  95276. + err = FM_RTC_GetCurrentTime(fm_get_rtc_handle(fm_dev), ts);
  95277. + _errno = -GET_ERROR_TYPE(err);
  95278. + if (unlikely(_errno < 0))
  95279. + pr_err("FM_RTC_GetCurrentTime = 0x%08x\n", err);
  95280. +
  95281. + return _errno;
  95282. +}
  95283. +EXPORT_SYMBOL(fm_rtc_get_cnt);
  95284. +
  95285. +int fm_rtc_set_cnt(struct fm *fm_dev, uint64_t ts)
  95286. +{
  95287. + int _errno;
  95288. + t_Error err;
  95289. +
  95290. + err = FM_RTC_SetCurrentTime(fm_get_rtc_handle(fm_dev), ts);
  95291. + _errno = -GET_ERROR_TYPE(err);
  95292. + if (unlikely(_errno < 0))
  95293. + pr_err("FM_RTC_SetCurrentTime = 0x%08x\n", err);
  95294. +
  95295. + return _errno;
  95296. +}
  95297. +EXPORT_SYMBOL(fm_rtc_set_cnt);
  95298. +
  95299. +int fm_rtc_get_drift(struct fm *fm_dev, uint32_t *drift)
  95300. +{
  95301. + int _errno;
  95302. + t_Error err;
  95303. +
  95304. + err = FM_RTC_GetFreqCompensation(fm_get_rtc_handle(fm_dev),
  95305. + drift);
  95306. + _errno = -GET_ERROR_TYPE(err);
  95307. + if (unlikely(_errno < 0))
  95308. + pr_err("FM_RTC_GetFreqCompensation = 0x%08x\n", err);
  95309. +
  95310. + return _errno;
  95311. +}
  95312. +EXPORT_SYMBOL(fm_rtc_get_drift);
  95313. +
  95314. +int fm_rtc_set_drift(struct fm *fm_dev, uint32_t drift)
  95315. +{
  95316. + int _errno;
  95317. + t_Error err;
  95318. +
  95319. + err = FM_RTC_SetFreqCompensation(fm_get_rtc_handle(fm_dev),
  95320. + drift);
  95321. + _errno = -GET_ERROR_TYPE(err);
  95322. + if (unlikely(_errno < 0))
  95323. + pr_err("FM_RTC_SetFreqCompensation = 0x%08x\n", err);
  95324. +
  95325. + return _errno;
  95326. +}
  95327. +EXPORT_SYMBOL(fm_rtc_set_drift);
  95328. +
  95329. +int fm_rtc_set_alarm(struct fm *fm_dev, uint32_t id,
  95330. + uint64_t time)
  95331. +{
  95332. + t_FmRtcAlarmParams alarm;
  95333. + int _errno;
  95334. + t_Error err;
  95335. +
  95336. + alarm.alarmId = id;
  95337. + alarm.alarmTime = time;
  95338. + alarm.f_AlarmCallback = NULL;
  95339. + err = FM_RTC_SetAlarm(fm_get_rtc_handle(fm_dev),
  95340. + &alarm);
  95341. + _errno = -GET_ERROR_TYPE(err);
  95342. + if (unlikely(_errno < 0))
  95343. + pr_err("FM_RTC_SetAlarm = 0x%08x\n", err);
  95344. +
  95345. + return _errno;
  95346. +}
  95347. +EXPORT_SYMBOL(fm_rtc_set_alarm);
  95348. +
  95349. +int fm_rtc_set_fiper(struct fm *fm_dev, uint32_t id,
  95350. + uint64_t fiper)
  95351. +{
  95352. + t_FmRtcPeriodicPulseParams pp;
  95353. + int _errno;
  95354. + t_Error err;
  95355. +
  95356. + pp.periodicPulseId = id;
  95357. + pp.periodicPulsePeriod = fiper;
  95358. + pp.f_PeriodicPulseCallback = NULL;
  95359. + err = FM_RTC_SetPeriodicPulse(fm_get_rtc_handle(fm_dev), &pp);
  95360. + _errno = -GET_ERROR_TYPE(err);
  95361. + if (unlikely(_errno < 0))
  95362. + pr_err("FM_RTC_SetPeriodicPulse = 0x%08x\n", err);
  95363. +
  95364. + return _errno;
  95365. +}
  95366. +EXPORT_SYMBOL(fm_rtc_set_fiper);
  95367. +
  95368. +#ifdef CONFIG_PTP_1588_CLOCK_DPAA
  95369. +int fm_rtc_enable_interrupt(struct fm *fm_dev, uint32_t events)
  95370. +{
  95371. + int _errno;
  95372. + t_Error err;
  95373. +
  95374. + err = FM_RTC_EnableInterrupt(fm_get_rtc_handle(fm_dev),
  95375. + events);
  95376. + _errno = -GET_ERROR_TYPE(err);
  95377. + if (unlikely(_errno < 0))
  95378. + pr_err("FM_RTC_EnableInterrupt = 0x%08x\n", err);
  95379. +
  95380. + return _errno;
  95381. +}
  95382. +EXPORT_SYMBOL(fm_rtc_enable_interrupt);
  95383. +
  95384. +int fm_rtc_disable_interrupt(struct fm *fm_dev, uint32_t events)
  95385. +{
  95386. + int _errno;
  95387. + t_Error err;
  95388. +
  95389. + err = FM_RTC_DisableInterrupt(fm_get_rtc_handle(fm_dev),
  95390. + events);
  95391. + _errno = -GET_ERROR_TYPE(err);
  95392. + if (unlikely(_errno < 0))
  95393. + pr_err("FM_RTC_DisableInterrupt = 0x%08x\n", err);
  95394. +
  95395. + return _errno;
  95396. +}
  95397. +EXPORT_SYMBOL(fm_rtc_disable_interrupt);
  95398. +#endif
  95399. +
  95400. +int fm_mac_set_wol(struct fm_port *port, struct fm_mac_dev *fm_mac_dev, bool en)
  95401. +{
  95402. + int _errno;
  95403. + t_Error err;
  95404. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)port;
  95405. +
  95406. + /* Do not set WoL on AR ports */
  95407. + if (FM_PORT_IsInDsar(p_LnxWrpFmPortDev->h_Dev)) {
  95408. + printk(KERN_WARNING "Port is AutoResponse enabled! WoL will not be set on this port!\n");
  95409. + return 0;
  95410. + }
  95411. +
  95412. + err = FM_MAC_SetWakeOnLan(fm_mac_dev, en);
  95413. +
  95414. + _errno = -GET_ERROR_TYPE(err);
  95415. + if (_errno < 0)
  95416. + pr_err("FM_MAC_SetWakeOnLan() = 0x%08x\n", err);
  95417. +
  95418. + return _errno;
  95419. +}
  95420. +EXPORT_SYMBOL(fm_mac_set_wol);
  95421. +
  95422. +void fm_mutex_lock(void)
  95423. +{
  95424. + mutex_lock(&lnxwrp_mutex);
  95425. +}
  95426. +EXPORT_SYMBOL(fm_mutex_lock);
  95427. +
  95428. +void fm_mutex_unlock(void)
  95429. +{
  95430. + mutex_unlock(&lnxwrp_mutex);
  95431. +}
  95432. +EXPORT_SYMBOL(fm_mutex_unlock);
  95433. +
  95434. +/*Macsec wrapper functions*/
  95435. +struct fm_macsec_dev *fm_macsec_config(struct fm_macsec_params *fm_params)
  95436. +{
  95437. + struct fm_macsec_dev *fm_macsec_dev;
  95438. +
  95439. + fm_macsec_dev = FM_MACSEC_Config((t_FmMacsecParams *)fm_params);
  95440. + if (unlikely(fm_macsec_dev == NULL))
  95441. + pr_err("FM_MACSEC_Config() failed\n");
  95442. +
  95443. + return fm_macsec_dev;
  95444. +}
  95445. +EXPORT_SYMBOL(fm_macsec_config);
  95446. +
  95447. +int fm_macsec_init(struct fm_macsec_dev *fm_macsec_dev)
  95448. +{
  95449. + int err;
  95450. + int _errno;
  95451. +
  95452. + err = FM_MACSEC_Init(fm_macsec_dev);
  95453. + _errno = -GET_ERROR_TYPE(err);
  95454. + if (unlikely(_errno < 0))
  95455. + pr_err("FM_MACSEC_Init() = 0x%08x\n", err);
  95456. +
  95457. + return _errno;
  95458. +}
  95459. +EXPORT_SYMBOL(fm_macsec_init);
  95460. +
  95461. +int fm_macsec_free(struct fm_macsec_dev *fm_macsec_dev)
  95462. +{
  95463. + int err;
  95464. + int _error;
  95465. +
  95466. + err = FM_MACSEC_Free(fm_macsec_dev);
  95467. + _error = -GET_ERROR_TYPE(err);
  95468. +
  95469. + if (unlikely(_error < 0))
  95470. + pr_err("FM_MACSEC_Free() = 0x%08x\n", err);
  95471. +
  95472. + return _error;
  95473. +}
  95474. +EXPORT_SYMBOL(fm_macsec_free);
  95475. +
  95476. +int fm_macsec_config_unknown_sci_frame_treatment(struct fm_macsec_dev
  95477. + *fm_macsec_dev,
  95478. + fm_macsec_unknown_sci_frame_treatment treat_mode)
  95479. +{
  95480. + int err;
  95481. + int _errno;
  95482. +
  95483. + err = FM_MACSEC_ConfigUnknownSciFrameTreatment(fm_macsec_dev,
  95484. + treat_mode);
  95485. + _errno = -GET_ERROR_TYPE(err);
  95486. + if (unlikely(_errno < 0))
  95487. + pr_err("FM_MACSEC_ConfigUnknownSciFrameTreatmen() = 0x%08x\n", err);
  95488. +
  95489. + return _errno;
  95490. +}
  95491. +EXPORT_SYMBOL(fm_macsec_config_unknown_sci_frame_treatment);
  95492. +
  95493. +int fm_macsec_config_invalid_tags_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
  95494. + bool deliver_uncontrolled)
  95495. +{
  95496. + int err;
  95497. + int _errno;
  95498. +
  95499. + err = FM_MACSEC_ConfigInvalidTagsFrameTreatment(fm_macsec_dev,
  95500. + deliver_uncontrolled);
  95501. + _errno = -GET_ERROR_TYPE(err);
  95502. + if (unlikely(_errno < 0))
  95503. + pr_err("FM_MAC_ConfigMaxFrameLength() = 0x%08x\n", err);
  95504. +
  95505. + return _errno;
  95506. +}
  95507. +EXPORT_SYMBOL(fm_macsec_config_invalid_tags_frame_treatment);
  95508. +
  95509. +int fm_macsec_config_kay_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
  95510. + bool discard_uncontrolled)
  95511. +{
  95512. + int err;
  95513. + int _errno;
  95514. +
  95515. + err = FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatment(fm_macsec_dev,
  95516. + discard_uncontrolled);
  95517. + _errno = -GET_ERROR_TYPE(err);
  95518. + if (unlikely(_errno < 0))
  95519. + pr_err("FM_MACSEC_ConfigEncryptWithNoChangedTextFrameTreatmen() = 0x%08x\n", err);
  95520. +
  95521. + return _errno;
  95522. +}
  95523. +EXPORT_SYMBOL(fm_macsec_config_kay_frame_treatment);
  95524. +
  95525. +int fm_macsec_config_untag_frame_treatment(struct fm_macsec_dev *fm_macsec_dev,
  95526. + fm_macsec_untag_frame_treatment treat_mode)
  95527. +{
  95528. + int err;
  95529. + int _errno;
  95530. +
  95531. + err = FM_MACSEC_ConfigUntagFrameTreatment(fm_macsec_dev, treat_mode);
  95532. + _errno = -GET_ERROR_TYPE(err);
  95533. + if (unlikely(_errno < 0))
  95534. + pr_err("FM_MACSEC_ConfigUntagFrameTreatment() = 0x%08x\n", err);
  95535. +
  95536. + return _errno;
  95537. +}
  95538. +EXPORT_SYMBOL(fm_macsec_config_untag_frame_treatment);
  95539. +
  95540. +int fm_macsec_config_pn_exhaustion_threshold(struct fm_macsec_dev *fm_macsec_dev,
  95541. + uint32_t pn_exh_thr)
  95542. +{
  95543. + int err;
  95544. + int _errno;
  95545. +
  95546. + err = FM_MACSEC_ConfigPnExhaustionThreshold(fm_macsec_dev, pn_exh_thr);
  95547. + _errno = -GET_ERROR_TYPE(err);
  95548. + if (unlikely(_errno < 0))
  95549. + pr_err("FM_MACSEC_ConfigPnExhaustionThreshold() = 0x%08x\n", err);
  95550. +
  95551. + return _errno;
  95552. +}
  95553. +EXPORT_SYMBOL(fm_macsec_config_pn_exhaustion_threshold);
  95554. +
  95555. +int fm_macsec_config_keys_unreadable(struct fm_macsec_dev *fm_macsec_dev)
  95556. +{
  95557. + int err;
  95558. + int _errno;
  95559. +
  95560. + err = FM_MACSEC_ConfigKeysUnreadable(fm_macsec_dev);
  95561. + _errno = -GET_ERROR_TYPE(err);
  95562. + if (unlikely(_errno < 0))
  95563. + pr_err("FM_MACSEC_ConfigKeysUnreadable() = 0x%08x\n", err);
  95564. +
  95565. + return _errno;
  95566. +}
  95567. +EXPORT_SYMBOL(fm_macsec_config_keys_unreadable);
  95568. +
  95569. +int fm_macsec_config_sectag_without_sci(struct fm_macsec_dev *fm_macsec_dev)
  95570. +{
  95571. + int err;
  95572. + int _errno;
  95573. +
  95574. + err = FM_MACSEC_ConfigSectagWithoutSCI(fm_macsec_dev);
  95575. + _errno = -GET_ERROR_TYPE(err);
  95576. + if (unlikely(_errno < 0))
  95577. + pr_err("FM_MACSEC_ConfigSectagWithoutSCI() = 0x%08x\n", err);
  95578. +
  95579. + return _errno;
  95580. +}
  95581. +EXPORT_SYMBOL(fm_macsec_config_sectag_without_sci);
  95582. +
  95583. +int fm_macsec_config_exception(struct fm_macsec_dev *fm_macsec_dev,
  95584. + fm_macsec_exception exception, bool enable)
  95585. +{
  95586. + int err;
  95587. + int _errno;
  95588. +
  95589. + err = FM_MACSEC_ConfigException(fm_macsec_dev, exception, enable);
  95590. + _errno = -GET_ERROR_TYPE(err);
  95591. + if (unlikely(_errno < 0))
  95592. + pr_err("FM_MACSEC_ConfigException() = 0x%08x\n", err);
  95593. +
  95594. + return _errno;
  95595. +}
  95596. +EXPORT_SYMBOL(fm_macsec_config_exception);
  95597. +
  95598. +int fm_macsec_get_revision(struct fm_macsec_dev *fm_macsec_dev,
  95599. + int *macsec_revision)
  95600. +{
  95601. + int err;
  95602. + int _errno;
  95603. +
  95604. + err = FM_MACSEC_GetRevision(fm_macsec_dev, macsec_revision);
  95605. + _errno = -GET_ERROR_TYPE(err);
  95606. + if (unlikely(_errno < 0))
  95607. + pr_err("FM_MACSEC_GetRevision() = 0x%08x\n", err);
  95608. +
  95609. + return _errno;
  95610. +}
  95611. +EXPORT_SYMBOL(fm_macsec_get_revision);
  95612. +
  95613. +int fm_macsec_enable(struct fm_macsec_dev *fm_macsec_dev)
  95614. +{
  95615. + int err;
  95616. + int _errno;
  95617. +
  95618. + err = FM_MACSEC_Enable(fm_macsec_dev);
  95619. + _errno = -GET_ERROR_TYPE(err);
  95620. + if (unlikely(_errno < 0))
  95621. + pr_err("FM_MACSEC_Enable() = 0x%08x\n", err);
  95622. +
  95623. + return _errno;
  95624. +}
  95625. +EXPORT_SYMBOL(fm_macsec_enable);
  95626. +
  95627. +int fm_macsec_disable(struct fm_macsec_dev *fm_macsec_dev)
  95628. +{
  95629. + int err;
  95630. + int _errno;
  95631. +
  95632. + err = FM_MACSEC_Disable(fm_macsec_dev);
  95633. + _errno = -GET_ERROR_TYPE(err);
  95634. + if (unlikely(_errno < 0))
  95635. + pr_err("FM_MACSEC_Disable() = 0x%08x\n", err);
  95636. +
  95637. + return _errno;
  95638. +}
  95639. +EXPORT_SYMBOL(fm_macsec_disable);
  95640. +
  95641. +int fm_macsec_set_exception(struct fm_macsec_dev *fm_macsec_dev,
  95642. + fm_macsec_exception exception, bool enable)
  95643. +{
  95644. + int err;
  95645. + int _errno;
  95646. +
  95647. + err = FM_MACSEC_SetException(fm_macsec_dev, exception, enable);
  95648. + _errno = -GET_ERROR_TYPE(err);
  95649. + if (unlikely(_errno < 0))
  95650. + pr_err("FM_MACSEC_SetException() = 0x%08x\n", err);
  95651. +
  95652. + return _errno;
  95653. +}
  95654. +EXPORT_SYMBOL(fm_macsec_set_exception);
  95655. +
  95656. +/* Macsec SECY wrapper API */
  95657. +struct fm_macsec_secy_dev *fm_macsec_secy_config(struct fm_macsec_secy_params *secy_params)
  95658. +{
  95659. + struct fm_macsec_secy_dev *fm_macsec_secy;
  95660. +
  95661. + fm_macsec_secy = FM_MACSEC_SECY_Config((t_FmMacsecSecYParams *)secy_params);
  95662. + if (unlikely(fm_macsec_secy < 0))
  95663. + pr_err("FM_MACSEC_SECY_Config() failed\n");
  95664. +
  95665. + return fm_macsec_secy;
  95666. +}
  95667. +EXPORT_SYMBOL(fm_macsec_secy_config);
  95668. +
  95669. +int fm_macsec_secy_init(struct fm_macsec_secy_dev *fm_macsec_secy_dev)
  95670. +{
  95671. + int err;
  95672. + int _errno;
  95673. +
  95674. + err = FM_MACSEC_SECY_Init(fm_macsec_secy_dev);
  95675. + _errno = -GET_ERROR_TYPE(err);
  95676. + if (unlikely(_errno < 0))
  95677. + pr_err("FM_MACSEC_SECY_Init() = 0x%08x\n", err);
  95678. +
  95679. + return _errno;
  95680. +}
  95681. +EXPORT_SYMBOL(fm_macsec_secy_init);
  95682. +
  95683. +int fm_macsec_secy_free(struct fm_macsec_secy_dev *fm_macsec_secy_dev)
  95684. +{
  95685. + int err;
  95686. + int _errno;
  95687. +
  95688. + err = FM_MACSEC_SECY_Free(fm_macsec_secy_dev);
  95689. + _errno = -GET_ERROR_TYPE(err);
  95690. + if (unlikely(_errno < 0))
  95691. + pr_err("FM_MACSEC_SECY_Free() = 0x%08x\n", err);
  95692. +
  95693. + return _errno;
  95694. +}
  95695. +EXPORT_SYMBOL(fm_macsec_secy_free);
  95696. +
  95697. +int fm_macsec_secy_config_sci_insertion_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95698. + fm_macsec_sci_insertion_mode sci_insertion_mode)
  95699. +{
  95700. + int err;
  95701. + int _errno;
  95702. +
  95703. + err = FM_MACSEC_SECY_ConfigSciInsertionMode(fm_macsec_secy_dev,
  95704. + sci_insertion_mode);
  95705. + _errno = -GET_ERROR_TYPE(err);
  95706. + if (unlikely(_errno < 0))
  95707. + pr_err("FM_MACSEC_SECY_ConfigSciInsertionMode() = 0x%08x\n", err);
  95708. +
  95709. + return _errno;
  95710. +}
  95711. +EXPORT_SYMBOL(fm_macsec_secy_config_sci_insertion_mode);
  95712. +
  95713. +int fm_macsec_secy_config_protect_frames(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95714. + bool protect_frames)
  95715. +{
  95716. + int err;
  95717. + int _errno;
  95718. +
  95719. + err = FM_MACSEC_SECY_ConfigProtectFrames(fm_macsec_secy_dev,
  95720. + protect_frames);
  95721. + _errno = -GET_ERROR_TYPE(err);
  95722. + if (unlikely(_errno < 0))
  95723. + pr_err("FM_MACSEC_SECY_ConfigProtectFrames() = 0x%08x\n", err);
  95724. +
  95725. + return _errno;
  95726. +}
  95727. +EXPORT_SYMBOL(fm_macsec_secy_config_protect_frames);
  95728. +
  95729. +int fm_macsec_secy_config_replay_window(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95730. + bool replay_protect, uint32_t replay_window)
  95731. +{
  95732. + int err;
  95733. + int _errno;
  95734. +
  95735. + err = FM_MACSEC_SECY_ConfigReplayWindow(fm_macsec_secy_dev,
  95736. + replay_protect, replay_window);
  95737. + _errno = -GET_ERROR_TYPE(err);
  95738. + if (unlikely(_errno < 0))
  95739. + pr_err("FM_MACSEC_SECY_ConfigReplayWindow() = 0x%08x\n", err);
  95740. +
  95741. + return _errno;
  95742. +}
  95743. +EXPORT_SYMBOL(fm_macsec_secy_config_replay_window);
  95744. +
  95745. +int fm_macsec_secy_config_validation_mode(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95746. + fm_macsec_valid_frame_behavior validate_frames)
  95747. +{
  95748. + int err;
  95749. + int _errno;
  95750. +
  95751. + err = FM_MACSEC_SECY_ConfigValidationMode(fm_macsec_secy_dev,
  95752. + validate_frames);
  95753. + _errno = -GET_ERROR_TYPE(err);
  95754. + if (unlikely(_errno < 0))
  95755. + pr_err("FM_MACSEC_SECY_ConfigValidationMode() = 0x%08x\n", err);
  95756. +
  95757. + return _errno;
  95758. +}
  95759. +EXPORT_SYMBOL(fm_macsec_secy_config_validation_mode);
  95760. +
  95761. +int fm_macsec_secy_config_confidentiality(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95762. + bool confidentiality_enable,
  95763. + uint32_t confidentiality_offset)
  95764. +{
  95765. + int err;
  95766. + int _errno;
  95767. +
  95768. + err = FM_MACSEC_SECY_ConfigConfidentiality(fm_macsec_secy_dev,
  95769. + confidentiality_enable,
  95770. + confidentiality_offset);
  95771. + _errno = -GET_ERROR_TYPE(err);
  95772. + if (unlikely(_errno < 0))
  95773. + pr_err("FM_MACSEC_SECY_ConfigConfidentiality() = 0x%08x\n",
  95774. + err);
  95775. +
  95776. + return _errno;
  95777. +}
  95778. +EXPORT_SYMBOL(fm_macsec_secy_config_confidentiality);
  95779. +
  95780. +int fm_macsec_secy_config_point_to_point(struct fm_macsec_secy_dev *fm_macsec_secy_dev)
  95781. +{
  95782. + int err;
  95783. + int _errno;
  95784. +
  95785. + err = FM_MACSEC_SECY_ConfigPointToPoint(fm_macsec_secy_dev);
  95786. + _errno = -GET_ERROR_TYPE(err);
  95787. + if (unlikely(_errno < 0))
  95788. + pr_err("FM_MACSEC_SECY_ConfigPointToPoint() = 0x%08x\n",
  95789. + err);
  95790. +
  95791. + return _errno;
  95792. +}
  95793. +EXPORT_SYMBOL(fm_macsec_secy_config_point_to_point);
  95794. +
  95795. +int fm_macsec_secy_config_exception(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95796. + fm_macsec_secy_exception exception,
  95797. + bool enable)
  95798. +{
  95799. + int err;
  95800. + int _errno;
  95801. +
  95802. + err = FM_MACSEC_SECY_ConfigException(fm_macsec_secy_dev, exception,
  95803. + enable);
  95804. + _errno = -GET_ERROR_TYPE(err);
  95805. + if (unlikely(_errno < 0))
  95806. + pr_err("FM_MACSEC_SECY_ConfigException() = 0x%08x\n",
  95807. + err);
  95808. +
  95809. + return _errno;
  95810. +}
  95811. +EXPORT_SYMBOL(fm_macsec_secy_config_exception);
  95812. +
  95813. +int fm_macsec_secy_config_event(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95814. + fm_macsec_secy_event event,
  95815. + bool enable)
  95816. +{
  95817. + int err;
  95818. + int _errno;
  95819. +
  95820. + err = FM_MACSEC_SECY_ConfigEvent(fm_macsec_secy_dev, event, enable);
  95821. + _errno = -GET_ERROR_TYPE(err);
  95822. + if (unlikely(_errno < 0))
  95823. + pr_err("FM_MACSEC_SECY_ConfigEvent() = 0x%08x\n",
  95824. + err);
  95825. +
  95826. + return _errno;
  95827. +}
  95828. +EXPORT_SYMBOL(fm_macsec_secy_config_event);
  95829. +
  95830. +struct rx_sc_dev *fm_macsec_secy_create_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95831. + struct fm_macsec_secy_sc_params *params)
  95832. +{
  95833. + struct rx_sc_dev *rx_sc_dev;
  95834. +
  95835. + rx_sc_dev = FM_MACSEC_SECY_CreateRxSc(fm_macsec_secy_dev, (t_FmMacsecSecYSCParams *)params);
  95836. + if (unlikely(rx_sc_dev == NULL))
  95837. + pr_err("FM_MACSEC_SECY_CreateRxSc() failed\n");
  95838. +
  95839. + return rx_sc_dev;
  95840. +}
  95841. +EXPORT_SYMBOL(fm_macsec_secy_create_rxsc);
  95842. +
  95843. +int fm_macsec_secy_delete_rxsc(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95844. + struct rx_sc_dev *sc)
  95845. +{
  95846. + int err;
  95847. + int _errno;
  95848. +
  95849. + err = FM_MACSEC_SECY_DeleteRxSc(fm_macsec_secy_dev, sc);
  95850. + _errno = -GET_ERROR_TYPE(err);
  95851. + if (unlikely(_errno < 0))
  95852. + pr_err("FM_MACSEC_SECY_DeleteRxSc() = 0x%08x\n",
  95853. + err);
  95854. +
  95855. + return _errno;
  95856. +}
  95857. +EXPORT_SYMBOL(fm_macsec_secy_delete_rxsc);
  95858. +
  95859. +int fm_macsec_secy_create_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95860. + struct rx_sc_dev *sc, macsec_an_t an,
  95861. + uint32_t lowest_pn, macsec_sa_key_t key)
  95862. +{
  95863. + int err;
  95864. + int _errno;
  95865. +
  95866. + err = FM_MACSEC_SECY_CreateRxSa(fm_macsec_secy_dev, sc, an,
  95867. + lowest_pn, key);
  95868. + _errno = -GET_ERROR_TYPE(err);
  95869. + if (unlikely(_errno < 0))
  95870. + pr_err("FM_MACSEC_SECY_CreateRxSa() = 0x%08x\n",
  95871. + err);
  95872. +
  95873. + return _errno;
  95874. +}
  95875. +EXPORT_SYMBOL(fm_macsec_secy_create_rx_sa);
  95876. +
  95877. +int fm_macsec_secy_delete_rx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95878. + struct rx_sc_dev *sc, macsec_an_t an)
  95879. +{
  95880. + int err;
  95881. + int _errno;
  95882. +
  95883. + err = FM_MACSEC_SECY_DeleteRxSa(fm_macsec_secy_dev, sc, an);
  95884. + _errno = -GET_ERROR_TYPE(err);
  95885. + if (unlikely(_errno < 0))
  95886. + pr_err("FM_MACSEC_SECY_DeleteRxSa() = 0x%08x\n",
  95887. + err);
  95888. +
  95889. + return _errno;
  95890. +}
  95891. +EXPORT_SYMBOL(fm_macsec_secy_delete_rx_sa);
  95892. +
  95893. +int fm_macsec_secy_rxsa_enable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95894. + struct rx_sc_dev *sc,
  95895. + macsec_an_t an)
  95896. +{
  95897. + int err;
  95898. + int _errno;
  95899. +
  95900. + err = FM_MACSEC_SECY_RxSaEnableReceive(fm_macsec_secy_dev, sc, an);
  95901. + _errno = -GET_ERROR_TYPE(err);
  95902. + if (unlikely(_errno < 0))
  95903. + pr_err("FM_MACSEC_SECY_RxSaEnableReceive() = 0x%08x\n",
  95904. + err);
  95905. +
  95906. + return _errno;
  95907. +}
  95908. +EXPORT_SYMBOL(fm_macsec_secy_rxsa_enable_receive);
  95909. +
  95910. +int fm_macsec_secy_rxsa_disable_receive(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95911. + struct rx_sc_dev *sc,
  95912. + macsec_an_t an)
  95913. +{
  95914. + int err;
  95915. + int _errno;
  95916. +
  95917. + err = FM_MACSEC_SECY_RxSaDisableReceive(fm_macsec_secy_dev, sc, an);
  95918. + _errno = -GET_ERROR_TYPE(err);
  95919. + if (unlikely(_errno < 0))
  95920. + pr_err("FM_MACSEC_SECY_RxSaDisableReceive() = 0x%08x\n",
  95921. + err);
  95922. +
  95923. + return _errno;
  95924. +}
  95925. +EXPORT_SYMBOL(fm_macsec_secy_rxsa_disable_receive);
  95926. +
  95927. +int fm_macsec_secy_rxsa_update_next_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95928. + struct rx_sc_dev *sc,
  95929. + macsec_an_t an, uint32_t updt_next_pn)
  95930. +{
  95931. + int err;
  95932. + int _errno;
  95933. +
  95934. + err = FM_MACSEC_SECY_RxSaUpdateNextPn(fm_macsec_secy_dev, sc, an,
  95935. + updt_next_pn);
  95936. + _errno = -GET_ERROR_TYPE(err);
  95937. + if (unlikely(_errno < 0))
  95938. + pr_err("FM_MACSEC_SECY_RxSaUpdateNextPn() = 0x%08x\n", err);
  95939. +
  95940. + return _errno;
  95941. +}
  95942. +EXPORT_SYMBOL(fm_macsec_secy_rxsa_update_next_pn);
  95943. +
  95944. +int fm_macsec_secy_rxsa_update_lowest_pn(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95945. + struct rx_sc_dev *sc,
  95946. + macsec_an_t an, uint32_t updt_lowest_pn)
  95947. +{
  95948. + int err;
  95949. + int _errno;
  95950. +
  95951. + err = FM_MACSEC_SECY_RxSaUpdateLowestPn(fm_macsec_secy_dev, sc, an,
  95952. + updt_lowest_pn);
  95953. + _errno = -GET_ERROR_TYPE(err);
  95954. + if (unlikely(_errno < 0))
  95955. + pr_err("FM_MACSEC_SECY_RxSaUpdateLowestPn() = 0x%08x\n",
  95956. + err);
  95957. +
  95958. + return _errno;
  95959. +}
  95960. +EXPORT_SYMBOL(fm_macsec_secy_rxsa_update_lowest_pn);
  95961. +
  95962. +int fm_macsec_secy_rxsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95963. + struct rx_sc_dev *sc,
  95964. + macsec_an_t an, macsec_sa_key_t key)
  95965. +{
  95966. + int err;
  95967. + int _errno;
  95968. +
  95969. + err = FM_MACSEC_SECY_RxSaModifyKey(fm_macsec_secy_dev, sc, an, key);
  95970. + _errno = -GET_ERROR_TYPE(err);
  95971. + if (unlikely(_errno < 0))
  95972. + pr_err("FM_MACSEC_SECY_RxSaModifyKey() = 0x%08x\n",
  95973. + err);
  95974. +
  95975. + return _errno;
  95976. +}
  95977. +EXPORT_SYMBOL(fm_macsec_secy_rxsa_modify_key);
  95978. +
  95979. +int fm_macsec_secy_create_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95980. + macsec_an_t an, macsec_sa_key_t key)
  95981. +{
  95982. + int err;
  95983. + int _errno;
  95984. +
  95985. + err = FM_MACSEC_SECY_CreateTxSa(fm_macsec_secy_dev, an, key);
  95986. + _errno = -GET_ERROR_TYPE(err);
  95987. + if (unlikely(_errno < 0))
  95988. + pr_err("FM_MACSEC_SECY_CreateTxSa() = 0x%08x\n",
  95989. + err);
  95990. +
  95991. + return _errno;
  95992. +}
  95993. +EXPORT_SYMBOL(fm_macsec_secy_create_tx_sa);
  95994. +
  95995. +int fm_macsec_secy_delete_tx_sa(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  95996. + macsec_an_t an)
  95997. +{
  95998. + int err;
  95999. + int _errno;
  96000. +
  96001. + err = FM_MACSEC_SECY_DeleteTxSa(fm_macsec_secy_dev, an);
  96002. + _errno = -GET_ERROR_TYPE(err);
  96003. + if (unlikely(_errno < 0))
  96004. + pr_err("FM_MACSEC_SECY_DeleteTxSa() = 0x%08x\n",
  96005. + err);
  96006. +
  96007. + return _errno;
  96008. +}
  96009. +EXPORT_SYMBOL(fm_macsec_secy_delete_tx_sa);
  96010. +
  96011. +int fm_macsec_secy_txsa_modify_key(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  96012. + macsec_an_t next_active_an,
  96013. + macsec_sa_key_t key)
  96014. +{
  96015. + int err;
  96016. + int _errno;
  96017. +
  96018. + err = FM_MACSEC_SECY_TxSaModifyKey(fm_macsec_secy_dev, next_active_an,
  96019. + key);
  96020. + _errno = -GET_ERROR_TYPE(err);
  96021. + if (unlikely(_errno < 0))
  96022. + pr_err("FM_MACSEC_SECY_TxSaModifyKey() = 0x%08x\n",
  96023. + err);
  96024. +
  96025. + return _errno;
  96026. +}
  96027. +EXPORT_SYMBOL(fm_macsec_secy_txsa_modify_key);
  96028. +
  96029. +int fm_macsec_secy_txsa_set_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  96030. + macsec_an_t an)
  96031. +{
  96032. + int err;
  96033. + int _errno;
  96034. +
  96035. + err = FM_MACSEC_SECY_TxSaSetActive(fm_macsec_secy_dev, an);
  96036. + _errno = -GET_ERROR_TYPE(err);
  96037. + if (unlikely(_errno < 0))
  96038. + pr_err("FM_MACSEC_SECY_TxSaSetActive() = 0x%08x\n",
  96039. + err);
  96040. +
  96041. + return _errno;
  96042. +}
  96043. +EXPORT_SYMBOL(fm_macsec_secy_txsa_set_active);
  96044. +
  96045. +int fm_macsec_secy_txsa_get_active(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  96046. + macsec_an_t *p_an)
  96047. +{
  96048. + int err;
  96049. + int _errno;
  96050. +
  96051. + err = FM_MACSEC_SECY_TxSaGetActive(fm_macsec_secy_dev, p_an);
  96052. + _errno = -GET_ERROR_TYPE(err);
  96053. + if (unlikely(_errno < 0))
  96054. + pr_err("FM_MACSEC_SECY_TxSaGetActive() = 0x%08x\n",
  96055. + err);
  96056. +
  96057. + return _errno;
  96058. +}
  96059. +EXPORT_SYMBOL(fm_macsec_secy_txsa_get_active);
  96060. +
  96061. +int fm_macsec_secy_get_rxsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  96062. + struct rx_sc_dev *sc, uint32_t *sc_phys_id)
  96063. +{
  96064. + int err;
  96065. + int _errno;
  96066. +
  96067. + err = FM_MACSEC_SECY_GetRxScPhysId(fm_macsec_secy_dev, sc, sc_phys_id);
  96068. + _errno = -GET_ERROR_TYPE(err);
  96069. + if (unlikely(_errno < 0))
  96070. + pr_err("FM_MACSEC_SECY_GetRxScPhysId() = 0x%08x\n",
  96071. + err);
  96072. +
  96073. + return _errno;
  96074. +}
  96075. +EXPORT_SYMBOL(fm_macsec_secy_get_rxsc_phys_id);
  96076. +
  96077. +int fm_macsec_secy_get_txsc_phys_id(struct fm_macsec_secy_dev *fm_macsec_secy_dev,
  96078. + uint32_t *sc_phys_id)
  96079. +{
  96080. + int err;
  96081. + int _errno;
  96082. +
  96083. + err = FM_MACSEC_SECY_GetTxScPhysId(fm_macsec_secy_dev, sc_phys_id);
  96084. + _errno = -GET_ERROR_TYPE(err);
  96085. + if (unlikely(_errno < 0))
  96086. + pr_err("FM_MACSEC_SECY_GetTxScPhysId() = 0x%08x\n",
  96087. + err);
  96088. +
  96089. + return _errno;
  96090. +}
  96091. +EXPORT_SYMBOL(fm_macsec_secy_get_txsc_phys_id);
  96092. +
  96093. +static t_Handle h_FmLnxWrp;
  96094. +
  96095. +static int __init __cold fm_load (void)
  96096. +{
  96097. + if ((h_FmLnxWrp = LNXWRP_FM_Init()) == NULL)
  96098. + {
  96099. + printk("Failed to init FM wrapper!\n");
  96100. + return -ENODEV;
  96101. + }
  96102. +
  96103. + printk(KERN_CRIT "Freescale FM module," \
  96104. + " FMD API version %d.%d.%d\n",
  96105. + FMD_API_VERSION_MAJOR,
  96106. + FMD_API_VERSION_MINOR,
  96107. + FMD_API_VERSION_RESPIN);
  96108. + return 0;
  96109. +}
  96110. +
  96111. +static void __exit __cold fm_unload (void)
  96112. +{
  96113. + if (h_FmLnxWrp)
  96114. + LNXWRP_FM_Free(h_FmLnxWrp);
  96115. +}
  96116. +
  96117. +module_init (fm_load);
  96118. +module_exit (fm_unload);
  96119. --- /dev/null
  96120. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm.h
  96121. @@ -0,0 +1,294 @@
  96122. +/*
  96123. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  96124. + *
  96125. + * Redistribution and use in source and binary forms, with or without
  96126. + * modification, are permitted provided that the following conditions are met:
  96127. + * * Redistributions of source code must retain the above copyright
  96128. + * notice, this list of conditions and the following disclaimer.
  96129. + * * Redistributions in binary form must reproduce the above copyright
  96130. + * notice, this list of conditions and the following disclaimer in the
  96131. + * documentation and/or other materials provided with the distribution.
  96132. + * * Neither the name of Freescale Semiconductor nor the
  96133. + * names of its contributors may be used to endorse or promote products
  96134. + * derived from this software without specific prior written permission.
  96135. + *
  96136. + *
  96137. + * ALTERNATIVELY, this software may be distributed under the terms of the
  96138. + * GNU General Public License ("GPL") as published by the Free Software
  96139. + * Foundation, either version 2 of that License or (at your option) any
  96140. + * later version.
  96141. + *
  96142. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  96143. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  96144. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  96145. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  96146. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  96147. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  96148. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  96149. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  96150. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  96151. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  96152. + */
  96153. +
  96154. +/*
  96155. + @File lnxwrp_fm.h
  96156. +
  96157. + @Author Shlomi Gridish
  96158. +
  96159. + @Description FM Linux wrapper functions.
  96160. +
  96161. +*/
  96162. +
  96163. +#ifndef __LNXWRP_FM_H__
  96164. +#define __LNXWRP_FM_H__
  96165. +
  96166. +#include <linux/fsl_qman.h> /* struct qman_fq */
  96167. +
  96168. +#include "std_ext.h"
  96169. +#include "error_ext.h"
  96170. +#include "list_ext.h"
  96171. +
  96172. +#include "lnxwrp_fm_ext.h"
  96173. +
  96174. +#define FM_MAX_NUM_OF_ADV_SETTINGS 10
  96175. +
  96176. +#define LNXWRP_FM_NUM_OF_SHARED_PROFILES 16
  96177. +
  96178. +#if defined(CONFIG_FMAN_DISABLE_OH_TO_REUSE_RESOURCES)
  96179. +#define FM_10G_OPENDMA_MIN_TRESHOLD 8 /* 10g minimum treshold if only HC is enabled and no OH port enabled */
  96180. +#define FM_OPENDMA_RX_TX_RAPORT 2 /* RX = 2*TX */
  96181. +#else
  96182. +#define FM_10G_OPENDMA_MIN_TRESHOLD 7 /* 10g minimum treshold if 7 OH ports are enabled */
  96183. +#define FM_OPENDMA_RX_TX_RAPORT 1 /* RX = TX */
  96184. +#endif
  96185. +#define FM_DEFAULT_TX10G_OPENDMA 8 /* default TX 10g open dmas */
  96186. +#define FM_DEFAULT_RX10G_OPENDMA 8 /* default RX 10g open dmas */
  96187. +
  96188. +#define FRAG_MANIP_SPACE 128
  96189. +#define FRAG_DATA_ALIGN 64
  96190. +
  96191. +#ifndef CONFIG_FSL_FM_MAX_FRAME_SIZE
  96192. +#define CONFIG_FSL_FM_MAX_FRAME_SIZE 0
  96193. +#endif
  96194. +
  96195. +#ifndef CONFIG_FSL_FM_RX_EXTRA_HEADROOM
  96196. +#define CONFIG_FSL_FM_RX_EXTRA_HEADROOM 16
  96197. +#endif
  96198. +
  96199. +typedef enum {
  96200. + e_NO_PCD = 0,
  96201. + e_FM_PCD_3_TUPLE
  96202. +} e_LnxWrpFmPortPcdDefUseCase;
  96203. +
  96204. +
  96205. +typedef struct t_FmTestFq {
  96206. + struct qman_fq fq_base;
  96207. + t_Handle h_Arg;
  96208. +} t_FmTestFq;
  96209. +
  96210. +typedef struct {
  96211. + uint8_t id; /* sw port id, see SW_PORT_ID_TO_HW_PORT_ID() in fm_common.h */
  96212. + int minor;
  96213. + char name[20];
  96214. + bool active;
  96215. + uint64_t phys_baseAddr;
  96216. + uint64_t baseAddr; /* Port's *virtual* address */
  96217. + uint32_t memSize;
  96218. + t_WrpFmPortDevSettings settings;
  96219. + t_FmExtPools opExtPools;
  96220. + uint8_t totalNumOfSchemes;
  96221. + uint8_t schemesBase;
  96222. + uint8_t numOfSchemesUsed;
  96223. + uint32_t pcdBaseQ;
  96224. + uint16_t pcdNumOfQs;
  96225. + struct fm_port_pcd_param pcd_owner_params;
  96226. + e_LnxWrpFmPortPcdDefUseCase defPcd;
  96227. + t_Handle h_DefNetEnv;
  96228. + t_Handle h_Schemes[FM_PCD_KG_NUM_OF_SCHEMES];
  96229. + t_FmBufferPrefixContent buffPrefixContent;
  96230. + t_Handle h_Dev;
  96231. + t_Handle h_DfltVsp;
  96232. + t_Handle h_LnxWrpFmDev;
  96233. + uint16_t txCh;
  96234. + struct device *dev;
  96235. + struct device_attribute *dev_attr_stats;
  96236. + struct device_attribute *dev_attr_regs;
  96237. + struct device_attribute *dev_attr_bmi_regs;
  96238. + struct device_attribute *dev_attr_qmi_regs;
  96239. +#if (DPAA_VERSION >= 11)
  96240. + struct device_attribute *dev_attr_ipv4_opt;
  96241. +#endif
  96242. + struct device_attribute *dev_attr_dsar_regs;
  96243. + struct device_attribute *dev_attr_dsar_mem;
  96244. + struct auto_res_tables_sizes dsar_table_sizes;
  96245. +} t_LnxWrpFmPortDev;
  96246. +
  96247. +typedef struct {
  96248. + uint8_t id;
  96249. + bool active;
  96250. + uint64_t baseAddr;
  96251. + uint32_t memSize;
  96252. + t_WrpFmMacDevSettings settings;
  96253. + t_Handle h_Dev;
  96254. + t_Handle h_LnxWrpFmDev;
  96255. +} t_LnxWrpFmMacDev;
  96256. +
  96257. +/* information about all active ports for an FMan.
  96258. + * !Some ports may be disabled by u-boot, thus will not be available */
  96259. +struct fm_active_ports {
  96260. + uint32_t num_oh_ports;
  96261. + uint32_t num_tx_ports;
  96262. + uint32_t num_rx_ports;
  96263. + uint32_t num_tx25_ports;
  96264. + uint32_t num_rx25_ports;
  96265. + uint32_t num_tx10_ports;
  96266. + uint32_t num_rx10_ports;
  96267. +};
  96268. +
  96269. +/* FMan resources precalculated at fm probe based
  96270. + * on available FMan port. */
  96271. +struct fm_resource_settings {
  96272. + /* buffers - fifo sizes */
  96273. + uint32_t tx1g_num_buffers;
  96274. + uint32_t rx1g_num_buffers;
  96275. + uint32_t tx2g5_num_buffers; /* Not supported yet by LLD */
  96276. + uint32_t rx2g5_num_buffers; /* Not supported yet by LLD */
  96277. + uint32_t tx10g_num_buffers;
  96278. + uint32_t rx10g_num_buffers;
  96279. + uint32_t oh_num_buffers;
  96280. + uint32_t shared_ext_buffers;
  96281. +
  96282. + /* open DMAs */
  96283. + uint32_t tx_1g_dmas;
  96284. + uint32_t rx_1g_dmas;
  96285. + uint32_t tx_2g5_dmas; /* Not supported yet by LLD */
  96286. + uint32_t rx_2g5_dmas; /* Not supported yet by LLD */
  96287. + uint32_t tx_10g_dmas;
  96288. + uint32_t rx_10g_dmas;
  96289. + uint32_t oh_dmas;
  96290. + uint32_t shared_ext_open_dma;
  96291. +
  96292. + /* Tnums */
  96293. + uint32_t tx_1g_tnums;
  96294. + uint32_t rx_1g_tnums;
  96295. + uint32_t tx_2g5_tnums; /* Not supported yet by LLD */
  96296. + uint32_t rx_2g5_tnums; /* Not supported yet by LLD */
  96297. + uint32_t tx_10g_tnums;
  96298. + uint32_t rx_10g_tnums;
  96299. + uint32_t oh_tnums;
  96300. + uint32_t shared_ext_tnums;
  96301. +};
  96302. +
  96303. +typedef struct {
  96304. + uint8_t id;
  96305. + char name[10];
  96306. + bool active;
  96307. + bool pcdActive;
  96308. + bool prsActive;
  96309. + bool kgActive;
  96310. + bool ccActive;
  96311. + bool plcrActive;
  96312. + e_LnxWrpFmPortPcdDefUseCase defPcd;
  96313. + uint32_t usedSchemes;
  96314. + uint8_t totalNumOfSharedSchemes;
  96315. + uint8_t sharedSchemesBase;
  96316. + uint8_t numOfSchemesUsed;
  96317. + uint8_t defNetEnvId;
  96318. + uint64_t fmPhysBaseAddr;
  96319. + uint64_t fmBaseAddr;
  96320. + uint32_t fmMemSize;
  96321. + uint64_t fmMuramPhysBaseAddr;
  96322. + uint64_t fmMuramBaseAddr;
  96323. + uint32_t fmMuramMemSize;
  96324. + uint64_t fmRtcPhysBaseAddr;
  96325. + uint64_t fmRtcBaseAddr;
  96326. + uint32_t fmRtcMemSize;
  96327. + uint64_t fmVspPhysBaseAddr;
  96328. + uint64_t fmVspBaseAddr;
  96329. + uint32_t fmVspMemSize;
  96330. + int irq;
  96331. + int err_irq;
  96332. + t_WrpFmDevSettings fmDevSettings;
  96333. + t_WrpFmPcdDevSettings fmPcdDevSettings;
  96334. + t_Handle h_Dev;
  96335. + uint16_t hcCh;
  96336. +
  96337. + t_Handle h_MuramDev;
  96338. + t_Handle h_PcdDev;
  96339. + t_Handle h_RtcDev;
  96340. +
  96341. + t_Handle h_DsarRxPort;
  96342. + t_Handle h_DsarTxPort;
  96343. +
  96344. + t_LnxWrpFmPortDev hcPort;
  96345. + t_LnxWrpFmPortDev opPorts[FM_MAX_NUM_OF_OH_PORTS-1];
  96346. + t_LnxWrpFmPortDev rxPorts[FM_MAX_NUM_OF_RX_PORTS];
  96347. + t_LnxWrpFmPortDev txPorts[FM_MAX_NUM_OF_TX_PORTS];
  96348. + t_LnxWrpFmMacDev macs[FM_MAX_NUM_OF_MACS];
  96349. + struct fm_active_ports fm_active_ports_info;
  96350. + struct fm_resource_settings fm_resource_settings_info;
  96351. +
  96352. + struct device *dev;
  96353. + struct resource *res;
  96354. + int major;
  96355. + struct class *fm_class;
  96356. + struct device_attribute *dev_attr_stats;
  96357. + struct device_attribute *dev_attr_regs;
  96358. + struct device_attribute *dev_attr_risc_load;
  96359. +
  96360. + struct device_attribute *dev_pcd_attr_stats;
  96361. + struct device_attribute *dev_plcr_attr_regs;
  96362. + struct device_attribute *dev_prs_attr_regs;
  96363. + struct device_attribute *dev_fm_fpm_attr_regs;
  96364. + struct device_attribute *dev_fm_kg_attr_regs;
  96365. + struct device_attribute *dev_fm_kg_pe_attr_regs;
  96366. + struct device_attribute *dev_attr_muram_free_size;
  96367. + struct device_attribute *dev_attr_fm_ctrl_code_ver;
  96368. +
  96369. +
  96370. + struct qman_fq *hc_tx_conf_fq, *hc_tx_err_fq, *hc_tx_fq;
  96371. +} t_LnxWrpFmDev;
  96372. +
  96373. +typedef struct {
  96374. + t_LnxWrpFmDev *p_FmDevs[INTG_MAX_NUM_OF_FM];
  96375. +} t_LnxWrpFm;
  96376. +#define LNXWRP_FM_OBJECT(ptr) LIST_OBJECT(ptr, t_LnxWrpFm, fms[((t_LnxWrpFmDev *)ptr)->id])
  96377. +
  96378. +
  96379. +t_Error LnxwrpFmIOCTL(t_LnxWrpFmDev *p_LnxWrpFmDev, unsigned int cmd, unsigned long arg, bool compat);
  96380. +t_Error LnxwrpFmPortIOCTL(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev, unsigned int cmd, unsigned long arg, bool compat);
  96381. +
  96382. +
  96383. +#if 0
  96384. +static __inline__ t_Error AllocSchemesForPort(t_LnxWrpFmDev *p_LnxWrpFmDev, uint8_t numSchemes, uint8_t *p_BaseSchemeNum)
  96385. +{
  96386. + uint32_t schemeMask;
  96387. + uint8_t i;
  96388. +
  96389. + if (!numSchemes)
  96390. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  96391. +
  96392. + schemeMask = 0x80000000;
  96393. + *p_BaseSchemeNum = 0xff;
  96394. +
  96395. + for (i=0; schemeMask && numSchemes; schemeMask>>=1, i++)
  96396. + if ((p_LnxWrpFmDev->usedSchemes & schemeMask) == 0)
  96397. + {
  96398. + p_LnxWrpFmDev->usedSchemes |= schemeMask;
  96399. + numSchemes--;
  96400. + if (*p_BaseSchemeNum==0xff)
  96401. + *p_BaseSchemeNum = i;
  96402. + }
  96403. + else if (*p_BaseSchemeNum!=0xff)
  96404. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("Fragmentation on schemes array!!!"));
  96405. +
  96406. + if (numSchemes)
  96407. + RETURN_ERROR(MINOR, E_FULL, ("schemes!!!"));
  96408. + return E_OK;
  96409. +}
  96410. +#endif
  96411. +
  96412. +void LnxWrpPCDIOCTLTypeChecking(void);
  96413. +void LnxWrpPCDIOCTLEnumChecking(void);
  96414. +
  96415. +#endif /* __LNXWRP_FM_H__ */
  96416. --- /dev/null
  96417. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_fm_port.c
  96418. @@ -0,0 +1,1507 @@
  96419. +/*
  96420. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  96421. + *
  96422. + * Redistribution and use in source and binary forms, with or without
  96423. + * modification, are permitted provided that the following conditions are met:
  96424. + * * Redistributions of source code must retain the above copyright
  96425. + * notice, this list of conditions and the following disclaimer.
  96426. + * * Redistributions in binary form must reproduce the above copyright
  96427. + * notice, this list of conditions and the following disclaimer in the
  96428. + * documentation and/or other materials provided with the distribution.
  96429. + * * Neither the name of Freescale Semiconductor nor the
  96430. + * names of its contributors may be used to endorse or promote products
  96431. + * derived from this software without specific prior written permission.
  96432. + *
  96433. + *
  96434. + * ALTERNATIVELY, this software may be distributed under the terms of the
  96435. + * GNU General Public License ("GPL") as published by the Free Software
  96436. + * Foundation, either version 2 of that License or (at your option) any
  96437. + * later version.
  96438. + *
  96439. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  96440. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  96441. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  96442. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  96443. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  96444. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  96445. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  96446. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  96447. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  96448. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  96449. + */
  96450. +
  96451. +/*
  96452. + @File lnxwrp_fm_port.c
  96453. +
  96454. + @Description FMD wrapper - FMan port functions.
  96455. +
  96456. +*/
  96457. +
  96458. +#include <linux/version.h>
  96459. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  96460. +#define MODVERSIONS
  96461. +#endif
  96462. +#ifdef MODVERSIONS
  96463. +#include <config/modversions.h>
  96464. +#endif /* MODVERSIONS */
  96465. +#include <linux/kernel.h>
  96466. +#include <linux/module.h>
  96467. +#include <linux/of_platform.h>
  96468. +#include <linux/of_address.h>
  96469. +#include <linux/cdev.h>
  96470. +#include <linux/slab.h>
  96471. +#include <linux/spinlock.h>
  96472. +#ifndef CONFIG_FMAN_ARM
  96473. +#include <linux/fsl/svr.h>
  96474. +#endif
  96475. +#include <linux/io.h>
  96476. +
  96477. +#include "sprint_ext.h"
  96478. +#include "fm_common.h"
  96479. +#include "lnxwrp_fsl_fman.h"
  96480. +#include "fm_port_ext.h"
  96481. +#if (DPAA_VERSION >= 11)
  96482. +#include "fm_vsp_ext.h"
  96483. +#endif /* DPAA_VERSION >= 11 */
  96484. +#include "fm_ioctls.h"
  96485. +#include "lnxwrp_resources.h"
  96486. +#include "lnxwrp_sysfs_fm_port.h"
  96487. +
  96488. +#define __ERR_MODULE__ MODULE_FM
  96489. +
  96490. +extern struct device_node *GetFmAdvArgsDevTreeNode (uint8_t fmIndx);
  96491. +
  96492. +/* TODO: duplicated, see lnxwrp_fm.c */
  96493. +#define ADD_ADV_CONFIG_NO_RET(_func, _param)\
  96494. +do {\
  96495. + if (i < max) {\
  96496. + p_Entry = &p_Entrys[i];\
  96497. + p_Entry->p_Function = _func;\
  96498. + _param\
  96499. + i++;\
  96500. + } else {\
  96501. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,\
  96502. + ("Number of advanced-configuration entries exceeded"));\
  96503. + } \
  96504. +} while (0)
  96505. +
  96506. +#ifndef CONFIG_FMAN_ARM
  96507. +#define IS_T1023_T1024 (SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1024 || \
  96508. + SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1023)
  96509. +#endif
  96510. +
  96511. +static volatile int hcFrmRcv/* = 0 */;
  96512. +static spinlock_t lock;
  96513. +
  96514. +static enum qman_cb_dqrr_result qm_tx_conf_dqrr_cb(struct qman_portal *portal,
  96515. + struct qman_fq *fq,
  96516. + const struct qm_dqrr_entry
  96517. + *dq)
  96518. +{
  96519. + t_LnxWrpFmDev *p_LnxWrpFmDev = ((t_FmTestFq *) fq)->h_Arg;
  96520. + unsigned long flags;
  96521. +
  96522. +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
  96523. +{
  96524. + /* extract the HC frame address */
  96525. +#ifdef CONFIG_ARM
  96526. + uint32_t *hcf_va = XX_PhysToVirt(((struct qm_fd *)&dq->fd)->addr);
  96527. +#else
  96528. + uint64_t hcf_va = (uint64_t)XX_PhysToVirt(((struct qm_fd *)&dq->fd)->addr);
  96529. +#endif
  96530. + int hcf_l = ((struct qm_fd *)&dq->fd)->length20;
  96531. + int i;
  96532. +
  96533. + /* 32b byteswap of all data in the HC Frame */
  96534. + for(i = 0; i < hcf_l / 4; ++i)
  96535. + ((uint32_t *)(hcf_va))[i] =
  96536. + ___constant_swab32(((uint32_t *)(hcf_va))[i]);
  96537. +}
  96538. +{
  96539. + /* byteswap FD's 40bit address field LE to BE*/
  96540. + uint8_t t;
  96541. +
  96542. + t = ((uint8_t*)&dq->fd)[6];
  96543. + ((uint8_t*)&dq->fd)[6] = ((uint8_t*)&dq->fd)[5];
  96544. + ((uint8_t*)&dq->fd)[5] = ((uint8_t*)&dq->fd)[4];
  96545. + ((uint8_t*)&dq->fd)[4] = ((uint8_t*)&dq->fd)[3];
  96546. + ((uint8_t*)&dq->fd)[3] = ((uint8_t*)&dq->fd)[7];
  96547. + ((uint8_t*)&dq->fd)[7] = t;
  96548. +}
  96549. +
  96550. +#endif
  96551. + FM_PCD_HcTxConf(p_LnxWrpFmDev->h_PcdDev, (t_DpaaFD *)&dq->fd);
  96552. + spin_lock_irqsave(&lock, flags);
  96553. + hcFrmRcv--;
  96554. + spin_unlock_irqrestore(&lock, flags);
  96555. +
  96556. + return qman_cb_dqrr_consume;
  96557. +}
  96558. +
  96559. +static enum qman_cb_dqrr_result qm_tx_dqrr_cb(struct qman_portal *portal,
  96560. + struct qman_fq *fq,
  96561. + const struct qm_dqrr_entry *dq)
  96562. +{
  96563. + WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
  96564. + __func__);
  96565. + return qman_cb_dqrr_consume;
  96566. +}
  96567. +
  96568. +static void qm_err_cb(struct qman_portal *portal,
  96569. + struct qman_fq *fq, const struct qm_mr_entry *msg)
  96570. +{
  96571. + WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
  96572. + __func__);
  96573. +}
  96574. +
  96575. +static struct qman_fq *FqAlloc(t_LnxWrpFmDev * p_LnxWrpFmDev,
  96576. + uint32_t fqid,
  96577. + uint32_t flags, uint16_t channel, uint8_t wq)
  96578. +{
  96579. + int _errno;
  96580. + struct qman_fq *fq = NULL;
  96581. + t_FmTestFq *p_FmtFq;
  96582. + struct qm_mcc_initfq initfq;
  96583. +
  96584. + p_FmtFq = (t_FmTestFq *) XX_Malloc(sizeof(t_FmTestFq));
  96585. + if (!p_FmtFq) {
  96586. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FQ obj!!!"));
  96587. + return NULL;
  96588. + }
  96589. +
  96590. + p_FmtFq->fq_base.cb.dqrr = ((flags & QMAN_FQ_FLAG_NO_ENQUEUE)
  96591. + ? qm_tx_conf_dqrr_cb
  96592. + : qm_tx_dqrr_cb);
  96593. + p_FmtFq->fq_base.cb.ern = qm_err_cb;
  96594. + /* p_FmtFq->fq_base.cb.fqs = qm_err_cb; */
  96595. + /* qm_err_cb wrongly called when the FQ is parked */
  96596. + p_FmtFq->fq_base.cb.fqs = NULL;
  96597. + p_FmtFq->h_Arg = (t_Handle) p_LnxWrpFmDev;
  96598. + if (fqid == 0) {
  96599. + flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
  96600. + flags &= ~QMAN_FQ_FLAG_NO_MODIFY;
  96601. + } else {
  96602. + flags &= ~QMAN_FQ_FLAG_DYNAMIC_FQID;
  96603. + }
  96604. +
  96605. + if (qman_create_fq(fqid, flags, &p_FmtFq->fq_base)) {
  96606. + REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FQ obj - qman_new_fq!!!"));
  96607. + XX_Free(p_FmtFq);
  96608. + return NULL;
  96609. + }
  96610. + fq = &p_FmtFq->fq_base;
  96611. +
  96612. + if (!(flags & QMAN_FQ_FLAG_NO_MODIFY)) {
  96613. + initfq.we_mask = QM_INITFQ_WE_DESTWQ;
  96614. + initfq.fqd.dest.channel = channel;
  96615. + initfq.fqd.dest.wq = wq;
  96616. +
  96617. + _errno = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &initfq);
  96618. + if (unlikely(_errno < 0)) {
  96619. + REPORT_ERROR(MAJOR, E_NO_MEMORY,
  96620. + ("FQ obj - qman_init_fq!!!"));
  96621. + qman_destroy_fq(fq, 0);
  96622. + XX_Free(p_FmtFq);
  96623. + return NULL;
  96624. + }
  96625. + }
  96626. +
  96627. + DBG(TRACE,
  96628. + ("fqid %d, flags 0x%08x, channel %d, wq %d", qman_fq_fqid(fq),
  96629. + flags, channel, wq));
  96630. +
  96631. + return fq;
  96632. +}
  96633. +
  96634. +static void FqFree(struct qman_fq *fq)
  96635. +{
  96636. + int _errno;
  96637. +
  96638. + _errno = qman_retire_fq(fq, NULL);
  96639. + if (unlikely(_errno < 0))
  96640. + printk(KERN_WARNING "qman_retire_fq(%u) = %d\n", qman_fq_fqid(fq), _errno);
  96641. +
  96642. + _errno = qman_oos_fq(fq);
  96643. + if (unlikely(_errno < 0))
  96644. + printk(KERN_WARNING "qman_oos_fq(%u) = %d\n", qman_fq_fqid(fq), _errno);
  96645. +
  96646. + qman_destroy_fq(fq, 0);
  96647. + XX_Free((t_FmTestFq *) fq);
  96648. +}
  96649. +
  96650. +static t_Error QmEnqueueCB(t_Handle h_Arg, void *p_Fd)
  96651. +{
  96652. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *) h_Arg;
  96653. + int _errno, timeout = 1000000;
  96654. + unsigned long flags;
  96655. +
  96656. + ASSERT_COND(p_LnxWrpFmDev);
  96657. +
  96658. + spin_lock_irqsave(&lock, flags);
  96659. + hcFrmRcv++;
  96660. + spin_unlock_irqrestore(&lock, flags);
  96661. +
  96662. +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
  96663. +{
  96664. + /* byteswap FD's 40bit address field */
  96665. + uint8_t t;
  96666. +
  96667. + t = ((uint8_t*)p_Fd)[7];
  96668. + ((uint8_t*)p_Fd)[7] = ((uint8_t*)p_Fd)[3];
  96669. + ((uint8_t*)p_Fd)[3] = ((uint8_t*)p_Fd)[4];
  96670. + ((uint8_t*)p_Fd)[4] = ((uint8_t*)p_Fd)[5];
  96671. + ((uint8_t*)p_Fd)[5] = ((uint8_t*)p_Fd)[6];
  96672. + ((uint8_t*)p_Fd)[6] = t;
  96673. +}
  96674. +{
  96675. + /* extract the HC frame address */
  96676. +#ifdef CONFIG_ARM
  96677. + uint32_t *hcf_va = XX_PhysToVirt(((struct qm_fd *) p_Fd)->addr);
  96678. +#else
  96679. + uint64_t hcf_va = (uint64_t)XX_PhysToVirt(((struct qm_fd *) p_Fd)->addr);
  96680. +#endif
  96681. + int hcf_l = ((struct qm_fd *)p_Fd)->length20;
  96682. + int i;
  96683. +
  96684. + /* 32b byteswap of all data in the HC Frame */
  96685. + for(i = 0; i < hcf_l / 4; ++i)
  96686. + ((uint32_t *)(hcf_va))[i] =
  96687. + ___constant_swab32(((uint32_t *)(hcf_va))[i]);
  96688. +}
  96689. +#endif
  96690. +
  96691. + _errno = qman_enqueue(p_LnxWrpFmDev->hc_tx_fq, (struct qm_fd *) p_Fd,
  96692. + 0);
  96693. + if (_errno)
  96694. + RETURN_ERROR(MINOR, E_INVALID_STATE,
  96695. + ("qman_enqueue() failed"));
  96696. +
  96697. + while (hcFrmRcv && --timeout) {
  96698. + udelay(1);
  96699. + cpu_relax();
  96700. + }
  96701. + if (timeout == 0) {
  96702. + dump_stack();
  96703. + RETURN_ERROR(MINOR, E_WRITE_FAILED,
  96704. + ("timeout waiting for Tx confirmation"));
  96705. + return E_WRITE_FAILED;
  96706. + }
  96707. +
  96708. + return E_OK;
  96709. +}
  96710. +
  96711. +static t_LnxWrpFmPortDev *ReadFmPortDevTreeNode(struct platform_device
  96712. + *of_dev)
  96713. +{
  96714. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  96715. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
  96716. + struct device_node *fm_node, *port_node;
  96717. + struct resource res;
  96718. + const uint32_t *uint32_prop;
  96719. + int _errno = 0, lenp;
  96720. + uint32_t tmp_prop;
  96721. +
  96722. +#ifdef CONFIG_FMAN_P1023
  96723. + static unsigned char have_oh_port/* = 0 */;
  96724. +#endif
  96725. +
  96726. + port_node = of_node_get(of_dev->dev.of_node);
  96727. +
  96728. + /* Get the FM node */
  96729. + fm_node = of_get_parent(port_node);
  96730. + if (unlikely(fm_node == NULL)) {
  96731. + REPORT_ERROR(MAJOR, E_NO_DEVICE,
  96732. + ("of_get_parent() = %d", _errno));
  96733. + return NULL;
  96734. + }
  96735. +
  96736. + p_LnxWrpFmDev =
  96737. + dev_get_drvdata(&of_find_device_by_node(fm_node)->dev);
  96738. + of_node_put(fm_node);
  96739. +
  96740. + /* if fm_probe() failed, no point in going further with port probing */
  96741. + if (p_LnxWrpFmDev == NULL)
  96742. + return NULL;
  96743. +
  96744. + uint32_prop =
  96745. + (uint32_t *) of_get_property(port_node, "cell-index", &lenp);
  96746. + if (unlikely(uint32_prop == NULL)) {
  96747. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96748. + ("of_get_property(%s, cell-index) failed",
  96749. + port_node->full_name));
  96750. + return NULL;
  96751. + }
  96752. + tmp_prop = be32_to_cpu(*uint32_prop);
  96753. + if (WARN_ON(lenp != sizeof(uint32_t)))
  96754. + return NULL;
  96755. + if (of_device_is_compatible(port_node, "fsl,fman-port-oh")) {
  96756. + if (unlikely(tmp_prop >= FM_MAX_NUM_OF_OH_PORTS)) {
  96757. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96758. + ("of_get_property(%s, cell-index) failed",
  96759. + port_node->full_name));
  96760. + return NULL;
  96761. + }
  96762. +
  96763. +#ifdef CONFIG_FMAN_P1023
  96764. + /* Beware, this can be done when there is only
  96765. + one FMan to be initialized */
  96766. + if (!have_oh_port) {
  96767. + have_oh_port = 1; /* first OP/HC port
  96768. + is used for host command */
  96769. +#else
  96770. + /* Here it is hardcoded the use of the OH port 1
  96771. + (with cell-index 0) */
  96772. + if (tmp_prop == 0) {
  96773. +#endif
  96774. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->hcPort;
  96775. + p_LnxWrpFmPortDev->id = 0;
  96776. + /*
  96777. + p_LnxWrpFmPortDev->id = *uint32_prop-1;
  96778. + p_LnxWrpFmPortDev->id = *uint32_prop;
  96779. + */
  96780. + p_LnxWrpFmPortDev->settings.param.portType =
  96781. + e_FM_PORT_TYPE_OH_HOST_COMMAND;
  96782. + } else {
  96783. + p_LnxWrpFmPortDev =
  96784. + &p_LnxWrpFmDev->opPorts[tmp_prop - 1];
  96785. + p_LnxWrpFmPortDev->id = tmp_prop- 1;
  96786. + p_LnxWrpFmPortDev->settings.param.portType =
  96787. + e_FM_PORT_TYPE_OH_OFFLINE_PARSING;
  96788. + }
  96789. + p_LnxWrpFmPortDev->settings.param.portId = tmp_prop;
  96790. +
  96791. + uint32_prop =
  96792. + (uint32_t *) of_get_property(port_node,
  96793. + "fsl,qman-channel-id",
  96794. + &lenp);
  96795. + if (uint32_prop == NULL) {
  96796. + /*
  96797. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("missing fsl,qman-channel-id"));
  96798. + */
  96799. + XX_Print("FM warning: missing fsl,qman-channel-id"
  96800. + " for OH port.\n");
  96801. + return NULL;
  96802. + }
  96803. + tmp_prop = be32_to_cpu(*uint32_prop);
  96804. + if (WARN_ON(lenp != sizeof(uint32_t)))
  96805. + return NULL;
  96806. + p_LnxWrpFmPortDev->txCh = tmp_prop;
  96807. +
  96808. + p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.
  96809. + qmChannel = p_LnxWrpFmPortDev->txCh;
  96810. + } else if (of_device_is_compatible(port_node, "fsl,fman-port-1g-tx")) {
  96811. + if (unlikely(tmp_prop >= FM_MAX_NUM_OF_1G_TX_PORTS)) {
  96812. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96813. + ("of_get_property(%s, cell-index) failed",
  96814. + port_node->full_name));
  96815. + return NULL;
  96816. + }
  96817. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[tmp_prop];
  96818. +
  96819. + p_LnxWrpFmPortDev->id = tmp_prop;
  96820. + p_LnxWrpFmPortDev->settings.param.portId =
  96821. + p_LnxWrpFmPortDev->id;
  96822. + p_LnxWrpFmPortDev->settings.param.portType = e_FM_PORT_TYPE_TX;
  96823. +
  96824. + uint32_prop = (uint32_t *) of_get_property(port_node,
  96825. + "fsl,qman-channel-id", &lenp);
  96826. + if (uint32_prop == NULL) {
  96827. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96828. + ("missing fsl,qman-channel-id"));
  96829. + return NULL;
  96830. + }
  96831. + tmp_prop = be32_to_cpu(*uint32_prop);
  96832. + if (WARN_ON(lenp != sizeof(uint32_t)))
  96833. + return NULL;
  96834. + p_LnxWrpFmPortDev->txCh = tmp_prop;
  96835. + p_LnxWrpFmPortDev->
  96836. + settings.param.specificParams.nonRxParams.qmChannel =
  96837. + p_LnxWrpFmPortDev->txCh;
  96838. + } else if (of_device_is_compatible(port_node, "fsl,fman-port-10g-tx")) {
  96839. + if (unlikely(tmp_prop>= FM_MAX_NUM_OF_10G_TX_PORTS)) {
  96840. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96841. + ("of_get_property(%s, cell-index) failed",
  96842. + port_node->full_name));
  96843. + return NULL;
  96844. + }
  96845. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[tmp_prop +
  96846. + FM_MAX_NUM_OF_1G_TX_PORTS];
  96847. +#ifndef CONFIG_FMAN_ARM
  96848. + if (IS_T1023_T1024)
  96849. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[*uint32_prop];
  96850. +#endif
  96851. +
  96852. + p_LnxWrpFmPortDev->id = tmp_prop;
  96853. + p_LnxWrpFmPortDev->settings.param.portId =
  96854. + p_LnxWrpFmPortDev->id;
  96855. + p_LnxWrpFmPortDev->settings.param.portType =
  96856. + e_FM_PORT_TYPE_TX_10G;
  96857. + uint32_prop = (uint32_t *) of_get_property(port_node,
  96858. + "fsl,qman-channel-id", &lenp);
  96859. + if (uint32_prop == NULL) {
  96860. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96861. + ("missing fsl,qman-channel-id"));
  96862. + return NULL;
  96863. + }
  96864. + tmp_prop = be32_to_cpu(*uint32_prop);
  96865. + if (WARN_ON(lenp != sizeof(uint32_t)))
  96866. + return NULL;
  96867. + p_LnxWrpFmPortDev->txCh = tmp_prop;
  96868. + p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.
  96869. + qmChannel = p_LnxWrpFmPortDev->txCh;
  96870. + } else if (of_device_is_compatible(port_node, "fsl,fman-port-1g-rx")) {
  96871. + if (unlikely(tmp_prop >= FM_MAX_NUM_OF_1G_RX_PORTS)) {
  96872. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96873. + ("of_get_property(%s, cell-index) failed",
  96874. + port_node->full_name));
  96875. + return NULL;
  96876. + }
  96877. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[tmp_prop];
  96878. +
  96879. + p_LnxWrpFmPortDev->id = tmp_prop;
  96880. + p_LnxWrpFmPortDev->settings.param.portId =
  96881. + p_LnxWrpFmPortDev->id;
  96882. + p_LnxWrpFmPortDev->settings.param.portType = e_FM_PORT_TYPE_RX;
  96883. + if (p_LnxWrpFmDev->pcdActive)
  96884. + p_LnxWrpFmPortDev->defPcd = p_LnxWrpFmDev->defPcd;
  96885. + } else if (of_device_is_compatible(port_node, "fsl,fman-port-10g-rx")) {
  96886. + if (unlikely(tmp_prop >= FM_MAX_NUM_OF_10G_RX_PORTS)) {
  96887. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96888. + ("of_get_property(%s, cell-index) failed",
  96889. + port_node->full_name));
  96890. + return NULL;
  96891. + }
  96892. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[tmp_prop +
  96893. + FM_MAX_NUM_OF_1G_RX_PORTS];
  96894. +
  96895. +#ifndef CONFIG_FMAN_ARM
  96896. + if (IS_T1023_T1024)
  96897. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[*uint32_prop];
  96898. +#endif
  96899. +
  96900. + p_LnxWrpFmPortDev->id = tmp_prop;
  96901. + p_LnxWrpFmPortDev->settings.param.portId =
  96902. + p_LnxWrpFmPortDev->id;
  96903. + p_LnxWrpFmPortDev->settings.param.portType =
  96904. + e_FM_PORT_TYPE_RX_10G;
  96905. + if (p_LnxWrpFmDev->pcdActive)
  96906. + p_LnxWrpFmPortDev->defPcd = p_LnxWrpFmDev->defPcd;
  96907. + } else {
  96908. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal port type"));
  96909. + return NULL;
  96910. + }
  96911. +
  96912. + _errno = of_address_to_resource(port_node, 0, &res);
  96913. + if (unlikely(_errno < 0)) {
  96914. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96915. + ("of_address_to_resource() = %d", _errno));
  96916. + return NULL;
  96917. + }
  96918. +
  96919. + p_LnxWrpFmPortDev->dev = &of_dev->dev;
  96920. + p_LnxWrpFmPortDev->baseAddr = 0;
  96921. + p_LnxWrpFmPortDev->phys_baseAddr = res.start;
  96922. + p_LnxWrpFmPortDev->memSize = res.end + 1 - res.start;
  96923. + p_LnxWrpFmPortDev->settings.param.h_Fm = p_LnxWrpFmDev->h_Dev;
  96924. + p_LnxWrpFmPortDev->h_LnxWrpFmDev = (t_Handle) p_LnxWrpFmDev;
  96925. +
  96926. + of_node_put(port_node);
  96927. +
  96928. + p_LnxWrpFmPortDev->active = TRUE;
  96929. +
  96930. +#if defined(CONFIG_FMAN_DISABLE_OH_TO_REUSE_RESOURCES)
  96931. + /* for performance mode no OH port available. */
  96932. + if (p_LnxWrpFmPortDev->settings.param.portType ==
  96933. + e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  96934. + p_LnxWrpFmPortDev->active = FALSE;
  96935. +#endif
  96936. +
  96937. + return p_LnxWrpFmPortDev;
  96938. +}
  96939. +
  96940. +struct device_node * GetFmPortAdvArgsDevTreeNode (struct device_node *fm_node,
  96941. + e_FmPortType portType,
  96942. + uint8_t portId)
  96943. +{
  96944. + struct device_node *port_node;
  96945. + const uint32_t *uint32_prop;
  96946. + int lenp;
  96947. + char *portTypeString;
  96948. + uint32_t tmp_prop;
  96949. +
  96950. + switch(portType) {
  96951. + case e_FM_PORT_TYPE_OH_OFFLINE_PARSING:
  96952. + portTypeString = "fsl,fman-port-op-extended-args";
  96953. + break;
  96954. + case e_FM_PORT_TYPE_TX:
  96955. + portTypeString = "fsl,fman-port-1g-tx-extended-args";
  96956. + break;
  96957. + case e_FM_PORT_TYPE_TX_10G:
  96958. + portTypeString = "fsl,fman-port-10g-tx-extended-args";
  96959. + break;
  96960. + case e_FM_PORT_TYPE_RX:
  96961. + portTypeString = "fsl,fman-port-1g-rx-extended-args";
  96962. + break;
  96963. + case e_FM_PORT_TYPE_RX_10G:
  96964. + portTypeString = "fsl,fman-port-10g-rx-extended-args";
  96965. + break;
  96966. + default:
  96967. + return NULL;
  96968. + }
  96969. +
  96970. + for_each_child_of_node(fm_node, port_node) {
  96971. + uint32_prop = (uint32_t *)of_get_property(port_node, "cell-index", &lenp);
  96972. + if (unlikely(uint32_prop == NULL)) {
  96973. + REPORT_ERROR(MAJOR, E_INVALID_VALUE,
  96974. + ("of_get_property(%s, cell-index) failed",
  96975. + port_node->full_name));
  96976. + return NULL;
  96977. + }
  96978. + tmp_prop = be32_to_cpu(*uint32_prop);
  96979. + if (WARN_ON(lenp != sizeof(uint32_t)))
  96980. + return NULL;
  96981. + if ((portId == tmp_prop) &&
  96982. + (of_device_is_compatible(port_node, portTypeString))) {
  96983. + return port_node;
  96984. + }
  96985. + }
  96986. +
  96987. + return NULL;
  96988. +}
  96989. +
  96990. +static t_Error CheckNConfigFmPortAdvArgs (t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
  96991. +{
  96992. + struct device_node *fm_node, *port_node;
  96993. + t_Error err;
  96994. + t_FmPortRsrc portRsrc;
  96995. + const uint32_t *uint32_prop;
  96996. + /*const char *str_prop;*/
  96997. + int lenp;
  96998. +#ifdef CONFIG_FMAN_PFC
  96999. + uint8_t i, id, num_pools;
  97000. + t_FmBufPoolDepletion poolDepletion;
  97001. +
  97002. + if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX ||
  97003. + p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX_10G) {
  97004. + memset(&poolDepletion, 0, sizeof(t_FmBufPoolDepletion));
  97005. + poolDepletion.singlePoolModeEnable = true;
  97006. + num_pools = p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
  97007. + extBufPools.numOfPoolsUsed;
  97008. + for (i = 0; i < num_pools; i++) {
  97009. + id = p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
  97010. + extBufPools.extBufPool[i].id;
  97011. + poolDepletion.poolsToConsiderForSingleMode[id] = true;
  97012. + }
  97013. +
  97014. + for (i = 0; i < CONFIG_FMAN_PFC_COS_COUNT; i++)
  97015. + poolDepletion.pfcPrioritiesEn[i] = true;
  97016. +
  97017. + err = FM_PORT_ConfigPoolDepletion(p_LnxWrpFmPortDev->h_Dev,
  97018. + &poolDepletion);
  97019. + if (err != E_OK)
  97020. + RETURN_ERROR(MAJOR, err, ("FM_PORT_ConfigPoolDepletion() failed"));
  97021. + }
  97022. +#endif
  97023. +
  97024. + fm_node = GetFmAdvArgsDevTreeNode(((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev)->id);
  97025. + if (!fm_node) /* no advance parameters for FMan */
  97026. + return E_OK;
  97027. +
  97028. + port_node = GetFmPortAdvArgsDevTreeNode(fm_node,
  97029. + p_LnxWrpFmPortDev->settings.param.portType,
  97030. + p_LnxWrpFmPortDev->settings.param.portId);
  97031. + if (!port_node) /* no advance parameters for FMan-Port */
  97032. + return E_OK;
  97033. +
  97034. + uint32_prop = (uint32_t *)of_get_property(port_node, "num-tnums", &lenp);
  97035. + if (uint32_prop) {
  97036. + if (WARN_ON(lenp != sizeof(uint32_t)*2))
  97037. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  97038. +
  97039. + portRsrc.num = be32_to_cpu(uint32_prop[0]);
  97040. + portRsrc.extra = be32_to_cpu(uint32_prop[1]);
  97041. +
  97042. + if ((err = FM_PORT_ConfigNumOfTasks(p_LnxWrpFmPortDev->h_Dev,
  97043. + &portRsrc)) != E_OK)
  97044. + RETURN_ERROR(MINOR, err, NO_MSG);
  97045. + }
  97046. +
  97047. + uint32_prop = (uint32_t *)of_get_property(port_node, "num-dmas", &lenp);
  97048. + if (uint32_prop) {
  97049. + if (WARN_ON(lenp != sizeof(uint32_t)*2))
  97050. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  97051. +
  97052. + portRsrc.num = be32_to_cpu(uint32_prop[0]);
  97053. + portRsrc.extra = be32_to_cpu(uint32_prop[1]);
  97054. +
  97055. + if ((err = FM_PORT_ConfigNumOfOpenDmas(p_LnxWrpFmPortDev->h_Dev,
  97056. + &portRsrc)) != E_OK)
  97057. + RETURN_ERROR(MINOR, err, NO_MSG);
  97058. + }
  97059. +
  97060. + uint32_prop = (uint32_t *)of_get_property(port_node, "fifo-size", &lenp);
  97061. + if (uint32_prop) {
  97062. + if (WARN_ON(lenp != sizeof(uint32_t)*2))
  97063. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  97064. +
  97065. + portRsrc.num = be32_to_cpu(uint32_prop[0]);
  97066. + portRsrc.extra = be32_to_cpu(uint32_prop[1]);
  97067. +
  97068. + if ((err = FM_PORT_ConfigSizeOfFifo(p_LnxWrpFmPortDev->h_Dev,
  97069. + &portRsrc)) != E_OK)
  97070. + RETURN_ERROR(MINOR, err, NO_MSG);
  97071. + }
  97072. +
  97073. + uint32_prop = (uint32_t *)of_get_property(port_node, "errors-to-discard", &lenp);
  97074. + if (uint32_prop) {
  97075. + if (WARN_ON(lenp != sizeof(uint32_t)))
  97076. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  97077. + if ((err = FM_PORT_ConfigErrorsToDiscard(p_LnxWrpFmPortDev->h_Dev,
  97078. + be32_to_cpu(uint32_prop[0]))) != E_OK)
  97079. + RETURN_ERROR(MINOR, err, NO_MSG);
  97080. + }
  97081. +
  97082. + uint32_prop = (uint32_t *)of_get_property(port_node, "ar-tables-sizes",
  97083. + &lenp);
  97084. + if (uint32_prop) {
  97085. +
  97086. + if (WARN_ON(lenp != sizeof(uint32_t)*8))
  97087. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  97088. + if (WARN_ON(p_LnxWrpFmPortDev->settings.param.portType !=
  97089. + e_FM_PORT_TYPE_RX) &&
  97090. + (p_LnxWrpFmPortDev->settings.param.portType !=
  97091. + e_FM_PORT_TYPE_RX_10G))
  97092. + RETURN_ERROR(MINOR, E_INVALID_VALUE,
  97093. + ("Auto Response is an Rx port atribute."));
  97094. +
  97095. + memset(&p_LnxWrpFmPortDev->dsar_table_sizes, 0, sizeof(struct auto_res_tables_sizes));
  97096. +
  97097. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_arp_entries =
  97098. + (uint16_t)be32_to_cpu(uint32_prop[0]);
  97099. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_echo_ipv4_entries =
  97100. + (uint16_t)be32_to_cpu(uint32_prop[1]);
  97101. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_ndp_entries =
  97102. + (uint16_t)be32_to_cpu(uint32_prop[2]);
  97103. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_echo_ipv6_entries =
  97104. + (uint16_t)be32_to_cpu(uint32_prop[3]);
  97105. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_ipv4_entries =
  97106. + (uint16_t)be32_to_cpu(uint32_prop[4]);
  97107. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_ipv6_entries =
  97108. + (uint16_t)be32_to_cpu(uint32_prop[5]);
  97109. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_oid_entries =
  97110. + (uint16_t)be32_to_cpu(uint32_prop[6]);
  97111. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_snmp_char =
  97112. + (uint16_t)be32_to_cpu(uint32_prop[7]);
  97113. +
  97114. + uint32_prop = (uint32_t *)of_get_property(port_node,
  97115. + "ar-filters-sizes", &lenp);
  97116. + if (uint32_prop) {
  97117. + if (WARN_ON(lenp != sizeof(uint32_t)*3))
  97118. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  97119. +
  97120. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_ip_prot_filtering =
  97121. + (uint16_t)be32_to_cpu(uint32_prop[0]);
  97122. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_tcp_port_filtering =
  97123. + (uint16_t)be32_to_cpu(uint32_prop[1]);
  97124. + p_LnxWrpFmPortDev->dsar_table_sizes.max_num_of_udp_port_filtering =
  97125. + (uint16_t)be32_to_cpu(uint32_prop[2]);
  97126. + }
  97127. +
  97128. + if ((err = FM_PORT_ConfigDsarSupport(p_LnxWrpFmPortDev->h_Dev,
  97129. + (t_FmPortDsarTablesSizes*)&p_LnxWrpFmPortDev->dsar_table_sizes)) != E_OK)
  97130. + RETURN_ERROR(MINOR, err, NO_MSG);
  97131. + }
  97132. +
  97133. + of_node_put(port_node);
  97134. + of_node_put(fm_node);
  97135. +
  97136. + return E_OK;
  97137. +}
  97138. +
  97139. +static t_Error CheckNSetFmPortAdvArgs (t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
  97140. +{
  97141. + struct device_node *fm_node, *port_node;
  97142. + t_Error err;
  97143. + const uint32_t *uint32_prop;
  97144. + /*const char *str_prop;*/
  97145. + int lenp;
  97146. +
  97147. + fm_node = GetFmAdvArgsDevTreeNode(((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev)->id);
  97148. + if (!fm_node) /* no advance parameters for FMan */
  97149. + return E_OK;
  97150. +
  97151. + port_node = GetFmPortAdvArgsDevTreeNode(fm_node,
  97152. + p_LnxWrpFmPortDev->settings.param.portType,
  97153. + p_LnxWrpFmPortDev->settings.param.portId);
  97154. + if (!port_node) /* no advance parameters for FMan-Port */
  97155. + return E_OK;
  97156. +
  97157. +#if (DPAA_VERSION >= 11)
  97158. + uint32_prop = (uint32_t *)of_get_property(port_node, "vsp-window", &lenp);
  97159. + if (uint32_prop) {
  97160. + t_FmPortVSPAllocParams portVSPAllocParams;
  97161. + t_FmVspParams fmVspParams;
  97162. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  97163. + uint8_t portId;
  97164. +
  97165. + p_LnxWrpFmDev = ((t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev);
  97166. +
  97167. + if (WARN_ON(lenp != sizeof(uint32_t)*2))
  97168. + RETURN_ERROR(MINOR, E_INVALID_VALUE, NO_MSG);
  97169. +
  97170. + if ((p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_TX) ||
  97171. + (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_TX_10G) ||
  97172. + ((p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
  97173. + p_LnxWrpFmPortDev->settings.frag_enabled))
  97174. + return E_OK;
  97175. +
  97176. + memset(&portVSPAllocParams, 0, sizeof(portVSPAllocParams));
  97177. + memset(&fmVspParams, 0, sizeof(fmVspParams));
  97178. +
  97179. + portVSPAllocParams.numOfProfiles = (uint8_t)be32_to_cpu(uint32_prop[0]);
  97180. + portVSPAllocParams.dfltRelativeId = (uint8_t)be32_to_cpu(uint32_prop[1]);
  97181. + fmVspParams.h_Fm = p_LnxWrpFmDev->h_Dev;
  97182. +
  97183. + fmVspParams.portParams.portType = p_LnxWrpFmPortDev->settings.param.portType;
  97184. + fmVspParams.portParams.portId = p_LnxWrpFmPortDev->settings.param.portId;
  97185. + fmVspParams.relativeProfileId = portVSPAllocParams.dfltRelativeId;
  97186. +
  97187. + if (p_LnxWrpFmPortDev->settings.param.portType != e_FM_PORT_TYPE_OH_OFFLINE_PARSING)
  97188. + {
  97189. + portId = fmVspParams.portParams.portId;
  97190. + if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX_10G){
  97191. +#ifndef CONFIG_FMAN_ARM
  97192. + if (!(IS_T1023_T1024))
  97193. +#endif
  97194. + portId += FM_MAX_NUM_OF_1G_RX_PORTS;
  97195. + }
  97196. + portVSPAllocParams.h_FmTxPort =
  97197. + p_LnxWrpFmDev->txPorts[portId].h_Dev;
  97198. + fmVspParams.liodnOffset =
  97199. + p_LnxWrpFmDev->rxPorts[portId].settings.param.specificParams.rxParams.liodnOffset;
  97200. + memcpy(&fmVspParams.extBufPools,
  97201. + &p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.extBufPools,
  97202. + sizeof(t_FmExtPools));
  97203. + }
  97204. + else
  97205. + {
  97206. + memcpy(&fmVspParams.extBufPools,
  97207. + &p_LnxWrpFmPortDev->opExtPools,
  97208. + sizeof(t_FmExtPools));
  97209. + }
  97210. +
  97211. + if ((err = FM_PORT_VSPAlloc(p_LnxWrpFmPortDev->h_Dev,
  97212. + &portVSPAllocParams)) != E_OK)
  97213. + RETURN_ERROR(MINOR, err, NO_MSG);
  97214. +
  97215. + /* We're initializing only the default VSP that are being used by the Linux-Ethernet-driver */
  97216. + if ((p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
  97217. + !p_LnxWrpFmPortDev->opExtPools.numOfPoolsUsed)
  97218. + return E_OK;
  97219. +
  97220. + p_LnxWrpFmPortDev->h_DfltVsp = FM_VSP_Config(&fmVspParams);
  97221. + if (!p_LnxWrpFmPortDev->h_DfltVsp)
  97222. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("default-VSP for port!"));
  97223. +
  97224. + if ((err = FM_VSP_ConfigBufferPrefixContent(p_LnxWrpFmPortDev->h_DfltVsp,
  97225. + &p_LnxWrpFmPortDev->buffPrefixContent)) != E_OK)
  97226. + RETURN_ERROR(MINOR, err, NO_MSG);
  97227. +
  97228. + if ((err = FM_VSP_Init(p_LnxWrpFmPortDev->h_DfltVsp)) != E_OK)
  97229. + RETURN_ERROR(MINOR, err, NO_MSG);
  97230. + }
  97231. +#else
  97232. +UNUSED(err); UNUSED(uint32_prop); UNUSED(lenp);
  97233. +#endif /* (DPAA_VERSION >= 11) */
  97234. +
  97235. + of_node_put(port_node);
  97236. + of_node_put(fm_node);
  97237. +
  97238. + return E_OK;
  97239. +}
  97240. +
  97241. +static t_Error ConfigureFmPortDev(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
  97242. +{
  97243. + t_LnxWrpFmDev *p_LnxWrpFmDev =
  97244. + (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  97245. + struct resource *dev_res;
  97246. +
  97247. + if (!p_LnxWrpFmPortDev->active)
  97248. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  97249. + ("FM port not configured!!!"));
  97250. +
  97251. + dev_res =
  97252. + __devm_request_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res,
  97253. + p_LnxWrpFmPortDev->phys_baseAddr,
  97254. + p_LnxWrpFmPortDev->memSize,
  97255. + "fman-port-hc");
  97256. + if (unlikely(dev_res == NULL))
  97257. + RETURN_ERROR(MAJOR, E_INVALID_STATE,
  97258. + ("__devm_request_region() failed"));
  97259. + p_LnxWrpFmPortDev->baseAddr =
  97260. + PTR_TO_UINT(devm_ioremap
  97261. + (p_LnxWrpFmDev->dev,
  97262. + p_LnxWrpFmPortDev->phys_baseAddr,
  97263. + p_LnxWrpFmPortDev->memSize));
  97264. + if (unlikely(p_LnxWrpFmPortDev->baseAddr == 0))
  97265. + REPORT_ERROR(MAJOR, E_INVALID_STATE,
  97266. + ("devm_ioremap() failed"));
  97267. +
  97268. + p_LnxWrpFmPortDev->settings.param.baseAddr =
  97269. + p_LnxWrpFmPortDev->baseAddr;
  97270. +
  97271. + return E_OK;
  97272. +}
  97273. +
  97274. +static t_Error InitFmPortDev(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
  97275. +{
  97276. +#define MY_ADV_CONFIG_CHECK_END \
  97277. + RETURN_ERROR(MAJOR, E_INVALID_SELECTION,\
  97278. + ("Advanced configuration routine"));\
  97279. + if (errCode != E_OK)\
  97280. + RETURN_ERROR(MAJOR, errCode, NO_MSG);\
  97281. + }
  97282. +
  97283. + int i = 0;
  97284. +
  97285. + if (!p_LnxWrpFmPortDev->active || p_LnxWrpFmPortDev->h_Dev)
  97286. + return E_INVALID_STATE;
  97287. +
  97288. + p_LnxWrpFmPortDev->h_Dev =
  97289. + FM_PORT_Config(&p_LnxWrpFmPortDev->settings.param);
  97290. + if (p_LnxWrpFmPortDev->h_Dev == NULL)
  97291. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM-port"));
  97292. +
  97293. +#ifndef FM_QMI_NO_DEQ_OPTIONS_SUPPORT
  97294. + if ((p_LnxWrpFmPortDev->settings.param.portType ==
  97295. + e_FM_PORT_TYPE_TX_10G)
  97296. + || (p_LnxWrpFmPortDev->settings.param.portType ==
  97297. + e_FM_PORT_TYPE_TX)) {
  97298. + t_Error errCode = E_OK;
  97299. + errCode =
  97300. + FM_PORT_ConfigDeqHighPriority(p_LnxWrpFmPortDev->h_Dev,
  97301. + TRUE);
  97302. + if (errCode != E_OK)
  97303. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  97304. + errCode =
  97305. + FM_PORT_ConfigDeqPrefetchOption(p_LnxWrpFmPortDev->h_Dev,
  97306. + e_FM_PORT_DEQ_FULL_PREFETCH);
  97307. + if (errCode
  97308. + != E_OK)
  97309. + RETURN_ERROR(MAJOR, errCode, NO_MSG);
  97310. + }
  97311. +#endif /* !FM_QMI_NO_DEQ_OPTIONS_SUPPORT */
  97312. +
  97313. +#ifndef CONFIG_FMAN_ARM
  97314. +#ifdef FM_BCB_ERRATA_BMI_SW001
  97315. +/* Configure BCB workaround on Rx ports, only for B4860 rev1 */
  97316. +#define SVR_SECURITY_MASK 0x00080000
  97317. +#define SVR_PERSONALITY_MASK 0x0000FF00
  97318. +#define SVR_VER_IGNORE_MASK (SVR_SECURITY_MASK | SVR_PERSONALITY_MASK)
  97319. +#define SVR_B4860_REV1_VALUE 0x86800010
  97320. +
  97321. + if ((p_LnxWrpFmPortDev->settings.param.portType ==
  97322. + e_FM_PORT_TYPE_RX_10G) ||
  97323. + (p_LnxWrpFmPortDev->settings.param.portType ==
  97324. + e_FM_PORT_TYPE_RX)) {
  97325. + unsigned int svr;
  97326. +
  97327. + svr = mfspr(SPRN_SVR);
  97328. +
  97329. + if ((svr & ~SVR_VER_IGNORE_MASK) == SVR_B4860_REV1_VALUE)
  97330. + FM_PORT_ConfigBCBWorkaround(p_LnxWrpFmPortDev->h_Dev);
  97331. + }
  97332. +#endif /* FM_BCB_ERRATA_BMI_SW001 */
  97333. +#endif /* CONFIG_FMAN_ARM */
  97334. +/* Call the driver's advanced configuration routines, if requested:
  97335. + Compare the function pointer of each entry to the available routines,
  97336. + and invoke the matching routine with proper casting of arguments. */
  97337. + while (p_LnxWrpFmPortDev->settings.advConfig[i].p_Function
  97338. + && (i < FM_MAX_NUM_OF_ADV_SETTINGS)) {
  97339. +
  97340. +/* TODO: Change this MACRO */
  97341. + ADV_CONFIG_CHECK_START(
  97342. + &(p_LnxWrpFmPortDev->settings.advConfig[i]))
  97343. +
  97344. + ADV_CONFIG_CHECK(p_LnxWrpFmPortDev->h_Dev,
  97345. + FM_PORT_ConfigBufferPrefixContent,
  97346. + NCSW_PARAMS(1,
  97347. + (t_FmBufferPrefixContent *)))
  97348. +
  97349. + if ((p_LnxWrpFmPortDev->settings.param.portType ==
  97350. + e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
  97351. + (p_LnxWrpFmPortDev->settings.frag_enabled == TRUE)) {
  97352. +
  97353. + ADV_CONFIG_CHECK(p_LnxWrpFmPortDev->h_Dev,
  97354. + FM_PORT_ConfigExtBufPools,
  97355. + NCSW_PARAMS(1, (t_FmExtPools *)))
  97356. +
  97357. + /* this define contains an else */
  97358. + MY_ADV_CONFIG_CHECK_END
  97359. + }
  97360. +
  97361. + /* Advance to next advanced configuration entry */
  97362. + i++;
  97363. + }
  97364. +
  97365. +
  97366. + if ((p_LnxWrpFmPortDev->settings.param.portType != e_FM_PORT_TYPE_TX) &&
  97367. + (p_LnxWrpFmPortDev->settings.param.portType != e_FM_PORT_TYPE_TX_10G)) {
  97368. + if (FM_PORT_ConfigErrorsToDiscard(p_LnxWrpFmPortDev->h_Dev, (FM_PORT_FRM_ERR_IPRE |
  97369. + FM_PORT_FRM_ERR_IPR_NCSP |
  97370. + FM_PORT_FRM_ERR_CLS_DISCARD)) !=E_OK)
  97371. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  97372. + }
  97373. +
  97374. + if (CheckNConfigFmPortAdvArgs(p_LnxWrpFmPortDev) != E_OK)
  97375. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  97376. +
  97377. + if (FM_PORT_Init(p_LnxWrpFmPortDev->h_Dev) != E_OK)
  97378. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  97379. +
  97380. + if (CheckNSetFmPortAdvArgs(p_LnxWrpFmPortDev) != E_OK)
  97381. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  97382. +
  97383. +/* FMan Fifo sizes behind the scene":
  97384. + * Using the following formulae (*), under a set of simplifying assumptions (.):
  97385. + * . all ports are configured in Normal Mode (rather than Independent Mode)
  97386. + * . the DPAA Eth driver allocates buffers of size:
  97387. + * . MAXFRM + NET_IP_ALIGN + DPA_PRIV_DATA_SIZE + DPA_PARSE_RESULTS_SIZE
  97388. + * + DPA_HASH_RESULTS_SIZE, i.e.:
  97389. + * MAXFRM + 2 + 16 + sizeof(t_FmPrsResult) + 16, i.e.:
  97390. + * MAXFRM + 66
  97391. + * . excessive buffer pools not accounted for
  97392. + *
  97393. + * * for Rx ports on P4080:
  97394. + * . IFSZ = ceil(max(FMBM_EBMPI[PBS]) / 256) * 256 + 7 * 256
  97395. + * . no internal frame offset (FMBM_RIM[FOF] == 0) - otherwise,
  97396. + * add up to 256 to the above
  97397. + *
  97398. + * * for Rx ports on P1023:
  97399. + * . IFSZ = ceil(second_largest(FMBM_EBMPI[PBS] / 256)) * 256 + 7 * 256,
  97400. + * if at least 2 bpools are configured
  97401. + * . IFSZ = 8 * 256, if only a single bpool is configured
  97402. + *
  97403. + * * for Tx ports:
  97404. + * . IFSZ = ceil(frame_size / 256) * 256 + 3 * 256
  97405. + * + FMBM_TFP[DPDE] * 256, i.e.:
  97406. + * IFSZ = ceil(MAXFRM / 256) * 256 + 3 x 256 + FMBM_TFP[DPDE] * 256
  97407. + *
  97408. + * * for OH ports on P4080:
  97409. + * . IFSZ = ceil(frame_size / 256) * 256 + 1 * 256 + FMBM_PP[MXT] * 256
  97410. + * * for OH ports on P1023:
  97411. + * . IFSZ = ceil(frame_size / 256) * 256 + 3 * 256 + FMBM_TFP[DPDE] * 256
  97412. + * * for both P4080 and P1023:
  97413. + * . (conservative decisions, assuming that BMI must bring the entire
  97414. + * frame, not only the frame header)
  97415. + * . no internal frame offset (FMBM_OIM[FOF] == 0) - otherwise,
  97416. + * add up to 256 to the above
  97417. + *
  97418. + * . for P4080/P5020/P3041/P2040, DPDE is:
  97419. + * > 0 or 1, for 1Gb ports, HW default: 0
  97420. + * > 2..7 (recommended: 3..7) for 10Gb ports, HW default: 3
  97421. + * . for P1023, DPDE should be 1
  97422. + *
  97423. + * . for P1023, MXT is in range (0..31)
  97424. + * . for P4080, MXT is in range (0..63)
  97425. + *
  97426. + */
  97427. +#if 0
  97428. + if ((p_LnxWrpFmPortDev->defPcd != e_NO_PCD) &&
  97429. + (InitFmPort3TupleDefPcd(p_LnxWrpFmPortDev) != E_OK))
  97430. + RETURN_ERROR(MAJOR, E_INVALID_STATE, NO_MSG);
  97431. +#endif
  97432. + return E_OK;
  97433. +}
  97434. +
  97435. +void fm_set_rx_port_params(struct fm_port *port,
  97436. + struct fm_port_params *params)
  97437. +{
  97438. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) port;
  97439. + int i;
  97440. +
  97441. + p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.errFqid =
  97442. + params->errq;
  97443. + p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.dfltFqid =
  97444. + params->defq;
  97445. + p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.extBufPools.
  97446. + numOfPoolsUsed = params->num_pools;
  97447. + for (i = 0; i < params->num_pools; i++) {
  97448. + p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
  97449. + extBufPools.extBufPool[i].id =
  97450. + params->pool_param[i].id;
  97451. + p_LnxWrpFmPortDev->settings.param.specificParams.rxParams.
  97452. + extBufPools.extBufPool[i].size =
  97453. + params->pool_param[i].size;
  97454. + }
  97455. +
  97456. + p_LnxWrpFmPortDev->buffPrefixContent.privDataSize =
  97457. + params->priv_data_size;
  97458. + p_LnxWrpFmPortDev->buffPrefixContent.passPrsResult =
  97459. + params->parse_results;
  97460. + p_LnxWrpFmPortDev->buffPrefixContent.passHashResult =
  97461. + params->hash_results;
  97462. + p_LnxWrpFmPortDev->buffPrefixContent.passTimeStamp =
  97463. + params->time_stamp;
  97464. + p_LnxWrpFmPortDev->buffPrefixContent.dataAlign =
  97465. + params->data_align;
  97466. + p_LnxWrpFmPortDev->buffPrefixContent.manipExtraSpace =
  97467. + params->manip_extra_space;
  97468. +
  97469. + ADD_ADV_CONFIG_START(p_LnxWrpFmPortDev->settings.advConfig,
  97470. + FM_MAX_NUM_OF_ADV_SETTINGS)
  97471. +
  97472. + ADD_ADV_CONFIG_NO_RET(FM_PORT_ConfigBufferPrefixContent,
  97473. + ARGS(1,
  97474. + (&p_LnxWrpFmPortDev->
  97475. + buffPrefixContent)));
  97476. +
  97477. + ADD_ADV_CONFIG_END InitFmPortDev(p_LnxWrpFmPortDev);
  97478. +}
  97479. +EXPORT_SYMBOL(fm_set_rx_port_params);
  97480. +
  97481. +/* this function is called from oh_probe as well, thus it contains oh port
  97482. + * specific parameters (make sure everything is checked) */
  97483. +void fm_set_tx_port_params(struct fm_port *port,
  97484. + struct fm_port_params *params)
  97485. +{
  97486. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) port;
  97487. +
  97488. + p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.errFqid =
  97489. + params->errq;
  97490. + p_LnxWrpFmPortDev->settings.param.specificParams.nonRxParams.
  97491. + dfltFqid = params->defq;
  97492. +
  97493. + p_LnxWrpFmPortDev->buffPrefixContent.privDataSize =
  97494. + params->priv_data_size;
  97495. + p_LnxWrpFmPortDev->buffPrefixContent.passPrsResult =
  97496. + params->parse_results;
  97497. + p_LnxWrpFmPortDev->buffPrefixContent.passHashResult =
  97498. + params->hash_results;
  97499. + p_LnxWrpFmPortDev->buffPrefixContent.passTimeStamp =
  97500. + params->time_stamp;
  97501. + p_LnxWrpFmPortDev->settings.frag_enabled =
  97502. + params->frag_enable;
  97503. + p_LnxWrpFmPortDev->buffPrefixContent.dataAlign =
  97504. + params->data_align;
  97505. + p_LnxWrpFmPortDev->buffPrefixContent.manipExtraSpace =
  97506. + params->manip_extra_space;
  97507. +
  97508. + ADD_ADV_CONFIG_START(p_LnxWrpFmPortDev->settings.advConfig,
  97509. + FM_MAX_NUM_OF_ADV_SETTINGS)
  97510. +
  97511. + ADD_ADV_CONFIG_NO_RET(FM_PORT_ConfigBufferPrefixContent,
  97512. + ARGS(1,
  97513. + (&p_LnxWrpFmPortDev->
  97514. + buffPrefixContent)));
  97515. +
  97516. + /* oh port specific parameter (for fragmentation only) */
  97517. + if ((p_LnxWrpFmPortDev->settings.param.portType ==
  97518. + e_FM_PORT_TYPE_OH_OFFLINE_PARSING) &&
  97519. + params->num_pools) {
  97520. + int i;
  97521. +
  97522. + p_LnxWrpFmPortDev->opExtPools.numOfPoolsUsed = params->num_pools;
  97523. + for (i = 0; i < params->num_pools; i++) {
  97524. + p_LnxWrpFmPortDev->opExtPools.extBufPool[i].id = params->pool_param[i].id;
  97525. + p_LnxWrpFmPortDev->opExtPools.extBufPool[i].size = params->pool_param[i].size;
  97526. + }
  97527. +
  97528. + if (p_LnxWrpFmPortDev->settings.frag_enabled)
  97529. + ADD_ADV_CONFIG_NO_RET(FM_PORT_ConfigExtBufPools,
  97530. + ARGS(1, (&p_LnxWrpFmPortDev->opExtPools)));
  97531. + }
  97532. +
  97533. + ADD_ADV_CONFIG_END InitFmPortDev(p_LnxWrpFmPortDev);
  97534. +}
  97535. +EXPORT_SYMBOL(fm_set_tx_port_params);
  97536. +
  97537. +void fm_mac_set_handle(t_Handle h_lnx_wrp_fm_dev,
  97538. + t_Handle h_fm_mac,
  97539. + int mac_id)
  97540. +{
  97541. + t_LnxWrpFmDev *p_lnx_wrp_fm_dev = (t_LnxWrpFmDev *)h_lnx_wrp_fm_dev;
  97542. +
  97543. + p_lnx_wrp_fm_dev->macs[mac_id].h_Dev = h_fm_mac;
  97544. + p_lnx_wrp_fm_dev->macs[mac_id].h_LnxWrpFmDev = h_lnx_wrp_fm_dev;
  97545. +}
  97546. +EXPORT_SYMBOL(fm_mac_set_handle);
  97547. +
  97548. +static void LnxwrpFmPcdDevExceptionsCb(t_Handle h_App,
  97549. + e_FmPcdExceptions exception)
  97550. +{
  97551. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *) h_App;
  97552. +
  97553. + ASSERT_COND(p_LnxWrpFmDev);
  97554. +
  97555. + DBG(INFO, ("got fm-pcd exception %d", exception));
  97556. +
  97557. + /* do nothing */
  97558. + UNUSED(exception);
  97559. +}
  97560. +
  97561. +static void LnxwrpFmPcdDevIndexedExceptionsCb(t_Handle h_App,
  97562. + e_FmPcdExceptions exception,
  97563. + uint16_t index)
  97564. +{
  97565. + t_LnxWrpFmDev *p_LnxWrpFmDev = (t_LnxWrpFmDev *) h_App;
  97566. +
  97567. + ASSERT_COND(p_LnxWrpFmDev);
  97568. +
  97569. + DBG(INFO,
  97570. + ("got fm-pcd-indexed exception %d, indx %d", exception, index));
  97571. +
  97572. + /* do nothing */
  97573. + UNUSED(exception);
  97574. + UNUSED(index);
  97575. +}
  97576. +
  97577. +static t_Error InitFmPcdDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
  97578. +{
  97579. + spin_lock_init(&lock);
  97580. +
  97581. + if (p_LnxWrpFmDev->pcdActive) {
  97582. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = &p_LnxWrpFmDev->hcPort;
  97583. + t_FmPcdParams fmPcdParams;
  97584. + t_Error err;
  97585. +
  97586. + memset(&fmPcdParams, 0, sizeof(fmPcdParams));
  97587. + fmPcdParams.h_Fm = p_LnxWrpFmDev->h_Dev;
  97588. + fmPcdParams.prsSupport = p_LnxWrpFmDev->prsActive;
  97589. + fmPcdParams.kgSupport = p_LnxWrpFmDev->kgActive;
  97590. + fmPcdParams.plcrSupport = p_LnxWrpFmDev->plcrActive;
  97591. + fmPcdParams.ccSupport = p_LnxWrpFmDev->ccActive;
  97592. + fmPcdParams.numOfSchemes = FM_PCD_KG_NUM_OF_SCHEMES;
  97593. +
  97594. +#ifndef CONFIG_GUEST_PARTITION
  97595. + fmPcdParams.f_Exception = LnxwrpFmPcdDevExceptionsCb;
  97596. + if (fmPcdParams.kgSupport)
  97597. + fmPcdParams.f_ExceptionId =
  97598. + LnxwrpFmPcdDevIndexedExceptionsCb;
  97599. + fmPcdParams.h_App = p_LnxWrpFmDev;
  97600. +#endif /* !CONFIG_GUEST_PARTITION */
  97601. +
  97602. +#ifdef CONFIG_MULTI_PARTITION_SUPPORT
  97603. + fmPcdParams.numOfSchemes = 0;
  97604. + fmPcdParams.numOfClsPlanEntries = 0;
  97605. + fmPcdParams.partitionId = 0;
  97606. +#endif /* CONFIG_MULTI_PARTITION_SUPPORT */
  97607. + fmPcdParams.useHostCommand = TRUE;
  97608. +
  97609. + p_LnxWrpFmDev->hc_tx_fq =
  97610. + FqAlloc(p_LnxWrpFmDev,
  97611. + 0,
  97612. + QMAN_FQ_FLAG_TO_DCPORTAL,
  97613. + p_LnxWrpFmPortDev->txCh, 0);
  97614. + if (!p_LnxWrpFmDev->hc_tx_fq)
  97615. + RETURN_ERROR(MAJOR, E_NULL_POINTER,
  97616. + ("Frame queue allocation failed..."));
  97617. +
  97618. + p_LnxWrpFmDev->hc_tx_conf_fq =
  97619. + FqAlloc(p_LnxWrpFmDev,
  97620. + 0,
  97621. + QMAN_FQ_FLAG_NO_ENQUEUE,
  97622. + p_LnxWrpFmDev->hcCh, 7);
  97623. + if (!p_LnxWrpFmDev->hc_tx_conf_fq)
  97624. + RETURN_ERROR(MAJOR, E_NULL_POINTER,
  97625. + ("Frame queue allocation failed..."));
  97626. +
  97627. + p_LnxWrpFmDev->hc_tx_err_fq =
  97628. + FqAlloc(p_LnxWrpFmDev,
  97629. + 0,
  97630. + QMAN_FQ_FLAG_NO_ENQUEUE,
  97631. + p_LnxWrpFmDev->hcCh, 7);
  97632. + if (!p_LnxWrpFmDev->hc_tx_err_fq)
  97633. + RETURN_ERROR(MAJOR, E_NULL_POINTER,
  97634. + ("Frame queue allocation failed..."));
  97635. +
  97636. + fmPcdParams.hc.portBaseAddr = p_LnxWrpFmPortDev->baseAddr;
  97637. + fmPcdParams.hc.portId =
  97638. + p_LnxWrpFmPortDev->settings.param.portId;
  97639. + fmPcdParams.hc.liodnBase =
  97640. + p_LnxWrpFmPortDev->settings.param.liodnBase;
  97641. + fmPcdParams.hc.errFqid =
  97642. + qman_fq_fqid(p_LnxWrpFmDev->hc_tx_err_fq);
  97643. + fmPcdParams.hc.confFqid =
  97644. + qman_fq_fqid(p_LnxWrpFmDev->hc_tx_conf_fq);
  97645. + fmPcdParams.hc.qmChannel = p_LnxWrpFmPortDev->txCh;
  97646. + fmPcdParams.hc.f_QmEnqueue = QmEnqueueCB;
  97647. + fmPcdParams.hc.h_QmArg = (t_Handle) p_LnxWrpFmDev;
  97648. +
  97649. + p_LnxWrpFmDev->h_PcdDev = FM_PCD_Config(&fmPcdParams);
  97650. + if (!p_LnxWrpFmDev->h_PcdDev)
  97651. + RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("FM PCD!"));
  97652. +
  97653. + err =
  97654. + FM_PCD_ConfigPlcrNumOfSharedProfiles(p_LnxWrpFmDev->h_PcdDev,
  97655. + LNXWRP_FM_NUM_OF_SHARED_PROFILES);
  97656. + if (err != E_OK)
  97657. + RETURN_ERROR(MAJOR, err, NO_MSG);
  97658. +
  97659. + err = FM_PCD_Init(p_LnxWrpFmDev->h_PcdDev);
  97660. + if (err != E_OK)
  97661. + RETURN_ERROR(MAJOR, err, NO_MSG);
  97662. +
  97663. + if (p_LnxWrpFmDev->err_irq == 0) {
  97664. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97665. + e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC,
  97666. + FALSE);
  97667. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97668. + e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW,
  97669. + FALSE);
  97670. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97671. + e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR,
  97672. + FALSE);
  97673. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97674. + e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC,
  97675. + FALSE);
  97676. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97677. + e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC,
  97678. + FALSE);
  97679. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97680. + e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE,
  97681. + FALSE);
  97682. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97683. + e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE,
  97684. + FALSE);
  97685. + FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev,
  97686. + e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC,
  97687. + FALSE);
  97688. + }
  97689. + }
  97690. +
  97691. + return E_OK;
  97692. +}
  97693. +
  97694. +void FreeFmPcdDev(t_LnxWrpFmDev *p_LnxWrpFmDev)
  97695. +{
  97696. +
  97697. + if (p_LnxWrpFmDev->h_PcdDev)
  97698. + FM_PCD_Free(p_LnxWrpFmDev->h_PcdDev);
  97699. +
  97700. + if (p_LnxWrpFmDev->hc_tx_err_fq)
  97701. + FqFree(p_LnxWrpFmDev->hc_tx_err_fq);
  97702. +
  97703. + if (p_LnxWrpFmDev->hc_tx_conf_fq)
  97704. + FqFree(p_LnxWrpFmDev->hc_tx_conf_fq);
  97705. +
  97706. + if (p_LnxWrpFmDev->hc_tx_fq)
  97707. + FqFree(p_LnxWrpFmDev->hc_tx_fq);
  97708. +}
  97709. +
  97710. +static void FreeFmPortDev(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev)
  97711. +{
  97712. + t_LnxWrpFmDev *p_LnxWrpFmDev =
  97713. + (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  97714. +
  97715. + if (!p_LnxWrpFmPortDev->active)
  97716. + return;
  97717. +
  97718. + if (p_LnxWrpFmPortDev->h_Dev)
  97719. + FM_PORT_Free(p_LnxWrpFmPortDev->h_Dev);
  97720. +
  97721. + devm_iounmap(p_LnxWrpFmDev->dev,
  97722. + UINT_TO_PTR(p_LnxWrpFmPortDev->baseAddr));
  97723. + __devm_release_region(p_LnxWrpFmDev->dev, p_LnxWrpFmDev->res,
  97724. + p_LnxWrpFmPortDev->phys_baseAddr,
  97725. + p_LnxWrpFmPortDev->memSize);
  97726. +}
  97727. +
  97728. +static int /*__devinit*/ fm_port_probe(struct platform_device *of_dev)
  97729. +{
  97730. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
  97731. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  97732. + struct device *dev;
  97733. +
  97734. + dev = &of_dev->dev;
  97735. +
  97736. + p_LnxWrpFmPortDev = ReadFmPortDevTreeNode(of_dev);
  97737. + if (p_LnxWrpFmPortDev == NULL)
  97738. + return -EIO;
  97739. + /* Port can be inactive, thus will not be probed:
  97740. + - in performance mode, OH ports are disabled
  97741. + ...
  97742. + */
  97743. + if (!p_LnxWrpFmPortDev->active)
  97744. + return 0;
  97745. +
  97746. + if (ConfigureFmPortDev(p_LnxWrpFmPortDev) != E_OK)
  97747. + return -EIO;
  97748. +
  97749. + dev_set_drvdata(dev, p_LnxWrpFmPortDev);
  97750. +
  97751. + if (p_LnxWrpFmPortDev->settings.param.portType ==
  97752. + e_FM_PORT_TYPE_OH_HOST_COMMAND)
  97753. + InitFmPcdDev((t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev);
  97754. +
  97755. + p_LnxWrpFmDev = (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  97756. +
  97757. + if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX) {
  97758. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-rx%d",
  97759. + p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id);
  97760. + p_LnxWrpFmPortDev->minor =
  97761. + p_LnxWrpFmPortDev->id + DEV_FM_RX_PORTS_MINOR_BASE;
  97762. + } else if (p_LnxWrpFmPortDev->settings.param.portType ==
  97763. + e_FM_PORT_TYPE_RX_10G) {
  97764. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-rx%d",
  97765. + p_LnxWrpFmDev->name,
  97766. + p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_RX_PORTS);
  97767. + p_LnxWrpFmPortDev->minor =
  97768. + p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_RX_PORTS +
  97769. + DEV_FM_RX_PORTS_MINOR_BASE;
  97770. +#ifndef CONFIG_FMAN_ARM
  97771. + if (IS_T1023_T1024) {
  97772. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-rx%d",
  97773. + p_LnxWrpFmDev->name,
  97774. + p_LnxWrpFmPortDev->id);
  97775. + p_LnxWrpFmPortDev->minor =
  97776. + p_LnxWrpFmPortDev->id +
  97777. + DEV_FM_RX_PORTS_MINOR_BASE;
  97778. + }
  97779. +#endif
  97780. + } else if (p_LnxWrpFmPortDev->settings.param.portType ==
  97781. + e_FM_PORT_TYPE_TX) {
  97782. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-tx%d",
  97783. + p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id);
  97784. + p_LnxWrpFmPortDev->minor =
  97785. + p_LnxWrpFmPortDev->id + DEV_FM_TX_PORTS_MINOR_BASE;
  97786. + } else if (p_LnxWrpFmPortDev->settings.param.portType ==
  97787. + e_FM_PORT_TYPE_TX_10G) {
  97788. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-tx%d",
  97789. + p_LnxWrpFmDev->name,
  97790. + p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_TX_PORTS);
  97791. + p_LnxWrpFmPortDev->minor =
  97792. + p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_TX_PORTS +
  97793. + DEV_FM_TX_PORTS_MINOR_BASE;
  97794. +#ifndef CONFIG_FMAN_ARM
  97795. + if (IS_T1023_T1024) {
  97796. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-tx%d",
  97797. + p_LnxWrpFmDev->name,
  97798. + p_LnxWrpFmPortDev->id);
  97799. + p_LnxWrpFmPortDev->minor =
  97800. + p_LnxWrpFmPortDev->id +
  97801. + DEV_FM_TX_PORTS_MINOR_BASE;
  97802. + }
  97803. +#endif
  97804. + } else if (p_LnxWrpFmPortDev->settings.param.portType ==
  97805. + e_FM_PORT_TYPE_OH_HOST_COMMAND) {
  97806. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-oh%d",
  97807. + p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id);
  97808. + p_LnxWrpFmPortDev->minor =
  97809. + p_LnxWrpFmPortDev->id + DEV_FM_OH_PORTS_MINOR_BASE;
  97810. + } else if (p_LnxWrpFmPortDev->settings.param.portType ==
  97811. + e_FM_PORT_TYPE_OH_OFFLINE_PARSING) {
  97812. + Sprint(p_LnxWrpFmPortDev->name, "%s-port-oh%d",
  97813. + p_LnxWrpFmDev->name, p_LnxWrpFmPortDev->id + 1);
  97814. + p_LnxWrpFmPortDev->minor =
  97815. + p_LnxWrpFmPortDev->id + 1 +
  97816. + DEV_FM_OH_PORTS_MINOR_BASE;
  97817. + }
  97818. +
  97819. + device_create(p_LnxWrpFmDev->fm_class, NULL,
  97820. + MKDEV(p_LnxWrpFmDev->major, p_LnxWrpFmPortDev->minor),
  97821. + NULL, p_LnxWrpFmPortDev->name);
  97822. +
  97823. + /* create sysfs entries for stats and regs */
  97824. +
  97825. + if (fm_port_sysfs_create(dev) != 0) {
  97826. + FreeFmPortDev(p_LnxWrpFmPortDev);
  97827. + REPORT_ERROR(MAJOR, E_INVALID_STATE,
  97828. + ("Unable to create sys entry - fm port!!!"));
  97829. + return -EIO;
  97830. + }
  97831. +
  97832. +#ifdef FM_TX_INVALID_ECC_ERRATA_10GMAC_A009
  97833. + FM_DisableRamsEcc(p_LnxWrpFmDev->h_Dev);
  97834. +#endif /* FM_TX_INVALID_ECC_ERRATA_10GMAC_A009 */
  97835. +
  97836. + DBG(TRACE, ("%s probed", p_LnxWrpFmPortDev->name));
  97837. +
  97838. + return 0;
  97839. +}
  97840. +
  97841. +static int fm_port_remove(struct platform_device *of_dev)
  97842. +{
  97843. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
  97844. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  97845. + struct device *dev;
  97846. +
  97847. + dev = &of_dev->dev;
  97848. + p_LnxWrpFmPortDev = dev_get_drvdata(dev);
  97849. +
  97850. + fm_port_sysfs_destroy(dev);
  97851. +
  97852. + p_LnxWrpFmDev = (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  97853. + device_destroy(p_LnxWrpFmDev->fm_class,
  97854. + MKDEV(p_LnxWrpFmDev->major, p_LnxWrpFmPortDev->minor));
  97855. +
  97856. + FreeFmPortDev(p_LnxWrpFmPortDev);
  97857. +
  97858. + dev_set_drvdata(dev, NULL);
  97859. +
  97860. + return 0;
  97861. +}
  97862. +
  97863. +static const struct of_device_id fm_port_match[] = {
  97864. + {
  97865. + .compatible = "fsl,fman-port-oh"},
  97866. + {
  97867. + .compatible = "fsl,fman-port-1g-rx"},
  97868. + {
  97869. + .compatible = "fsl,fman-port-10g-rx"},
  97870. + {
  97871. + .compatible = "fsl,fman-port-1g-tx"},
  97872. + {
  97873. + .compatible = "fsl,fman-port-10g-tx"},
  97874. + {}
  97875. +};
  97876. +
  97877. +#ifndef MODULE
  97878. +MODULE_DEVICE_TABLE(of, fm_port_match);
  97879. +#endif /* !MODULE */
  97880. +
  97881. +static struct platform_driver fm_port_driver = {
  97882. +
  97883. + .driver = {
  97884. + .name = "fsl-fman-port",
  97885. + .of_match_table = fm_port_match,
  97886. + .owner = THIS_MODULE,
  97887. + },
  97888. + .probe = fm_port_probe,
  97889. + .remove = fm_port_remove
  97890. +};
  97891. +
  97892. +
  97893. +t_Error LNXWRP_FM_Port_Init(void)
  97894. +{
  97895. + /* Register to the DTB for basic FM port API */
  97896. + if (platform_driver_register(&fm_port_driver))
  97897. + return E_NO_DEVICE;
  97898. +
  97899. + return E_OK;
  97900. +}
  97901. +
  97902. +void LNXWRP_FM_Port_Free(void)
  97903. +{
  97904. + platform_driver_unregister(&fm_port_driver);
  97905. +}
  97906. +
  97907. +static int __init __cold fm_port_load(void)
  97908. +{
  97909. + if (LNXWRP_FM_Port_Init() != E_OK) {
  97910. + printk(KERN_CRIT "Failed to init FM Ports wrapper!\n");
  97911. + return -ENODEV;
  97912. + }
  97913. +
  97914. + printk(KERN_CRIT "Freescale FM Ports module\n");
  97915. +
  97916. + return 0;
  97917. +}
  97918. +
  97919. +static void __exit __cold fm_port_unload(void)
  97920. +{
  97921. + LNXWRP_FM_Port_Free();
  97922. +}
  97923. +
  97924. +module_init(fm_port_load);
  97925. +module_exit(fm_port_unload);
  97926. --- /dev/null
  97927. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c
  97928. @@ -0,0 +1,4813 @@
  97929. +/*
  97930. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  97931. + *
  97932. + * Redistribution and use in source and binary forms, with or without
  97933. + * modification, are permitted provided that the following conditions are met:
  97934. + * * Redistributions of source code must retain the above copyright
  97935. + * notice, this list of conditions and the following disclaimer.
  97936. + * * Redistributions in binary form must reproduce the above copyright
  97937. + * notice, this list of conditions and the following disclaimer in the
  97938. + * documentation and/or other materials provided with the distribution.
  97939. + * * Neither the name of Freescale Semiconductor nor the
  97940. + * names of its contributors may be used to endorse or promote products
  97941. + * derived from this software without specific prior written permission.
  97942. + *
  97943. + *
  97944. + * ALTERNATIVELY, this software may be distributed under the terms of the
  97945. + * GNU General Public License ("GPL") as published by the Free Software
  97946. + * Foundation, either version 2 of that License or (at your option) any
  97947. + * later version.
  97948. + *
  97949. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  97950. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  97951. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  97952. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  97953. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  97954. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  97955. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  97956. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  97957. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  97958. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  97959. + */
  97960. +
  97961. +/*
  97962. + @File lnxwrp_ioctls_fm.c
  97963. + @Author Shlomi Gridish
  97964. + @Description FM Linux wrapper functions.
  97965. +*/
  97966. +
  97967. +/* Linux Headers ------------------- */
  97968. +#include <linux/version.h>
  97969. +
  97970. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  97971. +#define MODVERSIONS
  97972. +#endif
  97973. +#ifdef MODVERSIONS
  97974. +#include <config/modversions.h>
  97975. +#endif /* MODVERSIONS */
  97976. +
  97977. +#include <linux/kernel.h>
  97978. +#include <linux/module.h>
  97979. +#include <linux/slab.h>
  97980. +#include <linux/fs.h>
  97981. +#include <linux/cdev.h>
  97982. +#include <linux/device.h>
  97983. +#include <linux/irq.h>
  97984. +#include <linux/interrupt.h>
  97985. +#include <linux/io.h>
  97986. +#include <linux/ioport.h>
  97987. +#include <linux/of_platform.h>
  97988. +#include <asm/uaccess.h>
  97989. +#include <asm/errno.h>
  97990. +#ifndef CONFIG_FMAN_ARM
  97991. +#include <sysdev/fsl_soc.h>
  97992. +#include <linux/fsl/svr.h>
  97993. +#endif
  97994. +
  97995. +#if defined(CONFIG_COMPAT)
  97996. +#include <linux/compat.h>
  97997. +#endif
  97998. +
  97999. +#include "part_ext.h"
  98000. +#include "fm_ioctls.h"
  98001. +#include "fm_pcd_ioctls.h"
  98002. +#include "fm_port_ioctls.h"
  98003. +#include "fm_vsp_ext.h"
  98004. +
  98005. +#ifndef CONFIG_FMAN_ARM
  98006. +#define IS_T1023_T1024 (SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1024 || \
  98007. + SVR_SOC_VER(mfspr(SPRN_SVR)) == SVR_T1023)
  98008. +#endif
  98009. +
  98010. +#define __ERR_MODULE__ MODULE_FM
  98011. +
  98012. +#if defined(CONFIG_COMPAT)
  98013. +#include "lnxwrp_ioctls_fm_compat.h"
  98014. +#endif
  98015. +
  98016. +#include "lnxwrp_fm.h"
  98017. +
  98018. +#define CMP_IOC_DEFINE(def) (IOC_##def != def)
  98019. +
  98020. +/* fm_pcd_ioctls.h === fm_pcd_ext.h assertions */
  98021. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
  98022. +#error Error: please synchronize IOC_ defines!
  98023. +#endif
  98024. +
  98025. +#if CMP_IOC_DEFINE(FM_PCD_PRS_NUM_OF_HDRS)
  98026. +#error Error: please synchronize IOC_ defines!
  98027. +#endif
  98028. +
  98029. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS)
  98030. +#error Error: please synchronize IOC_ defines!
  98031. +#endif
  98032. +
  98033. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS)
  98034. +#error Error: please synchronize IOC_ defines!
  98035. +#endif
  98036. +
  98037. +#if CMP_IOC_DEFINE(FM_PCD_KG_NUM_OF_GENERIC_REGS)
  98038. +#error Error: please synchronize IOC_ defines!
  98039. +#endif
  98040. +
  98041. +#if CMP_IOC_DEFINE(FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY)
  98042. +#error Error: please synchronize IOC_ defines!
  98043. +#endif
  98044. +
  98045. +#if CMP_IOC_DEFINE(FM_PCD_KG_NUM_OF_EXTRACT_MASKS)
  98046. +#error Error: please synchronize IOC_ defines!
  98047. +#endif
  98048. +
  98049. +#if CMP_IOC_DEFINE(FM_PCD_KG_NUM_OF_DEFAULT_GROUPS)
  98050. +#error Error: please synchronize IOC_ defines!
  98051. +#endif
  98052. +
  98053. +#if CMP_IOC_DEFINE(FM_PCD_PRS_NUM_OF_LABELS)
  98054. +#error Error: please synchronize IOC_ defines!
  98055. +#endif
  98056. +
  98057. +#if CMP_IOC_DEFINE(FM_PCD_SW_PRS_SIZE)
  98058. +#error Error: please synchronize IOC_ defines!
  98059. +#endif
  98060. +
  98061. +#if CMP_IOC_DEFINE(FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE)
  98062. +#error Error: please synchronize IOC_ defines!
  98063. +#endif
  98064. +
  98065. +#if DPAA_VERSION >= 11
  98066. +#if CMP_IOC_DEFINE(FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES)
  98067. +#error Error: please synchronize IOC_ defines!
  98068. +#endif
  98069. +#endif
  98070. +
  98071. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_TREES)
  98072. +#error Error: please synchronize IOC_ defines!
  98073. +#endif
  98074. +
  98075. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_GROUPS)
  98076. +#error Error: please synchronize IOC_ defines!
  98077. +#endif
  98078. +
  98079. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_UNITS)
  98080. +#error Error: please synchronize IOC_ defines!
  98081. +#endif
  98082. +
  98083. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_KEYS)
  98084. +#error Error: please synchronize IOC_ defines!
  98085. +#endif
  98086. +
  98087. +#if CMP_IOC_DEFINE(FM_PCD_MAX_SIZE_OF_KEY)
  98088. +#error Error: please synchronize IOC_ defines!
  98089. +#endif
  98090. +
  98091. +#if CMP_IOC_DEFINE(FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP)
  98092. +#error Error: please synchronize IOC_ defines!
  98093. +#endif
  98094. +
  98095. +#if CMP_IOC_DEFINE(FM_PCD_LAST_KEY_INDEX)
  98096. +#error Error: please synchronize IOC_ defines!
  98097. +#endif
  98098. +
  98099. +/* net_ioctls.h === net_ext.h assertions */
  98100. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPP_PID)
  98101. +#error Error: please synchronize IOC_ defines!
  98102. +#endif
  98103. +
  98104. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPP_COMPRESSED)
  98105. +#error Error: please synchronize IOC_ defines!
  98106. +#endif
  98107. +
  98108. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPP_ALL_FIELDS)
  98109. +#error Error: please synchronize IOC_ defines!
  98110. +#endif
  98111. +
  98112. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPPoE_ALL_FIELDS)
  98113. +#error Error: please synchronize IOC_ defines!
  98114. +#endif
  98115. +
  98116. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPPMUX_ALL_FIELDS)
  98117. +#error Error: please synchronize IOC_ defines!
  98118. +#endif
  98119. +
  98120. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PPPMUX_SUBFRAME_ALL_FIELDS)
  98121. +#error Error: please synchronize IOC_ defines!
  98122. +#endif
  98123. +
  98124. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_ETH_ALL_FIELDS)
  98125. +#error Error: please synchronize IOC_ defines!
  98126. +#endif
  98127. +
  98128. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPv4_ALL_FIELDS)
  98129. +#error Error: please synchronize IOC_ defines!
  98130. +#endif
  98131. +
  98132. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPv6_ALL_FIELDS)
  98133. +#error Error: please synchronize IOC_ defines!
  98134. +#endif
  98135. +
  98136. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_ICMP_ALL_FIELDS)
  98137. +#error Error: please synchronize IOC_ defines!
  98138. +#endif
  98139. +
  98140. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IGMP_ALL_FIELDS)
  98141. +#error Error: please synchronize IOC_ defines!
  98142. +#endif
  98143. +
  98144. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_TCP_ALL_FIELDS)
  98145. +#error Error: please synchronize IOC_ defines!
  98146. +#endif
  98147. +
  98148. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_SCTP_ALL_FIELDS)
  98149. +#error Error: please synchronize IOC_ defines!
  98150. +#endif
  98151. +
  98152. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_DCCP_ALL_FIELDS)
  98153. +#error Error: please synchronize IOC_ defines!
  98154. +#endif
  98155. +
  98156. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_UDP_ALL_FIELDS)
  98157. +#error Error: please synchronize IOC_ defines!
  98158. +#endif
  98159. +
  98160. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_UDP_ENCAP_ESP_ALL_FIELDS)
  98161. +#error Error: please synchronize IOC_ defines!
  98162. +#endif
  98163. +
  98164. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPHC_ALL_FIELDS)
  98165. +#error Error: please synchronize IOC_ defines!
  98166. +#endif
  98167. +
  98168. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_SCTP_CHUNK_DATA_ALL_FIELDS)
  98169. +#error Error: please synchronize IOC_ defines!
  98170. +#endif
  98171. +
  98172. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_L2TPv2_ALL_FIELDS)
  98173. +#error Error: please synchronize IOC_ defines!
  98174. +#endif
  98175. +
  98176. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_L2TPv3_CTRL_ALL_FIELDS)
  98177. +#error Error: please synchronize IOC_ defines!
  98178. +#endif
  98179. +
  98180. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_L2TPv3_SESS_ALL_FIELDS)
  98181. +#error Error: please synchronize IOC_ defines!
  98182. +#endif
  98183. +
  98184. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_VLAN_ALL_FIELDS)
  98185. +#error Error: please synchronize IOC_ defines!
  98186. +#endif
  98187. +
  98188. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_LLC_ALL_FIELDS)
  98189. +#error Error: please synchronize IOC_ defines!
  98190. +#endif
  98191. +
  98192. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_NLPID_ALL_FIELDS)
  98193. +#error Error: please synchronize IOC_ defines!
  98194. +#endif
  98195. +
  98196. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_SNAP_ALL_FIELDS)
  98197. +#error Error: please synchronize IOC_ defines!
  98198. +#endif
  98199. +
  98200. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_LLC_SNAP_ALL_FIELDS)
  98201. +#warning Error: please synchronize IOC_ defines!
  98202. +#endif
  98203. +
  98204. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_ARP_ALL_FIELDS)
  98205. +#error Error: please synchronize IOC_ defines!
  98206. +#endif
  98207. +
  98208. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_RFC2684_ALL_FIELDS)
  98209. +#error Error: please synchronize IOC_ defines!
  98210. +#endif
  98211. +
  98212. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_USER_DEFINED_ALL_FIELDS)
  98213. +#error Error: please synchronize IOC_ defines!
  98214. +#endif
  98215. +
  98216. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_PAYLOAD_ALL_FIELDS)
  98217. +#error Error: please synchronize IOC_ defines!
  98218. +#endif
  98219. +
  98220. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_GRE_ALL_FIELDS)
  98221. +#error Error: please synchronize IOC_ defines!
  98222. +#endif
  98223. +
  98224. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_MINENCAP_ALL_FIELDS)
  98225. +#error Error: please synchronize IOC_ defines!
  98226. +#endif
  98227. +
  98228. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPSEC_AH_ALL_FIELDS)
  98229. +#error Error: please synchronize IOC_ defines!
  98230. +#endif
  98231. +
  98232. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_IPSEC_ESP_ALL_FIELDS)
  98233. +#error Error: please synchronize IOC_ defines!
  98234. +#endif
  98235. +
  98236. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_MPLS_LABEL_STACK_ALL_FIELDS)
  98237. +#error Error: please synchronize IOC_ defines!
  98238. +#endif
  98239. +
  98240. +#if CMP_IOC_DEFINE(NET_HEADER_FIELD_MACSEC_ALL_FIELDS)
  98241. +#error Error: please synchronize IOC_ defines!
  98242. +#endif
  98243. +
  98244. +/* fm_ioctls.h === fm_ext.h assertions */
  98245. +#if CMP_IOC_DEFINE(FM_MAX_NUM_OF_VALID_PORTS)
  98246. +#error Error: please synchronize IOC_ defines!
  98247. +#endif
  98248. +
  98249. +void LnxWrpPCDIOCTLTypeChecking(void)
  98250. +{
  98251. + /* fm_ext.h == fm_ioctls.h */
  98252. + ASSERT_COND(sizeof(ioc_fm_port_bandwidth_params) == sizeof(t_FmPortsBandwidthParams));
  98253. + ASSERT_COND(sizeof(ioc_fm_revision_info_t) == sizeof(t_FmRevisionInfo));
  98254. +
  98255. + /* fm_pcd_ext.h == fm_pcd_ioctls.h */
  98256. + /*ioc_fm_pcd_counters_params_t : NOT USED */
  98257. + /*ioc_fm_pcd_exception_params_t : private */
  98258. +#if (DPAA_VERSION >= 11)
  98259. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_capwap_params_t) == sizeof(t_FmPcdManipFragCapwapParams));
  98260. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_capwap_params_t) == sizeof(t_FmPcdManipReassemCapwapParams));
  98261. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t) == sizeof(t_FmPcdManipHdrInsrtByHdrParams));
  98262. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_ip_params_t) == sizeof(t_FmPcdManipHdrInsrtIpParams));
  98263. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_t) == sizeof(t_FmPcdManipHdrInsrt));
  98264. + ASSERT_COND(sizeof(ioc_fm_manip_hdr_info_t) == sizeof(t_FmManipHdrInfo));
  98265. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t) == sizeof(t_FmPcdManipHdrRmvByHdrParams));
  98266. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_special_offload_capwap_params_t) == sizeof(t_FmPcdManipSpecialOffloadCapwapParams));
  98267. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_capwap_stats_t) == sizeof(t_FmPcdManipFragCapwapStats));
  98268. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_capwap_stats_t) == sizeof(t_FmPcdManipReassemCapwapStats));
  98269. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_params_t) == sizeof(t_FmPcdManipFragParams));
  98270. +#endif /* (DPAA_VERSION >= 11) */
  98271. +
  98272. + ASSERT_COND(sizeof(ioc_fm_pcd_prs_label_params_t) == sizeof(t_FmPcdPrsLabelParams));
  98273. + ASSERT_COND(sizeof(ioc_fm_pcd_prs_sw_params_t) == sizeof(t_FmPcdPrsSwParams));
  98274. + /*ioc_fm_pcd_kg_dflt_value_params_t : private */
  98275. + ASSERT_COND(sizeof(ioc_fm_pcd_hdr_protocol_opt_u) == sizeof(u_FmPcdHdrProtocolOpt));
  98276. + ASSERT_COND(sizeof(ioc_fm_pcd_fields_u) == sizeof(t_FmPcdFields));
  98277. + ASSERT_COND(sizeof(ioc_fm_pcd_from_hdr_t) == sizeof(t_FmPcdFromHdr));
  98278. + ASSERT_COND(sizeof(ioc_fm_pcd_from_field_t) == sizeof(t_FmPcdFromField));
  98279. + ASSERT_COND(sizeof(ioc_fm_pcd_distinction_unit_t) == sizeof(t_FmPcdDistinctionUnit));
  98280. +
  98281. +#if defined(CONFIG_ARM64)
  98282. + /* different alignment */
  98283. + ASSERT_COND(sizeof(ioc_fm_pcd_net_env_params_t) == sizeof(t_FmPcdNetEnvParams) + sizeof(void *) + 4);
  98284. +#else
  98285. +#if !defined(CONFIG_COMPAT)
  98286. + /* different alignment */
  98287. + ASSERT_COND(sizeof(ioc_fm_pcd_net_env_params_t) == sizeof(t_FmPcdNetEnvParams) + sizeof(void *));
  98288. +#endif
  98289. +#endif
  98290. + ASSERT_COND(sizeof(ioc_fm_pcd_extract_entry_t) == sizeof(t_FmPcdExtractEntry));
  98291. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_extract_mask_t) == sizeof(t_FmPcdKgExtractMask));
  98292. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_extract_dflt_t) == sizeof(t_FmPcdKgExtractDflt));
  98293. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_key_extract_and_hash_params_t) == sizeof(t_FmPcdKgKeyExtractAndHashParams));
  98294. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_extracted_or_params_t) == sizeof(t_FmPcdKgExtractedOrParams));
  98295. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_scheme_counter_t) == sizeof(t_FmPcdKgSchemeCounter));
  98296. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_plcr_profile_t) == sizeof(t_FmPcdKgPlcrProfile));
  98297. +#if (DPAA_VERSION >= 11)
  98298. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_storage_profile_t) == sizeof(t_FmPcdKgStorageProfile));
  98299. +#endif
  98300. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_cc_t) == sizeof(t_FmPcdKgCc));
  98301. +#if !defined(CONFIG_COMPAT)
  98302. + /* different alignment */
  98303. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_scheme_params_t) == sizeof(t_FmPcdKgSchemeParams) + sizeof(void *));
  98304. +#endif
  98305. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_cc_params_t) == sizeof(t_FmPcdCcNextCcParams));
  98306. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_plcr_params_t) == sizeof(t_FmPcdCcNextPlcrParams));
  98307. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_enqueue_params_t) == sizeof(t_FmPcdCcNextEnqueueParams));
  98308. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_kg_params_t) == sizeof(t_FmPcdCcNextKgParams));
  98309. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_next_engine_params_t) == sizeof(t_FmPcdCcNextEngineParams));
  98310. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_key_params_t) == sizeof(t_FmPcdCcKeyParams));
  98311. + ASSERT_COND(sizeof(ioc_keys_params_t) == sizeof(t_KeysParams));
  98312. +#if !defined(CONFIG_COMPAT)
  98313. + /* different alignment */
  98314. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_node_params_t) == sizeof(t_FmPcdCcNodeParams) + sizeof(void *));
  98315. + ASSERT_COND(sizeof(ioc_fm_pcd_hash_table_params_t) == sizeof(t_FmPcdHashTableParams) + sizeof(void *));
  98316. +#endif
  98317. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_grp_params_t) == sizeof(t_FmPcdCcGrpParams));
  98318. +#if !defined(CONFIG_COMPAT)
  98319. + /* different alignment */
  98320. + ASSERT_COND(sizeof(ioc_fm_pcd_cc_tree_params_t) == sizeof(t_FmPcdCcTreeParams) + sizeof(void *));
  98321. +#endif
  98322. + ASSERT_COND(sizeof(ioc_fm_pcd_plcr_byte_rate_mode_param_t) == sizeof(t_FmPcdPlcrByteRateModeParams));
  98323. + ASSERT_COND(sizeof(ioc_fm_pcd_plcr_non_passthrough_alg_param_t) == sizeof(t_FmPcdPlcrNonPassthroughAlgParams));
  98324. + ASSERT_COND(sizeof(ioc_fm_pcd_plcr_next_engine_params_u) == sizeof(u_FmPcdPlcrNextEngineParams));
  98325. + /*ioc_fm_pcd_port_params_t : private */
  98326. + ASSERT_COND(sizeof(ioc_fm_pcd_plcr_profile_params_t) == sizeof(t_FmPcdPlcrProfileParams) + sizeof(void *));
  98327. + /*ioc_fm_pcd_cc_tree_modify_next_engine_params_t : private */
  98328. +
  98329. +#ifdef FM_CAPWAP_SUPPORT
  98330. +#error TODO: unsupported feature
  98331. +/*
  98332. + ASSERT_COND(sizeof(TODO) == sizeof(t_FmPcdManipHdrInsrtByTemplateParams));
  98333. + ASSERT_COND(sizeof(TODO) == sizeof(t_CapwapFragmentationParams));
  98334. + ASSERT_COND(sizeof(TODO) == sizeof(t_CapwapReassemblyParams));
  98335. +*/
  98336. +#endif
  98337. +
  98338. + /*ioc_fm_pcd_cc_node_modify_next_engine_params_t : private */
  98339. + /*ioc_fm_pcd_cc_node_remove_key_params_t : private */
  98340. + /*ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t : private */
  98341. + /*ioc_fm_pcd_cc_node_modify_key_params_t : private */
  98342. + /*ioc_fm_manip_hdr_info_t : private */
  98343. + /*ioc_fm_pcd_hash_table_set_t : private */
  98344. +
  98345. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_ip_params_t) == sizeof(t_FmPcdManipFragIpParams));
  98346. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_ip_params_t) == sizeof(t_FmPcdManipReassemIpParams));
  98347. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_special_offload_ipsec_params_t) == sizeof(t_FmPcdManipSpecialOffloadIPSecParams));
  98348. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_special_offload_params_t) == sizeof(t_FmPcdManipSpecialOffloadParams));
  98349. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_rmv_generic_params_t) == sizeof(t_FmPcdManipHdrRmvGenericParams));
  98350. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_generic_params_t) == sizeof(t_FmPcdManipHdrInsrtGenericParams));
  98351. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_insrt_params_t) == sizeof(t_FmPcdManipHdrInsrtParams));
  98352. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_rmv_params_t) == sizeof(t_FmPcdManipHdrRmvParams));
  98353. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_hdr_params_t) == sizeof(t_FmPcdManipHdrParams));
  98354. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_params_t) == sizeof(t_FmPcdManipFragParams));
  98355. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_params_t) == sizeof(t_FmPcdManipReassemParams));
  98356. +#if !defined(CONFIG_COMPAT)
  98357. + /* different alignment */
  98358. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_params_t) == sizeof(t_FmPcdManipParams) + sizeof(void *));
  98359. +#endif
  98360. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_ip_stats_t) == sizeof(t_FmPcdManipReassemIpStats));
  98361. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_ip_stats_t) == sizeof(t_FmPcdManipFragIpStats));
  98362. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_reassem_stats_t) == sizeof(t_FmPcdManipReassemStats));
  98363. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_frag_stats_t) == sizeof(t_FmPcdManipFragStats));
  98364. + ASSERT_COND(sizeof(ioc_fm_pcd_manip_stats_t) == sizeof(t_FmPcdManipStats));
  98365. +#if DPAA_VERSION >= 11
  98366. + ASSERT_COND(sizeof(ioc_fm_pcd_frm_replic_group_params_t) == sizeof(t_FmPcdFrmReplicGroupParams) + sizeof(void *));
  98367. +#endif
  98368. +
  98369. + /* fm_port_ext.h == fm_port_ioctls.h */
  98370. + ASSERT_COND(sizeof(ioc_fm_port_rate_limit_t) == sizeof(t_FmPortRateLimit));
  98371. + ASSERT_COND(sizeof(ioc_fm_port_pcd_params_t) == sizeof(t_FmPortPcdParams));
  98372. + ASSERT_COND(sizeof(ioc_fm_pcd_kg_scheme_select_t) == sizeof(t_FmPcdKgSchemeSelect));
  98373. + ASSERT_COND(sizeof(ioc_fm_pcd_port_schemes_params_t) == sizeof(t_FmPcdPortSchemesParams));
  98374. + ASSERT_COND(sizeof(ioc_fm_pcd_prs_start_t) == sizeof(t_FmPcdPrsStart));
  98375. +
  98376. + return;
  98377. +}
  98378. +
  98379. +#define ASSERT_IOC_NET_ENUM(def) ASSERT_COND((unsigned long)e_IOC_NET_##def == (unsigned long)def)
  98380. +
  98381. +void LnxWrpPCDIOCTLEnumChecking(void)
  98382. +{
  98383. + /* net_ext.h == net_ioctls.h : sampling checks */
  98384. + ASSERT_IOC_NET_ENUM(HEADER_TYPE_MACSEC);
  98385. + ASSERT_IOC_NET_ENUM(HEADER_TYPE_PPP);
  98386. + ASSERT_IOC_NET_ENUM(MAX_HEADER_TYPE_COUNT);
  98387. +
  98388. + /* fm_ext.h == fm_ioctls.h */
  98389. + ASSERT_COND((unsigned long)e_IOC_FM_PORT_TYPE_DUMMY == (unsigned long)e_FM_PORT_TYPE_DUMMY);
  98390. + ASSERT_COND((unsigned long)e_IOC_EX_MURAM_ECC == (unsigned long)e_FM_EX_MURAM_ECC);
  98391. + ASSERT_COND((unsigned long)e_IOC_FM_COUNTERS_DEQ_CONFIRM == (unsigned long)e_FM_COUNTERS_DEQ_CONFIRM);
  98392. +
  98393. + /* fm_pcd_ext.h == fm_pcd_ioctls.h */
  98394. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES == (unsigned long)e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES);
  98395. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PRS_EXCEPTION_SINGLE_ECC == (unsigned long)e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC);
  98396. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PRS == (unsigned long)e_FM_PCD_PRS);
  98397. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_EXTRACT_FULL_FIELD == (unsigned long)e_FM_PCD_EXTRACT_FULL_FIELD);
  98398. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_EXTRACT_FROM_FLOW_ID == (unsigned long)e_FM_PCD_EXTRACT_FROM_FLOW_ID);
  98399. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO == (unsigned long)e_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO);
  98400. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_KG_DFLT_ILLEGAL == (unsigned long)e_FM_PCD_KG_DFLT_ILLEGAL);
  98401. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_KG_GENERIC_NOT_FROM_DATA == (unsigned long)e_FM_PCD_KG_GENERIC_NOT_FROM_DATA);
  98402. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_HDR_INDEX_LAST == (unsigned long)e_FM_PCD_HDR_INDEX_LAST);
  98403. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_SHARED == (unsigned long)e_FM_PCD_PLCR_SHARED);
  98404. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_RFC_4115 == (unsigned long)e_FM_PCD_PLCR_RFC_4115);
  98405. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_COLOR_AWARE == (unsigned long)e_FM_PCD_PLCR_COLOR_AWARE);
  98406. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_OVERRIDE == (unsigned long)e_FM_PCD_PLCR_OVERRIDE);
  98407. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_FULL_FRM_LEN == (unsigned long)e_FM_PCD_PLCR_FULL_FRM_LEN);
  98408. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN == (unsigned long)e_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN);
  98409. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_PACKET_MODE == (unsigned long)e_FM_PCD_PLCR_PACKET_MODE);
  98410. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_DROP_FRAME == (unsigned long)e_FM_PCD_DROP_FRAME);
  98411. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER == (unsigned long)e_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER);
  98412. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP == (unsigned long)e_FM_PCD_ACTION_INDEXED_LOOKUP);
  98413. + ASSERT_COND((unsigned long)e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR == (unsigned long)e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR);
  98414. +#if !defined(FM_CAPWAP_SUPPORT)
  98415. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_INSRT_GENERIC == (unsigned long)e_FM_PCD_MANIP_INSRT_GENERIC);
  98416. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_RMV_GENERIC == (unsigned long)e_FM_PCD_MANIP_RMV_GENERIC);
  98417. +#else
  98418. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_INSRT_BY_TEMPLATE == (unsigned long)e_FM_PCD_MANIP_INSRT_BY_TEMPLATE);
  98419. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_RMV_BY_HDR == (unsigned long)e_FM_PCD_MANIP_RMV_BY_HDR);
  98420. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_RMV_BY_HDR_FROM_START == (unsigned long)e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START);
  98421. +#endif
  98422. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG == (unsigned long)e_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG);
  98423. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH == (unsigned long)e_FM_PCD_MANIP_EIGHT_WAYS_HASH);
  98424. +
  98425. +#ifdef FM_CAPWAP_SUPPORT
  98426. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_STATS_PER_FLOWID == (unsigned long)e_FM_PCD_STATS_PER_FLOWID);
  98427. +#endif
  98428. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD == (unsigned long)e_FM_PCD_MANIP_SPECIAL_OFFLOAD);
  98429. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_CC_STATS_MODE_FRAME == (unsigned long)e_FM_PCD_CC_STATS_MODE_FRAME);
  98430. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG == (unsigned long)e_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG);
  98431. + ASSERT_COND((unsigned long)e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC == (unsigned long)e_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC);
  98432. +
  98433. + /* fm_port_ext.h == fm_port_ioctls.h */
  98434. +#if !defined(FM_CAPWAP_SUPPORT)
  98435. + ASSERT_COND((unsigned long)e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR == (unsigned long)e_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR);
  98436. +#else
  98437. + ASSERT_COND((unsigned long)e_IOC_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR == (unsigned long)e_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR);
  98438. +#endif
  98439. + ASSERT_COND((unsigned long)e_IOC_FM_PORT_COUNTERS_DEQ_CONFIRM == (unsigned long)e_FM_PORT_COUNTERS_DEQ_CONFIRM);
  98440. + ASSERT_COND((unsigned long)e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8 == (unsigned long)e_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8);
  98441. +
  98442. + return;
  98443. +}
  98444. +
  98445. +static t_Error LnxwrpFmPcdIOCTL(t_LnxWrpFmDev *p_LnxWrpFmDev, unsigned int cmd, unsigned long arg, bool compat)
  98446. +{
  98447. + t_Error err = E_OK;
  98448. +
  98449. +/*
  98450. +Status: PCD API to fmlib (file: drivers/net/dpa/NetCommSw/inc/Peripherals/fm_pcd_ext.h):
  98451. +
  98452. + FM_PCD_PrsLoadSw
  98453. + FM_PCD_SetAdvancedOffloadSupport
  98454. + FM_PCD_Enable
  98455. + FM_PCD_Disable
  98456. + FM_PCD_ForceIntr
  98457. + FM_PCD_SetException
  98458. + FM_PCD_KgSetAdditionalDataAfterParsing
  98459. + FM_PCD_KgSetDfltValue
  98460. + FM_PCD_NetEnvCharacteristicsSet
  98461. + FM_PCD_NetEnvCharacteristicsDelete
  98462. + FM_PCD_KgSchemeSet
  98463. + FM_PCD_KgSchemeDelete
  98464. + FM_PCD_MatchTableSet
  98465. + FM_PCD_MatchTableDelete
  98466. + FM_PCD_CcRootBuild
  98467. + FM_PCD_CcRootDelete
  98468. + FM_PCD_PlcrProfileSet
  98469. + FM_PCD_PlcrProfileDelete
  98470. + FM_PCD_CcRootModifyNextEngine
  98471. + FM_PCD_MatchTableModifyNextEngine
  98472. + FM_PCD_MatchTableModifyMissNextEngine
  98473. + FM_PCD_MatchTableRemoveKey
  98474. + FM_PCD_MatchTableAddKey
  98475. + FM_PCD_MatchTableModifyKeyAndNextEngine
  98476. + FM_PCD_HashTableSet
  98477. + FM_PCD_HashTableDelete
  98478. + FM_PCD_HashTableAddKey
  98479. + FM_PCD_HashTableRemoveKey
  98480. + FM_PCD_MatchTableModifyKey
  98481. + FM_PCD_ManipNodeReplace
  98482. + FM_PCD_ManipNodeSet
  98483. + FM_PCD_ManipNodeDelete
  98484. +
  98485. +Status: not exported, should be thru sysfs
  98486. + FM_PCD_KgSchemeGetCounter
  98487. + FM_PCD_KgSchemeSetCounter
  98488. + FM_PCD_PlcrProfileGetCounter
  98489. + FM_PCD_PlcrProfileSetCounter
  98490. +
  98491. +Status: not exported
  98492. + FM_PCD_MatchTableFindNRemoveKey
  98493. + FM_PCD_MatchTableFindNModifyNextEngine
  98494. + FM_PCD_MatchTableFindNModifyKeyAndNextEngine
  98495. + FM_PCD_MatchTableFindNModifyKey
  98496. + FM_PCD_MatchTableGetIndexedHashBucket
  98497. + FM_PCD_MatchTableGetNextEngine
  98498. + FM_PCD_MatchTableGetKeyCounter
  98499. +
  98500. +Status: not exported, would be nice to have
  98501. + FM_PCD_HashTableModifyNextEngine
  98502. + FM_PCD_HashTableModifyMissNextEngine
  98503. + FM_PCD_HashTableGetMissNextEngine
  98504. + FM_PCD_ManipGetStatistics
  98505. +
  98506. +Status: not exported
  98507. +#if DPAA_VERSION >= 11
  98508. +
  98509. + FM_VSP_GetStatistics -- it's not available yet
  98510. +#endif
  98511. +
  98512. +Status: feature not supported
  98513. +#ifdef FM_CAPWAP_SUPPORT
  98514. +#error unsupported feature
  98515. + FM_PCD_StatisticsSetNode
  98516. +#endif
  98517. +
  98518. + */
  98519. + _fm_ioctl_dbg("cmd:0x%08x(type:0x%02x, nr:%u).\n",
  98520. + cmd, _IOC_TYPE(cmd), _IOC_NR(cmd) - 20);
  98521. +
  98522. + switch (cmd)
  98523. + {
  98524. +#if defined(CONFIG_COMPAT)
  98525. + case FM_PCD_IOC_PRS_LOAD_SW_COMPAT:
  98526. +#endif
  98527. + case FM_PCD_IOC_PRS_LOAD_SW:
  98528. + {
  98529. + ioc_fm_pcd_prs_sw_params_t *param;
  98530. + uint8_t *p_code;
  98531. +
  98532. + param = (ioc_fm_pcd_prs_sw_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_prs_sw_params_t));
  98533. + if (!param)
  98534. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98535. +
  98536. + memset(param, 0, sizeof(ioc_fm_pcd_prs_sw_params_t));
  98537. +
  98538. +#if defined(CONFIG_COMPAT)
  98539. + if (compat)
  98540. + {
  98541. + ioc_compat_fm_pcd_prs_sw_params_t *compat_param;
  98542. +
  98543. + compat_param = (ioc_compat_fm_pcd_prs_sw_params_t *) XX_Malloc(
  98544. + sizeof(ioc_compat_fm_pcd_prs_sw_params_t));
  98545. + if (!compat_param)
  98546. + {
  98547. + XX_Free(param);
  98548. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98549. + }
  98550. +
  98551. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_prs_sw_params_t));
  98552. + if (copy_from_user(compat_param,
  98553. + (ioc_compat_fm_pcd_prs_sw_params_t *) compat_ptr(arg),
  98554. + sizeof(ioc_compat_fm_pcd_prs_sw_params_t)))
  98555. + {
  98556. + XX_Free(compat_param);
  98557. + XX_Free(param);
  98558. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98559. + }
  98560. +
  98561. + compat_fm_pcd_prs_sw(compat_param, param, COMPAT_US_TO_K);
  98562. +
  98563. + XX_Free(compat_param);
  98564. + }
  98565. + else
  98566. +#endif
  98567. + {
  98568. + if (copy_from_user(param, (ioc_fm_pcd_prs_sw_params_t *)arg,
  98569. + sizeof(ioc_fm_pcd_prs_sw_params_t)))
  98570. + {
  98571. + XX_Free(param);
  98572. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98573. + }
  98574. + }
  98575. +
  98576. + if (!param->p_code || !param->size)
  98577. + {
  98578. + XX_Free(param);
  98579. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98580. + }
  98581. +
  98582. + p_code = (uint8_t *) XX_Malloc(param->size);
  98583. + if (!p_code)
  98584. + {
  98585. + XX_Free(param);
  98586. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98587. + }
  98588. +
  98589. + memset(p_code, 0, param->size);
  98590. + if (copy_from_user(p_code, param->p_code, param->size))
  98591. + {
  98592. + XX_Free(p_code);
  98593. + XX_Free(param);
  98594. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98595. + }
  98596. +
  98597. + param->p_code = p_code;
  98598. +
  98599. + err = FM_PCD_PrsLoadSw(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdPrsSwParams*)param);
  98600. +
  98601. + XX_Free(p_code);
  98602. + XX_Free(param);
  98603. + break;
  98604. + }
  98605. +
  98606. + case FM_PCD_IOC_SET_ADVANCED_OFFLOAD_SUPPORT:
  98607. + err = FM_PCD_SetAdvancedOffloadSupport(p_LnxWrpFmDev->h_PcdDev);
  98608. + break;
  98609. +
  98610. + case FM_PCD_IOC_ENABLE:
  98611. + err = FM_PCD_Enable(p_LnxWrpFmDev->h_PcdDev);
  98612. + break;
  98613. +
  98614. + case FM_PCD_IOC_DISABLE:
  98615. + err = FM_PCD_Disable(p_LnxWrpFmDev->h_PcdDev);
  98616. + break;
  98617. +
  98618. + case FM_PCD_IOC_FORCE_INTR:
  98619. + {
  98620. + int exception;
  98621. +
  98622. +#if defined(CONFIG_COMPAT)
  98623. + if (compat)
  98624. + {
  98625. + if (get_user(exception, (int *) compat_ptr(arg)))
  98626. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98627. + }
  98628. + else
  98629. +#endif
  98630. + {
  98631. + if (get_user(exception, (int *)arg))
  98632. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98633. + }
  98634. +
  98635. + err = FM_PCD_ForceIntr(p_LnxWrpFmDev->h_PcdDev, (e_FmPcdExceptions)exception);
  98636. + break;
  98637. + }
  98638. +
  98639. + case FM_PCD_IOC_SET_EXCEPTION:
  98640. + {
  98641. + ioc_fm_pcd_exception_params_t *param;
  98642. +
  98643. + param = (ioc_fm_pcd_exception_params_t *) XX_Malloc(
  98644. + sizeof(ioc_fm_pcd_exception_params_t));
  98645. + if (!param)
  98646. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98647. +
  98648. + memset(param, 0, sizeof(ioc_fm_pcd_exception_params_t));
  98649. +
  98650. +#if defined(CONFIG_COMPAT)
  98651. + if (compat)
  98652. + {
  98653. + if (copy_from_user(param, (ioc_fm_pcd_exception_params_t *)compat_ptr(arg),
  98654. + sizeof(ioc_fm_pcd_exception_params_t)))
  98655. + {
  98656. + XX_Free(param);
  98657. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98658. + }
  98659. + }
  98660. + else
  98661. +#endif
  98662. + {
  98663. + if (copy_from_user(param, (ioc_fm_pcd_exception_params_t *)arg,
  98664. + sizeof(ioc_fm_pcd_exception_params_t)))
  98665. + {
  98666. + XX_Free(param);
  98667. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98668. + }
  98669. + }
  98670. +
  98671. + err = FM_PCD_SetException(p_LnxWrpFmDev->h_PcdDev, param->exception, param->enable);
  98672. +
  98673. + XX_Free(param);
  98674. + break;
  98675. + }
  98676. +
  98677. + case FM_PCD_IOC_KG_SET_ADDITIONAL_DATA_AFTER_PARSING:
  98678. + {
  98679. + uint8_t payloadOffset;
  98680. +
  98681. +#if defined(CONFIG_COMPAT)
  98682. + if (compat)
  98683. + {
  98684. + if (get_user(payloadOffset, (uint8_t*) compat_ptr(arg)))
  98685. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98686. + }
  98687. + else
  98688. +#endif
  98689. + {
  98690. + if (get_user(payloadOffset, (uint8_t*) arg))
  98691. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98692. + }
  98693. +
  98694. + err = FM_PCD_KgSetAdditionalDataAfterParsing(p_LnxWrpFmDev->h_PcdDev, payloadOffset);
  98695. + break;
  98696. + }
  98697. +
  98698. + case FM_PCD_IOC_KG_SET_DFLT_VALUE:
  98699. + {
  98700. + ioc_fm_pcd_kg_dflt_value_params_t *param;
  98701. +
  98702. + param = (ioc_fm_pcd_kg_dflt_value_params_t *) XX_Malloc(
  98703. + sizeof(ioc_fm_pcd_kg_dflt_value_params_t));
  98704. + if (!param)
  98705. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98706. +
  98707. + memset(param, 0, sizeof(ioc_fm_pcd_kg_dflt_value_params_t));
  98708. +
  98709. +#if defined(CONFIG_COMPAT)
  98710. + if (compat)
  98711. + {
  98712. + if (copy_from_user(param, (ioc_fm_pcd_kg_dflt_value_params_t *)compat_ptr(arg),
  98713. + sizeof(ioc_fm_pcd_kg_dflt_value_params_t)))
  98714. + {
  98715. + XX_Free(param);
  98716. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98717. + }
  98718. + }
  98719. + else
  98720. +#endif
  98721. + {
  98722. + if (copy_from_user(param, (ioc_fm_pcd_kg_dflt_value_params_t *)arg,
  98723. + sizeof(ioc_fm_pcd_kg_dflt_value_params_t)))
  98724. + {
  98725. + XX_Free(param);
  98726. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98727. + }
  98728. + }
  98729. +
  98730. + err = FM_PCD_KgSetDfltValue(p_LnxWrpFmDev->h_PcdDev, param->valueId, param->value);
  98731. +
  98732. + XX_Free(param);
  98733. + break;
  98734. + }
  98735. +
  98736. +#if defined(CONFIG_COMPAT)
  98737. + case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET_COMPAT:
  98738. +#endif
  98739. + case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET:
  98740. + {
  98741. + ioc_fm_pcd_net_env_params_t *param;
  98742. +
  98743. + param = (ioc_fm_pcd_net_env_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_net_env_params_t));
  98744. + if (!param)
  98745. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98746. +
  98747. + memset(param, 0, sizeof(ioc_fm_pcd_net_env_params_t));
  98748. +
  98749. +#if defined(CONFIG_COMPAT)
  98750. + if (compat)
  98751. + {
  98752. + ioc_compat_fm_pcd_net_env_params_t *compat_param;
  98753. +
  98754. + compat_param = (ioc_compat_fm_pcd_net_env_params_t *) XX_Malloc(
  98755. + sizeof(ioc_compat_fm_pcd_net_env_params_t));
  98756. + if (!compat_param)
  98757. + {
  98758. + XX_Free(param);
  98759. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98760. + }
  98761. +
  98762. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_net_env_params_t));
  98763. + if (copy_from_user(compat_param, (ioc_compat_fm_pcd_net_env_params_t *) compat_ptr(arg),
  98764. + sizeof(ioc_compat_fm_pcd_net_env_params_t)))
  98765. + {
  98766. + XX_Free(compat_param);
  98767. + XX_Free(param);
  98768. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98769. + }
  98770. +
  98771. + compat_copy_fm_pcd_net_env(compat_param, param, COMPAT_US_TO_K);
  98772. + XX_Free(compat_param);
  98773. + }
  98774. + else
  98775. +#endif
  98776. + {
  98777. + if (copy_from_user(param, (ioc_fm_pcd_net_env_params_t *) arg,
  98778. + sizeof(ioc_fm_pcd_net_env_params_t)))
  98779. + {
  98780. + XX_Free(param);
  98781. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98782. + }
  98783. + }
  98784. +
  98785. + param->id = FM_PCD_NetEnvCharacteristicsSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdNetEnvParams*)param);
  98786. +
  98787. + if (!param->id)
  98788. + {
  98789. + XX_Free(param);
  98790. + err = E_INVALID_VALUE;
  98791. + /* Since the LLD has no errno-style error reporting,
  98792. + we're left here with no other option than to report
  98793. + a generic E_INVALID_VALUE */
  98794. + break;
  98795. + }
  98796. +
  98797. +#if defined(CONFIG_COMPAT)
  98798. + if (compat)
  98799. + {
  98800. + ioc_compat_fm_pcd_net_env_params_t *compat_param;
  98801. +
  98802. + compat_param = (ioc_compat_fm_pcd_net_env_params_t *) XX_Malloc(
  98803. + sizeof(ioc_compat_fm_pcd_net_env_params_t));
  98804. + if (!compat_param)
  98805. + {
  98806. + XX_Free(param);
  98807. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98808. + }
  98809. +
  98810. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_net_env_params_t));
  98811. + compat_copy_fm_pcd_net_env(compat_param, param, COMPAT_K_TO_US);
  98812. +
  98813. + if (copy_to_user((ioc_compat_fm_pcd_net_env_params_t *) compat_ptr(arg),
  98814. + compat_param,
  98815. + sizeof(ioc_compat_fm_pcd_net_env_params_t)))
  98816. + err = E_READ_FAILED;
  98817. +
  98818. + XX_Free(compat_param);
  98819. + }
  98820. + else
  98821. +#endif
  98822. + {
  98823. + if (copy_to_user((ioc_fm_pcd_net_env_params_t *)arg,
  98824. + param,
  98825. + sizeof(ioc_fm_pcd_net_env_params_t)))
  98826. + err = E_READ_FAILED;
  98827. + }
  98828. +
  98829. + XX_Free(param);
  98830. + break;
  98831. + }
  98832. +
  98833. +#if defined(CONFIG_COMPAT)
  98834. + case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE_COMPAT:
  98835. +#endif
  98836. + case FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE:
  98837. + {
  98838. + ioc_fm_obj_t id;
  98839. +
  98840. + memset(&id, 0 , sizeof(ioc_fm_obj_t));
  98841. +
  98842. +#if defined(CONFIG_COMPAT)
  98843. + if (compat)
  98844. + {
  98845. + ioc_compat_fm_obj_t compat_id;
  98846. +
  98847. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  98848. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98849. +
  98850. + compat_obj_delete(&compat_id, &id);
  98851. + }
  98852. + else
  98853. +#endif
  98854. + {
  98855. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  98856. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98857. + }
  98858. +
  98859. + err = FM_PCD_NetEnvCharacteristicsDelete(id.obj);
  98860. + break;
  98861. + }
  98862. +
  98863. +#if defined(CONFIG_COMPAT)
  98864. + case FM_PCD_IOC_KG_SCHEME_SET_COMPAT:
  98865. +#endif
  98866. + case FM_PCD_IOC_KG_SCHEME_SET:
  98867. + {
  98868. + ioc_fm_pcd_kg_scheme_params_t *param;
  98869. +
  98870. + param = (ioc_fm_pcd_kg_scheme_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_kg_scheme_params_t));
  98871. + if (!param)
  98872. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98873. +
  98874. + memset(param, 0, sizeof(ioc_fm_pcd_kg_scheme_params_t));
  98875. +
  98876. +#if defined(CONFIG_COMPAT)
  98877. + if (compat)
  98878. + {
  98879. + ioc_compat_fm_pcd_kg_scheme_params_t *compat_param = NULL;
  98880. +
  98881. + compat_param = (ioc_compat_fm_pcd_kg_scheme_params_t *) XX_Malloc(
  98882. + sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
  98883. + if (!compat_param)
  98884. + {
  98885. + XX_Free(param);
  98886. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98887. + }
  98888. +
  98889. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
  98890. +
  98891. + if (copy_from_user(compat_param, (ioc_compat_fm_pcd_kg_scheme_params_t *) compat_ptr(arg),
  98892. + sizeof(ioc_compat_fm_pcd_kg_scheme_params_t)))
  98893. + {
  98894. + XX_Free(compat_param);
  98895. + XX_Free(param);
  98896. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98897. + }
  98898. +
  98899. + compat_copy_fm_pcd_kg_scheme(compat_param, param, COMPAT_US_TO_K);
  98900. +
  98901. + XX_Free(compat_param);
  98902. + }
  98903. + else
  98904. +#endif
  98905. + {
  98906. + if (copy_from_user(param, (ioc_fm_pcd_kg_scheme_params_t *)arg,
  98907. + sizeof(ioc_fm_pcd_kg_scheme_params_t)))
  98908. + {
  98909. + XX_Free(param);
  98910. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98911. + }
  98912. + }
  98913. +
  98914. + param->id = FM_PCD_KgSchemeSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdKgSchemeParams*)param);
  98915. +
  98916. + if (!param->id)
  98917. + {
  98918. + XX_Free(param);
  98919. + err = E_INVALID_VALUE;
  98920. + /* Since the LLD has no errno-style error reporting,
  98921. + we're left here with no other option than to report
  98922. + a generic E_INVALID_VALUE */
  98923. + break;
  98924. + }
  98925. +
  98926. +#if defined(CONFIG_COMPAT)
  98927. + if (compat)
  98928. + {
  98929. + ioc_compat_fm_pcd_kg_scheme_params_t *compat_param;
  98930. +
  98931. + compat_param = (ioc_compat_fm_pcd_kg_scheme_params_t *) XX_Malloc(
  98932. + sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
  98933. + if (!compat_param)
  98934. + {
  98935. + XX_Free(param);
  98936. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98937. + }
  98938. +
  98939. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_params_t));
  98940. + compat_copy_fm_pcd_kg_scheme(compat_param, param, COMPAT_K_TO_US);
  98941. + if (copy_to_user((ioc_compat_fm_pcd_kg_scheme_params_t *)compat_ptr(arg),
  98942. + compat_param,
  98943. + sizeof(ioc_compat_fm_pcd_kg_scheme_params_t)))
  98944. + err = E_READ_FAILED;
  98945. +
  98946. + XX_Free(compat_param);
  98947. + }
  98948. + else
  98949. +#endif
  98950. + {
  98951. + if (copy_to_user((ioc_fm_pcd_kg_scheme_params_t *)arg,
  98952. + param,
  98953. + sizeof(ioc_fm_pcd_kg_scheme_params_t)))
  98954. + err = E_READ_FAILED;
  98955. + }
  98956. +
  98957. + XX_Free(param);
  98958. + break;
  98959. + }
  98960. +
  98961. +#if defined(CONFIG_COMPAT)
  98962. + case FM_PCD_IOC_KG_SCHEME_GET_CNTR_COMPAT:
  98963. +#endif
  98964. + case FM_PCD_IOC_KG_SCHEME_GET_CNTR:
  98965. + {
  98966. + ioc_fm_pcd_kg_scheme_spc_t *param;
  98967. +
  98968. + param = (ioc_fm_pcd_kg_scheme_spc_t *) XX_Malloc(sizeof(ioc_fm_pcd_kg_scheme_spc_t));
  98969. + if (!param)
  98970. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98971. +
  98972. + memset(param, 0, sizeof(ioc_fm_pcd_kg_scheme_spc_t));
  98973. +
  98974. +#if defined(CONFIG_COMPAT)
  98975. + if (compat)
  98976. + {
  98977. + ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param = NULL;
  98978. +
  98979. + compat_param = (ioc_compat_fm_pcd_kg_scheme_spc_t *) XX_Malloc(
  98980. + sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
  98981. + if (!compat_param)
  98982. + {
  98983. + XX_Free(param);
  98984. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  98985. + }
  98986. +
  98987. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
  98988. +
  98989. + if (copy_from_user(compat_param, (ioc_compat_fm_pcd_kg_scheme_spc_t *) compat_ptr(arg),
  98990. + sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t)))
  98991. + {
  98992. + XX_Free(compat_param);
  98993. + XX_Free(param);
  98994. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  98995. + }
  98996. +
  98997. + compat_copy_fm_pcd_kg_scheme_spc(compat_param, param, COMPAT_US_TO_K);
  98998. +
  98999. + XX_Free(compat_param);
  99000. + }
  99001. + else
  99002. +#endif
  99003. + {
  99004. + if (copy_from_user(param, (ioc_fm_pcd_kg_scheme_spc_t *)arg,
  99005. + sizeof(ioc_fm_pcd_kg_scheme_spc_t)))
  99006. + {
  99007. + XX_Free(param);
  99008. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99009. + }
  99010. + }
  99011. +
  99012. + param->val = FM_PCD_KgSchemeGetCounter((t_Handle)param->id);
  99013. +
  99014. +#if defined(CONFIG_COMPAT)
  99015. + if (compat)
  99016. + {
  99017. + ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param;
  99018. +
  99019. + compat_param = (ioc_compat_fm_pcd_kg_scheme_spc_t *) XX_Malloc(
  99020. + sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
  99021. + if (!compat_param)
  99022. + {
  99023. + XX_Free(param);
  99024. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99025. + }
  99026. +
  99027. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t));
  99028. + compat_copy_fm_pcd_kg_scheme_spc(compat_param, param, COMPAT_K_TO_US);
  99029. + if (copy_to_user((ioc_compat_fm_pcd_kg_scheme_spc_t *)compat_ptr(arg),
  99030. + compat_param,
  99031. + sizeof(ioc_compat_fm_pcd_kg_scheme_spc_t)))
  99032. + err = E_READ_FAILED;
  99033. +
  99034. + XX_Free(compat_param);
  99035. + }
  99036. + else
  99037. +#endif
  99038. + {
  99039. + if (copy_to_user((ioc_fm_pcd_kg_scheme_spc_t *)arg,
  99040. + param,
  99041. + sizeof(ioc_fm_pcd_kg_scheme_spc_t)))
  99042. + err = E_READ_FAILED;
  99043. + }
  99044. +
  99045. + XX_Free(param);
  99046. + break;
  99047. + }
  99048. +
  99049. +#if defined(CONFIG_COMPAT)
  99050. + case FM_PCD_IOC_KG_SCHEME_DELETE_COMPAT:
  99051. +#endif
  99052. + case FM_PCD_IOC_KG_SCHEME_DELETE:
  99053. + {
  99054. + ioc_fm_obj_t id;
  99055. +
  99056. + memset(&id, 0 , sizeof(ioc_fm_obj_t));
  99057. +
  99058. +#if defined(CONFIG_COMPAT)
  99059. + if (compat)
  99060. + {
  99061. + ioc_compat_fm_obj_t compat_id;
  99062. +
  99063. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  99064. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99065. +
  99066. + compat_obj_delete(&compat_id, &id);
  99067. + }
  99068. + else
  99069. +#endif
  99070. + {
  99071. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  99072. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99073. + }
  99074. +
  99075. + err = FM_PCD_KgSchemeDelete(id.obj);
  99076. + break;
  99077. + }
  99078. +
  99079. +#if defined(CONFIG_COMPAT)
  99080. + case FM_PCD_IOC_MATCH_TABLE_SET_COMPAT:
  99081. +#endif
  99082. + case FM_PCD_IOC_MATCH_TABLE_SET:
  99083. + {
  99084. + ioc_fm_pcd_cc_node_params_t *param;
  99085. + uint8_t *keys;
  99086. + uint8_t *masks;
  99087. + int i,k;
  99088. +
  99089. + param = (ioc_fm_pcd_cc_node_params_t *) XX_Malloc(
  99090. + sizeof(ioc_fm_pcd_cc_node_params_t) +
  99091. + 2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
  99092. + if (!param)
  99093. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99094. +
  99095. + memset(param, 0, sizeof(ioc_fm_pcd_cc_node_params_t) +
  99096. + 2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
  99097. +
  99098. + keys = (uint8_t *) (param + 1);
  99099. + masks = keys + IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY;
  99100. +
  99101. +#if defined(CONFIG_COMPAT)
  99102. + if (compat)
  99103. + {
  99104. + ioc_compat_fm_pcd_cc_node_params_t *compat_param;
  99105. +
  99106. + compat_param = (ioc_compat_fm_pcd_cc_node_params_t *) XX_Malloc(
  99107. + sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
  99108. + 2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
  99109. + if (!compat_param)
  99110. + {
  99111. + XX_Free(param);
  99112. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99113. + }
  99114. +
  99115. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
  99116. + 2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
  99117. +
  99118. + if (copy_from_user(compat_param,
  99119. + (ioc_compat_fm_pcd_cc_node_params_t *)compat_ptr(arg),
  99120. + sizeof(ioc_compat_fm_pcd_cc_node_params_t)))
  99121. + {
  99122. + XX_Free(compat_param);
  99123. + XX_Free(param);
  99124. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99125. + }
  99126. +
  99127. + compat_copy_fm_pcd_cc_node(compat_param, param, COMPAT_US_TO_K);
  99128. +
  99129. + XX_Free(compat_param);
  99130. + }
  99131. + else
  99132. +#endif
  99133. + {
  99134. + if (copy_from_user(param, (ioc_fm_pcd_cc_node_params_t *)arg, sizeof(ioc_fm_pcd_cc_node_params_t)))
  99135. + {
  99136. + XX_Free(param);
  99137. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99138. + }
  99139. + }
  99140. +
  99141. + ASSERT_COND(param->keys_params.num_of_keys <= IOC_FM_PCD_MAX_NUM_OF_KEYS);
  99142. + ASSERT_COND(param->keys_params.key_size <= IOC_FM_PCD_MAX_SIZE_OF_KEY);
  99143. +
  99144. + /* support for indexed lookup */
  99145. + if( !(param->extract_cc_params.type == e_IOC_FM_PCD_EXTRACT_NON_HDR &&
  99146. + param->extract_cc_params.extract_params.extract_non_hdr.src == e_IOC_FM_PCD_EXTRACT_FROM_HASH &&
  99147. + param->extract_cc_params.extract_params.extract_non_hdr.action == e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP))
  99148. + {
  99149. + for (i=0, k=0;
  99150. + i < param->keys_params.num_of_keys;
  99151. + i++, k += IOC_FM_PCD_MAX_SIZE_OF_KEY)
  99152. + {
  99153. + if (param->keys_params.key_params[i].p_key &&
  99154. + param->keys_params.key_size)
  99155. + {
  99156. + if (copy_from_user(&keys[k],
  99157. + param->keys_params.key_params[i].p_key,
  99158. + param->keys_params.key_size))
  99159. + {
  99160. + XX_Free(param);
  99161. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99162. + }
  99163. +
  99164. + param->keys_params.key_params[i].p_key = &keys[k];
  99165. + }
  99166. +
  99167. + if (param->keys_params.key_params[i].p_mask)
  99168. + {
  99169. + if (copy_from_user(&masks[k],
  99170. + param->keys_params.key_params[i].p_mask,
  99171. + param->keys_params.key_size))
  99172. + {
  99173. + XX_Free(param);
  99174. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99175. + }
  99176. +
  99177. + param->keys_params.key_params[i].p_mask = &masks[k];
  99178. + }
  99179. + }
  99180. + }
  99181. +
  99182. + param->id = FM_PCD_MatchTableSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdCcNodeParams*)param);
  99183. +
  99184. + if (!param->id) {
  99185. + XX_Free(param);
  99186. + err = E_INVALID_VALUE;
  99187. + /* Since the LLD has no errno-style error reporting,
  99188. + we're left here with no other option than to report
  99189. + a generic E_INVALID_VALUE */
  99190. + break;
  99191. + }
  99192. +
  99193. +#if defined(CONFIG_COMPAT)
  99194. + if (compat)
  99195. + {
  99196. + ioc_compat_fm_pcd_cc_node_params_t *compat_param;
  99197. + compat_param = (ioc_compat_fm_pcd_cc_node_params_t *) XX_Malloc(
  99198. + sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
  99199. + 2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
  99200. + if (!compat_param)
  99201. + {
  99202. + XX_Free(param);
  99203. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99204. + }
  99205. +
  99206. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_params_t) +
  99207. + 2 * IOC_FM_PCD_MAX_NUM_OF_KEYS * IOC_FM_PCD_MAX_SIZE_OF_KEY);
  99208. + compat_copy_fm_pcd_cc_node(compat_param, param, COMPAT_K_TO_US);
  99209. +
  99210. + if (copy_to_user((ioc_compat_fm_pcd_cc_node_params_t *)compat_ptr(arg),
  99211. + compat_param,
  99212. + sizeof(ioc_compat_fm_pcd_cc_node_params_t)))
  99213. + err = E_READ_FAILED;
  99214. +
  99215. + XX_Free(compat_param);
  99216. + }
  99217. + else
  99218. +#endif
  99219. + {
  99220. + if (copy_to_user((ioc_fm_pcd_cc_node_params_t *)arg,
  99221. + param,
  99222. + sizeof(ioc_fm_pcd_cc_node_params_t)))
  99223. + err = E_READ_FAILED;
  99224. + }
  99225. +
  99226. + XX_Free(param);
  99227. + break;
  99228. + }
  99229. +
  99230. +#if defined(CONFIG_COMPAT)
  99231. + case FM_PCD_IOC_MATCH_TABLE_DELETE_COMPAT:
  99232. +#endif
  99233. + case FM_PCD_IOC_MATCH_TABLE_DELETE:
  99234. + {
  99235. + ioc_fm_obj_t id;
  99236. +
  99237. + memset(&id, 0 , sizeof(ioc_fm_obj_t));
  99238. +
  99239. +#if defined(CONFIG_COMPAT)
  99240. + if (compat)
  99241. + {
  99242. + ioc_compat_fm_obj_t compat_id;
  99243. +
  99244. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  99245. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99246. +
  99247. + compat_obj_delete(&compat_id, &id);
  99248. + }
  99249. + else
  99250. +#endif
  99251. + {
  99252. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  99253. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99254. + }
  99255. +
  99256. + err = FM_PCD_MatchTableDelete(id.obj);
  99257. + break;
  99258. + }
  99259. +
  99260. +#if defined(CONFIG_COMPAT)
  99261. + case FM_PCD_IOC_CC_ROOT_BUILD_COMPAT:
  99262. +#endif
  99263. + case FM_PCD_IOC_CC_ROOT_BUILD:
  99264. + {
  99265. + ioc_fm_pcd_cc_tree_params_t *param;
  99266. +
  99267. + param = (ioc_fm_pcd_cc_tree_params_t *) XX_Malloc(sizeof(ioc_fm_pcd_cc_tree_params_t));
  99268. + if (!param)
  99269. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99270. +
  99271. + memset(param, 0, sizeof(ioc_fm_pcd_cc_tree_params_t));
  99272. +
  99273. +#if defined(CONFIG_COMPAT)
  99274. + if (compat)
  99275. + {
  99276. + ioc_compat_fm_pcd_cc_tree_params_t *compat_param;
  99277. +
  99278. + compat_param = (ioc_compat_fm_pcd_cc_tree_params_t *) XX_Malloc(
  99279. + sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
  99280. + if (!compat_param)
  99281. + {
  99282. + XX_Free(param);
  99283. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99284. + }
  99285. +
  99286. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
  99287. + if (copy_from_user(compat_param,
  99288. + (ioc_compat_fm_pcd_cc_tree_params_t *)compat_ptr(arg),
  99289. + sizeof(ioc_compat_fm_pcd_cc_tree_params_t)))
  99290. + {
  99291. + XX_Free(compat_param);
  99292. + XX_Free(param);
  99293. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99294. + }
  99295. +
  99296. + compat_copy_fm_pcd_cc_tree(compat_param, param, COMPAT_US_TO_K);
  99297. +
  99298. + XX_Free(compat_param);
  99299. + }
  99300. + else
  99301. +#endif
  99302. + {
  99303. + if (copy_from_user(param, (ioc_fm_pcd_cc_tree_params_t *)arg,
  99304. + sizeof(ioc_fm_pcd_cc_tree_params_t)))
  99305. + {
  99306. + XX_Free(param);
  99307. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99308. + }
  99309. + }
  99310. +
  99311. + param->id = FM_PCD_CcRootBuild(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdCcTreeParams*)param);
  99312. +
  99313. + if (!param->id) {
  99314. + XX_Free(param);
  99315. + err = E_INVALID_VALUE;
  99316. + /* Since the LLD has no errno-style error reporting,
  99317. + we're left here with no other option than to report
  99318. + a generic E_INVALID_VALUE */
  99319. + break;
  99320. + }
  99321. +
  99322. +#if defined(CONFIG_COMPAT)
  99323. + if (compat)
  99324. + {
  99325. + ioc_compat_fm_pcd_cc_tree_params_t *compat_param;
  99326. +
  99327. + compat_param = (ioc_compat_fm_pcd_cc_tree_params_t *) XX_Malloc(sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
  99328. + if (!compat_param)
  99329. + {
  99330. + XX_Free(param);
  99331. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99332. + }
  99333. +
  99334. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tree_params_t));
  99335. +
  99336. + compat_copy_fm_pcd_cc_tree(compat_param, param, COMPAT_K_TO_US);
  99337. +
  99338. + if (copy_to_user((ioc_compat_fm_pcd_cc_tree_params_t *)compat_ptr(arg),
  99339. + compat_param,
  99340. + sizeof(ioc_compat_fm_pcd_cc_tree_params_t)))
  99341. + err = E_READ_FAILED;
  99342. +
  99343. + XX_Free(compat_param);
  99344. + }
  99345. + else
  99346. +#endif
  99347. + {
  99348. + if (copy_to_user((ioc_fm_pcd_cc_tree_params_t *)arg,
  99349. + param,
  99350. + sizeof(ioc_fm_pcd_cc_tree_params_t)))
  99351. + err = E_READ_FAILED;
  99352. + }
  99353. +
  99354. + XX_Free(param);
  99355. + break;
  99356. + }
  99357. +
  99358. +#if defined(CONFIG_COMPAT)
  99359. + case FM_PCD_IOC_CC_ROOT_DELETE_COMPAT:
  99360. +#endif
  99361. + case FM_PCD_IOC_CC_ROOT_DELETE:
  99362. + {
  99363. + ioc_fm_obj_t id;
  99364. +
  99365. + memset(&id, 0 , sizeof(ioc_fm_obj_t));
  99366. +
  99367. +#if defined(CONFIG_COMPAT)
  99368. + if (compat)
  99369. + {
  99370. + ioc_compat_fm_obj_t compat_id;
  99371. +
  99372. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  99373. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99374. +
  99375. + compat_obj_delete(&compat_id, &id);
  99376. + }
  99377. + else
  99378. +#endif
  99379. + {
  99380. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  99381. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99382. + }
  99383. +
  99384. + err = FM_PCD_CcRootDelete(id.obj);
  99385. + break;
  99386. + }
  99387. +
  99388. +#if defined(CONFIG_COMPAT)
  99389. + case FM_PCD_IOC_PLCR_PROFILE_SET_COMPAT:
  99390. +#endif
  99391. + case FM_PCD_IOC_PLCR_PROFILE_SET:
  99392. + {
  99393. + ioc_fm_pcd_plcr_profile_params_t *param;
  99394. +
  99395. + param = (ioc_fm_pcd_plcr_profile_params_t *) XX_Malloc(
  99396. + sizeof(ioc_fm_pcd_plcr_profile_params_t));
  99397. + if (!param)
  99398. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99399. +
  99400. + memset(param, 0, sizeof(ioc_fm_pcd_plcr_profile_params_t));
  99401. +
  99402. +#if defined(CONFIG_COMPAT)
  99403. + if (compat)
  99404. + {
  99405. + ioc_compat_fm_pcd_plcr_profile_params_t *compat_param;
  99406. +
  99407. + compat_param = (ioc_compat_fm_pcd_plcr_profile_params_t *) XX_Malloc(
  99408. + sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
  99409. + if (!compat_param)
  99410. + {
  99411. + XX_Free(param);
  99412. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99413. + }
  99414. +
  99415. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
  99416. + if (copy_from_user(compat_param, (
  99417. + ioc_compat_fm_pcd_plcr_profile_params_t *)compat_ptr(arg),
  99418. + sizeof(ioc_compat_fm_pcd_plcr_profile_params_t)))
  99419. + {
  99420. + XX_Free(compat_param);
  99421. + XX_Free(param);
  99422. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99423. + }
  99424. +
  99425. + compat_copy_fm_pcd_plcr_profile(compat_param, param, COMPAT_US_TO_K);
  99426. +
  99427. + XX_Free(compat_param);
  99428. + }
  99429. + else
  99430. +#endif
  99431. + {
  99432. + if (copy_from_user(param, (ioc_fm_pcd_plcr_profile_params_t *)arg,
  99433. + sizeof(ioc_fm_pcd_plcr_profile_params_t)))
  99434. + {
  99435. + XX_Free(param);
  99436. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99437. + }
  99438. + }
  99439. +
  99440. + if (!param->modify &&
  99441. + (((t_FmPcdPlcrProfileParams*)param)->id.newParams.profileType != e_FM_PCD_PLCR_SHARED))
  99442. + {
  99443. + t_Handle h_Port;
  99444. + ioc_fm_pcd_port_params_t *port_params;
  99445. +
  99446. + port_params = (ioc_fm_pcd_port_params_t*) XX_Malloc(sizeof(ioc_fm_pcd_port_params_t));
  99447. + if (!port_params)
  99448. + {
  99449. + XX_Free(param);
  99450. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99451. + }
  99452. +
  99453. + memset(port_params, 0, sizeof(ioc_fm_pcd_port_params_t));
  99454. + if (copy_from_user(port_params, (ioc_fm_pcd_port_params_t*)((t_FmPcdPlcrProfileParams*)param)->id.newParams.h_FmPort,
  99455. + sizeof(ioc_fm_pcd_port_params_t)))
  99456. + {
  99457. + XX_Free(port_params);
  99458. + XX_Free(param);
  99459. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99460. + }
  99461. +
  99462. + switch(port_params->port_type)
  99463. + {
  99464. + case (e_IOC_FM_PORT_TYPE_RX):
  99465. + if (port_params->port_id < FM_MAX_NUM_OF_1G_RX_PORTS) {
  99466. + h_Port = p_LnxWrpFmDev->rxPorts[port_params->port_id].h_Dev;
  99467. + break;
  99468. + }
  99469. + goto invalid_port_id;
  99470. +
  99471. + case (e_IOC_FM_PORT_TYPE_RX_10G):
  99472. + if (port_params->port_id < FM_MAX_NUM_OF_10G_RX_PORTS) {
  99473. +#ifndef CONFIG_FMAN_ARM
  99474. + if (IS_T1023_T1024) {
  99475. + h_Port = p_LnxWrpFmDev->rxPorts[port_params->port_id].h_Dev;
  99476. + } else {
  99477. +#else
  99478. + {
  99479. +#endif
  99480. + h_Port = p_LnxWrpFmDev->rxPorts[port_params->port_id + FM_MAX_NUM_OF_1G_RX_PORTS].h_Dev;
  99481. + }
  99482. + break;
  99483. + }
  99484. + goto invalid_port_id;
  99485. +
  99486. + case (e_IOC_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  99487. + if (port_params->port_id && port_params->port_id < FM_MAX_NUM_OF_OH_PORTS) {
  99488. + h_Port = p_LnxWrpFmDev->opPorts[port_params->port_id - 1].h_Dev;
  99489. + break;
  99490. + }
  99491. + goto invalid_port_id;
  99492. +
  99493. + default:
  99494. +invalid_port_id:
  99495. + XX_Free(port_params);
  99496. + XX_Free(param);
  99497. + RETURN_ERROR(MINOR, E_INVALID_SELECTION, NO_MSG);
  99498. + }
  99499. +
  99500. + ((t_FmPcdPlcrProfileParams*)param)->id.newParams.h_FmPort = h_Port;
  99501. + XX_Free(port_params);
  99502. + }
  99503. +
  99504. + param->id = FM_PCD_PlcrProfileSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdPlcrProfileParams*)param);
  99505. +
  99506. + if (!param->id) {
  99507. + XX_Free(param);
  99508. + err = E_INVALID_VALUE;
  99509. + /* Since the LLD has no errno-style error reporting,
  99510. + we're left here with no other option than to report
  99511. + a generic E_INVALID_VALUE */
  99512. + break;
  99513. + }
  99514. +
  99515. +#if defined(CONFIG_COMPAT)
  99516. + if (compat)
  99517. + {
  99518. + ioc_compat_fm_pcd_plcr_profile_params_t *compat_param;
  99519. +
  99520. + compat_param = (ioc_compat_fm_pcd_plcr_profile_params_t *) XX_Malloc(
  99521. + sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
  99522. + if (!compat_param)
  99523. + {
  99524. + XX_Free(param);
  99525. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99526. + }
  99527. +
  99528. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_plcr_profile_params_t));
  99529. + compat_copy_fm_pcd_plcr_profile(compat_param, param, COMPAT_K_TO_US);
  99530. + if (copy_to_user((ioc_compat_fm_pcd_plcr_profile_params_t *) compat_ptr(arg),
  99531. + compat_param,
  99532. + sizeof(ioc_compat_fm_pcd_plcr_profile_params_t)))
  99533. + err = E_READ_FAILED;
  99534. +
  99535. + XX_Free(compat_param);
  99536. + }
  99537. + else
  99538. +#endif
  99539. + {
  99540. + if (copy_to_user((ioc_fm_pcd_plcr_profile_params_t *)arg,
  99541. + param,
  99542. + sizeof(ioc_fm_pcd_plcr_profile_params_t)))
  99543. + err = E_READ_FAILED;
  99544. + }
  99545. +
  99546. + XX_Free(param);
  99547. + break;
  99548. + }
  99549. +
  99550. +#if defined(CONFIG_COMPAT)
  99551. + case FM_PCD_IOC_PLCR_PROFILE_DELETE_COMPAT:
  99552. +#endif
  99553. + case FM_PCD_IOC_PLCR_PROFILE_DELETE:
  99554. + {
  99555. + ioc_fm_obj_t id;
  99556. +
  99557. + memset(&id, 0 , sizeof(ioc_fm_obj_t));
  99558. +
  99559. +#if defined(CONFIG_COMPAT)
  99560. + if (compat)
  99561. + {
  99562. + ioc_compat_fm_obj_t compat_id;
  99563. +
  99564. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  99565. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99566. +
  99567. + compat_obj_delete(&compat_id, &id);
  99568. + }
  99569. + else
  99570. +#endif
  99571. + {
  99572. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  99573. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99574. + }
  99575. +
  99576. + err = FM_PCD_PlcrProfileDelete(id.obj);
  99577. + break;
  99578. + }
  99579. +
  99580. +#if defined(CONFIG_COMPAT)
  99581. + case FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE_COMPAT:
  99582. +#endif
  99583. + case FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE:
  99584. + {
  99585. + ioc_fm_pcd_cc_tree_modify_next_engine_params_t *param;
  99586. +
  99587. + param = (ioc_fm_pcd_cc_tree_modify_next_engine_params_t *) XX_Malloc(
  99588. + sizeof(ioc_fm_pcd_cc_tree_modify_next_engine_params_t));
  99589. + if (!param)
  99590. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99591. +
  99592. + memset(param, 0, sizeof(ioc_fm_pcd_cc_tree_modify_next_engine_params_t));
  99593. +
  99594. +#if defined(CONFIG_COMPAT)
  99595. + if (compat)
  99596. + {
  99597. + ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *compat_param;
  99598. +
  99599. + compat_param = (ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *) XX_Malloc(
  99600. + sizeof(ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t));
  99601. + if (!compat_param)
  99602. + {
  99603. + XX_Free(param);
  99604. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99605. + }
  99606. +
  99607. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t));
  99608. + if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *) compat_ptr(arg),
  99609. + sizeof(ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t)))
  99610. + {
  99611. + XX_Free(compat_param);
  99612. + XX_Free(param);
  99613. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99614. + }
  99615. +
  99616. + compat_fm_pcd_cc_tree_modify_next_engine(compat_param, param, COMPAT_US_TO_K);
  99617. +
  99618. + XX_Free(compat_param);
  99619. + }
  99620. + else
  99621. +#endif
  99622. + {
  99623. + if (copy_from_user(param, (ioc_fm_pcd_cc_tree_modify_next_engine_params_t *)arg,
  99624. + sizeof(ioc_fm_pcd_cc_tree_modify_next_engine_params_t)))
  99625. + {
  99626. + XX_Free(param);
  99627. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99628. + }
  99629. + }
  99630. +
  99631. + err = FM_PCD_CcRootModifyNextEngine(param->id,
  99632. + param->grp_indx,
  99633. + param->indx,
  99634. + (t_FmPcdCcNextEngineParams*)(&param->cc_next_engine_params));
  99635. +
  99636. + XX_Free(param);
  99637. + break;
  99638. + }
  99639. +
  99640. +#if defined(CONFIG_COMPAT)
  99641. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE_COMPAT:
  99642. +#endif
  99643. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE:
  99644. + {
  99645. + ioc_fm_pcd_cc_node_modify_next_engine_params_t *param;
  99646. +
  99647. + param = (ioc_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
  99648. + sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
  99649. + if (!param)
  99650. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99651. +
  99652. + memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
  99653. +
  99654. +#if defined(CONFIG_COMPAT)
  99655. + if (compat)
  99656. + {
  99657. + ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *compat_param;
  99658. +
  99659. + compat_param = (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
  99660. + sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
  99661. + if (!compat_param)
  99662. + {
  99663. + XX_Free(param);
  99664. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99665. + }
  99666. +
  99667. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
  99668. + if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) compat_ptr(arg),
  99669. + sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)))
  99670. + {
  99671. + XX_Free(compat_param);
  99672. + XX_Free(param);
  99673. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99674. + }
  99675. +
  99676. + compat_copy_fm_pcd_cc_node_modify_next_engine(compat_param, param, COMPAT_US_TO_K);
  99677. +
  99678. + XX_Free(compat_param);
  99679. + }
  99680. + else
  99681. +#endif
  99682. + {
  99683. + if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_next_engine_params_t *)arg,
  99684. + sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t)))
  99685. + {
  99686. + XX_Free(param);
  99687. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99688. + }
  99689. + }
  99690. +
  99691. + err = FM_PCD_MatchTableModifyNextEngine(param->id,
  99692. + param->key_indx,
  99693. + (t_FmPcdCcNextEngineParams*)(&param->cc_next_engine_params));
  99694. +
  99695. + XX_Free(param);
  99696. + break;
  99697. + }
  99698. +
  99699. +#if defined(CONFIG_COMPAT)
  99700. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE_COMPAT:
  99701. +#endif
  99702. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE:
  99703. + {
  99704. + ioc_fm_pcd_cc_node_modify_next_engine_params_t *param;
  99705. +
  99706. + param = (ioc_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
  99707. + sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
  99708. + if (!param)
  99709. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99710. +
  99711. + memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t));
  99712. +
  99713. +#if defined(CONFIG_COMPAT)
  99714. + if (compat)
  99715. + {
  99716. + ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *compat_param;
  99717. +
  99718. + compat_param = (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) XX_Malloc(
  99719. + sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
  99720. + if (!compat_param)
  99721. + {
  99722. + XX_Free(param);
  99723. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99724. + }
  99725. +
  99726. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t));
  99727. + if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *) compat_ptr(arg),
  99728. + sizeof(ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)))
  99729. + {
  99730. + XX_Free(compat_param);
  99731. + XX_Free(param);
  99732. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99733. + }
  99734. +
  99735. + compat_copy_fm_pcd_cc_node_modify_next_engine(compat_param, param, COMPAT_US_TO_K);
  99736. +
  99737. + XX_Free(compat_param);
  99738. + }
  99739. + else
  99740. +#endif
  99741. + {
  99742. + if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_next_engine_params_t *) arg,
  99743. + sizeof(ioc_fm_pcd_cc_node_modify_next_engine_params_t)))
  99744. + {
  99745. + XX_Free(param);
  99746. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99747. + }
  99748. + }
  99749. +
  99750. + err = FM_PCD_MatchTableModifyMissNextEngine(param->id,
  99751. + (t_FmPcdCcNextEngineParams*)(&param->cc_next_engine_params));
  99752. +
  99753. + XX_Free(param);
  99754. + break;
  99755. + }
  99756. +
  99757. +#if defined(CONFIG_COMPAT)
  99758. + case FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY_COMPAT:
  99759. +#endif
  99760. + case FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY:
  99761. + {
  99762. + ioc_fm_pcd_cc_node_remove_key_params_t *param;
  99763. +
  99764. + param = (ioc_fm_pcd_cc_node_remove_key_params_t *) XX_Malloc(
  99765. + sizeof(ioc_fm_pcd_cc_node_remove_key_params_t));
  99766. + if (!param)
  99767. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99768. +
  99769. + memset(param, 0, sizeof(ioc_fm_pcd_cc_node_remove_key_params_t));
  99770. +
  99771. +#if defined(CONFIG_COMPAT)
  99772. + if (compat)
  99773. + {
  99774. + ioc_compat_fm_pcd_cc_node_remove_key_params_t *compat_param;
  99775. +
  99776. + compat_param = (ioc_compat_fm_pcd_cc_node_remove_key_params_t *) XX_Malloc(
  99777. + sizeof(ioc_compat_fm_pcd_cc_node_remove_key_params_t));
  99778. + if (!compat_param)
  99779. + {
  99780. + XX_Free(param);
  99781. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99782. + }
  99783. +
  99784. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_remove_key_params_t));
  99785. + if (copy_from_user(compat_param,
  99786. + (ioc_compat_fm_pcd_cc_node_remove_key_params_t *)compat_ptr(arg),
  99787. + sizeof(ioc_compat_fm_pcd_cc_node_remove_key_params_t)))
  99788. + {
  99789. + XX_Free(compat_param);
  99790. + XX_Free(param);
  99791. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99792. + }
  99793. +
  99794. + param->id = compat_ptr(compat_param->id);
  99795. + param->key_indx = compat_param->key_indx;
  99796. +
  99797. + XX_Free(compat_param);
  99798. + }
  99799. + else
  99800. +#endif
  99801. + {
  99802. + if (copy_from_user(param, (ioc_fm_pcd_cc_node_remove_key_params_t *) arg,
  99803. + sizeof(ioc_fm_pcd_cc_node_remove_key_params_t)))
  99804. + {
  99805. + XX_Free(param);
  99806. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99807. + }
  99808. + }
  99809. +
  99810. + err = FM_PCD_MatchTableRemoveKey(param->id, param->key_indx);
  99811. +
  99812. + XX_Free(param);
  99813. + break;
  99814. + }
  99815. +#if defined(CONFIG_COMPAT)
  99816. + case FM_PCD_IOC_MATCH_TABLE_ADD_KEY_COMPAT:
  99817. +#endif
  99818. + case FM_PCD_IOC_MATCH_TABLE_ADD_KEY:
  99819. + {
  99820. + ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *param;
  99821. +
  99822. + param = (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
  99823. + sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99824. + if (!param)
  99825. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99826. +
  99827. + memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99828. +
  99829. +#if defined(CONFIG_COMPAT)
  99830. + if (compat)
  99831. + {
  99832. + ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *compat_param;
  99833. +
  99834. + compat_param = (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
  99835. + sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99836. + if (!compat_param)
  99837. + {
  99838. + XX_Free(param);
  99839. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99840. + }
  99841. +
  99842. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99843. + if (copy_from_user(compat_param,
  99844. + (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)compat_ptr(arg),
  99845. + sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
  99846. + {
  99847. + XX_Free(compat_param);
  99848. + XX_Free(param);
  99849. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99850. + }
  99851. +
  99852. + compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(compat_param, param, COMPAT_US_TO_K);
  99853. +
  99854. + XX_Free(compat_param);
  99855. + }
  99856. + else
  99857. +#endif
  99858. + {
  99859. + if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)arg,
  99860. + sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
  99861. + {
  99862. + XX_Free(param);
  99863. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99864. + }
  99865. + }
  99866. +
  99867. + if (param->key_size)
  99868. + {
  99869. + int size = 0;
  99870. +
  99871. + if (param->key_params.p_key) size += param->key_size;
  99872. + if (param->key_params.p_mask) size += param->key_size;
  99873. +
  99874. + if (size)
  99875. + {
  99876. + uint8_t *p_tmp;
  99877. +
  99878. + p_tmp = (uint8_t*) XX_Malloc(size);
  99879. + if (!p_tmp)
  99880. + {
  99881. + XX_Free(param);
  99882. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD key/mask"));
  99883. + }
  99884. +
  99885. + if (param->key_params.p_key)
  99886. + {
  99887. + if (copy_from_user(p_tmp, param->key_params.p_key, param->key_size))
  99888. + {
  99889. + XX_Free(p_tmp);
  99890. + XX_Free(param);
  99891. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99892. + }
  99893. +
  99894. + param->key_params.p_key = p_tmp;
  99895. + }
  99896. +
  99897. + if (param->key_params.p_mask)
  99898. + {
  99899. + p_tmp += param->key_size;
  99900. + if (copy_from_user(p_tmp, param->key_params.p_mask, param->key_size))
  99901. + {
  99902. + XX_Free(p_tmp - param->key_size);
  99903. + XX_Free(param);
  99904. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99905. + }
  99906. +
  99907. + param->key_params.p_mask = p_tmp;
  99908. + }
  99909. + }
  99910. + }
  99911. +
  99912. + err = FM_PCD_MatchTableAddKey(
  99913. + param->id,
  99914. + param->key_indx,
  99915. + param->key_size,
  99916. + (t_FmPcdCcKeyParams*)&param->key_params);
  99917. +
  99918. + if (param->key_params.p_key)
  99919. + XX_Free(param->key_params.p_key);
  99920. + XX_Free(param);
  99921. + break;
  99922. + }
  99923. +
  99924. +#if defined(CONFIG_COMPAT)
  99925. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT:
  99926. +#endif
  99927. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE:
  99928. + {
  99929. + ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *param;
  99930. +
  99931. + param = (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
  99932. + sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99933. + if (!param)
  99934. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99935. +
  99936. + memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99937. +
  99938. +#if defined(CONFIG_COMPAT)
  99939. + if (compat)
  99940. + {
  99941. + ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *compat_param;
  99942. +
  99943. + compat_param = (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *) XX_Malloc(
  99944. + sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99945. + if (!compat_param)
  99946. + {
  99947. + XX_Free(param);
  99948. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  99949. + }
  99950. +
  99951. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t));
  99952. + if (copy_from_user(compat_param,
  99953. + (ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)compat_ptr(arg),
  99954. + sizeof(ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
  99955. + {
  99956. + XX_Free(compat_param);
  99957. + XX_Free(param);
  99958. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99959. + }
  99960. +
  99961. + compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(compat_param, param, COMPAT_US_TO_K);
  99962. +
  99963. + XX_Free(compat_param);
  99964. + }
  99965. + else
  99966. +#endif
  99967. + {
  99968. + if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *)arg,
  99969. + sizeof(ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)))
  99970. + {
  99971. + XX_Free(param);
  99972. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  99973. + }
  99974. + }
  99975. +
  99976. + err = FM_PCD_MatchTableModifyKeyAndNextEngine(param->id,
  99977. + param->key_indx,
  99978. + param->key_size,
  99979. + (t_FmPcdCcKeyParams*)(&param->key_params));
  99980. +
  99981. + XX_Free(param);
  99982. + break;
  99983. + }
  99984. +
  99985. +
  99986. +#if defined(CONFIG_COMPAT)
  99987. + case FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT_COMPAT:
  99988. +#endif
  99989. + case FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT:
  99990. + {
  99991. + ioc_fm_pcd_cc_tbl_get_stats_t param;
  99992. +
  99993. +#if defined(CONFIG_COMPAT)
  99994. + if (compat)
  99995. + {
  99996. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
  99997. +
  99998. + compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t *) XX_Malloc(
  99999. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100000. + if (!compat_param)
  100001. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100002. +
  100003. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100004. + if (copy_from_user(compat_param,
  100005. + (ioc_compat_fm_pcd_cc_tbl_get_stats_t *)compat_ptr(arg),
  100006. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t)))
  100007. + {
  100008. + XX_Free(compat_param);
  100009. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100010. + }
  100011. +
  100012. + compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_US_TO_K);
  100013. +
  100014. + XX_Free(compat_param);
  100015. + }
  100016. + else
  100017. +#endif
  100018. + {
  100019. + if (copy_from_user(&param, (ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
  100020. + sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
  100021. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100022. + }
  100023. +
  100024. +
  100025. + err = FM_PCD_MatchTableGetKeyStatistics((t_Handle) param.id,
  100026. + param.key_index,
  100027. + (t_FmPcdCcKeyStatistics *) &param.statistics);
  100028. +
  100029. +#if defined(CONFIG_COMPAT)
  100030. + if (compat)
  100031. + {
  100032. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
  100033. +
  100034. + compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t*) XX_Malloc(
  100035. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100036. + if (!compat_param)
  100037. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100038. +
  100039. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100040. + compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_K_TO_US);
  100041. + if (copy_to_user((ioc_compat_fm_pcd_cc_tbl_get_stats_t*) compat_ptr(arg),
  100042. + compat_param,
  100043. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t))){
  100044. + XX_Free(compat_param);
  100045. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100046. + }
  100047. + XX_Free(compat_param);
  100048. + }
  100049. + else
  100050. +#endif
  100051. + {
  100052. + if (copy_to_user((ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
  100053. + &param,
  100054. + sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
  100055. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100056. + }
  100057. +
  100058. + break;
  100059. + }
  100060. +
  100061. +
  100062. +#if defined(CONFIG_COMPAT)
  100063. + case FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT_COMPAT:
  100064. +#endif
  100065. + case FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT:
  100066. + {
  100067. + ioc_fm_pcd_cc_tbl_get_stats_t param;
  100068. +
  100069. +#if defined(CONFIG_COMPAT)
  100070. + if (compat)
  100071. + {
  100072. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
  100073. +
  100074. + compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t *) XX_Malloc(
  100075. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100076. + if (!compat_param)
  100077. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100078. +
  100079. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100080. + if (copy_from_user(compat_param,
  100081. + (ioc_compat_fm_pcd_cc_tbl_get_stats_t *)compat_ptr(arg),
  100082. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t)))
  100083. + {
  100084. + XX_Free(compat_param);
  100085. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100086. + }
  100087. +
  100088. + compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_US_TO_K);
  100089. +
  100090. + XX_Free(compat_param);
  100091. + }
  100092. + else
  100093. +#endif
  100094. + {
  100095. + if (copy_from_user(&param, (ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
  100096. + sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
  100097. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100098. + }
  100099. +
  100100. +
  100101. + err = FM_PCD_MatchTableGetMissStatistics((t_Handle) param.id,
  100102. + (t_FmPcdCcKeyStatistics *) &param.statistics);
  100103. +
  100104. +#if defined(CONFIG_COMPAT)
  100105. + if (compat)
  100106. + {
  100107. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
  100108. +
  100109. + compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t*) XX_Malloc(
  100110. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100111. + if (!compat_param)
  100112. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100113. +
  100114. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100115. + compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_K_TO_US);
  100116. + if (copy_to_user((ioc_compat_fm_pcd_cc_tbl_get_stats_t*) compat_ptr(arg),
  100117. + compat_param,
  100118. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t))){
  100119. + XX_Free(compat_param);
  100120. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100121. + }
  100122. + XX_Free(compat_param);
  100123. + }
  100124. + else
  100125. +#endif
  100126. + {
  100127. + if (copy_to_user((ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
  100128. + &param,
  100129. + sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
  100130. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100131. + }
  100132. +
  100133. + break;
  100134. + }
  100135. +
  100136. +
  100137. +#if defined(CONFIG_COMPAT)
  100138. + case FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT_COMPAT:
  100139. +#endif
  100140. + case FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT:
  100141. + {
  100142. + ioc_fm_pcd_cc_tbl_get_stats_t param;
  100143. +
  100144. +#if defined(CONFIG_COMPAT)
  100145. + if (compat)
  100146. + {
  100147. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
  100148. +
  100149. + compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t *) XX_Malloc(
  100150. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100151. + if (!compat_param)
  100152. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100153. +
  100154. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100155. + if (copy_from_user(compat_param,
  100156. + (ioc_compat_fm_pcd_cc_tbl_get_stats_t *)compat_ptr(arg),
  100157. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t)))
  100158. + {
  100159. + XX_Free(compat_param);
  100160. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100161. + }
  100162. +
  100163. + compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_US_TO_K);
  100164. +
  100165. + XX_Free(compat_param);
  100166. + }
  100167. + else
  100168. +#endif
  100169. + {
  100170. + if (copy_from_user(&param, (ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
  100171. + sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
  100172. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100173. + }
  100174. +
  100175. +
  100176. + err = FM_PCD_HashTableGetMissStatistics((t_Handle) param.id,
  100177. + (t_FmPcdCcKeyStatistics *) &param.statistics);
  100178. +
  100179. +#if defined(CONFIG_COMPAT)
  100180. + if (compat)
  100181. + {
  100182. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param;
  100183. +
  100184. + compat_param = (ioc_compat_fm_pcd_cc_tbl_get_stats_t*) XX_Malloc(
  100185. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100186. + if (!compat_param)
  100187. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100188. +
  100189. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t));
  100190. + compat_copy_fm_pcd_cc_tbl_get_stats(compat_param, &param, COMPAT_K_TO_US);
  100191. + if (copy_to_user((ioc_compat_fm_pcd_cc_tbl_get_stats_t*) compat_ptr(arg),
  100192. + compat_param,
  100193. + sizeof(ioc_compat_fm_pcd_cc_tbl_get_stats_t))){
  100194. + XX_Free(compat_param);
  100195. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100196. + }
  100197. + XX_Free(compat_param);
  100198. + }
  100199. + else
  100200. +#endif
  100201. + {
  100202. + if (copy_to_user((ioc_fm_pcd_cc_tbl_get_stats_t *)arg,
  100203. + &param,
  100204. + sizeof(ioc_fm_pcd_cc_tbl_get_stats_t)))
  100205. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100206. + }
  100207. +
  100208. + break;
  100209. + }
  100210. +
  100211. +#if defined(CONFIG_COMPAT)
  100212. + case FM_PCD_IOC_HASH_TABLE_SET_COMPAT:
  100213. +#endif
  100214. + case FM_PCD_IOC_HASH_TABLE_SET:
  100215. + {
  100216. + ioc_fm_pcd_hash_table_params_t *param;
  100217. +
  100218. + param = (ioc_fm_pcd_hash_table_params_t*) XX_Malloc(
  100219. + sizeof(ioc_fm_pcd_hash_table_params_t));
  100220. + if (!param)
  100221. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100222. +
  100223. + memset(param, 0, sizeof(ioc_fm_pcd_hash_table_params_t));
  100224. +
  100225. +#if defined(CONFIG_COMPAT)
  100226. + if (compat)
  100227. + {
  100228. + ioc_compat_fm_pcd_hash_table_params_t *compat_param;
  100229. +
  100230. + compat_param = (ioc_compat_fm_pcd_hash_table_params_t*) XX_Malloc(
  100231. + sizeof(ioc_compat_fm_pcd_hash_table_params_t));
  100232. + if (!compat_param)
  100233. + {
  100234. + XX_Free(param);
  100235. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100236. + }
  100237. +
  100238. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_params_t));
  100239. + if (copy_from_user(compat_param,
  100240. + (ioc_compat_fm_pcd_hash_table_params_t*)compat_ptr(arg),
  100241. + sizeof(ioc_compat_fm_pcd_hash_table_params_t)))
  100242. + {
  100243. + XX_Free(compat_param);
  100244. + XX_Free(param);
  100245. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100246. + }
  100247. +
  100248. + compat_copy_fm_pcd_hash_table(compat_param, param, COMPAT_US_TO_K);
  100249. +
  100250. + XX_Free(compat_param);
  100251. + }
  100252. + else
  100253. +#endif
  100254. + {
  100255. + if (copy_from_user(param, (ioc_fm_pcd_hash_table_params_t *)arg,
  100256. + sizeof(ioc_fm_pcd_hash_table_params_t)))
  100257. + {
  100258. + XX_Free(param);
  100259. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100260. + }
  100261. + }
  100262. +
  100263. + param->id = FM_PCD_HashTableSet(p_LnxWrpFmDev->h_PcdDev, (t_FmPcdHashTableParams *) param);
  100264. +
  100265. + if (!param->id)
  100266. + {
  100267. + XX_Free(param);
  100268. + err = E_INVALID_VALUE;
  100269. + /* Since the LLD has no errno-style error reporting,
  100270. + we're left here with no other option than to report
  100271. + a generic E_INVALID_VALUE */
  100272. + break;
  100273. + }
  100274. +
  100275. +#if defined(CONFIG_COMPAT)
  100276. + if (compat)
  100277. + {
  100278. + ioc_compat_fm_pcd_hash_table_params_t *compat_param;
  100279. +
  100280. + compat_param = (ioc_compat_fm_pcd_hash_table_params_t*) XX_Malloc(
  100281. + sizeof(ioc_compat_fm_pcd_hash_table_params_t));
  100282. + if (!compat_param)
  100283. + {
  100284. + XX_Free(param);
  100285. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100286. + }
  100287. +
  100288. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_params_t));
  100289. + compat_copy_fm_pcd_hash_table(compat_param, param, COMPAT_K_TO_US);
  100290. + if (copy_to_user((ioc_compat_fm_pcd_hash_table_params_t*) compat_ptr(arg),
  100291. + compat_param,
  100292. + sizeof(ioc_compat_fm_pcd_hash_table_params_t)))
  100293. + err = E_READ_FAILED;
  100294. +
  100295. + XX_Free(compat_param);
  100296. + }
  100297. + else
  100298. +#endif
  100299. + {
  100300. + if (copy_to_user((ioc_fm_pcd_hash_table_params_t *)arg,
  100301. + param,
  100302. + sizeof(ioc_fm_pcd_hash_table_params_t)))
  100303. + err = E_READ_FAILED;
  100304. + }
  100305. +
  100306. + XX_Free(param);
  100307. + break;
  100308. + }
  100309. +
  100310. +#if defined(CONFIG_COMPAT)
  100311. + case FM_PCD_IOC_HASH_TABLE_DELETE_COMPAT:
  100312. +#endif
  100313. + case FM_PCD_IOC_HASH_TABLE_DELETE:
  100314. + {
  100315. + ioc_fm_obj_t id;
  100316. +
  100317. + memset(&id, 0, sizeof(ioc_fm_obj_t));
  100318. +
  100319. +#if defined(CONFIG_COMPAT)
  100320. + if (compat)
  100321. + {
  100322. + ioc_compat_fm_obj_t compat_id;
  100323. +
  100324. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  100325. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100326. +
  100327. + id.obj = compat_pcd_id2ptr(compat_id.obj);
  100328. + }
  100329. + else
  100330. +#endif
  100331. + {
  100332. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  100333. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100334. + }
  100335. +
  100336. + err = FM_PCD_HashTableDelete(id.obj);
  100337. + break;
  100338. + }
  100339. +
  100340. +#if defined(CONFIG_COMPAT)
  100341. + case FM_PCD_IOC_HASH_TABLE_ADD_KEY_COMPAT:
  100342. +#endif
  100343. + case FM_PCD_IOC_HASH_TABLE_ADD_KEY:
  100344. + {
  100345. + ioc_fm_pcd_hash_table_add_key_params_t *param = NULL;
  100346. +
  100347. + param = (ioc_fm_pcd_hash_table_add_key_params_t*) XX_Malloc(
  100348. + sizeof(ioc_fm_pcd_hash_table_add_key_params_t));
  100349. + if (!param)
  100350. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100351. +
  100352. + memset(param, 0, sizeof(ioc_fm_pcd_hash_table_add_key_params_t));
  100353. +
  100354. +#if defined(CONFIG_COMPAT)
  100355. + if (compat)
  100356. + {
  100357. + ioc_compat_fm_pcd_hash_table_add_key_params_t *compat_param;
  100358. +
  100359. + compat_param = (ioc_compat_fm_pcd_hash_table_add_key_params_t*) XX_Malloc(
  100360. + sizeof(ioc_compat_fm_pcd_hash_table_add_key_params_t));
  100361. + if (!compat_param)
  100362. + {
  100363. + XX_Free(param);
  100364. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100365. + }
  100366. +
  100367. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_add_key_params_t));
  100368. + if (copy_from_user(compat_param,
  100369. + (ioc_compat_fm_pcd_hash_table_add_key_params_t*) compat_ptr(arg),
  100370. + sizeof(ioc_compat_fm_pcd_hash_table_add_key_params_t)))
  100371. + {
  100372. + XX_Free(compat_param);
  100373. + XX_Free(param);
  100374. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100375. + }
  100376. +
  100377. + if (compat_param->key_size)
  100378. + {
  100379. + param->p_hash_tbl = compat_pcd_id2ptr(compat_param->p_hash_tbl);
  100380. + param->key_size = compat_param->key_size;
  100381. +
  100382. + compat_copy_fm_pcd_cc_key(&compat_param->key_params, &param->key_params, COMPAT_US_TO_K);
  100383. + }
  100384. + else
  100385. + {
  100386. + XX_Free(compat_param);
  100387. + XX_Free(param);
  100388. + err = E_INVALID_VALUE;
  100389. + break;
  100390. + }
  100391. +
  100392. + XX_Free(compat_param);
  100393. + }
  100394. + else
  100395. +#endif
  100396. + {
  100397. + if (copy_from_user(param, (ioc_fm_pcd_hash_table_add_key_params_t*) arg,
  100398. + sizeof(ioc_fm_pcd_hash_table_add_key_params_t)))
  100399. + {
  100400. + XX_Free(param);
  100401. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100402. + }
  100403. + }
  100404. +
  100405. + if (param->key_size)
  100406. + {
  100407. + int size = 0;
  100408. +
  100409. + if (param->key_params.p_key) size += param->key_size;
  100410. + if (param->key_params.p_mask) size += param->key_size;
  100411. +
  100412. + if (size)
  100413. + {
  100414. + uint8_t *p_tmp;
  100415. +
  100416. + p_tmp = (uint8_t*) XX_Malloc(size);
  100417. + if (!p_tmp)
  100418. + {
  100419. + XX_Free(param);
  100420. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD key/mask"));
  100421. + }
  100422. +
  100423. + if (param->key_params.p_key)
  100424. + {
  100425. + if (copy_from_user(p_tmp, param->key_params.p_key, param->key_size))
  100426. + {
  100427. + XX_Free(p_tmp);
  100428. + XX_Free(param);
  100429. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100430. + }
  100431. +
  100432. + param->key_params.p_key = p_tmp;
  100433. + }
  100434. +
  100435. + if (param->key_params.p_mask)
  100436. + {
  100437. + p_tmp += param->key_size;
  100438. + if (copy_from_user(p_tmp, param->key_params.p_mask, param->key_size))
  100439. + {
  100440. + XX_Free(p_tmp - param->key_size);
  100441. + XX_Free(param);
  100442. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100443. + }
  100444. +
  100445. + param->key_params.p_mask = p_tmp;
  100446. + }
  100447. + }
  100448. + }
  100449. +
  100450. + err = FM_PCD_HashTableAddKey(
  100451. + param->p_hash_tbl,
  100452. + param->key_size,
  100453. + (t_FmPcdCcKeyParams*)&param->key_params);
  100454. +
  100455. + if (param->key_params.p_key)
  100456. + XX_Free(param->key_params.p_key);
  100457. + XX_Free(param);
  100458. + break;
  100459. + }
  100460. +
  100461. +#if defined(CONFIG_COMPAT)
  100462. + case FM_PCD_IOC_HASH_TABLE_REMOVE_KEY_COMPAT:
  100463. +#endif
  100464. + case FM_PCD_IOC_HASH_TABLE_REMOVE_KEY:
  100465. + {
  100466. + ioc_fm_pcd_hash_table_remove_key_params_t *param = NULL;
  100467. +
  100468. + param = (ioc_fm_pcd_hash_table_remove_key_params_t*) XX_Malloc(
  100469. + sizeof(ioc_fm_pcd_hash_table_remove_key_params_t));
  100470. + if (!param)
  100471. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100472. +
  100473. + memset(param, 0, sizeof(ioc_fm_pcd_hash_table_remove_key_params_t));
  100474. +
  100475. +#if defined(CONFIG_COMPAT)
  100476. + if (compat)
  100477. + {
  100478. + ioc_compat_fm_pcd_hash_table_remove_key_params_t *compat_param;
  100479. +
  100480. + compat_param = (ioc_compat_fm_pcd_hash_table_remove_key_params_t*) XX_Malloc(
  100481. + sizeof(ioc_compat_fm_pcd_hash_table_remove_key_params_t));
  100482. + if (!compat_param)
  100483. + {
  100484. + XX_Free(param);
  100485. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100486. + }
  100487. +
  100488. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_hash_table_remove_key_params_t));
  100489. + if (copy_from_user(compat_param,
  100490. + (ioc_compat_fm_pcd_hash_table_remove_key_params_t*) compat_ptr(arg),
  100491. + sizeof(ioc_compat_fm_pcd_hash_table_remove_key_params_t)))
  100492. + {
  100493. + XX_Free(compat_param);
  100494. + XX_Free(param);
  100495. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100496. + }
  100497. +
  100498. + param->p_hash_tbl = compat_pcd_id2ptr(compat_param->p_hash_tbl);
  100499. + param->key_size = compat_param->key_size;
  100500. +
  100501. + XX_Free(compat_param);
  100502. + }
  100503. + else
  100504. +#endif
  100505. + {
  100506. + if (copy_from_user(param, (ioc_fm_pcd_hash_table_remove_key_params_t*)arg,
  100507. + sizeof(ioc_fm_pcd_hash_table_remove_key_params_t)))
  100508. + {
  100509. + XX_Free(param);
  100510. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100511. + }
  100512. + }
  100513. +
  100514. + if (param->key_size)
  100515. + {
  100516. + uint8_t *p_key;
  100517. +
  100518. + p_key = (uint8_t*) XX_Malloc(param->key_size);
  100519. + if (!p_key)
  100520. + {
  100521. + XX_Free(param);
  100522. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100523. + }
  100524. +
  100525. + if (param->p_key && copy_from_user(p_key, param->p_key, param->key_size))
  100526. + {
  100527. + XX_Free(p_key);
  100528. + XX_Free(param);
  100529. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100530. + }
  100531. + param->p_key = p_key;
  100532. + }
  100533. +
  100534. + err = FM_PCD_HashTableRemoveKey(
  100535. + param->p_hash_tbl,
  100536. + param->key_size,
  100537. + param->p_key);
  100538. +
  100539. + if (param->p_key)
  100540. + XX_Free(param->p_key);
  100541. + XX_Free(param);
  100542. + break;
  100543. + }
  100544. +
  100545. +#if defined(CONFIG_COMPAT)
  100546. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_COMPAT:
  100547. +#endif
  100548. + case FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY:
  100549. + {
  100550. + ioc_fm_pcd_cc_node_modify_key_params_t *param;
  100551. +
  100552. + param = (ioc_fm_pcd_cc_node_modify_key_params_t *) XX_Malloc(
  100553. + sizeof(ioc_fm_pcd_cc_node_modify_key_params_t));
  100554. + if (!param)
  100555. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100556. +
  100557. + memset(param, 0, sizeof(ioc_fm_pcd_cc_node_modify_key_params_t));
  100558. +
  100559. +#if defined(CONFIG_COMPAT)
  100560. + if (compat)
  100561. + {
  100562. + ioc_compat_fm_pcd_cc_node_modify_key_params_t *compat_param;
  100563. +
  100564. + compat_param = (ioc_compat_fm_pcd_cc_node_modify_key_params_t *) XX_Malloc(
  100565. + sizeof(ioc_compat_fm_pcd_cc_node_modify_key_params_t));
  100566. + if (!compat_param)
  100567. + {
  100568. + XX_Free(param);
  100569. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100570. + }
  100571. +
  100572. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_cc_node_modify_key_params_t));
  100573. + if (copy_from_user(compat_param, (ioc_compat_fm_pcd_cc_node_modify_key_params_t *)compat_ptr(arg),
  100574. + sizeof(ioc_compat_fm_pcd_cc_node_modify_key_params_t)))
  100575. + {
  100576. + XX_Free(compat_param);
  100577. + XX_Free(param);
  100578. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100579. + }
  100580. +
  100581. + compat_copy_fm_pcd_cc_node_modify_key(compat_param, param, COMPAT_US_TO_K);
  100582. +
  100583. + XX_Free(compat_param);
  100584. + }
  100585. + else
  100586. +#endif
  100587. + {
  100588. + if (copy_from_user(param, (ioc_fm_pcd_cc_node_modify_key_params_t *)arg,
  100589. + sizeof(ioc_fm_pcd_cc_node_modify_key_params_t)))
  100590. + {
  100591. + XX_Free(param);
  100592. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100593. + }
  100594. + }
  100595. +
  100596. + if (param->key_size)
  100597. + {
  100598. + int size = 0;
  100599. +
  100600. + if (param->p_key) size += param->key_size;
  100601. + if (param->p_mask) size += param->key_size;
  100602. +
  100603. + if (size)
  100604. + {
  100605. + uint8_t *p_tmp;
  100606. +
  100607. + p_tmp = (uint8_t*) XX_Malloc(size);
  100608. + if (!p_tmp)
  100609. + {
  100610. + XX_Free(param);
  100611. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD key/mask"));
  100612. + }
  100613. +
  100614. + if (param->p_key)
  100615. + {
  100616. + if (copy_from_user(p_tmp, param->p_key, param->key_size))
  100617. + {
  100618. + XX_Free(p_tmp);
  100619. + XX_Free(param);
  100620. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100621. + }
  100622. +
  100623. + param->p_key = p_tmp;
  100624. + }
  100625. +
  100626. + if (param->p_mask)
  100627. + {
  100628. + p_tmp += param->key_size;
  100629. + if (copy_from_user(p_tmp, param->p_mask, param->key_size))
  100630. + {
  100631. + XX_Free(p_tmp - param->key_size);
  100632. + XX_Free(param);
  100633. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100634. + }
  100635. +
  100636. + param->p_mask = p_tmp;
  100637. + }
  100638. + }
  100639. + }
  100640. +
  100641. + err = FM_PCD_MatchTableModifyKey(param->id,
  100642. + param->key_indx,
  100643. + param->key_size,
  100644. + param->p_key,
  100645. + param->p_mask);
  100646. +
  100647. + if (param->p_key)
  100648. + XX_Free(param->p_key);
  100649. + else if (param->p_mask)
  100650. + XX_Free(param->p_mask);
  100651. + XX_Free(param);
  100652. + break;
  100653. + }
  100654. +
  100655. +#if defined(CONFIG_COMPAT)
  100656. + case FM_PCD_IOC_MANIP_NODE_SET_COMPAT:
  100657. +#endif
  100658. + case FM_PCD_IOC_MANIP_NODE_SET:
  100659. + {
  100660. + ioc_fm_pcd_manip_params_t *param;
  100661. + uint8_t *p_data = NULL;
  100662. + uint8_t size;
  100663. +
  100664. + param = (ioc_fm_pcd_manip_params_t *) XX_Malloc(
  100665. + sizeof(ioc_fm_pcd_manip_params_t));
  100666. +
  100667. + if (!param)
  100668. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100669. +
  100670. + memset(param, 0, sizeof(ioc_fm_pcd_manip_params_t));
  100671. +
  100672. +#if defined(CONFIG_COMPAT)
  100673. + if (compat)
  100674. + {
  100675. + ioc_compat_fm_pcd_manip_params_t *compat_param;
  100676. +
  100677. + compat_param = (ioc_compat_fm_pcd_manip_params_t *) XX_Malloc(
  100678. + sizeof(ioc_compat_fm_pcd_manip_params_t));
  100679. + if (!compat_param)
  100680. + {
  100681. + XX_Free(param);
  100682. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100683. + }
  100684. +
  100685. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_params_t));
  100686. + if (copy_from_user(compat_param,
  100687. + (ioc_compat_fm_pcd_manip_params_t *) compat_ptr(arg),
  100688. + sizeof(ioc_compat_fm_pcd_manip_params_t)))
  100689. + {
  100690. + XX_Free(compat_param);
  100691. + XX_Free(param);
  100692. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100693. + }
  100694. +
  100695. + compat_fm_pcd_manip_set_node(compat_param, param, COMPAT_US_TO_K);
  100696. +
  100697. + XX_Free(compat_param);
  100698. + }
  100699. + else
  100700. +#endif
  100701. + {
  100702. + if (copy_from_user(param, (ioc_fm_pcd_manip_params_t *)arg,
  100703. + sizeof(ioc_fm_pcd_manip_params_t)))
  100704. + {
  100705. + XX_Free(param);
  100706. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100707. + }
  100708. + }
  100709. +
  100710. + if (param->type == e_IOC_FM_PCD_MANIP_HDR)
  100711. + {
  100712. + size = param->u.hdr.insrt_params.u.generic.size;
  100713. + p_data = (uint8_t *) XX_Malloc(size);
  100714. + if (!p_data )
  100715. + {
  100716. + XX_Free(param);
  100717. + RETURN_ERROR(MINOR, E_NO_MEMORY, NO_MSG);
  100718. + }
  100719. +
  100720. + if (param->u.hdr.insrt_params.u.generic.p_data &&
  100721. + copy_from_user(p_data,
  100722. + param->u.hdr.insrt_params.u.generic.p_data, size))
  100723. + {
  100724. + XX_Free(p_data);
  100725. + XX_Free(param);
  100726. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100727. + }
  100728. +
  100729. + param->u.hdr.insrt_params.u.generic.p_data = p_data;
  100730. + }
  100731. +
  100732. + if (param->id)
  100733. + {
  100734. + /* Security Hole: the user can pass any piece of garbage
  100735. + in 'param->id', and that will go straight through to the LLD,
  100736. + no checks being done by the wrapper! */
  100737. + err = FM_PCD_ManipNodeReplace(
  100738. + (t_Handle) param->id,
  100739. + (t_FmPcdManipParams*) param);
  100740. + if (err)
  100741. + {
  100742. + if (p_data)
  100743. + XX_Free(p_data);
  100744. + XX_Free(param);
  100745. + break;
  100746. + }
  100747. + }
  100748. + else
  100749. + {
  100750. + param->id = FM_PCD_ManipNodeSet(
  100751. + p_LnxWrpFmDev->h_PcdDev,
  100752. + (t_FmPcdManipParams*) param);
  100753. + if (!param->id)
  100754. + {
  100755. + if (p_data)
  100756. + XX_Free(p_data);
  100757. + XX_Free(param);
  100758. + err = E_INVALID_VALUE;
  100759. + /* Since the LLD has no errno-style error reporting,
  100760. + we're left here with no other option than to report
  100761. + a generic E_INVALID_VALUE */
  100762. + break;
  100763. + }
  100764. + }
  100765. +
  100766. +#if defined(CONFIG_COMPAT)
  100767. + if (compat)
  100768. + {
  100769. + ioc_compat_fm_pcd_manip_params_t *compat_param;
  100770. +
  100771. + compat_param = (ioc_compat_fm_pcd_manip_params_t *) XX_Malloc(
  100772. + sizeof(ioc_compat_fm_pcd_manip_params_t));
  100773. + if (!compat_param)
  100774. + {
  100775. + if (p_data)
  100776. + XX_Free(p_data);
  100777. + XX_Free(param);
  100778. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100779. + }
  100780. +
  100781. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_params_t));
  100782. +
  100783. + compat_fm_pcd_manip_set_node(compat_param, param, COMPAT_K_TO_US);
  100784. +
  100785. + if (copy_to_user((ioc_compat_fm_pcd_manip_params_t *) compat_ptr(arg),
  100786. + compat_param,
  100787. + sizeof(ioc_compat_fm_pcd_manip_params_t)))
  100788. + err = E_READ_FAILED;
  100789. +
  100790. + XX_Free(compat_param);
  100791. + }
  100792. + else
  100793. +#endif
  100794. + {
  100795. + if (copy_to_user((ioc_fm_pcd_manip_params_t *)arg,
  100796. + param, sizeof(ioc_fm_pcd_manip_params_t)))
  100797. + err = E_READ_FAILED;
  100798. + }
  100799. +
  100800. + if (p_data)
  100801. + XX_Free(p_data);
  100802. + XX_Free(param);
  100803. + break;
  100804. + }
  100805. +
  100806. +#if defined(CONFIG_COMPAT)
  100807. + case FM_PCD_IOC_MANIP_NODE_DELETE_COMPAT:
  100808. +#endif
  100809. + case FM_PCD_IOC_MANIP_NODE_DELETE:
  100810. + {
  100811. + ioc_fm_obj_t id;
  100812. +
  100813. + memset(&id, 0, sizeof(ioc_fm_obj_t));
  100814. +#if defined(CONFIG_COMPAT)
  100815. + if (compat)
  100816. + {
  100817. + ioc_compat_fm_obj_t compat_id;
  100818. +
  100819. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  100820. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100821. +
  100822. + compat_obj_delete(&compat_id, &id);
  100823. + }
  100824. + else
  100825. +#endif
  100826. + {
  100827. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  100828. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100829. + }
  100830. +
  100831. + err = FM_PCD_ManipNodeDelete(id.obj);
  100832. + break;
  100833. + }
  100834. +
  100835. +#if defined(CONFIG_COMPAT)
  100836. + case FM_PCD_IOC_MANIP_GET_STATS_COMPAT:
  100837. +#endif
  100838. + case FM_PCD_IOC_MANIP_GET_STATS:
  100839. + {
  100840. + ioc_fm_pcd_manip_get_stats_t param;
  100841. +
  100842. +#if defined(CONFIG_COMPAT)
  100843. + if (compat)
  100844. + {
  100845. + ioc_compat_fm_pcd_manip_get_stats_t *compat_param;
  100846. +
  100847. + compat_param = (ioc_compat_fm_pcd_manip_get_stats_t *) XX_Malloc(
  100848. + sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
  100849. + if (!compat_param)
  100850. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100851. +
  100852. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
  100853. + if (copy_from_user(compat_param,
  100854. + (ioc_compat_fm_pcd_manip_get_stats_t *)compat_ptr(arg),
  100855. + sizeof(ioc_compat_fm_pcd_manip_get_stats_t)))
  100856. + {
  100857. + XX_Free(compat_param);
  100858. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100859. + }
  100860. +
  100861. + compat_copy_fm_pcd_manip_get_stats(compat_param, &param, COMPAT_US_TO_K);
  100862. +
  100863. + XX_Free(compat_param);
  100864. + }
  100865. + else
  100866. +#endif
  100867. + {
  100868. + if (copy_from_user(&param, (ioc_fm_pcd_manip_get_stats_t *)arg,
  100869. + sizeof(ioc_fm_pcd_manip_get_stats_t)))
  100870. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  100871. + }
  100872. +
  100873. + err = FM_PCD_ManipGetStatistics((t_Handle) param.id,
  100874. + (t_FmPcdManipStats*) &param.stats);
  100875. +
  100876. +#if defined(CONFIG_COMPAT)
  100877. + if (compat)
  100878. + {
  100879. + ioc_compat_fm_pcd_manip_get_stats_t *compat_param;
  100880. +
  100881. + compat_param = (ioc_compat_fm_pcd_manip_get_stats_t*) XX_Malloc(
  100882. + sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
  100883. + if (!compat_param)
  100884. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100885. +
  100886. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_manip_get_stats_t));
  100887. + compat_copy_fm_pcd_manip_get_stats(compat_param, &param, COMPAT_K_TO_US);
  100888. + if (copy_to_user((ioc_compat_fm_pcd_manip_get_stats_t*) compat_ptr(arg),
  100889. + compat_param,
  100890. + sizeof(ioc_compat_fm_pcd_manip_get_stats_t))){
  100891. + XX_Free(compat_param);
  100892. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100893. + }
  100894. + XX_Free(compat_param);
  100895. + }
  100896. + else
  100897. +#endif
  100898. + if (copy_to_user((ioc_fm_pcd_manip_get_stats_t *)arg,
  100899. + &param,
  100900. + sizeof(ioc_fm_pcd_manip_get_stats_t)))
  100901. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100902. +
  100903. + break;
  100904. + }
  100905. +
  100906. +#if (DPAA_VERSION >= 11)
  100907. +#if defined(CONFIG_COMPAT)
  100908. + case FM_PCD_IOC_FRM_REPLIC_GROUP_SET_COMPAT:
  100909. +#endif
  100910. + case FM_PCD_IOC_FRM_REPLIC_GROUP_SET:
  100911. + {
  100912. + ioc_fm_pcd_frm_replic_group_params_t *param;
  100913. +
  100914. + param = (ioc_fm_pcd_frm_replic_group_params_t *) XX_Malloc(
  100915. + sizeof(ioc_fm_pcd_frm_replic_group_params_t));
  100916. + if (!param)
  100917. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  100918. +
  100919. + memset(param, 0, sizeof(ioc_fm_pcd_frm_replic_group_params_t));
  100920. +
  100921. +#if defined(CONFIG_COMPAT)
  100922. + if (compat)
  100923. + {
  100924. + ioc_compat_fm_pcd_frm_replic_group_params_t
  100925. + *compat_param;
  100926. +
  100927. + compat_param =
  100928. + (ioc_compat_fm_pcd_frm_replic_group_params_t *)
  100929. + XX_Malloc(sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
  100930. + if (!compat_param)
  100931. + {
  100932. + XX_Free(param);
  100933. + RETURN_ERROR(MINOR, E_NO_MEMORY,
  100934. + ("IOCTL FM PCD"));
  100935. + }
  100936. +
  100937. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
  100938. + if (copy_from_user(compat_param,
  100939. + (ioc_compat_fm_pcd_frm_replic_group_params_t *)
  100940. + compat_ptr(arg),
  100941. + sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t))) {
  100942. + XX_Free(compat_param);
  100943. + XX_Free(param);
  100944. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100945. + }
  100946. +
  100947. + compat_copy_fm_pcd_frm_replic_group_params(compat_param,
  100948. + param, COMPAT_US_TO_K);
  100949. +
  100950. + XX_Free(compat_param);
  100951. + }
  100952. + else
  100953. +#endif
  100954. + {
  100955. + if (copy_from_user(param,
  100956. + (ioc_fm_pcd_frm_replic_group_params_t *)arg,
  100957. + sizeof(ioc_fm_pcd_frm_replic_group_params_t)))
  100958. + {
  100959. + XX_Free(param);
  100960. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  100961. + }
  100962. + }
  100963. +
  100964. + param->id = FM_PCD_FrmReplicSetGroup(p_LnxWrpFmDev->h_PcdDev,
  100965. + (t_FmPcdFrmReplicGroupParams*)param);
  100966. +
  100967. + if (!param->id) {
  100968. + XX_Free(param);
  100969. + err = E_INVALID_VALUE;
  100970. + /*
  100971. + * Since the LLD has no errno-style error reporting,
  100972. + * we're left here with no other option than to report
  100973. + * a generic E_INVALID_VALUE
  100974. + */
  100975. + break;
  100976. + }
  100977. +
  100978. +#if defined(CONFIG_COMPAT)
  100979. + if (compat)
  100980. + {
  100981. + ioc_compat_fm_pcd_frm_replic_group_params_t
  100982. + *compat_param;
  100983. +
  100984. + compat_param =
  100985. + (ioc_compat_fm_pcd_frm_replic_group_params_t *)
  100986. + XX_Malloc(sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
  100987. + if (!compat_param)
  100988. + {
  100989. + XX_Free(param);
  100990. + RETURN_ERROR(MINOR, E_NO_MEMORY,
  100991. + ("IOCTL FM PCD"));
  100992. + }
  100993. +
  100994. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t));
  100995. + compat_copy_fm_pcd_frm_replic_group_params(compat_param,
  100996. + param, COMPAT_K_TO_US);
  100997. + if (copy_to_user(
  100998. + (ioc_compat_fm_pcd_frm_replic_group_params_t *)
  100999. + compat_ptr(arg),
  101000. + compat_param,
  101001. + sizeof(ioc_compat_fm_pcd_frm_replic_group_params_t)))
  101002. + err = E_WRITE_FAILED;
  101003. +
  101004. + XX_Free(compat_param);
  101005. + }
  101006. + else
  101007. +#endif
  101008. + {
  101009. + if (copy_to_user(
  101010. + (ioc_fm_pcd_frm_replic_group_params_t *)arg,
  101011. + param,
  101012. + sizeof(ioc_fm_pcd_frm_replic_group_params_t)))
  101013. + err = E_WRITE_FAILED;
  101014. + }
  101015. +
  101016. + XX_Free(param);
  101017. + break;
  101018. + }
  101019. + break;
  101020. +
  101021. +#if defined(CONFIG_COMPAT)
  101022. + case FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE_COMPAT:
  101023. +#endif
  101024. + case FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE:
  101025. + {
  101026. + ioc_fm_obj_t id;
  101027. +
  101028. + memset(&id, 0, sizeof(ioc_fm_obj_t));
  101029. +#if defined(CONFIG_COMPAT)
  101030. + if (compat)
  101031. + {
  101032. + ioc_compat_fm_obj_t compat_id;
  101033. +
  101034. + if (copy_from_user(&compat_id,
  101035. + (ioc_compat_fm_obj_t *) compat_ptr(arg),
  101036. + sizeof(ioc_compat_fm_obj_t)))
  101037. + break;
  101038. + compat_obj_delete(&compat_id, &id);
  101039. + }
  101040. + else
  101041. +#endif
  101042. + {
  101043. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg,
  101044. + sizeof(ioc_fm_obj_t)))
  101045. + break;
  101046. + }
  101047. +
  101048. + return FM_PCD_FrmReplicDeleteGroup(id.obj);
  101049. + }
  101050. + break;
  101051. +
  101052. +#if defined(CONFIG_COMPAT)
  101053. + case FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD_COMPAT:
  101054. +#endif
  101055. + case FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD:
  101056. + {
  101057. + ioc_fm_pcd_frm_replic_member_params_t param;
  101058. +
  101059. +#if defined(CONFIG_COMPAT)
  101060. + if (compat)
  101061. + {
  101062. + ioc_compat_fm_pcd_frm_replic_member_params_t compat_param;
  101063. +
  101064. + if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
  101065. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101066. +
  101067. + compat_copy_fm_pcd_frm_replic_member_params(&compat_param, &param, COMPAT_US_TO_K);
  101068. + }
  101069. + else
  101070. +#endif
  101071. + if (copy_from_user(&param, (void *)arg, sizeof(param)))
  101072. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101073. +
  101074. + return FM_PCD_FrmReplicAddMember(param.member.h_replic_group,
  101075. + param.member.member_index,
  101076. + (t_FmPcdCcNextEngineParams*)&param.next_engine_params);
  101077. + }
  101078. + break;
  101079. +
  101080. +#if defined(CONFIG_COMPAT)
  101081. + case FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE_COMPAT:
  101082. +#endif
  101083. + case FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE:
  101084. + {
  101085. + ioc_fm_pcd_frm_replic_member_t param;
  101086. +
  101087. +#if defined(CONFIG_COMPAT)
  101088. + if (compat)
  101089. + {
  101090. + ioc_compat_fm_pcd_frm_replic_member_t compat_param;
  101091. +
  101092. + if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
  101093. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101094. +
  101095. + compat_copy_fm_pcd_frm_replic_member(&compat_param, &param, COMPAT_US_TO_K);
  101096. + }
  101097. + else
  101098. +#endif
  101099. + if (copy_from_user(&param, (void *)arg, sizeof(param)))
  101100. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101101. +
  101102. + return FM_PCD_FrmReplicRemoveMember(param.h_replic_group, param.member_index);
  101103. + }
  101104. + break;
  101105. +
  101106. +#if defined(CONFIG_COMPAT)
  101107. + case FM_IOC_VSP_CONFIG_COMPAT:
  101108. +#endif
  101109. + case FM_IOC_VSP_CONFIG:
  101110. + {
  101111. + ioc_fm_vsp_params_t param;
  101112. +
  101113. +#if defined(CONFIG_COMPAT)
  101114. + if (compat)
  101115. + {
  101116. + ioc_compat_fm_vsp_params_t compat_param;
  101117. +
  101118. + if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
  101119. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101120. +
  101121. + compat_copy_fm_vsp_params(&compat_param, &param, COMPAT_US_TO_K);
  101122. + }
  101123. + else
  101124. +#endif
  101125. + if (copy_from_user(&param, (void *)arg, sizeof(param)))
  101126. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101127. + {
  101128. + uint8_t portId = param.port_params.port_id;
  101129. + param.p_fm = p_LnxWrpFmDev->h_Dev;
  101130. + param.liodn_offset =
  101131. + p_LnxWrpFmDev->rxPorts[portId].settings.param.specificParams.rxParams.liodnOffset;
  101132. + }
  101133. + param.id = FM_VSP_Config((t_FmVspParams *)&param);
  101134. +
  101135. +#if defined(CONFIG_COMPAT)
  101136. + if (compat)
  101137. + {
  101138. + ioc_compat_fm_vsp_params_t compat_param;
  101139. +
  101140. + memset(&compat_param, 0, sizeof(compat_param));
  101141. + compat_copy_fm_vsp_params(&compat_param, &param, COMPAT_K_TO_US);
  101142. +
  101143. + if (copy_to_user(compat_ptr(arg), &compat_param, sizeof(compat_param)))
  101144. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101145. + }
  101146. + else
  101147. +#endif
  101148. + if (copy_to_user((void *)arg, &param, sizeof(param)))
  101149. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101150. + break;
  101151. + }
  101152. +
  101153. +#if defined(CONFIG_COMPAT)
  101154. + case FM_IOC_VSP_INIT_COMPAT:
  101155. +#endif
  101156. + case FM_IOC_VSP_INIT:
  101157. + {
  101158. + ioc_fm_obj_t id;
  101159. +
  101160. + memset(&id, 0, sizeof(ioc_fm_obj_t));
  101161. +#if defined(CONFIG_COMPAT)
  101162. + if (compat)
  101163. + {
  101164. + ioc_compat_fm_obj_t compat_id;
  101165. +
  101166. + if (copy_from_user(&compat_id,
  101167. + (ioc_compat_fm_obj_t *) compat_ptr(arg),
  101168. + sizeof(ioc_compat_fm_obj_t)))
  101169. + break;
  101170. + id.obj = compat_pcd_id2ptr(compat_id.obj);
  101171. + }
  101172. + else
  101173. +#endif
  101174. + {
  101175. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg,
  101176. + sizeof(ioc_fm_obj_t)))
  101177. + break;
  101178. + }
  101179. +
  101180. + return FM_VSP_Init(id.obj);
  101181. + }
  101182. +
  101183. +#if defined(CONFIG_COMPAT)
  101184. + case FM_IOC_VSP_FREE_COMPAT:
  101185. +#endif
  101186. + case FM_IOC_VSP_FREE:
  101187. + {
  101188. + ioc_fm_obj_t id;
  101189. +
  101190. + memset(&id, 0, sizeof(ioc_fm_obj_t));
  101191. +#if defined(CONFIG_COMPAT)
  101192. + if (compat)
  101193. + {
  101194. + ioc_compat_fm_obj_t compat_id;
  101195. +
  101196. + if (copy_from_user(&compat_id,
  101197. + (ioc_compat_fm_obj_t *) compat_ptr(arg),
  101198. + sizeof(ioc_compat_fm_obj_t)))
  101199. + break;
  101200. + compat_obj_delete(&compat_id, &id);
  101201. + }
  101202. + else
  101203. +#endif
  101204. + {
  101205. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg,
  101206. + sizeof(ioc_fm_obj_t)))
  101207. + break;
  101208. + }
  101209. +
  101210. + return FM_VSP_Free(id.obj);
  101211. + }
  101212. +
  101213. +#if defined(CONFIG_COMPAT)
  101214. + case FM_IOC_VSP_CONFIG_POOL_DEPLETION_COMPAT:
  101215. +#endif
  101216. + case FM_IOC_VSP_CONFIG_POOL_DEPLETION:
  101217. + {
  101218. + ioc_fm_buf_pool_depletion_params_t param;
  101219. +
  101220. +#if defined(CONFIG_COMPAT)
  101221. + if (compat)
  101222. + {
  101223. + ioc_compat_fm_buf_pool_depletion_params_t compat_param;
  101224. +
  101225. + if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
  101226. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101227. +
  101228. + compat_copy_fm_buf_pool_depletion_params(&compat_param, &param, COMPAT_US_TO_K);
  101229. + }
  101230. + else
  101231. +#endif
  101232. + if (copy_from_user(&param, (void *)arg, sizeof(param)))
  101233. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101234. +
  101235. + if (FM_VSP_ConfigPoolDepletion(param.p_fm_vsp,
  101236. + (t_FmBufPoolDepletion *)&param.fm_buf_pool_depletion))
  101237. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101238. +
  101239. + break;
  101240. + }
  101241. +
  101242. +
  101243. +#if defined(CONFIG_COMPAT)
  101244. + case FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT_COMPAT:
  101245. +#endif
  101246. + case FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT:
  101247. + {
  101248. + ioc_fm_buffer_prefix_content_params_t param;
  101249. +
  101250. +#if defined(CONFIG_COMPAT)
  101251. + if (compat)
  101252. + {
  101253. + ioc_compat_fm_buffer_prefix_content_params_t compat_param;
  101254. +
  101255. + if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
  101256. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101257. +
  101258. + compat_copy_fm_buffer_prefix_content_params(&compat_param, &param, COMPAT_US_TO_K);
  101259. + }
  101260. + else
  101261. +#endif
  101262. + if (copy_from_user(&param, (void *)arg, sizeof(param)))
  101263. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101264. +
  101265. + if (FM_VSP_ConfigBufferPrefixContent(param.p_fm_vsp,
  101266. + (t_FmBufferPrefixContent *)&param.fm_buffer_prefix_content))
  101267. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101268. +
  101269. + break;
  101270. + }
  101271. +
  101272. +#if defined(CONFIG_COMPAT)
  101273. + case FM_IOC_VSP_CONFIG_NO_SG_COMPAT:
  101274. +#endif
  101275. + case FM_IOC_VSP_CONFIG_NO_SG:
  101276. + {
  101277. + ioc_fm_vsp_config_no_sg_params_t param;
  101278. +
  101279. +#if defined(CONFIG_COMPAT)
  101280. + if (compat)
  101281. + {
  101282. + ioc_compat_fm_vsp_config_no_sg_params_t compat_param;
  101283. +
  101284. + if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
  101285. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101286. +
  101287. + compat_copy_fm_vsp_config_no_sg_params(&compat_param, &param, COMPAT_US_TO_K);
  101288. + }
  101289. + else
  101290. +#endif
  101291. + if (copy_from_user(&param, (void *)arg, sizeof(param)))
  101292. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101293. +
  101294. + if (FM_VSP_ConfigNoScatherGather(param.p_fm_vsp, param.no_sg))
  101295. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101296. +
  101297. + break;
  101298. + }
  101299. +
  101300. +#if defined(CONFIG_COMPAT)
  101301. + case FM_IOC_VSP_GET_BUFFER_PRS_RESULT_COMPAT:
  101302. +#endif
  101303. + case FM_IOC_VSP_GET_BUFFER_PRS_RESULT:
  101304. + {
  101305. + ioc_fm_vsp_prs_result_params_t param;
  101306. +
  101307. +#if defined(CONFIG_COMPAT)
  101308. + if (compat)
  101309. + {
  101310. + ioc_compat_fm_vsp_prs_result_params_t compat_param;
  101311. +
  101312. + if (copy_from_user(&compat_param, compat_ptr(arg), sizeof(compat_param)))
  101313. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101314. +
  101315. + compat_copy_fm_vsp_prs_result_params(&compat_param, &param, COMPAT_US_TO_K);
  101316. + }
  101317. + else
  101318. +#endif
  101319. + if (copy_from_user(&param, (void *)arg, sizeof(param)))
  101320. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101321. +
  101322. + /* this call just adds the parse results offset to p_data */
  101323. + param.p_data = FM_VSP_GetBufferPrsResult(param.p_fm_vsp, param.p_data);
  101324. +
  101325. + if (!param.p_data)
  101326. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101327. +
  101328. +#if defined(CONFIG_COMPAT)
  101329. + if (compat)
  101330. + {
  101331. + ioc_compat_fm_vsp_prs_result_params_t compat_param;
  101332. +
  101333. + memset(&compat_param, 0, sizeof(compat_param));
  101334. + compat_copy_fm_vsp_prs_result_params(&compat_param, &param, COMPAT_K_TO_US);
  101335. +
  101336. + if (copy_to_user(compat_ptr(arg), &compat_param, sizeof(compat_param)))
  101337. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101338. + }
  101339. + else
  101340. +#endif
  101341. + if (copy_to_user((void *)arg, &param, sizeof(param)))
  101342. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101343. +
  101344. + break;
  101345. + }
  101346. +#endif /* (DPAA_VERSION >= 11) */
  101347. +
  101348. +#ifdef FM_CAPWAP_SUPPORT
  101349. +#warning "feature not supported!"
  101350. +#if defined(CONFIG_COMPAT)
  101351. + case FM_PCD_IOC_STATISTICS_SET_NODE_COMPAT:
  101352. +#endif
  101353. + case FM_PCD_IOC_STATISTICS_SET_NODE:
  101354. + {
  101355. +/* ioc_fm_pcd_stats_params_t param;
  101356. + ...
  101357. + param->id = FM_PCD_StatisticsSetNode(p_LnxWrpFmDev->h_PcdDev,
  101358. + (t_FmPcdStatsParams *)&param);
  101359. +*/
  101360. + err = E_NOT_SUPPORTED;
  101361. + break;
  101362. + }
  101363. +#endif /* FM_CAPWAP_SUPPORT */
  101364. +
  101365. + default:
  101366. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  101367. + ("invalid ioctl: cmd:0x%08x(type:0x%02x, nr: %d.\n",
  101368. + cmd, _IOC_TYPE(cmd), _IOC_NR(cmd)));
  101369. + }
  101370. +
  101371. + if (err)
  101372. + RETURN_ERROR(MINOR, err, ("IOCTL FM PCD"));
  101373. +
  101374. + return E_OK;
  101375. +}
  101376. +
  101377. +void FM_Get_Api_Version(ioc_fm_api_version_t *p_version)
  101378. +{
  101379. + p_version->version.major = FMD_API_VERSION_MAJOR;
  101380. + p_version->version.minor = FMD_API_VERSION_MINOR;
  101381. + p_version->version.respin = FMD_API_VERSION_RESPIN;
  101382. + p_version->version.reserved = 0;
  101383. +}
  101384. +
  101385. +t_Error LnxwrpFmIOCTL(t_LnxWrpFmDev *p_LnxWrpFmDev, unsigned int cmd, unsigned long arg, bool compat)
  101386. +{
  101387. + t_Error err = E_OK;
  101388. +
  101389. + switch (cmd)
  101390. + {
  101391. + case FM_IOC_SET_PORTS_BANDWIDTH:
  101392. + {
  101393. + ioc_fm_port_bandwidth_params *param;
  101394. +
  101395. + param = (ioc_fm_port_bandwidth_params*) XX_Malloc(sizeof(ioc_fm_port_bandwidth_params));
  101396. + if (!param)
  101397. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  101398. +
  101399. + memset(param, 0, sizeof(ioc_fm_port_bandwidth_params));
  101400. +
  101401. +#if defined(CONFIG_COMPAT)
  101402. + if (compat)
  101403. + {
  101404. + if (copy_from_user(param, (ioc_fm_port_bandwidth_params*)compat_ptr(arg), sizeof(ioc_fm_port_bandwidth_params)))
  101405. + {
  101406. + XX_Free(param);
  101407. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101408. + }
  101409. + }
  101410. + else
  101411. +#endif
  101412. + {
  101413. + if (copy_from_user(param, (ioc_fm_port_bandwidth_params*)arg, sizeof(ioc_fm_port_bandwidth_params)))
  101414. + {
  101415. + XX_Free(param);
  101416. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101417. + }
  101418. + }
  101419. +
  101420. + err = FM_SetPortsBandwidth(p_LnxWrpFmDev->h_Dev, (t_FmPortsBandwidthParams*) param);
  101421. +
  101422. + XX_Free(param);
  101423. + break;
  101424. + }
  101425. +
  101426. + case FM_IOC_GET_REVISION:
  101427. + {
  101428. + ioc_fm_revision_info_t *param;
  101429. +
  101430. + param = (ioc_fm_revision_info_t *) XX_Malloc(sizeof(ioc_fm_revision_info_t));
  101431. + if (!param)
  101432. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  101433. +
  101434. + FM_GetRevision(p_LnxWrpFmDev->h_Dev, (t_FmRevisionInfo*)param);
  101435. + /* This one never returns anything other than E_OK */
  101436. +
  101437. +#if defined(CONFIG_COMPAT)
  101438. + if (compat)
  101439. + {
  101440. + if (copy_to_user((ioc_fm_revision_info_t *)compat_ptr(arg),
  101441. + param,
  101442. + sizeof(ioc_fm_revision_info_t))){
  101443. + XX_Free(param);
  101444. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  101445. + }
  101446. + }
  101447. + else
  101448. +#endif
  101449. + {
  101450. + if (copy_to_user((ioc_fm_revision_info_t *)arg,
  101451. + param,
  101452. + sizeof(ioc_fm_revision_info_t))){
  101453. + XX_Free(param);
  101454. + RETURN_ERROR(MINOR, E_READ_FAILED, NO_MSG);
  101455. + }
  101456. + }
  101457. + XX_Free(param);
  101458. + break;
  101459. + }
  101460. +
  101461. + case FM_IOC_SET_COUNTER:
  101462. + {
  101463. + ioc_fm_counters_params_t *param;
  101464. +
  101465. + param = (ioc_fm_counters_params_t *) XX_Malloc(sizeof(ioc_fm_counters_params_t));
  101466. + if (!param)
  101467. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  101468. +
  101469. + memset(param, 0, sizeof(ioc_fm_counters_params_t));
  101470. +
  101471. +#if defined(CONFIG_COMPAT)
  101472. + if (compat)
  101473. + {
  101474. + if (copy_from_user(param, (ioc_fm_counters_params_t *)compat_ptr(arg), sizeof(ioc_fm_counters_params_t)))
  101475. + {
  101476. + XX_Free(param);
  101477. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101478. + }
  101479. + }
  101480. + else
  101481. +#endif
  101482. + {
  101483. + if (copy_from_user(param, (ioc_fm_counters_params_t *)arg, sizeof(ioc_fm_counters_params_t)))
  101484. + {
  101485. + XX_Free(param);
  101486. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101487. + }
  101488. + }
  101489. +
  101490. + err = FM_ModifyCounter(p_LnxWrpFmDev->h_Dev, param->cnt, param->val);
  101491. +
  101492. + XX_Free(param);
  101493. + break;
  101494. + }
  101495. +
  101496. + case FM_IOC_GET_COUNTER:
  101497. + {
  101498. + ioc_fm_counters_params_t *param;
  101499. +
  101500. + param = (ioc_fm_counters_params_t *) XX_Malloc(sizeof(ioc_fm_counters_params_t));
  101501. + if (!param)
  101502. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PCD"));
  101503. +
  101504. + memset(param, 0, sizeof(ioc_fm_counters_params_t));
  101505. +
  101506. +#if defined(CONFIG_COMPAT)
  101507. + if (compat)
  101508. + {
  101509. + if (copy_from_user(param, (ioc_fm_counters_params_t *)compat_ptr(arg), sizeof(ioc_fm_counters_params_t)))
  101510. + {
  101511. + XX_Free(param);
  101512. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101513. + }
  101514. + }
  101515. + else
  101516. +#endif
  101517. + {
  101518. + if (copy_from_user(param, (ioc_fm_counters_params_t *)arg, sizeof(ioc_fm_counters_params_t)))
  101519. + {
  101520. + XX_Free(param);
  101521. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101522. + }
  101523. + }
  101524. +
  101525. + param->val = FM_GetCounter(p_LnxWrpFmDev->h_Dev, param->cnt);
  101526. +
  101527. +#if defined(CONFIG_COMPAT)
  101528. + if (compat)
  101529. + {
  101530. + if (copy_to_user((ioc_fm_counters_params_t *)compat_ptr(arg), param, sizeof(ioc_fm_counters_params_t)))
  101531. + err = E_READ_FAILED;
  101532. + }
  101533. + else
  101534. +#endif
  101535. + {
  101536. + if (copy_to_user((ioc_fm_counters_params_t *)arg, param, sizeof(ioc_fm_counters_params_t)))
  101537. + err = E_READ_FAILED;
  101538. + }
  101539. +
  101540. + XX_Free(param);
  101541. + break;
  101542. + }
  101543. +
  101544. + case FM_IOC_FORCE_INTR:
  101545. + {
  101546. + ioc_fm_exceptions param;
  101547. +
  101548. +#if defined(CONFIG_COMPAT)
  101549. + if (compat)
  101550. + {
  101551. + if (get_user(param, (ioc_fm_exceptions*) compat_ptr(arg)))
  101552. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101553. + }
  101554. + else
  101555. +#endif
  101556. + {
  101557. + if (get_user(param, (ioc_fm_exceptions*)arg))
  101558. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101559. + }
  101560. +
  101561. + err = FM_ForceIntr(p_LnxWrpFmDev->h_Dev, (e_FmExceptions)param);
  101562. + break;
  101563. + }
  101564. +
  101565. + case FM_IOC_GET_API_VERSION:
  101566. + {
  101567. + ioc_fm_api_version_t version;
  101568. +
  101569. + FM_Get_Api_Version(&version);
  101570. +
  101571. +#if defined(CONFIG_COMPAT)
  101572. + if (compat)
  101573. + {
  101574. + if (copy_to_user(
  101575. + (ioc_fm_api_version_t *)compat_ptr(arg),
  101576. + &version, sizeof(version)))
  101577. + err = E_READ_FAILED;
  101578. + }
  101579. + else
  101580. +#endif
  101581. + {
  101582. + if (copy_to_user((ioc_fm_api_version_t *)arg,
  101583. + &version, sizeof(version)))
  101584. + err = E_READ_FAILED;
  101585. + }
  101586. + }
  101587. + break;
  101588. +
  101589. + case FM_IOC_CTRL_MON_START:
  101590. + {
  101591. + FM_CtrlMonStart(p_LnxWrpFmDev->h_Dev);
  101592. + }
  101593. + break;
  101594. +
  101595. + case FM_IOC_CTRL_MON_STOP:
  101596. + {
  101597. + FM_CtrlMonStop(p_LnxWrpFmDev->h_Dev);
  101598. + }
  101599. + break;
  101600. +
  101601. +#if defined(CONFIG_COMPAT)
  101602. + case FM_IOC_CTRL_MON_GET_COUNTERS_COMPAT:
  101603. +#endif
  101604. + case FM_IOC_CTRL_MON_GET_COUNTERS:
  101605. + {
  101606. + ioc_fm_ctrl_mon_counters_params_t param;
  101607. + t_FmCtrlMon mon;
  101608. +
  101609. +#if defined(CONFIG_COMPAT)
  101610. + ioc_compat_fm_ctrl_mon_counters_params_t compat_param;
  101611. +
  101612. + if (compat)
  101613. + {
  101614. + if (copy_from_user(&compat_param, (void *)compat_ptr(arg),
  101615. + sizeof(compat_param)))
  101616. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101617. +
  101618. + param.fm_ctrl_index = compat_param.fm_ctrl_index;
  101619. + param.p_mon = (fm_ctrl_mon_t *)compat_ptr(compat_param.p_mon);
  101620. + }
  101621. + else
  101622. +#endif
  101623. + {
  101624. + if (copy_from_user(&param, (void *)arg, sizeof(ioc_fm_ctrl_mon_counters_params_t)))
  101625. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101626. + }
  101627. +
  101628. + if (FM_CtrlMonGetCounters(p_LnxWrpFmDev->h_Dev, param.fm_ctrl_index, &mon))
  101629. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101630. +
  101631. + if (copy_to_user(param.p_mon, &mon, sizeof(t_FmCtrlMon)))
  101632. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101633. + }
  101634. + break;
  101635. +
  101636. + default:
  101637. + return LnxwrpFmPcdIOCTL(p_LnxWrpFmDev, cmd, arg, compat);
  101638. + }
  101639. +
  101640. + if (err)
  101641. + RETURN_ERROR(MINOR, E_INVALID_OPERATION, ("IOCTL FM"));
  101642. +
  101643. + return E_OK;
  101644. +}
  101645. +
  101646. +t_Error LnxwrpFmPortIOCTL(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev, unsigned int cmd, unsigned long arg, bool compat)
  101647. +{
  101648. + t_Error err = E_OK;
  101649. +
  101650. + _fm_ioctl_dbg("cmd:0x%08x(type:0x%02x, nr:%u).\n",
  101651. + cmd, _IOC_TYPE(cmd), _IOC_NR(cmd) - 70);
  101652. +
  101653. + switch (cmd)
  101654. + {
  101655. + case FM_PORT_IOC_DISABLE:
  101656. + FM_PORT_Disable(p_LnxWrpFmPortDev->h_Dev);
  101657. + /* deliberately ignoring error codes here */
  101658. + return E_OK;
  101659. +
  101660. + case FM_PORT_IOC_ENABLE:
  101661. + FM_PORT_Enable(p_LnxWrpFmPortDev->h_Dev);
  101662. + /* deliberately ignoring error codes here */
  101663. + return E_OK;
  101664. +
  101665. + case FM_PORT_IOC_SET_ERRORS_ROUTE:
  101666. + {
  101667. + ioc_fm_port_frame_err_select_t errs;
  101668. +
  101669. +#if defined(CONFIG_COMPAT)
  101670. + if (compat)
  101671. + {
  101672. + if (get_user(errs, (ioc_fm_port_frame_err_select_t*)compat_ptr(arg)))
  101673. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101674. + }
  101675. + else
  101676. +#endif
  101677. + {
  101678. + if (get_user(errs, (ioc_fm_port_frame_err_select_t*)arg))
  101679. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101680. + }
  101681. +
  101682. + err = FM_PORT_SetErrorsRoute(p_LnxWrpFmPortDev->h_Dev, (fmPortFrameErrSelect_t)errs);
  101683. + break;
  101684. + }
  101685. +
  101686. + case FM_PORT_IOC_SET_RATE_LIMIT:
  101687. + {
  101688. + ioc_fm_port_rate_limit_t *param;
  101689. +
  101690. + param = (ioc_fm_port_rate_limit_t *) XX_Malloc(sizeof(ioc_fm_port_rate_limit_t));
  101691. + if (!param)
  101692. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  101693. +
  101694. + memset(param, 0, sizeof(ioc_fm_port_rate_limit_t));
  101695. +
  101696. +#if defined(CONFIG_COMPAT)
  101697. + if (compat)
  101698. + {
  101699. + if (copy_from_user(param, (ioc_fm_port_rate_limit_t *)compat_ptr(arg), sizeof(ioc_fm_port_rate_limit_t)))
  101700. + {
  101701. + XX_Free(param);
  101702. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101703. + }
  101704. + }
  101705. + else
  101706. +#endif
  101707. + {
  101708. + if (copy_from_user(param, (ioc_fm_port_rate_limit_t *)arg, sizeof(ioc_fm_port_rate_limit_t)))
  101709. + {
  101710. + XX_Free(param);
  101711. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101712. + }
  101713. + }
  101714. +
  101715. + err = FM_PORT_SetRateLimit(p_LnxWrpFmPortDev->h_Dev, (t_FmPortRateLimit *)param);
  101716. +
  101717. + XX_Free(param);
  101718. + break;
  101719. + }
  101720. +
  101721. + case FM_PORT_IOC_REMOVE_RATE_LIMIT:
  101722. + FM_PORT_DeleteRateLimit(p_LnxWrpFmPortDev->h_Dev);
  101723. + /* deliberately ignoring error codes here */
  101724. + return E_OK;
  101725. +
  101726. + case FM_PORT_IOC_ALLOC_PCD_FQIDS:
  101727. + {
  101728. + ioc_fm_port_pcd_fqids_params_t *param;
  101729. +
  101730. + if (!p_LnxWrpFmPortDev->pcd_owner_params.cba)
  101731. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("No one to listen on this PCD!!!"));
  101732. +
  101733. + param = (ioc_fm_port_pcd_fqids_params_t *) XX_Malloc(sizeof(ioc_fm_port_pcd_fqids_params_t));
  101734. + if (!param)
  101735. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  101736. +
  101737. + memset(param, 0, sizeof(ioc_fm_port_pcd_fqids_params_t));
  101738. +
  101739. +#if defined(CONFIG_COMPAT)
  101740. + if (compat)
  101741. + {
  101742. + if (copy_from_user(param, (ioc_fm_port_pcd_fqids_params_t *)compat_ptr(arg),
  101743. + sizeof(ioc_fm_port_pcd_fqids_params_t)))
  101744. + {
  101745. + XX_Free(param);
  101746. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101747. + }
  101748. + }
  101749. + else
  101750. +#endif
  101751. + {
  101752. + if (copy_from_user(param, (ioc_fm_port_pcd_fqids_params_t *)arg,
  101753. + sizeof(ioc_fm_port_pcd_fqids_params_t)))
  101754. + {
  101755. + XX_Free(param);
  101756. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101757. + }
  101758. + }
  101759. +
  101760. + if (p_LnxWrpFmPortDev->pcd_owner_params.cba(p_LnxWrpFmPortDev->pcd_owner_params.dev,
  101761. + param->num_fqids,
  101762. + param->alignment,
  101763. + &param->base_fqid))
  101764. + {
  101765. + XX_Free(param);
  101766. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("can't allocate fqids for PCD!!!"));
  101767. + }
  101768. +
  101769. +#if defined(CONFIG_COMPAT)
  101770. + if (compat)
  101771. + {
  101772. + if (copy_to_user((ioc_fm_port_pcd_fqids_params_t *)compat_ptr(arg),
  101773. + param, sizeof(ioc_fm_port_pcd_fqids_params_t)))
  101774. + err = E_READ_FAILED;
  101775. + }
  101776. + else
  101777. +#endif
  101778. + {
  101779. + if (copy_to_user((ioc_fm_port_pcd_fqids_params_t *)arg,
  101780. + param, sizeof(ioc_fm_port_pcd_fqids_params_t)))
  101781. + err = E_READ_FAILED;
  101782. + }
  101783. +
  101784. + XX_Free(param);
  101785. + break;
  101786. + }
  101787. +
  101788. + case FM_PORT_IOC_FREE_PCD_FQIDS:
  101789. + {
  101790. + uint32_t base_fqid;
  101791. +
  101792. + if (!p_LnxWrpFmPortDev->pcd_owner_params.cbf)
  101793. + RETURN_ERROR(MINOR, E_INVALID_STATE, ("No one to listen on this PCD!!!"));
  101794. +
  101795. +#if defined(CONFIG_COMPAT)
  101796. + if (compat)
  101797. + {
  101798. + if (get_user(base_fqid, (uint32_t*) compat_ptr(arg)))
  101799. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101800. + }
  101801. + else
  101802. +#endif
  101803. + {
  101804. + if (get_user(base_fqid, (uint32_t*)arg))
  101805. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  101806. + }
  101807. +
  101808. + if (p_LnxWrpFmPortDev->pcd_owner_params.cbf(p_LnxWrpFmPortDev->pcd_owner_params.dev, base_fqid))
  101809. + err = E_WRITE_FAILED;
  101810. +
  101811. + break;
  101812. + }
  101813. +
  101814. +#if defined(CONFIG_COMPAT)
  101815. + case FM_PORT_IOC_SET_PCD_COMPAT:
  101816. +#endif
  101817. + case FM_PORT_IOC_SET_PCD:
  101818. + {
  101819. + ioc_fm_port_pcd_params_t *port_pcd_params;
  101820. + ioc_fm_port_pcd_prs_params_t *port_pcd_prs_params;
  101821. + ioc_fm_port_pcd_cc_params_t *port_pcd_cc_params;
  101822. + ioc_fm_port_pcd_kg_params_t *port_pcd_kg_params;
  101823. + ioc_fm_port_pcd_plcr_params_t *port_pcd_plcr_params;
  101824. +
  101825. + port_pcd_params = (ioc_fm_port_pcd_params_t *) XX_Malloc(
  101826. + sizeof(ioc_fm_port_pcd_params_t) +
  101827. + sizeof(ioc_fm_port_pcd_prs_params_t) +
  101828. + sizeof(ioc_fm_port_pcd_cc_params_t) +
  101829. + sizeof(ioc_fm_port_pcd_kg_params_t) +
  101830. + sizeof(ioc_fm_port_pcd_plcr_params_t));
  101831. + if (!port_pcd_params)
  101832. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  101833. +
  101834. + memset(port_pcd_params, 0,
  101835. + sizeof(ioc_fm_port_pcd_params_t) +
  101836. + sizeof(ioc_fm_port_pcd_prs_params_t) +
  101837. + sizeof(ioc_fm_port_pcd_cc_params_t) +
  101838. + sizeof(ioc_fm_port_pcd_kg_params_t) +
  101839. + sizeof(ioc_fm_port_pcd_plcr_params_t));
  101840. +
  101841. + port_pcd_prs_params = (ioc_fm_port_pcd_prs_params_t *) (port_pcd_params + 1);
  101842. + port_pcd_cc_params = (ioc_fm_port_pcd_cc_params_t *) (port_pcd_prs_params + 1);
  101843. + port_pcd_kg_params = (ioc_fm_port_pcd_kg_params_t *) (port_pcd_cc_params + 1);
  101844. + port_pcd_plcr_params = (ioc_fm_port_pcd_plcr_params_t *) (port_pcd_kg_params + 1);
  101845. +
  101846. +#if defined(CONFIG_COMPAT)
  101847. + if (compat)
  101848. + {
  101849. + ioc_compat_fm_port_pcd_params_t *compat_port_pcd_params;
  101850. + ioc_fm_port_pcd_prs_params_t *same_port_pcd_prs_params;
  101851. + ioc_compat_fm_port_pcd_cc_params_t *compat_port_pcd_cc_params;
  101852. + ioc_compat_fm_port_pcd_kg_params_t *compat_port_pcd_kg_params;
  101853. + ioc_compat_fm_port_pcd_plcr_params_t *compat_port_pcd_plcr_params;
  101854. +
  101855. + compat_port_pcd_params = (ioc_compat_fm_port_pcd_params_t *) XX_Malloc(
  101856. + sizeof(ioc_compat_fm_port_pcd_params_t) +
  101857. + sizeof(ioc_fm_port_pcd_prs_params_t) +
  101858. + sizeof(ioc_compat_fm_port_pcd_cc_params_t) +
  101859. + sizeof(ioc_compat_fm_port_pcd_kg_params_t) +
  101860. + sizeof(ioc_compat_fm_port_pcd_plcr_params_t));
  101861. + if (!compat_port_pcd_params)
  101862. + {
  101863. + XX_Free(port_pcd_params);
  101864. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  101865. + }
  101866. +
  101867. + memset(compat_port_pcd_params, 0,
  101868. + sizeof(ioc_compat_fm_port_pcd_params_t) +
  101869. + sizeof(ioc_fm_port_pcd_prs_params_t) +
  101870. + sizeof(ioc_compat_fm_port_pcd_cc_params_t) +
  101871. + sizeof(ioc_compat_fm_port_pcd_kg_params_t) +
  101872. + sizeof(ioc_compat_fm_port_pcd_plcr_params_t));
  101873. + same_port_pcd_prs_params = (ioc_fm_port_pcd_prs_params_t *) (compat_port_pcd_params + 1);
  101874. + compat_port_pcd_cc_params = (ioc_compat_fm_port_pcd_cc_params_t *) (same_port_pcd_prs_params + 1);
  101875. + compat_port_pcd_kg_params = (ioc_compat_fm_port_pcd_kg_params_t *) (compat_port_pcd_cc_params + 1);
  101876. + compat_port_pcd_plcr_params = (ioc_compat_fm_port_pcd_plcr_params_t *) (compat_port_pcd_kg_params + 1);
  101877. +
  101878. + if (copy_from_user(compat_port_pcd_params,
  101879. + (ioc_compat_fm_port_pcd_params_t*) compat_ptr(arg),
  101880. + sizeof(ioc_compat_fm_port_pcd_params_t)))
  101881. + err = E_WRITE_FAILED;
  101882. +
  101883. + while (!err) /* pseudo-while */
  101884. + {
  101885. + /* set pointers from where to copy from: */
  101886. + port_pcd_params->p_prs_params = compat_ptr(compat_port_pcd_params->p_prs_params); /* same structure */
  101887. + port_pcd_params->p_cc_params = compat_ptr(compat_port_pcd_params->p_cc_params);
  101888. + port_pcd_params->p_kg_params = compat_ptr(compat_port_pcd_params->p_kg_params);
  101889. + port_pcd_params->p_plcr_params = compat_ptr(compat_port_pcd_params->p_plcr_params);
  101890. + port_pcd_params->p_ip_reassembly_manip = compat_ptr(compat_port_pcd_params->p_ip_reassembly_manip);
  101891. +#if (DPAA_VERSION >= 11)
  101892. + port_pcd_params->p_capwap_reassembly_manip = compat_ptr(compat_port_pcd_params->p_capwap_reassembly_manip);
  101893. +#endif
  101894. + /* the prs member is the same, no compat structure...memcpy only */
  101895. + if (port_pcd_params->p_prs_params)
  101896. + {
  101897. + if (copy_from_user(same_port_pcd_prs_params,
  101898. + port_pcd_params->p_prs_params,
  101899. + sizeof(ioc_fm_port_pcd_prs_params_t)))
  101900. + {
  101901. + err = E_WRITE_FAILED;
  101902. + break; /* from pseudo-while */
  101903. + }
  101904. +
  101905. + memcpy(port_pcd_prs_params, same_port_pcd_prs_params, sizeof(ioc_fm_port_pcd_prs_params_t));
  101906. + port_pcd_params->p_prs_params = port_pcd_prs_params;
  101907. + }
  101908. +
  101909. + if (port_pcd_params->p_cc_params)
  101910. + {
  101911. + if (copy_from_user(compat_port_pcd_cc_params,
  101912. + port_pcd_params->p_cc_params,
  101913. + sizeof(ioc_compat_fm_port_pcd_cc_params_t)))
  101914. + {
  101915. + err = E_WRITE_FAILED;
  101916. + break; /* from pseudo-while */
  101917. + }
  101918. +
  101919. + port_pcd_params->p_cc_params = port_pcd_cc_params;
  101920. + }
  101921. +
  101922. + if (port_pcd_params->p_kg_params)
  101923. + {
  101924. + if (copy_from_user(compat_port_pcd_kg_params,
  101925. + port_pcd_params->p_kg_params,
  101926. + sizeof(ioc_compat_fm_port_pcd_kg_params_t)))
  101927. + {
  101928. + err = E_WRITE_FAILED;
  101929. + break; /* from pseudo-while */
  101930. + }
  101931. +
  101932. + port_pcd_params->p_kg_params = port_pcd_kg_params;
  101933. + }
  101934. +
  101935. + if (port_pcd_params->p_plcr_params)
  101936. + {
  101937. + if (copy_from_user(compat_port_pcd_plcr_params,
  101938. + port_pcd_params->p_plcr_params,
  101939. + sizeof(ioc_compat_fm_port_pcd_plcr_params_t)))
  101940. + {
  101941. + err = E_WRITE_FAILED;
  101942. + break; /* from pseudo-while */
  101943. + }
  101944. +
  101945. + port_pcd_params->p_plcr_params = port_pcd_plcr_params;
  101946. + }
  101947. +
  101948. + break; /* pseudo-while: always run once! */
  101949. + }
  101950. +
  101951. + if (!err)
  101952. + compat_copy_fm_port_pcd(compat_port_pcd_params, port_pcd_params, COMPAT_US_TO_K);
  101953. +
  101954. + XX_Free(compat_port_pcd_params);
  101955. + }
  101956. + else
  101957. +#endif
  101958. + {
  101959. + if (copy_from_user(port_pcd_params,
  101960. + (ioc_fm_port_pcd_params_t*) arg,
  101961. + sizeof(ioc_fm_port_pcd_params_t)))
  101962. + err = E_WRITE_FAILED;
  101963. +
  101964. + while (!err) /* pseudo-while */
  101965. + {
  101966. + if (port_pcd_params->p_prs_params)
  101967. + {
  101968. + if (copy_from_user(port_pcd_prs_params,
  101969. + port_pcd_params->p_prs_params,
  101970. + sizeof(ioc_fm_port_pcd_prs_params_t)))
  101971. + {
  101972. + err = E_WRITE_FAILED;
  101973. + break; /* from pseudo-while */
  101974. + }
  101975. +
  101976. + port_pcd_params->p_prs_params = port_pcd_prs_params;
  101977. + }
  101978. +
  101979. + if (port_pcd_params->p_cc_params)
  101980. + {
  101981. + if (copy_from_user(port_pcd_cc_params,
  101982. + port_pcd_params->p_cc_params,
  101983. + sizeof(ioc_fm_port_pcd_cc_params_t)))
  101984. + {
  101985. + err = E_WRITE_FAILED;
  101986. + break; /* from pseudo-while */
  101987. + }
  101988. +
  101989. + port_pcd_params->p_cc_params = port_pcd_cc_params;
  101990. + }
  101991. +
  101992. + if (port_pcd_params->p_kg_params)
  101993. + {
  101994. + if (copy_from_user(port_pcd_kg_params,
  101995. + port_pcd_params->p_kg_params,
  101996. + sizeof(ioc_fm_port_pcd_kg_params_t)))
  101997. + {
  101998. + err = E_WRITE_FAILED;
  101999. + break; /* from pseudo-while */
  102000. + }
  102001. +
  102002. + port_pcd_params->p_kg_params = port_pcd_kg_params;
  102003. + }
  102004. +
  102005. + if (port_pcd_params->p_plcr_params)
  102006. + {
  102007. + if (copy_from_user(port_pcd_plcr_params,
  102008. + port_pcd_params->p_plcr_params,
  102009. + sizeof(ioc_fm_port_pcd_plcr_params_t)))
  102010. + {
  102011. + err = E_WRITE_FAILED;
  102012. + break; /* from pseudo-while */
  102013. + }
  102014. +
  102015. + port_pcd_params->p_plcr_params = port_pcd_plcr_params;
  102016. + }
  102017. +
  102018. + break; /* pseudo-while: always run once! */
  102019. + }
  102020. + }
  102021. +
  102022. + if (!err)
  102023. + err = FM_PORT_SetPCD(p_LnxWrpFmPortDev->h_Dev, (t_FmPortPcdParams*) port_pcd_params);
  102024. +
  102025. + XX_Free(port_pcd_params);
  102026. + break;
  102027. + }
  102028. +
  102029. + case FM_PORT_IOC_DELETE_PCD:
  102030. + err = FM_PORT_DeletePCD(p_LnxWrpFmPortDev->h_Dev);
  102031. + break;
  102032. +
  102033. +#if defined(CONFIG_COMPAT)
  102034. + case FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME_COMPAT:
  102035. +#endif
  102036. + case FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME:
  102037. + {
  102038. + ioc_fm_pcd_kg_scheme_select_t *param;
  102039. +
  102040. + param = (ioc_fm_pcd_kg_scheme_select_t *) XX_Malloc(
  102041. + sizeof(ioc_fm_pcd_kg_scheme_select_t));
  102042. + if (!param)
  102043. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102044. +
  102045. + memset(param, 0, sizeof(ioc_fm_pcd_kg_scheme_select_t));
  102046. +
  102047. +#if defined(CONFIG_COMPAT)
  102048. + if (compat)
  102049. + {
  102050. + ioc_compat_fm_pcd_kg_scheme_select_t *compat_param;
  102051. +
  102052. + compat_param = (ioc_compat_fm_pcd_kg_scheme_select_t *) XX_Malloc(
  102053. + sizeof(ioc_compat_fm_pcd_kg_scheme_select_t));
  102054. + if (!compat_param)
  102055. + {
  102056. + XX_Free(param);
  102057. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102058. + }
  102059. +
  102060. + memset(compat_param, 0, sizeof(ioc_compat_fm_pcd_kg_scheme_select_t));
  102061. + if (copy_from_user(compat_param,
  102062. + (ioc_compat_fm_pcd_kg_scheme_select_t *) compat_ptr(arg),
  102063. + sizeof(ioc_compat_fm_pcd_kg_scheme_select_t)))
  102064. + {
  102065. + XX_Free(compat_param);
  102066. + XX_Free(param);
  102067. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102068. + }
  102069. +
  102070. + compat_copy_fm_pcd_kg_scheme_select(compat_param, param, COMPAT_US_TO_K);
  102071. +
  102072. + XX_Free(compat_param);
  102073. + }
  102074. + else
  102075. +#endif
  102076. + {
  102077. + if (copy_from_user(param, (ioc_fm_pcd_kg_scheme_select_t *)arg,
  102078. + sizeof(ioc_fm_pcd_kg_scheme_select_t)))
  102079. + {
  102080. + XX_Free(param);
  102081. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102082. + }
  102083. + }
  102084. +
  102085. + err = FM_PORT_PcdKgModifyInitialScheme(p_LnxWrpFmPortDev->h_Dev, (t_FmPcdKgSchemeSelect *)param);
  102086. +
  102087. + XX_Free(param);
  102088. + break;
  102089. + }
  102090. +
  102091. +#if defined(CONFIG_COMPAT)
  102092. + case FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE_COMPAT:
  102093. +#endif
  102094. + case FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE:
  102095. + {
  102096. + ioc_fm_obj_t id;
  102097. +
  102098. + memset(&id, 0 , sizeof(ioc_fm_obj_t));
  102099. +
  102100. +#if defined(CONFIG_COMPAT)
  102101. + if (compat)
  102102. + {
  102103. + ioc_compat_fm_obj_t compat_id;
  102104. +
  102105. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  102106. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102107. +
  102108. + id.obj = compat_ptr(compat_id.obj);
  102109. + }
  102110. + else
  102111. +#endif
  102112. + {
  102113. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  102114. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102115. + }
  102116. +
  102117. + err = FM_PORT_PcdPlcrModifyInitialProfile(p_LnxWrpFmPortDev->h_Dev, id.obj);
  102118. + break;
  102119. + }
  102120. +
  102121. +#if defined(CONFIG_COMPAT)
  102122. + case FM_PORT_IOC_PCD_KG_BIND_SCHEMES_COMPAT:
  102123. +#endif
  102124. + case FM_PORT_IOC_PCD_KG_BIND_SCHEMES:
  102125. + {
  102126. + ioc_fm_pcd_port_schemes_params_t *param;
  102127. +
  102128. + param = (ioc_fm_pcd_port_schemes_params_t *) XX_Malloc(
  102129. + sizeof(ioc_fm_pcd_port_schemes_params_t));
  102130. + if (!param)
  102131. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102132. +
  102133. + memset(param, 0 , sizeof(ioc_fm_pcd_port_schemes_params_t));
  102134. +
  102135. +#if defined(CONFIG_COMPAT)
  102136. + if (compat)
  102137. + {
  102138. + ioc_compat_fm_pcd_port_schemes_params_t compat_param;
  102139. +
  102140. + if (copy_from_user(&compat_param,
  102141. + (ioc_compat_fm_pcd_port_schemes_params_t *) compat_ptr(arg),
  102142. + sizeof(ioc_compat_fm_pcd_port_schemes_params_t)))
  102143. + {
  102144. + XX_Free(param);
  102145. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102146. + }
  102147. +
  102148. + compat_copy_fm_pcd_kg_schemes_params(&compat_param, param, COMPAT_US_TO_K);
  102149. + }
  102150. + else
  102151. +#endif
  102152. + {
  102153. + if (copy_from_user(param, (ioc_fm_pcd_port_schemes_params_t *) arg,
  102154. + sizeof(ioc_fm_pcd_port_schemes_params_t)))
  102155. + {
  102156. + XX_Free(param);
  102157. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102158. + }
  102159. + }
  102160. +
  102161. + err = FM_PORT_PcdKgBindSchemes(p_LnxWrpFmPortDev->h_Dev, (t_FmPcdPortSchemesParams *)param);
  102162. +
  102163. + XX_Free(param);
  102164. + break;
  102165. + }
  102166. +
  102167. +#if defined(CONFIG_COMPAT)
  102168. + case FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES_COMPAT:
  102169. +#endif
  102170. + case FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES:
  102171. + {
  102172. + ioc_fm_pcd_port_schemes_params_t *param;
  102173. +
  102174. + param = (ioc_fm_pcd_port_schemes_params_t *) XX_Malloc(
  102175. + sizeof(ioc_fm_pcd_port_schemes_params_t));
  102176. + if (!param)
  102177. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102178. +
  102179. + memset(param, 0 , sizeof(ioc_fm_pcd_port_schemes_params_t));
  102180. +
  102181. +#if defined(CONFIG_COMPAT)
  102182. + if (compat)
  102183. + {
  102184. + ioc_compat_fm_pcd_port_schemes_params_t compat_param;
  102185. +
  102186. + if (copy_from_user(&compat_param,
  102187. + (ioc_compat_fm_pcd_port_schemes_params_t *) compat_ptr(arg),
  102188. + sizeof(ioc_compat_fm_pcd_port_schemes_params_t)))
  102189. + {
  102190. + XX_Free(param);
  102191. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102192. + }
  102193. +
  102194. + compat_copy_fm_pcd_kg_schemes_params(&compat_param, param, COMPAT_US_TO_K);
  102195. + }
  102196. + else
  102197. +#endif
  102198. + {
  102199. + if (copy_from_user(param, (ioc_fm_pcd_port_schemes_params_t *) arg,
  102200. + sizeof(ioc_fm_pcd_port_schemes_params_t)))
  102201. + {
  102202. + XX_Free(param);
  102203. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102204. + }
  102205. + }
  102206. +
  102207. + err = FM_PORT_PcdKgUnbindSchemes(p_LnxWrpFmPortDev->h_Dev, (t_FmPcdPortSchemesParams *)param);
  102208. +
  102209. + XX_Free(param);
  102210. + break;
  102211. + }
  102212. +
  102213. + case FM_PORT_IOC_PCD_PLCR_ALLOC_PROFILES:
  102214. + {
  102215. + uint16_t num;
  102216. + if (get_user(num, (uint16_t*) arg))
  102217. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102218. +
  102219. + err = FM_PORT_PcdPlcrAllocProfiles(p_LnxWrpFmPortDev->h_Dev, num);
  102220. + break;
  102221. + }
  102222. +
  102223. + case FM_PORT_IOC_PCD_PLCR_FREE_PROFILES:
  102224. + err = FM_PORT_PcdPlcrFreeProfiles(p_LnxWrpFmPortDev->h_Dev);
  102225. + break;
  102226. +
  102227. + case FM_PORT_IOC_DETACH_PCD:
  102228. + err = FM_PORT_DetachPCD(p_LnxWrpFmPortDev->h_Dev);
  102229. + break;
  102230. +
  102231. + case FM_PORT_IOC_ATTACH_PCD:
  102232. + err = FM_PORT_AttachPCD(p_LnxWrpFmPortDev->h_Dev);
  102233. + break;
  102234. +
  102235. +#if defined(CONFIG_COMPAT)
  102236. + case FM_PORT_IOC_PCD_CC_MODIFY_TREE_COMPAT:
  102237. +#endif
  102238. + case FM_PORT_IOC_PCD_CC_MODIFY_TREE:
  102239. + {
  102240. + ioc_fm_obj_t id;
  102241. +
  102242. + memset(&id, 0 , sizeof(ioc_fm_obj_t));
  102243. +
  102244. +#if defined(CONFIG_COMPAT)
  102245. + if (compat)
  102246. + {
  102247. + ioc_compat_fm_obj_t compat_id;
  102248. +
  102249. + if (copy_from_user(&compat_id, (ioc_compat_fm_obj_t *) compat_ptr(arg), sizeof(ioc_compat_fm_obj_t)))
  102250. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102251. +
  102252. + compat_copy_fm_port_pcd_modify_tree(&compat_id, &id, COMPAT_US_TO_K);
  102253. + }
  102254. + else
  102255. +#endif
  102256. + {
  102257. + if (copy_from_user(&id, (ioc_fm_obj_t *) arg, sizeof(ioc_fm_obj_t)))
  102258. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102259. + }
  102260. +
  102261. + err = FM_PORT_PcdCcModifyTree(p_LnxWrpFmPortDev->h_Dev, id.obj);
  102262. + break;
  102263. + }
  102264. +
  102265. + case FM_PORT_IOC_ADD_CONGESTION_GRPS:
  102266. + case FM_PORT_IOC_REMOVE_CONGESTION_GRPS:
  102267. + {
  102268. + ioc_fm_port_congestion_groups_t *param;
  102269. +
  102270. + param = (ioc_fm_port_congestion_groups_t*) XX_Malloc(sizeof(ioc_fm_port_congestion_groups_t));
  102271. + if (!param)
  102272. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102273. +
  102274. + memset(param, 0, sizeof(ioc_fm_port_congestion_groups_t));
  102275. +
  102276. +#if defined(CONFIG_COMPAT)
  102277. + if (compat)
  102278. + {
  102279. + if (copy_from_user(param, (t_FmPortCongestionGrps*) compat_ptr(arg),
  102280. + sizeof(t_FmPortCongestionGrps)))
  102281. + {
  102282. + XX_Free(param);
  102283. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102284. + }
  102285. + }
  102286. + else
  102287. +#endif /* CONFIG_COMPAT */
  102288. + {
  102289. + if (copy_from_user(param, (t_FmPortCongestionGrps*) arg,
  102290. + sizeof(t_FmPortCongestionGrps)))
  102291. + {
  102292. + XX_Free(param);
  102293. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102294. + }
  102295. + }
  102296. +
  102297. + err = (cmd == FM_PORT_IOC_ADD_CONGESTION_GRPS)
  102298. + ? FM_PORT_AddCongestionGrps(p_LnxWrpFmPortDev->h_Dev, (t_FmPortCongestionGrps*) param)
  102299. + : FM_PORT_RemoveCongestionGrps(p_LnxWrpFmPortDev->h_Dev, (t_FmPortCongestionGrps*) param)
  102300. + ;
  102301. +
  102302. + XX_Free(param);
  102303. + break;
  102304. + }
  102305. +
  102306. + case FM_PORT_IOC_ADD_RX_HASH_MAC_ADDR:
  102307. + case FM_PORT_IOC_REMOVE_RX_HASH_MAC_ADDR:
  102308. + {
  102309. + ioc_fm_port_mac_addr_params_t *param;
  102310. +
  102311. + param = (ioc_fm_port_mac_addr_params_t*) XX_Malloc(
  102312. + sizeof(ioc_fm_port_mac_addr_params_t));
  102313. + if (!param)
  102314. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102315. +
  102316. + memset(param, 0, sizeof(ioc_fm_port_mac_addr_params_t));
  102317. +
  102318. +#if defined(CONFIG_COMPAT)
  102319. + if (compat)
  102320. + {
  102321. + if (copy_from_user(param, (ioc_fm_port_mac_addr_params_t*) compat_ptr(arg),
  102322. + sizeof(ioc_fm_port_mac_addr_params_t)))
  102323. + {
  102324. + XX_Free(param);
  102325. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102326. + }
  102327. + }
  102328. + else
  102329. +#endif /* CONFIG_COMPAT */
  102330. + {
  102331. + if (copy_from_user(param, (ioc_fm_port_mac_addr_params_t*) arg,
  102332. + sizeof(ioc_fm_port_mac_addr_params_t)))
  102333. + {
  102334. + XX_Free(param);
  102335. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102336. + }
  102337. + }
  102338. +
  102339. + if (p_LnxWrpFmPortDev->pcd_owner_params.dev)
  102340. + {
  102341. + int id = -1;
  102342. +
  102343. + switch(p_LnxWrpFmPortDev->settings.param.portType)
  102344. + {
  102345. + case e_FM_PORT_TYPE_RX:
  102346. + case e_FM_PORT_TYPE_TX:
  102347. + id = p_LnxWrpFmPortDev->id;
  102348. + break;
  102349. + case e_FM_PORT_TYPE_RX_10G:
  102350. + case e_FM_PORT_TYPE_TX_10G:
  102351. + id = p_LnxWrpFmPortDev->id + FM_MAX_NUM_OF_1G_MACS;
  102352. + break;
  102353. + default:
  102354. + err = E_NOT_AVAILABLE;
  102355. + REPORT_ERROR(MINOR, err, ("Attempt to add/remove hash MAC addr. to/from MAC-less port!"));
  102356. + }
  102357. + if (id >= 0)
  102358. + {
  102359. + t_LnxWrpFmDev *fm = (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  102360. + t_Handle mac_handle = fm->macs[id].h_Dev;
  102361. +
  102362. + err = (cmd == FM_PORT_IOC_ADD_RX_HASH_MAC_ADDR)
  102363. + ? FM_MAC_AddHashMacAddr(mac_handle, (t_EnetAddr*) param)
  102364. + : FM_MAC_RemoveHashMacAddr(mac_handle, (t_EnetAddr*) param);
  102365. + }
  102366. + }
  102367. + else
  102368. + {
  102369. + err = E_NOT_AVAILABLE;
  102370. + REPORT_ERROR(MINOR, err, ("Port not initialized or other error!?!?"));
  102371. + }
  102372. +
  102373. + XX_Free(param);
  102374. + break;
  102375. + }
  102376. +
  102377. + case FM_PORT_IOC_SET_TX_PAUSE_FRAMES:
  102378. + {
  102379. + t_LnxWrpFmDev *p_LnxWrpFmDev =
  102380. + (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  102381. + ioc_fm_port_tx_pause_frames_params_t param;
  102382. + int mac_id = p_LnxWrpFmPortDev->id;
  102383. +
  102384. + if(&p_LnxWrpFmDev->txPorts[mac_id] != p_LnxWrpFmPortDev)
  102385. + mac_id += FM_MAX_NUM_OF_1G_MACS; /* 10G port */
  102386. +
  102387. + if (copy_from_user(&param, (ioc_fm_port_tx_pause_frames_params_t *)arg,
  102388. + sizeof(ioc_fm_port_tx_pause_frames_params_t)))
  102389. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102390. +
  102391. + if (p_LnxWrpFmDev && p_LnxWrpFmDev->macs[mac_id].h_Dev)
  102392. + {
  102393. + FM_MAC_SetTxPauseFrames(p_LnxWrpFmDev->macs[mac_id].h_Dev,
  102394. + param.priority,
  102395. + param.pause_time,
  102396. + param.thresh_time);
  102397. + }
  102398. + else
  102399. + {
  102400. + err = E_NOT_AVAILABLE;
  102401. + REPORT_ERROR(MINOR, err, ("Port not initialized or other error!"));
  102402. + }
  102403. +
  102404. + break;
  102405. + }
  102406. +
  102407. + case FM_PORT_IOC_CONFIG_BUFFER_PREFIX_CONTENT:
  102408. + {
  102409. + ioc_fm_buffer_prefix_content_t *param;
  102410. +
  102411. + param = (ioc_fm_buffer_prefix_content_t*) XX_Malloc(sizeof(ioc_fm_buffer_prefix_content_t));
  102412. + if (!param)
  102413. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102414. +
  102415. + memset(param, 0, sizeof(ioc_fm_buffer_prefix_content_t));
  102416. +
  102417. + if (copy_from_user(param, (ioc_fm_buffer_prefix_content_t*) arg,
  102418. + sizeof(ioc_fm_buffer_prefix_content_t)))
  102419. + {
  102420. + XX_Free(param);
  102421. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102422. + }
  102423. +
  102424. + if (FM_PORT_ConfigBufferPrefixContent(p_LnxWrpFmPortDev->h_Dev,
  102425. + (t_FmBufferPrefixContent *)param))
  102426. + {
  102427. + XX_Free(param);
  102428. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102429. + }
  102430. +
  102431. + XX_Free(param);
  102432. + break;
  102433. + }
  102434. +
  102435. +#if (DPAA_VERSION >= 11)
  102436. +#if defined(CONFIG_COMPAT)
  102437. + case FM_PORT_IOC_VSP_ALLOC_COMPAT:
  102438. +#endif
  102439. + case FM_PORT_IOC_VSP_ALLOC:
  102440. + {
  102441. + ioc_fm_port_vsp_alloc_params_t *param;
  102442. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  102443. + t_LnxWrpFmPortDev *p_LnxWrpFmTxPortDev;
  102444. +
  102445. + param = (ioc_fm_port_vsp_alloc_params_t *) XX_Malloc(
  102446. + sizeof(ioc_fm_port_vsp_alloc_params_t));
  102447. + if (!param)
  102448. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102449. +
  102450. + memset(param, 0, sizeof(ioc_fm_port_vsp_alloc_params_t));
  102451. +
  102452. +#if defined(CONFIG_COMPAT)
  102453. + if (compat)
  102454. + {
  102455. + ioc_compat_fm_port_vsp_alloc_params_t *compat_param;
  102456. +
  102457. + compat_param = (ioc_compat_fm_port_vsp_alloc_params_t *) XX_Malloc(
  102458. + sizeof(ioc_compat_fm_port_vsp_alloc_params_t));
  102459. + if (!compat_param)
  102460. + {
  102461. + XX_Free(param);
  102462. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("IOCTL FM PORT"));
  102463. + }
  102464. +
  102465. + memset(compat_param, 0, sizeof(ioc_compat_fm_port_vsp_alloc_params_t));
  102466. + if (copy_from_user(compat_param,
  102467. + (ioc_compat_fm_port_vsp_alloc_params_t *) compat_ptr(arg),
  102468. + sizeof(ioc_compat_fm_port_vsp_alloc_params_t)))
  102469. + {
  102470. + XX_Free(compat_param);
  102471. + XX_Free(param);
  102472. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102473. + }
  102474. +
  102475. + compat_copy_fm_port_vsp_alloc_params(compat_param, param, COMPAT_US_TO_K);
  102476. +
  102477. + XX_Free(compat_param);
  102478. + }
  102479. + else
  102480. +#endif
  102481. + {
  102482. + if (copy_from_user(param, (ioc_fm_port_vsp_alloc_params_t *)arg,
  102483. + sizeof(ioc_fm_port_vsp_alloc_params_t)))
  102484. + {
  102485. + XX_Free(param);
  102486. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102487. + }
  102488. + }
  102489. +
  102490. + /* Userspace may not have the Tx port t_handle when issuing the IOCTL */
  102491. + if (p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX ||
  102492. + p_LnxWrpFmPortDev->settings.param.portType == e_FM_PORT_TYPE_RX_10G)
  102493. + {
  102494. + /* Determine the Tx port t_Handle from the Rx port id */
  102495. + p_LnxWrpFmDev = p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  102496. + p_LnxWrpFmTxPortDev = &p_LnxWrpFmDev->txPorts[p_LnxWrpFmPortDev->id];
  102497. + param->p_fm_tx_port = p_LnxWrpFmTxPortDev->h_Dev;
  102498. + }
  102499. +
  102500. + if (FM_PORT_VSPAlloc(p_LnxWrpFmPortDev->h_Dev, (t_FmPortVSPAllocParams *)param))
  102501. + {
  102502. + XX_Free(param);
  102503. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102504. + }
  102505. +
  102506. + XX_Free(param);
  102507. + break;
  102508. + }
  102509. +#endif /* (DPAA_VERSION >= 11) */
  102510. +
  102511. + case FM_PORT_IOC_GET_MAC_STATISTICS:
  102512. + {
  102513. + t_LnxWrpFmDev *p_LnxWrpFmDev =
  102514. + (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  102515. + ioc_fm_port_mac_statistics_t param;
  102516. + int mac_id = p_LnxWrpFmPortDev->id;
  102517. +
  102518. + if (!p_LnxWrpFmDev)
  102519. + RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
  102520. +
  102521. + if (&p_LnxWrpFmDev->txPorts[mac_id] != p_LnxWrpFmPortDev &&
  102522. + &p_LnxWrpFmDev->rxPorts[mac_id] != p_LnxWrpFmPortDev)
  102523. + mac_id += FM_MAX_NUM_OF_1G_MACS; /* 10G port */
  102524. +
  102525. + if (!p_LnxWrpFmDev->macs[mac_id].h_Dev)
  102526. + RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
  102527. +
  102528. + if (FM_MAC_GetStatistics(p_LnxWrpFmDev->macs[mac_id].h_Dev,
  102529. + (t_FmMacStatistics *)&param))
  102530. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102531. +
  102532. + if (copy_to_user((ioc_fm_port_mac_statistics_t *)arg, &param,
  102533. + sizeof(ioc_fm_port_mac_statistics_t)))
  102534. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102535. +
  102536. + break;
  102537. + }
  102538. +
  102539. + case FM_PORT_IOC_GET_BMI_COUNTERS:
  102540. + {
  102541. + t_LnxWrpFmDev *p_LnxWrpFmDev =
  102542. + (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  102543. + ioc_fm_port_bmi_stats_t param;
  102544. +
  102545. + if (!p_LnxWrpFmDev)
  102546. + RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
  102547. +
  102548. + if (FM_PORT_GetBmiCounters(p_LnxWrpFmPortDev->h_Dev,
  102549. + (t_FmPortBmiStats *)&param))
  102550. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102551. +
  102552. + if (copy_to_user((ioc_fm_port_bmi_stats_t *)arg, &param,
  102553. + sizeof(ioc_fm_port_bmi_stats_t)))
  102554. + RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
  102555. +
  102556. + break;
  102557. + }
  102558. +
  102559. + default:
  102560. + RETURN_ERROR(MINOR, E_INVALID_SELECTION,
  102561. + ("invalid ioctl: cmd:0x%08x(type:0x%02x, nr:0x%02x.\n",
  102562. + cmd, _IOC_TYPE(cmd), _IOC_NR(cmd)));
  102563. + }
  102564. +
  102565. + if (err)
  102566. + RETURN_ERROR(MINOR, E_INVALID_OPERATION, ("IOCTL FM PORT"));
  102567. +
  102568. + return E_OK;
  102569. +}
  102570. +
  102571. +/*****************************************************************************/
  102572. +/* API routines for the FM Linux Device */
  102573. +/*****************************************************************************/
  102574. +
  102575. +static int fm_open(struct inode *inode, struct file *file)
  102576. +{
  102577. + t_LnxWrpFmDev *p_LnxWrpFmDev = NULL;
  102578. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = NULL;
  102579. + unsigned int major = imajor(inode);
  102580. + unsigned int minor = iminor(inode);
  102581. + struct device_node *fm_node;
  102582. + static struct of_device_id fm_node_of_match[] = {
  102583. + { .compatible = "fsl,fman", },
  102584. + { /* end of list */ },
  102585. + };
  102586. +
  102587. + DBG(TRACE, ("Opening minor - %d - ", minor));
  102588. +
  102589. + if (file->private_data != NULL)
  102590. + return 0;
  102591. +
  102592. + /* Get all the FM nodes */
  102593. + for_each_matching_node(fm_node, fm_node_of_match) {
  102594. + struct platform_device *of_dev;
  102595. +
  102596. + of_dev = of_find_device_by_node(fm_node);
  102597. + if (unlikely(of_dev == NULL)) {
  102598. + REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("fm id!"));
  102599. + return -ENXIO;
  102600. + }
  102601. +
  102602. + p_LnxWrpFmDev = (t_LnxWrpFmDev *)fm_bind(&of_dev->dev);
  102603. + if (p_LnxWrpFmDev->major == major)
  102604. + break;
  102605. + fm_unbind((struct fm *)p_LnxWrpFmDev);
  102606. + p_LnxWrpFmDev = NULL;
  102607. + }
  102608. +
  102609. + if (!p_LnxWrpFmDev)
  102610. + return -ENODEV;
  102611. +
  102612. + if (minor == DEV_FM_MINOR_BASE)
  102613. + file->private_data = p_LnxWrpFmDev;
  102614. + else if (minor == DEV_FM_PCD_MINOR_BASE)
  102615. + file->private_data = p_LnxWrpFmDev;
  102616. + else {
  102617. + if (minor == DEV_FM_OH_PORTS_MINOR_BASE)
  102618. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->hcPort;
  102619. + else if ((minor > DEV_FM_OH_PORTS_MINOR_BASE) && (minor < DEV_FM_RX_PORTS_MINOR_BASE))
  102620. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->opPorts[minor-DEV_FM_OH_PORTS_MINOR_BASE-1];
  102621. + else if ((minor >= DEV_FM_RX_PORTS_MINOR_BASE) && (minor < DEV_FM_TX_PORTS_MINOR_BASE))
  102622. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->rxPorts[minor-DEV_FM_RX_PORTS_MINOR_BASE];
  102623. + else if ((minor >= DEV_FM_TX_PORTS_MINOR_BASE) && (minor < DEV_FM_MAX_MINORS))
  102624. + p_LnxWrpFmPortDev = &p_LnxWrpFmDev->txPorts[minor-DEV_FM_TX_PORTS_MINOR_BASE];
  102625. + else
  102626. + return -EINVAL;
  102627. +
  102628. + /* if trying to open port, check if it initialized */
  102629. + if (!p_LnxWrpFmPortDev->h_Dev)
  102630. + return -ENODEV;
  102631. +
  102632. + p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *)fm_port_bind(p_LnxWrpFmPortDev->dev);
  102633. + file->private_data = p_LnxWrpFmPortDev;
  102634. + fm_unbind((struct fm *)p_LnxWrpFmDev);
  102635. + }
  102636. +
  102637. + if (file->private_data == NULL)
  102638. + return -ENXIO;
  102639. +
  102640. + return 0;
  102641. +}
  102642. +
  102643. +static int fm_close(struct inode *inode, struct file *file)
  102644. +{
  102645. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  102646. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
  102647. + unsigned int minor = iminor(inode);
  102648. + int err = 0;
  102649. +
  102650. + DBG(TRACE, ("Closing minor - %d - ", minor));
  102651. +
  102652. + if ((minor == DEV_FM_MINOR_BASE) ||
  102653. + (minor == DEV_FM_PCD_MINOR_BASE))
  102654. + {
  102655. + p_LnxWrpFmDev = (t_LnxWrpFmDev*)file->private_data;
  102656. + if (!p_LnxWrpFmDev)
  102657. + return -ENODEV;
  102658. + fm_unbind((struct fm *)p_LnxWrpFmDev);
  102659. + }
  102660. + else if (((minor >= DEV_FM_OH_PORTS_MINOR_BASE) && (minor < DEV_FM_RX_PORTS_MINOR_BASE)) ||
  102661. + ((minor >= DEV_FM_RX_PORTS_MINOR_BASE) && (minor < DEV_FM_TX_PORTS_MINOR_BASE)) ||
  102662. + ((minor >= DEV_FM_TX_PORTS_MINOR_BASE) && (minor < DEV_FM_MAX_MINORS)))
  102663. + {
  102664. + p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev*)file->private_data;
  102665. + if (!p_LnxWrpFmPortDev)
  102666. + return -ENODEV;
  102667. + fm_port_unbind((struct fm_port *)p_LnxWrpFmPortDev);
  102668. + }
  102669. +
  102670. + return err;
  102671. +}
  102672. +
  102673. +static int fm_ioctls(unsigned int minor, struct file *file, unsigned int cmd, unsigned long arg, bool compat)
  102674. +{
  102675. + DBG(TRACE, ("IOCTL minor - %u, cmd - 0x%08x, arg - 0x%08lx \n", minor, cmd, arg));
  102676. +
  102677. + if ((minor == DEV_FM_MINOR_BASE) ||
  102678. + (minor == DEV_FM_PCD_MINOR_BASE))
  102679. + {
  102680. + t_LnxWrpFmDev *p_LnxWrpFmDev = ((t_LnxWrpFmDev*)file->private_data);
  102681. + if (!p_LnxWrpFmDev)
  102682. + return -ENODEV;
  102683. + if (LnxwrpFmIOCTL(p_LnxWrpFmDev, cmd, arg, compat))
  102684. + return -EFAULT;
  102685. + }
  102686. + else if (((minor >= DEV_FM_OH_PORTS_MINOR_BASE) && (minor < DEV_FM_RX_PORTS_MINOR_BASE)) ||
  102687. + ((minor >= DEV_FM_RX_PORTS_MINOR_BASE) && (minor < DEV_FM_TX_PORTS_MINOR_BASE)) ||
  102688. + ((minor >= DEV_FM_TX_PORTS_MINOR_BASE) && (minor < DEV_FM_MAX_MINORS)))
  102689. + {
  102690. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = ((t_LnxWrpFmPortDev*)file->private_data);
  102691. + if (!p_LnxWrpFmPortDev)
  102692. + return -ENODEV;
  102693. + if (LnxwrpFmPortIOCTL(p_LnxWrpFmPortDev, cmd, arg, compat))
  102694. + return -EFAULT;
  102695. + }
  102696. + else
  102697. + {
  102698. + REPORT_ERROR(MINOR, E_INVALID_VALUE, ("minor"));
  102699. + return -ENODEV;
  102700. + }
  102701. +
  102702. + return 0;
  102703. +}
  102704. +
  102705. +#ifdef CONFIG_COMPAT
  102706. +static long fm_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  102707. +{
  102708. + unsigned int minor = iminor(file->f_path.dentry->d_inode);
  102709. + long res;
  102710. +
  102711. + fm_mutex_lock();
  102712. + res = fm_ioctls(minor, file, cmd, arg, true);
  102713. + fm_mutex_unlock();
  102714. +
  102715. + return res;
  102716. +}
  102717. +#endif
  102718. +
  102719. +static long fm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  102720. +{
  102721. + unsigned int minor = iminor(file->f_path.dentry->d_inode);
  102722. + long res;
  102723. +
  102724. + fm_mutex_lock();
  102725. + res = fm_ioctls(minor, file, cmd, arg, false);
  102726. + fm_mutex_unlock();
  102727. +
  102728. + return res;
  102729. +}
  102730. +
  102731. +/* Globals for FM character device */
  102732. +struct file_operations fm_fops =
  102733. +{
  102734. + .owner = THIS_MODULE,
  102735. + .unlocked_ioctl = fm_ioctl,
  102736. +#ifdef CONFIG_COMPAT
  102737. + .compat_ioctl = fm_compat_ioctl,
  102738. +#endif
  102739. + .open = fm_open,
  102740. + .release = fm_close,
  102741. +};
  102742. --- /dev/null
  102743. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c
  102744. @@ -0,0 +1,1300 @@
  102745. +/*
  102746. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  102747. + *
  102748. + * Redistribution and use in source and binary forms, with or without
  102749. + * modification, are permitted provided that the following conditions are met:
  102750. + * * Redistributions of source code must retain the above copyright
  102751. + * notice, this list of conditions and the following disclaimer.
  102752. + * * Redistributions in binary form must reproduce the above copyright
  102753. + * notice, this list of conditions and the following disclaimer in the
  102754. + * documentation and/or other materials provided with the distribution.
  102755. + * * Neither the name of Freescale Semiconductor nor the
  102756. + * names of its contributors may be used to endorse or promote products
  102757. + * derived from this software without specific prior written permission.
  102758. + *
  102759. + *
  102760. + * ALTERNATIVELY, this software may be distributed under the terms of the
  102761. + * GNU General Public License ("GPL") as published by the Free Software
  102762. + * Foundation, either version 2 of that License or (at your option) any
  102763. + * later version.
  102764. + *
  102765. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  102766. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  102767. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  102768. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  102769. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  102770. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  102771. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  102772. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  102773. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  102774. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  102775. + */
  102776. +
  102777. +/*
  102778. + @File lnxwrp_fm_compat_ioctls.c
  102779. +
  102780. + @Description FM PCD compat functions
  102781. +
  102782. +*/
  102783. +
  102784. +#if !defined(CONFIG_COMPAT)
  102785. +#error "missing COMPAT layer..."
  102786. +#endif
  102787. +
  102788. +
  102789. +#include <linux/kernel.h>
  102790. +#include <linux/module.h>
  102791. +#include <linux/fs.h>
  102792. +#include <linux/cdev.h>
  102793. +#include <linux/device.h>
  102794. +#include <linux/irq.h>
  102795. +#include <linux/interrupt.h>
  102796. +#include <linux/io.h>
  102797. +#include <linux/ioport.h>
  102798. +#include <asm/uaccess.h>
  102799. +#include <asm/errno.h>
  102800. +#ifndef CONFIG_FMAN_ARM
  102801. +#include <sysdev/fsl_soc.h>
  102802. +#endif
  102803. +
  102804. +#include "part_ext.h"
  102805. +#include "fm_ioctls.h"
  102806. +#include "fm_pcd_ioctls.h"
  102807. +#include "fm_port_ioctls.h"
  102808. +#include "lnxwrp_ioctls_fm_compat.h"
  102809. +
  102810. +#if defined(FM_COMPAT_DBG)
  102811. +static void hex_dump(void * p_addr, unsigned int size)
  102812. +{
  102813. + int i;
  102814. +
  102815. + for(i=0; i<size; i+=16)
  102816. + {
  102817. + printk("%p: 0x%08x 0x%08x 0x%08x 0x%08x\n", p_addr + i,
  102818. + *(unsigned int *)(p_addr + i),
  102819. + *(unsigned int *)(p_addr + i + 4),
  102820. + *(unsigned int *)(p_addr + i + 8),
  102821. + *(unsigned int *)(p_addr + i +12)
  102822. + );
  102823. + }
  102824. +}
  102825. +#endif
  102826. +
  102827. +/* maping kernel pointers w/ UserSpace id's { */
  102828. +struct map_node {
  102829. + void *ptr;
  102830. + u8 node_type;
  102831. +};
  102832. +
  102833. +static struct map_node compat_ptr2id_array[COMPAT_PTR2ID_ARRAY_MAX] = {{NULL},{FM_MAP_TYPE_UNSPEC}};
  102834. +
  102835. +void compat_del_ptr2id(void *p, enum fm_map_node_type node_type)
  102836. +{
  102837. + compat_uptr_t k;
  102838. +
  102839. + _fm_cpt_dbg(COMPAT_GENERIC, "delete (%p)\n", p);
  102840. +
  102841. + for(k=1; k < COMPAT_PTR2ID_ARRAY_MAX; k++)
  102842. + if(compat_ptr2id_array[k].ptr == p){
  102843. + compat_ptr2id_array[k].ptr = NULL;
  102844. + compat_ptr2id_array[k].node_type = FM_MAP_TYPE_UNSPEC;
  102845. + }
  102846. +}
  102847. +EXPORT_SYMBOL(compat_del_ptr2id);
  102848. +
  102849. +compat_uptr_t compat_add_ptr2id(void *p, enum fm_map_node_type node_type)
  102850. +{
  102851. + compat_uptr_t k;
  102852. +
  102853. + _fm_cpt_dbg(COMPAT_GENERIC, " (%p) do ->\n", p);
  102854. +
  102855. + if(!p)
  102856. + return 0;
  102857. +
  102858. + for(k=1; k < COMPAT_PTR2ID_ARRAY_MAX; k++)
  102859. + if(compat_ptr2id_array[k].ptr == NULL)
  102860. + {
  102861. + compat_ptr2id_array[k].ptr = p;
  102862. + compat_ptr2id_array[k].node_type = node_type;
  102863. + _fm_cpt_dbg(COMPAT_GENERIC, "0x%08x \n", k | COMPAT_PTR2ID_WATERMARK);
  102864. + return k | COMPAT_PTR2ID_WATERMARK;
  102865. + }
  102866. +
  102867. + printk(KERN_WARNING "FMan map list full! No more PCD space on kernel!\n");
  102868. + return 0;
  102869. +}
  102870. +EXPORT_SYMBOL(compat_add_ptr2id);
  102871. +
  102872. +compat_uptr_t compat_get_ptr2id(void *p, enum fm_map_node_type node_type)
  102873. +{
  102874. + compat_uptr_t k;
  102875. +
  102876. + _fm_cpt_dbg(COMPAT_GENERIC, " (%p) get -> \n", p);
  102877. +
  102878. + for(k=1; k < COMPAT_PTR2ID_ARRAY_MAX; k++)
  102879. + if(compat_ptr2id_array[k].ptr == p &&
  102880. + compat_ptr2id_array[k].node_type == node_type) {
  102881. +
  102882. + _fm_cpt_dbg(COMPAT_GENERIC, "0x%08x\n", k | COMPAT_PTR2ID_WATERMARK);
  102883. + return k | COMPAT_PTR2ID_WATERMARK;
  102884. + }
  102885. +
  102886. + return 0;
  102887. +}
  102888. +EXPORT_SYMBOL(compat_get_ptr2id);
  102889. +
  102890. +void *compat_get_id2ptr(compat_uptr_t comp, enum fm_map_node_type node_type)
  102891. +{
  102892. +
  102893. + _fm_cpt_dbg(COMPAT_GENERIC, " (0x%08x) get -> \n", comp);
  102894. +
  102895. + if((COMPAT_PTR2ID_WM_MASK & comp) != COMPAT_PTR2ID_WATERMARK) {
  102896. + _fm_cpt_dbg(COMPAT_GENERIC, "Error, invalid watermark (0x%08x)!\n\n", comp);
  102897. + dump_stack();
  102898. + return compat_ptr(comp);
  102899. + }
  102900. +
  102901. + comp &= ~COMPAT_PTR2ID_WM_MASK;
  102902. +
  102903. + if(((0 < comp) && (comp < COMPAT_PTR2ID_ARRAY_MAX) && (compat_ptr2id_array[comp].ptr != NULL)
  102904. + && compat_ptr2id_array[comp].node_type == node_type)) {
  102905. + _fm_cpt_dbg(COMPAT_GENERIC, "%p\n", compat_ptr2id_array[comp].ptr);
  102906. + return compat_ptr2id_array[comp].ptr;
  102907. + }
  102908. + return NULL;
  102909. +}
  102910. +EXPORT_SYMBOL(compat_get_id2ptr);
  102911. +/* } maping kernel pointers w/ UserSpace id's */
  102912. +
  102913. +void compat_obj_delete(
  102914. + ioc_compat_fm_obj_t *compat_id,
  102915. + ioc_fm_obj_t *id)
  102916. +{
  102917. + id->obj = compat_pcd_id2ptr(compat_id->obj);
  102918. + compat_del_ptr2id(id->obj, FM_MAP_TYPE_PCD_NODE);
  102919. +}
  102920. +
  102921. +static inline void compat_copy_fm_pcd_plcr_next_engine(
  102922. + ioc_compat_fm_pcd_plcr_next_engine_params_u *compat_param,
  102923. + ioc_fm_pcd_plcr_next_engine_params_u *param,
  102924. + ioc_fm_pcd_engine next_engine,
  102925. + uint8_t compat)
  102926. +{
  102927. + _fm_cpt_dbg (compat, " {->...\n");
  102928. +
  102929. + switch (next_engine)
  102930. + {
  102931. + case e_IOC_FM_PCD_PLCR:
  102932. + if (compat == COMPAT_US_TO_K)
  102933. + param->p_profile = compat_pcd_id2ptr(compat_param->p_profile);
  102934. + else
  102935. + compat_param->p_profile = compat_pcd_ptr2id(param->p_profile);
  102936. + break;
  102937. + case e_IOC_FM_PCD_KG:
  102938. + if (compat == COMPAT_US_TO_K)
  102939. + param->p_direct_scheme = compat_pcd_id2ptr(compat_param->p_direct_scheme);
  102940. + else
  102941. + compat_param->p_direct_scheme = compat_pcd_ptr2id(param->p_direct_scheme);
  102942. + break;
  102943. + default:
  102944. + if (compat == COMPAT_US_TO_K)
  102945. + param->action = compat_param->action;
  102946. + else
  102947. + compat_param->action = param->action;
  102948. + break;
  102949. + }
  102950. +
  102951. + _fm_cpt_dbg (compat, " ...->}\n");
  102952. +}
  102953. +
  102954. +void compat_copy_fm_pcd_plcr_profile(
  102955. + ioc_compat_fm_pcd_plcr_profile_params_t *compat_param,
  102956. + ioc_fm_pcd_plcr_profile_params_t *param,
  102957. + uint8_t compat)
  102958. +{
  102959. + _fm_cpt_dbg (compat, " {->...\n");
  102960. +
  102961. + if (compat == COMPAT_US_TO_K)
  102962. + {
  102963. + param->modify = compat_param->modify;
  102964. +
  102965. + /* profile_select */
  102966. + if (!compat_param->modify)
  102967. + {
  102968. + param->profile_select.new_params.profile_type =
  102969. + compat_param->profile_select.new_params.profile_type;
  102970. + param->profile_select.new_params.p_fm_port =
  102971. + compat_ptr(compat_param->profile_select.new_params.p_fm_port);
  102972. + param->profile_select.new_params.relative_profile_id =
  102973. + compat_param->profile_select.new_params.relative_profile_id;
  102974. + }
  102975. + else
  102976. + param->profile_select.p_profile =
  102977. + compat_pcd_id2ptr(compat_param->profile_select.p_profile);
  102978. +
  102979. + param->alg_selection = compat_param->alg_selection;
  102980. + param->color_mode = compat_param->color_mode;
  102981. +
  102982. + /* both parameters in the union has the same size, so memcpy works */
  102983. + memcpy(&param->color, &compat_param->color, sizeof(param->color));
  102984. +
  102985. + memcpy(&param->non_passthrough_alg_param,
  102986. + &compat_param->non_passthrough_alg_param,
  102987. + sizeof(ioc_fm_pcd_plcr_non_passthrough_alg_param_t));
  102988. +
  102989. + param->next_engine_on_green = compat_param->next_engine_on_green;
  102990. + param->next_engine_on_yellow = compat_param->next_engine_on_yellow;
  102991. + param->next_engine_on_red = compat_param->next_engine_on_red;
  102992. +
  102993. + param->trap_profile_on_flow_A = compat_param->trap_profile_on_flow_A;
  102994. + param->trap_profile_on_flow_B = compat_param->trap_profile_on_flow_B;
  102995. + param->trap_profile_on_flow_C = compat_param->trap_profile_on_flow_C;
  102996. + }
  102997. + else
  102998. + {
  102999. + compat_param->modify = param->modify;
  103000. +
  103001. + /* profile_select */
  103002. + if (!param->modify)
  103003. + {
  103004. + compat_param->profile_select.new_params.profile_type =
  103005. + param->profile_select.new_params.profile_type;
  103006. + compat_param->profile_select.new_params.p_fm_port =
  103007. + ptr_to_compat(param->profile_select.new_params.p_fm_port);
  103008. + compat_param->profile_select.new_params.relative_profile_id =
  103009. + param->profile_select.new_params.relative_profile_id;
  103010. + }
  103011. + else
  103012. + compat_param->profile_select.p_profile =
  103013. + compat_pcd_ptr2id(param->profile_select.p_profile);
  103014. +
  103015. + compat_param->alg_selection = param->alg_selection;
  103016. + compat_param->color_mode = param->color_mode;
  103017. +
  103018. + /* both parameters in the union has the same size, so memcpy works */
  103019. + memcpy(&compat_param->color, &param->color, sizeof(compat_param->color));
  103020. +
  103021. + memcpy(&compat_param->non_passthrough_alg_param,
  103022. + &param->non_passthrough_alg_param,
  103023. + sizeof(ioc_fm_pcd_plcr_non_passthrough_alg_param_t));
  103024. +
  103025. + compat_param->next_engine_on_green = param->next_engine_on_green;
  103026. + compat_param->next_engine_on_yellow = param->next_engine_on_yellow;
  103027. + compat_param->next_engine_on_red = param->next_engine_on_red;
  103028. +
  103029. + compat_param->trap_profile_on_flow_A = param->trap_profile_on_flow_A;
  103030. + compat_param->trap_profile_on_flow_B = param->trap_profile_on_flow_B;
  103031. + compat_param->trap_profile_on_flow_C = param->trap_profile_on_flow_C;
  103032. +
  103033. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103034. + }
  103035. +
  103036. + compat_copy_fm_pcd_plcr_next_engine(&compat_param->params_on_green,
  103037. + &param->params_on_green, param->next_engine_on_green, compat);
  103038. +
  103039. + compat_copy_fm_pcd_plcr_next_engine(&compat_param->params_on_yellow,
  103040. + &param->params_on_yellow, param->next_engine_on_yellow, compat);
  103041. +
  103042. + compat_copy_fm_pcd_plcr_next_engine(&compat_param->params_on_red,
  103043. + &param->params_on_red, param->next_engine_on_red, compat);
  103044. +
  103045. + _fm_cpt_dbg (compat, " ...->}\n");
  103046. +}
  103047. +
  103048. +static inline void compat_copy_fm_pcd_cc_next_kg(
  103049. + ioc_compat_fm_pcd_cc_next_kg_params_t *compat_param,
  103050. + ioc_fm_pcd_cc_next_kg_params_t *param,
  103051. + uint8_t compat)
  103052. +{
  103053. + _fm_cpt_dbg (compat, " {->...\n");
  103054. +
  103055. + if (compat == COMPAT_US_TO_K)
  103056. + {
  103057. + param->new_fqid = compat_param->new_fqid;
  103058. + param->override_fqid = compat_param->override_fqid;
  103059. +#if DPAA_VERSION >= 11
  103060. + param->new_relative_storage_profile_id = compat_param->new_relative_storage_profile_id;
  103061. +#endif
  103062. + param->p_direct_scheme = compat_pcd_id2ptr(compat_param->p_direct_scheme);
  103063. + }
  103064. + else
  103065. + {
  103066. + compat_param->new_fqid = param->new_fqid;
  103067. + compat_param->override_fqid = param->override_fqid;
  103068. +#if DPAA_VERSION >= 11
  103069. + compat_param->new_relative_storage_profile_id = param->new_relative_storage_profile_id;
  103070. +#endif
  103071. + compat_param->p_direct_scheme = compat_pcd_ptr2id(param->p_direct_scheme);
  103072. + }
  103073. +
  103074. + _fm_cpt_dbg (compat, " ...->}\n");
  103075. +}
  103076. +
  103077. +static inline void compat_copy_fm_pcd_cc_next_cc(
  103078. + ioc_compat_fm_pcd_cc_next_cc_params_t *compat_param,
  103079. + ioc_fm_pcd_cc_next_cc_params_t *param,
  103080. + uint8_t compat)
  103081. +{
  103082. + _fm_cpt_dbg (compat, " {->...\n");
  103083. +
  103084. + if (compat == COMPAT_US_TO_K)
  103085. + param->cc_node_id = compat_pcd_id2ptr(compat_param->cc_node_id);
  103086. + else
  103087. + compat_param->cc_node_id = compat_pcd_ptr2id(param->cc_node_id);
  103088. +
  103089. + _fm_cpt_dbg (compat, " ...->}\n");
  103090. +}
  103091. +
  103092. +static inline void compat_copy_fm_pcd_cc_next_engine(
  103093. + ioc_compat_fm_pcd_cc_next_engine_params_t *compat_param,
  103094. + ioc_fm_pcd_cc_next_engine_params_t *param,
  103095. + uint8_t compat)
  103096. +{
  103097. + _fm_cpt_dbg (compat, " {->...\n");
  103098. +
  103099. + if (compat == COMPAT_US_TO_K)
  103100. + {
  103101. + param->next_engine = compat_param->next_engine;
  103102. + if (param->next_engine != e_IOC_FM_PCD_INVALID )
  103103. + _fm_cpt_dbg(compat, " param->next_engine = %i \n", param->next_engine);
  103104. +
  103105. + switch (param->next_engine)
  103106. + {
  103107. +#if DPAA_VERSION >= 11
  103108. + case e_IOC_FM_PCD_FR:
  103109. + param->params.fr_params.frm_replic_id = compat_pcd_id2ptr(compat_param->params.fr_params.frm_replic_id);
  103110. + break;
  103111. +#endif /* DPAA_VERSION >= 11 */
  103112. + case e_IOC_FM_PCD_CC:
  103113. + param->manip_id = compat_pcd_id2ptr(compat_param->manip_id);
  103114. + compat_copy_fm_pcd_cc_next_cc(&compat_param->params.cc_params, &param->params.cc_params, compat);
  103115. + break;
  103116. + case e_IOC_FM_PCD_KG:
  103117. + param->manip_id = compat_pcd_id2ptr(compat_param->manip_id);
  103118. + compat_copy_fm_pcd_cc_next_kg(&compat_param->params.kg_params, &param->params.kg_params, compat);
  103119. + break;
  103120. + case e_IOC_FM_PCD_DONE:
  103121. + case e_IOC_FM_PCD_PLCR:
  103122. + param->manip_id = compat_pcd_id2ptr(compat_param->manip_id);
  103123. + default:
  103124. + memcpy(&param->params, &compat_param->params, sizeof(param->params));
  103125. + }
  103126. + param->statistics_en = compat_param->statistics_en;
  103127. + }
  103128. + else
  103129. + {
  103130. + compat_param->next_engine = param->next_engine;
  103131. +
  103132. + switch (compat_param->next_engine)
  103133. + {
  103134. +#if DPAA_VERSION >= 11
  103135. + case e_IOC_FM_PCD_FR:
  103136. + compat_param->params.fr_params.frm_replic_id = compat_pcd_ptr2id(param->params.fr_params.frm_replic_id);
  103137. + break;
  103138. +#endif /* DPAA_VERSION >= 11 */
  103139. + case e_IOC_FM_PCD_CC:
  103140. + compat_param->manip_id = compat_pcd_ptr2id(param->manip_id);
  103141. + compat_copy_fm_pcd_cc_next_cc(&compat_param->params.cc_params, &param->params.cc_params, compat);
  103142. + break;
  103143. + case e_IOC_FM_PCD_KG:
  103144. + compat_param->manip_id = compat_pcd_ptr2id(param->manip_id);
  103145. + compat_copy_fm_pcd_cc_next_kg(&compat_param->params.kg_params, &param->params.kg_params, compat);
  103146. + break;
  103147. + case e_IOC_FM_PCD_DONE:
  103148. + case e_IOC_FM_PCD_PLCR:
  103149. + compat_param->manip_id = compat_pcd_ptr2id(param->manip_id);
  103150. + default:
  103151. + memcpy(&compat_param->params, &param->params, sizeof(compat_param->params));
  103152. + }
  103153. + compat_param->statistics_en = param->statistics_en;
  103154. + }
  103155. +
  103156. + _fm_cpt_dbg (compat, " ...->}\n");
  103157. +}
  103158. +
  103159. +void compat_copy_fm_pcd_cc_key(
  103160. + ioc_compat_fm_pcd_cc_key_params_t *compat_param,
  103161. + ioc_fm_pcd_cc_key_params_t *param,
  103162. + uint8_t compat)
  103163. +{
  103164. + if (compat == COMPAT_US_TO_K)
  103165. + {
  103166. + param->p_key = compat_ptr(compat_param->p_key);
  103167. + param->p_mask = compat_ptr(compat_param->p_mask);
  103168. + }
  103169. + else
  103170. + {
  103171. + compat_param->p_key = ptr_to_compat(param->p_key);
  103172. + compat_param->p_mask = ptr_to_compat(param->p_mask);
  103173. + }
  103174. +
  103175. + compat_copy_fm_pcd_cc_next_engine(
  103176. + &compat_param->cc_next_engine_params,
  103177. + &param->cc_next_engine_params,
  103178. + compat);
  103179. +}
  103180. +
  103181. +void compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(
  103182. + ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *compat_param,
  103183. + ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *param,
  103184. + uint8_t compat)
  103185. +{
  103186. + if (compat == COMPAT_US_TO_K)
  103187. + {
  103188. + param->id = compat_pcd_id2ptr(compat_param->id);
  103189. + param->key_indx = compat_param->key_indx;
  103190. + param->key_size = compat_param->key_size;
  103191. + compat_copy_fm_pcd_cc_key(
  103192. + &compat_param->key_params,
  103193. + &param->key_params,
  103194. + compat);
  103195. + }
  103196. + else
  103197. + {
  103198. + compat_param->id = compat_pcd_ptr2id(param->id);
  103199. + compat_param->key_indx = param->key_indx;
  103200. + compat_param->key_size = param->key_size;
  103201. + compat_copy_fm_pcd_cc_key(
  103202. + &compat_param->key_params,
  103203. + &param->key_params,
  103204. + compat);
  103205. + }
  103206. +}
  103207. +
  103208. +void compat_copy_fm_pcd_cc_node_modify_next_engine(
  103209. + ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *compat_param,
  103210. + ioc_fm_pcd_cc_node_modify_next_engine_params_t *param,
  103211. + uint8_t compat)
  103212. +{
  103213. + if (compat == COMPAT_US_TO_K)
  103214. + {
  103215. + param->id = compat_pcd_id2ptr(compat_param->id);
  103216. + param->key_indx = compat_param->key_indx;
  103217. + param->key_size = compat_param->key_size;
  103218. + }
  103219. + else
  103220. + {
  103221. + compat_param->id = compat_pcd_ptr2id(param->id);
  103222. + compat_param->key_indx = param->key_indx;
  103223. + compat_param->key_size = param->key_size;
  103224. + }
  103225. +
  103226. + compat_copy_fm_pcd_cc_next_engine(
  103227. + &compat_param->cc_next_engine_params,
  103228. + &param->cc_next_engine_params,
  103229. + compat);
  103230. +}
  103231. +
  103232. +void compat_fm_pcd_cc_tree_modify_next_engine(
  103233. + ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *compat_param,
  103234. + ioc_fm_pcd_cc_tree_modify_next_engine_params_t *param,
  103235. + uint8_t compat)
  103236. +{
  103237. + if (compat == COMPAT_US_TO_K)
  103238. + {
  103239. + param->id = compat_pcd_id2ptr(compat_param->id);
  103240. + param->grp_indx = compat_param->grp_indx;
  103241. + param->indx = compat_param->indx;
  103242. + }
  103243. + else
  103244. + {
  103245. + compat_param->id = compat_pcd_ptr2id(param->id);
  103246. + compat_param->grp_indx = param->grp_indx;
  103247. + compat_param->indx = param->indx;
  103248. + }
  103249. +
  103250. + compat_copy_fm_pcd_cc_next_engine(
  103251. + &compat_param->cc_next_engine_params,
  103252. + &param->cc_next_engine_params,
  103253. + compat);
  103254. +}
  103255. +
  103256. +void compat_copy_fm_pcd_hash_table(
  103257. + ioc_compat_fm_pcd_hash_table_params_t *compat_param,
  103258. + ioc_fm_pcd_hash_table_params_t *param,
  103259. + uint8_t compat)
  103260. +{
  103261. + if (compat == COMPAT_US_TO_K)
  103262. + {
  103263. + param->max_num_of_keys = compat_param->max_num_of_keys;
  103264. + param->statistics_mode = compat_param->statistics_mode;
  103265. + param->kg_hash_shift = compat_param->kg_hash_shift;
  103266. + param->hash_res_mask = compat_param->hash_res_mask;
  103267. + param->hash_shift = compat_param->hash_shift;
  103268. + param->match_key_size = compat_param->match_key_size;
  103269. + param->id = compat_pcd_id2ptr(compat_param->id);
  103270. + }
  103271. + else
  103272. + {
  103273. + compat_param->max_num_of_keys = param->max_num_of_keys;
  103274. + compat_param->statistics_mode = param->statistics_mode;
  103275. + compat_param->kg_hash_shift = param->kg_hash_shift;
  103276. + compat_param->hash_res_mask = param->hash_res_mask;
  103277. + compat_param->hash_shift = param->hash_shift;
  103278. + compat_param->match_key_size = param->match_key_size;
  103279. +
  103280. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103281. + }
  103282. +
  103283. + compat_copy_fm_pcd_cc_next_engine(
  103284. + &compat_param->cc_next_engine_params_for_miss,
  103285. + &param->cc_next_engine_params_for_miss,
  103286. + compat);
  103287. +}
  103288. +
  103289. +void compat_copy_fm_pcd_cc_grp(
  103290. + ioc_compat_fm_pcd_cc_grp_params_t *compat_param,
  103291. + ioc_fm_pcd_cc_grp_params_t *param,
  103292. + uint8_t compat)
  103293. +{
  103294. + int k;
  103295. +
  103296. + _fm_cpt_dbg (compat, " {->...\n");
  103297. +
  103298. + if (compat == COMPAT_US_TO_K)
  103299. + {
  103300. + param->num_of_distinction_units = compat_param->num_of_distinction_units;
  103301. + memcpy(param->unit_ids, compat_param->unit_ids, IOC_FM_PCD_MAX_NUM_OF_CC_UNITS);
  103302. + }
  103303. + else
  103304. + {
  103305. + compat_param->num_of_distinction_units = param->num_of_distinction_units;
  103306. + memcpy(compat_param->unit_ids, param->unit_ids, IOC_FM_PCD_MAX_NUM_OF_CC_UNITS);
  103307. + }
  103308. +
  103309. + for (k=0; k < IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP; k++)
  103310. + compat_copy_fm_pcd_cc_next_engine(
  103311. + &compat_param->next_engine_per_entries_in_grp[k],
  103312. + &param->next_engine_per_entries_in_grp[k],
  103313. + compat);
  103314. +
  103315. + _fm_cpt_dbg (compat, " ...->}\n");
  103316. +}
  103317. +
  103318. +void compat_copy_fm_pcd_cc_tree(
  103319. + ioc_compat_fm_pcd_cc_tree_params_t *compat_param,
  103320. + ioc_fm_pcd_cc_tree_params_t *param,
  103321. + uint8_t compat)
  103322. +{
  103323. + int k;
  103324. + _fm_cpt_dbg (compat, " {->...\n");
  103325. +
  103326. + if (compat == COMPAT_US_TO_K)
  103327. + {
  103328. + param->net_env_id = compat_pcd_id2ptr(compat_param->net_env_id);
  103329. + param->num_of_groups = compat_param->num_of_groups;
  103330. + }
  103331. + else
  103332. + {
  103333. + compat_param->net_env_id = compat_pcd_ptr2id(param->net_env_id);
  103334. + compat_param->num_of_groups = param->num_of_groups;
  103335. +
  103336. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103337. + }
  103338. +
  103339. + for (k=0; k < IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS; k++)
  103340. + compat_copy_fm_pcd_cc_grp(
  103341. + &compat_param->fm_pcd_cc_group_params[k],
  103342. + &param->fm_pcd_cc_group_params[k],
  103343. + compat);
  103344. +
  103345. + _fm_cpt_dbg (compat, " ...->}\n");
  103346. +}
  103347. +
  103348. +void compat_fm_pcd_prs_sw(
  103349. + ioc_compat_fm_pcd_prs_sw_params_t *compat_param,
  103350. + ioc_fm_pcd_prs_sw_params_t *param,
  103351. + uint8_t compat)
  103352. +{
  103353. + if (compat == COMPAT_US_TO_K)
  103354. + {
  103355. + param->override = compat_param->override;
  103356. + param->size = compat_param->size;
  103357. + param->base = compat_param->base;
  103358. + param->p_code = compat_ptr(compat_param->p_code);
  103359. + memcpy(param->sw_prs_data_params,compat_param->sw_prs_data_params,IOC_FM_PCD_PRS_NUM_OF_HDRS*sizeof(uint32_t));
  103360. + param->num_of_labels = compat_param->num_of_labels;
  103361. + memcpy(param->labels_table,compat_param->labels_table,IOC_FM_PCD_PRS_NUM_OF_LABELS*sizeof(ioc_fm_pcd_prs_label_params_t));
  103362. + }
  103363. +}
  103364. +
  103365. +void compat_copy_fm_pcd_kg_scheme(
  103366. + ioc_compat_fm_pcd_kg_scheme_params_t *compat_param,
  103367. + ioc_fm_pcd_kg_scheme_params_t *param,
  103368. + uint8_t compat)
  103369. +{
  103370. + _fm_cpt_dbg(compat," {->...\n");
  103371. +
  103372. + if (compat == COMPAT_US_TO_K)
  103373. + {
  103374. + param->modify = compat_param->modify;
  103375. +
  103376. + /* scm_id */
  103377. + if (compat_param->modify)
  103378. + {
  103379. + param->scm_id.scheme_id = compat_pcd_id2ptr(compat_param->scm_id.scheme_id);
  103380. + _fm_cpt_dbg(compat," param->scm_id.scheme_id = %p \n", param->scm_id.scheme_id);
  103381. + }
  103382. + else
  103383. + param->scm_id.relative_scheme_id = compat_param->scm_id.relative_scheme_id;
  103384. +
  103385. + param->always_direct = compat_param->always_direct;
  103386. + /* net_env_params */
  103387. + param->net_env_params.net_env_id = compat_pcd_id2ptr(compat_param->net_env_params.net_env_id);
  103388. + param->net_env_params.num_of_distinction_units = compat_param->net_env_params.num_of_distinction_units;
  103389. + memcpy(param->net_env_params.unit_ids,
  103390. + compat_param->net_env_params.unit_ids,
  103391. + IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  103392. +
  103393. + param->use_hash = compat_param->use_hash;
  103394. + memcpy(&param->key_extract_and_hash_params,
  103395. + &compat_param->key_extract_and_hash_params,
  103396. + sizeof(ioc_fm_pcd_kg_key_extract_and_hash_params_t));
  103397. + param->bypass_fqid_generation = compat_param->bypass_fqid_generation;
  103398. + param->base_fqid = compat_param->base_fqid;
  103399. +#if DPAA_VERSION >= 11
  103400. + param->override_storage_profile =
  103401. + compat_param->override_storage_profile;
  103402. + param->storage_profile = compat_param->storage_profile;
  103403. +#endif
  103404. + param->num_of_used_extracted_ors = compat_param->num_of_used_extracted_ors;
  103405. + memcpy(param->extracted_ors,
  103406. + compat_param->extracted_ors,
  103407. + IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS * sizeof(ioc_fm_pcd_kg_extracted_or_params_t));
  103408. + param->next_engine = compat_param->next_engine;
  103409. +
  103410. + /* kg_next_engine_params */
  103411. + if (param->next_engine == e_IOC_FM_PCD_CC)
  103412. + {
  103413. + param->kg_next_engine_params.cc.tree_id = compat_pcd_id2ptr(compat_param->kg_next_engine_params.cc.tree_id);
  103414. + param->kg_next_engine_params.cc.grp_id = compat_param->kg_next_engine_params.cc.grp_id;
  103415. + param->kg_next_engine_params.cc.plcr_next = compat_param->kg_next_engine_params.cc.plcr_next;
  103416. + param->kg_next_engine_params.cc.bypass_plcr_profile_generation
  103417. + = compat_param->kg_next_engine_params.cc.bypass_plcr_profile_generation;
  103418. + memcpy(&param->kg_next_engine_params.cc.plcr_profile,
  103419. + &compat_param->kg_next_engine_params.cc.plcr_profile,
  103420. + sizeof(ioc_fm_pcd_kg_plcr_profile_t));
  103421. + }
  103422. + else
  103423. + memcpy(&param->kg_next_engine_params,
  103424. + &compat_param->kg_next_engine_params,
  103425. + sizeof(param->kg_next_engine_params));
  103426. +
  103427. + memcpy(&param->scheme_counter,
  103428. + &compat_param->scheme_counter,
  103429. + sizeof(ioc_fm_pcd_kg_scheme_counter_t));
  103430. + }
  103431. + else
  103432. + {
  103433. + compat_param->modify = param->modify;
  103434. +
  103435. + /* scm_id */
  103436. + if (param->modify)
  103437. + compat_param->scm_id.scheme_id = compat_pcd_ptr2id(param->scm_id.scheme_id);
  103438. + else
  103439. + compat_param->scm_id.relative_scheme_id = param->scm_id.relative_scheme_id;
  103440. +
  103441. + compat_param->always_direct = param->always_direct;
  103442. +
  103443. + /* net_env_params */
  103444. + compat_param->net_env_params.net_env_id = compat_pcd_ptr2id(param->net_env_params.net_env_id);
  103445. + compat_param->net_env_params.num_of_distinction_units = param->net_env_params.num_of_distinction_units;
  103446. + memcpy(compat_param->net_env_params.unit_ids, param->net_env_params.unit_ids, IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  103447. +
  103448. + compat_param->use_hash = param->use_hash;
  103449. + memcpy(&compat_param->key_extract_and_hash_params, &param->key_extract_and_hash_params, sizeof(ioc_fm_pcd_kg_key_extract_and_hash_params_t));
  103450. + compat_param->bypass_fqid_generation = param->bypass_fqid_generation;
  103451. + compat_param->base_fqid = param->base_fqid;
  103452. +#if DPAA_VERSION >= 11
  103453. + compat_param->override_storage_profile =
  103454. + param->override_storage_profile;
  103455. + compat_param->storage_profile = param->storage_profile;
  103456. +#endif
  103457. + compat_param->num_of_used_extracted_ors = param->num_of_used_extracted_ors;
  103458. + memcpy(compat_param->extracted_ors, param->extracted_ors, IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS * sizeof(ioc_fm_pcd_kg_extracted_or_params_t));
  103459. + compat_param->next_engine = param->next_engine;
  103460. +
  103461. + /* kg_next_engine_params */
  103462. + if (compat_param->next_engine == e_IOC_FM_PCD_CC)
  103463. + {
  103464. + compat_param->kg_next_engine_params.cc.tree_id = compat_pcd_ptr2id(param->kg_next_engine_params.cc.tree_id);
  103465. + compat_param->kg_next_engine_params.cc.grp_id = param->kg_next_engine_params.cc.grp_id;
  103466. + compat_param->kg_next_engine_params.cc.plcr_next = param->kg_next_engine_params.cc.plcr_next;
  103467. + compat_param->kg_next_engine_params.cc.bypass_plcr_profile_generation
  103468. + = param->kg_next_engine_params.cc.bypass_plcr_profile_generation;
  103469. + memcpy(&compat_param->kg_next_engine_params.cc.plcr_profile,
  103470. + &param->kg_next_engine_params.cc.plcr_profile,
  103471. + sizeof(ioc_fm_pcd_kg_plcr_profile_t));
  103472. + }
  103473. + else
  103474. + memcpy(&param->kg_next_engine_params, &compat_param->kg_next_engine_params, sizeof(compat_param->kg_next_engine_params));
  103475. +
  103476. + memcpy(&compat_param->scheme_counter, &param->scheme_counter, sizeof(ioc_fm_pcd_kg_scheme_counter_t));
  103477. +
  103478. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103479. + }
  103480. +
  103481. + _fm_cpt_dbg(compat," ...->}\n");
  103482. +}
  103483. +
  103484. +void compat_copy_fm_pcd_kg_scheme_spc(
  103485. + ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param,
  103486. + ioc_fm_pcd_kg_scheme_spc_t *param,
  103487. + uint8_t compat)
  103488. +{
  103489. + if (compat == COMPAT_US_TO_K)
  103490. + {
  103491. + param->id = compat_pcd_id2ptr(compat_param->id);
  103492. + param->val = compat_param->val;
  103493. + } else {
  103494. + compat_param->id = compat_pcd_ptr2id(param->id);
  103495. + compat_param->val = param->val;
  103496. + }
  103497. +}
  103498. +
  103499. +
  103500. +void compat_copy_fm_pcd_kg_scheme_select(
  103501. + ioc_compat_fm_pcd_kg_scheme_select_t *compat_param,
  103502. + ioc_fm_pcd_kg_scheme_select_t *param,
  103503. + uint8_t compat)
  103504. +{
  103505. + if (compat == COMPAT_US_TO_K)
  103506. + {
  103507. + param->direct = compat_param->direct;
  103508. + if (param->direct)
  103509. + param->scheme_id = compat_pcd_id2ptr(compat_param->scheme_id);
  103510. + }
  103511. +}
  103512. +
  103513. +void compat_copy_fm_pcd_kg_schemes_params(
  103514. + ioc_compat_fm_pcd_port_schemes_params_t *compat_param,
  103515. + ioc_fm_pcd_port_schemes_params_t *param,
  103516. + uint8_t compat)
  103517. +{
  103518. + int k;
  103519. +
  103520. + if (compat == COMPAT_US_TO_K) {
  103521. + param->num_of_schemes = compat_param->num_of_schemes;
  103522. + for(k=0; k < compat_param->num_of_schemes; k++)
  103523. + param->scheme_ids[k] = compat_pcd_id2ptr(compat_param->scheme_ids[k]);
  103524. + }
  103525. +}
  103526. +
  103527. +void compat_copy_fm_port_pcd_cc(
  103528. + ioc_compat_fm_port_pcd_cc_params_t *compat_cc_params ,
  103529. + ioc_fm_port_pcd_cc_params_t *p_cc_params,
  103530. + uint8_t compat)
  103531. +{
  103532. + if (compat == COMPAT_US_TO_K){
  103533. + p_cc_params->cc_tree_id = compat_pcd_id2ptr(compat_cc_params->cc_tree_id);
  103534. + }
  103535. +}
  103536. +
  103537. +void compat_copy_fm_port_pcd_kg(
  103538. + ioc_compat_fm_port_pcd_kg_params_t *compat_param,
  103539. + ioc_fm_port_pcd_kg_params_t *param,
  103540. + uint8_t compat)
  103541. +{
  103542. + if (compat == COMPAT_US_TO_K){
  103543. + uint8_t k;
  103544. +
  103545. + param->num_of_schemes = compat_param->num_of_schemes;
  103546. + for(k=0; k<compat_param->num_of_schemes; k++)
  103547. + param->scheme_ids[k] = compat_pcd_id2ptr(compat_param->scheme_ids[k]);
  103548. +
  103549. + param->direct_scheme = compat_param->direct_scheme;
  103550. + if (param->direct_scheme)
  103551. + param->direct_scheme_id = compat_pcd_id2ptr(compat_param->direct_scheme_id);
  103552. + }
  103553. +}
  103554. +
  103555. +void compat_copy_fm_port_pcd(
  103556. + ioc_compat_fm_port_pcd_params_t *compat_param,
  103557. + ioc_fm_port_pcd_params_t *param,
  103558. + uint8_t compat)
  103559. +{
  103560. + if (compat == COMPAT_US_TO_K)
  103561. + {
  103562. + ioc_fm_port_pcd_prs_params_t *same_port_pcd_prs_params;
  103563. + ioc_compat_fm_port_pcd_cc_params_t *compat_port_pcd_cc_params;
  103564. + ioc_compat_fm_port_pcd_kg_params_t *compat_port_pcd_kg_params;
  103565. + ioc_compat_fm_port_pcd_plcr_params_t *compat_port_pcd_plcr_params;
  103566. +
  103567. + same_port_pcd_prs_params = (ioc_fm_port_pcd_prs_params_t *) (compat_param + 1);
  103568. + compat_port_pcd_cc_params = (ioc_compat_fm_port_pcd_cc_params_t *) (same_port_pcd_prs_params + 1);
  103569. + compat_port_pcd_kg_params = (ioc_compat_fm_port_pcd_kg_params_t *) (compat_port_pcd_cc_params + 1);
  103570. + compat_port_pcd_plcr_params = (ioc_compat_fm_port_pcd_plcr_params_t *) (compat_port_pcd_kg_params + 1);
  103571. +
  103572. + _fm_cpt_dbg(compat,"\n param->p_prs_params=%p \n", param->p_prs_params);
  103573. + _fm_cpt_dbg(compat," param->p_cc_params=%p \n", param->p_cc_params);
  103574. + _fm_cpt_dbg(compat," param->p_kg_params=%p \n", param->p_kg_params);
  103575. + _fm_cpt_dbg(compat," param->p_plcr_params=%p \n", param->p_plcr_params);
  103576. + _fm_cpt_dbg(compat," param->p_ip_reassembly_manip=%p \n", param->p_ip_reassembly_manip);
  103577. +#if (DPAA_VERSION >= 11)
  103578. + _fm_cpt_dbg(compat," param->p_capwap_reassembly_manip=%p \n", param->p_capwap_reassembly_manip);
  103579. +#endif
  103580. + param->pcd_support = compat_param->pcd_support;
  103581. + param->net_env_id = compat_pcd_id2ptr(compat_param->net_env_id);
  103582. +
  103583. + if (param->p_cc_params)
  103584. + compat_copy_fm_port_pcd_cc(compat_port_pcd_cc_params, param->p_cc_params, COMPAT_US_TO_K);
  103585. + if (param->p_kg_params)
  103586. + compat_copy_fm_port_pcd_kg(compat_port_pcd_kg_params, param->p_kg_params, COMPAT_US_TO_K);
  103587. + if (param->p_plcr_params)
  103588. + param->p_plcr_params->plcr_profile_id = compat_pcd_id2ptr(compat_port_pcd_plcr_params->plcr_profile_id);
  103589. + param->p_ip_reassembly_manip = compat_pcd_id2ptr(compat_param->p_ip_reassembly_manip);
  103590. +#if (DPAA_VERSION >= 11)
  103591. + param->p_capwap_reassembly_manip = compat_pcd_id2ptr(compat_param->p_capwap_reassembly_manip);
  103592. +#endif
  103593. + }
  103594. +}
  103595. +
  103596. +void compat_copy_fm_port_pcd_modify_tree(
  103597. + ioc_compat_fm_obj_t *compat_id,
  103598. + ioc_fm_obj_t *id,
  103599. + uint8_t compat)
  103600. +{
  103601. + if (compat == COMPAT_US_TO_K)
  103602. + id->obj = compat_pcd_id2ptr(compat_id->obj);
  103603. +}
  103604. +
  103605. +#if (DPAA_VERSION >= 11)
  103606. +void compat_copy_fm_port_vsp_alloc_params(
  103607. + ioc_compat_fm_port_vsp_alloc_params_t *compat_param,
  103608. + ioc_fm_port_vsp_alloc_params_t *param,
  103609. + uint8_t compat)
  103610. +{
  103611. + if (compat == COMPAT_US_TO_K)
  103612. + {
  103613. + _fm_cpt_dbg(compat," param->p_fm_tx_port=%p \n", param->p_fm_tx_port);
  103614. +
  103615. + param->dflt_relative_id = compat_param->dflt_relative_id;
  103616. + param->num_of_profiles = compat_param->num_of_profiles;
  103617. + param->p_fm_tx_port = compat_pcd_id2ptr(compat_param->p_fm_tx_port);
  103618. + }
  103619. +}
  103620. +#endif /* (DPAA_VERSION >= 11) */
  103621. +
  103622. +void compat_copy_fm_pcd_cc_tbl_get_stats(
  103623. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param,
  103624. + ioc_fm_pcd_cc_tbl_get_stats_t *param,
  103625. + uint8_t compat)
  103626. +{
  103627. + if (compat == COMPAT_US_TO_K)
  103628. + {
  103629. + param->id = compat_pcd_id2ptr(compat_param->id);
  103630. + param->key_index = compat_param->key_index;
  103631. + memcpy(&param->statistics, &compat_param->statistics, sizeof(ioc_fm_pcd_cc_key_statistics_t));
  103632. + } else {
  103633. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103634. + compat_param->key_index = param->key_index;
  103635. + memcpy(&compat_param->statistics, &param->statistics, sizeof(ioc_fm_pcd_cc_key_statistics_t));
  103636. + }
  103637. +}
  103638. +
  103639. +
  103640. +void compat_copy_fm_pcd_net_env(
  103641. + ioc_compat_fm_pcd_net_env_params_t *compat_param,
  103642. + ioc_fm_pcd_net_env_params_t *param,
  103643. + uint8_t compat)
  103644. +{
  103645. + if (compat == COMPAT_US_TO_K)
  103646. + {
  103647. + param->num_of_distinction_units = compat_param->num_of_distinction_units;
  103648. + memcpy(param->units, compat_param->units, sizeof(ioc_fm_pcd_distinction_unit_t)*IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  103649. + param->id = NULL; /* to avoid passing garbage to the kernel */
  103650. + }
  103651. + else
  103652. + {
  103653. + compat_param->num_of_distinction_units = param->num_of_distinction_units;
  103654. + memcpy(compat_param->units, param->units, sizeof(ioc_fm_pcd_distinction_unit_t)*IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS);
  103655. +
  103656. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103657. + }
  103658. +}
  103659. +
  103660. +void compat_copy_fm_pcd_cc_node_modify_key(
  103661. + ioc_compat_fm_pcd_cc_node_modify_key_params_t *compat_param,
  103662. + ioc_fm_pcd_cc_node_modify_key_params_t *param,
  103663. + uint8_t compat)
  103664. +{
  103665. + if (compat == COMPAT_US_TO_K)
  103666. + {
  103667. + param->key_indx = compat_param->key_indx;
  103668. + param->key_size = compat_param->key_size;
  103669. + param->p_key = (uint8_t *)compat_ptr(compat_param->p_key);
  103670. + _fm_cpt_dbg(compat," param->p_key = %p \n", param->p_key);
  103671. + param->p_mask = (uint8_t *)compat_ptr(compat_param->p_mask);
  103672. + _fm_cpt_dbg(compat," param->p_mask = %p\n", param->p_mask);
  103673. + param->id = compat_pcd_id2ptr(compat_param->id);
  103674. + _fm_cpt_dbg(compat," param->id = %p \n", param->id);
  103675. + }
  103676. + else
  103677. + {
  103678. + compat_param->key_indx = param->key_indx;
  103679. + compat_param->key_size = param->key_size;
  103680. + compat_param->p_key = ptr_to_compat((void *)param->p_key);
  103681. + compat_param->p_mask = ptr_to_compat((void *)param->p_mask);
  103682. +
  103683. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103684. + }
  103685. +}
  103686. +
  103687. +void compat_copy_keys(
  103688. + ioc_compat_keys_params_t *compat_param,
  103689. + ioc_keys_params_t *param,
  103690. + uint8_t compat)
  103691. +{
  103692. + int k = 0;
  103693. +
  103694. + _fm_cpt_dbg(compat," {->...\n");
  103695. +
  103696. + if (compat == COMPAT_US_TO_K) {
  103697. + param->max_num_of_keys = compat_param->max_num_of_keys;
  103698. + param->mask_support = compat_param->mask_support;
  103699. + param->statistics_mode = compat_param->statistics_mode;
  103700. + param->num_of_keys = compat_param->num_of_keys;
  103701. + param->key_size = compat_param->key_size;
  103702. +#if (DPAA_VERSION >= 11)
  103703. + memcpy(&param->frame_length_ranges,
  103704. + &compat_param->frame_length_ranges,
  103705. + sizeof(param->frame_length_ranges[0]) *
  103706. + IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR);
  103707. +#endif /* (DPAA_VERSION >= 11) */
  103708. + }
  103709. + else {
  103710. + compat_param->max_num_of_keys = param->max_num_of_keys;
  103711. + compat_param->mask_support = param->mask_support;
  103712. + compat_param->statistics_mode = param->statistics_mode;
  103713. + compat_param->num_of_keys = param->num_of_keys;
  103714. + compat_param->key_size = param->key_size;
  103715. +#if (DPAA_VERSION >= 11)
  103716. + memcpy(&compat_param->frame_length_ranges,
  103717. + &param->frame_length_ranges,
  103718. + sizeof(compat_param->frame_length_ranges[0]) *
  103719. + IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR);
  103720. +#endif /* (DPAA_VERSION >= 11) */
  103721. + }
  103722. +
  103723. + for (k=0; k < IOC_FM_PCD_MAX_NUM_OF_KEYS; k++)
  103724. + compat_copy_fm_pcd_cc_key(
  103725. + &compat_param->key_params[k],
  103726. + &param->key_params[k],
  103727. + compat);
  103728. +
  103729. + compat_copy_fm_pcd_cc_next_engine(
  103730. + &compat_param->cc_next_engine_params_for_miss,
  103731. + &param->cc_next_engine_params_for_miss,
  103732. + compat);
  103733. +
  103734. + _fm_cpt_dbg(compat," ...->}\n");
  103735. +}
  103736. +
  103737. +void compat_copy_fm_pcd_cc_node(
  103738. + ioc_compat_fm_pcd_cc_node_params_t *compat_param,
  103739. + ioc_fm_pcd_cc_node_params_t *param,
  103740. + uint8_t compat)
  103741. +{
  103742. + _fm_cpt_dbg(compat," {->...\n");
  103743. +
  103744. + if (compat == COMPAT_US_TO_K)
  103745. + memcpy(&param->extract_cc_params, &compat_param->extract_cc_params, sizeof(ioc_fm_pcd_extract_entry_t));
  103746. +
  103747. + else
  103748. + {
  103749. + compat_copy_keys(&compat_param->keys_params, &param->keys_params, compat);
  103750. +
  103751. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103752. + _fm_cpt_dbg(compat," param->id = %p \n", param->id);
  103753. + }
  103754. +
  103755. + compat_copy_keys(&compat_param->keys_params, &param->keys_params, compat);
  103756. +
  103757. + _fm_cpt_dbg(compat," ...->}\n");
  103758. +}
  103759. +
  103760. +void compat_fm_pcd_manip_set_node(
  103761. + ioc_compat_fm_pcd_manip_params_t *compat_param,
  103762. + ioc_fm_pcd_manip_params_t *param,
  103763. + uint8_t compat)
  103764. +{
  103765. + if (compat == COMPAT_US_TO_K) {
  103766. + param->type = compat_param->type;
  103767. + switch (param->type) {
  103768. + case e_IOC_FM_PCD_MANIP_HDR:
  103769. + param->u.hdr.rmv = compat_param->u.hdr.rmv;
  103770. + memcpy(&param->u.hdr.rmv_params,
  103771. + &compat_param->u.hdr.rmv_params,
  103772. + sizeof(param->u.hdr.rmv_params));
  103773. +
  103774. + param->u.hdr.insrt = compat_param->u.hdr.insrt;
  103775. + param->u.hdr.insrt_params.type =
  103776. + compat_param->u.hdr.insrt_params.type;
  103777. + switch (compat_param->u.hdr.insrt_params.type)
  103778. + {
  103779. + case e_IOC_FM_PCD_MANIP_INSRT_GENERIC:
  103780. + param->u.hdr.insrt_params.u.generic.offset =
  103781. + compat_param->u.hdr.insrt_params.u.generic.offset;
  103782. + param->u.hdr.insrt_params.u.generic.size =
  103783. + compat_param->u.hdr.insrt_params.u.generic.size;
  103784. + param->u.hdr.insrt_params.u.generic.replace =
  103785. + compat_param->u.hdr.insrt_params.u.generic.replace;
  103786. + param->u.hdr.insrt_params.u.generic.p_data =
  103787. + compat_ptr(compat_param->u.hdr.insrt_params.u.generic.p_data);
  103788. + break;
  103789. + case e_IOC_FM_PCD_MANIP_INSRT_BY_HDR:
  103790. + param->u.hdr.insrt_params.u.by_hdr.type =
  103791. + compat_param->u.hdr.insrt_params.u.by_hdr.type;
  103792. + param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.specific_l2 =
  103793. + compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.specific_l2;
  103794. + param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.update =
  103795. + compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.update;
  103796. + param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.size =
  103797. + compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.size;
  103798. + param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.p_data =
  103799. + compat_ptr(compat_param->u.hdr.insrt_params.u.by_hdr.u.specific_l2_params.p_data);
  103800. + break;
  103801. + default:
  103802. + _fm_cpt_err("Unsupported type: %d", compat_param->u.hdr.insrt_params.type);
  103803. + }
  103804. +
  103805. + param->u.hdr.field_update = compat_param->u.hdr.field_update;
  103806. + memcpy(&param->u.hdr.field_update_params,
  103807. + &compat_param->u.hdr.field_update_params,
  103808. + sizeof(param->u.hdr.field_update_params));
  103809. +
  103810. + param->u.hdr.custom = compat_param->u.hdr.custom;
  103811. + memcpy(&param->u.hdr.custom_params,
  103812. + &compat_param->u.hdr.custom_params,
  103813. + sizeof(param->u.hdr.custom_params));
  103814. +
  103815. + param->u.hdr.dont_parse_after_manip =
  103816. + compat_param->u.hdr.dont_parse_after_manip;
  103817. + break;
  103818. + case e_IOC_FM_PCD_MANIP_REASSEM:
  103819. + memcpy(&param->u.reassem, &compat_param->u.reassem, sizeof(param->u.reassem));
  103820. + break;
  103821. + case e_IOC_FM_PCD_MANIP_FRAG:
  103822. + memcpy(&param->u.frag, &compat_param->u.frag, sizeof(param->u.frag));
  103823. + break;
  103824. + case e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD:
  103825. + memcpy(&param->u.special_offload,
  103826. + &compat_param->u.special_offload,
  103827. + sizeof(param->u.special_offload));
  103828. + break;
  103829. + }
  103830. +
  103831. + param->p_next_manip = compat_pcd_id2ptr(compat_param->p_next_manip);
  103832. + param->id = compat_pcd_id2ptr(compat_param->id);
  103833. + }
  103834. + else {
  103835. + compat_param->type = param->type;
  103836. + memcpy(&compat_param->u, &param->u, sizeof(compat_param->u));
  103837. +
  103838. + if (param->type == e_IOC_FM_PCD_MANIP_HDR &&
  103839. + param->u.hdr.insrt_params.type == e_IOC_FM_PCD_MANIP_INSRT_GENERIC)
  103840. + compat_param->u.hdr.insrt_params.u.generic.p_data =
  103841. + ptr_to_compat(param->u.hdr.insrt_params.u.generic.p_data);
  103842. +
  103843. + compat_param->p_next_manip = compat_pcd_ptr2id(param->id);
  103844. + /* ... should be one that was added previously by the very call to
  103845. + compat_add_ptr2id() below: */
  103846. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103847. + }
  103848. +}
  103849. +
  103850. +void compat_copy_fm_pcd_manip_get_stats(
  103851. + ioc_compat_fm_pcd_manip_get_stats_t *compat_param,
  103852. + ioc_fm_pcd_manip_get_stats_t *param,
  103853. + uint8_t compat)
  103854. +{
  103855. + _fm_cpt_dbg (compat, " {->...\n");
  103856. +
  103857. + if (compat == COMPAT_US_TO_K)
  103858. + {
  103859. + param->id = compat_pcd_id2ptr(compat_param->id);
  103860. + memcpy(&param->stats, &compat_param->stats,
  103861. + sizeof(ioc_fm_pcd_manip_stats_t));
  103862. + }
  103863. + else
  103864. + {
  103865. + compat_param->id = compat_add_ptr2id(param->id,
  103866. + FM_MAP_TYPE_PCD_NODE);
  103867. + memcpy(&compat_param->stats, &param->stats,
  103868. + sizeof(ioc_fm_pcd_manip_stats_t));
  103869. + }
  103870. +
  103871. + _fm_cpt_dbg (compat, " ...->}\n");
  103872. +}
  103873. +
  103874. +#if (DPAA_VERSION >= 11)
  103875. +void compat_copy_fm_pcd_frm_replic_group_params(
  103876. + ioc_compat_fm_pcd_frm_replic_group_params_t *compat_param,
  103877. + ioc_fm_pcd_frm_replic_group_params_t *param,
  103878. + uint8_t compat)
  103879. +{
  103880. + int k;
  103881. +
  103882. + _fm_cpt_dbg (compat, " {->...\n");
  103883. +
  103884. + if (compat == COMPAT_US_TO_K)
  103885. + {
  103886. + param->max_num_of_entries = compat_param->max_num_of_entries;
  103887. + param->num_of_entries = compat_param->num_of_entries;
  103888. + param->id = compat_pcd_id2ptr(compat_param->id);
  103889. + }
  103890. + else
  103891. + {
  103892. + compat_param->max_num_of_entries = param->max_num_of_entries;
  103893. + compat_param->num_of_entries = param->num_of_entries;
  103894. + compat_param->id = compat_add_ptr2id(param->id,
  103895. + FM_MAP_TYPE_PCD_NODE);
  103896. + }
  103897. +
  103898. + for (k=0; k < IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES; k++)
  103899. + compat_copy_fm_pcd_cc_next_engine(
  103900. + &compat_param->next_engine_params[k],
  103901. + &param->next_engine_params[k],
  103902. + compat);
  103903. +
  103904. + _fm_cpt_dbg (compat, " ...->}\n");
  103905. +}
  103906. +
  103907. +void compat_copy_fm_pcd_frm_replic_member(
  103908. + ioc_compat_fm_pcd_frm_replic_member_t *compat_param,
  103909. + ioc_fm_pcd_frm_replic_member_t *param,
  103910. + uint8_t compat)
  103911. +{
  103912. + _fm_cpt_dbg (compat, " {->...\n");
  103913. +
  103914. + if (compat == COMPAT_US_TO_K)
  103915. + {
  103916. + param->h_replic_group = compat_pcd_id2ptr(compat_param->h_replic_group);
  103917. + param->member_index = compat_param->member_index;
  103918. + }
  103919. +
  103920. + _fm_cpt_dbg (compat, " ...->}\n");
  103921. +}
  103922. +
  103923. +void compat_copy_fm_pcd_frm_replic_member_params(
  103924. + ioc_compat_fm_pcd_frm_replic_member_params_t *compat_param,
  103925. + ioc_fm_pcd_frm_replic_member_params_t *param,
  103926. + uint8_t compat)
  103927. +{
  103928. + _fm_cpt_dbg (compat, " {->...\n");
  103929. +
  103930. + compat_copy_fm_pcd_frm_replic_member(&compat_param->member,
  103931. + &param->member, compat);
  103932. +
  103933. + compat_copy_fm_pcd_cc_next_engine(&compat_param->next_engine_params,
  103934. + &param->next_engine_params, compat);
  103935. +
  103936. + _fm_cpt_dbg (compat, " ...->}\n");
  103937. +}
  103938. +
  103939. +void compat_copy_fm_vsp_params(
  103940. + ioc_compat_fm_vsp_params_t *compat_param,
  103941. + ioc_fm_vsp_params_t *param,
  103942. + uint8_t compat)
  103943. +{
  103944. + _fm_cpt_dbg (compat, " {->...\n");
  103945. +
  103946. + if (compat == COMPAT_US_TO_K)
  103947. + {
  103948. + param->p_fm = compat_pcd_id2ptr(compat_param->p_fm);
  103949. + memcpy(&param->ext_buf_pools, &compat_param->ext_buf_pools, sizeof(ioc_fm_ext_pools));
  103950. + param->liodn_offset = compat_param->liodn_offset;
  103951. + param->port_params.port_id = compat_param->port_params.port_id;
  103952. + param->port_params.port_type = compat_param->port_params.port_type;
  103953. + param->relative_profile_id = compat_param->relative_profile_id;
  103954. + param->id = compat_pcd_id2ptr(compat_param->id);
  103955. + }
  103956. + else
  103957. + {
  103958. + compat_param->p_fm = compat_pcd_ptr2id(param->p_fm);
  103959. + memcpy(&compat_param->ext_buf_pools, &param->ext_buf_pools, sizeof(ioc_fm_ext_pools));
  103960. + compat_param->liodn_offset = param->liodn_offset;
  103961. + compat_param->port_params.port_id = param->port_params.port_id;
  103962. + compat_param->port_params.port_type = param->port_params.port_type;
  103963. + compat_param->relative_profile_id = param->relative_profile_id;
  103964. + compat_param->id = compat_add_ptr2id(param->id, FM_MAP_TYPE_PCD_NODE);
  103965. + }
  103966. +
  103967. + _fm_cpt_dbg (compat, " ...->}\n");
  103968. +}
  103969. +
  103970. +void compat_copy_fm_buf_pool_depletion_params(
  103971. + ioc_compat_fm_buf_pool_depletion_params_t *compat_param,
  103972. + ioc_fm_buf_pool_depletion_params_t *param,
  103973. + uint8_t compat)
  103974. +{
  103975. + _fm_cpt_dbg (compat, " {->...\n");
  103976. +
  103977. + if (compat == COMPAT_US_TO_K)
  103978. + {
  103979. + param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
  103980. + memcpy(&param->fm_buf_pool_depletion,
  103981. + &compat_param->fm_buf_pool_depletion,
  103982. + sizeof(ioc_fm_buf_pool_depletion_t));
  103983. + }
  103984. +
  103985. + _fm_cpt_dbg (compat, " ...->}\n");
  103986. +}
  103987. +
  103988. +void compat_copy_fm_buffer_prefix_content_params(
  103989. + ioc_compat_fm_buffer_prefix_content_params_t *compat_param,
  103990. + ioc_fm_buffer_prefix_content_params_t *param,
  103991. + uint8_t compat)
  103992. +{
  103993. + _fm_cpt_dbg (compat, " {->...\n");
  103994. +
  103995. + if (compat == COMPAT_US_TO_K)
  103996. + {
  103997. + param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
  103998. + memcpy(&param->fm_buffer_prefix_content,
  103999. + &compat_param->fm_buffer_prefix_content,
  104000. + sizeof(ioc_fm_buffer_prefix_content_t));
  104001. + }
  104002. +
  104003. + _fm_cpt_dbg (compat, " ...->}\n");
  104004. +}
  104005. +
  104006. +void compat_copy_fm_vsp_config_no_sg_params(
  104007. + ioc_compat_fm_vsp_config_no_sg_params_t *compat_param,
  104008. + ioc_fm_vsp_config_no_sg_params_t *param,
  104009. + uint8_t compat)
  104010. +{
  104011. + _fm_cpt_dbg (compat, " {->...\n");
  104012. +
  104013. + if (compat == COMPAT_US_TO_K)
  104014. + {
  104015. + param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
  104016. + param->no_sg = compat_param->no_sg;
  104017. + }
  104018. +
  104019. + _fm_cpt_dbg (compat, " ...->}\n");
  104020. +}
  104021. +
  104022. +void compat_copy_fm_vsp_prs_result_params(
  104023. + ioc_compat_fm_vsp_prs_result_params_t *compat_param,
  104024. + ioc_fm_vsp_prs_result_params_t *param,
  104025. + uint8_t compat)
  104026. +{
  104027. + _fm_cpt_dbg (compat, " {->...\n");
  104028. +
  104029. + if (compat == COMPAT_US_TO_K)
  104030. + {
  104031. + param->p_fm_vsp = compat_pcd_id2ptr(compat_param->p_fm_vsp);
  104032. + /* p_data is an user-space pointer that needs to remain unmodified */
  104033. + param->p_data = (void *)(unsigned long long)compat_param->p_data;
  104034. + }
  104035. + else
  104036. + {
  104037. + compat_param->p_fm_vsp = compat_pcd_ptr2id(param->p_fm_vsp);
  104038. + /* p_data is an user-space pointer that needs to remain unmodified */
  104039. + compat_param->p_data = (compat_uptr_t)((unsigned long long)param->p_data & 0xFFFFFFFF);
  104040. + }
  104041. +
  104042. + _fm_cpt_dbg (compat, " ...->}\n");
  104043. +}
  104044. +#endif /* (DPAA_VERSION >= 11) */
  104045. --- /dev/null
  104046. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.h
  104047. @@ -0,0 +1,755 @@
  104048. +/*
  104049. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  104050. + *
  104051. + * Redistribution and use in source and binary forms, with or without
  104052. + * modification, are permitted provided that the following conditions are met:
  104053. + * * Redistributions of source code must retain the above copyright
  104054. + * notice, this list of conditions and the following disclaimer.
  104055. + * * Redistributions in binary form must reproduce the above copyright
  104056. + * notice, this list of conditions and the following disclaimer in the
  104057. + * documentation and/or other materials provided with the distribution.
  104058. + * * Neither the name of Freescale Semiconductor nor the
  104059. + * names of its contributors may be used to endorse or promote products
  104060. + * derived from this software without specific prior written permission.
  104061. + *
  104062. + *
  104063. + * ALTERNATIVELY, this software may be distributed under the terms of the
  104064. + * GNU General Public License ("GPL") as published by the Free Software
  104065. + * Foundation, either version 2 of that License or (at your option) any
  104066. + * later version.
  104067. + *
  104068. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  104069. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  104070. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  104071. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  104072. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  104073. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  104074. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  104075. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  104076. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  104077. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  104078. + */
  104079. +
  104080. +/*
  104081. + @File lnxwrp_ioctls_fm_compat.h
  104082. +
  104083. + @Description FM PCD compat structures definition.
  104084. +
  104085. +*/
  104086. +
  104087. +#ifndef __FM_COMPAT_IOCTLS_H
  104088. +#define __FM_COMPAT_IOCTLS_H
  104089. +
  104090. +#include <linux/compat.h>
  104091. +
  104092. +#define COMPAT_K_TO_US 0 /* copy from Kernel to User */
  104093. +#define COMPAT_US_TO_K 1 /* copy from User to Kernel */
  104094. +#define COMPAT_GENERIC 2
  104095. +
  104096. +#define COMPAT_COPY_K2US(dest, src, type) compat_copy_##type(src, dest, 0)
  104097. +#define COMPAT_COPY_US2K(dest, src, type) compat_copy_##type(dest, src, 1)
  104098. +
  104099. +/* mapping kernel pointers w/ UserSpace id's { */
  104100. +/* Because compat_ptr(ptr_to_compat(X)) != X, this way we cannot exchange pointers
  104101. + back and forth (US - KS). compat_ptr is a cast and pointers are broken. */
  104102. +#define COMPAT_PTR2ID_ARRAY_MAX (512+1) /* first location is not used */
  104103. +#define COMPAT_PTR2ID_WATERMARK 0xface0000
  104104. +#define COMPAT_PTR2ID_WM_MASK 0xffff0000
  104105. +
  104106. +/* define it for debug trace */
  104107. +/*#define FM_COMPAT_DBG*/
  104108. +
  104109. +#define _fm_cpt_prk(stage, format, arg...) \
  104110. + printk(stage "fm_cpt (cpu:%u): " format, raw_smp_processor_id(), ##arg)
  104111. +
  104112. +#define _fm_cpt_inf(format, arg...) _fm_cpt_prk(KERN_INFO, format, ##arg)
  104113. +#define _fm_cpt_wrn(format, arg...) _fm_cpt_prk(KERN_WARNING, format, ##arg)
  104114. +#define _fm_cpt_err(format, arg...) _fm_cpt_prk(KERN_ERR, format, ##arg)
  104115. +
  104116. +/* used for compat IOCTL debugging */
  104117. +#if defined(FM_COMPAT_DBG)
  104118. + #define _fm_cpt_dbg(from, format, arg...) \
  104119. + do{ \
  104120. + if (from == COMPAT_US_TO_K) \
  104121. + printk("fm_cpt to KS [%s:%u](cpu:%u) - " format, \
  104122. + __func__, __LINE__, raw_smp_processor_id(), ##arg); \
  104123. + else if (from == COMPAT_K_TO_US) \
  104124. + printk("fm_cpt to US [%s:%u](cpu:%u) - " format, \
  104125. + __func__, __LINE__, raw_smp_processor_id(), ##arg); \
  104126. + else \
  104127. + printk("fm_cpt [%s:%u](cpu:%u) - " format, \
  104128. + __func__, __LINE__, raw_smp_processor_id(), ##arg); \
  104129. + }while(0)
  104130. +#else
  104131. +# define _fm_cpt_dbg(arg...)
  104132. +#endif
  104133. +
  104134. +/*TODO: per FMan module:
  104135. + *
  104136. + * Parser: FM_MAP_TYPE_PARSER_NODE,
  104137. + * Kg: FM_MAP_TYPE_KG_NODE,
  104138. + * Policer: FM_MAP_TYPE_POLICER_NODE
  104139. + * Manip: FM_MAP_TYPE_MANIP_NODE
  104140. + **/
  104141. +enum fm_map_node_type {
  104142. + FM_MAP_TYPE_UNSPEC = 0,
  104143. + FM_MAP_TYPE_PCD_NODE,
  104144. +
  104145. + /* add types here, update the policy */
  104146. +
  104147. + __FM_MAP_TYPE_AFTER_LAST,
  104148. + FM_MAP_TYPE_MAX = __FM_MAP_TYPE_AFTER_LAST - 1
  104149. +};
  104150. +
  104151. +void compat_del_ptr2id(void *p, enum fm_map_node_type);
  104152. +compat_uptr_t compat_add_ptr2id(void *p, enum fm_map_node_type);
  104153. +compat_uptr_t compat_get_ptr2id(void *p, enum fm_map_node_type);
  104154. +void *compat_get_id2ptr(compat_uptr_t comp, enum fm_map_node_type);
  104155. +
  104156. +static inline compat_uptr_t compat_pcd_ptr2id(void *ptr) {
  104157. + return (ptr)? compat_get_ptr2id(ptr, FM_MAP_TYPE_PCD_NODE)
  104158. + : (compat_uptr_t) 0;
  104159. +}
  104160. +
  104161. +static inline void *compat_pcd_id2ptr(compat_uptr_t id) {
  104162. + return (id) ? compat_get_id2ptr(id, FM_MAP_TYPE_PCD_NODE)
  104163. + : NULL;
  104164. +}
  104165. +
  104166. +/* other similar inlines may be added as new nodes are added
  104167. + to enum fm_map_node_type above... */
  104168. +/* } mapping kernel pointers w/ UserSpace id's */
  104169. +
  104170. +/* pcd compat structures { */
  104171. +typedef struct ioc_compat_fm_pcd_cc_node_remove_key_params_t {
  104172. + compat_uptr_t id;
  104173. + uint16_t key_indx;
  104174. +} ioc_compat_fm_pcd_cc_node_remove_key_params_t;
  104175. +
  104176. +typedef union ioc_compat_fm_pcd_plcr_next_engine_params_u {
  104177. + ioc_fm_pcd_done_action action;
  104178. + compat_uptr_t p_profile;
  104179. + compat_uptr_t p_direct_scheme;
  104180. +} ioc_compat_fm_pcd_plcr_next_engine_params_u;
  104181. +
  104182. +typedef struct ioc_compat_fm_pcd_plcr_profile_params_t {
  104183. + bool modify;
  104184. + union {
  104185. + struct {
  104186. + ioc_fm_pcd_profile_type_selection profile_type;
  104187. + compat_uptr_t p_fm_port;
  104188. + uint16_t relative_profile_id;
  104189. + } new_params;
  104190. + compat_uptr_t p_profile;
  104191. + } profile_select;
  104192. + ioc_fm_pcd_plcr_algorithm_selection alg_selection;
  104193. + ioc_fm_pcd_plcr_color_mode color_mode;
  104194. +
  104195. + union {
  104196. + ioc_fm_pcd_plcr_color dflt_color;
  104197. + ioc_fm_pcd_plcr_color override;
  104198. + } color;
  104199. +
  104200. + ioc_fm_pcd_plcr_non_passthrough_alg_param_t non_passthrough_alg_param;
  104201. +
  104202. + ioc_fm_pcd_engine next_engine_on_green;
  104203. + ioc_compat_fm_pcd_plcr_next_engine_params_u params_on_green;
  104204. +
  104205. + ioc_fm_pcd_engine next_engine_on_yellow;
  104206. + ioc_compat_fm_pcd_plcr_next_engine_params_u params_on_yellow;
  104207. +
  104208. + ioc_fm_pcd_engine next_engine_on_red;
  104209. + ioc_compat_fm_pcd_plcr_next_engine_params_u params_on_red;
  104210. +
  104211. + bool trap_profile_on_flow_A;
  104212. + bool trap_profile_on_flow_B;
  104213. + bool trap_profile_on_flow_C;
  104214. + compat_uptr_t id;
  104215. +} ioc_compat_fm_pcd_plcr_profile_params_t;
  104216. +
  104217. +typedef struct ioc_compat_fm_obj_t {
  104218. + compat_uptr_t obj;
  104219. +} ioc_compat_fm_obj_t;
  104220. +
  104221. +typedef struct ioc_compat_fm_pcd_kg_scheme_select_t {
  104222. + bool direct;
  104223. + compat_uptr_t scheme_id;
  104224. +} ioc_compat_fm_pcd_kg_scheme_select_t;
  104225. +
  104226. +typedef struct ioc_compat_fm_pcd_port_schemes_params_t {
  104227. + uint8_t num_of_schemes;
  104228. + compat_uptr_t scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES];
  104229. +} ioc_compat_fm_pcd_port_schemes_params_t;
  104230. +
  104231. +#if (DPAA_VERSION >= 11)
  104232. +typedef struct ioc_compat_fm_port_vsp_alloc_params_t {
  104233. + uint8_t num_of_profiles; /**< Number of Virtual Storage Profiles */
  104234. + uint8_t dflt_relative_id; /**< The default Virtual-Storage-Profile-id dedicated to Rx/OP port
  104235. + The same default Virtual-Storage-Profile-id will be for coupled Tx port
  104236. + if relevant function called for Rx port */
  104237. + compat_uptr_t p_fm_tx_port; /**< Handle to coupled Tx Port; not relevant for OP port. */
  104238. +}ioc_compat_fm_port_vsp_alloc_params_t;
  104239. +#endif /* (DPAA_VERSION >= 11) */
  104240. +
  104241. +typedef struct ioc_compat_fm_pcd_net_env_params_t {
  104242. + uint8_t num_of_distinction_units;
  104243. + ioc_fm_pcd_distinction_unit_t units[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /* same structure*/
  104244. + compat_uptr_t id;
  104245. +} ioc_compat_fm_pcd_net_env_params_t;
  104246. +
  104247. +typedef struct ioc_compat_fm_pcd_prs_sw_params_t {
  104248. + bool override;
  104249. + uint32_t size;
  104250. + uint16_t base;
  104251. + compat_uptr_t p_code;
  104252. + uint32_t sw_prs_data_params[IOC_FM_PCD_PRS_NUM_OF_HDRS];
  104253. + uint8_t num_of_labels;
  104254. + ioc_fm_pcd_prs_label_params_t labels_table[IOC_FM_PCD_PRS_NUM_OF_LABELS];
  104255. +} ioc_compat_fm_pcd_prs_sw_params_t;
  104256. +
  104257. +typedef struct ioc_compat_fm_pcd_cc_next_kg_params_t {
  104258. + bool override_fqid;
  104259. + uint32_t new_fqid;
  104260. +#if DPAA_VERSION >= 11
  104261. + uint8_t new_relative_storage_profile_id;
  104262. +#endif
  104263. + compat_uptr_t p_direct_scheme;
  104264. +} ioc_compat_fm_pcd_cc_next_kg_params_t;
  104265. +
  104266. +typedef struct ioc_compat_fm_pcd_cc_next_cc_params_t {
  104267. + compat_uptr_t cc_node_id;
  104268. +} ioc_compat_fm_pcd_cc_next_cc_params_t;
  104269. +
  104270. +#if DPAA_VERSION >= 11
  104271. +typedef struct ioc_compat_fm_pcd_cc_next_fr_params_t {
  104272. + compat_uptr_t frm_replic_id;
  104273. +} ioc_compat_fm_pcd_cc_next_fr_params_t;
  104274. +#endif /* DPAA_VERSION >= 11 */
  104275. +
  104276. +typedef struct ioc_compat_fm_pcd_cc_next_engine_params_t {
  104277. + ioc_fm_pcd_engine next_engine;
  104278. + union {
  104279. + ioc_compat_fm_pcd_cc_next_cc_params_t cc_params; /**< compat structure*/
  104280. + ioc_fm_pcd_cc_next_plcr_params_t plcr_params; /**< same structure*/
  104281. + ioc_fm_pcd_cc_next_enqueue_params_t enqueue_params; /**< same structure*/
  104282. + ioc_compat_fm_pcd_cc_next_kg_params_t kg_params; /**< compat structure*/
  104283. +#if DPAA_VERSION >= 11
  104284. + ioc_compat_fm_pcd_cc_next_fr_params_t fr_params; /**< compat structure*/
  104285. +#endif /* DPAA_VERSION >= 11 */
  104286. + } params;
  104287. + compat_uptr_t manip_id;
  104288. + bool statistics_en;
  104289. +} ioc_compat_fm_pcd_cc_next_engine_params_t;
  104290. +
  104291. +typedef struct ioc_compat_fm_pcd_cc_grp_params_t {
  104292. + uint8_t num_of_distinction_units;
  104293. + uint8_t unit_ids [IOC_FM_PCD_MAX_NUM_OF_CC_UNITS];
  104294. + ioc_compat_fm_pcd_cc_next_engine_params_t next_engine_per_entries_in_grp[IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP];
  104295. +} ioc_compat_fm_pcd_cc_grp_params_t;
  104296. +
  104297. +typedef struct ioc_compat_fm_pcd_cc_tree_params_t {
  104298. + compat_uptr_t net_env_id;
  104299. + uint8_t num_of_groups;
  104300. + ioc_compat_fm_pcd_cc_grp_params_t fm_pcd_cc_group_params [IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS];
  104301. + compat_uptr_t id;
  104302. +} ioc_compat_fm_pcd_cc_tree_params_t;
  104303. +
  104304. +typedef struct ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t {
  104305. + compat_uptr_t id;
  104306. + uint8_t grp_indx;
  104307. + uint8_t indx;
  104308. + ioc_compat_fm_pcd_cc_next_engine_params_t cc_next_engine_params;
  104309. +} ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t;
  104310. +
  104311. +typedef struct ioc_compat_fm_pcd_cc_key_params_t {
  104312. + compat_uptr_t p_key;
  104313. + compat_uptr_t p_mask;
  104314. + ioc_compat_fm_pcd_cc_next_engine_params_t cc_next_engine_params; /**< compat structure*/
  104315. +} ioc_compat_fm_pcd_cc_key_params_t;
  104316. +
  104317. +typedef struct ioc_compat_keys_params_t {
  104318. + uint16_t max_num_of_keys;
  104319. + bool mask_support;
  104320. + ioc_fm_pcd_cc_stats_mode statistics_mode;
  104321. +#if (DPAA_VERSION >= 11)
  104322. + uint16_t frame_length_ranges[IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
  104323. +#endif /* (DPAA_VERSION >= 11) */
  104324. + uint16_t num_of_keys;
  104325. + uint8_t key_size;
  104326. + ioc_compat_fm_pcd_cc_key_params_t key_params[IOC_FM_PCD_MAX_NUM_OF_KEYS]; /**< compat structure*/
  104327. + ioc_compat_fm_pcd_cc_next_engine_params_t cc_next_engine_params_for_miss; /**< compat structure*/
  104328. +} ioc_compat_keys_params_t;
  104329. +
  104330. +typedef struct ioc_compat_fm_pcd_cc_node_params_t {
  104331. + ioc_fm_pcd_extract_entry_t extract_cc_params; /**< same structure*/
  104332. + ioc_compat_keys_params_t keys_params; /**< compat structure*/
  104333. + compat_uptr_t id;
  104334. +} ioc_compat_fm_pcd_cc_node_params_t;
  104335. +
  104336. +/**************************************************************************//**
  104337. + @Description Parameters for defining a hash table
  104338. +*//***************************************************************************/
  104339. +typedef struct ioc_compat_fm_pcd_hash_table_params_t {
  104340. + uint16_t max_num_of_keys;
  104341. + ioc_fm_pcd_cc_stats_mode statistics_mode;
  104342. + uint8_t kg_hash_shift;
  104343. + uint16_t hash_res_mask;
  104344. + uint8_t hash_shift;
  104345. + uint8_t match_key_size;
  104346. + ioc_compat_fm_pcd_cc_next_engine_params_t cc_next_engine_params_for_miss;
  104347. + compat_uptr_t id;
  104348. +} ioc_compat_fm_pcd_hash_table_params_t;
  104349. +
  104350. +typedef struct ioc_compat_fm_pcd_hash_table_add_key_params_t {
  104351. + compat_uptr_t p_hash_tbl;
  104352. + uint8_t key_size;
  104353. + ioc_compat_fm_pcd_cc_key_params_t key_params;
  104354. +} ioc_compat_fm_pcd_hash_table_add_key_params_t;
  104355. +
  104356. +typedef struct ioc_compat_fm_pcd_cc_node_modify_key_params_t {
  104357. + compat_uptr_t id;
  104358. + uint16_t key_indx;
  104359. + uint8_t key_size;
  104360. + compat_uptr_t p_key;
  104361. + compat_uptr_t p_mask;
  104362. +} ioc_compat_fm_pcd_cc_node_modify_key_params_t;
  104363. +
  104364. +typedef struct ioc_compat_fm_pcd_hash_table_remove_key_params_t {
  104365. + compat_uptr_t p_hash_tbl;
  104366. + uint8_t key_size;
  104367. + compat_uptr_t p_key;
  104368. +} ioc_compat_fm_pcd_hash_table_remove_key_params_t;
  104369. +
  104370. +typedef struct ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t {
  104371. + compat_uptr_t id;
  104372. + uint16_t key_indx;
  104373. + uint8_t key_size;
  104374. + ioc_compat_fm_pcd_cc_key_params_t key_params;
  104375. +} ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t;
  104376. +
  104377. +typedef struct ioc_compat_fm_port_pcd_plcr_params_t {
  104378. + compat_uptr_t plcr_profile_id;
  104379. +} ioc_compat_fm_port_pcd_plcr_params_t;
  104380. +
  104381. +typedef struct ioc_compat_fm_port_pcd_cc_params_t {
  104382. + compat_uptr_t cc_tree_id;
  104383. +} ioc_compat_fm_port_pcd_cc_params_t;
  104384. +
  104385. +typedef struct ioc_compat_fm_port_pcd_kg_params_t {
  104386. + uint8_t num_of_schemes;
  104387. + compat_uptr_t scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES];
  104388. + bool direct_scheme;
  104389. + compat_uptr_t direct_scheme_id;
  104390. +} ioc_compat_fm_port_pcd_kg_params_t;
  104391. +
  104392. +typedef struct ioc_compat_fm_port_pcd_params_t {
  104393. + ioc_fm_port_pcd_support pcd_support;
  104394. + compat_uptr_t net_env_id;
  104395. + compat_uptr_t p_prs_params;
  104396. + compat_uptr_t p_cc_params;
  104397. + compat_uptr_t p_kg_params;
  104398. + compat_uptr_t p_plcr_params;
  104399. + compat_uptr_t p_ip_reassembly_manip;
  104400. +#if DPAA_VERSION >= 11
  104401. + compat_uptr_t p_capwap_reassembly_manip;
  104402. +#endif
  104403. +} ioc_compat_fm_port_pcd_params_t;
  104404. +
  104405. +typedef struct ioc_compat_fm_pcd_kg_cc_t {
  104406. + compat_uptr_t tree_id;
  104407. + uint8_t grp_id;
  104408. + bool plcr_next;
  104409. + bool bypass_plcr_profile_generation;
  104410. + ioc_fm_pcd_kg_plcr_profile_t plcr_profile;
  104411. +} ioc_compat_fm_pcd_kg_cc_t;
  104412. +
  104413. +typedef struct ioc_compat_fm_pcd_kg_scheme_params_t {
  104414. + bool modify;
  104415. + union {
  104416. + uint8_t relative_scheme_id;
  104417. + compat_uptr_t scheme_id;
  104418. + } scm_id;
  104419. + bool always_direct;
  104420. + struct {
  104421. + compat_uptr_t net_env_id;
  104422. + uint8_t num_of_distinction_units;
  104423. + uint8_t unit_ids[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
  104424. + } net_env_params;
  104425. + bool use_hash;
  104426. + ioc_fm_pcd_kg_key_extract_and_hash_params_t key_extract_and_hash_params;
  104427. + bool bypass_fqid_generation;
  104428. + uint32_t base_fqid;
  104429. + uint8_t num_of_used_extracted_ors;
  104430. + ioc_fm_pcd_kg_extracted_or_params_t extracted_ors[IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS];
  104431. +#if DPAA_VERSION >= 11
  104432. + bool override_storage_profile;
  104433. + ioc_fm_pcd_kg_storage_profile_t storage_profile;
  104434. +#endif /* DPAA_VERSION >= 11 */
  104435. + ioc_fm_pcd_engine next_engine;
  104436. + union{
  104437. + ioc_fm_pcd_done_action done_action;
  104438. + ioc_fm_pcd_kg_plcr_profile_t plcr_profile;
  104439. + ioc_compat_fm_pcd_kg_cc_t cc;
  104440. + } kg_next_engine_params;
  104441. + ioc_fm_pcd_kg_scheme_counter_t scheme_counter;
  104442. + compat_uptr_t id;
  104443. +} ioc_compat_fm_pcd_kg_scheme_params_t;
  104444. +
  104445. +typedef struct ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t {
  104446. + compat_uptr_t id;
  104447. + uint16_t key_indx;
  104448. + uint8_t key_size;
  104449. + ioc_compat_fm_pcd_cc_next_engine_params_t cc_next_engine_params;
  104450. +} ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t;
  104451. +
  104452. +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_generic_params_t {
  104453. + uint8_t offset;
  104454. + uint8_t size;
  104455. + bool replace;
  104456. + compat_uptr_t p_data;
  104457. +} ioc_compat_fm_pcd_manip_hdr_insrt_generic_params_t;
  104458. +
  104459. +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_specific_l2_params_t {
  104460. + ioc_fm_pcd_manip_hdr_insrt_specific_l2 specific_l2;
  104461. + bool update;
  104462. + uint8_t size;
  104463. + compat_uptr_t p_data;
  104464. +} ioc_compat_fm_pcd_manip_hdr_insrt_specific_l2_params_t;
  104465. +
  104466. +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_t {
  104467. + uint8_t size; /**< size of inserted section */
  104468. + compat_uptr_t p_data; /**< data to be inserted */
  104469. +} ioc_compat_fm_pcd_manip_hdr_insrt_t;
  104470. +
  104471. +#if (DPAA_VERSION >= 11)
  104472. +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_ip_params_t {
  104473. + bool calc_l4_checksum; /**< Calculate L4 checksum. */
  104474. + ioc_fm_pcd_manip_hdr_qos_mapping_mode mapping_mode; /**< TODO */
  104475. + uint8_t last_pid_offset; /**< the offset of the last Protocol within
  104476. + the inserted header */
  104477. + uint16_t id; /**< 16 bit New IP ID */
  104478. + bool dont_frag_overwrite;
  104479. + /**< IPv4 only. DF is overwritten with the hash-result next-to-last byte.
  104480. + * This byte is configured to be overwritten when RPD is set. */
  104481. + uint8_t last_dst_offset;
  104482. + /**< IPv6 only. if routing extension exist, user should set the offset of the destination address
  104483. + * in order to calculate UDP checksum pseudo header;
  104484. + * Otherwise set it to '0'. */
  104485. + ioc_compat_fm_pcd_manip_hdr_insrt_t insrt; /**< size and data to be inserted. */
  104486. +} ioc_compat_fm_pcd_manip_hdr_insrt_ip_params_t;
  104487. +#endif /* (DPAA_VERSION >= 11) */
  104488. +
  104489. +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_by_hdr_params_t {
  104490. + ioc_fm_pcd_manip_hdr_insrt_by_hdr_type type;
  104491. + union {
  104492. + ioc_compat_fm_pcd_manip_hdr_insrt_specific_l2_params_t specific_l2_params;
  104493. +#if (DPAA_VERSION >= 11)
  104494. + ioc_compat_fm_pcd_manip_hdr_insrt_ip_params_t ip_params;
  104495. + ioc_compat_fm_pcd_manip_hdr_insrt_t insrt;
  104496. +#endif /* (DPAA_VERSION >= 11) */
  104497. + } u;
  104498. +} ioc_compat_fm_pcd_manip_hdr_insrt_by_hdr_params_t;
  104499. +
  104500. +typedef struct ioc_compat_fm_pcd_manip_hdr_insrt_params_t {
  104501. + ioc_fm_pcd_manip_hdr_insrt_type type;
  104502. + union {
  104503. + ioc_compat_fm_pcd_manip_hdr_insrt_by_hdr_params_t by_hdr;
  104504. + ioc_compat_fm_pcd_manip_hdr_insrt_generic_params_t generic;
  104505. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  104506. +#error "FM_CAPWAP_SUPPORT feature not supported!"
  104507. + ioc_fm_pcd_manip_hdr_insrt_by_template_params_t by_template;
  104508. +#endif /* FM_CAPWAP_SUPPORT */
  104509. + } u;
  104510. +} ioc_compat_fm_pcd_manip_hdr_insrt_params_t;
  104511. +
  104512. +typedef struct ioc_compat_fm_pcd_manip_hdr_params_t {
  104513. + bool rmv;
  104514. + ioc_fm_pcd_manip_hdr_rmv_params_t rmv_params;
  104515. + bool insrt;
  104516. + ioc_compat_fm_pcd_manip_hdr_insrt_params_t insrt_params;
  104517. + bool field_update;
  104518. + ioc_fm_pcd_manip_hdr_field_update_params_t field_update_params;
  104519. + bool custom;
  104520. + ioc_fm_pcd_manip_hdr_custom_params_t custom_params;
  104521. + bool dont_parse_after_manip;
  104522. +} ioc_compat_fm_pcd_manip_hdr_params_t;
  104523. +
  104524. +typedef struct ioc_compat_fm_pcd_manip_special_offload_params_t {
  104525. + bool decryption;
  104526. + bool ecn_copy;
  104527. + bool dscp_copy;
  104528. + bool variable_ip_hdr_len;
  104529. + bool variable_ip_version;
  104530. + uint8_t outer_ip_hdr_len;
  104531. + uint16_t arw_size;
  104532. + compat_uptr_t arw_addr;
  104533. +} ioc_compat_fm_pcd_manip_special_offload_params_t;
  104534. +
  104535. +typedef struct ioc_compat_fm_pcd_manip_params_t {
  104536. + ioc_fm_pcd_manip_type type;
  104537. + union {
  104538. + ioc_compat_fm_pcd_manip_hdr_params_t hdr;
  104539. + ioc_fm_pcd_manip_reassem_params_t reassem;
  104540. + ioc_fm_pcd_manip_frag_params_t frag;
  104541. + ioc_compat_fm_pcd_manip_special_offload_params_t special_offload;
  104542. + } u;
  104543. + compat_uptr_t p_next_manip;
  104544. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  104545. +#error "FM_CAPWAP_SUPPORT feature not supported!"
  104546. + bool frag_or_reasm;
  104547. + ioc_fm_pcd_manip_frag_or_reasm_params_t frag_or_reasm_params;
  104548. +#endif /* FM_CAPWAP_SUPPORT */
  104549. + compat_uptr_t id;
  104550. +} ioc_compat_fm_pcd_manip_params_t;
  104551. +
  104552. +typedef struct ioc_compat_fm_pcd_manip_get_stats_t {
  104553. + compat_uptr_t id;
  104554. + ioc_fm_pcd_manip_stats_t stats;
  104555. +} ioc_compat_fm_pcd_manip_get_stats_t;
  104556. +
  104557. +#if (DPAA_VERSION >= 11)
  104558. +typedef struct ioc_compat_fm_pcd_frm_replic_group_params_t {
  104559. + uint8_t max_num_of_entries;
  104560. + uint8_t num_of_entries;
  104561. + ioc_compat_fm_pcd_cc_next_engine_params_t
  104562. + next_engine_params[IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES];
  104563. + compat_uptr_t id;
  104564. +} ioc_compat_fm_pcd_frm_replic_group_params_t;
  104565. +
  104566. +typedef struct ioc_compat_fm_pcd_frm_replic_member_t {
  104567. + compat_uptr_t h_replic_group;
  104568. + uint16_t member_index;
  104569. +} ioc_compat_fm_pcd_frm_replic_member_t;
  104570. +
  104571. +typedef struct ioc_compat_fm_pcd_frm_replic_member_params_t {
  104572. + ioc_compat_fm_pcd_frm_replic_member_t member;
  104573. + ioc_compat_fm_pcd_cc_next_engine_params_t next_engine_params;
  104574. +} ioc_compat_fm_pcd_frm_replic_member_params_t;
  104575. +
  104576. +typedef struct ioc_compat_fm_vsp_params_t {
  104577. + compat_uptr_t p_fm; /**< A handle to the FM object this VSP related to */
  104578. + ioc_fm_ext_pools ext_buf_pools; /**< Which external buffer pools are used
  104579. + (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes.
  104580. + parameter associated with Rx / OP port */
  104581. + uint16_t liodn_offset; /**< VSP's LIODN offset */
  104582. + struct {
  104583. + ioc_fm_port_type port_type; /**< Port type */
  104584. + uint8_t port_id; /**< Port Id - relative to type */
  104585. + } port_params;
  104586. + uint8_t relative_profile_id; /**< VSP Id - relative to VSP's range
  104587. + defined in relevant FM object */
  104588. + compat_uptr_t id; /**< return value */
  104589. +} ioc_compat_fm_vsp_params_t;
  104590. +
  104591. +typedef struct ioc_compat_fm_buf_pool_depletion_params_t {
  104592. + compat_uptr_t p_fm_vsp;
  104593. + ioc_fm_buf_pool_depletion_t fm_buf_pool_depletion;
  104594. +} ioc_compat_fm_buf_pool_depletion_params_t;
  104595. +
  104596. +typedef struct ioc_compat_fm_buffer_prefix_content_params_t {
  104597. + compat_uptr_t p_fm_vsp;
  104598. + ioc_fm_buffer_prefix_content_t fm_buffer_prefix_content;
  104599. +} ioc_compat_fm_buffer_prefix_content_params_t;
  104600. +
  104601. +typedef struct ioc_compat_fm_vsp_config_no_sg_params_t {
  104602. + compat_uptr_t p_fm_vsp;
  104603. + bool no_sg;
  104604. +} ioc_compat_fm_vsp_config_no_sg_params_t;
  104605. +
  104606. +typedef struct ioc_compat_fm_vsp_prs_result_params_t {
  104607. + compat_uptr_t p_fm_vsp;
  104608. + compat_uptr_t p_data;
  104609. +} ioc_compat_fm_vsp_prs_result_params_t;
  104610. +
  104611. +#endif /* (DPAA_VERSION >= 11) */
  104612. +typedef struct ioc_compat_fm_pcd_kg_scheme_spc_t {
  104613. + uint32_t val;
  104614. + compat_uptr_t id;
  104615. +} ioc_compat_fm_pcd_kg_scheme_spc_t;
  104616. +
  104617. +typedef struct ioc_compat_fm_ctrl_mon_counters_params_t {
  104618. + uint8_t fm_ctrl_index;
  104619. + compat_uptr_t p_mon;
  104620. +} ioc_compat_fm_ctrl_mon_counters_params_t;
  104621. +
  104622. +typedef struct ioc_compat_fm_pcd_cc_tbl_get_stats_t {
  104623. + compat_uptr_t id;
  104624. + uint16_t key_index;
  104625. + ioc_fm_pcd_cc_key_statistics_t statistics;
  104626. +} ioc_compat_fm_pcd_cc_tbl_get_stats_t;
  104627. +
  104628. +
  104629. +/* } pcd compat structures */
  104630. +
  104631. +void compat_obj_delete(
  104632. + ioc_compat_fm_obj_t *compat_id,
  104633. + ioc_fm_obj_t *id);
  104634. +
  104635. +/* pcd compat functions { */
  104636. +void compat_copy_fm_pcd_plcr_profile(
  104637. + ioc_compat_fm_pcd_plcr_profile_params_t *compat_param,
  104638. + ioc_fm_pcd_plcr_profile_params_t *param,
  104639. + uint8_t compat);
  104640. +
  104641. +void compat_copy_fm_pcd_cc_key(
  104642. + ioc_compat_fm_pcd_cc_key_params_t *compat_param,
  104643. + ioc_fm_pcd_cc_key_params_t *param,
  104644. + uint8_t compat);
  104645. +
  104646. +void compat_copy_fm_pcd_cc_node_modify_key_and_next_engine(
  104647. + ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t *compat_param,
  104648. + ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t *param,
  104649. + uint8_t compat);
  104650. +
  104651. +void compat_copy_fm_pcd_cc_node_modify_next_engine(
  104652. + ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t *compat_param,
  104653. + ioc_fm_pcd_cc_node_modify_next_engine_params_t *param,
  104654. + uint8_t compat);
  104655. +
  104656. +void compat_fm_pcd_cc_tree_modify_next_engine(
  104657. + ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t *compat_param,
  104658. + ioc_fm_pcd_cc_tree_modify_next_engine_params_t *param,
  104659. + uint8_t compat);
  104660. +
  104661. +void compat_copy_fm_pcd_hash_table(
  104662. + ioc_compat_fm_pcd_hash_table_params_t *compat_param,
  104663. + ioc_fm_pcd_hash_table_params_t *param,
  104664. + uint8_t compat);
  104665. +
  104666. +void compat_copy_fm_pcd_cc_grp(
  104667. + ioc_compat_fm_pcd_cc_grp_params_t *compat_param,
  104668. + ioc_fm_pcd_cc_grp_params_t *param,
  104669. + uint8_t compat);
  104670. +
  104671. +void compat_copy_fm_pcd_cc_tree(
  104672. + ioc_compat_fm_pcd_cc_tree_params_t *compat_param,
  104673. + ioc_fm_pcd_cc_tree_params_t *param,
  104674. + uint8_t compat);
  104675. +
  104676. +void compat_copy_fm_pcd_cc_tbl_get_stats(
  104677. + ioc_compat_fm_pcd_cc_tbl_get_stats_t *compat_param,
  104678. + ioc_fm_pcd_cc_tbl_get_stats_t *param,
  104679. + uint8_t compat);
  104680. +
  104681. +void compat_fm_pcd_prs_sw(
  104682. + ioc_compat_fm_pcd_prs_sw_params_t *compat_param,
  104683. + ioc_fm_pcd_prs_sw_params_t *param,
  104684. + uint8_t compat);
  104685. +
  104686. +void compat_copy_fm_pcd_kg_scheme(
  104687. + ioc_compat_fm_pcd_kg_scheme_params_t *compat_param,
  104688. + ioc_fm_pcd_kg_scheme_params_t *param,
  104689. + uint8_t compat);
  104690. +
  104691. +void compat_copy_fm_pcd_kg_scheme_select(
  104692. + ioc_compat_fm_pcd_kg_scheme_select_t *compat_param,
  104693. + ioc_fm_pcd_kg_scheme_select_t *param,
  104694. + uint8_t compat);
  104695. +
  104696. +void compat_copy_fm_pcd_kg_schemes_params(
  104697. + ioc_compat_fm_pcd_port_schemes_params_t *compat_param,
  104698. + ioc_fm_pcd_port_schemes_params_t *param,
  104699. + uint8_t compat);
  104700. +
  104701. +void compat_copy_fm_port_pcd_kg(
  104702. + ioc_compat_fm_port_pcd_kg_params_t *compat_param,
  104703. + ioc_fm_port_pcd_kg_params_t *param,
  104704. + uint8_t compat);
  104705. +
  104706. +void compat_copy_fm_port_pcd(
  104707. + ioc_compat_fm_port_pcd_params_t *compat_param,
  104708. + ioc_fm_port_pcd_params_t *param,
  104709. + uint8_t compat);
  104710. +
  104711. +#if (DPAA_VERSION >= 11)
  104712. +void compat_copy_fm_port_vsp_alloc_params(
  104713. + ioc_compat_fm_port_vsp_alloc_params_t *compat_param,
  104714. + ioc_fm_port_vsp_alloc_params_t *param,
  104715. + uint8_t compat);
  104716. +#endif /* (DPAA_VERSION >= 11) */
  104717. +
  104718. +void compat_copy_fm_pcd_net_env(
  104719. + ioc_compat_fm_pcd_net_env_params_t *compat_param,
  104720. + ioc_fm_pcd_net_env_params_t *param,
  104721. + uint8_t compat);
  104722. +
  104723. +void compat_copy_fm_pcd_cc_node_modify_key(
  104724. + ioc_compat_fm_pcd_cc_node_modify_key_params_t *compat_param,
  104725. + ioc_fm_pcd_cc_node_modify_key_params_t *param,
  104726. + uint8_t compat);
  104727. +
  104728. +void compat_copy_keys(
  104729. + ioc_compat_keys_params_t *compat_param,
  104730. + ioc_keys_params_t *param,
  104731. + uint8_t compat);
  104732. +
  104733. +void compat_copy_fm_pcd_cc_node(
  104734. + ioc_compat_fm_pcd_cc_node_params_t *compat_param,
  104735. + ioc_fm_pcd_cc_node_params_t *param,
  104736. + uint8_t compat);
  104737. +
  104738. +void compat_fm_pcd_manip_set_node(
  104739. + ioc_compat_fm_pcd_manip_params_t *compat_param,
  104740. + ioc_fm_pcd_manip_params_t *param,
  104741. + uint8_t compat);
  104742. +
  104743. +void compat_copy_fm_pcd_manip_get_stats(
  104744. + ioc_compat_fm_pcd_manip_get_stats_t *compat_param,
  104745. + ioc_fm_pcd_manip_get_stats_t *param,
  104746. + uint8_t compat);
  104747. +
  104748. +void compat_copy_fm_port_pcd_modify_tree(
  104749. + ioc_compat_fm_obj_t *compat_id,
  104750. + ioc_fm_obj_t *id,
  104751. + uint8_t compat);
  104752. +
  104753. +#if (DPAA_VERSION >= 11)
  104754. +void compat_copy_fm_pcd_frm_replic_group_params(
  104755. + ioc_compat_fm_pcd_frm_replic_group_params_t *compat_param,
  104756. + ioc_fm_pcd_frm_replic_group_params_t *param,
  104757. + uint8_t compat);
  104758. +
  104759. +void compat_copy_fm_pcd_frm_replic_member(
  104760. + ioc_compat_fm_pcd_frm_replic_member_t *compat_param,
  104761. + ioc_fm_pcd_frm_replic_member_t *param,
  104762. + uint8_t compat);
  104763. +
  104764. +void compat_copy_fm_pcd_frm_replic_member_params(
  104765. + ioc_compat_fm_pcd_frm_replic_member_params_t *compat_param,
  104766. + ioc_fm_pcd_frm_replic_member_params_t *param,
  104767. + uint8_t compat);
  104768. +
  104769. +void compat_copy_fm_vsp_params(
  104770. + ioc_compat_fm_vsp_params_t *compat_param,
  104771. + ioc_fm_vsp_params_t *param,
  104772. + uint8_t compat);
  104773. +
  104774. +void compat_copy_fm_buf_pool_depletion_params(
  104775. + ioc_compat_fm_buf_pool_depletion_params_t *compat_param,
  104776. + ioc_fm_buf_pool_depletion_params_t *param,
  104777. + uint8_t compat);
  104778. +
  104779. +void compat_copy_fm_buffer_prefix_content_params(
  104780. + ioc_compat_fm_buffer_prefix_content_params_t *compat_param,
  104781. + ioc_fm_buffer_prefix_content_params_t *param,
  104782. + uint8_t compat);
  104783. +
  104784. +void compat_copy_fm_vsp_config_no_sg_params(
  104785. + ioc_compat_fm_vsp_config_no_sg_params_t *compat_param,
  104786. + ioc_fm_vsp_config_no_sg_params_t *param,
  104787. + uint8_t compat);
  104788. +
  104789. +void compat_copy_fm_vsp_prs_result_params(
  104790. + ioc_compat_fm_vsp_prs_result_params_t *compat_param,
  104791. + ioc_fm_vsp_prs_result_params_t *param,
  104792. + uint8_t compat);
  104793. +
  104794. +#endif /* (DPAA_VERSION >= 11) */
  104795. +
  104796. +void compat_copy_fm_pcd_kg_scheme_spc(
  104797. + ioc_compat_fm_pcd_kg_scheme_spc_t *compat_param,
  104798. + ioc_fm_pcd_kg_scheme_spc_t *param,
  104799. + uint8_t compat);
  104800. +
  104801. +/* } pcd compat functions */
  104802. +#endif
  104803. --- /dev/null
  104804. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources.h
  104805. @@ -0,0 +1,121 @@
  104806. +/*
  104807. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  104808. + *
  104809. + * Redistribution and use in source and binary forms, with or without
  104810. + * modification, are permitted provided that the following conditions are met:
  104811. + * * Redistributions of source code must retain the above copyright
  104812. + * notice, this list of conditions and the following disclaimer.
  104813. + * * Redistributions in binary form must reproduce the above copyright
  104814. + * notice, this list of conditions and the following disclaimer in the
  104815. + * documentation and/or other materials provided with the distribution.
  104816. + * * Neither the name of Freescale Semiconductor nor the
  104817. + * names of its contributors may be used to endorse or promote products
  104818. + * derived from this software without specific prior written permission.
  104819. + *
  104820. + *
  104821. + * ALTERNATIVELY, this software may be distributed under the terms of the
  104822. + * GNU General Public License ("GPL") as published by the Free Software
  104823. + * Foundation, either version 2 of that License or (at your option) any
  104824. + * later version.
  104825. + *
  104826. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  104827. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  104828. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  104829. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  104830. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  104831. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  104832. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  104833. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  104834. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  104835. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  104836. + */
  104837. +
  104838. +/*
  104839. + @File lnxwrp_resources.h
  104840. +
  104841. + @Description FMD wrapper resource allocation functions.
  104842. +
  104843. +*/
  104844. +
  104845. +#ifndef LNXWRP_RESOURCES_H_
  104846. +#define LNXWRP_RESOURCES_H_
  104847. +
  104848. +#if !defined(FMAN_RESOURCES_UNIT_TEST)
  104849. +#include "lnxwrp_fm.h"
  104850. +#else
  104851. +#include "lnxwrp_resources_ut.h"
  104852. +#endif
  104853. +
  104854. +#define ROUND(X) ((2*(X)+1)/2)
  104855. +#define CEIL(X) ((X)+1)
  104856. +/* #define ROUND_DIV(X, Y) (((X)+(Y)/2)/(Y)) */
  104857. +#define ROUND_DIV(X, Y) ((2*(X)+(Y))/(2*(Y)))
  104858. +#define CEIL_DIV(X, Y) (((X)+(Y)-1)/(Y))
  104859. +
  104860. +/* used for resource calculus */
  104861. +#define DPDE_1G 2 /* DQDP 1g - from LLD:
  104862. + DEFAULT_PORT_txFifoDeqPipelineDepth_1G */
  104863. +#define DPDE_10G 8 /* DQDP 10g - from LLD:
  104864. + DEFAULT_PORT_txFifoDeqPipelineDepth_10G */
  104865. +
  104866. +int fm_set_active_fman_ports(struct platform_device *of_dev,
  104867. + t_LnxWrpFmDev *p_LnxWrpFmDev);
  104868. +
  104869. +/* Calculate the fifosize based on MURAM allocation, number of ports, dpde
  104870. + * value and s/g software support (! Kernel does not suport s/g).
  104871. + *
  104872. + * Algorithm summary:
  104873. + * - Calculate the the minimum fifosize required for every type of port
  104874. + * (TX,RX for 1G, 2.5G and 10G).
  104875. + * - Set TX the minimum fifosize required.
  104876. + * - Distribute the remaining buffers (after all TX were set) to RX ports
  104877. + * based on:
  104878. + * 1G RX = Remaining_buffers * 1/(1+2.5+10)
  104879. + * 2.5G RX = Remaining_buffers * 2.5/(1+2.5+10)
  104880. + * 10G RX = Remaining_buffers * 10/(1+2.5+10)
  104881. + * - if the RX is smaller than the minimum required, then set the minimum
  104882. + * required
  104883. + * - In the end distribuite the leftovers if there are any (due to
  104884. + * unprecise calculus) or if over allocation cat some buffers from all RX
  104885. + * ports w/o pass over minimum required treshold, but if there must be
  104886. + * pass the treshold in order to cat the over allocation ,then this
  104887. + * configuration can not be set - KERN_ALERT.
  104888. +*/
  104889. +int fm_precalculate_fifosizes(t_LnxWrpFmDev *p_LnxWrpFmDev,
  104890. + int muram_fifo_size);
  104891. +
  104892. +#if !defined(FMAN_RESOURCES_UNIT_TEST)
  104893. +int fm_config_precalculate_fifosize(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev);
  104894. +#endif
  104895. +
  104896. +/* Compute FMan open DMA based on total number of open DMAs and
  104897. + * number of available fman ports.
  104898. + *
  104899. + * By default 10g ports are set to input parameters. The other ports
  104900. + * tries to keep the proportion rx=2tx open dmas or tresholds.
  104901. + *
  104902. + * If leftovers, then those will be set as shared.
  104903. + *
  104904. + * If after computing overflow appears, then it decrements open dma
  104905. + * for all ports w/o cross the tresholds. If the tresholds are meet
  104906. + * and is still overflow, then it returns error.
  104907. +*/
  104908. +int fm_precalculate_open_dma(t_LnxWrpFmDev *p_LnxWrpFmDev,
  104909. + int max_fm_open_dma,
  104910. + int default_tx_10g_dmas,
  104911. + int default_rx_10g_dmas,
  104912. + int min_tx_10g_treshold, int min_rx_10g_treshold);
  104913. +
  104914. +#if !defined(FMAN_RESOURCES_UNIT_TEST)
  104915. +int fm_config_precalculate_open_dma(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev);
  104916. +#endif
  104917. +
  104918. +/* Compute FMan tnums based on available tnums and number of ports.
  104919. + * Set defaults (minim tresholds) and then distribute leftovers.*/
  104920. +int fm_precalculate_tnums(t_LnxWrpFmDev *p_LnxWrpFmDev, int max_fm_tnums);
  104921. +
  104922. +#if !defined(FMAN_RESOURCES_UNIT_TEST)
  104923. +int fm_config_precalculate_tnums(t_LnxWrpFmPortDev *p_LnxWrpFmPortDev);
  104924. +#endif
  104925. +
  104926. +#endif /* LNXWRP_RESOURCES_H_ */
  104927. --- /dev/null
  104928. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.c
  104929. @@ -0,0 +1,191 @@
  104930. +/* Copyright (c) 2012 Freescale Semiconductor, Inc.
  104931. + * All rights reserved.
  104932. + *
  104933. + * Redistribution and use in source and binary forms, with or without
  104934. + * modification, are permitted provided that the following conditions are met:
  104935. + * * Redistributions of source code must retain the above copyright
  104936. + * notice, this list of conditions and the following disclaimer.
  104937. + * * Redistributions in binary form must reproduce the above copyright
  104938. + * notice, this list of conditions and the following disclaimer in the
  104939. + * documentation and/or other materials provided with the distribution.
  104940. + * * Neither the name of Freescale Semiconductor nor the
  104941. + * names of its contributors may be used to endorse or promote products
  104942. + * derived from this software without specific prior written permission.
  104943. + *
  104944. + *
  104945. + * ALTERNATIVELY, this software may be distributed under the terms of the
  104946. + * GNU General Public License ("GPL") as published by the Free Software
  104947. + * Foundation, either version 2 of that License or (at your option) any
  104948. + * later version.
  104949. + *
  104950. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  104951. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  104952. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  104953. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  104954. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  104955. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  104956. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  104957. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  104958. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  104959. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  104960. + */
  104961. +
  104962. +#include "lnxwrp_resources.h"
  104963. +#include "lnxwrp_resources_ut.h"
  104964. +
  104965. +#define KILOBYTE 0x400 /* 1024 */
  104966. +
  104967. +typedef enum e_board_type {
  104968. + e_p3041,
  104969. + e_p4080,
  104970. + e_p5020,
  104971. + e_p1023
  104972. +} e_board_type;
  104973. +
  104974. +uint8_t board_type;
  104975. +uint32_t muram_size = 0;
  104976. +uint32_t dmas_num = 0;
  104977. +uint32_t task_num = 0;
  104978. +uint32_t frame_size = 0;
  104979. +uint32_t oh_num = 0;
  104980. +uint32_t num_ports_1g = 0;
  104981. +uint32_t num_ports_10g = 0;
  104982. +uint32_t num_ports_2g5 = 0;
  104983. +uint32_t fsl_fman_phy_maxfrm = 0;
  104984. +uint32_t dpa_rx_extra_headroom = 0;
  104985. +
  104986. +void show_help(void){
  104987. + printf(" help: \n");
  104988. + printf(" -b <board_type> -f <max_fram_size(mtu)> -o <num_oh_ports> -g1"
  104989. + " <num_1g_ports> -g10 <num_10g_ports> -g25 <num_2g5_ports>\n");
  104990. + printf(" Maxim num of DMAS availbale: P3/P4/P5:32 , P1023:16 \n");
  104991. + printf(" Maxim num of TNUMs availbale: P3/P4/P5:128, P1023:32 \n");
  104992. + printf(" Muram size: P3/P4/P5:160K, P1023:64K \n");
  104993. + printf(" Number of ports:\n");
  104994. + printf(" P3/P5: 5p 1g, 1p 10g, 7p oh \n");
  104995. + printf(" P4 : 4p 1g, 1p 10g, 7p oh \n");
  104996. + printf(" P1 : 2p 1g, 0p 10g, 4p oh \n");
  104997. + printf(" MTU: Default:1522, Jumbo:9600 \n");
  104998. +}
  104999. +
  105000. +int fm_set_param(t_LnxWrpFmDev *p_LnxWrpFmDev) {
  105001. + struct fm_active_ports *fm_active_ports_info = NULL;
  105002. + fm_active_ports_info = &p_LnxWrpFmDev->fm_active_ports_info;
  105003. +
  105004. + switch(board_type){
  105005. + case e_p3041:
  105006. + case e_p5020:
  105007. + muram_size = 160*KILOBYTE;
  105008. + dmas_num = 32;
  105009. + task_num = 128;
  105010. + if ((num_ports_1g+num_ports_2g5) > 5 || num_ports_10g > 1 || oh_num > 7)
  105011. + goto err_fm_set_param;
  105012. + break;
  105013. + case e_p4080:
  105014. + muram_size = 160*KILOBYTE;
  105015. + dmas_num = 32;
  105016. + task_num = 128;
  105017. + if ((num_ports_1g+num_ports_2g5) > 4 || num_ports_10g > 1 || oh_num > 7)
  105018. + goto err_fm_set_param;
  105019. + break;
  105020. + case e_p1023:
  105021. + muram_size = 64*KILOBYTE;
  105022. + dmas_num = 16;
  105023. + task_num = 128;
  105024. + if ((num_ports_1g+num_ports_2g5) > 2 || oh_num > 4)
  105025. + goto err_fm_set_param;
  105026. + break;
  105027. + default:
  105028. + goto err_fm_set_param;
  105029. + break;
  105030. + }
  105031. +
  105032. + p_LnxWrpFmDev->id = 0;
  105033. + fsl_fman_phy_maxfrm = frame_size;
  105034. + dpa_rx_extra_headroom = 0; /* ATTENTION: can be != 0 */
  105035. + fm_active_ports_info->num_oh_ports = oh_num;
  105036. + fm_active_ports_info->num_tx_ports = num_ports_1g;
  105037. + fm_active_ports_info->num_rx_ports = num_ports_1g;
  105038. + fm_active_ports_info->num_tx25_ports = num_ports_2g5;
  105039. + fm_active_ports_info->num_rx25_ports = num_ports_2g5;
  105040. + fm_active_ports_info->num_tx10_ports = num_ports_10g;
  105041. + fm_active_ports_info->num_rx10_ports = num_ports_10g;
  105042. +
  105043. + return 0;
  105044. +
  105045. +err_fm_set_param:
  105046. + printf(" ERR: To many ports!!! \n");
  105047. + return -1;
  105048. +}
  105049. +
  105050. +int main (int argc, char *argv[]){
  105051. + t_LnxWrpFmDev LnxWrpFmDev;
  105052. + t_LnxWrpFmDev *p_LnxWrpFmDev = &LnxWrpFmDev;
  105053. + int tokens_cnt = 1;
  105054. +
  105055. + char *token = NULL;
  105056. +
  105057. + while(tokens_cnt < argc)
  105058. + {
  105059. + token = argv[tokens_cnt++];
  105060. + if (strcmp(token, "-b") == 0){
  105061. + if(strcmp(argv[tokens_cnt],"p3") == 0)
  105062. + board_type = e_p3041;
  105063. + else if(strcmp(argv[tokens_cnt],"p4") == 0)
  105064. + board_type = e_p4080;
  105065. + else if(strcmp(argv[tokens_cnt],"p5") == 0)
  105066. + board_type = e_p5020;
  105067. + else if(strcmp(argv[tokens_cnt],"p1") == 0)
  105068. + board_type = e_p1023;
  105069. + else
  105070. + show_help();
  105071. + tokens_cnt++;
  105072. + }
  105073. + else if(strcmp(token, "-d") == 0){
  105074. + dmas_num = atoi(argv[tokens_cnt++]);
  105075. + }
  105076. + else if(strcmp(token, "-t") == 0)
  105077. + task_num = atoi(argv[tokens_cnt++]);
  105078. + else if(strcmp(token, "-f") == 0)
  105079. + frame_size = atoi(argv[tokens_cnt++]);
  105080. + else if(strcmp(token, "-o") == 0)
  105081. + oh_num = atoi(argv[tokens_cnt++]);
  105082. + else if(strcmp(token, "-g1") == 0)
  105083. + num_ports_1g = atoi(argv[tokens_cnt++]);
  105084. + else if(strcmp(token, "-g10") == 0)
  105085. + num_ports_10g = atoi(argv[tokens_cnt++]);
  105086. + else if(strcmp(token, "-g25") == 0)
  105087. + num_ports_2g5 = atoi(argv[tokens_cnt++]);
  105088. + else {
  105089. + show_help();
  105090. + return -1;
  105091. + }
  105092. + }
  105093. +
  105094. + if(fm_set_param(p_LnxWrpFmDev) < 0){
  105095. + show_help();
  105096. + return -1;
  105097. + }
  105098. +
  105099. + if(fm_precalculate_fifosizes(
  105100. + p_LnxWrpFmDev,
  105101. + 128*KILOBYTE)
  105102. + != 0)
  105103. + return -1;
  105104. + if(fm_precalculate_open_dma(
  105105. + p_LnxWrpFmDev,
  105106. + dmas_num, /* max open dmas:dpaa_integration_ext.h */
  105107. + FM_DEFAULT_TX10G_OPENDMA, /* default TX 10g open dmas */
  105108. + FM_DEFAULT_RX10G_OPENDMA, /* default RX 10g open dmas */
  105109. + FM_10G_OPENDMA_MIN_TRESHOLD,/* TX 10g minimum treshold */
  105110. + FM_10G_OPENDMA_MIN_TRESHOLD)/* RX 10g minimum treshold */
  105111. + != 0)
  105112. + return -1;
  105113. + if(fm_precalculate_tnums(
  105114. + p_LnxWrpFmDev,
  105115. + task_num) /* max TNUMS: dpa integration file. */
  105116. + != 0)
  105117. + return -1;
  105118. +
  105119. + return 0;
  105120. +}
  105121. --- /dev/null
  105122. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.h
  105123. @@ -0,0 +1,144 @@
  105124. +/* Copyright (c) 2012 Freescale Semiconductor, Inc
  105125. + * All rights reserved.
  105126. + *
  105127. + * Redistribution and use in source and binary forms, with or without
  105128. + * modification, are permitted provided that the following conditions are met:
  105129. + * * Redistributions of source code must retain the above copyright
  105130. + * notice, this list of conditions and the following disclaimer.
  105131. + * * Redistributions in binary form must reproduce the above copyright
  105132. + * notice, this list of conditions and the following disclaimer in the
  105133. + * documentation and/or other materials provided with the distribution.
  105134. + * * Neither the name of Freescale Semiconductor nor the
  105135. + * names of its contributors may be used to endorse or promote products
  105136. + * derived from this software without specific prior written permission.
  105137. + *
  105138. + *
  105139. + * ALTERNATIVELY, this software may be distributed under the terms of the
  105140. + * GNU General Public License ("GPL") as published by the Free Software
  105141. + * Foundation, either version 2 of that License or (at your option) any
  105142. + * later version.
  105143. + *
  105144. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  105145. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  105146. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  105147. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  105148. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  105149. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  105150. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  105151. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  105152. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  105153. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  105154. + */
  105155. +
  105156. +#ifndef FM_RESS_TEST_H_
  105157. +#define FM_RESS_TEST_H_
  105158. +
  105159. +#include <stdint.h>
  105160. +#include <stdbool.h>
  105161. +#include <stdio.h>
  105162. +#include <assert.h>
  105163. +#include <string.h>
  105164. +#include <stdlib.h>
  105165. +
  105166. +#define _Packed
  105167. +#define _PackedType __attribute__ ((packed))
  105168. +#define MAX(x, y) (((x) > (y)) ? (x) : (y))
  105169. +#define MIN(x, y) (((x) < (y)) ? (x) : (y))
  105170. +#define KERN_ALERT ""
  105171. +#define KERN_INFO ""
  105172. +#define ASSERT_COND assert
  105173. +#define printk printf
  105174. +#define NET_IP_ALIGN 0
  105175. +#define FM_FIFO_ALLOCATION_OLD_ALG
  105176. +
  105177. +#if defined(CONFIG_FMAN_DISABLE_OH_AND_DISTRIBUTE_RESOURCES)
  105178. +#define FM_10G_OPENDMA_MIN_TRESHOLD 8 /* 10g minimum treshold if only HC is enabled and no OH port enabled */
  105179. +#define FM_OPENDMA_RX_TX_RAPORT 2 /* RX = 2*TX */
  105180. +#else
  105181. +#define FM_10G_OPENDMA_MIN_TRESHOLD 7 /* 10g minimum treshold if 7 OH ports are enabled */
  105182. +#define FM_OPENDMA_RX_TX_RAPORT 1 /* RX = TX */
  105183. +#endif
  105184. +#define FM_DEFAULT_TX10G_OPENDMA 8 /* default TX 10g open dmas */
  105185. +#define FM_DEFAULT_RX10G_OPENDMA 8 /* default RX 10g open dmas */
  105186. +
  105187. +/* information about all active ports for an FMan.
  105188. + * !Some ports may be disabled by u-boot, thus will not be available */
  105189. +struct fm_active_ports {
  105190. + uint32_t num_oh_ports;
  105191. + uint32_t num_tx_ports;
  105192. + uint32_t num_rx_ports;
  105193. + uint32_t num_tx25_ports;
  105194. + uint32_t num_rx25_ports;
  105195. + uint32_t num_tx10_ports;
  105196. + uint32_t num_rx10_ports;
  105197. +};
  105198. +
  105199. +/* FMan resources precalculated at fm probe based
  105200. + * on available FMan port. */
  105201. +struct fm_resource_settings {
  105202. + /* buffers - fifo sizes */
  105203. + uint32_t tx1g_num_buffers;
  105204. + uint32_t rx1g_num_buffers;
  105205. + uint32_t tx2g5_num_buffers; /* Not supported yet by LLD */
  105206. + uint32_t rx2g5_num_buffers; /* Not supported yet by LLD */
  105207. + uint32_t tx10g_num_buffers;
  105208. + uint32_t rx10g_num_buffers;
  105209. + uint32_t oh_num_buffers;
  105210. + uint32_t shared_ext_buffers;
  105211. +
  105212. +
  105213. + /* open DMAs */
  105214. + uint32_t tx_1g_dmas;
  105215. + uint32_t rx_1g_dmas;
  105216. + uint32_t tx_2g5_dmas; /* Not supported yet by LLD */
  105217. + uint32_t rx_2g5_dmas; /* Not supported yet by LLD */
  105218. + uint32_t tx_10g_dmas;
  105219. + uint32_t rx_10g_dmas;
  105220. + uint32_t oh_dmas;
  105221. + uint32_t shared_ext_open_dma;
  105222. +
  105223. + /* Tnums */
  105224. + uint32_t tx_1g_tnums;
  105225. + uint32_t rx_1g_tnums;
  105226. + uint32_t tx_2g5_tnums; /* Not supported yet by LLD */
  105227. + uint32_t rx_2g5_tnums; /* Not supported yet by LLD */
  105228. + uint32_t tx_10g_tnums;
  105229. + uint32_t rx_10g_tnums;
  105230. + uint32_t oh_tnums;
  105231. + uint32_t shared_ext_tnums;
  105232. +};
  105233. +
  105234. +typedef struct {
  105235. + uint8_t id;
  105236. + struct fm_active_ports fm_active_ports_info;
  105237. + struct fm_resource_settings fm_resource_settings_info;
  105238. +} t_LnxWrpFmDev;
  105239. +
  105240. +typedef struct {
  105241. + uint8_t id;
  105242. +} t_LnxWrpFmPortDev;
  105243. +
  105244. +typedef _Packed struct t_FmPrsResult {
  105245. + volatile uint8_t lpid; /**< Logical port id */
  105246. + volatile uint8_t shimr; /**< Shim header result */
  105247. + volatile uint16_t l2r; /**< Layer 2 result */
  105248. + volatile uint16_t l3r; /**< Layer 3 result */
  105249. + volatile uint8_t l4r; /**< Layer 4 result */
  105250. + volatile uint8_t cplan; /**< Classification plan id */
  105251. + volatile uint16_t nxthdr; /**< Next Header */
  105252. + volatile uint16_t cksum; /**< Checksum */
  105253. + volatile uint32_t lcv; /**< LCV */
  105254. + volatile uint8_t shim_off[3]; /**< Shim offset */
  105255. + volatile uint8_t eth_off; /**< ETH offset */
  105256. + volatile uint8_t llc_snap_off; /**< LLC_SNAP offset */
  105257. + volatile uint8_t vlan_off[2]; /**< VLAN offset */
  105258. + volatile uint8_t etype_off; /**< ETYPE offset */
  105259. + volatile uint8_t pppoe_off; /**< PPP offset */
  105260. + volatile uint8_t mpls_off[2]; /**< MPLS offset */
  105261. + volatile uint8_t ip_off[2]; /**< IP offset */
  105262. + volatile uint8_t gre_off; /**< GRE offset */
  105263. + volatile uint8_t l4_off; /**< Layer 4 offset */
  105264. + volatile uint8_t nxthdr_off; /**< Parser end point */
  105265. +} _PackedType t_FmPrsResult;
  105266. +
  105267. +#endif
  105268. --- /dev/null
  105269. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_resources_ut.make
  105270. @@ -0,0 +1,28 @@
  105271. +CC=gcc
  105272. +
  105273. +LNXWRP_RESS_UT=lnxwrp_resources_ut
  105274. +OBJ=lnxwrp_resources
  105275. +
  105276. +INC_PATH=
  105277. +LIB_PATH=
  105278. +
  105279. +INC=$(addprefix -I,$(INC_PATH))
  105280. +LIB=$(addprefix -L,$(LIB_PATH))
  105281. +
  105282. +CFLAGS= -gdwarf-2 -g -O0 -Wall
  105283. +XFLAGS= -DFMAN_RESOURCES_UNIT_TEST
  105284. +
  105285. +all: $(LNXWRP_RESS_UT)
  105286. +
  105287. +$(LNXWRP_RESS_UT):$(addsuffix .o,$(OBJ)) $(LNXWRP_RESS_UT).o
  105288. + $(CC) -o $(LNXWRP_RESS_UT) $(LNXWRP_RESS_UT).o $(addsuffix .o,$(OBJ))
  105289. +
  105290. +%.o: %.c
  105291. + @(echo " (CC) $@")
  105292. + @($(CC) $(INC) $(CFLAGS) $(XFLAGS) -o $(@) -c $<)
  105293. +
  105294. +.PHONY: clean
  105295. +
  105296. +clean:
  105297. + rm -f *.o
  105298. + rm -f $(LNXWRP_RESS_UT)
  105299. --- /dev/null
  105300. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.c
  105301. @@ -0,0 +1,60 @@
  105302. +/*
  105303. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  105304. + *
  105305. + * Redistribution and use in source and binary forms, with or without
  105306. + * modification, are permitted provided that the following conditions are met:
  105307. + * * Redistributions of source code must retain the above copyright
  105308. + * notice, this list of conditions and the following disclaimer.
  105309. + * * Redistributions in binary form must reproduce the above copyright
  105310. + * notice, this list of conditions and the following disclaimer in the
  105311. + * documentation and/or other materials provided with the distribution.
  105312. + * * Neither the name of Freescale Semiconductor nor the
  105313. + * names of its contributors may be used to endorse or promote products
  105314. + * derived from this software without specific prior written permission.
  105315. + *
  105316. + *
  105317. + * ALTERNATIVELY, this software may be distributed under the terms of the
  105318. + * GNU General Public License ("GPL") as published by the Free Software
  105319. + * Foundation, either version 2 of that License or (at your option) any
  105320. + * later version.
  105321. + *
  105322. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  105323. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  105324. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  105325. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  105326. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  105327. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  105328. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  105329. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  105330. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  105331. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  105332. + */
  105333. +
  105334. +/*
  105335. + @File lnxwrp_sysfs.c
  105336. +
  105337. + @Description FM wrapper sysfs related functions.
  105338. +
  105339. +*/
  105340. +
  105341. +#include <linux/types.h>
  105342. +#include "lnxwrp_sysfs.h"
  105343. +
  105344. +uint8_t fm_find_statistic_counter_by_name(const char *attr_name,
  105345. + const struct sysfs_stats_t *sysfs_stats,
  105346. + uint8_t *offset)
  105347. +{
  105348. + int i = 0;
  105349. +
  105350. + while (sysfs_stats[i].stat_name != NULL) {
  105351. + if (strcmp(sysfs_stats[i].stat_name, attr_name) == 0) {
  105352. + if (offset != NULL)
  105353. + *offset = i;
  105354. + return sysfs_stats[i].stat_counter;
  105355. + }
  105356. +
  105357. + i++;
  105358. + }
  105359. + WARN(1, "FMD: Should never get here!");
  105360. + return 0;
  105361. +}
  105362. --- /dev/null
  105363. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs.h
  105364. @@ -0,0 +1,60 @@
  105365. +/*
  105366. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  105367. + *
  105368. + * Redistribution and use in source and binary forms, with or without
  105369. + * modification, are permitted provided that the following conditions are met:
  105370. + * * Redistributions of source code must retain the above copyright
  105371. + * notice, this list of conditions and the following disclaimer.
  105372. + * * Redistributions in binary form must reproduce the above copyright
  105373. + * notice, this list of conditions and the following disclaimer in the
  105374. + * documentation and/or other materials provided with the distribution.
  105375. + * * Neither the name of Freescale Semiconductor nor the
  105376. + * names of its contributors may be used to endorse or promote products
  105377. + * derived from this software without specific prior written permission.
  105378. + *
  105379. + *
  105380. + * ALTERNATIVELY, this software may be distributed under the terms of the
  105381. + * GNU General Public License ("GPL") as published by the Free Software
  105382. + * Foundation, either version 2 of that License or (at your option) any
  105383. + * later version.
  105384. + *
  105385. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  105386. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  105387. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  105388. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  105389. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  105390. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  105391. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  105392. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  105393. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  105394. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  105395. + */
  105396. +
  105397. +#ifndef LNXWRP_SYSFS_H_
  105398. +#define LNXWRP_SYSFS_H_
  105399. +
  105400. +/* Linux Headers ------------------- */
  105401. +#include <linux/version.h>
  105402. +
  105403. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  105404. +#define MODVERSIONS
  105405. +#endif
  105406. +#ifdef MODVERSIONS
  105407. +#include <config/modversions.h>
  105408. +#endif /* MODVERSIONS */
  105409. +
  105410. +#include <linux/kernel.h>
  105411. +#include <linux/module.h>
  105412. +#include <linux/device.h>
  105413. +#include <linux/sysfs.h>
  105414. +
  105415. +struct sysfs_stats_t {
  105416. + const char *stat_name;
  105417. + uint8_t stat_counter;
  105418. +};
  105419. +
  105420. +uint8_t fm_find_statistic_counter_by_name(const char *attr_name,
  105421. + const struct sysfs_stats_t *sysfs_stats,
  105422. + uint8_t *offset);
  105423. +
  105424. +#endif /* LNXWRP_SYSFS_H_ */
  105425. --- /dev/null
  105426. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c
  105427. @@ -0,0 +1,1855 @@
  105428. +/*
  105429. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  105430. + *
  105431. + * Redistribution and use in source and binary forms, with or without
  105432. + * modification, are permitted provided that the following conditions are met:
  105433. + * * Redistributions of source code must retain the above copyright
  105434. + * notice, this list of conditions and the following disclaimer.
  105435. + * * Redistributions in binary form must reproduce the above copyright
  105436. + * notice, this list of conditions and the following disclaimer in the
  105437. + * documentation and/or other materials provided with the distribution.
  105438. + * * Neither the name of Freescale Semiconductor nor the
  105439. + * names of its contributors may be used to endorse or promote products
  105440. + * derived from this software without specific prior written permission.
  105441. + *
  105442. + *
  105443. + * ALTERNATIVELY, this software may be distributed under the terms of the
  105444. + * GNU General Public License ("GPL") as published by the Free Software
  105445. + * Foundation, either version 2 of that License or (at your option) any
  105446. + * later version.
  105447. + *
  105448. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  105449. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  105450. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  105451. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  105452. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  105453. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  105454. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  105455. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  105456. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  105457. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  105458. + */
  105459. +
  105460. +#include "lnxwrp_sysfs.h"
  105461. +#include "lnxwrp_sysfs_fm.h"
  105462. +#include "lnxwrp_fm.h"
  105463. +
  105464. +#include "../../sdk_fman/Peripherals/FM/inc/fm_common.h"
  105465. +#include "../../sdk_fman/Peripherals/FM/Pcd/fm_pcd.h"
  105466. +#include "../../sdk_fman/Peripherals/FM/Pcd/fm_kg.h"
  105467. +#include "../../sdk_fman/Peripherals/FM/Pcd/fm_plcr.h"
  105468. +
  105469. +#if defined(__ERR_MODULE__)
  105470. +#undef __ERR_MODULE__
  105471. +#endif
  105472. +
  105473. +#include "../../sdk_fman/Peripherals/FM/fm.h"
  105474. +#include <linux/delay.h>
  105475. +
  105476. +
  105477. +static int fm_get_counter(void *h_fm, e_FmCounters cnt_e, uint32_t *cnt_val);
  105478. +
  105479. +enum fm_dma_match_stats {
  105480. + FM_DMA_COUNTERS_CMQ_NOT_EMPTY,
  105481. + FM_DMA_COUNTERS_BUS_ERROR,
  105482. + FM_DMA_COUNTERS_READ_BUF_ECC_ERROR,
  105483. + FM_DMA_COUNTERS_WRITE_BUF_ECC_SYS_ERROR,
  105484. + FM_DMA_COUNTERS_WRITE_BUF_ECC_FM_ERROR
  105485. +};
  105486. +
  105487. +static const struct sysfs_stats_t fm_sysfs_stats[] = {
  105488. + /* FM statistics */
  105489. + {
  105490. + .stat_name = "enq_total_frame",
  105491. + .stat_counter = e_FM_COUNTERS_ENQ_TOTAL_FRAME,
  105492. + },
  105493. + {
  105494. + .stat_name = "deq_total_frame",
  105495. + .stat_counter = e_FM_COUNTERS_DEQ_TOTAL_FRAME,
  105496. + },
  105497. + {
  105498. + .stat_name = "deq_0",
  105499. + .stat_counter = e_FM_COUNTERS_DEQ_0,
  105500. + },
  105501. + {
  105502. + .stat_name = "deq_1",
  105503. + .stat_counter = e_FM_COUNTERS_DEQ_1,
  105504. + },
  105505. + {
  105506. + .stat_name = "deq_2",
  105507. + .stat_counter = e_FM_COUNTERS_DEQ_2,
  105508. + },
  105509. + {
  105510. + .stat_name = "deq_3",
  105511. + .stat_counter = e_FM_COUNTERS_DEQ_3,
  105512. + },
  105513. + {
  105514. + .stat_name = "deq_from_default",
  105515. + .stat_counter = e_FM_COUNTERS_DEQ_FROM_DEFAULT,
  105516. + },
  105517. + {
  105518. + .stat_name = "deq_from_context",
  105519. + .stat_counter = e_FM_COUNTERS_DEQ_FROM_CONTEXT,
  105520. + },
  105521. + {
  105522. + .stat_name = "deq_from_fd",
  105523. + .stat_counter = e_FM_COUNTERS_DEQ_FROM_FD,
  105524. + },
  105525. + {
  105526. + .stat_name = "deq_confirm",
  105527. + .stat_counter = e_FM_COUNTERS_DEQ_CONFIRM,
  105528. + },
  105529. + /* FM:DMA statistics */
  105530. + {
  105531. + .stat_name = "cmq_not_empty",
  105532. + .stat_counter = FM_DMA_COUNTERS_CMQ_NOT_EMPTY,
  105533. + },
  105534. + {
  105535. + .stat_name = "bus_error",
  105536. + .stat_counter = FM_DMA_COUNTERS_BUS_ERROR,
  105537. + },
  105538. + {
  105539. + .stat_name = "read_buf_ecc_error",
  105540. + .stat_counter = FM_DMA_COUNTERS_READ_BUF_ECC_ERROR,
  105541. + },
  105542. + {
  105543. + .stat_name = "write_buf_ecc_sys_error",
  105544. + .stat_counter = FM_DMA_COUNTERS_WRITE_BUF_ECC_SYS_ERROR,
  105545. + },
  105546. + {
  105547. + .stat_name = "write_buf_ecc_fm_error",
  105548. + .stat_counter = FM_DMA_COUNTERS_WRITE_BUF_ECC_FM_ERROR,
  105549. + },
  105550. + /* FM:PCD statistics */
  105551. + {
  105552. + .stat_name = "pcd_kg_total",
  105553. + .stat_counter = e_FM_PCD_KG_COUNTERS_TOTAL,
  105554. + },
  105555. + {
  105556. + .stat_name = "pcd_plcr_yellow",
  105557. + .stat_counter = e_FM_PCD_PLCR_COUNTERS_YELLOW,
  105558. + },
  105559. + {
  105560. + .stat_name = "pcd_plcr_red",
  105561. + .stat_counter = e_FM_PCD_PLCR_COUNTERS_RED,
  105562. + },
  105563. + {
  105564. + .stat_name = "pcd_plcr_recolored_to_red",
  105565. + .stat_counter = e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED,
  105566. + },
  105567. + {
  105568. + .stat_name = "pcd_plcr_recolored_to_yellow",
  105569. + .stat_counter = e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW,
  105570. + },
  105571. + {
  105572. + .stat_name = "pcd_plcr_total",
  105573. + .stat_counter = e_FM_PCD_PLCR_COUNTERS_TOTAL,
  105574. + },
  105575. + {
  105576. + .stat_name = "pcd_plcr_length_mismatch",
  105577. + .stat_counter = e_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH,
  105578. + },
  105579. + {
  105580. + .stat_name = "pcd_prs_parse_dispatch",
  105581. + .stat_counter = e_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH,
  105582. + },
  105583. + {
  105584. + .stat_name = "pcd_prs_l2_parse_result_returned",
  105585. + .stat_counter = e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED,
  105586. + },
  105587. + {
  105588. + .stat_name = "pcd_prs_l3_parse_result_returned",
  105589. + .stat_counter = e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED,
  105590. + },
  105591. + {
  105592. + .stat_name = "pcd_prs_l4_parse_result_returned",
  105593. + .stat_counter = e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED,
  105594. + },
  105595. + {
  105596. + .stat_name = "pcd_prs_shim_parse_result_returned",
  105597. + .stat_counter = e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED,
  105598. + },
  105599. + {
  105600. + .stat_name = "pcd_prs_l2_parse_result_returned_with_err",
  105601. + .stat_counter =
  105602. + e_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR,
  105603. + },
  105604. + {
  105605. + .stat_name = "pcd_prs_l3_parse_result_returned_with_err",
  105606. + .stat_counter =
  105607. + e_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR,
  105608. + },
  105609. + {
  105610. + .stat_name = "pcd_prs_l4_parse_result_returned_with_err",
  105611. + .stat_counter =
  105612. + e_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR,
  105613. + },
  105614. + {
  105615. + .stat_name = "pcd_prs_shim_parse_result_returned_with_err",
  105616. + .stat_counter =
  105617. + e_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR,
  105618. + },
  105619. + {
  105620. + .stat_name = "pcd_prs_soft_prs_cycles",
  105621. + .stat_counter = e_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES,
  105622. + },
  105623. + {
  105624. + .stat_name = "pcd_prs_soft_prs_stall_cycles",
  105625. + .stat_counter = e_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES,
  105626. + },
  105627. + {
  105628. + .stat_name = "pcd_prs_hard_prs_cycle_incl_stall_cycles",
  105629. + .stat_counter =
  105630. + e_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES,
  105631. + },
  105632. + {
  105633. + .stat_name = "pcd_prs_muram_read_cycles",
  105634. + .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES,
  105635. + },
  105636. + {
  105637. + .stat_name = "pcd_prs_muram_read_stall_cycles",
  105638. + .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES,
  105639. + },
  105640. + {
  105641. + .stat_name = "pcd_prs_muram_write_cycles",
  105642. + .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES,
  105643. + },
  105644. + {
  105645. + .stat_name = "pcd_prs_muram_write_stall_cycles",
  105646. + .stat_counter = e_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES,
  105647. + },
  105648. + {
  105649. + .stat_name = "pcd_prs_fpm_command_stall_cycles",
  105650. + .stat_counter = e_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES,
  105651. + },
  105652. + {}
  105653. +};
  105654. +
  105655. +
  105656. +static ssize_t show_fm_risc_load(struct device *dev,
  105657. + struct device_attribute *attr, char *buf)
  105658. +{
  105659. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105660. + unsigned long flags;
  105661. + int m =0;
  105662. + int err =0;
  105663. + unsigned n = 0;
  105664. + t_FmCtrlMon util;
  105665. + uint8_t i =0 ;
  105666. +
  105667. + if (attr == NULL || buf == NULL || dev == NULL)
  105668. + return -EINVAL;
  105669. +
  105670. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105671. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105672. + return -EINVAL;
  105673. +
  105674. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
  105675. + return -EIO;
  105676. +
  105677. + local_irq_save(flags);
  105678. +
  105679. + /* Calculate risc load */
  105680. + FM_CtrlMonStart(p_wrp_fm_dev->h_Dev);
  105681. + msleep(1000);
  105682. + FM_CtrlMonStop(p_wrp_fm_dev->h_Dev);
  105683. +
  105684. + for (i = 0; i < FM_NUM_OF_CTRL; i++) {
  105685. + err |= FM_CtrlMonGetCounters(p_wrp_fm_dev->h_Dev, i, &util);
  105686. + m = snprintf(&buf[n],PAGE_SIZE,"\tRisc%u: util-%u%%, efficiency-%u%%\n",
  105687. + i, util.percentCnt[0], util.percentCnt[1]);
  105688. + n=m+n;
  105689. + }
  105690. +
  105691. + local_irq_restore(flags);
  105692. +
  105693. + return n;
  105694. +}
  105695. +
  105696. +/* Fm stats and regs dumps via sysfs */
  105697. +static ssize_t show_fm_dma_stats(struct device *dev,
  105698. + struct device_attribute *attr, char *buf)
  105699. +{
  105700. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105701. + t_FmDmaStatus dma_status;
  105702. + unsigned long flags = 0;
  105703. + unsigned n = 0;
  105704. + uint8_t counter_value = 0, counter = 0;
  105705. +
  105706. + if (attr == NULL || buf == NULL || dev == NULL)
  105707. + return -EINVAL;
  105708. +
  105709. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105710. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105711. + return -EINVAL;
  105712. +
  105713. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
  105714. + return -EIO;
  105715. +
  105716. + counter = fm_find_statistic_counter_by_name(
  105717. + attr->attr.name,
  105718. + fm_sysfs_stats, NULL);
  105719. +
  105720. + local_irq_save(flags);
  105721. +
  105722. + memset(&dma_status, 0, sizeof(dma_status));
  105723. + FM_GetDmaStatus(p_wrp_fm_dev->h_Dev, &dma_status);
  105724. +
  105725. + switch (counter) {
  105726. + case FM_DMA_COUNTERS_CMQ_NOT_EMPTY:
  105727. + counter_value = dma_status.cmqNotEmpty;
  105728. + break;
  105729. + case FM_DMA_COUNTERS_BUS_ERROR:
  105730. + counter_value = dma_status.busError;
  105731. + break;
  105732. + case FM_DMA_COUNTERS_READ_BUF_ECC_ERROR:
  105733. + counter_value = dma_status.readBufEccError;
  105734. + break;
  105735. + case FM_DMA_COUNTERS_WRITE_BUF_ECC_SYS_ERROR:
  105736. + counter_value = dma_status.writeBufEccSysError;
  105737. + break;
  105738. + case FM_DMA_COUNTERS_WRITE_BUF_ECC_FM_ERROR:
  105739. + counter_value = dma_status.writeBufEccFmError;
  105740. + break;
  105741. + default:
  105742. + WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
  105743. + __func__);
  105744. + break;
  105745. + };
  105746. +
  105747. + n = snprintf(buf, PAGE_SIZE, "\tFM %u counter: %c\n",
  105748. + p_wrp_fm_dev->id, counter_value ? 'T' : 'F');
  105749. +
  105750. + local_irq_restore(flags);
  105751. +
  105752. + return n;
  105753. +}
  105754. +
  105755. +static ssize_t show_fm_stats(struct device *dev,
  105756. + struct device_attribute *attr, char *buf)
  105757. +{
  105758. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105759. + unsigned long flags = 0;
  105760. + unsigned n = 0, cnt_e = 0;
  105761. + uint32_t cnt_val;
  105762. + int err;
  105763. +
  105764. + if (attr == NULL || buf == NULL || dev == NULL)
  105765. + return -EINVAL;
  105766. +
  105767. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105768. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105769. + return -EINVAL;
  105770. +
  105771. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
  105772. + return -EIO;
  105773. +
  105774. + cnt_e = fm_find_statistic_counter_by_name(
  105775. + attr->attr.name,
  105776. + fm_sysfs_stats, NULL);
  105777. +
  105778. + err = fm_get_counter(p_wrp_fm_dev->h_Dev,
  105779. + (e_FmCounters) cnt_e, &cnt_val);
  105780. +
  105781. + if (err)
  105782. + return err;
  105783. +
  105784. + local_irq_save(flags);
  105785. +
  105786. + n = snprintf(buf, PAGE_SIZE, "\tFM %d counter: %d\n",
  105787. + p_wrp_fm_dev->id, cnt_val);
  105788. +
  105789. + local_irq_restore(flags);
  105790. +
  105791. + return n;
  105792. +}
  105793. +
  105794. +static ssize_t show_fm_muram_free_sz(struct device *dev,
  105795. + struct device_attribute *attr, char *buf)
  105796. +{
  105797. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105798. + unsigned long flags = 0;
  105799. + unsigned n = 0;
  105800. + uint64_t muram_free_size = 0;
  105801. +
  105802. + if (attr == NULL || buf == NULL || dev == NULL)
  105803. + return -EINVAL;
  105804. +
  105805. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105806. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105807. + return -EINVAL;
  105808. +
  105809. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
  105810. + return -EIO;
  105811. +
  105812. + muram_free_size = FM_MURAM_GetFreeMemSize(p_wrp_fm_dev->h_MuramDev);
  105813. +
  105814. + local_irq_save(flags);
  105815. +
  105816. + n = snprintf(buf, PAGE_SIZE, "\tFM %d muram_free_size: %lld\n",
  105817. + p_wrp_fm_dev->id, muram_free_size);
  105818. +
  105819. + local_irq_restore(flags);
  105820. +
  105821. + return n;
  105822. +}
  105823. +
  105824. +static ssize_t show_fm_ctrl_code_ver(struct device *dev,
  105825. + struct device_attribute *attr, char *buf)
  105826. +{
  105827. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105828. + unsigned long flags = 0;
  105829. + unsigned n = 0;
  105830. + t_FmCtrlCodeRevisionInfo rv_info;
  105831. +
  105832. + if (attr == NULL || buf == NULL || dev == NULL)
  105833. + return -EINVAL;
  105834. +
  105835. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105836. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105837. + return -EINVAL;
  105838. +
  105839. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
  105840. + return -EIO;
  105841. +
  105842. + FM_GetFmanCtrlCodeRevision((t_Fm *)p_wrp_fm_dev->h_Dev, &rv_info);
  105843. +
  105844. + local_irq_save(flags);
  105845. +
  105846. + FM_DMP_LN(buf, n, "- FM %d ctrl code pkg info:\n", p_wrp_fm_dev->id);
  105847. + FM_DMP_LN(buf, n, "Package rev: %d\n", rv_info.packageRev);
  105848. + FM_DMP_LN(buf, n, "major rev: %d\n", rv_info.majorRev);
  105849. + FM_DMP_LN(buf, n, "minor rev: %d\n", rv_info.minorRev);
  105850. +
  105851. + local_irq_restore(flags);
  105852. +
  105853. + return n;
  105854. +}
  105855. +
  105856. +static ssize_t show_fm_pcd_stats(struct device *dev,
  105857. + struct device_attribute *attr, char *buf)
  105858. +{
  105859. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105860. + unsigned long flags = 0;
  105861. + unsigned n = 0, counter = 0;
  105862. +
  105863. + if (attr == NULL || buf == NULL || dev == NULL)
  105864. + return -EINVAL;
  105865. +
  105866. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105867. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105868. + return -EINVAL;
  105869. +
  105870. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev ||
  105871. + !p_wrp_fm_dev->h_PcdDev)
  105872. + return -EIO;
  105873. +
  105874. + counter = fm_find_statistic_counter_by_name(
  105875. + attr->attr.name,
  105876. + fm_sysfs_stats, NULL);
  105877. +
  105878. + local_irq_save(flags);
  105879. +
  105880. + n = snprintf(buf, PAGE_SIZE, "\tFM %d counter: %d\n",
  105881. + p_wrp_fm_dev->id,
  105882. + FM_PCD_GetCounter(p_wrp_fm_dev->h_PcdDev,
  105883. + (e_FmPcdCounters) counter));
  105884. +
  105885. + local_irq_restore(flags);
  105886. +
  105887. + return n;
  105888. +}
  105889. +
  105890. +static ssize_t show_fm_tnum_dbg(struct device *dev,
  105891. + struct device_attribute *attr,
  105892. + char *buf)
  105893. +{
  105894. + unsigned long flags;
  105895. + unsigned n = 0;
  105896. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  105897. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105898. +#endif
  105899. +
  105900. + if (attr == NULL || buf == NULL || dev == NULL)
  105901. + return -EINVAL;
  105902. +
  105903. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  105904. +
  105905. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105906. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105907. + return -EINVAL;
  105908. +
  105909. + local_irq_save(flags);
  105910. +
  105911. + if (!p_wrp_fm_dev->active)
  105912. + return -EIO;
  105913. + else {
  105914. + int tn_s;
  105915. +
  105916. + if (!sscanf(attr->attr.name, "tnum_dbg_%d", &tn_s))
  105917. + return -EINVAL;
  105918. +
  105919. + n = fm_dump_tnum_dbg(p_wrp_fm_dev->h_Dev,
  105920. + tn_s, tn_s + 15, buf, n);
  105921. + }
  105922. + local_irq_restore(flags);
  105923. +#else
  105924. +
  105925. + local_irq_save(flags);
  105926. + n = snprintf(buf, PAGE_SIZE,
  105927. + "Debug level is too low to dump registers!!!\n");
  105928. + local_irq_restore(flags);
  105929. +#endif /* (defined(DEBUG_ERRORS) && ... */
  105930. +
  105931. + return n;
  105932. +}
  105933. +
  105934. +static ssize_t show_fm_cls_plan(struct device *dev,
  105935. + struct device_attribute *attr,
  105936. + char *buf)
  105937. +{
  105938. + unsigned long flags;
  105939. + unsigned n = 0;
  105940. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  105941. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105942. +#endif
  105943. +
  105944. + if (attr == NULL || buf == NULL || dev == NULL)
  105945. + return -EINVAL;
  105946. +
  105947. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  105948. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105949. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105950. + return -EINVAL;
  105951. +
  105952. + local_irq_save(flags);
  105953. +
  105954. + n = snprintf(buf, PAGE_SIZE, "\n FM-KG classification plan dump.\n");
  105955. +
  105956. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
  105957. + return -EIO;
  105958. + else {
  105959. + int cpn;
  105960. +
  105961. + if (!sscanf(attr->attr.name, "cls_plan_%d", &cpn))
  105962. + return -EINVAL;
  105963. +
  105964. + n = fm_dump_cls_plan(p_wrp_fm_dev->h_PcdDev, cpn, buf, n);
  105965. + }
  105966. + local_irq_restore(flags);
  105967. +#else
  105968. + local_irq_save(flags);
  105969. + n = snprintf(buf, PAGE_SIZE,
  105970. + "Debug level is too low to dump registers!!!\n");
  105971. + local_irq_restore(flags);
  105972. +#endif /* (defined(DEBUG_ERRORS) && ... */
  105973. +
  105974. + return n;
  105975. +}
  105976. +
  105977. +static ssize_t show_fm_profiles(struct device *dev,
  105978. + struct device_attribute *attr,
  105979. + char *buf)
  105980. +{
  105981. + unsigned long flags;
  105982. + unsigned n = 0;
  105983. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  105984. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  105985. +#endif
  105986. +
  105987. + if (attr == NULL || buf == NULL || dev == NULL)
  105988. + return -EINVAL;
  105989. +
  105990. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  105991. +
  105992. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  105993. + if (WARN_ON(p_wrp_fm_dev == NULL))
  105994. + return -EINVAL;
  105995. +
  105996. + local_irq_save(flags);
  105997. +
  105998. + n = snprintf(buf, PAGE_SIZE, "FM policer profile dump.\n");
  105999. +
  106000. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
  106001. + return -EIO;
  106002. + else {
  106003. + int pn;
  106004. +
  106005. + if (!sscanf(attr->attr.name, "profile_%d", &pn))
  106006. + return -EINVAL;
  106007. +
  106008. + n = fm_profile_dump_regs(p_wrp_fm_dev->h_PcdDev, pn, buf, n);
  106009. + }
  106010. + local_irq_restore(flags);
  106011. +#else
  106012. + local_irq_save(flags);
  106013. + n = snprintf(buf, PAGE_SIZE,
  106014. + "Debug level is too low to dump registers!!!\n");
  106015. + local_irq_restore(flags);
  106016. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106017. +
  106018. + return n;
  106019. +}
  106020. +
  106021. +static ssize_t show_fm_schemes(struct device *dev,
  106022. + struct device_attribute *attr,
  106023. + char *buf)
  106024. +{
  106025. + unsigned long flags;
  106026. + unsigned n = 0;
  106027. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106028. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106029. +#endif
  106030. +
  106031. + if (attr == NULL || buf == NULL || dev == NULL)
  106032. + return -EINVAL;
  106033. +
  106034. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106035. +
  106036. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106037. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106038. + return -EINVAL;
  106039. +
  106040. + local_irq_save(flags);
  106041. +
  106042. + n = snprintf(buf, PAGE_SIZE, "FM-KG driver schemes dump.\n");
  106043. +
  106044. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
  106045. + return -EIO;
  106046. + else {
  106047. + int sn;
  106048. +
  106049. + if (!sscanf(attr->attr.name, "scheme_%d", &sn))
  106050. + return -EINVAL;
  106051. +
  106052. + n = fm_dump_scheme(p_wrp_fm_dev->h_PcdDev, sn, buf, n);
  106053. + }
  106054. + local_irq_restore(flags);
  106055. +#else
  106056. +
  106057. + local_irq_save(flags);
  106058. + n = snprintf(buf, PAGE_SIZE,
  106059. + "Debug level is too low to dump registers!!!\n");
  106060. + local_irq_restore(flags);
  106061. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106062. +
  106063. + return n;
  106064. +}
  106065. +
  106066. +/* FM */
  106067. +static DEVICE_ATTR(enq_total_frame, S_IRUGO, show_fm_stats, NULL);
  106068. +static DEVICE_ATTR(deq_total_frame, S_IRUGO, show_fm_stats, NULL);
  106069. +static DEVICE_ATTR(fm_risc_load_val, S_IRUGO, show_fm_risc_load, NULL);
  106070. +static DEVICE_ATTR(deq_0, S_IRUGO, show_fm_stats, NULL);
  106071. +static DEVICE_ATTR(deq_1, S_IRUGO, show_fm_stats, NULL);
  106072. +static DEVICE_ATTR(deq_2, S_IRUGO, show_fm_stats, NULL);
  106073. +static DEVICE_ATTR(deq_3, S_IRUGO, show_fm_stats, NULL);
  106074. +static DEVICE_ATTR(deq_from_default, S_IRUGO, show_fm_stats, NULL);
  106075. +static DEVICE_ATTR(deq_from_context, S_IRUGO, show_fm_stats, NULL);
  106076. +static DEVICE_ATTR(deq_from_fd, S_IRUGO, show_fm_stats, NULL);
  106077. +static DEVICE_ATTR(deq_confirm, S_IRUGO, show_fm_stats, NULL);
  106078. +/* FM:DMA */
  106079. +static DEVICE_ATTR(cmq_not_empty, S_IRUGO, show_fm_dma_stats, NULL);
  106080. +static DEVICE_ATTR(bus_error, S_IRUGO, show_fm_dma_stats, NULL);
  106081. +static DEVICE_ATTR(read_buf_ecc_error, S_IRUGO, show_fm_dma_stats, NULL);
  106082. +static DEVICE_ATTR(write_buf_ecc_sys_error, S_IRUGO, show_fm_dma_stats, NULL);
  106083. +static DEVICE_ATTR(write_buf_ecc_fm_error, S_IRUGO, show_fm_dma_stats, NULL);
  106084. +/* FM:PCD */
  106085. +static DEVICE_ATTR(pcd_kg_total, S_IRUGO, show_fm_pcd_stats, NULL);
  106086. +static DEVICE_ATTR(pcd_plcr_yellow, S_IRUGO, show_fm_pcd_stats, NULL);
  106087. +static DEVICE_ATTR(pcd_plcr_red, S_IRUGO, show_fm_pcd_stats, NULL);
  106088. +static DEVICE_ATTR(pcd_plcr_recolored_to_red, S_IRUGO, show_fm_pcd_stats,
  106089. + NULL);
  106090. +static DEVICE_ATTR(pcd_plcr_recolored_to_yellow, S_IRUGO, show_fm_pcd_stats,
  106091. + NULL);
  106092. +static DEVICE_ATTR(pcd_plcr_total, S_IRUGO, show_fm_pcd_stats, NULL);
  106093. +static DEVICE_ATTR(pcd_plcr_length_mismatch, S_IRUGO, show_fm_pcd_stats,
  106094. + NULL);
  106095. +static DEVICE_ATTR(pcd_prs_parse_dispatch, S_IRUGO, show_fm_pcd_stats, NULL);
  106096. +static DEVICE_ATTR(pcd_prs_l2_parse_result_returned, S_IRUGO,
  106097. + show_fm_pcd_stats, NULL);
  106098. +static DEVICE_ATTR(pcd_prs_l3_parse_result_returned, S_IRUGO,
  106099. + show_fm_pcd_stats, NULL);
  106100. +static DEVICE_ATTR(pcd_prs_l4_parse_result_returned, S_IRUGO,
  106101. + show_fm_pcd_stats, NULL);
  106102. +static DEVICE_ATTR(pcd_prs_shim_parse_result_returned, S_IRUGO,
  106103. + show_fm_pcd_stats, NULL);
  106104. +static DEVICE_ATTR(pcd_prs_l2_parse_result_returned_with_err, S_IRUGO,
  106105. + show_fm_pcd_stats, NULL);
  106106. +static DEVICE_ATTR(pcd_prs_l3_parse_result_returned_with_err, S_IRUGO,
  106107. + show_fm_pcd_stats, NULL);
  106108. +static DEVICE_ATTR(pcd_prs_l4_parse_result_returned_with_err, S_IRUGO,
  106109. + show_fm_pcd_stats, NULL);
  106110. +static DEVICE_ATTR(pcd_prs_shim_parse_result_returned_with_err, S_IRUGO,
  106111. + show_fm_pcd_stats, NULL);
  106112. +static DEVICE_ATTR(pcd_prs_soft_prs_cycles, S_IRUGO, show_fm_pcd_stats, NULL);
  106113. +static DEVICE_ATTR(pcd_prs_soft_prs_stall_cycles, S_IRUGO, show_fm_pcd_stats,
  106114. + NULL);
  106115. +static DEVICE_ATTR(pcd_prs_hard_prs_cycle_incl_stall_cycles, S_IRUGO,
  106116. + show_fm_pcd_stats, NULL);
  106117. +static DEVICE_ATTR(pcd_prs_muram_read_cycles, S_IRUGO, show_fm_pcd_stats,
  106118. + NULL);
  106119. +static DEVICE_ATTR(pcd_prs_muram_read_stall_cycles, S_IRUGO,
  106120. + show_fm_pcd_stats, NULL);
  106121. +static DEVICE_ATTR(pcd_prs_muram_write_cycles, S_IRUGO, show_fm_pcd_stats,
  106122. + NULL);
  106123. +static DEVICE_ATTR(pcd_prs_muram_write_stall_cycles, S_IRUGO,
  106124. + show_fm_pcd_stats, NULL);
  106125. +static DEVICE_ATTR(pcd_prs_fpm_command_stall_cycles, S_IRUGO,
  106126. + show_fm_pcd_stats, NULL);
  106127. +
  106128. +static DEVICE_ATTR(tnum_dbg_0, S_IRUGO, show_fm_tnum_dbg, NULL);
  106129. +static DEVICE_ATTR(tnum_dbg_16, S_IRUGO, show_fm_tnum_dbg, NULL);
  106130. +static DEVICE_ATTR(tnum_dbg_32, S_IRUGO, show_fm_tnum_dbg, NULL);
  106131. +static DEVICE_ATTR(tnum_dbg_48, S_IRUGO, show_fm_tnum_dbg, NULL);
  106132. +static DEVICE_ATTR(tnum_dbg_64, S_IRUGO, show_fm_tnum_dbg, NULL);
  106133. +static DEVICE_ATTR(tnum_dbg_80, S_IRUGO, show_fm_tnum_dbg, NULL);
  106134. +static DEVICE_ATTR(tnum_dbg_96, S_IRUGO, show_fm_tnum_dbg, NULL);
  106135. +static DEVICE_ATTR(tnum_dbg_112, S_IRUGO, show_fm_tnum_dbg, NULL);
  106136. +
  106137. +static DEVICE_ATTR(cls_plan_0, S_IRUGO, show_fm_cls_plan, NULL);
  106138. +static DEVICE_ATTR(cls_plan_1, S_IRUGO, show_fm_cls_plan, NULL);
  106139. +static DEVICE_ATTR(cls_plan_2, S_IRUGO, show_fm_cls_plan, NULL);
  106140. +static DEVICE_ATTR(cls_plan_3, S_IRUGO, show_fm_cls_plan, NULL);
  106141. +static DEVICE_ATTR(cls_plan_4, S_IRUGO, show_fm_cls_plan, NULL);
  106142. +static DEVICE_ATTR(cls_plan_5, S_IRUGO, show_fm_cls_plan, NULL);
  106143. +static DEVICE_ATTR(cls_plan_6, S_IRUGO, show_fm_cls_plan, NULL);
  106144. +static DEVICE_ATTR(cls_plan_7, S_IRUGO, show_fm_cls_plan, NULL);
  106145. +static DEVICE_ATTR(cls_plan_8, S_IRUGO, show_fm_cls_plan, NULL);
  106146. +static DEVICE_ATTR(cls_plan_9, S_IRUGO, show_fm_cls_plan, NULL);
  106147. +static DEVICE_ATTR(cls_plan_10, S_IRUGO, show_fm_cls_plan, NULL);
  106148. +static DEVICE_ATTR(cls_plan_11, S_IRUGO, show_fm_cls_plan, NULL);
  106149. +static DEVICE_ATTR(cls_plan_12, S_IRUGO, show_fm_cls_plan, NULL);
  106150. +static DEVICE_ATTR(cls_plan_13, S_IRUGO, show_fm_cls_plan, NULL);
  106151. +static DEVICE_ATTR(cls_plan_14, S_IRUGO, show_fm_cls_plan, NULL);
  106152. +static DEVICE_ATTR(cls_plan_15, S_IRUGO, show_fm_cls_plan, NULL);
  106153. +static DEVICE_ATTR(cls_plan_16, S_IRUGO, show_fm_cls_plan, NULL);
  106154. +static DEVICE_ATTR(cls_plan_17, S_IRUGO, show_fm_cls_plan, NULL);
  106155. +static DEVICE_ATTR(cls_plan_18, S_IRUGO, show_fm_cls_plan, NULL);
  106156. +static DEVICE_ATTR(cls_plan_19, S_IRUGO, show_fm_cls_plan, NULL);
  106157. +static DEVICE_ATTR(cls_plan_20, S_IRUGO, show_fm_cls_plan, NULL);
  106158. +static DEVICE_ATTR(cls_plan_21, S_IRUGO, show_fm_cls_plan, NULL);
  106159. +static DEVICE_ATTR(cls_plan_22, S_IRUGO, show_fm_cls_plan, NULL);
  106160. +static DEVICE_ATTR(cls_plan_23, S_IRUGO, show_fm_cls_plan, NULL);
  106161. +static DEVICE_ATTR(cls_plan_24, S_IRUGO, show_fm_cls_plan, NULL);
  106162. +static DEVICE_ATTR(cls_plan_25, S_IRUGO, show_fm_cls_plan, NULL);
  106163. +static DEVICE_ATTR(cls_plan_26, S_IRUGO, show_fm_cls_plan, NULL);
  106164. +static DEVICE_ATTR(cls_plan_27, S_IRUGO, show_fm_cls_plan, NULL);
  106165. +static DEVICE_ATTR(cls_plan_28, S_IRUGO, show_fm_cls_plan, NULL);
  106166. +static DEVICE_ATTR(cls_plan_29, S_IRUGO, show_fm_cls_plan, NULL);
  106167. +static DEVICE_ATTR(cls_plan_30, S_IRUGO, show_fm_cls_plan, NULL);
  106168. +static DEVICE_ATTR(cls_plan_31, S_IRUGO, show_fm_cls_plan, NULL);
  106169. +
  106170. +static DEVICE_ATTR(profile_0, S_IRUGO, show_fm_profiles, NULL);
  106171. +static DEVICE_ATTR(profile_1, S_IRUGO, show_fm_profiles, NULL);
  106172. +static DEVICE_ATTR(profile_2, S_IRUGO, show_fm_profiles, NULL);
  106173. +static DEVICE_ATTR(profile_3, S_IRUGO, show_fm_profiles, NULL);
  106174. +static DEVICE_ATTR(profile_4, S_IRUGO, show_fm_profiles, NULL);
  106175. +static DEVICE_ATTR(profile_5, S_IRUGO, show_fm_profiles, NULL);
  106176. +static DEVICE_ATTR(profile_6, S_IRUGO, show_fm_profiles, NULL);
  106177. +static DEVICE_ATTR(profile_7, S_IRUGO, show_fm_profiles, NULL);
  106178. +static DEVICE_ATTR(profile_8, S_IRUGO, show_fm_profiles, NULL);
  106179. +static DEVICE_ATTR(profile_9, S_IRUGO, show_fm_profiles, NULL);
  106180. +static DEVICE_ATTR(profile_10, S_IRUGO, show_fm_profiles, NULL);
  106181. +static DEVICE_ATTR(profile_11, S_IRUGO, show_fm_profiles, NULL);
  106182. +static DEVICE_ATTR(profile_12, S_IRUGO, show_fm_profiles, NULL);
  106183. +static DEVICE_ATTR(profile_13, S_IRUGO, show_fm_profiles, NULL);
  106184. +static DEVICE_ATTR(profile_14, S_IRUGO, show_fm_profiles, NULL);
  106185. +static DEVICE_ATTR(profile_15, S_IRUGO, show_fm_profiles, NULL);
  106186. +static DEVICE_ATTR(profile_16, S_IRUGO, show_fm_profiles, NULL);
  106187. +static DEVICE_ATTR(profile_17, S_IRUGO, show_fm_profiles, NULL);
  106188. +static DEVICE_ATTR(profile_18, S_IRUGO, show_fm_profiles, NULL);
  106189. +static DEVICE_ATTR(profile_19, S_IRUGO, show_fm_profiles, NULL);
  106190. +static DEVICE_ATTR(profile_20, S_IRUGO, show_fm_profiles, NULL);
  106191. +static DEVICE_ATTR(profile_21, S_IRUGO, show_fm_profiles, NULL);
  106192. +static DEVICE_ATTR(profile_22, S_IRUGO, show_fm_profiles, NULL);
  106193. +static DEVICE_ATTR(profile_23, S_IRUGO, show_fm_profiles, NULL);
  106194. +static DEVICE_ATTR(profile_24, S_IRUGO, show_fm_profiles, NULL);
  106195. +static DEVICE_ATTR(profile_25, S_IRUGO, show_fm_profiles, NULL);
  106196. +static DEVICE_ATTR(profile_26, S_IRUGO, show_fm_profiles, NULL);
  106197. +static DEVICE_ATTR(profile_27, S_IRUGO, show_fm_profiles, NULL);
  106198. +static DEVICE_ATTR(profile_28, S_IRUGO, show_fm_profiles, NULL);
  106199. +static DEVICE_ATTR(profile_29, S_IRUGO, show_fm_profiles, NULL);
  106200. +static DEVICE_ATTR(profile_30, S_IRUGO, show_fm_profiles, NULL);
  106201. +static DEVICE_ATTR(profile_31, S_IRUGO, show_fm_profiles, NULL);
  106202. +
  106203. +static DEVICE_ATTR(scheme_0, S_IRUGO, show_fm_schemes, NULL);
  106204. +static DEVICE_ATTR(scheme_1, S_IRUGO, show_fm_schemes, NULL);
  106205. +static DEVICE_ATTR(scheme_2, S_IRUGO, show_fm_schemes, NULL);
  106206. +static DEVICE_ATTR(scheme_3, S_IRUGO, show_fm_schemes, NULL);
  106207. +static DEVICE_ATTR(scheme_4, S_IRUGO, show_fm_schemes, NULL);
  106208. +static DEVICE_ATTR(scheme_5, S_IRUGO, show_fm_schemes, NULL);
  106209. +static DEVICE_ATTR(scheme_6, S_IRUGO, show_fm_schemes, NULL);
  106210. +static DEVICE_ATTR(scheme_7, S_IRUGO, show_fm_schemes, NULL);
  106211. +static DEVICE_ATTR(scheme_8, S_IRUGO, show_fm_schemes, NULL);
  106212. +static DEVICE_ATTR(scheme_9, S_IRUGO, show_fm_schemes, NULL);
  106213. +static DEVICE_ATTR(scheme_10, S_IRUGO, show_fm_schemes, NULL);
  106214. +static DEVICE_ATTR(scheme_11, S_IRUGO, show_fm_schemes, NULL);
  106215. +static DEVICE_ATTR(scheme_12, S_IRUGO, show_fm_schemes, NULL);
  106216. +static DEVICE_ATTR(scheme_13, S_IRUGO, show_fm_schemes, NULL);
  106217. +static DEVICE_ATTR(scheme_14, S_IRUGO, show_fm_schemes, NULL);
  106218. +static DEVICE_ATTR(scheme_15, S_IRUGO, show_fm_schemes, NULL);
  106219. +static DEVICE_ATTR(scheme_16, S_IRUGO, show_fm_schemes, NULL);
  106220. +static DEVICE_ATTR(scheme_17, S_IRUGO, show_fm_schemes, NULL);
  106221. +static DEVICE_ATTR(scheme_18, S_IRUGO, show_fm_schemes, NULL);
  106222. +static DEVICE_ATTR(scheme_19, S_IRUGO, show_fm_schemes, NULL);
  106223. +static DEVICE_ATTR(scheme_20, S_IRUGO, show_fm_schemes, NULL);
  106224. +static DEVICE_ATTR(scheme_21, S_IRUGO, show_fm_schemes, NULL);
  106225. +static DEVICE_ATTR(scheme_22, S_IRUGO, show_fm_schemes, NULL);
  106226. +static DEVICE_ATTR(scheme_23, S_IRUGO, show_fm_schemes, NULL);
  106227. +static DEVICE_ATTR(scheme_24, S_IRUGO, show_fm_schemes, NULL);
  106228. +static DEVICE_ATTR(scheme_25, S_IRUGO, show_fm_schemes, NULL);
  106229. +static DEVICE_ATTR(scheme_26, S_IRUGO, show_fm_schemes, NULL);
  106230. +static DEVICE_ATTR(scheme_27, S_IRUGO, show_fm_schemes, NULL);
  106231. +static DEVICE_ATTR(scheme_28, S_IRUGO, show_fm_schemes, NULL);
  106232. +static DEVICE_ATTR(scheme_29, S_IRUGO, show_fm_schemes, NULL);
  106233. +static DEVICE_ATTR(scheme_30, S_IRUGO, show_fm_schemes, NULL);
  106234. +static DEVICE_ATTR(scheme_31, S_IRUGO, show_fm_schemes, NULL);
  106235. +
  106236. +
  106237. +static struct attribute *fm_dev_stats_attributes[] = {
  106238. + &dev_attr_enq_total_frame.attr,
  106239. + &dev_attr_deq_total_frame.attr,
  106240. + &dev_attr_deq_0.attr,
  106241. + &dev_attr_deq_1.attr,
  106242. + &dev_attr_deq_2.attr,
  106243. + &dev_attr_deq_3.attr,
  106244. + &dev_attr_deq_from_default.attr,
  106245. + &dev_attr_deq_from_context.attr,
  106246. + &dev_attr_deq_from_fd.attr,
  106247. + &dev_attr_deq_confirm.attr,
  106248. + &dev_attr_cmq_not_empty.attr,
  106249. + &dev_attr_bus_error.attr,
  106250. + &dev_attr_read_buf_ecc_error.attr,
  106251. + &dev_attr_write_buf_ecc_sys_error.attr,
  106252. + &dev_attr_write_buf_ecc_fm_error.attr,
  106253. + &dev_attr_pcd_kg_total.attr,
  106254. + &dev_attr_pcd_plcr_yellow.attr,
  106255. + &dev_attr_pcd_plcr_red.attr,
  106256. + &dev_attr_pcd_plcr_recolored_to_red.attr,
  106257. + &dev_attr_pcd_plcr_recolored_to_yellow.attr,
  106258. + &dev_attr_pcd_plcr_total.attr,
  106259. + &dev_attr_pcd_plcr_length_mismatch.attr,
  106260. + &dev_attr_pcd_prs_parse_dispatch.attr,
  106261. + &dev_attr_pcd_prs_l2_parse_result_returned.attr,
  106262. + &dev_attr_pcd_prs_l3_parse_result_returned.attr,
  106263. + &dev_attr_pcd_prs_l4_parse_result_returned.attr,
  106264. + &dev_attr_pcd_prs_shim_parse_result_returned.attr,
  106265. + &dev_attr_pcd_prs_l2_parse_result_returned_with_err.attr,
  106266. + &dev_attr_pcd_prs_l3_parse_result_returned_with_err.attr,
  106267. + &dev_attr_pcd_prs_l4_parse_result_returned_with_err.attr,
  106268. + &dev_attr_pcd_prs_shim_parse_result_returned_with_err.attr,
  106269. + &dev_attr_pcd_prs_soft_prs_cycles.attr,
  106270. + &dev_attr_pcd_prs_soft_prs_stall_cycles.attr,
  106271. + &dev_attr_pcd_prs_hard_prs_cycle_incl_stall_cycles.attr,
  106272. + &dev_attr_pcd_prs_muram_read_cycles.attr,
  106273. + &dev_attr_pcd_prs_muram_read_stall_cycles.attr,
  106274. + &dev_attr_pcd_prs_muram_write_cycles.attr,
  106275. + &dev_attr_pcd_prs_muram_write_stall_cycles.attr,
  106276. + &dev_attr_pcd_prs_fpm_command_stall_cycles.attr,
  106277. + NULL
  106278. +};
  106279. +
  106280. +static struct attribute *fm_dev_tnums_dbg_attributes[] = {
  106281. + &dev_attr_tnum_dbg_0.attr,
  106282. + &dev_attr_tnum_dbg_16.attr,
  106283. + &dev_attr_tnum_dbg_32.attr,
  106284. + &dev_attr_tnum_dbg_48.attr,
  106285. + &dev_attr_tnum_dbg_64.attr,
  106286. + &dev_attr_tnum_dbg_80.attr,
  106287. + &dev_attr_tnum_dbg_96.attr,
  106288. + &dev_attr_tnum_dbg_112.attr,
  106289. + NULL
  106290. +};
  106291. +
  106292. +static struct attribute *fm_dev_cls_plans_attributes[] = {
  106293. + &dev_attr_cls_plan_0.attr,
  106294. + &dev_attr_cls_plan_1.attr,
  106295. + &dev_attr_cls_plan_2.attr,
  106296. + &dev_attr_cls_plan_3.attr,
  106297. + &dev_attr_cls_plan_4.attr,
  106298. + &dev_attr_cls_plan_5.attr,
  106299. + &dev_attr_cls_plan_6.attr,
  106300. + &dev_attr_cls_plan_7.attr,
  106301. + &dev_attr_cls_plan_8.attr,
  106302. + &dev_attr_cls_plan_9.attr,
  106303. + &dev_attr_cls_plan_10.attr,
  106304. + &dev_attr_cls_plan_11.attr,
  106305. + &dev_attr_cls_plan_12.attr,
  106306. + &dev_attr_cls_plan_13.attr,
  106307. + &dev_attr_cls_plan_14.attr,
  106308. + &dev_attr_cls_plan_15.attr,
  106309. + &dev_attr_cls_plan_16.attr,
  106310. + &dev_attr_cls_plan_17.attr,
  106311. + &dev_attr_cls_plan_18.attr,
  106312. + &dev_attr_cls_plan_19.attr,
  106313. + &dev_attr_cls_plan_20.attr,
  106314. + &dev_attr_cls_plan_21.attr,
  106315. + &dev_attr_cls_plan_22.attr,
  106316. + &dev_attr_cls_plan_23.attr,
  106317. + &dev_attr_cls_plan_24.attr,
  106318. + &dev_attr_cls_plan_25.attr,
  106319. + &dev_attr_cls_plan_26.attr,
  106320. + &dev_attr_cls_plan_27.attr,
  106321. + &dev_attr_cls_plan_28.attr,
  106322. + &dev_attr_cls_plan_29.attr,
  106323. + &dev_attr_cls_plan_30.attr,
  106324. + &dev_attr_cls_plan_31.attr,
  106325. + NULL
  106326. +};
  106327. +
  106328. +static struct attribute *fm_dev_profiles_attributes[] = {
  106329. + &dev_attr_profile_0.attr,
  106330. + &dev_attr_profile_1.attr,
  106331. + &dev_attr_profile_2.attr,
  106332. + &dev_attr_profile_3.attr,
  106333. + &dev_attr_profile_4.attr,
  106334. + &dev_attr_profile_5.attr,
  106335. + &dev_attr_profile_6.attr,
  106336. + &dev_attr_profile_7.attr,
  106337. + &dev_attr_profile_8.attr,
  106338. + &dev_attr_profile_9.attr,
  106339. + &dev_attr_profile_10.attr,
  106340. + &dev_attr_profile_11.attr,
  106341. + &dev_attr_profile_12.attr,
  106342. + &dev_attr_profile_13.attr,
  106343. + &dev_attr_profile_14.attr,
  106344. + &dev_attr_profile_15.attr,
  106345. + &dev_attr_profile_16.attr,
  106346. + &dev_attr_profile_17.attr,
  106347. + &dev_attr_profile_18.attr,
  106348. + &dev_attr_profile_19.attr,
  106349. + &dev_attr_profile_20.attr,
  106350. + &dev_attr_profile_21.attr,
  106351. + &dev_attr_profile_22.attr,
  106352. + &dev_attr_profile_23.attr,
  106353. + &dev_attr_profile_24.attr,
  106354. + &dev_attr_profile_25.attr,
  106355. + &dev_attr_profile_26.attr,
  106356. + &dev_attr_profile_27.attr,
  106357. + &dev_attr_profile_28.attr,
  106358. + &dev_attr_profile_29.attr,
  106359. + &dev_attr_profile_30.attr,
  106360. + &dev_attr_profile_31.attr,
  106361. + NULL
  106362. +};
  106363. +
  106364. +static struct attribute *fm_dev_schemes_attributes[] = {
  106365. + &dev_attr_scheme_0.attr,
  106366. + &dev_attr_scheme_1.attr,
  106367. + &dev_attr_scheme_2.attr,
  106368. + &dev_attr_scheme_3.attr,
  106369. + &dev_attr_scheme_4.attr,
  106370. + &dev_attr_scheme_5.attr,
  106371. + &dev_attr_scheme_6.attr,
  106372. + &dev_attr_scheme_7.attr,
  106373. + &dev_attr_scheme_8.attr,
  106374. + &dev_attr_scheme_9.attr,
  106375. + &dev_attr_scheme_10.attr,
  106376. + &dev_attr_scheme_11.attr,
  106377. + &dev_attr_scheme_12.attr,
  106378. + &dev_attr_scheme_13.attr,
  106379. + &dev_attr_scheme_14.attr,
  106380. + &dev_attr_scheme_15.attr,
  106381. + &dev_attr_scheme_16.attr,
  106382. + &dev_attr_scheme_17.attr,
  106383. + &dev_attr_scheme_18.attr,
  106384. + &dev_attr_scheme_19.attr,
  106385. + &dev_attr_scheme_20.attr,
  106386. + &dev_attr_scheme_21.attr,
  106387. + &dev_attr_scheme_22.attr,
  106388. + &dev_attr_scheme_23.attr,
  106389. + &dev_attr_scheme_24.attr,
  106390. + &dev_attr_scheme_25.attr,
  106391. + &dev_attr_scheme_26.attr,
  106392. + &dev_attr_scheme_27.attr,
  106393. + &dev_attr_scheme_28.attr,
  106394. + &dev_attr_scheme_29.attr,
  106395. + &dev_attr_scheme_30.attr,
  106396. + &dev_attr_scheme_31.attr,
  106397. + NULL
  106398. +};
  106399. +
  106400. +static const struct attribute_group fm_dev_stats_attr_grp = {
  106401. + .name = "statistics",
  106402. + .attrs = fm_dev_stats_attributes
  106403. +};
  106404. +
  106405. +static const struct attribute_group fm_dev_tnums_dbg_attr_grp = {
  106406. + .name = "tnums_dbg",
  106407. + .attrs = fm_dev_tnums_dbg_attributes
  106408. +};
  106409. +
  106410. +static const struct attribute_group fm_dev_cls_plans_attr_grp = {
  106411. + .name = "cls_plans",
  106412. + .attrs = fm_dev_cls_plans_attributes
  106413. +};
  106414. +
  106415. +static const struct attribute_group fm_dev_schemes_attr_grp = {
  106416. + .name = "schemes",
  106417. + .attrs = fm_dev_schemes_attributes
  106418. +};
  106419. +
  106420. +static const struct attribute_group fm_dev_profiles_attr_grp = {
  106421. + .name = "profiles",
  106422. + .attrs = fm_dev_profiles_attributes
  106423. +};
  106424. +
  106425. +static ssize_t show_fm_regs(struct device *dev,
  106426. + struct device_attribute *attr,
  106427. + char *buf)
  106428. +{
  106429. + unsigned long flags;
  106430. + unsigned n = 0;
  106431. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106432. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106433. +#endif
  106434. + if (attr == NULL || buf == NULL || dev == NULL)
  106435. + return -EINVAL;
  106436. +
  106437. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106438. +
  106439. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106440. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106441. + return -EINVAL;
  106442. +
  106443. + local_irq_save(flags);
  106444. +
  106445. + n = snprintf(buf, PAGE_SIZE, "FM driver registers dump.\n");
  106446. +
  106447. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
  106448. + return -EIO;
  106449. + else
  106450. + n = fm_dump_regs(p_wrp_fm_dev->h_Dev, buf, n);
  106451. +
  106452. + local_irq_restore(flags);
  106453. +#else
  106454. +
  106455. + local_irq_save(flags);
  106456. + n = snprintf(buf, PAGE_SIZE,
  106457. + "Debug level is too low to dump registers!!!\n");
  106458. + local_irq_restore(flags);
  106459. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106460. +
  106461. + return n;
  106462. +}
  106463. +
  106464. +static ssize_t show_fm_kg_pe_regs(struct device *dev,
  106465. + struct device_attribute *attr,
  106466. + char *buf)
  106467. +{
  106468. + unsigned long flags;
  106469. + unsigned n = 0;
  106470. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106471. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106472. +#endif
  106473. +
  106474. + if (attr == NULL || buf == NULL || dev == NULL)
  106475. + return -EINVAL;
  106476. +
  106477. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106478. +
  106479. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106480. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106481. + return -EINVAL;
  106482. +
  106483. + local_irq_save(flags);
  106484. +
  106485. + n = snprintf(buf, PAGE_SIZE,
  106486. + "\n FM-KG Port Partition Config registers dump.\n");
  106487. +
  106488. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
  106489. + return -EIO;
  106490. + else
  106491. + n = fm_kg_pe_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
  106492. +
  106493. + local_irq_restore(flags);
  106494. +#else
  106495. +
  106496. + local_irq_save(flags);
  106497. + n = snprintf(buf, PAGE_SIZE,
  106498. + "Debug level is too low to dump registers!!!\n");
  106499. + local_irq_restore(flags);
  106500. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106501. +
  106502. + return n;
  106503. +}
  106504. +
  106505. +static ssize_t show_fm_kg_regs(struct device *dev,
  106506. + struct device_attribute *attr,
  106507. + char *buf)
  106508. +{
  106509. + unsigned long flags;
  106510. + unsigned n = 0;
  106511. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106512. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106513. +#endif
  106514. +
  106515. + if (attr == NULL || buf == NULL || dev == NULL)
  106516. + return -EINVAL;
  106517. +
  106518. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106519. +
  106520. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106521. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106522. + return -EINVAL;
  106523. +
  106524. + local_irq_save(flags);
  106525. +
  106526. + n = snprintf(buf, PAGE_SIZE, "FM-KG registers dump.\n");
  106527. +
  106528. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
  106529. + return -EIO;
  106530. + else
  106531. + n = fm_kg_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
  106532. +
  106533. + local_irq_restore(flags);
  106534. +#else
  106535. +
  106536. + local_irq_save(flags);
  106537. + n = snprintf(buf, PAGE_SIZE,
  106538. + "Debug level is too low to dump registers!!!\n");
  106539. + local_irq_restore(flags);
  106540. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106541. +
  106542. + return n;
  106543. +}
  106544. +
  106545. +
  106546. +static ssize_t show_fm_fpm_regs(struct device *dev,
  106547. + struct device_attribute *attr,
  106548. + char *buf)
  106549. +{
  106550. + unsigned long flags;
  106551. + unsigned n = 0;
  106552. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106553. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106554. +#endif
  106555. +
  106556. + if (attr == NULL || buf == NULL || dev == NULL)
  106557. + return -EINVAL;
  106558. +
  106559. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106560. +
  106561. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106562. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106563. + return -EINVAL;
  106564. +
  106565. + local_irq_save(flags);
  106566. +
  106567. + n = snprintf(buf, PAGE_SIZE, "FM-FPM registers dump.\n");
  106568. +
  106569. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_Dev)
  106570. + return -EIO;
  106571. + else
  106572. + n = fm_fpm_dump_regs(p_wrp_fm_dev->h_Dev, buf, n);
  106573. +
  106574. + local_irq_restore(flags);
  106575. +#else
  106576. +
  106577. + local_irq_save(flags);
  106578. + n = snprintf(buf, PAGE_SIZE,
  106579. + "Debug level is too low to dump registers!!!\n");
  106580. + local_irq_restore(flags);
  106581. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106582. +
  106583. + return n;
  106584. +}
  106585. +
  106586. +static ssize_t show_prs_regs(struct device *dev,
  106587. + struct device_attribute *attr, char *buf)
  106588. +{
  106589. + unsigned long flags;
  106590. + unsigned n = 0;
  106591. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106592. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106593. +#endif
  106594. +
  106595. + if (attr == NULL || buf == NULL || dev == NULL)
  106596. + return -EINVAL;
  106597. +
  106598. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106599. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106600. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106601. + return -EINVAL;
  106602. +
  106603. + local_irq_save(flags);
  106604. + n = snprintf(buf, PAGE_SIZE, "FM Policer registers dump.\n");
  106605. +
  106606. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
  106607. + return -EIO;
  106608. + else
  106609. + n = fm_prs_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
  106610. +
  106611. + local_irq_restore(flags);
  106612. +#else
  106613. +
  106614. + local_irq_save(flags);
  106615. + n = snprintf(buf, PAGE_SIZE,
  106616. + "Debug level is too low to dump registers!!!\n");
  106617. + local_irq_restore(flags);
  106618. +
  106619. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106620. +
  106621. + return n;
  106622. +}
  106623. +
  106624. +static ssize_t show_plcr_regs(struct device *dev,
  106625. + struct device_attribute *attr,
  106626. + char *buf)
  106627. +{
  106628. + unsigned long flags;
  106629. + unsigned n = 0;
  106630. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106631. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106632. +#endif
  106633. +
  106634. + if (attr == NULL || buf == NULL || dev == NULL)
  106635. + return -EINVAL;
  106636. +
  106637. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  106638. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106639. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106640. + return -EINVAL;
  106641. +
  106642. + local_irq_save(flags);
  106643. + n = snprintf(buf, PAGE_SIZE, "FM Policer registers dump.\n");
  106644. +
  106645. + if (!p_wrp_fm_dev->active || !p_wrp_fm_dev->h_PcdDev)
  106646. + return -EIO;
  106647. + else
  106648. + n = fm_plcr_dump_regs(p_wrp_fm_dev->h_PcdDev, buf, n);
  106649. +
  106650. + local_irq_restore(flags);
  106651. +#else
  106652. +
  106653. + local_irq_save(flags);
  106654. + n = snprintf(buf, PAGE_SIZE,
  106655. + "Debug level is too low to dump registers!!!\n");
  106656. + local_irq_restore(flags);
  106657. +
  106658. +#endif /* (defined(DEBUG_ERRORS) && ... */
  106659. +
  106660. + return n;
  106661. +}
  106662. +
  106663. +static DEVICE_ATTR(fm_regs, S_IRUGO, show_fm_regs, NULL);
  106664. +static DEVICE_ATTR(fm_fpm_regs, S_IRUGO, show_fm_fpm_regs, NULL);
  106665. +static DEVICE_ATTR(fm_kg_regs, S_IRUGO, show_fm_kg_regs, NULL);
  106666. +static DEVICE_ATTR(fm_kg_pe_regs, S_IRUGO, show_fm_kg_pe_regs, NULL);
  106667. +static DEVICE_ATTR(fm_plcr_regs, S_IRUGO, show_plcr_regs, NULL);
  106668. +static DEVICE_ATTR(fm_prs_regs, S_IRUGO, show_prs_regs, NULL);
  106669. +static DEVICE_ATTR(fm_muram_free_size, S_IRUGO, show_fm_muram_free_sz, NULL);
  106670. +static DEVICE_ATTR(fm_ctrl_code_ver, S_IRUGO, show_fm_ctrl_code_ver, NULL);
  106671. +
  106672. +int fm_sysfs_create(struct device *dev)
  106673. +{
  106674. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106675. +
  106676. + if (dev == NULL)
  106677. + return -EIO;
  106678. +
  106679. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106680. +
  106681. + /* store to remove them when module is disabled */
  106682. + p_wrp_fm_dev->dev_attr_regs = &dev_attr_fm_regs;
  106683. + p_wrp_fm_dev->dev_attr_risc_load = &dev_attr_fm_risc_load_val;
  106684. + p_wrp_fm_dev->dev_fm_fpm_attr_regs = &dev_attr_fm_fpm_regs;
  106685. + p_wrp_fm_dev->dev_fm_kg_attr_regs = &dev_attr_fm_kg_regs;
  106686. + p_wrp_fm_dev->dev_fm_kg_pe_attr_regs = &dev_attr_fm_kg_pe_regs;
  106687. + p_wrp_fm_dev->dev_plcr_attr_regs = &dev_attr_fm_plcr_regs;
  106688. + p_wrp_fm_dev->dev_prs_attr_regs = &dev_attr_fm_prs_regs;
  106689. + p_wrp_fm_dev->dev_attr_muram_free_size = &dev_attr_fm_muram_free_size;
  106690. + p_wrp_fm_dev->dev_attr_fm_ctrl_code_ver = &dev_attr_fm_ctrl_code_ver;
  106691. +
  106692. + /* Create sysfs statistics group for FM module */
  106693. + if (sysfs_create_group(&dev->kobj, &fm_dev_stats_attr_grp) != 0)
  106694. + return -EIO;
  106695. +
  106696. + if (sysfs_create_group(&dev->kobj, &fm_dev_schemes_attr_grp) != 0)
  106697. + return -EIO;
  106698. +
  106699. + if (sysfs_create_group(&dev->kobj, &fm_dev_profiles_attr_grp) != 0)
  106700. + return -EIO;
  106701. +
  106702. + if (sysfs_create_group(&dev->kobj, &fm_dev_tnums_dbg_attr_grp) != 0)
  106703. + return -EIO;
  106704. +
  106705. + if (sysfs_create_group(&dev->kobj, &fm_dev_cls_plans_attr_grp) != 0)
  106706. + return -EIO;
  106707. +
  106708. + /* Registers dump entry - in future will be moved to debugfs */
  106709. + if (device_create_file(dev, &dev_attr_fm_regs) != 0)
  106710. + return -EIO;
  106711. +
  106712. + if (device_create_file(dev, &dev_attr_fm_risc_load_val) != 0)
  106713. + return -EIO;
  106714. +
  106715. + if (device_create_file(dev, &dev_attr_fm_fpm_regs) != 0)
  106716. + return -EIO;
  106717. +
  106718. + if (device_create_file(dev, &dev_attr_fm_kg_regs) != 0)
  106719. + return -EIO;
  106720. +
  106721. + if (device_create_file(dev, &dev_attr_fm_kg_pe_regs) != 0)
  106722. + return -EIO;
  106723. +
  106724. + if (device_create_file(dev, &dev_attr_fm_plcr_regs) != 0)
  106725. + return -EIO;
  106726. +
  106727. + if (device_create_file(dev, &dev_attr_fm_prs_regs) != 0)
  106728. + return -EIO;
  106729. +
  106730. + /* muram free size */
  106731. + if (device_create_file(dev, &dev_attr_fm_muram_free_size) != 0)
  106732. + return -EIO;
  106733. +
  106734. + /* fm ctrl code version */
  106735. + if (device_create_file(dev, &dev_attr_fm_ctrl_code_ver) != 0)
  106736. + return -EIO;
  106737. +
  106738. + return 0;
  106739. +}
  106740. +
  106741. +void fm_sysfs_destroy(struct device *dev)
  106742. +{
  106743. + t_LnxWrpFmDev *p_wrp_fm_dev = NULL;
  106744. +
  106745. + if (WARN_ON(dev == NULL))
  106746. + return;
  106747. +
  106748. + p_wrp_fm_dev = (t_LnxWrpFmDev *) dev_get_drvdata(dev);
  106749. + if (WARN_ON(p_wrp_fm_dev == NULL))
  106750. + return;
  106751. +
  106752. + sysfs_remove_group(&dev->kobj, &fm_dev_stats_attr_grp);
  106753. + sysfs_remove_group(&dev->kobj, &fm_dev_schemes_attr_grp);
  106754. + sysfs_remove_group(&dev->kobj, &fm_dev_profiles_attr_grp);
  106755. + sysfs_remove_group(&dev->kobj, &fm_dev_cls_plans_attr_grp);
  106756. + sysfs_remove_group(&dev->kobj, &fm_dev_tnums_dbg_attr_grp);
  106757. + device_remove_file(dev, p_wrp_fm_dev->dev_attr_regs);
  106758. + device_remove_file(dev, p_wrp_fm_dev->dev_fm_fpm_attr_regs);
  106759. + device_remove_file(dev, p_wrp_fm_dev->dev_fm_kg_attr_regs);
  106760. + device_remove_file(dev, p_wrp_fm_dev->dev_fm_kg_pe_attr_regs);
  106761. + device_remove_file(dev, p_wrp_fm_dev->dev_plcr_attr_regs);
  106762. + device_remove_file(dev, p_wrp_fm_dev->dev_prs_attr_regs);
  106763. + device_remove_file(dev, p_wrp_fm_dev->dev_attr_muram_free_size);
  106764. + device_remove_file(dev, p_wrp_fm_dev->dev_attr_fm_ctrl_code_ver);
  106765. +}
  106766. +
  106767. +int fm_dump_regs(void *h_fm, char *buf, int nn)
  106768. +{
  106769. + t_Fm *p_Fm = (t_Fm *)h_fm;
  106770. + uint8_t i = 0;
  106771. + int n = nn;
  106772. +
  106773. + FM_DMP_SUBTITLE(buf, n, "\n");
  106774. +
  106775. + FM_DMP_TITLE(buf, n, p_Fm->p_FmDmaRegs, "FM-DMA Regs");
  106776. +
  106777. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmsr);
  106778. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmemsr);
  106779. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmmr);
  106780. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtr);
  106781. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmhy);
  106782. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmsetr);
  106783. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtah);
  106784. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtal);
  106785. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmtcid);
  106786. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmra);
  106787. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmrd);
  106788. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmwcr);
  106789. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmebcr);
  106790. + FM_DMP_V32(buf, n, p_Fm->p_FmDmaRegs, fmdmdcr);
  106791. +
  106792. + FM_DMP_TITLE(buf, n, &p_Fm->p_FmDmaRegs->fmdmplr, "fmdmplr");
  106793. +
  106794. + for (i = 0; i < FM_MAX_NUM_OF_HW_PORT_IDS / 2 ; ++i)
  106795. + FM_DMP_MEM_32(buf, n, &p_Fm->p_FmDmaRegs->fmdmplr[i]);
  106796. +
  106797. + FM_DMP_TITLE(buf, n, p_Fm->p_FmBmiRegs, "FM-BMI COMMON Regs");
  106798. + FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_init);
  106799. + FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_cfg1);
  106800. + FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_cfg2);
  106801. + FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_ievr);
  106802. + FM_DMP_V32(buf, n, p_Fm->p_FmBmiRegs, fmbm_ier);
  106803. +
  106804. + FM_DMP_TITLE(buf, n, &p_Fm->p_FmBmiRegs->fmbm_arb, "fmbm_arb");
  106805. + for (i = 0; i < 8 ; ++i)
  106806. + FM_DMP_MEM_32(buf, n, &p_Fm->p_FmBmiRegs->fmbm_arb[i]);
  106807. +
  106808. + FM_DMP_TITLE(buf, n, p_Fm->p_FmQmiRegs, "FM-QMI COMMON Regs");
  106809. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_gc);
  106810. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_eie);
  106811. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_eien);
  106812. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_eif);
  106813. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_ie);
  106814. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_ien);
  106815. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_if);
  106816. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_gs);
  106817. + FM_DMP_V32(buf, n, p_Fm->p_FmQmiRegs, fmqm_etfc);
  106818. +
  106819. + return n;
  106820. +}
  106821. +
  106822. +int fm_dump_tnum_dbg(void *h_fm, int tn_s, int tn_e, char *buf, int nn)
  106823. +{
  106824. + t_Fm *p_Fm = (t_Fm *)h_fm;
  106825. + uint8_t i, j = 0;
  106826. + int n = nn;
  106827. +
  106828. + FM_DMP_TITLE(buf, n, NULL, "Tnums and Tnum dbg regs %d - %d",
  106829. + tn_s, tn_e);
  106830. +
  106831. + iowrite32be(tn_s << 24, &p_Fm->p_FmFpmRegs->fmfp_dra);
  106832. +
  106833. + mb();
  106834. +
  106835. + for (j = tn_s; j <= tn_e; j++) {
  106836. + FM_DMP_LN(buf, n, "> fmfp_ts[%d]\n", j);
  106837. + FM_DMP_MEM_32(buf, n, &p_Fm->p_FmFpmRegs->fmfp_ts[j]);
  106838. + FM_DMP_V32(buf, n, p_Fm->p_FmFpmRegs, fmfp_dra);
  106839. + FM_DMP_LN(buf, n, "> fmfp_drd[0-3]\n");
  106840. +
  106841. + for (i = 0; i < 4 ; ++i)
  106842. + FM_DMP_MEM_32(buf, n, &p_Fm->p_FmFpmRegs->fmfp_drd[i]);
  106843. +
  106844. + FM_DMP_LN(buf, n, "\n");
  106845. +
  106846. + }
  106847. +
  106848. + return n;
  106849. +}
  106850. +
  106851. +int fm_dump_cls_plan(void *h_fm_pcd, int cpn, char *buf, int nn)
  106852. +{
  106853. + t_FmPcd *p_pcd = (t_FmPcd *)h_fm_pcd;
  106854. + int i = 0;
  106855. + uint32_t tmp;
  106856. + unsigned long i_flg;
  106857. + int n = nn;
  106858. + u_FmPcdKgIndirectAccessRegs *idac;
  106859. + spinlock_t *p_lk;
  106860. +
  106861. + p_lk = (spinlock_t *)p_pcd->p_FmPcdKg->h_HwSpinlock;
  106862. + idac = p_pcd->p_FmPcdKg->p_IndirectAccessRegs;
  106863. +
  106864. + spin_lock_irqsave(p_lk, i_flg);
  106865. +
  106866. + /* Read ClsPlan Block Action Regs */
  106867. + tmp = (uint32_t)(FM_KG_KGAR_GO |
  106868. + FM_KG_KGAR_READ |
  106869. + FM_PCD_KG_KGAR_SEL_CLS_PLAN_ENTRY |
  106870. + DUMMY_PORT_ID |
  106871. + ((uint32_t)cpn << FM_PCD_KG_KGAR_NUM_SHIFT) |
  106872. + FM_PCD_KG_KGAR_WSEL_MASK);
  106873. +
  106874. + if (fman_kg_write_ar_wait(p_pcd->p_FmPcdKg->p_FmPcdKgRegs, tmp)) {
  106875. + FM_DMP_LN(buf, nn, "Keygen scheme access violation");
  106876. + spin_unlock_irqrestore(p_lk, i_flg);
  106877. + return nn;
  106878. + }
  106879. + FM_DMP_TITLE(buf, n, &idac->clsPlanRegs,
  106880. + "ClsPlan %d Indirect Access Regs", cpn);
  106881. +
  106882. + for (i = 0; i < 8; i++)
  106883. + FM_DMP_MEM_32(buf, n, &idac->clsPlanRegs.kgcpe[i]);
  106884. +
  106885. + spin_unlock_irqrestore(p_lk, i_flg);
  106886. +
  106887. + return n;
  106888. +}
  106889. +
  106890. +int fm_profile_dump_regs(void *h_fm_pcd, int ppn, char *buf, int nn)
  106891. +{
  106892. + t_FmPcd *p_pcd = (t_FmPcd *)h_fm_pcd;
  106893. + t_FmPcdPlcrProfileRegs *p_prof_regs;
  106894. + t_FmPcdPlcrRegs *p_plcr_regs;
  106895. + t_FmPcdPlcr *p_plcr;
  106896. + uint32_t tmp;
  106897. + unsigned long i_flg;
  106898. + int n = nn;
  106899. + int toc = 10;
  106900. + spinlock_t *p_lk;
  106901. +
  106902. + p_plcr = p_pcd->p_FmPcdPlcr;
  106903. + p_prof_regs = &p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->profileRegs;
  106904. + p_plcr_regs = p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs;
  106905. +
  106906. + p_lk = (spinlock_t *)((t_FmPcdPlcr *)p_plcr)->h_HwSpinlock;
  106907. +
  106908. + FM_DMP_SUBTITLE(buf, n, "\n");
  106909. + FM_DMP_TITLE(buf, n, p_plcr_regs, "FM-PCD policer-profile regs");
  106910. +
  106911. + tmp = (uint32_t)(FM_PCD_PLCR_PAR_GO |
  106912. + FM_PCD_PLCR_PAR_R |
  106913. + ((uint32_t)ppn << FM_PCD_PLCR_PAR_PNUM_SHIFT) |
  106914. + FM_PCD_PLCR_PAR_PWSEL_MASK);
  106915. +
  106916. + spin_lock_irqsave(p_lk, i_flg);
  106917. +
  106918. + iowrite32be(tmp, &p_plcr_regs->fmpl_par);
  106919. +
  106920. + mb();
  106921. +
  106922. + /* wait for the porfile regs to be present */
  106923. + do {
  106924. + --toc;
  106925. + udelay(10);
  106926. + if (!toc) {
  106927. + /* looks like PLCR_PAR_GO refuses to clear */
  106928. + spin_unlock_irqrestore(p_lk, i_flg);
  106929. + FM_DMP_LN(buf, n, "Profile regs not accessible -");
  106930. + FM_DMP_LN(buf, n, " check profile init process\n");
  106931. + return n;
  106932. + }
  106933. + } while ((ioread32be(&p_plcr_regs->fmpl_par) & FM_PCD_PLCR_PAR_GO));
  106934. +
  106935. + FM_DMP_TITLE(buf, n, p_prof_regs, "Profile %d regs", ppn);
  106936. +
  106937. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pemode);
  106938. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pegnia);
  106939. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_peynia);
  106940. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pernia);
  106941. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pecir);
  106942. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pecbs);
  106943. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pepepir_eir);
  106944. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pepbs_ebs);
  106945. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pelts);
  106946. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pects);
  106947. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pepts_ets);
  106948. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_pegpc);
  106949. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_peypc);
  106950. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_perpc);
  106951. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_perypc);
  106952. + FM_DMP_V32(buf, n, p_prof_regs, fmpl_perrpc);
  106953. +
  106954. + spin_unlock_irqrestore(p_lk, i_flg);
  106955. +
  106956. + return n;
  106957. +}
  106958. +
  106959. +int fm_dump_scheme(void *h_fm_pcd, int scnum, char *buf, int nn)
  106960. +{
  106961. + t_FmPcd *p_pcd = (t_FmPcd *)h_fm_pcd;
  106962. + uint32_t tmp_ar;
  106963. + unsigned long i_flg;
  106964. + int i, n = nn;
  106965. + spinlock_t *p_lk;
  106966. + u_FmPcdKgIndirectAccessRegs *idac;
  106967. +
  106968. + idac = p_pcd->p_FmPcdKg->p_IndirectAccessRegs;
  106969. + p_lk = (spinlock_t *)p_pcd->p_FmPcdKg->h_HwSpinlock;
  106970. +
  106971. + spin_lock_irqsave(p_lk, i_flg);
  106972. +
  106973. + tmp_ar = FmPcdKgBuildReadSchemeActionReg((uint8_t)scnum);
  106974. + if (fman_kg_write_ar_wait(p_pcd->p_FmPcdKg->p_FmPcdKgRegs, tmp_ar)) {
  106975. + FM_DMP_LN(buf, nn,
  106976. + "Keygen scheme access violation or no such scheme");
  106977. + spin_unlock_irqrestore(p_lk, i_flg);
  106978. + return nn;
  106979. + }
  106980. +
  106981. + FM_DMP_TITLE(buf, n, &idac->schemeRegs,
  106982. + "Scheme %d Indirect Access Regs", scnum);
  106983. +
  106984. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_mode);
  106985. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ekfc);
  106986. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ekdv);
  106987. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_bmch);
  106988. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_bmcl);
  106989. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_fqb);
  106990. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_hc);
  106991. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ppc);
  106992. +
  106993. + FM_DMP_TITLE(buf, n, &idac->schemeRegs.kgse_gec, "kgse_gec");
  106994. +
  106995. + for (i = 0; i < FM_KG_NUM_OF_GENERIC_REGS; i++)
  106996. + FM_DMP_MEM_32(buf, n, &idac->schemeRegs.kgse_gec[i]);
  106997. +
  106998. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_spc);
  106999. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_dv0);
  107000. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_dv1);
  107001. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_ccbs);
  107002. + FM_DMP_V32(buf, n, &idac->schemeRegs, kgse_mv);
  107003. +
  107004. + FM_DMP_SUBTITLE(buf, n, "\n");
  107005. +
  107006. + spin_unlock_irqrestore(p_lk, i_flg);
  107007. +
  107008. + return n;
  107009. +}
  107010. +
  107011. +int fm_kg_pe_dump_regs(void *h_fm_pcd, char *buf, int nn)
  107012. +{
  107013. + t_FmPcd *p_pcd = (t_FmPcd *)h_fm_pcd;
  107014. + int i = 0;
  107015. + uint8_t prt_id = 0;
  107016. + uint32_t tmp_ar;
  107017. + unsigned long i_flg;
  107018. + int n = nn;
  107019. + u_FmPcdKgIndirectAccessRegs *idac;
  107020. + t_FmPcdKg *p_kg;
  107021. + spinlock_t *p_lk;
  107022. +
  107023. + p_kg = p_pcd->p_FmPcdKg;
  107024. + idac = p_pcd->p_FmPcdKg->p_IndirectAccessRegs;
  107025. + p_lk = (spinlock_t *)p_kg->h_HwSpinlock;
  107026. +
  107027. + spin_lock_irqsave(p_lk, i_flg);
  107028. +
  107029. + FM_DMP_SUBTITLE(buf, n, "\n");
  107030. +
  107031. + for (i = 0; i < FM_MAX_NUM_OF_PORTS; i++) {
  107032. + SW_PORT_INDX_TO_HW_PORT_ID(prt_id, i);
  107033. +
  107034. + tmp_ar = FmPcdKgBuildReadPortSchemeBindActionReg(prt_id);
  107035. +
  107036. + if (fman_kg_write_ar_wait(p_kg->p_FmPcdKgRegs, tmp_ar)) {
  107037. + FM_DMP_LN(buf, nn, "Keygen scheme access violation");
  107038. + spin_unlock_irqrestore(p_lk, i_flg);
  107039. + return nn;
  107040. + }
  107041. + FM_DMP_TITLE(buf, n, &idac->portRegs, "Port %d regs", prt_id);
  107042. + FM_DMP_V32(buf, n, &idac->portRegs, fmkg_pe_sp);
  107043. + FM_DMP_V32(buf, n, &idac->portRegs, fmkg_pe_cpp);
  107044. + }
  107045. +
  107046. + FM_DMP_SUBTITLE(buf, n, "\n");
  107047. +
  107048. + spin_unlock_irqrestore(p_lk, i_flg);
  107049. +
  107050. + return n;
  107051. +}
  107052. +
  107053. +int fm_kg_dump_regs(void *h_fm_pcd, char *buf, int nn)
  107054. +{
  107055. + t_FmPcd *p_pcd = (t_FmPcd *)h_fm_pcd;
  107056. + int n = nn;
  107057. +
  107058. + FM_DMP_SUBTITLE(buf, n, "\n");
  107059. + FM_DMP_TITLE(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs,
  107060. + "FmPcdKgRegs Regs");
  107061. +
  107062. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gcr);
  107063. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_eer);
  107064. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_eeer);
  107065. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_seer);
  107066. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_seeer);
  107067. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gsr);
  107068. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_tpc);
  107069. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_serc);
  107070. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_fdor);
  107071. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gdv0r);
  107072. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_gdv1r);
  107073. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_feer);
  107074. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdKg->p_FmPcdKgRegs, fmkg_ar);
  107075. +
  107076. + FM_DMP_SUBTITLE(buf, n, "\n");
  107077. +
  107078. + return n;
  107079. +}
  107080. +
  107081. +
  107082. +int fm_fpm_dump_regs(void *h_fm, char *buf, int nn)
  107083. +{
  107084. + t_Fm *p_fm = (t_Fm *)h_fm;
  107085. + uint8_t i;
  107086. + int n = nn;
  107087. +
  107088. + FM_DMP_SUBTITLE(buf, n, "\n");
  107089. +
  107090. + FM_DMP_TITLE(buf, n, p_fm->p_FmFpmRegs, "FM-FPM Regs");
  107091. +
  107092. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tnc);
  107093. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_prc);
  107094. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_brkc);
  107095. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_mxd);
  107096. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_dist1);
  107097. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_dist2);
  107098. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_epi);
  107099. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_rie);
  107100. +
  107101. + FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_fcev, "fmfp_fcev");
  107102. + for (i = 0; i < 4; ++i)
  107103. + FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_fcev[i]);
  107104. +
  107105. + FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_cee, "fmfp_cee");
  107106. + for (i = 0; i < 4; ++i)
  107107. + FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_cee[i]);
  107108. +
  107109. + FM_DMP_SUBTITLE(buf, n, "\n");
  107110. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsc1);
  107111. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsc2);
  107112. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsp);
  107113. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_tsf);
  107114. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_rcr);
  107115. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_extc);
  107116. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_ext1);
  107117. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_ext2);
  107118. +
  107119. + FM_DMP_SUBTITLE(buf, n, "\n");
  107120. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_ip_rev_1);
  107121. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_ip_rev_2);
  107122. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_rstc);
  107123. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_cld);
  107124. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fm_npi);
  107125. + FM_DMP_V32(buf, n, p_fm->p_FmFpmRegs, fmfp_ee);
  107126. +
  107127. + FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_cev, "fmfp_cev");
  107128. + for (i = 0; i < 4; ++i)
  107129. + FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_cev[i]);
  107130. +
  107131. + FM_DMP_TITLE(buf, n, &p_fm->p_FmFpmRegs->fmfp_ps, "fmfp_ps");
  107132. + for (i = 0; i < 64; ++i)
  107133. + FM_DMP_MEM_32(buf, n, &p_fm->p_FmFpmRegs->fmfp_ps[i]);
  107134. +
  107135. + return n;
  107136. +}
  107137. +
  107138. +int fm_prs_dump_regs(void *h_fm_pcd, char *buf, int nn)
  107139. +{
  107140. + t_FmPcd *p_pcd = (t_FmPcd *)h_fm_pcd;
  107141. + int n = nn;
  107142. +
  107143. + FM_DMP_SUBTITLE(buf, n, "\n");
  107144. +
  107145. + FM_DMP_TITLE(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs,
  107146. + "FM-PCD parser regs");
  107147. +
  107148. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_rpclim);
  107149. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_rpimac);
  107150. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, pmeec);
  107151. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_pevr);
  107152. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_pever);
  107153. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_perr);
  107154. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_perer);
  107155. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_ppsc);
  107156. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_pds);
  107157. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l2rrs);
  107158. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l3rrs);
  107159. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l4rrs);
  107160. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_srrs);
  107161. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l2rres);
  107162. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l3rres);
  107163. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_l4rres);
  107164. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_srres);
  107165. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_spcs);
  107166. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_spscs);
  107167. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_hxscs);
  107168. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mrcs);
  107169. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mwcs);
  107170. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mrscs);
  107171. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_mwscs);
  107172. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPrs->p_FmPcdPrsRegs, fmpr_fcscs);
  107173. +
  107174. + return n;
  107175. +}
  107176. +
  107177. +int fm_plcr_dump_regs(void *h_fm_pcd, char *buf, int nn)
  107178. +{
  107179. + t_FmPcd *p_pcd = (t_FmPcd *)h_fm_pcd;
  107180. + int i = 0;
  107181. + int n = nn;
  107182. +
  107183. + FM_DMP_SUBTITLE(buf, n, "\n");
  107184. +
  107185. + FM_DMP_TITLE(buf, n,
  107186. + p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs,
  107187. + "FM policer regs");
  107188. +
  107189. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_gcr);
  107190. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_gsr);
  107191. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_evr);
  107192. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_ier);
  107193. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_ifr);
  107194. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_eevr);
  107195. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_eier);
  107196. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_eifr);
  107197. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_rpcnt);
  107198. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_ypcnt);
  107199. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_rrpcnt);
  107200. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_rypcnt);
  107201. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_tpcnt);
  107202. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_flmcnt);
  107203. +
  107204. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_serc);
  107205. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_upcr);
  107206. + FM_DMP_V32(buf, n, p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs, fmpl_dpmr);
  107207. +
  107208. + FM_DMP_TITLE(buf, n,
  107209. + &p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_pmr,
  107210. + "fmpl_pmr");
  107211. +
  107212. + for (i = 0; i < 63; ++i)
  107213. + FM_DMP_MEM_32(buf, n,
  107214. + &p_pcd->p_FmPcdPlcr->p_FmPcdPlcrRegs->fmpl_pmr[i]);
  107215. +
  107216. + return n;
  107217. +}
  107218. +
  107219. +int fm_get_counter(void *h_fm, e_FmCounters cnt_e, uint32_t *cnt_val)
  107220. +{
  107221. + t_Fm *p_fm = (t_Fm *)h_fm;
  107222. +
  107223. + /* When applicable (when there is an "enable counters" bit),
  107224. + check that counters are enabled */
  107225. +
  107226. + switch (cnt_e) {
  107227. + case (e_FM_COUNTERS_DEQ_1):
  107228. + case (e_FM_COUNTERS_DEQ_2):
  107229. + case (e_FM_COUNTERS_DEQ_3):
  107230. + if (p_fm->p_FmStateStruct->revInfo.majorRev >= 6)
  107231. + return -EINVAL; /* counter not available */
  107232. +
  107233. + case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
  107234. + case (e_FM_COUNTERS_DEQ_TOTAL_FRAME):
  107235. + case (e_FM_COUNTERS_DEQ_0):
  107236. + case (e_FM_COUNTERS_DEQ_FROM_DEFAULT):
  107237. + case (e_FM_COUNTERS_DEQ_FROM_CONTEXT):
  107238. + case (e_FM_COUNTERS_DEQ_FROM_FD):
  107239. + case (e_FM_COUNTERS_DEQ_CONFIRM):
  107240. + if (!(ioread32be(&p_fm->p_FmQmiRegs->fmqm_gc) &
  107241. + QMI_CFG_EN_COUNTERS))
  107242. + return -EINVAL; /* Requested counter not available */
  107243. + break;
  107244. + default:
  107245. + break;
  107246. + }
  107247. +
  107248. + switch (cnt_e) {
  107249. + case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
  107250. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_etfc);
  107251. + return 0;
  107252. + case (e_FM_COUNTERS_DEQ_TOTAL_FRAME):
  107253. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dtfc);
  107254. + return 0;
  107255. + case (e_FM_COUNTERS_DEQ_0):
  107256. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc0);
  107257. + return 0;
  107258. + case (e_FM_COUNTERS_DEQ_1):
  107259. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc1);
  107260. + return 0;
  107261. + case (e_FM_COUNTERS_DEQ_2):
  107262. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc2);
  107263. + return 0;
  107264. + case (e_FM_COUNTERS_DEQ_3):
  107265. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dc3);
  107266. + return 0;
  107267. + case (e_FM_COUNTERS_DEQ_FROM_DEFAULT):
  107268. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dfdc);
  107269. + return 0;
  107270. + case (e_FM_COUNTERS_DEQ_FROM_CONTEXT):
  107271. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dfcc);
  107272. + return 0;
  107273. + case (e_FM_COUNTERS_DEQ_FROM_FD):
  107274. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dffc);
  107275. + return 0;
  107276. + case (e_FM_COUNTERS_DEQ_CONFIRM):
  107277. + *cnt_val = ioread32be(&p_fm->p_FmQmiRegs->fmqm_dcc);
  107278. + return 0;
  107279. + }
  107280. + /* should never get here */
  107281. + return -EINVAL; /* counter not available */
  107282. +}
  107283. --- /dev/null
  107284. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.h
  107285. @@ -0,0 +1,136 @@
  107286. +/*
  107287. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  107288. + *
  107289. + * Redistribution and use in source and binary forms, with or without
  107290. + * modification, are permitted provided that the following conditions are met:
  107291. + * * Redistributions of source code must retain the above copyright
  107292. + * notice, this list of conditions and the following disclaimer.
  107293. + * * Redistributions in binary form must reproduce the above copyright
  107294. + * notice, this list of conditions and the following disclaimer in the
  107295. + * documentation and/or other materials provided with the distribution.
  107296. + * * Neither the name of Freescale Semiconductor nor the
  107297. + * names of its contributors may be used to endorse or promote products
  107298. + * derived from this software without specific prior written permission.
  107299. + *
  107300. + *
  107301. + * ALTERNATIVELY, this software may be distributed under the terms of the
  107302. + * GNU General Public License ("GPL") as published by the Free Software
  107303. + * Foundation, either version 2 of that License or (at your option) any
  107304. + * later version.
  107305. + *
  107306. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  107307. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  107308. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  107309. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  107310. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  107311. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  107312. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  107313. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  107314. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  107315. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  107316. + */
  107317. +
  107318. +
  107319. +#ifndef LNXWRP_SYSFS_FM_H_
  107320. +#define LNXWRP_SYSFS_FM_H_
  107321. +
  107322. +#include "lnxwrp_sysfs.h"
  107323. +
  107324. +int fm_sysfs_create(struct device *dev);
  107325. +void fm_sysfs_destroy(struct device *dev);
  107326. +int fm_dump_regs(void *h_dev, char *buf, int nn);
  107327. +int fm_fpm_dump_regs(void *h_dev, char *buf, int nn);
  107328. +int fm_kg_dump_regs(void *h_pcd, char *buf, int nn);
  107329. +int fm_kg_pe_dump_regs(void *h_pcd, char *buf, int nn);
  107330. +int fm_dump_scheme(void *h_pcd, int scnum, char *buf, int nn);
  107331. +int fm_dump_tnum_dbg(void *h_fm, int tn_s, int tn_e, char *buf, int nn);
  107332. +int fm_dump_cls_plan(void *h_pcd, int cpn, char *buf, int nn);
  107333. +int fm_plcr_dump_regs(void *h_pcd, char *buf, int nn);
  107334. +int fm_prs_dump_regs(void *h_pcd, char *buf, int nn);
  107335. +int fm_profile_dump_regs(void *h_pcd, int ppnum, char *buf, int nn);
  107336. +
  107337. +#define FM_DMP_PGSZ_ERR { \
  107338. + snprintf(&buf[PAGE_SIZE - 80], 70, \
  107339. + "\n Err: current sysfs buffer reached PAGE_SIZE\n");\
  107340. + n = PAGE_SIZE - 2; \
  107341. + }
  107342. +
  107343. +#define FM_DMP_LN(buf, n, ...) \
  107344. + do { \
  107345. + int k, m = n; \
  107346. + m += k = snprintf(&buf[m], PAGE_SIZE - m, __VA_ARGS__); \
  107347. + if (k < 0 || m > PAGE_SIZE - 90) \
  107348. + FM_DMP_PGSZ_ERR \
  107349. + n = m; \
  107350. + } while (0)
  107351. +
  107352. +#define FM_DMP_TITLE(buf, n, addr, ...) \
  107353. + do { \
  107354. + int k, m = n; \
  107355. + m += k = snprintf(&buf[m], PAGE_SIZE - m, "\n"); \
  107356. + if (k < 0 || m > PAGE_SIZE - 90) \
  107357. + FM_DMP_PGSZ_ERR \
  107358. + m += k = snprintf(&buf[m], PAGE_SIZE - m, __VA_ARGS__); \
  107359. + if (k < 0 || m > PAGE_SIZE - 90) \
  107360. + FM_DMP_PGSZ_ERR \
  107361. + if (addr) { \
  107362. + phys_addr_t pa; \
  107363. + pa = virt_to_phys(addr); \
  107364. + m += k = \
  107365. + snprintf(&buf[m], PAGE_SIZE - m, " (0x%lX)", \
  107366. + (long unsigned int)(pa)); \
  107367. + if (k < 0 || m > PAGE_SIZE - 90) \
  107368. + FM_DMP_PGSZ_ERR \
  107369. + } \
  107370. + m += k = snprintf(&buf[m], PAGE_SIZE - m, \
  107371. + "\n----------------------------------------\n\n"); \
  107372. + if (k < 0 || m > PAGE_SIZE - 90) \
  107373. + FM_DMP_PGSZ_ERR \
  107374. + n = m; \
  107375. + } while (0)
  107376. +
  107377. +#define FM_DMP_SUBTITLE(buf, n, ...) \
  107378. + do { \
  107379. + int k, m = n; \
  107380. + m += k = snprintf(&buf[m], PAGE_SIZE - m, "------- "); \
  107381. + if (k < 0 || m > PAGE_SIZE - 90) \
  107382. + FM_DMP_PGSZ_ERR \
  107383. + m += k = snprintf(&buf[m], PAGE_SIZE - m, __VA_ARGS__); \
  107384. + if (k < 0 || m > PAGE_SIZE - 90) \
  107385. + FM_DMP_PGSZ_ERR \
  107386. + m += k = snprintf(&buf[m], PAGE_SIZE - m, "\n"); \
  107387. + if (k < 0 || m > PAGE_SIZE - 90) \
  107388. + FM_DMP_PGSZ_ERR \
  107389. + n = m; \
  107390. + } while (0)
  107391. +
  107392. +#define FM_DMP_MEM_32(buf, n, addr) \
  107393. + { \
  107394. + uint32_t val; \
  107395. + phys_addr_t pa; \
  107396. + int k, m = n; \
  107397. + pa = virt_to_phys(addr); \
  107398. + val = ioread32be((addr)); \
  107399. + do { \
  107400. + m += k = snprintf(&buf[m], \
  107401. + PAGE_SIZE - m, "0x%010llX: 0x%08x\n", \
  107402. + pa, val); \
  107403. + if (k < 0 || m > PAGE_SIZE - 90) \
  107404. + FM_DMP_PGSZ_ERR \
  107405. + n += k; \
  107406. + } while (0) ;\
  107407. + }
  107408. +
  107409. +#define FM_DMP_V32(buf, n, st, phrase) \
  107410. + do { \
  107411. + int k, m = n; \
  107412. + phys_addr_t pa = virt_to_phys(&((st)->phrase)); \
  107413. + k = snprintf(&buf[m], PAGE_SIZE - m, \
  107414. + "0x%010llX: 0x%08x%8s\t%s\n", (unsigned long long) pa, \
  107415. + ioread32be((uint32_t *)&((st)->phrase)), "", #phrase); \
  107416. + if (k < 0 || m > PAGE_SIZE - 90) \
  107417. + FM_DMP_PGSZ_ERR \
  107418. + n += k; \
  107419. + } while (0)
  107420. +
  107421. +#endif /* LNXWRP_SYSFS_FM_H_ */
  107422. --- /dev/null
  107423. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.c
  107424. @@ -0,0 +1,1255 @@
  107425. +/*
  107426. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  107427. + *
  107428. + * Redistribution and use in source and binary forms, with or without
  107429. + * modification, are permitted provided that the following conditions are met:
  107430. + * * Redistributions of source code must retain the above copyright
  107431. + * notice, this list of conditions and the following disclaimer.
  107432. + * * Redistributions in binary form must reproduce the above copyright
  107433. + * notice, this list of conditions and the following disclaimer in the
  107434. + * documentation and/or other materials provided with the distribution.
  107435. + * * Neither the name of Freescale Semiconductor nor the
  107436. + * names of its contributors may be used to endorse or promote products
  107437. + * derived from this software without specific prior written permission.
  107438. + *
  107439. + *
  107440. + * ALTERNATIVELY, this software may be distributed under the terms of the
  107441. + * GNU General Public License ("GPL") as published by the Free Software
  107442. + * Foundation, either version 2 of that License or (at your option) any
  107443. + * later version.
  107444. + *
  107445. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  107446. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  107447. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  107448. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  107449. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  107450. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  107451. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  107452. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  107453. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  107454. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  107455. + */
  107456. +
  107457. +#include "lnxwrp_sysfs.h"
  107458. +#include "lnxwrp_fm.h"
  107459. +#include "debug_ext.h"
  107460. +#include "lnxwrp_sysfs_fm_port.h"
  107461. +#include "lnxwrp_sysfs_fm.h"
  107462. +
  107463. +#include "../../sdk_fman/Peripherals/FM/Port/fm_port.h"
  107464. +#include "../../sdk_fman/Peripherals/FM/Port/fm_port_dsar.h"
  107465. +
  107466. +#if defined(__ERR_MODULE__)
  107467. +#undef __ERR_MODULE__
  107468. +#endif
  107469. +
  107470. +#include "../../sdk_fman/Peripherals/FM/fm.h"
  107471. +
  107472. +static const struct sysfs_stats_t portSysfsStats[] = {
  107473. + /* RX/TX/OH common statistics */
  107474. + {
  107475. + .stat_name = "port_frame",
  107476. + .stat_counter = e_FM_PORT_COUNTERS_FRAME,
  107477. + },
  107478. + {
  107479. + .stat_name = "port_discard_frame",
  107480. + .stat_counter = e_FM_PORT_COUNTERS_DISCARD_FRAME,
  107481. + },
  107482. + {
  107483. + .stat_name = "port_dealloc_buf",
  107484. + .stat_counter = e_FM_PORT_COUNTERS_DEALLOC_BUF,
  107485. + },
  107486. + {
  107487. + .stat_name = "port_enq_total",
  107488. + .stat_counter = e_FM_PORT_COUNTERS_ENQ_TOTAL,
  107489. + },
  107490. + /* TX/OH */
  107491. + {
  107492. + .stat_name = "port_length_err",
  107493. + .stat_counter = e_FM_PORT_COUNTERS_LENGTH_ERR,
  107494. + },
  107495. + {
  107496. + .stat_name = "port_unsupprted_format",
  107497. + .stat_counter = e_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT,
  107498. + },
  107499. + {
  107500. + .stat_name = "port_deq_total",
  107501. + .stat_counter = e_FM_PORT_COUNTERS_DEQ_TOTAL,
  107502. + },
  107503. + {
  107504. + .stat_name = "port_deq_from_default",
  107505. + .stat_counter = e_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT,
  107506. + },
  107507. + {
  107508. + .stat_name = "port_deq_confirm",
  107509. + .stat_counter = e_FM_PORT_COUNTERS_DEQ_CONFIRM,
  107510. + },
  107511. + /* RX/OH */
  107512. + {
  107513. + .stat_name = "port_rx_bad_frame",
  107514. + .stat_counter = e_FM_PORT_COUNTERS_RX_BAD_FRAME,
  107515. + },
  107516. + {
  107517. + .stat_name = "port_rx_large_frame",
  107518. + .stat_counter = e_FM_PORT_COUNTERS_RX_LARGE_FRAME,
  107519. + },
  107520. + {
  107521. + .stat_name = "port_rx_out_of_buffers_discard",
  107522. + .stat_counter = e_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD,
  107523. + },
  107524. + {
  107525. + .stat_name = "port_rx_filter_frame",
  107526. + .stat_counter = e_FM_PORT_COUNTERS_RX_FILTER_FRAME,
  107527. + },
  107528. + /* TODO: Particular statistics for OH ports */
  107529. + {}
  107530. +};
  107531. +
  107532. +static ssize_t show_fm_port_stats(struct device *dev,
  107533. + struct device_attribute *attr, char *buf)
  107534. +{
  107535. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
  107536. + t_LnxWrpFmDev *p_LnxWrpFmDev;
  107537. + unsigned long flags;
  107538. + int n = 0;
  107539. + uint8_t counter = 0;
  107540. +
  107541. + if (attr == NULL || buf == NULL || dev == NULL)
  107542. + return -EINVAL;
  107543. +
  107544. + p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  107545. + if (WARN_ON(p_LnxWrpFmPortDev == NULL))
  107546. + return -EINVAL;
  107547. +
  107548. + p_LnxWrpFmDev = (t_LnxWrpFmDev *) p_LnxWrpFmPortDev->h_LnxWrpFmDev;
  107549. + if (WARN_ON(p_LnxWrpFmDev == NULL))
  107550. + return -EINVAL;
  107551. +
  107552. + if (!p_LnxWrpFmDev->active || !p_LnxWrpFmDev->h_Dev)
  107553. + return -EIO;
  107554. +
  107555. + if (!p_LnxWrpFmPortDev->h_Dev) {
  107556. + n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
  107557. + return n;
  107558. + }
  107559. +
  107560. + counter = fm_find_statistic_counter_by_name(
  107561. + attr->attr.name,
  107562. + portSysfsStats, NULL);
  107563. +
  107564. + if (counter == e_FM_PORT_COUNTERS_RX_LIST_DMA_ERR) {
  107565. + uint32_t fmRev = 0;
  107566. + fmRev = 0xffff &
  107567. + ioread32(UINT_TO_PTR(p_LnxWrpFmDev->fmBaseAddr +
  107568. + 0x000c30c4));
  107569. +
  107570. + if (fmRev == 0x0100) {
  107571. + local_irq_save(flags);
  107572. + n = snprintf(buf, PAGE_SIZE,
  107573. + "counter not available for revision 1\n");
  107574. + local_irq_restore(flags);
  107575. + }
  107576. + return n;
  107577. + }
  107578. +
  107579. + local_irq_save(flags);
  107580. + n = snprintf(buf, PAGE_SIZE, "\t%s counter: %u\n",
  107581. + p_LnxWrpFmPortDev->name,
  107582. + FM_PORT_GetCounter(p_LnxWrpFmPortDev->h_Dev,
  107583. + (e_FmPortCounters) counter));
  107584. + local_irq_restore(flags);
  107585. +
  107586. + return n;
  107587. +}
  107588. +
  107589. +/* FM PORT RX/TX/OH statistics */
  107590. +static DEVICE_ATTR(port_frame, S_IRUGO, show_fm_port_stats, NULL);
  107591. +static DEVICE_ATTR(port_discard_frame, S_IRUGO, show_fm_port_stats, NULL);
  107592. +static DEVICE_ATTR(port_dealloc_buf, S_IRUGO, show_fm_port_stats, NULL);
  107593. +static DEVICE_ATTR(port_enq_total, S_IRUGO, show_fm_port_stats, NULL);
  107594. +/* FM PORT TX/OH statistics */
  107595. +static DEVICE_ATTR(port_length_err, S_IRUGO, show_fm_port_stats, NULL);
  107596. +static DEVICE_ATTR(port_unsupprted_format, S_IRUGO, show_fm_port_stats, NULL);
  107597. +static DEVICE_ATTR(port_deq_total, S_IRUGO, show_fm_port_stats, NULL);
  107598. +static DEVICE_ATTR(port_deq_from_default, S_IRUGO, show_fm_port_stats, NULL);
  107599. +static DEVICE_ATTR(port_deq_confirm, S_IRUGO, show_fm_port_stats, NULL);
  107600. +/* FM PORT RX/OH statistics */
  107601. +static DEVICE_ATTR(port_rx_bad_frame, S_IRUGO, show_fm_port_stats, NULL);
  107602. +static DEVICE_ATTR(port_rx_large_frame, S_IRUGO, show_fm_port_stats, NULL);
  107603. +static DEVICE_ATTR(port_rx_out_of_buffers_discard, S_IRUGO,
  107604. + show_fm_port_stats, NULL);
  107605. +static DEVICE_ATTR(port_rx_filter_frame, S_IRUGO, show_fm_port_stats, NULL);
  107606. +
  107607. +/* FM PORT TX statistics */
  107608. +static struct attribute *fm_tx_port_dev_stats_attributes[] = {
  107609. + &dev_attr_port_frame.attr,
  107610. + &dev_attr_port_discard_frame.attr,
  107611. + &dev_attr_port_dealloc_buf.attr,
  107612. + &dev_attr_port_enq_total.attr,
  107613. + &dev_attr_port_length_err.attr,
  107614. + &dev_attr_port_unsupprted_format.attr,
  107615. + &dev_attr_port_deq_total.attr,
  107616. + &dev_attr_port_deq_from_default.attr,
  107617. + &dev_attr_port_deq_confirm.attr,
  107618. + NULL
  107619. +};
  107620. +
  107621. +static const struct attribute_group fm_tx_port_dev_stats_attr_grp = {
  107622. + .name = "statistics",
  107623. + .attrs = fm_tx_port_dev_stats_attributes
  107624. +};
  107625. +
  107626. +/* FM PORT RX statistics */
  107627. +static struct attribute *fm_rx_port_dev_stats_attributes[] = {
  107628. + &dev_attr_port_frame.attr,
  107629. + &dev_attr_port_discard_frame.attr,
  107630. + &dev_attr_port_dealloc_buf.attr,
  107631. + &dev_attr_port_enq_total.attr,
  107632. + &dev_attr_port_rx_bad_frame.attr,
  107633. + &dev_attr_port_rx_large_frame.attr,
  107634. + &dev_attr_port_rx_out_of_buffers_discard.attr,
  107635. + &dev_attr_port_rx_filter_frame.attr,
  107636. + NULL
  107637. +};
  107638. +
  107639. +static const struct attribute_group fm_rx_port_dev_stats_attr_grp = {
  107640. + .name = "statistics",
  107641. + .attrs = fm_rx_port_dev_stats_attributes
  107642. +};
  107643. +
  107644. +/* TODO: add particular OH ports statistics */
  107645. +static struct attribute *fm_oh_port_dev_stats_attributes[] = {
  107646. + &dev_attr_port_frame.attr,
  107647. + &dev_attr_port_discard_frame.attr,
  107648. + &dev_attr_port_dealloc_buf.attr,
  107649. + &dev_attr_port_enq_total.attr,
  107650. + /*TX*/ &dev_attr_port_length_err.attr,
  107651. + &dev_attr_port_unsupprted_format.attr,
  107652. + &dev_attr_port_deq_total.attr,
  107653. + &dev_attr_port_deq_from_default.attr,
  107654. + &dev_attr_port_deq_confirm.attr,
  107655. + /* &dev_attr_port_rx_bad_frame.attr, */
  107656. + /* &dev_attr_port_rx_large_frame.attr, */
  107657. + &dev_attr_port_rx_out_of_buffers_discard.attr,
  107658. + /*&dev_attr_port_rx_filter_frame.attr, */
  107659. + NULL
  107660. +};
  107661. +
  107662. +static const struct attribute_group fm_oh_port_dev_stats_attr_grp = {
  107663. + .name = "statistics",
  107664. + .attrs = fm_oh_port_dev_stats_attributes
  107665. +};
  107666. +
  107667. +static ssize_t show_fm_port_regs(struct device *dev,
  107668. + struct device_attribute *attr, char *buf)
  107669. +{
  107670. + unsigned long flags;
  107671. + unsigned n = 0;
  107672. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  107673. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev =
  107674. + (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  107675. +#endif
  107676. + if (attr == NULL || buf == NULL || dev == NULL)
  107677. + return -EINVAL;
  107678. +
  107679. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  107680. + local_irq_save(flags);
  107681. +
  107682. + if (!p_LnxWrpFmPortDev->h_Dev) {
  107683. + n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
  107684. + return n;
  107685. + } else {
  107686. + n = snprintf(buf, PAGE_SIZE,
  107687. + "FM port driver registers dump.\n");
  107688. + n = fm_port_dump_regs(p_LnxWrpFmPortDev->h_Dev, buf, n);
  107689. + }
  107690. +
  107691. + local_irq_restore(flags);
  107692. +
  107693. + return n;
  107694. +#else
  107695. +
  107696. + local_irq_save(flags);
  107697. + n = snprintf(buf, PAGE_SIZE,
  107698. + "Debug level is too low to dump registers!!!\n");
  107699. + local_irq_restore(flags);
  107700. +
  107701. + return n;
  107702. +#endif
  107703. +}
  107704. +static int fm_port_dsar_dump_mem(void *h_dev, char *buf, int nn)
  107705. +{
  107706. + t_FmPort *p_FmPort;
  107707. + t_Fm *p_Fm;
  107708. + uint8_t hardwarePortId;
  107709. + uint32_t *param_page;
  107710. + t_ArCommonDesc *ArCommonDescPtr;
  107711. + uint32_t *mem;
  107712. + int i, n = nn;
  107713. +
  107714. + p_FmPort = (t_FmPort *)h_dev;
  107715. + hardwarePortId = p_FmPort->hardwarePortId;
  107716. + p_Fm = (t_Fm *)p_FmPort->h_Fm;
  107717. +
  107718. + if (!FM_PORT_IsInDsar(p_FmPort))
  107719. + {
  107720. + FM_DMP_LN(buf, n, "port %u is not a DSAR port\n",
  107721. + hardwarePortId);
  107722. + return n;
  107723. + }
  107724. + FM_DMP_LN(buf, n, "port %u DSAR mem\n", hardwarePortId);
  107725. + FM_DMP_LN(buf, n, "========================\n");
  107726. +
  107727. + /* do I need request_mem_region here? */
  107728. + param_page = ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(&p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr), 4);
  107729. + ArCommonDescPtr = (t_ArCommonDesc*)(ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(param_page), 300*4)); /* this should be changed*/
  107730. + mem = (uint32_t*)ArCommonDescPtr;
  107731. + for (i = 0; i < 300; i+=4)
  107732. + FM_DMP_LN(buf, n, "%08x: %08x %08x %08x %08x\n", i*4, mem[i], mem[i + 1], mem[i + 2], mem[i + 3]);
  107733. + iounmap(ArCommonDescPtr);
  107734. + iounmap(param_page);
  107735. + return n;
  107736. +}
  107737. +
  107738. +static int fm_port_dsar_dump_regs(void *h_dev, char *buf, int nn)
  107739. +{
  107740. + t_FmPort *p_FmPort;
  107741. + t_Fm *p_Fm;
  107742. + uint8_t hardwarePortId;
  107743. + uint32_t *param_page;
  107744. + t_ArCommonDesc *ArCommonDescPtr;
  107745. + int i, n = nn;
  107746. +
  107747. + p_FmPort = (t_FmPort *)h_dev;
  107748. + hardwarePortId = p_FmPort->hardwarePortId;
  107749. + p_Fm = (t_Fm *)p_FmPort->h_Fm;
  107750. +
  107751. + if (!FM_PORT_IsInDsar(p_FmPort))
  107752. + {
  107753. + FM_DMP_LN(buf, n, "port %u is not a DSAR port\n",
  107754. + hardwarePortId);
  107755. + return n;
  107756. + }
  107757. + FM_DMP_LN(buf, n, "port %u DSAR information\n", hardwarePortId);
  107758. + FM_DMP_LN(buf, n, "========================\n");
  107759. +
  107760. + /* do I need request_mem_region here? */
  107761. + param_page = ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(&p_FmPort->p_FmPortBmiRegs->rxPortBmiRegs.fmbm_rgpr), 4);
  107762. + ArCommonDescPtr = (t_ArCommonDesc*)(ioremap(p_FmPort->fmMuramPhysBaseAddr + ioread32be(param_page), sizeof(t_ArCommonDesc))); /* this should be changed*/
  107763. + FM_DMP_LN(buf, n, "Tx port: 0x%x\n", ArCommonDescPtr->arTxPort);
  107764. + FM_DMP_LN(buf, n, "Active HPNIA: 0x%08x\n", ArCommonDescPtr->activeHPNIA);
  107765. + FM_DMP_LN(buf, n, "Snmp port: 0x%x\n", ArCommonDescPtr->snmpPort);
  107766. + FM_DMP_LN(buf, n, "MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n", ArCommonDescPtr->macStationAddr[0],
  107767. + ArCommonDescPtr->macStationAddr[1], ArCommonDescPtr->macStationAddr[2],
  107768. + ArCommonDescPtr->macStationAddr[3], ArCommonDescPtr->macStationAddr[4],
  107769. + ArCommonDescPtr->macStationAddr[5]);
  107770. + FM_DMP_LN(buf, n, "filterControl: 0x%02x\n", ArCommonDescPtr->filterControl);
  107771. + FM_DMP_LN(buf, n, "tcpControlPass: 0x%04x\n", ArCommonDescPtr->tcpControlPass);
  107772. + FM_DMP_LN(buf, n, "ipProtocolTblSize: 0x%x\n", ArCommonDescPtr->ipProtocolTblSize);
  107773. + FM_DMP_LN(buf, n, "udpPortTblSize: 0x%x\n", ArCommonDescPtr->udpPortTblSize);
  107774. + FM_DMP_LN(buf, n, "tcpPortTblSize: 0x%x\n", ArCommonDescPtr->tcpPortTblSize);
  107775. + if (ArCommonDescPtr->p_ArStats)
  107776. + {
  107777. + t_ArStatistics *arStatistics = (t_ArStatistics*)
  107778. + ioremap(ioread32be(&ArCommonDescPtr->p_ArStats) +
  107779. + p_FmPort->fmMuramPhysBaseAddr,
  107780. + sizeof (t_ArStatistics));
  107781. + FM_DMP_LN(buf, n, "\nDSAR statistics\n");
  107782. + FM_DMP_LN(buf, n, "DSAR_Discarded: 0x%x\n", arStatistics->dsarDiscarded);
  107783. + FM_DMP_LN(buf, n, "DSAR_Err_Discarded: 0x%x\n", arStatistics->dsarErrDiscarded);
  107784. + FM_DMP_LN(buf, n, "DSAR_Frag_Discarded: 0x%x\n", arStatistics->dsarFragDiscarded);
  107785. + FM_DMP_LN(buf, n, "DSAR_Tunnel_Discarded: 0x%x\n", arStatistics->dsarTunnelDiscarded);
  107786. + FM_DMP_LN(buf, n, "DSAR_ARP_Discarded: 0x%x\n", arStatistics->dsarArpDiscarded);
  107787. + FM_DMP_LN(buf, n, "DSAR_IP_Discarded: 0x%x\n", arStatistics->dsarIpDiscarded);
  107788. + FM_DMP_LN(buf, n, "DSAR_TCP_Discarded: 0x%x\n", arStatistics->dsarTcpDiscarded);
  107789. + FM_DMP_LN(buf, n, "DSAR_UDP_Discarded: 0x%x\n", arStatistics->dsarUdpDiscarded);
  107790. + FM_DMP_LN(buf, n, "DSAR_ICMPv6_Checksum_Err: 0x%x\n", arStatistics->dsarIcmpV6ChecksumErr);
  107791. + FM_DMP_LN(buf, n, "DSAR_ICMPv6_Other_Type: 0x%x\n", arStatistics->dsarIcmpV6OtherType);
  107792. + FM_DMP_LN(buf, n, "DSAR_ICMPv4_Other_Type: 0x%x\n", arStatistics->dsarIcmpV4OtherType);
  107793. +
  107794. + iounmap(arStatistics);
  107795. + }
  107796. + if (ArCommonDescPtr->p_ArpDescriptor)
  107797. + {
  107798. + t_DsarArpDescriptor* ArpDescriptor = (t_DsarArpDescriptor*)
  107799. + ioremap(ioread32be(&ArCommonDescPtr->p_ArpDescriptor) +
  107800. + p_FmPort->fmMuramPhysBaseAddr,
  107801. + sizeof (t_DsarArpDescriptor));
  107802. + FM_DMP_LN(buf, n, "\nARP\n");
  107803. + FM_DMP_LN(buf, n, "===\n");
  107804. + FM_DMP_LN(buf, n, "control bits 0x%04x\n", ArpDescriptor->control);
  107805. + if (ArpDescriptor->numOfBindings)
  107806. + {
  107807. + char ip_str[100];
  107808. + t_DsarArpBindingEntry* bindings = ioremap(
  107809. + ioread32be(&ArpDescriptor->p_Bindings) +
  107810. + p_FmPort->fmMuramPhysBaseAddr,
  107811. + ArpDescriptor->numOfBindings *
  107812. + sizeof(t_DsarArpBindingEntry));
  107813. + uint8_t* ip_addr = (uint8_t*)&bindings->ipv4Addr;
  107814. + FM_DMP_LN(buf, n, " ip vlan id\n");
  107815. + for (i = 0; i < ArpDescriptor->numOfBindings; i++)
  107816. + {
  107817. + n += snprintf(ip_str, 100, "%d.%d.%d.%d",
  107818. + ip_addr[0], ip_addr[1],
  107819. + ip_addr[2], ip_addr[3]);
  107820. + FM_DMP_LN(buf, n, "%-15s 0x%x\n",
  107821. + ip_str, bindings->vlanId);
  107822. + }
  107823. + iounmap(bindings);
  107824. + }
  107825. + if (ArpDescriptor->p_Statistics)
  107826. + {
  107827. + t_DsarArpStatistics* arpStats = ioremap(
  107828. + ioread32be(&ArpDescriptor->p_Statistics) +
  107829. + p_FmPort->fmMuramPhysBaseAddr,
  107830. + sizeof(t_DsarArpStatistics));
  107831. + FM_DMP_LN(buf, n, "statistics\n");
  107832. + FM_DMP_LN(buf, n, "INVAL_CNT: 0x%x\n", arpStats->invalCnt);
  107833. + FM_DMP_LN(buf, n, "ECHO_CNT: 0x%x\n", arpStats->echoCnt);
  107834. + FM_DMP_LN(buf, n, "CD_CNT: 0x%x\n", arpStats->cdCnt);
  107835. + FM_DMP_LN(buf, n, "AR_CNT: 0x%x\n", arpStats->arCnt);
  107836. + FM_DMP_LN(buf, n, "RATM_CNT: 0x%x\n", arpStats->ratmCnt);
  107837. + FM_DMP_LN(buf, n, "UKOP_CNT: 0x%x\n", arpStats->ukopCnt);
  107838. + FM_DMP_LN(buf, n, "NMTP_CNT: 0x%x\n", arpStats->nmtpCnt);
  107839. + FM_DMP_LN(buf, n, "NMVLAN_CNT: 0x%x\n", arpStats->nmVlanCnt);
  107840. + iounmap(arpStats);
  107841. + }
  107842. +
  107843. + iounmap(ArpDescriptor);
  107844. + }
  107845. + if (ArCommonDescPtr->p_IcmpV4Descriptor)
  107846. + {
  107847. + t_DsarIcmpV4Descriptor* ICMPV4Descriptor =
  107848. + (t_DsarIcmpV4Descriptor*)ioremap(ioread32be(
  107849. + &ArCommonDescPtr->p_IcmpV4Descriptor) +
  107850. + p_FmPort->fmMuramPhysBaseAddr,
  107851. + sizeof (t_DsarIcmpV4Descriptor));
  107852. + FM_DMP_LN(buf, n, "\nEcho ICMPv4\n");
  107853. + FM_DMP_LN(buf, n, "===========\n");
  107854. + FM_DMP_LN(buf, n, "control bits 0x%04x\n", ICMPV4Descriptor->control);
  107855. + if (ICMPV4Descriptor->numOfBindings)
  107856. + {
  107857. + char ip_str[100];
  107858. + t_DsarArpBindingEntry* bindings = ioremap(
  107859. + ioread32be(&ICMPV4Descriptor->p_Bindings) +
  107860. + p_FmPort->fmMuramPhysBaseAddr,
  107861. + ICMPV4Descriptor->numOfBindings *
  107862. + sizeof(t_DsarArpBindingEntry));
  107863. + uint8_t* ip_addr = (uint8_t*)&bindings->ipv4Addr;
  107864. + FM_DMP_LN(buf, n, " ip vlan id\n");
  107865. + for (i = 0; i < ICMPV4Descriptor->numOfBindings; i++)
  107866. + {
  107867. + n += snprintf(ip_str, 100, "%d.%d.%d.%d",
  107868. + ip_addr[0], ip_addr[1],
  107869. + ip_addr[2], ip_addr[3]);
  107870. + FM_DMP_LN(buf, n, "%-15s 0x%x\n",
  107871. + ip_str, bindings->vlanId);
  107872. + }
  107873. + iounmap(bindings);
  107874. + }
  107875. + if (ICMPV4Descriptor->p_Statistics)
  107876. + {
  107877. + t_DsarIcmpV4Statistics* icmpv4Stats = ioremap(
  107878. + ioread32be(&ICMPV4Descriptor->p_Statistics) +
  107879. + p_FmPort->fmMuramPhysBaseAddr,
  107880. + sizeof(t_DsarIcmpV4Statistics));
  107881. + FM_DMP_LN(buf, n, "statistics\n");
  107882. + FM_DMP_LN(buf, n, "INVAL_CNT: 0x%x\n", icmpv4Stats->invalCnt);
  107883. + FM_DMP_LN(buf, n, "NMVLAN_CNT: 0x%x\n", icmpv4Stats->nmVlanCnt);
  107884. + FM_DMP_LN(buf, n, "NMIP_CNT: 0x%x\n", icmpv4Stats->nmIpCnt);
  107885. + FM_DMP_LN(buf, n, "AR_CNT: 0x%x\n", icmpv4Stats->arCnt);
  107886. + FM_DMP_LN(buf, n, "CSERR_CNT: 0x%x\n", icmpv4Stats->cserrCnt);
  107887. + iounmap(icmpv4Stats);
  107888. + }
  107889. + iounmap(ICMPV4Descriptor);
  107890. + }
  107891. + if (ArCommonDescPtr->p_NdDescriptor)
  107892. + {
  107893. + t_DsarNdDescriptor *NDDescriptor =
  107894. + (t_DsarNdDescriptor*)ioremap(ioread32be(
  107895. + &ArCommonDescPtr->p_NdDescriptor) + p_FmPort->
  107896. + fmMuramPhysBaseAddr, sizeof (t_DsarNdDescriptor));
  107897. + FM_DMP_LN(buf, n, "\nNDP\n");
  107898. + FM_DMP_LN(buf, n, "===\n");
  107899. + FM_DMP_LN(buf, n, "control bits 0x%04x\n", NDDescriptor->control);
  107900. + FM_DMP_LN(buf, n, "solicited address 0x%08x\n", NDDescriptor->solicitedAddr);
  107901. + if (NDDescriptor->numOfBindings)
  107902. + {
  107903. + char ip_str[100];
  107904. + t_DsarIcmpV6BindingEntry* bindings = ioremap(
  107905. + ioread32be(&NDDescriptor->p_Bindings) +
  107906. + p_FmPort->fmMuramPhysBaseAddr,
  107907. + NDDescriptor->numOfBindings *
  107908. + sizeof(t_DsarIcmpV6BindingEntry));
  107909. + uint16_t* ip_addr = (uint16_t*)&bindings->ipv6Addr;
  107910. + FM_DMP_LN(buf, n, " ip vlan id\n");
  107911. + for (i = 0; i < NDDescriptor->numOfBindings; i++)
  107912. + {
  107913. + n += snprintf(ip_str, 100,
  107914. + "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x",
  107915. + ip_addr[0], ip_addr[1], ip_addr[2], ip_addr[3],
  107916. + ip_addr[4], ip_addr[5], ip_addr[6], ip_addr[7]);
  107917. + FM_DMP_LN(buf, n, "%s 0x%x\n", ip_str, bindings->vlanId);
  107918. + }
  107919. + iounmap(bindings);
  107920. + }
  107921. + if (NDDescriptor->p_Statistics)
  107922. + {
  107923. + t_NdStatistics* ndStats = ioremap(
  107924. + ioread32be(&NDDescriptor->p_Statistics) +
  107925. + p_FmPort->fmMuramPhysBaseAddr,
  107926. + sizeof(t_NdStatistics));
  107927. + FM_DMP_LN(buf, n, "statistics\n");
  107928. + FM_DMP_LN(buf, n, "INVAL_CNT: 0x%x\n", ndStats->invalCnt);
  107929. + FM_DMP_LN(buf, n, "NMVLAN_CNT: 0x%x\n", ndStats->nmVlanCnt);
  107930. + FM_DMP_LN(buf, n, "NMIP_CNT: 0x%x\n", ndStats->nmIpCnt);
  107931. + FM_DMP_LN(buf, n, "AR_CNT: 0x%x\n", ndStats->arCnt);
  107932. + FM_DMP_LN(buf, n, "USADVERT_CNT: 0x%x\n", ndStats->usadvertCnt);
  107933. + FM_DMP_LN(buf, n, "NMMCAST_CNT: 0x%x\n", ndStats->nmmcastCnt);
  107934. + FM_DMP_LN(buf, n, "NSLLA_CNT: 0x%x\n", ndStats->nsllaCnt);
  107935. + iounmap(ndStats);
  107936. + }
  107937. + iounmap(NDDescriptor);
  107938. + }
  107939. + if (ArCommonDescPtr->p_IcmpV6Descriptor)
  107940. + {
  107941. + t_DsarIcmpV6Descriptor *ICMPV6Descriptor =
  107942. + (t_DsarIcmpV6Descriptor*)ioremap(ioread32be(
  107943. + &ArCommonDescPtr->p_IcmpV6Descriptor) + p_FmPort->
  107944. + fmMuramPhysBaseAddr, sizeof (t_DsarIcmpV6Descriptor));
  107945. + FM_DMP_LN(buf, n, "\nEcho ICMPv6\n");
  107946. + FM_DMP_LN(buf, n, "===========\n");
  107947. + FM_DMP_LN(buf, n, "control bits 0x%04x\n", ICMPV6Descriptor->control);
  107948. + if (ICMPV6Descriptor->numOfBindings)
  107949. + {
  107950. + char ip_str[100];
  107951. + t_DsarIcmpV6BindingEntry* bindings = ioremap(
  107952. + ioread32be(&ICMPV6Descriptor->p_Bindings) +
  107953. + p_FmPort->fmMuramPhysBaseAddr,
  107954. + ICMPV6Descriptor->numOfBindings *
  107955. + sizeof(t_DsarIcmpV6BindingEntry));
  107956. + uint16_t* ip_addr = (uint16_t*)&bindings->ipv6Addr;
  107957. + FM_DMP_LN(buf, n, " ip vlan id\n");
  107958. + for (i = 0; i < ICMPV6Descriptor->numOfBindings; i++)
  107959. + {
  107960. + n += snprintf(ip_str, 100,
  107961. + "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x",
  107962. + ip_addr[0], ip_addr[1], ip_addr[2], ip_addr[3],
  107963. + ip_addr[4], ip_addr[5], ip_addr[6], ip_addr[7]);
  107964. + FM_DMP_LN(buf, n, "%s 0x%x\n", ip_str, bindings->vlanId);
  107965. + }
  107966. + iounmap(bindings);
  107967. + }
  107968. + if (ICMPV6Descriptor->p_Statistics)
  107969. + {
  107970. + t_DsarIcmpV6Statistics* icmpv6Stats = ioremap(
  107971. + ioread32be(&ICMPV6Descriptor->p_Statistics) +
  107972. + p_FmPort->fmMuramPhysBaseAddr,
  107973. + sizeof(t_DsarIcmpV6Statistics));
  107974. + FM_DMP_LN(buf, n, "statistics\n");
  107975. + FM_DMP_LN(buf, n, "INVAL_CNT: 0x%x\n", icmpv6Stats->invalCnt);
  107976. + FM_DMP_LN(buf, n, "NMVLAN_CNT: 0x%x\n", icmpv6Stats->nmVlanCnt);
  107977. + FM_DMP_LN(buf, n, "NMIP_CNT: 0x%x\n", icmpv6Stats->nmIpCnt);
  107978. + FM_DMP_LN(buf, n, "AR_CNT: 0x%x\n", icmpv6Stats->arCnt);
  107979. + iounmap(icmpv6Stats);
  107980. + }
  107981. + iounmap(ICMPV6Descriptor);
  107982. + }
  107983. + if (ArCommonDescPtr->p_SnmpDescriptor)
  107984. + {
  107985. + t_DsarSnmpDescriptor *SnmpDescriptor =
  107986. + (t_DsarSnmpDescriptor*)ioremap(ioread32be(
  107987. + &ArCommonDescPtr->p_SnmpDescriptor) + p_FmPort->
  107988. + fmMuramPhysBaseAddr, sizeof (t_DsarSnmpDescriptor));
  107989. + FM_DMP_LN(buf, n, "\nSNMP\n");
  107990. + FM_DMP_LN(buf, n, "===========\n");
  107991. + FM_DMP_LN(buf, n, "control bits 0x%04x\n", SnmpDescriptor->control);
  107992. + FM_DMP_LN(buf, n, "max message length 0x%04x\n", SnmpDescriptor->maxSnmpMsgLength);
  107993. + if (SnmpDescriptor->numOfIpv4Addresses)
  107994. + {
  107995. + char ip_str[100];
  107996. + t_DsarSnmpIpv4AddrTblEntry* addrs = ioremap(
  107997. + ioread32be(&SnmpDescriptor->p_Ipv4AddrTbl) +
  107998. + p_FmPort->fmMuramPhysBaseAddr,
  107999. + SnmpDescriptor->numOfIpv4Addresses *
  108000. + sizeof(t_DsarSnmpIpv4AddrTblEntry));
  108001. + uint8_t* ip_addr = (uint8_t*)&addrs->ipv4Addr;
  108002. + FM_DMP_LN(buf, n, " ip vlan id\n");
  108003. + for (i = 0; i < SnmpDescriptor->numOfIpv4Addresses; i++)
  108004. + {
  108005. + n += snprintf(ip_str, 100, "%d.%d.%d.%d",
  108006. + ip_addr[0], ip_addr[1],
  108007. + ip_addr[2], ip_addr[3]);
  108008. + FM_DMP_LN(buf, n, "%-15s 0x%x\n", ip_str, addrs->vlanId);
  108009. + }
  108010. + iounmap(addrs);
  108011. + }
  108012. + if (SnmpDescriptor->p_Statistics)
  108013. + {
  108014. + t_DsarSnmpStatistics* snmpStats = ioremap(
  108015. + ioread32be(&SnmpDescriptor->p_Statistics) +
  108016. + p_FmPort->fmMuramPhysBaseAddr,
  108017. + sizeof(t_DsarSnmpStatistics));
  108018. + FM_DMP_LN(buf, n, "statistics\n");
  108019. + FM_DMP_LN(buf, n, "snmpErrCnt: 0x%x\n", snmpStats->snmpErrCnt);
  108020. + FM_DMP_LN(buf, n, "snmpCommunityErrCnt: 0x%x\n", snmpStats->snmpCommunityErrCnt);
  108021. + FM_DMP_LN(buf, n, "snmpTotalDiscardCnt: 0x%x\n", snmpStats->snmpTotalDiscardCnt);
  108022. + FM_DMP_LN(buf, n, "snmpGetReqCnt: 0x%x\n", snmpStats->snmpGetReqCnt);
  108023. + FM_DMP_LN(buf, n, "snmpGetNextReqCnt: 0x%x\n", snmpStats->snmpGetNextReqCnt);
  108024. + iounmap(snmpStats);
  108025. + }
  108026. + iounmap(SnmpDescriptor);
  108027. + }
  108028. + iounmap(ArCommonDescPtr);
  108029. + iounmap(param_page);
  108030. + return n;
  108031. +}
  108032. +
  108033. +static ssize_t show_fm_port_dsar_mem(struct device *dev,
  108034. + struct device_attribute *attr, char *buf)
  108035. +{
  108036. + unsigned long flags;
  108037. + unsigned n = 0;
  108038. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108039. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev =
  108040. + (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  108041. +#endif
  108042. + if (attr == NULL || buf == NULL || dev == NULL)
  108043. + return -EINVAL;
  108044. +
  108045. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108046. + local_irq_save(flags);
  108047. +
  108048. + if (!p_LnxWrpFmPortDev->h_Dev) {
  108049. + n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
  108050. + return n;
  108051. + } else {
  108052. + n = snprintf(buf, PAGE_SIZE,
  108053. + "FM port driver registers dump.\n");
  108054. + n = fm_port_dsar_dump_mem(p_LnxWrpFmPortDev->h_Dev, buf, n);
  108055. + }
  108056. +
  108057. + local_irq_restore(flags);
  108058. +
  108059. + return n;
  108060. +#else
  108061. +
  108062. + local_irq_save(flags);
  108063. + n = snprintf(buf, PAGE_SIZE,
  108064. + "Debug level is too low to dump registers!!!\n");
  108065. + local_irq_restore(flags);
  108066. +
  108067. + return n;
  108068. +#endif
  108069. +}
  108070. +
  108071. +static ssize_t show_fm_port_dsar_regs(struct device *dev,
  108072. + struct device_attribute *attr, char *buf)
  108073. +{
  108074. + unsigned long flags;
  108075. + unsigned n = 0;
  108076. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108077. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev =
  108078. + (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  108079. +#endif
  108080. + if (attr == NULL || buf == NULL || dev == NULL)
  108081. + return -EINVAL;
  108082. +
  108083. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108084. + local_irq_save(flags);
  108085. +
  108086. + if (!p_LnxWrpFmPortDev->h_Dev) {
  108087. + n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
  108088. + return n;
  108089. + } else {
  108090. + n = snprintf(buf, PAGE_SIZE,
  108091. + "FM port driver registers dump.\n");
  108092. + n = fm_port_dsar_dump_regs(p_LnxWrpFmPortDev->h_Dev, buf, n);
  108093. + }
  108094. +
  108095. + local_irq_restore(flags);
  108096. +
  108097. + return n;
  108098. +#else
  108099. +
  108100. + local_irq_save(flags);
  108101. + n = snprintf(buf, PAGE_SIZE,
  108102. + "Debug level is too low to dump registers!!!\n");
  108103. + local_irq_restore(flags);
  108104. +
  108105. + return n;
  108106. +#endif
  108107. +}
  108108. +
  108109. +#if (DPAA_VERSION >= 11)
  108110. +static ssize_t show_fm_port_ipv4_options(struct device *dev,
  108111. + struct device_attribute *attr, char *buf)
  108112. +{
  108113. + unsigned long flags;
  108114. + unsigned n = 0;
  108115. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108116. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev =
  108117. + (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  108118. +#endif
  108119. +
  108120. + if (attr == NULL || buf == NULL || dev == NULL)
  108121. + return -EINVAL;
  108122. +
  108123. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108124. + local_irq_save(flags);
  108125. +
  108126. + if (!p_LnxWrpFmPortDev->h_Dev) {
  108127. + n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
  108128. + return n;
  108129. + } else if (((t_FmPort *)p_LnxWrpFmPortDev->h_Dev)->p_ParamsPage
  108130. + == NULL) {
  108131. + n = snprintf(buf, PAGE_SIZE,
  108132. + "\tPort: FMan-controller params page not set\n");
  108133. + return n;
  108134. + } else {
  108135. + n = snprintf(buf, PAGE_SIZE,
  108136. + "Counter for fragmented pkt with IP header options\n");
  108137. + n = fm_port_dump_ipv4_opt(p_LnxWrpFmPortDev->h_Dev, buf, n);
  108138. + }
  108139. +
  108140. + local_irq_restore(flags);
  108141. +
  108142. + return n;
  108143. +#else
  108144. +
  108145. + local_irq_save(flags);
  108146. + n = snprintf(buf, PAGE_SIZE,
  108147. + "Debug level is too low to dump registers!!!\n");
  108148. + local_irq_restore(flags);
  108149. +
  108150. + return n;
  108151. +#endif
  108152. +}
  108153. +
  108154. +#endif
  108155. +
  108156. +static ssize_t show_fm_port_bmi_regs(struct device *dev,
  108157. + struct device_attribute *attr, char *buf)
  108158. +{
  108159. + unsigned long flags;
  108160. + unsigned n = 0;
  108161. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108162. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev =
  108163. + (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  108164. +#endif
  108165. +
  108166. + if (attr == NULL || buf == NULL || dev == NULL)
  108167. + return -EINVAL;
  108168. +
  108169. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108170. + local_irq_save(flags);
  108171. +
  108172. + if (!p_LnxWrpFmPortDev->h_Dev) {
  108173. + n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
  108174. + return n;
  108175. + } else {
  108176. + n = snprintf(buf, PAGE_SIZE,
  108177. + "FM port driver registers dump.\n");
  108178. + n = fm_port_dump_regs_bmi(p_LnxWrpFmPortDev->h_Dev, buf, n);
  108179. + }
  108180. +
  108181. + local_irq_restore(flags);
  108182. +
  108183. + return n;
  108184. +#else
  108185. +
  108186. + local_irq_save(flags);
  108187. + n = snprintf(buf, PAGE_SIZE,
  108188. + "Debug level is too low to dump registers!!!\n");
  108189. + local_irq_restore(flags);
  108190. +
  108191. + return n;
  108192. +#endif
  108193. +}
  108194. +
  108195. +static ssize_t show_fm_port_qmi_regs(struct device *dev,
  108196. + struct device_attribute *attr, char *buf)
  108197. +{
  108198. + unsigned long flags;
  108199. + unsigned n = 0;
  108200. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108201. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev =
  108202. + (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  108203. +#endif
  108204. +
  108205. + if (attr == NULL || buf == NULL || dev == NULL)
  108206. + return -EINVAL;
  108207. +
  108208. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  108209. + local_irq_save(flags);
  108210. +
  108211. + if (!p_LnxWrpFmPortDev->h_Dev) {
  108212. + n = snprintf(buf, PAGE_SIZE, "\tFM Port not configured...\n");
  108213. + return n;
  108214. + } else {
  108215. + n = snprintf(buf, PAGE_SIZE,
  108216. + "FM port driver registers dump.\n");
  108217. + n = fm_port_dump_regs_qmi(p_LnxWrpFmPortDev->h_Dev, buf, n);
  108218. + }
  108219. +
  108220. + local_irq_restore(flags);
  108221. +
  108222. + return n;
  108223. +#else
  108224. +
  108225. + local_irq_save(flags);
  108226. + n = snprintf(buf, PAGE_SIZE,
  108227. + "Debug level is too low to dump registers!!!\n");
  108228. + local_irq_restore(flags);
  108229. +
  108230. + return n;
  108231. +#endif
  108232. +}
  108233. +
  108234. +static DEVICE_ATTR(fm_port_regs, S_IRUGO | S_IRUSR, show_fm_port_regs, NULL);
  108235. +static DEVICE_ATTR(fm_port_qmi_regs, S_IRUGO | S_IRUSR, show_fm_port_qmi_regs, NULL);
  108236. +static DEVICE_ATTR(fm_port_bmi_regs, S_IRUGO | S_IRUSR, show_fm_port_bmi_regs, NULL);
  108237. +#if (DPAA_VERSION >= 11)
  108238. +static DEVICE_ATTR(fm_port_ipv4_opt, S_IRUGO | S_IRUSR, show_fm_port_ipv4_options, NULL);
  108239. +#endif
  108240. +static DEVICE_ATTR(fm_port_dsar_regs, S_IRUGO | S_IRUSR, show_fm_port_dsar_regs, NULL);
  108241. +static DEVICE_ATTR(fm_port_dsar_mem, S_IRUGO | S_IRUSR, show_fm_port_dsar_mem, NULL);
  108242. +
  108243. +int fm_port_sysfs_create(struct device *dev)
  108244. +{
  108245. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev;
  108246. +
  108247. + if (dev == NULL)
  108248. + return -EINVAL;
  108249. +
  108250. + p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  108251. + if (WARN_ON(p_LnxWrpFmPortDev == NULL))
  108252. + return -EINVAL;
  108253. +
  108254. + /* store to remove them when module is disabled */
  108255. + p_LnxWrpFmPortDev->dev_attr_regs = &dev_attr_fm_port_regs;
  108256. + p_LnxWrpFmPortDev->dev_attr_qmi_regs = &dev_attr_fm_port_qmi_regs;
  108257. + p_LnxWrpFmPortDev->dev_attr_bmi_regs = &dev_attr_fm_port_bmi_regs;
  108258. +#if (DPAA_VERSION >= 11)
  108259. + p_LnxWrpFmPortDev->dev_attr_ipv4_opt = &dev_attr_fm_port_ipv4_opt;
  108260. +#endif
  108261. + p_LnxWrpFmPortDev->dev_attr_dsar_regs = &dev_attr_fm_port_dsar_regs;
  108262. + p_LnxWrpFmPortDev->dev_attr_dsar_mem = &dev_attr_fm_port_dsar_mem;
  108263. + /* Registers dump entry - in future will be moved to debugfs */
  108264. + if (device_create_file(dev, &dev_attr_fm_port_regs) != 0)
  108265. + return -EIO;
  108266. + if (device_create_file(dev, &dev_attr_fm_port_qmi_regs) != 0)
  108267. + return -EIO;
  108268. + if (device_create_file(dev, &dev_attr_fm_port_bmi_regs) != 0)
  108269. + return -EIO;
  108270. +#if (DPAA_VERSION >= 11)
  108271. + if (device_create_file(dev, &dev_attr_fm_port_ipv4_opt) != 0)
  108272. + return -EIO;
  108273. +#endif
  108274. + if (device_create_file(dev, &dev_attr_fm_port_dsar_regs) != 0)
  108275. + return -EIO;
  108276. + if (device_create_file(dev, &dev_attr_fm_port_dsar_mem) != 0)
  108277. + return -EIO;
  108278. +
  108279. + /* FM Ports statistics */
  108280. + switch (p_LnxWrpFmPortDev->settings.param.portType) {
  108281. + case e_FM_PORT_TYPE_TX:
  108282. + case e_FM_PORT_TYPE_TX_10G:
  108283. + if (sysfs_create_group
  108284. + (&dev->kobj, &fm_tx_port_dev_stats_attr_grp) != 0)
  108285. + return -EIO;
  108286. + break;
  108287. + case e_FM_PORT_TYPE_RX:
  108288. + case e_FM_PORT_TYPE_RX_10G:
  108289. + if (sysfs_create_group
  108290. + (&dev->kobj, &fm_rx_port_dev_stats_attr_grp) != 0)
  108291. + return -EIO;
  108292. + break;
  108293. + case e_FM_PORT_TYPE_DUMMY:
  108294. + case e_FM_PORT_TYPE_OH_OFFLINE_PARSING:
  108295. + if (sysfs_create_group
  108296. + (&dev->kobj, &fm_oh_port_dev_stats_attr_grp) != 0)
  108297. + return -EIO;
  108298. + break;
  108299. + default:
  108300. + WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
  108301. + __func__);
  108302. + return -EINVAL;
  108303. + break;
  108304. + };
  108305. +
  108306. + return 0;
  108307. +}
  108308. +
  108309. +void fm_port_sysfs_destroy(struct device *dev)
  108310. +{
  108311. + t_LnxWrpFmPortDev *p_LnxWrpFmPortDev = NULL;
  108312. +
  108313. + /* this function has never been tested !!! */
  108314. +
  108315. + if (WARN_ON(dev == NULL))
  108316. + return;
  108317. +
  108318. + p_LnxWrpFmPortDev = (t_LnxWrpFmPortDev *) dev_get_drvdata(dev);
  108319. + if (WARN_ON(p_LnxWrpFmPortDev == NULL))
  108320. + return;
  108321. +
  108322. + /* The name attribute will be freed also by these 2 functions? */
  108323. + switch (p_LnxWrpFmPortDev->settings.param.portType) {
  108324. + case e_FM_PORT_TYPE_TX:
  108325. + case e_FM_PORT_TYPE_TX_10G:
  108326. + sysfs_remove_group(&dev->kobj, &fm_tx_port_dev_stats_attr_grp);
  108327. + break;
  108328. + case e_FM_PORT_TYPE_RX:
  108329. + case e_FM_PORT_TYPE_RX_10G:
  108330. + sysfs_remove_group(&dev->kobj, &fm_rx_port_dev_stats_attr_grp);
  108331. + break;
  108332. + case e_FM_PORT_TYPE_DUMMY:
  108333. + case e_FM_PORT_TYPE_OH_OFFLINE_PARSING:
  108334. + sysfs_remove_group(&dev->kobj, &fm_oh_port_dev_stats_attr_grp);
  108335. + break;
  108336. + default:
  108337. + WARN(1, "FMD: failure at %s:%d/%s()!\n", __FILE__, __LINE__,
  108338. + __func__);
  108339. + break;
  108340. + };
  108341. +
  108342. + device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_regs);
  108343. + device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_qmi_regs);
  108344. + device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_bmi_regs);
  108345. +#if (DPAA_VERSION >= 11)
  108346. + device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_ipv4_opt);
  108347. +#endif
  108348. + device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_dsar_regs);
  108349. + device_remove_file(dev, p_LnxWrpFmPortDev->dev_attr_dsar_mem);
  108350. +}
  108351. +
  108352. +
  108353. +int fm_port_dump_regs(void *h_dev, char *buf, int nn)
  108354. +{
  108355. + t_FmPort *p_FmPort;
  108356. + t_Fm *p_Fm;
  108357. + uint8_t hardwarePortId;
  108358. + int n = nn;
  108359. +
  108360. + p_FmPort = (t_FmPort *)h_dev;
  108361. + hardwarePortId = p_FmPort->hardwarePortId;
  108362. + p_Fm = (t_Fm *)p_FmPort->h_Fm;
  108363. +
  108364. + FM_DMP_TITLE(buf, n, &p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId - 1],
  108365. + "fmbm_pp for port %u", hardwarePortId);
  108366. + FM_DMP_MEM_32(buf, n,
  108367. + &p_Fm->p_FmBmiRegs->fmbm_pp[hardwarePortId - 1]);
  108368. +
  108369. + FM_DMP_TITLE(buf, n, &p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId - 1],
  108370. + "fmbm_pfs for port %u", hardwarePortId);
  108371. + FM_DMP_MEM_32(buf, n,
  108372. + &p_Fm->p_FmBmiRegs->fmbm_pfs[hardwarePortId - 1]);
  108373. +
  108374. + FM_DMP_TITLE(buf, n,
  108375. + &p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId - 1],
  108376. + "fmbm_spliodn for port %u", hardwarePortId);
  108377. + FM_DMP_MEM_32(buf, n,
  108378. + &p_Fm->p_FmBmiRegs->fmbm_spliodn[hardwarePortId - 1]);
  108379. +
  108380. + FM_DMP_TITLE(buf, n, &p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId],
  108381. + "fmfp_psfor port %u", hardwarePortId);
  108382. + FM_DMP_MEM_32(buf, n, &p_Fm->p_FmFpmRegs->fmfp_ps[hardwarePortId]);
  108383. +
  108384. + FM_DMP_TITLE(buf, n, &p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId / 2],
  108385. + "fmdmplrfor port %u", hardwarePortId);
  108386. + FM_DMP_MEM_32(buf, n,
  108387. + &p_Fm->p_FmDmaRegs->fmdmplr[hardwarePortId / 2]);
  108388. + return n;
  108389. +}
  108390. +
  108391. +#if (DPAA_VERSION >= 11)
  108392. +
  108393. +int fm_port_dump_ipv4_opt(void *h_dev, char *buf, int nn)
  108394. +{
  108395. + t_FmPort *p_FmPort;
  108396. + int n = nn;
  108397. +
  108398. + p_FmPort = (t_FmPort *)h_dev;
  108399. +
  108400. + FM_DMP_V32(buf, n, p_FmPort->p_ParamsPage, ipfOptionsCounter);
  108401. +
  108402. + FM_DMP_SUBTITLE(buf, n, "\n");
  108403. +
  108404. + return n;
  108405. +}
  108406. +#endif
  108407. +
  108408. +int fm_port_dump_regs_bmi(void *h_dev, char *buf, int nn)
  108409. +{
  108410. + t_FmPort *p_FmPort;
  108411. + u_FmPortBmiRegs *p_bmi;
  108412. +
  108413. + char arr[20];
  108414. + uint8_t flag;
  108415. + int i = 0;
  108416. + int n = nn;
  108417. +
  108418. + p_FmPort = (t_FmPort *)h_dev;
  108419. + p_bmi = p_FmPort->p_FmPortBmiRegs;
  108420. +
  108421. + memset(arr, 0, sizeof(arr));
  108422. + switch (p_FmPort->portType) {
  108423. + case (e_FM_PORT_TYPE_OH_OFFLINE_PARSING):
  108424. + strcpy(arr, "OFFLINE-PARSING");
  108425. + flag = 0;
  108426. + break;
  108427. + case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
  108428. + strcpy(arr, "HOST-COMMAND");
  108429. + flag = 0;
  108430. + break;
  108431. + case (e_FM_PORT_TYPE_RX):
  108432. + strcpy(arr, "RX");
  108433. + flag = 1;
  108434. + break;
  108435. + case (e_FM_PORT_TYPE_RX_10G):
  108436. + strcpy(arr, "RX-10G");
  108437. + flag = 1;
  108438. + break;
  108439. + case (e_FM_PORT_TYPE_TX):
  108440. + strcpy(arr, "TX");
  108441. + flag = 2;
  108442. + break;
  108443. + case (e_FM_PORT_TYPE_TX_10G):
  108444. + strcpy(arr, "TX-10G");
  108445. + flag = 2;
  108446. + break;
  108447. + default:
  108448. + return -EINVAL;
  108449. + }
  108450. +
  108451. + FM_DMP_TITLE(buf, n, NULL,
  108452. + "FMan-Port (%s #%d) registers:",
  108453. + arr, p_FmPort->portId);
  108454. +
  108455. + FM_DMP_TITLE(buf, n, p_bmi, "Bmi Port Regs");
  108456. +
  108457. + switch (flag) {
  108458. + case (0):
  108459. + FM_DMP_SUBTITLE(buf, n, "\n");
  108460. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ocfg);
  108461. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ost);
  108462. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oda);
  108463. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oicp);
  108464. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofdne);
  108465. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofne);
  108466. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofca);
  108467. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofpne);
  108468. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opso);
  108469. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opp);
  108470. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_occb);
  108471. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oim);
  108472. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofp);
  108473. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofed);
  108474. +
  108475. + FM_DMP_TITLE(buf, n,
  108476. + &(p_bmi->ohPortBmiRegs.fmbm_oprai), "fmbm_oprai");
  108477. + for (i = 0; i < FM_PORT_PRS_RESULT_NUM_OF_WORDS; ++i) {
  108478. + FM_DMP_MEM_32(buf, n,
  108479. + &(p_bmi->ohPortBmiRegs.fmbm_oprai[i]));
  108480. + }
  108481. + FM_DMP_SUBTITLE(buf, n, "\n");
  108482. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofqid);
  108483. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oefqid);
  108484. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofsdm);
  108485. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofsem);
  108486. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofene);
  108487. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_orlmts);
  108488. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_orlmt);
  108489. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ocmne);
  108490. + {
  108491. +#ifndef FM_NO_OP_OBSERVED_POOLS
  108492. + if (p_FmPort->fmRevInfo.majorRev == 4) {
  108493. + FM_DMP_TITLE(buf, n,
  108494. + &p_bmi->ohPortBmiRegs.fmbm_oebmpi,
  108495. + "fmbm_oebmpi");
  108496. +
  108497. + for (i = 0; i < FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS; ++i) {
  108498. + FM_DMP_MEM_32(buf, n,
  108499. + &(p_bmi->ohPortBmiRegs.fmbm_oebmpi[i]));
  108500. + }
  108501. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ocgm);
  108502. + }
  108503. +#endif /* !FM_NO_OP_OBSERVED_POOLS */
  108504. + }
  108505. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ostc);
  108506. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofrc);
  108507. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofdc);
  108508. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofledc);
  108509. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofufdc);
  108510. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_offc);
  108511. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofwdc);
  108512. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofldec);
  108513. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opc);
  108514. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_opcp);
  108515. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_occn);
  108516. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_otuc);
  108517. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_oduc);
  108518. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ofuc);
  108519. + FM_DMP_TITLE(buf, n, &(p_bmi->ohPortBmiRegs.fmbm_odcfg),
  108520. + "fmbm_odcfg");
  108521. + for (i = 0; i < 3; ++i) {
  108522. + FM_DMP_MEM_32(buf, n,
  108523. + &(p_bmi->ohPortBmiRegs.fmbm_odcfg[i]));
  108524. + }
  108525. + FM_DMP_SUBTITLE(buf, n, "\n");
  108526. +
  108527. + FM_DMP_V32(buf, n, &p_bmi->ohPortBmiRegs, fmbm_ogpr);
  108528. + break;
  108529. + case (1):
  108530. + FM_DMP_SUBTITLE(buf, n, "\n");
  108531. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rcfg);
  108532. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rst);
  108533. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rda);
  108534. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfp);
  108535. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_reth);
  108536. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfed);
  108537. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_ricp);
  108538. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rebm);
  108539. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfne);
  108540. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfca);
  108541. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfpne);
  108542. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpso);
  108543. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpp);
  108544. + FM_DMP_TITLE(buf, n, &(p_bmi->rxPortBmiRegs.fmbm_rprai),
  108545. + "fmbm_rprai");
  108546. + for (i = 0; i < FM_PORT_PRS_RESULT_NUM_OF_WORDS; ++i) {
  108547. + FM_DMP_MEM_32(buf, n,
  108548. + &(p_bmi->rxPortBmiRegs.fmbm_rprai[i]));
  108549. + }
  108550. + FM_DMP_SUBTITLE(buf, n, "\n");
  108551. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfqid);
  108552. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_refqid);
  108553. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfsdm);
  108554. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfsem);
  108555. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfene);
  108556. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rcmne);
  108557. + FM_DMP_TITLE(buf, n, &p_bmi->rxPortBmiRegs.fmbm_ebmpi,
  108558. + "fmbm_ebmpi");
  108559. + for (i = 0; i < FM_PORT_MAX_NUM_OF_EXT_POOLS; ++i) {
  108560. + FM_DMP_MEM_32(buf, n,
  108561. + &(p_bmi->rxPortBmiRegs.fmbm_ebmpi[i]));
  108562. + }
  108563. + FM_DMP_TITLE(buf, n, &p_bmi->rxPortBmiRegs.fmbm_acnt,
  108564. + "fmbm_acnt");
  108565. + for (i = 0; i < FM_PORT_MAX_NUM_OF_EXT_POOLS; ++i) {
  108566. + FM_DMP_MEM_32(buf, n,
  108567. + &(p_bmi->rxPortBmiRegs.fmbm_acnt[i]));
  108568. + }
  108569. + FM_DMP_TITLE(buf, n, &p_bmi->rxPortBmiRegs.fmbm_rcgm,
  108570. + "fmbm_rcgm");
  108571. + for (i = 0; i < FM_PORT_NUM_OF_CONGESTION_GRPS / 32; ++i) {
  108572. + FM_DMP_MEM_32(buf, n,
  108573. + &(p_bmi->rxPortBmiRegs.fmbm_rcgm[i]));
  108574. + }
  108575. +
  108576. + FM_DMP_SUBTITLE(buf, n, "\n");
  108577. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rmpd);
  108578. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rstc);
  108579. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfrc);
  108580. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfbc);
  108581. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rlfc);
  108582. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rffc);
  108583. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfcd);
  108584. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfldec);
  108585. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rodc);
  108586. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpc);
  108587. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpcp);
  108588. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rccn);
  108589. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rtuc);
  108590. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rrquc);
  108591. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rduc);
  108592. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rfuc);
  108593. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rpac);
  108594. + FM_DMP_TITLE(buf, n, &(p_bmi->rxPortBmiRegs.fmbm_rdcfg),
  108595. + "fmbm_rdcfg");
  108596. + for (i = 0; i < 3; ++i) {
  108597. + FM_DMP_MEM_32(buf, n,
  108598. + &(p_bmi->rxPortBmiRegs.fmbm_rdcfg[i]));
  108599. + }
  108600. + FM_DMP_SUBTITLE(buf, n, "\n");
  108601. + FM_DMP_V32(buf, n, &p_bmi->rxPortBmiRegs, fmbm_rgpr);
  108602. + break;
  108603. + case (2):
  108604. + FM_DMP_SUBTITLE(buf, n, "\n");
  108605. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tcfg);
  108606. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tst);
  108607. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tda);
  108608. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfp);
  108609. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfed);
  108610. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_ticp);
  108611. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfdne);
  108612. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfca);
  108613. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tcfqid);
  108614. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfeqid);
  108615. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfene);
  108616. +#if (DPAA_VERSION >= 11)
  108617. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfne);
  108618. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tcmne);
  108619. +#endif /* (DPAA_VERSION >= 11) */
  108620. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_trlmts);
  108621. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_trlmt);
  108622. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tstc);
  108623. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfrc);
  108624. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfdc);
  108625. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfledc);
  108626. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfufdc);
  108627. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tpc);
  108628. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tpcp);
  108629. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tccn);
  108630. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_ttuc);
  108631. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_ttcquc);
  108632. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tduc);
  108633. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tfuc);
  108634. + FM_DMP_TITLE(buf, n, &(p_bmi->txPortBmiRegs.fmbm_tdcfg),
  108635. + "fmbm_tdcfg");
  108636. + for (i = 0; i < 3 ; ++i) {
  108637. + FM_DMP_MEM_32(buf, n,
  108638. + &(p_bmi->txPortBmiRegs.fmbm_tdcfg[i]));
  108639. + }
  108640. + FM_DMP_SUBTITLE(buf, n, "\n");
  108641. + FM_DMP_V32(buf, n, &p_bmi->txPortBmiRegs, fmbm_tgpr);
  108642. + break;
  108643. + }
  108644. +
  108645. + FM_DMP_SUBTITLE(buf, n, "\n");
  108646. +
  108647. + return n;
  108648. +}
  108649. +
  108650. +int fm_port_dump_regs_qmi(void *h_dev, char *buf, int nn)
  108651. +{
  108652. + t_FmPort *p_FmPort;
  108653. + int n = nn;
  108654. +
  108655. + p_FmPort = (t_FmPort *)h_dev;
  108656. +
  108657. + FM_DMP_TITLE(buf, n, p_FmPort->p_FmPortQmiRegs, "Qmi Port Regs");
  108658. +
  108659. + FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnc);
  108660. + FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pns);
  108661. + FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnts);
  108662. + FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnen);
  108663. + FM_DMP_V32(buf, n, p_FmPort->p_FmPortQmiRegs, fmqm_pnetfc);
  108664. + FM_DMP_V32(buf, n,
  108665. + &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndn);
  108666. + FM_DMP_V32(buf, n,
  108667. + &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndc);
  108668. + FM_DMP_V32(buf, n,
  108669. + &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndtfc);
  108670. + FM_DMP_V32(buf, n,
  108671. + &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndfdc);
  108672. + FM_DMP_V32(buf, n,
  108673. + &p_FmPort->p_FmPortQmiRegs->nonRxQmiRegs, fmqm_pndcc);
  108674. +
  108675. + FM_DMP_SUBTITLE(buf, n, "\n");
  108676. +
  108677. + return n;
  108678. +}
  108679. +
  108680. --- /dev/null
  108681. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm_port.h
  108682. @@ -0,0 +1,56 @@
  108683. +/*
  108684. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  108685. + *
  108686. + * Redistribution and use in source and binary forms, with or without
  108687. + * modification, are permitted provided that the following conditions are met:
  108688. + * * Redistributions of source code must retain the above copyright
  108689. + * notice, this list of conditions and the following disclaimer.
  108690. + * * Redistributions in binary form must reproduce the above copyright
  108691. + * notice, this list of conditions and the following disclaimer in the
  108692. + * documentation and/or other materials provided with the distribution.
  108693. + * * Neither the name of Freescale Semiconductor nor the
  108694. + * names of its contributors may be used to endorse or promote products
  108695. + * derived from this software without specific prior written permission.
  108696. + *
  108697. + *
  108698. + * ALTERNATIVELY, this software may be distributed under the terms of the
  108699. + * GNU General Public License ("GPL") as published by the Free Software
  108700. + * Foundation, either version 2 of that License or (at your option) any
  108701. + * later version.
  108702. + *
  108703. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  108704. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  108705. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  108706. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  108707. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  108708. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  108709. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  108710. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  108711. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  108712. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  108713. + */
  108714. +
  108715. +/*
  108716. + @File lnxwrp_sysfs_fm_port.h
  108717. +
  108718. + @Description FM port sysfs functions.
  108719. +
  108720. +*/
  108721. +
  108722. +#ifndef LNXWRP_SYSFS_FM_PORT_H_
  108723. +#define LNXWRP_SYSFS_FM_PORT_H_
  108724. +
  108725. +#include "lnxwrp_sysfs.h"
  108726. +
  108727. +int fm_port_sysfs_create(struct device *dev);
  108728. +void fm_port_sysfs_destroy(struct device *dev);
  108729. +
  108730. +int fm_port_dump_regs(void *h_dev, char *buf, int n);
  108731. +int fm_port_dump_regs_bmi(void *h_dev, char *buf, int n);
  108732. +int fm_port_dump_regs_qmi(void *h_dev, char *buf, int n);
  108733. +
  108734. +#if (DPAA_VERSION >= 11)
  108735. +int fm_port_dump_ipv4_opt(void *h_dev, char *buf, int n);
  108736. +#endif
  108737. +
  108738. +#endif /* LNXWRP_SYSFS_FM_PORT_H_ */
  108739. --- /dev/null
  108740. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/Makefile
  108741. @@ -0,0 +1,18 @@
  108742. +#
  108743. +# Makefile for the Freescale Ethernet controllers
  108744. +#
  108745. +ccflags-y += -DVERSION=\"\"
  108746. +#
  108747. +#Include netcomm SW specific definitions
  108748. +include $(srctree)/drivers/net/ethernet/freescale/sdk_fman/ncsw_config.mk
  108749. +
  108750. +obj-y += fsl-ncsw-xx.o
  108751. +
  108752. +ifneq ($(CONFIG_FMAN_ARM),y)
  108753. +fsl-ncsw-xx-objs := xx_linux.o udivdi3.o \
  108754. + module_strings.o
  108755. +else
  108756. +fsl-ncsw-xx-objs := xx_arm_linux.o udivdi3.o \
  108757. + module_strings.o
  108758. +endif
  108759. +
  108760. --- /dev/null
  108761. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/module_strings.c
  108762. @@ -0,0 +1,45 @@
  108763. +/*
  108764. + * Copyright 2012 Freescale Semiconductor Inc.
  108765. + *
  108766. + * Redistribution and use in source and binary forms, with or without
  108767. + * modification, are permitted provided that the following conditions are met:
  108768. + * * Redistributions of source code must retain the above copyright
  108769. + * notice, this list of conditions and the following disclaimer.
  108770. + * * Redistributions in binary form must reproduce the above copyright
  108771. + * notice, this list of conditions and the following disclaimer in the
  108772. + * documentation and/or other materials provided with the distribution.
  108773. + * * Neither the name of Freescale Semiconductor nor the
  108774. + * names of its contributors may be used to endorse or promote products
  108775. + * derived from this software without specific prior written permission.
  108776. + *
  108777. + *
  108778. + * ALTERNATIVELY, this software may be distributed under the terms of the
  108779. + * GNU General Public License ("GPL") as published by the Free Software
  108780. + * Foundation, either version 2 of that License or (at your option) any
  108781. + * later version.
  108782. + *
  108783. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  108784. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  108785. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  108786. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  108787. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  108788. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  108789. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  108790. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  108791. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  108792. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  108793. + */
  108794. +
  108795. +/* Module names for debug messages */
  108796. +const char *moduleStrings[] =
  108797. +{
  108798. + "", /* MODULE_UNKNOWN */
  108799. + "FM", /* MODULE_FM */
  108800. + "FM-MURAM", /* MODULE_FM_MURAM */
  108801. + "FM-PCD", /* MODULE_FM_PCD */
  108802. + "FM-RTC", /* MODULE_FM_RTC */
  108803. + "FM-MAC", /* MODULE_FM_MAC */
  108804. + "FM-Port", /* MODULE_FM_PORT */
  108805. + "MM", /* MODULE_MM */
  108806. + "FM-SP" /* MODULE_FM_SP */
  108807. +};
  108808. --- /dev/null
  108809. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/udivdi3.c
  108810. @@ -0,0 +1,132 @@
  108811. +/*
  108812. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  108813. + *
  108814. + * Redistribution and use in source and binary forms, with or without
  108815. + * modification, are permitted provided that the following conditions are met:
  108816. + * * Redistributions of source code must retain the above copyright
  108817. + * notice, this list of conditions and the following disclaimer.
  108818. + * * Redistributions in binary form must reproduce the above copyright
  108819. + * notice, this list of conditions and the following disclaimer in the
  108820. + * documentation and/or other materials provided with the distribution.
  108821. + * * Neither the name of Freescale Semiconductor nor the
  108822. + * names of its contributors may be used to endorse or promote products
  108823. + * derived from this software without specific prior written permission.
  108824. + *
  108825. + *
  108826. + * ALTERNATIVELY, this software may be distributed under the terms of the
  108827. + * GNU General Public License ("GPL") as published by the Free Software
  108828. + * Foundation, either version 2 of that License or (at your option) any
  108829. + * later version.
  108830. + *
  108831. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  108832. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  108833. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  108834. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  108835. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  108836. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  108837. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  108838. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  108839. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  108840. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  108841. + */
  108842. +
  108843. +#include <linux/version.h>
  108844. +
  108845. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  108846. +#define MODVERSIONS
  108847. +#endif
  108848. +#ifdef MODVERSIONS
  108849. +#include <config/modversions.h>
  108850. +#endif /* MODVERSIONS */
  108851. +
  108852. +#include <linux/module.h>
  108853. +#include <linux/kernel.h>
  108854. +#include <asm/div64.h>
  108855. +
  108856. +
  108857. +#define BITS_PER_UNIT 8
  108858. +#define SI_TYPE_SIZE (sizeof (SItype) * BITS_PER_UNIT)
  108859. +
  108860. +
  108861. +typedef unsigned int UQItype __attribute__ ((mode (QI)));
  108862. +typedef int SItype __attribute__ ((mode (SI)));
  108863. +typedef unsigned int USItype __attribute__ ((mode (SI)));
  108864. +typedef int DItype __attribute__ ((mode (DI)));
  108865. +typedef int word_type __attribute__ ((mode (__word__)));
  108866. +typedef unsigned int UDItype __attribute__ ((mode (DI)));
  108867. +
  108868. +struct DIstruct {SItype low, high;};
  108869. +
  108870. +typedef union
  108871. +{
  108872. + struct DIstruct s;
  108873. + DItype ll;
  108874. +} DIunion;
  108875. +
  108876. +
  108877. +/* bit divisor, dividend and result. dynamic precision */
  108878. +static __inline__ uint64_t _div64_64(uint64_t dividend, uint64_t divisor)
  108879. +{
  108880. + uint32_t d = divisor;
  108881. +
  108882. + if (divisor > 0xffffffffULL)
  108883. + {
  108884. + unsigned int shift = fls(divisor >> 32);
  108885. +
  108886. + d = divisor >> shift;
  108887. + dividend >>= shift;
  108888. + }
  108889. +
  108890. + /* avoid 64 bit division if possible */
  108891. + if (dividend >> 32)
  108892. + do_div(dividend, d);
  108893. + else
  108894. + dividend = (uint32_t) dividend / d;
  108895. +
  108896. + return dividend;
  108897. +}
  108898. +
  108899. +UDItype __udivdi3 (UDItype n, UDItype d)
  108900. +{
  108901. + return _div64_64(n, d);
  108902. +}
  108903. +
  108904. +DItype __divdi3 (DItype n, DItype d)
  108905. +{
  108906. + DItype sign = 1;
  108907. + if (n<0)
  108908. + {
  108909. + sign *= -1;
  108910. + n *= -1;
  108911. + }
  108912. + if (d<0)
  108913. + {
  108914. + sign *= -1;
  108915. + d *= -1;
  108916. + }
  108917. + return sign*_div64_64((UDItype)n, (UDItype)d);
  108918. +}
  108919. +
  108920. +UDItype __umoddi3 (UDItype n, UDItype d)
  108921. +{
  108922. + return n-(_div64_64(n, d)*d);
  108923. +}
  108924. +
  108925. +#ifdef MODULE
  108926. +word_type __ucmpdi2 (DItype a, DItype b)
  108927. +{
  108928. + DIunion au, bu;
  108929. +
  108930. + au.ll = a, bu.ll = b;
  108931. +
  108932. + if ((USItype) au.s.high < (USItype) bu.s.high)
  108933. + return 0;
  108934. + else if ((USItype) au.s.high > (USItype) bu.s.high)
  108935. + return 2;
  108936. + if ((USItype) au.s.low < (USItype) bu.s.low)
  108937. + return 0;
  108938. + else if ((USItype) au.s.low > (USItype) bu.s.low)
  108939. + return 2;
  108940. + return 1;
  108941. +}
  108942. +#endif /* MODULE */
  108943. --- /dev/null
  108944. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_arm_linux.c
  108945. @@ -0,0 +1,905 @@
  108946. +/*
  108947. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  108948. + *
  108949. + * Redistribution and use in source and binary forms, with or without
  108950. + * modification, are permitted provided that the following conditions are met:
  108951. + * * Redistributions of source code must retain the above copyright
  108952. + * notice, this list of conditions and the following disclaimer.
  108953. + * * Redistributions in binary form must reproduce the above copyright
  108954. + * notice, this list of conditions and the following disclaimer in the
  108955. + * documentation and/or other materials provided with the distribution.
  108956. + * * Neither the name of Freescale Semiconductor nor the
  108957. + * names of its contributors may be used to endorse or promote products
  108958. + * derived from this software without specific prior written permission.
  108959. + *
  108960. + *
  108961. + * ALTERNATIVELY, this software may be distributed under the terms of the
  108962. + * GNU General Public License ("GPL") as published by the Free Software
  108963. + * Foundation, either version 2 of that License or (at your option) any
  108964. + * later version.
  108965. + *
  108966. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  108967. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  108968. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  108969. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  108970. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  108971. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  108972. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  108973. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  108974. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  108975. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  108976. + */
  108977. +
  108978. +/**************************************************************************//**
  108979. + @File xx_arm_linux.c
  108980. +
  108981. + @Description XX routines implementation for Linux.
  108982. +*//***************************************************************************/
  108983. +#include <linux/version.h>
  108984. +
  108985. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  108986. +#define MODVERSIONS
  108987. +#endif
  108988. +#ifdef MODVERSIONS
  108989. +#include <config/modversions.h>
  108990. +#endif /* MODVERSIONS */
  108991. +
  108992. +#include <linux/module.h>
  108993. +#include <linux/kernel.h>
  108994. +#include <linux/sched.h>
  108995. +#include <linux/string.h>
  108996. +#include <linux/ptrace.h>
  108997. +#include <linux/errno.h>
  108998. +#include <linux/ioport.h>
  108999. +#include <linux/slab.h>
  109000. +#include <linux/interrupt.h>
  109001. +#include <linux/fs.h>
  109002. +#include <linux/vmalloc.h>
  109003. +#include <linux/init.h>
  109004. +#include <linux/timer.h>
  109005. +#include <linux/spinlock.h>
  109006. +#include <linux/delay.h>
  109007. +#include <linux/proc_fs.h>
  109008. +#include <linux/smp.h>
  109009. +#include <linux/of.h>
  109010. +#include <linux/irqdomain.h>
  109011. +
  109012. +#include <linux/workqueue.h>
  109013. +
  109014. +#ifdef BIGPHYSAREA_ENABLE
  109015. +#include <linux/bigphysarea.h>
  109016. +#endif /* BIGPHYSAREA_ENABLE */
  109017. +
  109018. +//#include <sysdev/fsl_soc.h>
  109019. +#include <asm/pgtable.h>
  109020. +#include <asm/irq.h>
  109021. +#include <asm/bitops.h>
  109022. +#include <asm/uaccess.h>
  109023. +#include <asm/io.h>
  109024. +#include <asm/atomic.h>
  109025. +#include <asm/string.h>
  109026. +#include <asm/byteorder.h>
  109027. +#include <asm/page.h>
  109028. +
  109029. +#include "error_ext.h"
  109030. +#include "std_ext.h"
  109031. +#include "list_ext.h"
  109032. +#include "mm_ext.h"
  109033. +#include "sys_io_ext.h"
  109034. +#include "xx.h"
  109035. +
  109036. +
  109037. +#define __ERR_MODULE__ MODULE_UNKNOWN
  109038. +
  109039. +#ifdef BIGPHYSAREA_ENABLE
  109040. +#define MAX_ALLOCATION_SIZE 128 * 1024 /* Maximum size allocated with kmalloc is 128K */
  109041. +
  109042. +
  109043. +/* TODO: large allocations => use big phys area */
  109044. +/******************************************************************************
  109045. + * routine: get_nr_pages
  109046. + *
  109047. + * description:
  109048. + * calculates the number of memory pages for a given size (in bytes)
  109049. + *
  109050. + * arguments:
  109051. + * size - the number of bytes
  109052. + *
  109053. + * return code:
  109054. + * The number of pages
  109055. + *
  109056. + *****************************************************************************/
  109057. +static __inline__ uint32_t get_nr_pages (uint32_t size)
  109058. +{
  109059. + return (uint32_t)((size >> PAGE_SHIFT) + (size & PAGE_SHIFT ? 1 : 0));
  109060. +}
  109061. +
  109062. +static bool in_big_phys_area (uint32_t addr)
  109063. +{
  109064. + uint32_t base, size;
  109065. +
  109066. + bigphysarea_get_details (&base, &size);
  109067. + return ((addr >= base) && (addr < base + size));
  109068. +}
  109069. +#endif /* BIGPHYSAREA_ENABLE */
  109070. +
  109071. +void * xx_Malloc(uint32_t n)
  109072. +{
  109073. + void *a;
  109074. + uint32_t flags;
  109075. +
  109076. + flags = XX_DisableAllIntr();
  109077. +#ifdef BIGPHYSAREA_ENABLE
  109078. + if (n >= MAX_ALLOCATION_SIZE)
  109079. + a = (void*)bigphysarea_alloc_pages(get_nr_pages(n), 0, GFP_ATOMIC);
  109080. + else
  109081. +#endif /* BIGPHYSAREA_ENABLE */
  109082. + a = (void *)kmalloc((uint32_t)n, GFP_ATOMIC);
  109083. + if (!a)
  109084. + XX_Print("No memory for XX_Malloc\n");
  109085. + XX_RestoreAllIntr(flags);
  109086. +
  109087. + return a;
  109088. +}
  109089. +
  109090. +void xx_Free(void *p)
  109091. +{
  109092. +#ifdef BIGPHYSAREA_ENABLE
  109093. + if (in_big_phys_area ((uint32_t)p))
  109094. + bigphysarea_free_pages(p);
  109095. + else
  109096. +#endif /* BIGPHYSAREA_ENABLE */
  109097. + kfree(p);
  109098. +}
  109099. +
  109100. +void XX_Exit(int status)
  109101. +{
  109102. + WARN(1, "\n\nFMD: fatal error, driver can't go on!!!\n\n");
  109103. +}
  109104. +
  109105. +#define BUF_SIZE 512
  109106. +void XX_Print(char *str, ...)
  109107. +{
  109108. + va_list args;
  109109. +#ifdef CONFIG_SMP
  109110. + char buf[BUF_SIZE];
  109111. +#endif /* CONFIG_SMP */
  109112. +
  109113. + va_start(args, str);
  109114. +#ifdef CONFIG_SMP
  109115. + if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
  109116. + printk(KERN_WARNING "Illegal string to print!\n more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
  109117. + printk(KERN_CRIT "cpu %d: %s", raw_smp_processor_id(), buf);
  109118. +#else
  109119. + vprintk(str, args);
  109120. +#endif /* CONFIG_SMP */
  109121. + va_end(args);
  109122. +}
  109123. +
  109124. +void XX_Fprint(void *file, char *str, ...)
  109125. +{
  109126. + va_list args;
  109127. +#ifdef CONFIG_SMP
  109128. + char buf[BUF_SIZE];
  109129. +#endif /* CONFIG_SMP */
  109130. +
  109131. + va_start(args, str);
  109132. +#ifdef CONFIG_SMP
  109133. + if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
  109134. + printk(KERN_WARNING "Illegal string to print!\n more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
  109135. + printk (KERN_CRIT "cpu %d: %s", smp_processor_id(), buf);
  109136. +
  109137. +#else
  109138. + vprintk(str, args);
  109139. +#endif /* CONFIG_SMP */
  109140. + va_end(args);
  109141. +}
  109142. +
  109143. +#ifdef DEBUG_XX_MALLOC
  109144. +typedef void (*t_ffn)(void *);
  109145. +typedef struct {
  109146. + t_ffn f_free;
  109147. + void *mem;
  109148. + char *fname;
  109149. + int fline;
  109150. + uint32_t size;
  109151. + t_List node;
  109152. +} t_MemDebug;
  109153. +#define MEMDBG_OBJECT(p_List) LIST_OBJECT(p_List, t_MemDebug, node)
  109154. +
  109155. +LIST(memDbgLst);
  109156. +
  109157. +
  109158. +void * XX_MallocDebug(uint32_t size, char *fname, int line)
  109159. +{
  109160. + void *mem;
  109161. + t_MemDebug *p_MemDbg;
  109162. +
  109163. + p_MemDbg = (t_MemDebug *)xx_Malloc(sizeof(t_MemDebug));
  109164. + if (p_MemDbg == NULL)
  109165. + return NULL;
  109166. +
  109167. + mem = xx_Malloc(size);
  109168. + if (mem == NULL)
  109169. + {
  109170. + XX_Free(p_MemDbg);
  109171. + return NULL;
  109172. + }
  109173. +
  109174. + INIT_LIST(&p_MemDbg->node);
  109175. + p_MemDbg->f_free = xx_Free;
  109176. + p_MemDbg->mem = mem;
  109177. + p_MemDbg->fname = fname;
  109178. + p_MemDbg->fline = line;
  109179. + p_MemDbg->size = size+sizeof(t_MemDebug);
  109180. + LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
  109181. +
  109182. + return mem;
  109183. +}
  109184. +
  109185. +void * XX_MallocSmartDebug(uint32_t size,
  109186. + int memPartitionId,
  109187. + uint32_t align,
  109188. + char *fname,
  109189. + int line)
  109190. +{
  109191. + void *mem;
  109192. + t_MemDebug *p_MemDbg;
  109193. +
  109194. + p_MemDbg = (t_MemDebug *)XX_Malloc(sizeof(t_MemDebug));
  109195. + if (p_MemDbg == NULL)
  109196. + return NULL;
  109197. +
  109198. + mem = xx_MallocSmart((uint32_t)size, memPartitionId, align);
  109199. + if (mem == NULL)
  109200. + {
  109201. + XX_Free(p_MemDbg);
  109202. + return NULL;
  109203. + }
  109204. +
  109205. + INIT_LIST(&p_MemDbg->node);
  109206. + p_MemDbg->f_free = xx_FreeSmart;
  109207. + p_MemDbg->mem = mem;
  109208. + p_MemDbg->fname = fname;
  109209. + p_MemDbg->fline = line;
  109210. + p_MemDbg->size = size+sizeof(t_MemDebug);
  109211. + LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
  109212. +
  109213. + return mem;
  109214. +}
  109215. +
  109216. +static void debug_free(void *mem)
  109217. +{
  109218. + t_List *p_MemDbgLh = NULL;
  109219. + t_MemDebug *p_MemDbg;
  109220. + bool found = FALSE;
  109221. +
  109222. + if (LIST_IsEmpty(&memDbgLst))
  109223. + {
  109224. + REPORT_ERROR(MAJOR, E_ALREADY_FREE, ("Unbalanced free (0x%08x)", mem));
  109225. + return;
  109226. + }
  109227. +
  109228. + LIST_FOR_EACH(p_MemDbgLh, &memDbgLst)
  109229. + {
  109230. + p_MemDbg = MEMDBG_OBJECT(p_MemDbgLh);
  109231. + if (p_MemDbg->mem == mem)
  109232. + {
  109233. + found = TRUE;
  109234. + break;
  109235. + }
  109236. + }
  109237. +
  109238. + if (!found)
  109239. + {
  109240. + REPORT_ERROR(MAJOR, E_NOT_FOUND,
  109241. + ("Attempt to free unallocated address (0x%08x)",mem));
  109242. + dump_stack();
  109243. + return;
  109244. + }
  109245. +
  109246. + LIST_Del(p_MemDbgLh);
  109247. + p_MemDbg->f_free(mem);
  109248. + p_MemDbg->f_free(p_MemDbg);
  109249. +}
  109250. +
  109251. +void XX_FreeSmart(void *p)
  109252. +{
  109253. + debug_free(p);
  109254. +}
  109255. +
  109256. +
  109257. +void XX_Free(void *p)
  109258. +{
  109259. + debug_free(p);
  109260. +}
  109261. +
  109262. +#else /* not DEBUG_XX_MALLOC */
  109263. +void * XX_Malloc(uint32_t size)
  109264. +{
  109265. + return xx_Malloc(size);
  109266. +}
  109267. +
  109268. +void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
  109269. +{
  109270. + return xx_MallocSmart(size,memPartitionId, alignment);
  109271. +}
  109272. +
  109273. +void XX_FreeSmart(void *p)
  109274. +{
  109275. + xx_FreeSmart(p);
  109276. +}
  109277. +
  109278. +
  109279. +void XX_Free(void *p)
  109280. +{
  109281. + xx_Free(p);
  109282. +}
  109283. +#endif /* not DEBUG_XX_MALLOC */
  109284. +
  109285. +
  109286. +#if (defined(REPORT_EVENTS) && (REPORT_EVENTS > 0))
  109287. +void XX_EventById(uint32_t event, t_Handle appId, uint16_t flags, char *msg)
  109288. +{
  109289. + e_Event eventCode = (e_Event)event;
  109290. +
  109291. + UNUSED(eventCode);
  109292. + UNUSED(appId);
  109293. + UNUSED(flags);
  109294. + UNUSED(msg);
  109295. +}
  109296. +#endif /* (defined(REPORT_EVENTS) && ... */
  109297. +
  109298. +
  109299. +uint32_t XX_DisableAllIntr(void)
  109300. +{
  109301. + unsigned long flags;
  109302. +
  109303. +#ifdef local_irq_save_nort
  109304. + local_irq_save_nort(flags);
  109305. +#else
  109306. + local_irq_save(flags);
  109307. +#endif
  109308. +
  109309. + return (uint32_t)flags;
  109310. +}
  109311. +
  109312. +void XX_RestoreAllIntr(uint32_t flags)
  109313. +{
  109314. +#ifdef local_irq_restore_nort
  109315. + local_irq_restore_nort((unsigned long)flags);
  109316. +#else
  109317. + local_irq_restore((unsigned long)flags);
  109318. +#endif
  109319. +}
  109320. +
  109321. +t_Error XX_Call( uint32_t qid, t_Error (* f)(t_Handle), t_Handle id, t_Handle appId, uint16_t flags )
  109322. +{
  109323. + UNUSED(qid);
  109324. + UNUSED(appId);
  109325. + UNUSED(flags);
  109326. +
  109327. + return f(id);
  109328. +}
  109329. +
  109330. +int XX_IsICacheEnable(void)
  109331. +{
  109332. + return TRUE;
  109333. +}
  109334. +
  109335. +int XX_IsDCacheEnable(void)
  109336. +{
  109337. + return TRUE;
  109338. +}
  109339. +
  109340. +
  109341. +typedef struct {
  109342. + t_Isr *f_Isr;
  109343. + t_Handle handle;
  109344. +} t_InterruptHandler;
  109345. +
  109346. +
  109347. +t_Handle interruptHandlers[0x00010000];
  109348. +
  109349. +static irqreturn_t LinuxInterruptHandler (int irq, void *dev_id)
  109350. +{
  109351. + t_InterruptHandler *p_IntrHndl = (t_InterruptHandler *)dev_id;
  109352. + p_IntrHndl->f_Isr(p_IntrHndl->handle);
  109353. + return IRQ_HANDLED;
  109354. +}
  109355. +
  109356. +t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle)
  109357. +{
  109358. + const char *device;
  109359. + t_InterruptHandler *p_IntrHndl;
  109360. +
  109361. + device = GetDeviceName(irq);
  109362. + if (device == NULL)
  109363. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Interrupt source - %d", irq));
  109364. +
  109365. + p_IntrHndl = (t_InterruptHandler *)XX_Malloc(sizeof(t_InterruptHandler));
  109366. + if (p_IntrHndl == NULL)
  109367. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  109368. + p_IntrHndl->f_Isr = f_Isr;
  109369. + p_IntrHndl->handle = handle;
  109370. + interruptHandlers[irq] = p_IntrHndl;
  109371. +
  109372. + if (request_irq(GetDeviceIrqNum(irq), LinuxInterruptHandler, 0, device, p_IntrHndl) < 0)
  109373. + RETURN_ERROR(MAJOR, E_BUSY, ("Can't get IRQ %s\n", device));
  109374. + disable_irq(GetDeviceIrqNum(irq));
  109375. +
  109376. + return E_OK;
  109377. +}
  109378. +
  109379. +t_Error XX_FreeIntr(int irq)
  109380. +{
  109381. + t_InterruptHandler *p_IntrHndl = interruptHandlers[irq];
  109382. + free_irq(GetDeviceIrqNum(irq), p_IntrHndl);
  109383. + XX_Free(p_IntrHndl);
  109384. + interruptHandlers[irq] = 0;
  109385. + return E_OK;
  109386. +}
  109387. +
  109388. +t_Error XX_EnableIntr(int irq)
  109389. +{
  109390. + enable_irq(GetDeviceIrqNum(irq));
  109391. + return E_OK;
  109392. +}
  109393. +
  109394. +t_Error XX_DisableIntr(int irq)
  109395. +{
  109396. + disable_irq(GetDeviceIrqNum(irq));
  109397. + return E_OK;
  109398. +}
  109399. +
  109400. +
  109401. +/*****************************************************************************/
  109402. +/* Tasklet Service Routines */
  109403. +/*****************************************************************************/
  109404. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  109405. +typedef struct
  109406. +{
  109407. + t_Handle h_Data;
  109408. + void (*f_Callback) (void *);
  109409. + struct delayed_work dwork;
  109410. +} t_Tasklet;
  109411. +
  109412. +static void GenericTaskletCallback(struct work_struct *p_Work)
  109413. +{
  109414. + t_Tasklet *p_Task = container_of(p_Work, t_Tasklet, dwork.work);
  109415. +
  109416. + p_Task->f_Callback(p_Task->h_Data);
  109417. +}
  109418. +#endif /* LINUX_VERSION_CODE */
  109419. +
  109420. +
  109421. +t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data)
  109422. +{
  109423. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  109424. + struct work_struct *p_Task;
  109425. + p_Task = (struct work_struct *)XX_Malloc(sizeof(struct work_struct));
  109426. + INIT_WORK(p_Task, routine, data);
  109427. +#else
  109428. + t_Tasklet *p_Task = (t_Tasklet *)XX_Malloc(sizeof(t_Tasklet));
  109429. + p_Task->h_Data = data;
  109430. + p_Task->f_Callback = routine;
  109431. + INIT_DELAYED_WORK(&p_Task->dwork, GenericTaskletCallback);
  109432. +#endif /* LINUX_VERSION_CODE */
  109433. +
  109434. + return (t_TaskletHandle)p_Task;
  109435. +}
  109436. +
  109437. +
  109438. +void XX_FreeTasklet (t_TaskletHandle h_Tasklet)
  109439. +{
  109440. + if (h_Tasklet)
  109441. + XX_Free(h_Tasklet);
  109442. +}
  109443. +
  109444. +int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate)
  109445. +{
  109446. + int ans;
  109447. +
  109448. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  109449. + if (immediate)
  109450. + ans = schedule_work(h_Tasklet);
  109451. + else
  109452. + ans = schedule_delayed_work(h_Tasklet, 1);
  109453. +#else
  109454. + if (immediate)
  109455. + ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, 0);
  109456. + else
  109457. + ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, HZ);
  109458. +#endif /* LINUX_VERSION_CODE */
  109459. +
  109460. + return ans;
  109461. +}
  109462. +
  109463. +void XX_FlushScheduledTasks(void)
  109464. +{
  109465. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
  109466. + flush_scheduled_tasks();
  109467. +#else
  109468. + flush_scheduled_work();
  109469. +#endif /* LINUX_VERSION_CODE */
  109470. +}
  109471. +
  109472. +int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet)
  109473. +{
  109474. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  109475. + return (int)(((struct work_struct *)h_Tasklet)->pending);
  109476. +#else
  109477. + return (int)delayed_work_pending(&((t_Tasklet *)h_Tasklet)->dwork);
  109478. +#endif /* LINUX_VERSION_CODE */
  109479. +}
  109480. +
  109481. +void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data)
  109482. +{
  109483. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
  109484. + ((struct tq_struct *)h_Tasklet)->data = data;
  109485. +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  109486. + ((struct work_struct *)h_Tasklet)->data = data;
  109487. +#else
  109488. + ((t_Tasklet *)h_Tasklet)->h_Data = data;
  109489. +#endif /* LINUX_VERSION_CODE */
  109490. +}
  109491. +
  109492. +t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet)
  109493. +{
  109494. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  109495. + return (t_Handle)(((struct work_struct *)h_Tasklet)->data);
  109496. +#else
  109497. + return ((t_Tasklet *)h_Tasklet)->h_Data;
  109498. +#endif /* LINUX_VERSION_CODE */
  109499. +}
  109500. +
  109501. +
  109502. +/*****************************************************************************/
  109503. +/* Spinlock Service Routines */
  109504. +/*****************************************************************************/
  109505. +
  109506. +t_Handle XX_InitSpinlock(void)
  109507. +{
  109508. + spinlock_t *p_Spinlock = (spinlock_t *)XX_Malloc(sizeof(spinlock_t));
  109509. + if (!p_Spinlock)
  109510. + return NULL;
  109511. +
  109512. + spin_lock_init(p_Spinlock);
  109513. +
  109514. + return (t_Handle)p_Spinlock;
  109515. +}
  109516. +
  109517. +void XX_FreeSpinlock(t_Handle h_Spinlock)
  109518. +{
  109519. + if (h_Spinlock)
  109520. + XX_Free(h_Spinlock);
  109521. +}
  109522. +
  109523. +void XX_LockSpinlock(t_Handle h_Spinlock)
  109524. +{
  109525. + spin_lock((spinlock_t *)h_Spinlock);
  109526. +}
  109527. +
  109528. +void XX_UnlockSpinlock(t_Handle h_Spinlock)
  109529. +{
  109530. + spin_unlock((spinlock_t *)h_Spinlock);
  109531. +}
  109532. +
  109533. +uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock)
  109534. +{
  109535. + unsigned long intrFlags;
  109536. + spin_lock_irqsave((spinlock_t *)h_Spinlock, intrFlags);
  109537. + return intrFlags;
  109538. +}
  109539. +
  109540. +void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags)
  109541. +{
  109542. + spin_unlock_irqrestore((spinlock_t *)h_Spinlock, (unsigned long)intrFlags);
  109543. +}
  109544. +
  109545. +
  109546. +/*****************************************************************************/
  109547. +/* Timers Service Routines */
  109548. +/*****************************************************************************/
  109549. +/* The time now is in mili sec. resolution */
  109550. +uint32_t XX_CurrentTime(void)
  109551. +{
  109552. + return (jiffies*1000)/HZ;
  109553. +}
  109554. +
  109555. +
  109556. +t_Handle XX_CreateTimer(void)
  109557. +{
  109558. + struct timer_list *p_Timer = (struct timer_list *)XX_Malloc(sizeof(struct timer_list));
  109559. + if (p_Timer)
  109560. + {
  109561. + memset(p_Timer, 0, sizeof(struct timer_list));
  109562. + init_timer(p_Timer);
  109563. + }
  109564. + return (t_Handle)p_Timer;
  109565. +}
  109566. +
  109567. +void XX_FreeTimer(t_Handle h_Timer)
  109568. +{
  109569. + if (h_Timer)
  109570. + XX_Free(h_Timer);
  109571. +}
  109572. +
  109573. +void XX_StartTimer(t_Handle h_Timer,
  109574. + uint32_t msecs,
  109575. + bool periodic,
  109576. + void (*f_TimerExpired)(t_Handle),
  109577. + t_Handle h_Arg)
  109578. +{
  109579. + int tmp_jiffies = (msecs*HZ)/1000;
  109580. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  109581. +
  109582. + SANITY_CHECK_RETURN((periodic == FALSE), E_NOT_SUPPORTED);
  109583. +
  109584. + p_Timer->function = (void (*)(unsigned long))f_TimerExpired;
  109585. + p_Timer->data = (unsigned long)h_Arg;
  109586. + if ((msecs*HZ)%1000)
  109587. + tmp_jiffies++;
  109588. + p_Timer->expires = (jiffies + tmp_jiffies);
  109589. +
  109590. + add_timer((struct timer_list *)h_Timer);
  109591. +}
  109592. +
  109593. +void XX_SetTimerData(t_Handle h_Timer, t_Handle data)
  109594. +{
  109595. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  109596. +
  109597. + p_Timer->data = (unsigned long)data;
  109598. +}
  109599. +
  109600. +t_Handle XX_GetTimerData(t_Handle h_Timer)
  109601. +{
  109602. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  109603. +
  109604. + return (t_Handle)p_Timer->data;
  109605. +}
  109606. +
  109607. +uint32_t XX_GetExpirationTime(t_Handle h_Timer)
  109608. +{
  109609. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  109610. +
  109611. + return (uint32_t)p_Timer->expires;
  109612. +}
  109613. +
  109614. +void XX_StopTimer(t_Handle h_Timer)
  109615. +{
  109616. + del_timer((struct timer_list *)h_Timer);
  109617. +}
  109618. +
  109619. +void XX_ModTimer(t_Handle h_Timer, uint32_t msecs)
  109620. +{
  109621. + int tmp_jiffies = (msecs*HZ)/1000;
  109622. +
  109623. + if ((msecs*HZ)%1000)
  109624. + tmp_jiffies++;
  109625. + mod_timer((struct timer_list *)h_Timer, jiffies + tmp_jiffies);
  109626. +}
  109627. +
  109628. +int XX_TimerIsActive(t_Handle h_Timer)
  109629. +{
  109630. + return timer_pending((struct timer_list *)h_Timer);
  109631. +}
  109632. +
  109633. +uint32_t XX_Sleep(uint32_t msecs)
  109634. +{
  109635. + int tmp_jiffies = (msecs*HZ)/1000;
  109636. +
  109637. + if ((msecs*HZ)%1000)
  109638. + tmp_jiffies++;
  109639. + return schedule_timeout(tmp_jiffies);
  109640. +}
  109641. +
  109642. +/*BEWARE!!!!! UDelay routine is BUSY WAITTING!!!!!*/
  109643. +void XX_UDelay(uint32_t usecs)
  109644. +{
  109645. + udelay(usecs);
  109646. +}
  109647. +
  109648. +/* TODO: verify that these are correct */
  109649. +#define MSG_BODY_SIZE 512
  109650. +typedef t_Error (t_MsgHandler) (t_Handle h_Mod, uint32_t msgId, uint8_t msgBody[MSG_BODY_SIZE]);
  109651. +typedef void (t_MsgCompletionCB) (t_Handle h_Arg, uint8_t msgBody[MSG_BODY_SIZE]);
  109652. +t_Error XX_SendMessage(char *p_DestAddr,
  109653. + uint32_t msgId,
  109654. + uint8_t msgBody[MSG_BODY_SIZE],
  109655. + t_MsgCompletionCB *f_CompletionCB,
  109656. + t_Handle h_CBArg);
  109657. +
  109658. +typedef struct {
  109659. + char *p_Addr;
  109660. + t_MsgHandler *f_MsgHandlerCB;
  109661. + t_Handle h_Mod;
  109662. + t_List node;
  109663. +} t_MsgHndlr;
  109664. +#define MSG_HNDLR_OBJECT(ptr) LIST_OBJECT(ptr, t_MsgHndlr, node)
  109665. +
  109666. +LIST(msgHndlrList);
  109667. +
  109668. +static void EnqueueMsgHndlr(t_MsgHndlr *p_MsgHndlr)
  109669. +{
  109670. + uint32_t intFlags;
  109671. +
  109672. + intFlags = XX_DisableAllIntr();
  109673. + LIST_AddToTail(&p_MsgHndlr->node, &msgHndlrList);
  109674. + XX_RestoreAllIntr(intFlags);
  109675. +}
  109676. +/* TODO: add this for multi-platform support
  109677. +static t_MsgHndlr * DequeueMsgHndlr(void)
  109678. +{
  109679. + t_MsgHndlr *p_MsgHndlr = NULL;
  109680. + uint32_t intFlags;
  109681. +
  109682. + intFlags = XX_DisableAllIntr();
  109683. + if (!LIST_IsEmpty(&msgHndlrList))
  109684. + {
  109685. + p_MsgHndlr = MSG_HNDLR_OBJECT(msgHndlrList.p_Next);
  109686. + LIST_DelAndInit(&p_MsgHndlr->node);
  109687. + }
  109688. + XX_RestoreAllIntr(intFlags);
  109689. +
  109690. + return p_MsgHndlr;
  109691. +}
  109692. +*/
  109693. +static t_MsgHndlr * FindMsgHndlr(char *p_Addr)
  109694. +{
  109695. + t_MsgHndlr *p_MsgHndlr;
  109696. + t_List *p_Pos;
  109697. +
  109698. + LIST_FOR_EACH(p_Pos, &msgHndlrList)
  109699. + {
  109700. + p_MsgHndlr = MSG_HNDLR_OBJECT(p_Pos);
  109701. + if (strstr(p_MsgHndlr->p_Addr, p_Addr))
  109702. + return p_MsgHndlr;
  109703. + }
  109704. +
  109705. + return NULL;
  109706. +}
  109707. +
  109708. +t_Error XX_RegisterMessageHandler (char *p_Addr, t_MsgHandler *f_MsgHandlerCB, t_Handle h_Mod)
  109709. +{
  109710. + t_MsgHndlr *p_MsgHndlr;
  109711. + uint32_t len;
  109712. +
  109713. + p_MsgHndlr = (t_MsgHndlr*)XX_Malloc(sizeof(t_MsgHndlr));
  109714. + if (!p_MsgHndlr)
  109715. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("message handler object!!!"));
  109716. + memset(p_MsgHndlr, 0, sizeof(t_MsgHndlr));
  109717. +
  109718. + len = strlen(p_Addr);
  109719. + p_MsgHndlr->p_Addr = (char*)XX_Malloc(len+1);
  109720. + strncpy(p_MsgHndlr->p_Addr,p_Addr, (uint32_t)(len+1));
  109721. +
  109722. + p_MsgHndlr->f_MsgHandlerCB = f_MsgHandlerCB;
  109723. + p_MsgHndlr->h_Mod = h_Mod;
  109724. + INIT_LIST(&p_MsgHndlr->node);
  109725. + EnqueueMsgHndlr(p_MsgHndlr);
  109726. +
  109727. + return E_OK;
  109728. +}
  109729. +
  109730. +t_Error XX_UnregisterMessageHandler (char *p_Addr)
  109731. +{
  109732. + t_MsgHndlr *p_MsgHndlr = FindMsgHndlr(p_Addr);
  109733. + if (!p_MsgHndlr)
  109734. + RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
  109735. +
  109736. + LIST_Del(&p_MsgHndlr->node);
  109737. + XX_Free(p_MsgHndlr->p_Addr);
  109738. + XX_Free(p_MsgHndlr);
  109739. +
  109740. + return E_OK;
  109741. +}
  109742. +
  109743. +t_Error XX_SendMessage(char *p_DestAddr,
  109744. + uint32_t msgId,
  109745. + uint8_t msgBody[MSG_BODY_SIZE],
  109746. + t_MsgCompletionCB *f_CompletionCB,
  109747. + t_Handle h_CBArg)
  109748. +{
  109749. + t_Error ans;
  109750. + t_MsgHndlr *p_MsgHndlr = FindMsgHndlr(p_DestAddr);
  109751. + if (!p_MsgHndlr)
  109752. + RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
  109753. +
  109754. + ans = p_MsgHndlr->f_MsgHandlerCB(p_MsgHndlr->h_Mod, msgId, msgBody);
  109755. +
  109756. + if (f_CompletionCB)
  109757. + f_CompletionCB(h_CBArg, msgBody);
  109758. +
  109759. + return ans;
  109760. +}
  109761. +
  109762. +t_Error XX_IpcRegisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH],
  109763. + t_IpcMsgHandler *f_MsgHandler,
  109764. + t_Handle h_Module,
  109765. + uint32_t replyLength)
  109766. +{
  109767. + UNUSED(addr);UNUSED(f_MsgHandler);UNUSED(h_Module);UNUSED(replyLength);
  109768. + return E_OK;
  109769. +}
  109770. +
  109771. +t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH])
  109772. +{
  109773. + UNUSED(addr);
  109774. + return E_OK;
  109775. +}
  109776. +
  109777. +
  109778. +t_Error XX_IpcSendMessage(t_Handle h_Session,
  109779. + uint8_t *p_Msg,
  109780. + uint32_t msgLength,
  109781. + uint8_t *p_Reply,
  109782. + uint32_t *p_ReplyLength,
  109783. + t_IpcMsgCompletion *f_Completion,
  109784. + t_Handle h_Arg)
  109785. +{
  109786. + UNUSED(h_Session); UNUSED(p_Msg); UNUSED(msgLength); UNUSED(p_Reply);
  109787. + UNUSED(p_ReplyLength); UNUSED(f_Completion); UNUSED(h_Arg);
  109788. + return E_OK;
  109789. +}
  109790. +
  109791. +t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH],
  109792. + char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH])
  109793. +{
  109794. + UNUSED(destAddr); UNUSED(srcAddr);
  109795. + return E_OK;
  109796. +}
  109797. +
  109798. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
  109799. +int GetDeviceIrqNum(int irq)
  109800. +{
  109801. + struct device_node *iPar;
  109802. + struct irq_domain *irqHost;
  109803. + uint32_t hwIrq;
  109804. +
  109805. + /* Get the interrupt controller */
  109806. + iPar = of_find_node_by_name(NULL, "mpic");
  109807. + hwIrq = 0;
  109808. +
  109809. + ASSERT_COND(iPar != NULL);
  109810. + /* Get the irq host */
  109811. + irqHost = irq_find_host(iPar);
  109812. + of_node_put(iPar);
  109813. +
  109814. + /* Create irq mapping */
  109815. + return irq_create_mapping(irqHost, hwIrq);
  109816. +}
  109817. +#else
  109818. +#error "kernel not supported!!!"
  109819. +#endif /* LINUX_VERSION_CODE */
  109820. +
  109821. +void * XX_PhysToVirt(physAddress_t addr)
  109822. +{
  109823. + return UINT_TO_PTR(SYS_PhysToVirt((uint64_t)addr));
  109824. +}
  109825. +
  109826. +physAddress_t XX_VirtToPhys(void * addr)
  109827. +{
  109828. + return (physAddress_t)SYS_VirtToPhys(PTR_TO_UINT(addr));
  109829. +}
  109830. +
  109831. +void * xx_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
  109832. +{
  109833. + uintptr_t *returnCode, tmp;
  109834. +
  109835. + if (alignment < sizeof(uintptr_t))
  109836. + alignment = sizeof(uintptr_t);
  109837. + size += alignment + sizeof(returnCode);
  109838. + tmp = (uintptr_t)xx_Malloc(size);
  109839. + if (tmp == 0)
  109840. + return NULL;
  109841. + returnCode = (uintptr_t*)((tmp + alignment + sizeof(returnCode)) & ~((uintptr_t)alignment - 1));
  109842. + *(returnCode - 1) = tmp;
  109843. +
  109844. + return (void*)returnCode;
  109845. +}
  109846. +
  109847. +void xx_FreeSmart(void *p)
  109848. +{
  109849. + xx_Free((void*)(*((uintptr_t *)(p) - 1)));
  109850. +}
  109851. --- /dev/null
  109852. +++ b/drivers/net/ethernet/freescale/sdk_fman/src/xx/xx_linux.c
  109853. @@ -0,0 +1,918 @@
  109854. +/*
  109855. + * Copyright 2008-2012 Freescale Semiconductor Inc.
  109856. + *
  109857. + * Redistribution and use in source and binary forms, with or without
  109858. + * modification, are permitted provided that the following conditions are met:
  109859. + * * Redistributions of source code must retain the above copyright
  109860. + * notice, this list of conditions and the following disclaimer.
  109861. + * * Redistributions in binary form must reproduce the above copyright
  109862. + * notice, this list of conditions and the following disclaimer in the
  109863. + * documentation and/or other materials provided with the distribution.
  109864. + * * Neither the name of Freescale Semiconductor nor the
  109865. + * names of its contributors may be used to endorse or promote products
  109866. + * derived from this software without specific prior written permission.
  109867. + *
  109868. + *
  109869. + * ALTERNATIVELY, this software may be distributed under the terms of the
  109870. + * GNU General Public License ("GPL") as published by the Free Software
  109871. + * Foundation, either version 2 of that License or (at your option) any
  109872. + * later version.
  109873. + *
  109874. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  109875. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  109876. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  109877. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  109878. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  109879. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  109880. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  109881. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  109882. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  109883. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  109884. + */
  109885. +
  109886. +/**************************************************************************//**
  109887. + @File xx_linux.c
  109888. +
  109889. + @Description XX routines implementation for Linux.
  109890. +*//***************************************************************************/
  109891. +#include <linux/version.h>
  109892. +
  109893. +#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
  109894. +#define MODVERSIONS
  109895. +#endif
  109896. +#ifdef MODVERSIONS
  109897. +#include <config/modversions.h>
  109898. +#endif /* MODVERSIONS */
  109899. +
  109900. +#include <linux/module.h>
  109901. +#include <linux/kernel.h>
  109902. +#include <linux/sched.h>
  109903. +#include <linux/string.h>
  109904. +#include <linux/ptrace.h>
  109905. +#include <linux/errno.h>
  109906. +#include <linux/ioport.h>
  109907. +#include <linux/slab.h>
  109908. +#include <linux/interrupt.h>
  109909. +#include <linux/fs.h>
  109910. +#include <linux/vmalloc.h>
  109911. +#include <linux/init.h>
  109912. +#include <linux/timer.h>
  109913. +#include <linux/spinlock.h>
  109914. +#include <linux/delay.h>
  109915. +#include <linux/proc_fs.h>
  109916. +#include <linux/smp.h>
  109917. +#include <linux/of.h>
  109918. +#ifdef CONFIG_FMAN_ARM
  109919. +#include <linux/irqdomain.h>
  109920. +#endif
  109921. +
  109922. +#include <linux/workqueue.h>
  109923. +
  109924. +#ifdef BIGPHYSAREA_ENABLE
  109925. +#include <linux/bigphysarea.h>
  109926. +#endif /* BIGPHYSAREA_ENABLE */
  109927. +
  109928. +#ifndef CONFIG_FMAN_ARM
  109929. +#include <sysdev/fsl_soc.h>
  109930. +#endif
  109931. +#include <asm/pgtable.h>
  109932. +#include <asm/irq.h>
  109933. +#include <asm/bitops.h>
  109934. +#include <asm/uaccess.h>
  109935. +#include <asm/io.h>
  109936. +#include <asm/atomic.h>
  109937. +#include <asm/string.h>
  109938. +#include <asm/byteorder.h>
  109939. +#include <asm/page.h>
  109940. +
  109941. +#include "error_ext.h"
  109942. +#include "std_ext.h"
  109943. +#include "list_ext.h"
  109944. +#include "mm_ext.h"
  109945. +#include "sys_io_ext.h"
  109946. +#include "xx.h"
  109947. +
  109948. +
  109949. +#define __ERR_MODULE__ MODULE_UNKNOWN
  109950. +
  109951. +#ifdef BIGPHYSAREA_ENABLE
  109952. +#define MAX_ALLOCATION_SIZE 128 * 1024 /* Maximum size allocated with kmalloc is 128K */
  109953. +
  109954. +
  109955. +/* TODO: large allocations => use big phys area */
  109956. +/******************************************************************************
  109957. + * routine: get_nr_pages
  109958. + *
  109959. + * description:
  109960. + * calculates the number of memory pages for a given size (in bytes)
  109961. + *
  109962. + * arguments:
  109963. + * size - the number of bytes
  109964. + *
  109965. + * return code:
  109966. + * The number of pages
  109967. + *
  109968. + *****************************************************************************/
  109969. +static __inline__ uint32_t get_nr_pages (uint32_t size)
  109970. +{
  109971. + return (uint32_t)((size >> PAGE_SHIFT) + (size & PAGE_SHIFT ? 1 : 0));
  109972. +}
  109973. +
  109974. +static bool in_big_phys_area (uint32_t addr)
  109975. +{
  109976. + uint32_t base, size;
  109977. +
  109978. + bigphysarea_get_details (&base, &size);
  109979. + return ((addr >= base) && (addr < base + size));
  109980. +}
  109981. +#endif /* BIGPHYSAREA_ENABLE */
  109982. +
  109983. +void * xx_Malloc(uint32_t n)
  109984. +{
  109985. + void *a;
  109986. + uint32_t flags;
  109987. +
  109988. + flags = XX_DisableAllIntr();
  109989. +#ifdef BIGPHYSAREA_ENABLE
  109990. + if (n >= MAX_ALLOCATION_SIZE)
  109991. + a = (void*)bigphysarea_alloc_pages(get_nr_pages(n), 0, GFP_ATOMIC);
  109992. + else
  109993. +#endif /* BIGPHYSAREA_ENABLE */
  109994. + a = (void *)kmalloc((uint32_t)n, GFP_ATOMIC);
  109995. + if (!a)
  109996. + XX_Print("No memory for XX_Malloc\n");
  109997. + XX_RestoreAllIntr(flags);
  109998. +
  109999. + return a;
  110000. +}
  110001. +
  110002. +void xx_Free(void *p)
  110003. +{
  110004. +#ifdef BIGPHYSAREA_ENABLE
  110005. + if (in_big_phys_area ((uint32_t)p))
  110006. + bigphysarea_free_pages(p);
  110007. + else
  110008. +#endif /* BIGPHYSAREA_ENABLE */
  110009. + kfree(p);
  110010. +}
  110011. +
  110012. +void XX_Exit(int status)
  110013. +{
  110014. + WARN(1, "\n\nFMD: fatal error, driver can't go on!!!\n\n");
  110015. +}
  110016. +
  110017. +#define BUF_SIZE 512
  110018. +void XX_Print(char *str, ...)
  110019. +{
  110020. + va_list args;
  110021. +#ifdef CONFIG_SMP
  110022. + char buf[BUF_SIZE];
  110023. +#endif /* CONFIG_SMP */
  110024. +
  110025. + va_start(args, str);
  110026. +#ifdef CONFIG_SMP
  110027. + if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
  110028. + printk(KERN_WARNING "Illegal string to print!\n more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
  110029. + printk(KERN_CRIT "cpu%d/%d: %s", raw_smp_processor_id(), NR_CPUS, buf);
  110030. +#else
  110031. + vprintk(str, args);
  110032. +#endif /* CONFIG_SMP */
  110033. + va_end(args);
  110034. +}
  110035. +
  110036. +void XX_Fprint(void *file, char *str, ...)
  110037. +{
  110038. + va_list args;
  110039. +#ifdef CONFIG_SMP
  110040. + char buf[BUF_SIZE];
  110041. +#endif /* CONFIG_SMP */
  110042. +
  110043. + va_start(args, str);
  110044. +#ifdef CONFIG_SMP
  110045. + if (vsnprintf (buf, BUF_SIZE, str, args) >= BUF_SIZE)
  110046. + printk(KERN_WARNING "Illegal string to print!\n more than %d characters.\n\tString was not printed completelly.\n", BUF_SIZE);
  110047. + printk (KERN_CRIT "cpu%d/%d: %s", raw_smp_processor_id(), NR_CPUS, buf);
  110048. +
  110049. +#else
  110050. + vprintk(str, args);
  110051. +#endif /* CONFIG_SMP */
  110052. + va_end(args);
  110053. +}
  110054. +
  110055. +#ifdef DEBUG_XX_MALLOC
  110056. +typedef void (*t_ffn)(void *);
  110057. +typedef struct {
  110058. + t_ffn f_free;
  110059. + void *mem;
  110060. + char *fname;
  110061. + int fline;
  110062. + uint32_t size;
  110063. + t_List node;
  110064. +} t_MemDebug;
  110065. +#define MEMDBG_OBJECT(p_List) LIST_OBJECT(p_List, t_MemDebug, node)
  110066. +
  110067. +LIST(memDbgLst);
  110068. +
  110069. +
  110070. +void * XX_MallocDebug(uint32_t size, char *fname, int line)
  110071. +{
  110072. + void *mem;
  110073. + t_MemDebug *p_MemDbg;
  110074. +
  110075. + p_MemDbg = (t_MemDebug *)xx_Malloc(sizeof(t_MemDebug));
  110076. + if (p_MemDbg == NULL)
  110077. + return NULL;
  110078. +
  110079. + mem = xx_Malloc(size);
  110080. + if (mem == NULL)
  110081. + {
  110082. + XX_Free(p_MemDbg);
  110083. + return NULL;
  110084. + }
  110085. +
  110086. + INIT_LIST(&p_MemDbg->node);
  110087. + p_MemDbg->f_free = xx_Free;
  110088. + p_MemDbg->mem = mem;
  110089. + p_MemDbg->fname = fname;
  110090. + p_MemDbg->fline = line;
  110091. + p_MemDbg->size = size+sizeof(t_MemDebug);
  110092. + LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
  110093. +
  110094. + return mem;
  110095. +}
  110096. +
  110097. +void * XX_MallocSmartDebug(uint32_t size,
  110098. + int memPartitionId,
  110099. + uint32_t align,
  110100. + char *fname,
  110101. + int line)
  110102. +{
  110103. + void *mem;
  110104. + t_MemDebug *p_MemDbg;
  110105. +
  110106. + p_MemDbg = (t_MemDebug *)XX_Malloc(sizeof(t_MemDebug));
  110107. + if (p_MemDbg == NULL)
  110108. + return NULL;
  110109. +
  110110. + mem = xx_MallocSmart((uint32_t)size, memPartitionId, align);
  110111. + if (mem == NULL)
  110112. + {
  110113. + XX_Free(p_MemDbg);
  110114. + return NULL;
  110115. + }
  110116. +
  110117. + INIT_LIST(&p_MemDbg->node);
  110118. + p_MemDbg->f_free = xx_FreeSmart;
  110119. + p_MemDbg->mem = mem;
  110120. + p_MemDbg->fname = fname;
  110121. + p_MemDbg->fline = line;
  110122. + p_MemDbg->size = size+sizeof(t_MemDebug);
  110123. + LIST_AddToTail(&p_MemDbg->node, &memDbgLst);
  110124. +
  110125. + return mem;
  110126. +}
  110127. +
  110128. +static void debug_free(void *mem)
  110129. +{
  110130. + t_List *p_MemDbgLh = NULL;
  110131. + t_MemDebug *p_MemDbg;
  110132. + bool found = FALSE;
  110133. +
  110134. + if (LIST_IsEmpty(&memDbgLst))
  110135. + {
  110136. + REPORT_ERROR(MAJOR, E_ALREADY_FREE, ("Unbalanced free (0x%08x)", mem));
  110137. + return;
  110138. + }
  110139. +
  110140. + LIST_FOR_EACH(p_MemDbgLh, &memDbgLst)
  110141. + {
  110142. + p_MemDbg = MEMDBG_OBJECT(p_MemDbgLh);
  110143. + if (p_MemDbg->mem == mem)
  110144. + {
  110145. + found = TRUE;
  110146. + break;
  110147. + }
  110148. + }
  110149. +
  110150. + if (!found)
  110151. + {
  110152. + REPORT_ERROR(MAJOR, E_NOT_FOUND,
  110153. + ("Attempt to free unallocated address (0x%08x)",mem));
  110154. + dump_stack();
  110155. + return;
  110156. + }
  110157. +
  110158. + LIST_Del(p_MemDbgLh);
  110159. + p_MemDbg->f_free(mem);
  110160. + p_MemDbg->f_free(p_MemDbg);
  110161. +}
  110162. +
  110163. +void XX_FreeSmart(void *p)
  110164. +{
  110165. + debug_free(p);
  110166. +}
  110167. +
  110168. +
  110169. +void XX_Free(void *p)
  110170. +{
  110171. + debug_free(p);
  110172. +}
  110173. +
  110174. +#else /* not DEBUG_XX_MALLOC */
  110175. +void * XX_Malloc(uint32_t size)
  110176. +{
  110177. + return xx_Malloc(size);
  110178. +}
  110179. +
  110180. +void * XX_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
  110181. +{
  110182. + return xx_MallocSmart(size,memPartitionId, alignment);
  110183. +}
  110184. +
  110185. +void XX_FreeSmart(void *p)
  110186. +{
  110187. + xx_FreeSmart(p);
  110188. +}
  110189. +
  110190. +
  110191. +void XX_Free(void *p)
  110192. +{
  110193. + xx_Free(p);
  110194. +}
  110195. +#endif /* not DEBUG_XX_MALLOC */
  110196. +
  110197. +
  110198. +#if (defined(REPORT_EVENTS) && (REPORT_EVENTS > 0))
  110199. +void XX_EventById(uint32_t event, t_Handle appId, uint16_t flags, char *msg)
  110200. +{
  110201. + e_Event eventCode = (e_Event)event;
  110202. +
  110203. + UNUSED(eventCode);
  110204. + UNUSED(appId);
  110205. + UNUSED(flags);
  110206. + UNUSED(msg);
  110207. +}
  110208. +#endif /* (defined(REPORT_EVENTS) && ... */
  110209. +
  110210. +
  110211. +uint32_t XX_DisableAllIntr(void)
  110212. +{
  110213. + unsigned long flags;
  110214. +
  110215. +#ifdef local_irq_save_nort
  110216. + local_irq_save_nort(flags);
  110217. +#else
  110218. + local_irq_save(flags);
  110219. +#endif
  110220. +
  110221. + return (uint32_t)flags;
  110222. +}
  110223. +
  110224. +void XX_RestoreAllIntr(uint32_t flags)
  110225. +{
  110226. +#ifdef local_irq_restore_nort
  110227. + local_irq_restore_nort((unsigned long)flags);
  110228. +#else
  110229. + local_irq_restore((unsigned long)flags);
  110230. +#endif
  110231. +}
  110232. +
  110233. +t_Error XX_Call( uint32_t qid, t_Error (* f)(t_Handle), t_Handle id, t_Handle appId, uint16_t flags )
  110234. +{
  110235. + UNUSED(qid);
  110236. + UNUSED(appId);
  110237. + UNUSED(flags);
  110238. +
  110239. + return f(id);
  110240. +}
  110241. +
  110242. +int XX_IsICacheEnable(void)
  110243. +{
  110244. + return TRUE;
  110245. +}
  110246. +
  110247. +int XX_IsDCacheEnable(void)
  110248. +{
  110249. + return TRUE;
  110250. +}
  110251. +
  110252. +
  110253. +typedef struct {
  110254. + t_Isr *f_Isr;
  110255. + t_Handle handle;
  110256. +} t_InterruptHandler;
  110257. +
  110258. +
  110259. +t_Handle interruptHandlers[0x00010000];
  110260. +
  110261. +#ifdef CONFIG_FMAN_ARM
  110262. +static irqreturn_t LinuxInterruptHandler (int irq, void *dev_id)
  110263. +{
  110264. + t_InterruptHandler *p_IntrHndl = (t_InterruptHandler *)dev_id;
  110265. + p_IntrHndl->f_Isr(p_IntrHndl->handle);
  110266. + return IRQ_HANDLED;
  110267. +}
  110268. +#endif
  110269. +
  110270. +t_Error XX_SetIntr(int irq, t_Isr *f_Isr, t_Handle handle)
  110271. +{
  110272. +#ifdef CONFIG_FMAN_ARM
  110273. + const char *device;
  110274. + t_InterruptHandler *p_IntrHndl;
  110275. +
  110276. + device = GetDeviceName(irq);
  110277. + if (device == NULL)
  110278. + RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Interrupt source - %d", irq));
  110279. +
  110280. + p_IntrHndl = (t_InterruptHandler *)XX_Malloc(sizeof(t_InterruptHandler));
  110281. + if (p_IntrHndl == NULL)
  110282. + RETURN_ERROR(MAJOR, E_NO_MEMORY, NO_MSG);
  110283. + p_IntrHndl->f_Isr = f_Isr;
  110284. + p_IntrHndl->handle = handle;
  110285. + interruptHandlers[irq] = p_IntrHndl;
  110286. +
  110287. + if (request_irq(GetDeviceIrqNum(irq), LinuxInterruptHandler, 0, device, p_IntrHndl) < 0)
  110288. + RETURN_ERROR(MAJOR, E_BUSY, ("Can't get IRQ %s\n", device));
  110289. + disable_irq(GetDeviceIrqNum(irq));
  110290. +#endif
  110291. + return E_OK;
  110292. +}
  110293. +
  110294. +t_Error XX_FreeIntr(int irq)
  110295. +{
  110296. + t_InterruptHandler *p_IntrHndl = interruptHandlers[irq];
  110297. + free_irq(GetDeviceIrqNum(irq), p_IntrHndl);
  110298. + XX_Free(p_IntrHndl);
  110299. + interruptHandlers[irq] = 0;
  110300. + return E_OK;
  110301. +}
  110302. +
  110303. +t_Error XX_EnableIntr(int irq)
  110304. +{
  110305. + enable_irq(GetDeviceIrqNum(irq));
  110306. + return E_OK;
  110307. +}
  110308. +
  110309. +t_Error XX_DisableIntr(int irq)
  110310. +{
  110311. + disable_irq(GetDeviceIrqNum(irq));
  110312. + return E_OK;
  110313. +}
  110314. +
  110315. +
  110316. +/*****************************************************************************/
  110317. +/* Tasklet Service Routines */
  110318. +/*****************************************************************************/
  110319. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
  110320. +typedef struct
  110321. +{
  110322. + t_Handle h_Data;
  110323. + void (*f_Callback) (void *);
  110324. + struct delayed_work dwork;
  110325. +} t_Tasklet;
  110326. +
  110327. +static void GenericTaskletCallback(struct work_struct *p_Work)
  110328. +{
  110329. + t_Tasklet *p_Task = container_of(p_Work, t_Tasklet, dwork.work);
  110330. +
  110331. + p_Task->f_Callback(p_Task->h_Data);
  110332. +}
  110333. +#endif /* LINUX_VERSION_CODE */
  110334. +
  110335. +
  110336. +t_TaskletHandle XX_InitTasklet (void (*routine)(void *), void *data)
  110337. +{
  110338. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  110339. + struct work_struct *p_Task;
  110340. + p_Task = (struct work_struct *)XX_Malloc(sizeof(struct work_struct));
  110341. + INIT_WORK(p_Task, routine, data);
  110342. +#else
  110343. + t_Tasklet *p_Task = (t_Tasklet *)XX_Malloc(sizeof(t_Tasklet));
  110344. + p_Task->h_Data = data;
  110345. + p_Task->f_Callback = routine;
  110346. + INIT_DELAYED_WORK(&p_Task->dwork, GenericTaskletCallback);
  110347. +#endif /* LINUX_VERSION_CODE */
  110348. +
  110349. + return (t_TaskletHandle)p_Task;
  110350. +}
  110351. +
  110352. +
  110353. +void XX_FreeTasklet (t_TaskletHandle h_Tasklet)
  110354. +{
  110355. + if (h_Tasklet)
  110356. + XX_Free(h_Tasklet);
  110357. +}
  110358. +
  110359. +int XX_ScheduleTask(t_TaskletHandle h_Tasklet, int immediate)
  110360. +{
  110361. + int ans;
  110362. +
  110363. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  110364. + if (immediate)
  110365. + ans = schedule_work(h_Tasklet);
  110366. + else
  110367. + ans = schedule_delayed_work(h_Tasklet, 1);
  110368. +#else
  110369. + if (immediate)
  110370. + ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, 0);
  110371. + else
  110372. + ans = schedule_delayed_work(&((t_Tasklet *)h_Tasklet)->dwork, HZ);
  110373. +#endif /* LINUX_VERSION_CODE */
  110374. +
  110375. + return ans;
  110376. +}
  110377. +
  110378. +void XX_FlushScheduledTasks(void)
  110379. +{
  110380. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
  110381. + flush_scheduled_tasks();
  110382. +#else
  110383. + flush_scheduled_work();
  110384. +#endif /* LINUX_VERSION_CODE */
  110385. +}
  110386. +
  110387. +int XX_TaskletIsQueued(t_TaskletHandle h_Tasklet)
  110388. +{
  110389. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  110390. + return (int)(((struct work_struct *)h_Tasklet)->pending);
  110391. +#else
  110392. + return (int)delayed_work_pending(&((t_Tasklet *)h_Tasklet)->dwork);
  110393. +#endif /* LINUX_VERSION_CODE */
  110394. +}
  110395. +
  110396. +void XX_SetTaskletData(t_TaskletHandle h_Tasklet, t_Handle data)
  110397. +{
  110398. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
  110399. + ((struct tq_struct *)h_Tasklet)->data = data;
  110400. +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  110401. + ((struct work_struct *)h_Tasklet)->data = data;
  110402. +#else
  110403. + ((t_Tasklet *)h_Tasklet)->h_Data = data;
  110404. +#endif /* LINUX_VERSION_CODE */
  110405. +}
  110406. +
  110407. +t_Handle XX_GetTaskletData(t_TaskletHandle h_Tasklet)
  110408. +{
  110409. +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
  110410. + return (t_Handle)(((struct work_struct *)h_Tasklet)->data);
  110411. +#else
  110412. + return ((t_Tasklet *)h_Tasklet)->h_Data;
  110413. +#endif /* LINUX_VERSION_CODE */
  110414. +}
  110415. +
  110416. +
  110417. +/*****************************************************************************/
  110418. +/* Spinlock Service Routines */
  110419. +/*****************************************************************************/
  110420. +
  110421. +t_Handle XX_InitSpinlock(void)
  110422. +{
  110423. + spinlock_t *p_Spinlock = (spinlock_t *)XX_Malloc(sizeof(spinlock_t));
  110424. + if (!p_Spinlock)
  110425. + return NULL;
  110426. +
  110427. + spin_lock_init(p_Spinlock);
  110428. +
  110429. + return (t_Handle)p_Spinlock;
  110430. +}
  110431. +
  110432. +void XX_FreeSpinlock(t_Handle h_Spinlock)
  110433. +{
  110434. + if (h_Spinlock)
  110435. + XX_Free(h_Spinlock);
  110436. +}
  110437. +
  110438. +void XX_LockSpinlock(t_Handle h_Spinlock)
  110439. +{
  110440. + spin_lock((spinlock_t *)h_Spinlock);
  110441. +}
  110442. +
  110443. +void XX_UnlockSpinlock(t_Handle h_Spinlock)
  110444. +{
  110445. + spin_unlock((spinlock_t *)h_Spinlock);
  110446. +}
  110447. +
  110448. +uint32_t XX_LockIntrSpinlock(t_Handle h_Spinlock)
  110449. +{
  110450. + unsigned long intrFlags;
  110451. + spin_lock_irqsave((spinlock_t *)h_Spinlock, intrFlags);
  110452. + return intrFlags;
  110453. +}
  110454. +
  110455. +void XX_UnlockIntrSpinlock(t_Handle h_Spinlock, uint32_t intrFlags)
  110456. +{
  110457. + spin_unlock_irqrestore((spinlock_t *)h_Spinlock, (unsigned long)intrFlags);
  110458. +}
  110459. +
  110460. +
  110461. +/*****************************************************************************/
  110462. +/* Timers Service Routines */
  110463. +/*****************************************************************************/
  110464. +/* The time now is in mili sec. resolution */
  110465. +uint32_t XX_CurrentTime(void)
  110466. +{
  110467. + return (jiffies*1000)/HZ;
  110468. +}
  110469. +
  110470. +
  110471. +t_Handle XX_CreateTimer(void)
  110472. +{
  110473. + struct timer_list *p_Timer = (struct timer_list *)XX_Malloc(sizeof(struct timer_list));
  110474. + if (p_Timer)
  110475. + {
  110476. + memset(p_Timer, 0, sizeof(struct timer_list));
  110477. + init_timer(p_Timer);
  110478. + }
  110479. + return (t_Handle)p_Timer;
  110480. +}
  110481. +
  110482. +void XX_FreeTimer(t_Handle h_Timer)
  110483. +{
  110484. + if (h_Timer)
  110485. + XX_Free(h_Timer);
  110486. +}
  110487. +
  110488. +void XX_StartTimer(t_Handle h_Timer,
  110489. + uint32_t msecs,
  110490. + bool periodic,
  110491. + void (*f_TimerExpired)(t_Handle),
  110492. + t_Handle h_Arg)
  110493. +{
  110494. + int tmp_jiffies = (msecs*HZ)/1000;
  110495. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  110496. +
  110497. + SANITY_CHECK_RETURN((periodic == FALSE), E_NOT_SUPPORTED);
  110498. +
  110499. + p_Timer->function = (void (*)(unsigned long))f_TimerExpired;
  110500. + p_Timer->data = (unsigned long)h_Arg;
  110501. + if ((msecs*HZ)%1000)
  110502. + tmp_jiffies++;
  110503. + p_Timer->expires = (jiffies + tmp_jiffies);
  110504. +
  110505. + add_timer((struct timer_list *)h_Timer);
  110506. +}
  110507. +
  110508. +void XX_SetTimerData(t_Handle h_Timer, t_Handle data)
  110509. +{
  110510. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  110511. +
  110512. + p_Timer->data = (unsigned long)data;
  110513. +}
  110514. +
  110515. +t_Handle XX_GetTimerData(t_Handle h_Timer)
  110516. +{
  110517. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  110518. +
  110519. + return (t_Handle)p_Timer->data;
  110520. +}
  110521. +
  110522. +uint32_t XX_GetExpirationTime(t_Handle h_Timer)
  110523. +{
  110524. + struct timer_list *p_Timer = (struct timer_list *)h_Timer;
  110525. +
  110526. + return (uint32_t)p_Timer->expires;
  110527. +}
  110528. +
  110529. +void XX_StopTimer(t_Handle h_Timer)
  110530. +{
  110531. + del_timer((struct timer_list *)h_Timer);
  110532. +}
  110533. +
  110534. +void XX_ModTimer(t_Handle h_Timer, uint32_t msecs)
  110535. +{
  110536. + int tmp_jiffies = (msecs*HZ)/1000;
  110537. +
  110538. + if ((msecs*HZ)%1000)
  110539. + tmp_jiffies++;
  110540. + mod_timer((struct timer_list *)h_Timer, jiffies + tmp_jiffies);
  110541. +}
  110542. +
  110543. +int XX_TimerIsActive(t_Handle h_Timer)
  110544. +{
  110545. + return timer_pending((struct timer_list *)h_Timer);
  110546. +}
  110547. +
  110548. +uint32_t XX_Sleep(uint32_t msecs)
  110549. +{
  110550. + int tmp_jiffies = (msecs*HZ)/1000;
  110551. +
  110552. + if ((msecs*HZ)%1000)
  110553. + tmp_jiffies++;
  110554. + return schedule_timeout(tmp_jiffies);
  110555. +}
  110556. +
  110557. +/*BEWARE!!!!! UDelay routine is BUSY WAITTING!!!!!*/
  110558. +void XX_UDelay(uint32_t usecs)
  110559. +{
  110560. + udelay(usecs);
  110561. +}
  110562. +
  110563. +/* TODO: verify that these are correct */
  110564. +#define MSG_BODY_SIZE 512
  110565. +typedef t_Error (t_MsgHandler) (t_Handle h_Mod, uint32_t msgId, uint8_t msgBody[MSG_BODY_SIZE]);
  110566. +typedef void (t_MsgCompletionCB) (t_Handle h_Arg, uint8_t msgBody[MSG_BODY_SIZE]);
  110567. +t_Error XX_SendMessage(char *p_DestAddr,
  110568. + uint32_t msgId,
  110569. + uint8_t msgBody[MSG_BODY_SIZE],
  110570. + t_MsgCompletionCB *f_CompletionCB,
  110571. + t_Handle h_CBArg);
  110572. +
  110573. +typedef struct {
  110574. + char *p_Addr;
  110575. + t_MsgHandler *f_MsgHandlerCB;
  110576. + t_Handle h_Mod;
  110577. + t_List node;
  110578. +} t_MsgHndlr;
  110579. +#define MSG_HNDLR_OBJECT(ptr) LIST_OBJECT(ptr, t_MsgHndlr, node)
  110580. +
  110581. +LIST(msgHndlrList);
  110582. +
  110583. +static void EnqueueMsgHndlr(t_MsgHndlr *p_MsgHndlr)
  110584. +{
  110585. + uint32_t intFlags;
  110586. +
  110587. + intFlags = XX_DisableAllIntr();
  110588. + LIST_AddToTail(&p_MsgHndlr->node, &msgHndlrList);
  110589. + XX_RestoreAllIntr(intFlags);
  110590. +}
  110591. +/* TODO: add this for multi-platform support
  110592. +static t_MsgHndlr * DequeueMsgHndlr(void)
  110593. +{
  110594. + t_MsgHndlr *p_MsgHndlr = NULL;
  110595. + uint32_t intFlags;
  110596. +
  110597. + intFlags = XX_DisableAllIntr();
  110598. + if (!LIST_IsEmpty(&msgHndlrList))
  110599. + {
  110600. + p_MsgHndlr = MSG_HNDLR_OBJECT(msgHndlrList.p_Next);
  110601. + LIST_DelAndInit(&p_MsgHndlr->node);
  110602. + }
  110603. + XX_RestoreAllIntr(intFlags);
  110604. +
  110605. + return p_MsgHndlr;
  110606. +}
  110607. +*/
  110608. +static t_MsgHndlr * FindMsgHndlr(char *p_Addr)
  110609. +{
  110610. + t_MsgHndlr *p_MsgHndlr;
  110611. + t_List *p_Pos;
  110612. +
  110613. + LIST_FOR_EACH(p_Pos, &msgHndlrList)
  110614. + {
  110615. + p_MsgHndlr = MSG_HNDLR_OBJECT(p_Pos);
  110616. + if (strstr(p_MsgHndlr->p_Addr, p_Addr))
  110617. + return p_MsgHndlr;
  110618. + }
  110619. +
  110620. + return NULL;
  110621. +}
  110622. +
  110623. +t_Error XX_RegisterMessageHandler (char *p_Addr, t_MsgHandler *f_MsgHandlerCB, t_Handle h_Mod)
  110624. +{
  110625. + t_MsgHndlr *p_MsgHndlr;
  110626. + uint32_t len;
  110627. +
  110628. + p_MsgHndlr = (t_MsgHndlr*)XX_Malloc(sizeof(t_MsgHndlr));
  110629. + if (!p_MsgHndlr)
  110630. + RETURN_ERROR(MINOR, E_NO_MEMORY, ("message handler object!!!"));
  110631. + memset(p_MsgHndlr, 0, sizeof(t_MsgHndlr));
  110632. +
  110633. + len = strlen(p_Addr);
  110634. + p_MsgHndlr->p_Addr = (char*)XX_Malloc(len+1);
  110635. + strncpy(p_MsgHndlr->p_Addr,p_Addr, (uint32_t)(len+1));
  110636. +
  110637. + p_MsgHndlr->f_MsgHandlerCB = f_MsgHandlerCB;
  110638. + p_MsgHndlr->h_Mod = h_Mod;
  110639. + INIT_LIST(&p_MsgHndlr->node);
  110640. + EnqueueMsgHndlr(p_MsgHndlr);
  110641. +
  110642. + return E_OK;
  110643. +}
  110644. +
  110645. +t_Error XX_UnregisterMessageHandler (char *p_Addr)
  110646. +{
  110647. + t_MsgHndlr *p_MsgHndlr = FindMsgHndlr(p_Addr);
  110648. + if (!p_MsgHndlr)
  110649. + RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
  110650. +
  110651. + LIST_Del(&p_MsgHndlr->node);
  110652. + XX_Free(p_MsgHndlr->p_Addr);
  110653. + XX_Free(p_MsgHndlr);
  110654. +
  110655. + return E_OK;
  110656. +}
  110657. +
  110658. +t_Error XX_SendMessage(char *p_DestAddr,
  110659. + uint32_t msgId,
  110660. + uint8_t msgBody[MSG_BODY_SIZE],
  110661. + t_MsgCompletionCB *f_CompletionCB,
  110662. + t_Handle h_CBArg)
  110663. +{
  110664. + t_Error ans;
  110665. + t_MsgHndlr *p_MsgHndlr = FindMsgHndlr(p_DestAddr);
  110666. + if (!p_MsgHndlr)
  110667. + RETURN_ERROR(MINOR, E_NO_DEVICE, ("message handler not found in list!!!"));
  110668. +
  110669. + ans = p_MsgHndlr->f_MsgHandlerCB(p_MsgHndlr->h_Mod, msgId, msgBody);
  110670. +
  110671. + if (f_CompletionCB)
  110672. + f_CompletionCB(h_CBArg, msgBody);
  110673. +
  110674. + return ans;
  110675. +}
  110676. +
  110677. +t_Error XX_IpcRegisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH],
  110678. + t_IpcMsgHandler *f_MsgHandler,
  110679. + t_Handle h_Module,
  110680. + uint32_t replyLength)
  110681. +{
  110682. + UNUSED(addr);UNUSED(f_MsgHandler);UNUSED(h_Module);UNUSED(replyLength);
  110683. + return E_OK;
  110684. +}
  110685. +
  110686. +t_Error XX_IpcUnregisterMsgHandler(char addr[XX_IPC_MAX_ADDR_NAME_LENGTH])
  110687. +{
  110688. + UNUSED(addr);
  110689. + return E_OK;
  110690. +}
  110691. +
  110692. +
  110693. +t_Error XX_IpcSendMessage(t_Handle h_Session,
  110694. + uint8_t *p_Msg,
  110695. + uint32_t msgLength,
  110696. + uint8_t *p_Reply,
  110697. + uint32_t *p_ReplyLength,
  110698. + t_IpcMsgCompletion *f_Completion,
  110699. + t_Handle h_Arg)
  110700. +{
  110701. + UNUSED(h_Session); UNUSED(p_Msg); UNUSED(msgLength); UNUSED(p_Reply);
  110702. + UNUSED(p_ReplyLength); UNUSED(f_Completion); UNUSED(h_Arg);
  110703. + return E_OK;
  110704. +}
  110705. +
  110706. +t_Handle XX_IpcInitSession(char destAddr[XX_IPC_MAX_ADDR_NAME_LENGTH],
  110707. + char srcAddr[XX_IPC_MAX_ADDR_NAME_LENGTH])
  110708. +{
  110709. + UNUSED(destAddr); UNUSED(srcAddr);
  110710. + return E_OK;
  110711. +}
  110712. +
  110713. +/*Forced to introduce due to PRINT_FMT_PARAMS define*/
  110714. +uint32_t E500_GetId(void)
  110715. +{
  110716. + return raw_smp_processor_id();
  110717. +}
  110718. +
  110719. +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
  110720. +int GetDeviceIrqNum(int irq)
  110721. +{
  110722. + struct device_node *iPar;
  110723. + struct irq_domain *irqHost;
  110724. + uint32_t hwIrq;
  110725. +
  110726. + /* Get the interrupt controller */
  110727. + iPar = of_find_node_by_name(NULL, "mpic");
  110728. + hwIrq = 0;
  110729. +
  110730. + ASSERT_COND(iPar != NULL);
  110731. + /* Get the irq host */
  110732. + irqHost = irq_find_host(iPar);
  110733. + of_node_put(iPar);
  110734. +
  110735. + /* Create irq mapping */
  110736. + return irq_create_mapping(irqHost, hwIrq);
  110737. +}
  110738. +#else
  110739. +#error "kernel not supported!!!"
  110740. +#endif /* LINUX_VERSION_CODE */
  110741. +
  110742. +void * XX_PhysToVirt(physAddress_t addr)
  110743. +{
  110744. + return UINT_TO_PTR(SYS_PhysToVirt((uint64_t)addr));
  110745. +}
  110746. +
  110747. +physAddress_t XX_VirtToPhys(void * addr)
  110748. +{
  110749. + return (physAddress_t)SYS_VirtToPhys(PTR_TO_UINT(addr));
  110750. +}
  110751. +
  110752. +void * xx_MallocSmart(uint32_t size, int memPartitionId, uint32_t alignment)
  110753. +{
  110754. + uintptr_t *returnCode, tmp;
  110755. +
  110756. + if (alignment < sizeof(uintptr_t))
  110757. + alignment = sizeof(uintptr_t);
  110758. + size += alignment + sizeof(returnCode);
  110759. + tmp = (uintptr_t)xx_Malloc(size);
  110760. + if (tmp == 0)
  110761. + return NULL;
  110762. + returnCode = (uintptr_t*)((tmp + alignment + sizeof(returnCode)) & ~((uintptr_t)alignment - 1));
  110763. + *(returnCode - 1) = tmp;
  110764. +
  110765. + return (void*)returnCode;
  110766. +}
  110767. +
  110768. +void xx_FreeSmart(void *p)
  110769. +{
  110770. + xx_Free((void*)(*((uintptr_t *)(p) - 1)));
  110771. +}
  110772. --- /dev/null
  110773. +++ b/include/uapi/linux/fmd/Kbuild
  110774. @@ -0,0 +1,5 @@
  110775. +header-y += integrations/
  110776. +header-y += Peripherals/
  110777. +
  110778. +header-y += ioctls.h
  110779. +header-y += net_ioctls.h
  110780. --- /dev/null
  110781. +++ b/include/uapi/linux/fmd/Peripherals/Kbuild
  110782. @@ -0,0 +1,4 @@
  110783. +header-y += fm_ioctls.h
  110784. +header-y += fm_port_ioctls.h
  110785. +header-y += fm_pcd_ioctls.h
  110786. +header-y += fm_test_ioctls.h
  110787. --- /dev/null
  110788. +++ b/include/uapi/linux/fmd/Peripherals/fm_ioctls.h
  110789. @@ -0,0 +1,628 @@
  110790. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  110791. + * All rights reserved.
  110792. + *
  110793. + * Redistribution and use in source and binary forms, with or without
  110794. + * modification, are permitted provided that the following conditions are met:
  110795. + * * Redistributions of source code must retain the above copyright
  110796. + * notice, this list of conditions and the following disclaimer.
  110797. + * * Redistributions in binary form must reproduce the above copyright
  110798. + * notice, this list of conditions and the following disclaimer in the
  110799. + * documentation and/or other materials provided with the distribution.
  110800. + * * Neither the name of Freescale Semiconductor nor the
  110801. + * names of its contributors may be used to endorse or promote products
  110802. + * derived from this software without specific prior written permission.
  110803. + *
  110804. + *
  110805. + * ALTERNATIVELY, this software may be distributed under the terms of the
  110806. + * GNU General Public License ("GPL") as published by the Free Software
  110807. + * Foundation, either version 2 of that License or (at your option) any
  110808. + * later version.
  110809. + *
  110810. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  110811. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  110812. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  110813. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  110814. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  110815. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  110816. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  110817. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  110818. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  110819. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  110820. + */
  110821. +
  110822. +/**************************************************************************//**
  110823. + @File fm_ioctls.h
  110824. +
  110825. + @Description FM Char device ioctls
  110826. +*//***************************************************************************/
  110827. +#ifndef __FM_IOCTLS_H
  110828. +#define __FM_IOCTLS_H
  110829. +
  110830. +
  110831. +/**************************************************************************//**
  110832. + @Group lnx_ioctl_FM_grp Frame Manager Linux IOCTL API
  110833. +
  110834. + @Description FM Linux ioctls definitions and enums
  110835. +
  110836. + @{
  110837. +*//***************************************************************************/
  110838. +
  110839. +/**************************************************************************//**
  110840. + @Collection FM IOCTL device ('/dev') definitions
  110841. +*//***************************************************************************/
  110842. +#define DEV_FM_NAME "fm" /**< Name of the FM chardev */
  110843. +
  110844. +#define DEV_FM_MINOR_BASE 0
  110845. +#define DEV_FM_PCD_MINOR_BASE (DEV_FM_MINOR_BASE + 1) /*/dev/fmx-pcd */
  110846. +#define DEV_FM_OH_PORTS_MINOR_BASE (DEV_FM_PCD_MINOR_BASE + 1) /*/dev/fmx-port-ohy */
  110847. +#define DEV_FM_RX_PORTS_MINOR_BASE (DEV_FM_OH_PORTS_MINOR_BASE + FM_MAX_NUM_OF_OH_PORTS) /*/dev/fmx-port-rxy */
  110848. +#define DEV_FM_TX_PORTS_MINOR_BASE (DEV_FM_RX_PORTS_MINOR_BASE + FM_MAX_NUM_OF_RX_PORTS) /*/dev/fmx-port-txy */
  110849. +#define DEV_FM_MAX_MINORS (DEV_FM_TX_PORTS_MINOR_BASE + FM_MAX_NUM_OF_TX_PORTS)
  110850. +
  110851. +#define FM_IOC_NUM(n) (n)
  110852. +#define FM_PCD_IOC_NUM(n) (n+20)
  110853. +#define FM_PORT_IOC_NUM(n) (n+70)
  110854. +/* @} */
  110855. +
  110856. +#define IOC_FM_MAX_NUM_OF_PORTS 64
  110857. +
  110858. +
  110859. +/**************************************************************************//**
  110860. + @Description Enum for defining port types
  110861. + (must match enum e_FmPortType defined in fm_ext.h)
  110862. +*//***************************************************************************/
  110863. +typedef enum ioc_fm_port_type {
  110864. + e_IOC_FM_PORT_TYPE_OH_OFFLINE_PARSING = 0, /**< Offline parsing port */
  110865. + e_IOC_FM_PORT_TYPE_RX, /**< 1G Rx port */
  110866. + e_IOC_FM_PORT_TYPE_RX_10G, /**< 10G Rx port */
  110867. + e_IOC_FM_PORT_TYPE_TX, /**< 1G Tx port */
  110868. + e_IOC_FM_PORT_TYPE_TX_10G, /**< 10G Tx port */
  110869. + e_IOC_FM_PORT_TYPE_DUMMY
  110870. +} ioc_fm_port_type;
  110871. +
  110872. +
  110873. +/**************************************************************************//**
  110874. + @Group lnx_ioctl_FM_lib_grp FM library
  110875. +
  110876. + @Description FM API functions, definitions and enums
  110877. + The FM module is the main driver module and is a mandatory module
  110878. + for FM driver users. Before any further module initialization,
  110879. + this module must be initialized.
  110880. + The FM is a "single-tone" module. It is responsible of the common
  110881. + HW modules: FPM, DMA, common QMI, common BMI initializations and
  110882. + run-time control routines. This module must be initialized always
  110883. + when working with any of the FM modules.
  110884. + NOTE - We assumes that the FML will be initialize only by core No. 0!
  110885. +
  110886. + @{
  110887. +*//***************************************************************************/
  110888. +
  110889. +/**************************************************************************//**
  110890. + @Description FM Exceptions
  110891. +*//***************************************************************************/
  110892. +typedef enum ioc_fm_exceptions {
  110893. + e_IOC_FM_EX_DMA_BUS_ERROR, /**< DMA bus error. */
  110894. + e_IOC_EX_DMA_READ_ECC, /**< Read Buffer ECC error (Valid for FM rev < 6)*/
  110895. + e_IOC_EX_DMA_SYSTEM_WRITE_ECC, /**< Write Buffer ECC error on system side (Valid for FM rev < 6)*/
  110896. + e_IOC_EX_DMA_FM_WRITE_ECC, /**< Write Buffer ECC error on FM side (Valid for FM rev < 6)*/
  110897. + e_IOC_EX_DMA_SINGLE_PORT_ECC, /**< Single Port ECC error on FM side (Valid for FM rev > 6)*/
  110898. + e_IOC_EX_FPM_STALL_ON_TASKS, /**< Stall of tasks on FPM */
  110899. + e_IOC_EX_FPM_SINGLE_ECC, /**< Single ECC on FPM. */
  110900. + e_IOC_EX_FPM_DOUBLE_ECC, /**< Double ECC error on FPM ram access */
  110901. + e_IOC_EX_QMI_SINGLE_ECC, /**< Single ECC on QMI. */
  110902. + e_IOC_EX_QMI_DOUBLE_ECC, /**< Double bit ECC occurred on QMI */
  110903. + e_IOC_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/**< Dequeue from unknown port id */
  110904. + e_IOC_EX_BMI_LIST_RAM_ECC, /**< Linked List RAM ECC error */
  110905. + e_IOC_EX_BMI_STORAGE_PROFILE_ECC, /**< Storage Profile ECC Error */
  110906. + e_IOC_EX_BMI_STATISTICS_RAM_ECC, /**< Statistics Count RAM ECC Error Enable */
  110907. + e_IOC_EX_BMI_DISPATCH_RAM_ECC, /**< Dispatch RAM ECC Error Enable */
  110908. + e_IOC_EX_IRAM_ECC, /**< Double bit ECC occurred on IRAM*/
  110909. + e_IOC_EX_MURAM_ECC /**< Double bit ECC occurred on MURAM*/
  110910. +} ioc_fm_exceptions;
  110911. +
  110912. +/**************************************************************************//**
  110913. + @Group lnx_ioctl_FM_runtime_control_grp FM Runtime Control Unit
  110914. +
  110915. + @Description FM Runtime control unit API functions, definitions and enums.
  110916. + The FM driver provides a set of control routines for each module.
  110917. + These routines may only be called after the module was fully
  110918. + initialized (both configuration and initialization routines were
  110919. + called). They are typically used to get information from hardware
  110920. + (status, counters/statistics, revision etc.), to modify a current
  110921. + state or to force/enable a required action. Run-time control may
  110922. + be called whenever necessary and as many times as needed.
  110923. + @{
  110924. +*//***************************************************************************/
  110925. +
  110926. +/**************************************************************************//**
  110927. + @Collection General FM defines.
  110928. + *//***************************************************************************/
  110929. +#define IOC_FM_MAX_NUM_OF_VALID_PORTS (FM_MAX_NUM_OF_OH_PORTS + \
  110930. + FM_MAX_NUM_OF_1G_RX_PORTS + \
  110931. + FM_MAX_NUM_OF_10G_RX_PORTS + \
  110932. + FM_MAX_NUM_OF_1G_TX_PORTS + \
  110933. + FM_MAX_NUM_OF_10G_TX_PORTS)
  110934. +/* @} */
  110935. +
  110936. +/**************************************************************************//**
  110937. + @Description Structure for Port bandwidth requirement. Port is identified
  110938. + by type and relative id.
  110939. + (must be identical to t_FmPortBandwidth defined in fm_ext.h)
  110940. +*//***************************************************************************/
  110941. +typedef struct ioc_fm_port_bandwidth_t {
  110942. + ioc_fm_port_type type; /**< FM port type */
  110943. + uint8_t relative_port_id; /**< Type relative port id */
  110944. + uint8_t bandwidth; /**< bandwidth - (in term of percents) */
  110945. +} ioc_fm_port_bandwidth_t;
  110946. +
  110947. +/**************************************************************************//**
  110948. + @Description A Structure containing an array of Port bandwidth requirements.
  110949. + The user should state the ports requiring bandwidth in terms of
  110950. + percentage - i.e. all port's bandwidths in the array must add
  110951. + up to 100.
  110952. + (must be identical to t_FmPortsBandwidthParams defined in fm_ext.h)
  110953. +*//***************************************************************************/
  110954. +typedef struct ioc_fm_port_bandwidth_params {
  110955. + uint8_t num_of_ports;
  110956. + /**< num of ports listed in the array below */
  110957. + ioc_fm_port_bandwidth_t ports_bandwidths[IOC_FM_MAX_NUM_OF_VALID_PORTS];
  110958. + /**< for each port, it's bandwidth (all port's
  110959. + bandwidths must add up to 100.*/
  110960. +} ioc_fm_port_bandwidth_params;
  110961. +
  110962. +/**************************************************************************//**
  110963. + @Description enum for defining FM counters
  110964. +*//***************************************************************************/
  110965. +typedef enum ioc_fm_counters {
  110966. + e_IOC_FM_COUNTERS_ENQ_TOTAL_FRAME, /**< QMI total enqueued frames counter */
  110967. + e_IOC_FM_COUNTERS_DEQ_TOTAL_FRAME, /**< QMI total dequeued frames counter */
  110968. + e_IOC_FM_COUNTERS_DEQ_0, /**< QMI 0 frames from QMan counter */
  110969. + e_IOC_FM_COUNTERS_DEQ_1, /**< QMI 1 frames from QMan counter */
  110970. + e_IOC_FM_COUNTERS_DEQ_2, /**< QMI 2 frames from QMan counter */
  110971. + e_IOC_FM_COUNTERS_DEQ_3, /**< QMI 3 frames from QMan counter */
  110972. + e_IOC_FM_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI dequeue from default queue counter */
  110973. + e_IOC_FM_COUNTERS_DEQ_FROM_CONTEXT, /**< QMI dequeue from FQ context counter */
  110974. + e_IOC_FM_COUNTERS_DEQ_FROM_FD, /**< QMI dequeue from FD command field counter */
  110975. + e_IOC_FM_COUNTERS_DEQ_CONFIRM, /**< QMI dequeue confirm counter */
  110976. +} ioc_fm_counters;
  110977. +
  110978. +typedef struct ioc_fm_obj_t {
  110979. + void *obj;
  110980. +} ioc_fm_obj_t;
  110981. +
  110982. +/**************************************************************************//**
  110983. + @Description A structure for returning revision information
  110984. + (must match struct t_FmRevisionInfo declared in fm_ext.h)
  110985. +*//***************************************************************************/
  110986. +typedef struct ioc_fm_revision_info_t {
  110987. + uint8_t major; /**< Major revision */
  110988. + uint8_t minor; /**< Minor revision */
  110989. +} ioc_fm_revision_info_t;
  110990. +
  110991. +/**************************************************************************//**
  110992. + @Description A structure for FM counters
  110993. +*//***************************************************************************/
  110994. +typedef struct ioc_fm_counters_params_t {
  110995. + ioc_fm_counters cnt; /**< The requested counter */
  110996. + uint32_t val; /**< The requested value to get/set from/into the counter */
  110997. +} ioc_fm_counters_params_t;
  110998. +
  110999. +typedef union ioc_fm_api_version_t {
  111000. + struct {
  111001. + uint8_t major;
  111002. + uint8_t minor;
  111003. + uint8_t respin;
  111004. + uint8_t reserved;
  111005. + } version;
  111006. + uint32_t ver;
  111007. +} ioc_fm_api_version_t;
  111008. +
  111009. +#if (DPAA_VERSION >= 11)
  111010. +/**************************************************************************//**
  111011. + @Description A structure of information about each of the external
  111012. + buffer pools used by a port or storage-profile.
  111013. + (must be identical to t_FmExtPoolParams defined in fm_ext.h)
  111014. +*//***************************************************************************/
  111015. +typedef struct ioc_fm_ext_pool_params {
  111016. + uint8_t id; /**< External buffer pool id */
  111017. + uint16_t size; /**< External buffer pool buffer size */
  111018. +} ioc_fm_ext_pool_params;
  111019. +
  111020. +/**************************************************************************//**
  111021. + @Description A structure for informing the driver about the external
  111022. + buffer pools allocated in the BM and used by a port or a
  111023. + storage-profile.
  111024. + (must be identical to t_FmExtPools defined in fm_ext.h)
  111025. +*//***************************************************************************/
  111026. +typedef struct ioc_fm_ext_pools {
  111027. + uint8_t num_of_pools_used; /**< Number of pools use by this port */
  111028. + ioc_fm_ext_pool_params ext_buf_pool[FM_PORT_MAX_NUM_OF_EXT_POOLS];
  111029. + /**< Parameters for each port */
  111030. +} ioc_fm_ext_pools;
  111031. +
  111032. +typedef struct ioc_fm_vsp_params_t {
  111033. + void *p_fm; /**< A handle to the FM object this VSP related to */
  111034. + ioc_fm_ext_pools ext_buf_pools; /**< Which external buffer pools are used
  111035. + (up to FM_PORT_MAX_NUM_OF_EXT_POOLS), and their sizes.
  111036. + parameter associated with Rx / OP port */
  111037. + uint16_t liodn_offset; /**< VSP's LIODN offset */
  111038. + struct {
  111039. + ioc_fm_port_type port_type; /**< Port type */
  111040. + uint8_t port_id; /**< Port Id - relative to type */
  111041. + } port_params;
  111042. + uint8_t relative_profile_id; /**< VSP Id - relative to VSP's range
  111043. + defined in relevant FM object */
  111044. + void *id; /**< return value */
  111045. +} ioc_fm_vsp_params_t;
  111046. +#endif /* (DPAA_VERSION >= 11) */
  111047. +
  111048. +/**************************************************************************//**
  111049. + @Description A structure for defining BM pool depletion criteria
  111050. +*//***************************************************************************/
  111051. +typedef struct ioc_fm_buf_pool_depletion_t {
  111052. + bool pools_grp_mode_enable; /**< select mode in which pause frames will be sent after
  111053. + a number of pools (all together!) are depleted */
  111054. + uint8_t num_of_pools; /**< the number of depleted pools that will invoke
  111055. + pause frames transmission. */
  111056. + bool pools_to_consider[BM_MAX_NUM_OF_POOLS];
  111057. + /**< For each pool, TRUE if it should be considered for
  111058. + depletion (Note - this pool must be used by this port!). */
  111059. + bool single_pool_mode_enable; /**< select mode in which pause frames will be sent after
  111060. + a single-pool is depleted; */
  111061. + bool pools_to_consider_for_single_mode[BM_MAX_NUM_OF_POOLS];
  111062. + /**< For each pool, TRUE if it should be considered for
  111063. + depletion (Note - this pool must be used by this port!) */
  111064. +#if (DPAA_VERSION >= 11)
  111065. + bool pfc_priorities_en[FM_MAX_NUM_OF_PFC_PRIORITIES];
  111066. + /**< This field is used by the MAC as the Priority Enable Vector in the PFC frame
  111067. + which is transmitted */
  111068. +#endif /* (DPAA_VERSION >= 11) */
  111069. +} ioc_fm_buf_pool_depletion_t;
  111070. +
  111071. +#if (DPAA_VERSION >= 11)
  111072. +typedef struct ioc_fm_buf_pool_depletion_params_t {
  111073. + void *p_fm_vsp;
  111074. + ioc_fm_buf_pool_depletion_t fm_buf_pool_depletion;
  111075. +} ioc_fm_buf_pool_depletion_params_t;
  111076. +#endif /* (DPAA_VERSION >= 11) */
  111077. +
  111078. +typedef struct ioc_fm_buffer_prefix_content_t {
  111079. + uint16_t priv_data_size; /**< Number of bytes to be left at the beginning
  111080. + of the external buffer; Note that the private-area will
  111081. + start from the base of the buffer address. */
  111082. + bool pass_prs_result; /**< TRUE to pass the parse result to/from the FM;
  111083. + User may use FM_PORT_GetBufferPrsResult() in order to
  111084. + get the parser-result from a buffer. */
  111085. + bool pass_time_stamp; /**< TRUE to pass the timeStamp to/from the FM
  111086. + User may use FM_PORT_GetBufferTimeStamp() in order to
  111087. + get the parser-result from a buffer. */
  111088. + bool pass_hash_result; /**< TRUE to pass the KG hash result to/from the FM
  111089. + User may use FM_PORT_GetBufferHashResult() in order to
  111090. + get the parser-result from a buffer. */
  111091. + bool pass_all_other_pcd_info; /**< Add all other Internal-Context information:
  111092. + AD, hash-result, key, etc. */
  111093. + uint16_t data_align; /**< 0 to use driver's default alignment [64],
  111094. + other value for selecting a data alignment (must be a power of 2);
  111095. + if write optimization is used, must be >= 16. */
  111096. + uint8_t manip_extra_space; /**< Maximum extra size needed (insertion-size minus removal-size);
  111097. + Note that this field impacts the size of the buffer-prefix
  111098. + (i.e. it pushes the data offset);
  111099. + This field is irrelevant if DPAA_VERSION==10 */
  111100. +} ioc_fm_buffer_prefix_content_t;
  111101. +
  111102. +typedef struct ioc_fm_buffer_prefix_content_params_t {
  111103. + void *p_fm_vsp;
  111104. + ioc_fm_buffer_prefix_content_t fm_buffer_prefix_content;
  111105. +} ioc_fm_buffer_prefix_content_params_t;
  111106. +
  111107. +#if (DPAA_VERSION >= 11)
  111108. +typedef struct ioc_fm_vsp_config_no_sg_params_t {
  111109. + void *p_fm_vsp;
  111110. + bool no_sg;
  111111. +} ioc_fm_vsp_config_no_sg_params_t;
  111112. +
  111113. +typedef struct ioc_fm_vsp_prs_result_params_t {
  111114. + void *p_fm_vsp;
  111115. + void *p_data;
  111116. +} ioc_fm_vsp_prs_result_params_t;
  111117. +#endif
  111118. +
  111119. +typedef struct fm_ctrl_mon_t {
  111120. + uint8_t percent_cnt[2];
  111121. +} fm_ctrl_mon_t;
  111122. +
  111123. +typedef struct ioc_fm_ctrl_mon_counters_params_t {
  111124. + uint8_t fm_ctrl_index;
  111125. + fm_ctrl_mon_t *p_mon;
  111126. +} ioc_fm_ctrl_mon_counters_params_t;
  111127. +
  111128. +/**************************************************************************//**
  111129. + @Function FM_IOC_SET_PORTS_BANDWIDTH
  111130. +
  111131. + @Description Sets relative weights between ports when accessing common resources.
  111132. +
  111133. + @Param[in] ioc_fm_port_bandwidth_params Port bandwidth percentages,
  111134. + their sum must equal 100.
  111135. +
  111136. + @Return E_OK on success; Error code otherwise.
  111137. +
  111138. + @Cautions Allowed only following FM_Init().
  111139. +*//***************************************************************************/
  111140. +#define FM_IOC_SET_PORTS_BANDWIDTH _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(2), ioc_fm_port_bandwidth_params)
  111141. +
  111142. +/**************************************************************************//**
  111143. + @Function FM_IOC_GET_REVISION
  111144. +
  111145. + @Description Returns the FM revision
  111146. +
  111147. + @Param[out] ioc_fm_revision_info_t A structure of revision information parameters.
  111148. +
  111149. + @Return None.
  111150. +
  111151. + @Cautions Allowed only following FM_Init().
  111152. +*//***************************************************************************/
  111153. +#define FM_IOC_GET_REVISION _IOR(FM_IOC_TYPE_BASE, FM_IOC_NUM(3), ioc_fm_revision_info_t)
  111154. +
  111155. +/**************************************************************************//**
  111156. + @Function FM_IOC_GET_COUNTER
  111157. +
  111158. + @Description Reads one of the FM counters.
  111159. +
  111160. + @Param[in,out] ioc_fm_counters_params_t The requested counter parameters.
  111161. +
  111162. + @Return Counter's current value.
  111163. +
  111164. + @Cautions Allowed only following FM_Init().
  111165. + Note that it is user's responsibilty to call this routine only
  111166. + for enabled counters, and there will be no indication if a
  111167. + disabled counter is accessed.
  111168. +*//***************************************************************************/
  111169. +#define FM_IOC_GET_COUNTER _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(4), ioc_fm_counters_params_t)
  111170. +
  111171. +/**************************************************************************//**
  111172. + @Function FM_IOC_SET_COUNTER
  111173. +
  111174. + @Description Sets a value to an enabled counter. Use "0" to reset the counter.
  111175. +
  111176. + @Param[in] ioc_fm_counters_params_t The requested counter parameters.
  111177. +
  111178. + @Return E_OK on success; Error code otherwise.
  111179. +
  111180. + @Cautions Allowed only following FM_Init().
  111181. +*//***************************************************************************/
  111182. +#define FM_IOC_SET_COUNTER _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(5), ioc_fm_counters_params_t)
  111183. +
  111184. +/**************************************************************************//**
  111185. + @Function FM_IOC_FORCE_INTR
  111186. +
  111187. + @Description Causes an interrupt event on the requested source.
  111188. +
  111189. + @Param[in] ioc_fm_exceptions An exception to be forced.
  111190. +
  111191. + @Return E_OK on success; Error code if the exception is not enabled,
  111192. + or is not able to create interrupt.
  111193. +
  111194. + @Cautions Allowed only following FM_Init().
  111195. +*//***************************************************************************/
  111196. +#define FM_IOC_FORCE_INTR _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(6), ioc_fm_exceptions)
  111197. +
  111198. +/**************************************************************************//**
  111199. + @Function FM_IOC_GET_API_VERSION
  111200. +
  111201. + @Description Reads the FMD IOCTL API version.
  111202. +
  111203. + @Param[in,out] ioc_fm_api_version_t The requested counter parameters.
  111204. +
  111205. + @Return Version's value.
  111206. +*//***************************************************************************/
  111207. +#define FM_IOC_GET_API_VERSION _IOR(FM_IOC_TYPE_BASE, FM_IOC_NUM(7), ioc_fm_api_version_t)
  111208. +
  111209. +#if (DPAA_VERSION >= 11)
  111210. +/**************************************************************************//**
  111211. + @Function FM_VSP_Config
  111212. +
  111213. + @Description Creates descriptor for the FM VSP module.
  111214. +
  111215. + The routine returns a handle (descriptor) to the FM VSP object.
  111216. + This descriptor must be passed as first parameter to all other
  111217. + FM VSP function calls.
  111218. +
  111219. + No actual initialization or configuration of FM hardware is
  111220. + done by this routine.
  111221. +
  111222. +@Param[in] p_FmVspParams Pointer to data structure of parameters
  111223. +
  111224. + @Retval Handle to FM VSP object, or NULL for Failure.
  111225. +*//***************************************************************************/
  111226. +#if defined(CONFIG_COMPAT)
  111227. +#define FM_IOC_VSP_CONFIG_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(8), ioc_compat_fm_vsp_params_t)
  111228. +#endif
  111229. +#define FM_IOC_VSP_CONFIG _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(8), ioc_fm_vsp_params_t)
  111230. +
  111231. +/**************************************************************************//**
  111232. + @Function FM_VSP_Init
  111233. +
  111234. + @Description Initializes the FM VSP module
  111235. +
  111236. + @Param[in] h_FmVsp - FM VSP module descriptor
  111237. +
  111238. + @Return E_OK on success; Error code otherwise.
  111239. +*//***************************************************************************/
  111240. +#if defined(CONFIG_COMPAT)
  111241. +#define FM_IOC_VSP_INIT_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(9), ioc_compat_fm_obj_t)
  111242. +#endif
  111243. +#define FM_IOC_VSP_INIT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(9), ioc_fm_obj_t)
  111244. +
  111245. +/**************************************************************************//**
  111246. + @Function FM_VSP_Free
  111247. +
  111248. + @Description Frees all resources that were assigned to FM VSP module.
  111249. +
  111250. + Calling this routine invalidates the descriptor.
  111251. +
  111252. + @Param[in] h_FmVsp - FM VSP module descriptor
  111253. +
  111254. + @Return E_OK on success; Error code otherwise.
  111255. +*//***************************************************************************/
  111256. +#if defined(CONFIG_COMPAT)
  111257. +#define FM_IOC_VSP_FREE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(10), ioc_compat_fm_obj_t)
  111258. +#endif
  111259. +#define FM_IOC_VSP_FREE _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(10), ioc_fm_obj_t)
  111260. +
  111261. +/**************************************************************************//**
  111262. + @Function FM_VSP_ConfigPoolDepletion
  111263. +
  111264. + @Description Calling this routine enables pause frame generation depending on the
  111265. + depletion status of BM pools. It also defines the conditions to activate
  111266. + this functionality. By default, this functionality is disabled.
  111267. +
  111268. + @Param[in] ioc_fm_buf_pool_depletion_params_t A structure holding the required parameters.
  111269. +
  111270. + @Return E_OK on success; Error code otherwise.
  111271. +
  111272. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  111273. +*//***************************************************************************/
  111274. +#if defined(CONFIG_COMPAT)
  111275. +#define FM_IOC_VSP_CONFIG_POOL_DEPLETION_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(11), ioc_compat_fm_buf_pool_depletion_params_t)
  111276. +#endif
  111277. +#define FM_IOC_VSP_CONFIG_POOL_DEPLETION _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(11), ioc_fm_buf_pool_depletion_params_t)
  111278. +
  111279. +/**************************************************************************//**
  111280. + @Function FM_VSP_ConfigBufferPrefixContent
  111281. +
  111282. + @Description Defines the structure, size and content of the application buffer.
  111283. +
  111284. + The prefix will
  111285. + In VSPs defined for Tx ports, if 'passPrsResult', the application
  111286. + should set a value to their offsets in the prefix of
  111287. + the FM will save the first 'privDataSize', than,
  111288. + depending on 'passPrsResult' and 'passTimeStamp', copy parse result
  111289. + and timeStamp, and the packet itself (in this order), to the
  111290. + application buffer, and to offset.
  111291. +
  111292. + Calling this routine changes the buffer margins definitions
  111293. + in the internal driver data base from its default
  111294. + configuration: Data size: [DEFAULT_FM_SP_bufferPrefixContent_privDataSize]
  111295. + Pass Parser result: [DEFAULT_FM_SP_bufferPrefixContent_passPrsResult].
  111296. + Pass timestamp: [DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp].
  111297. +
  111298. + @Param[in] ioc_fm_buffer_prefix_content_params_t A structure holding the required parameters.
  111299. +
  111300. + @Return E_OK on success; Error code otherwise.
  111301. +
  111302. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  111303. +*//***************************************************************************/
  111304. +#if defined(CONFIG_COMPAT)
  111305. +#define FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(12), ioc_compat_fm_buffer_prefix_content_params_t)
  111306. +#endif
  111307. +#define FM_IOC_VSP_CONFIG_BUFFER_PREFIX_CONTENT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(12), ioc_fm_buffer_prefix_content_params_t)
  111308. +
  111309. +/**************************************************************************//**
  111310. + @Function FM_VSP_ConfigNoScatherGather
  111311. +
  111312. + @Description Calling this routine changes the possibility to receive S/G frame
  111313. + in the internal driver data base
  111314. + from its default configuration: optimize = [DEFAULT_FM_SP_noScatherGather]
  111315. +
  111316. + @Param[in] ioc_fm_vsp_config_no_sg_params_t A structure holding the required parameters.
  111317. +
  111318. + @Return E_OK on success; Error code otherwise.
  111319. +
  111320. + @Cautions Allowed only following FM_VSP_Config() and before FM_VSP_Init().
  111321. +*//***************************************************************************/
  111322. +#if defined(CONFIG_COMPAT)
  111323. +#define FM_IOC_VSP_CONFIG_NO_SG_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(13), ioc_compat_fm_vsp_config_no_sg_params_t)
  111324. +#endif
  111325. +#define FM_IOC_VSP_CONFIG_NO_SG _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(13), ioc_fm_vsp_config_no_sg_params_t)
  111326. +
  111327. +/**************************************************************************//**
  111328. + @Function FM_VSP_GetBufferPrsResult
  111329. +
  111330. + @Description Returns the pointer to the parse result in the data buffer.
  111331. + In Rx ports this is relevant after reception, if parse
  111332. + result is configured to be part of the data passed to the
  111333. + application. For non Rx ports it may be used to get the pointer
  111334. + of the area in the buffer where parse result should be
  111335. + initialized - if so configured.
  111336. + See FM_VSP_ConfigBufferPrefixContent for data buffer prefix
  111337. + configuration.
  111338. +
  111339. + @Param[in] ioc_fm_vsp_prs_result_params_t A structure holding the required parameters.
  111340. +
  111341. + @Return Parse result pointer on success, NULL if parse result was not
  111342. + configured for this port.
  111343. +
  111344. + @Cautions Allowed only following FM_VSP_Init().
  111345. +*//***************************************************************************/
  111346. +#if defined(CONFIG_COMPAT)
  111347. +#define FM_IOC_VSP_GET_BUFFER_PRS_RESULT_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(14), ioc_compat_fm_vsp_prs_result_params_t)
  111348. +#endif
  111349. +#define FM_IOC_VSP_GET_BUFFER_PRS_RESULT _IOWR(FM_IOC_TYPE_BASE, FM_IOC_NUM(14), ioc_fm_vsp_prs_result_params_t)
  111350. +#endif /* (DPAA_VERSION >= 11) */
  111351. +
  111352. +/**************************************************************************//**
  111353. + @Function FM_CtrlMonStart
  111354. +
  111355. + @Description Start monitoring utilization of all available FM controllers.
  111356. +
  111357. + In order to obtain FM controllers utilization the following sequence
  111358. + should be used:
  111359. + -# FM_CtrlMonStart()
  111360. + -# FM_CtrlMonStop()
  111361. + -# FM_CtrlMonGetCounters() - issued for each FM controller
  111362. +
  111363. + @Return E_OK on success; Error code otherwise.
  111364. +
  111365. + @Cautions Allowed only following FM_Init().
  111366. +*//***************************************************************************/
  111367. +#define FM_IOC_CTRL_MON_START _IO(FM_IOC_TYPE_BASE, FM_IOC_NUM(15))
  111368. +
  111369. +
  111370. +/**************************************************************************//**
  111371. + @Function FM_CtrlMonStop
  111372. +
  111373. + @Description Stop monitoring utilization of all available FM controllers.
  111374. +
  111375. + In order to obtain FM controllers utilization the following sequence
  111376. + should be used:
  111377. + -# FM_CtrlMonStart()
  111378. + -# FM_CtrlMonStop()
  111379. + -# FM_CtrlMonGetCounters() - issued for each FM controller
  111380. +
  111381. + @Return E_OK on success; Error code otherwise.
  111382. +
  111383. + @Cautions Allowed only following FM_Init().
  111384. +*//***************************************************************************/
  111385. +#define FM_IOC_CTRL_MON_STOP _IO(FM_IOC_TYPE_BASE, FM_IOC_NUM(16))
  111386. +
  111387. +/**************************************************************************//**
  111388. + @Function FM_CtrlMonGetCounters
  111389. +
  111390. + @Description Obtain FM controller utilization parameters.
  111391. +
  111392. + In order to obtain FM controllers utilization the following sequence
  111393. + should be used:
  111394. + -# FM_CtrlMonStart()
  111395. + -# FM_CtrlMonStop()
  111396. + -# FM_CtrlMonGetCounters() - issued for each FM controller
  111397. +
  111398. + @Param[in] ioc_fm_ctrl_mon_counters_params_t A structure holding the required parameters.
  111399. +
  111400. + @Return E_OK on success; Error code otherwise.
  111401. +
  111402. + @Cautions Allowed only following FM_Init().
  111403. +*//***************************************************************************/
  111404. +#if defined(CONFIG_COMPAT)
  111405. +#define FM_IOC_CTRL_MON_GET_COUNTERS_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(17), ioc_compat_fm_ctrl_mon_counters_params_t)
  111406. +#endif
  111407. +#define FM_IOC_CTRL_MON_GET_COUNTERS _IOW(FM_IOC_TYPE_BASE, FM_IOC_NUM(17), ioc_fm_ctrl_mon_counters_params_t)
  111408. +
  111409. +/** @} */ /* end of lnx_ioctl_FM_runtime_control_grp group */
  111410. +/** @} */ /* end of lnx_ioctl_FM_lib_grp group */
  111411. +/** @} */ /* end of lnx_ioctl_FM_grp */
  111412. +
  111413. +#define FMD_API_VERSION_MAJOR 21
  111414. +#define FMD_API_VERSION_MINOR 1
  111415. +#define FMD_API_VERSION_RESPIN 0
  111416. +
  111417. +#endif /* __FM_IOCTLS_H */
  111418. --- /dev/null
  111419. +++ b/include/uapi/linux/fmd/Peripherals/fm_pcd_ioctls.h
  111420. @@ -0,0 +1,3084 @@
  111421. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  111422. + * All rights reserved.
  111423. + *
  111424. + * Redistribution and use in source and binary forms, with or without
  111425. + * modification, are permitted provided that the following conditions are met:
  111426. + * * Redistributions of source code must retain the above copyright
  111427. + * notice, this list of conditions and the following disclaimer.
  111428. + * * Redistributions in binary form must reproduce the above copyright
  111429. + * notice, this list of conditions and the following disclaimer in the
  111430. + * documentation and/or other materials provided with the distribution.
  111431. + * * Neither the name of Freescale Semiconductor nor the
  111432. + * names of its contributors may be used to endorse or promote products
  111433. + * derived from this software without specific prior written permission.
  111434. + *
  111435. + *
  111436. + * ALTERNATIVELY, this software may be distributed under the terms of the
  111437. + * GNU General Public License ("GPL") as published by the Free Software
  111438. + * Foundation, either version 2 of that License or (at your option) any
  111439. + * later version.
  111440. + *
  111441. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  111442. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  111443. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  111444. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  111445. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  111446. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  111447. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  111448. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  111449. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  111450. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  111451. + */
  111452. +
  111453. +
  111454. +/******************************************************************************
  111455. + @File fm_pcd_ioctls.h
  111456. +
  111457. + @Description FM PCD ...
  111458. +*//***************************************************************************/
  111459. +#ifndef __FM_PCD_IOCTLS_H
  111460. +#define __FM_PCD_IOCTLS_H
  111461. +
  111462. +#include "net_ioctls.h"
  111463. +#include "fm_ioctls.h"
  111464. +
  111465. +
  111466. +/**************************************************************************//**
  111467. +
  111468. + @Group lnx_ioctl_FM_grp Frame Manager Linux IOCTL API
  111469. +
  111470. + @Description Frame Manager Linux ioctls definitions and enums
  111471. +
  111472. + @{
  111473. +*//***************************************************************************/
  111474. +
  111475. +/**************************************************************************//**
  111476. + @Group lnx_ioctl_FM_PCD_grp FM PCD
  111477. +
  111478. + @Description Frame Manager PCD API functions, definitions and enums
  111479. +
  111480. + The FM PCD module is responsible for the initialization of all
  111481. + global classifying FM modules. This includes the parser general and
  111482. + common registers, the key generator global and common registers,
  111483. + and the policer global and common registers.
  111484. + In addition, the FM PCD SW module will initialize all required
  111485. + key generator schemes, coarse classification flows, and policer
  111486. + profiles. When an FM module is configured to work with one of these
  111487. + entities, it will register to it using the FM PORT API. The PCD
  111488. + module will manage the PCD resources - i.e. resource management of
  111489. + KeyGen schemes, etc.
  111490. +
  111491. + @{
  111492. +*//***************************************************************************/
  111493. +
  111494. +/**************************************************************************//**
  111495. + @Collection General PCD defines
  111496. +*//***************************************************************************/
  111497. +#define IOC_FM_PCD_MAX_NUM_OF_PRIVATE_HDRS 2 /**< Number of units/headers saved for user */
  111498. +
  111499. +#define IOC_FM_PCD_PRS_NUM_OF_HDRS 16 /**< Number of headers supported by HW parser */
  111500. +#define IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS (32 - IOC_FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
  111501. + /**< Number of distinction units is limited by
  111502. + register size (32 bits) minus reserved bits
  111503. + for private headers. */
  111504. +#define IOC_FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS 4 /**< Maximum number of interchangeable headers
  111505. + in a distinction unit */
  111506. +#define IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS 8 /**< Total number of generic KeyGen registers */
  111507. +#define IOC_FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY 35 /**< Max number allowed on any configuration;
  111508. + For HW implementation reasons, in most
  111509. + cases less than this will be allowed; The
  111510. + driver will return an initialization error
  111511. + if resource is unavailable. */
  111512. +#define IOC_FM_PCD_KG_NUM_OF_EXTRACT_MASKS 4 /**< Total number of masks allowed on KeyGen extractions. */
  111513. +#define IOC_FM_PCD_KG_NUM_OF_DEFAULT_GROUPS 16 /**< Number of default value logical groups */
  111514. +
  111515. +#define IOC_FM_PCD_PRS_NUM_OF_LABELS 32 /**< Maximum number of SW parser labels */
  111516. +#define IOC_FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */
  111517. +
  111518. +#define IOC_FM_PCD_MAX_MANIP_INSRT_TEMPLATE_SIZE 128 /**< Maximum size of insertion template for
  111519. + insert manipulation */
  111520. +
  111521. +#if DPAA_VERSION >= 11
  111522. +#define IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES 64 /**< Maximum possible entries for frame replicator group */
  111523. +#endif /* DPAA_VERSION >= 11 */
  111524. +/* @} */
  111525. +
  111526. +#ifdef FM_CAPWAP_SUPPORT
  111527. +#error "FM_CAPWAP_SUPPORT not implemented!"
  111528. +#endif
  111529. +
  111530. +
  111531. +/**************************************************************************//**
  111532. + @Group lnx_ioctl_FM_PCD_init_grp FM PCD Initialization Unit
  111533. +
  111534. + @Description Frame Manager PCD Initialization Unit API
  111535. +
  111536. + @{
  111537. +*//***************************************************************************/
  111538. +
  111539. +/**************************************************************************//**
  111540. + @Description PCD counters
  111541. + (must match enum e_FmPcdCounters defined in fm_pcd_ext.h)
  111542. +*//***************************************************************************/
  111543. +typedef enum ioc_fm_pcd_counters {
  111544. + e_IOC_FM_PCD_KG_COUNTERS_TOTAL, /**< KeyGen counter */
  111545. + e_IOC_FM_PCD_PLCR_COUNTERS_RED, /**< Policer counter - counts the total number of RED packets that exit the Policer. */
  111546. + e_IOC_FM_PCD_PLCR_COUNTERS_YELLOW, /**< Policer counter - counts the total number of YELLOW packets that exit the Policer. */
  111547. + e_IOC_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED, /**< Policer counter - counts the number of packets that changed color to RED by the Policer;
  111548. + This is a subset of e_IOC_FM_PCD_PLCR_COUNTERS_RED packet count, indicating active color changes. */
  111549. + e_IOC_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW, /**< Policer counter - counts the number of packets that changed color to YELLOW by the Policer;
  111550. + This is a subset of e_IOC_FM_PCD_PLCR_COUNTERS_YELLOW packet count, indicating active color changes. */
  111551. + e_IOC_FM_PCD_PLCR_COUNTERS_TOTAL, /**< Policer counter - counts the total number of packets passed in the Policer. */
  111552. + e_IOC_FM_PCD_PLCR_COUNTERS_LENGTH_MISMATCH, /**< Policer counter - counts the number of packets with length mismatch. */
  111553. + e_IOC_FM_PCD_PRS_COUNTERS_PARSE_DISPATCH, /**< Parser counter - counts the number of times the parser block is dispatched. */
  111554. + e_IOC_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L2 parse result is returned (including errors). */
  111555. + e_IOC_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L3 parse result is returned (including errors). */
  111556. + e_IOC_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times L4 parse result is returned (including errors). */
  111557. + e_IOC_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED, /**< Parser counter - counts the number of times SHIM parse result is returned (including errors). */
  111558. + e_IOC_FM_PCD_PRS_COUNTERS_L2_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L2 parse result is returned with errors. */
  111559. + e_IOC_FM_PCD_PRS_COUNTERS_L3_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L3 parse result is returned with errors. */
  111560. + e_IOC_FM_PCD_PRS_COUNTERS_L4_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times L4 parse result is returned with errors. */
  111561. + e_IOC_FM_PCD_PRS_COUNTERS_SHIM_PARSE_RESULT_RETURNED_WITH_ERR, /**< Parser counter - counts the number of times SHIM parse result is returned with errors. */
  111562. + e_IOC_FM_PCD_PRS_COUNTERS_SOFT_PRS_CYCLES, /**< Parser counter - counts the number of cycles spent executing soft parser instruction (including stall cycles). */
  111563. + e_IOC_FM_PCD_PRS_COUNTERS_SOFT_PRS_STALL_CYCLES, /**< Parser counter - counts the number of cycles stalled waiting for parser internal memory reads while executing soft parser instruction. */
  111564. + e_IOC_FM_PCD_PRS_COUNTERS_HARD_PRS_CYCLE_INCL_STALL_CYCLES, /**< Parser counter - counts the number of cycles spent executing hard parser (including stall cycles). */
  111565. + e_IOC_FM_PCD_PRS_COUNTERS_MURAM_READ_CYCLES, /**< MURAM counter - counts the number of cycles while performing FMan Memory read. */
  111566. + e_IOC_FM_PCD_PRS_COUNTERS_MURAM_READ_STALL_CYCLES, /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory read. */
  111567. + e_IOC_FM_PCD_PRS_COUNTERS_MURAM_WRITE_CYCLES, /**< MURAM counter - counts the number of cycles while performing FMan Memory write. */
  111568. + e_IOC_FM_PCD_PRS_COUNTERS_MURAM_WRITE_STALL_CYCLES, /**< MURAM counter - counts the number of cycles stalled while performing FMan Memory write. */
  111569. + e_IOC_FM_PCD_PRS_COUNTERS_FPM_COMMAND_STALL_CYCLES /**< FPM counter - counts the number of cycles stalled while performing a FPM Command. */
  111570. +} ioc_fm_pcd_counters;
  111571. +
  111572. +/**************************************************************************//**
  111573. + @Description PCD interrupts
  111574. + (must match enum e_FmPcdExceptions defined in fm_pcd_ext.h)
  111575. +*//***************************************************************************/
  111576. +typedef enum ioc_fm_pcd_exceptions {
  111577. + e_IOC_FM_PCD_KG_EXCEPTION_DOUBLE_ECC, /**< KeyGen double-bit ECC error is detected on internal memory read access. */
  111578. + e_IOC_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW, /**< KeyGen scheme configuration error indicating a key size larger than 56 bytes. */
  111579. + e_IOC_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC, /**< Policer double-bit ECC error has been detected on PRAM read access. */
  111580. + e_IOC_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR, /**< Policer access to a non-initialized profile has been detected. */
  111581. + e_IOC_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE, /**< Policer RAM self-initialization complete */
  111582. + e_IOC_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE, /**< Policer atomic action complete */
  111583. + e_IOC_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC, /**< Parser double-bit ECC error */
  111584. + e_IOC_FM_PCD_PRS_EXCEPTION_SINGLE_ECC /**< Parser single-bit ECC error */
  111585. +} ioc_fm_pcd_exceptions;
  111586. +
  111587. +/** @} */ /* end of lnx_ioctl_FM_PCD_init_grp group */
  111588. +
  111589. +
  111590. +/**************************************************************************//**
  111591. + @Group lnx_ioctl_FM_PCD_Runtime_grp FM PCD Runtime Unit
  111592. +
  111593. + @Description Frame Manager PCD Runtime Unit
  111594. +
  111595. + The runtime control allows creation of PCD infrastructure modules
  111596. + such as Network Environment Characteristics, Classification Plan
  111597. + Groups and Coarse Classification Trees.
  111598. + It also allows on-the-fly initialization, modification and removal
  111599. + of PCD modules such as KeyGen schemes, coarse classification nodes
  111600. + and Policer profiles.
  111601. +
  111602. + In order to explain the programming model of the PCD driver interface
  111603. + a few terms should be explained, and will be used below.
  111604. + - Distinction Header - One of the 16 protocols supported by the FM parser,
  111605. + or one of the SHIM headers (1 or 2). May be a header with a special
  111606. + option (see below).
  111607. + - Interchangeable Headers Group - This is a group of Headers recognized
  111608. + by either one of them. For example, if in a specific context the user
  111609. + chooses to treat IPv4 and IPV6 in the same way, they may create an
  111610. + interchangeable Headers Unit consisting of these 2 headers.
  111611. + - A Distinction Unit - a Distinction Header or an Interchangeable Headers
  111612. + Group.
  111613. + - Header with special option - applies to Ethernet, MPLS, VLAN, IPv4 and
  111614. + IPv6, includes multicast, broadcast and other protocol specific options.
  111615. + In terms of hardware it relates to the options available in the classification
  111616. + plan.
  111617. + - Network Environment Characteristics - a set of Distinction Units that define
  111618. + the total recognizable header selection for a certain environment. This is
  111619. + NOT the list of all headers that will ever appear in a flow, but rather
  111620. + everything that needs distinction in a flow, where distinction is made by KeyGen
  111621. + schemes and coarse classification action descriptors.
  111622. +
  111623. + The PCD runtime modules initialization is done in stages. The first stage after
  111624. + initializing the PCD module itself is to establish a Network Flows Environment
  111625. + Definition. The application may choose to establish one or more such environments.
  111626. + Later, when needed, the application will have to state, for some of its modules,
  111627. + to which single environment it belongs.
  111628. +
  111629. + @{
  111630. +*//***************************************************************************/
  111631. +
  111632. +
  111633. +/**************************************************************************//**
  111634. + @Description structure for FM counters
  111635. +*//***************************************************************************/
  111636. +typedef struct ioc_fm_pcd_counters_params_t {
  111637. + ioc_fm_pcd_counters cnt; /**< The requested counter */
  111638. + uint32_t val; /**< The requested value to get/set from/into the counter */
  111639. +} ioc_fm_pcd_counters_params_t;
  111640. +
  111641. +/**************************************************************************//**
  111642. + @Description structure for FM exception definitios
  111643. +*//***************************************************************************/
  111644. +typedef struct ioc_fm_pcd_exception_params_t {
  111645. + ioc_fm_pcd_exceptions exception; /**< The requested exception */
  111646. + bool enable; /**< TRUE to enable interrupt, FALSE to mask it. */
  111647. +} ioc_fm_pcd_exception_params_t;
  111648. +
  111649. +/**************************************************************************//**
  111650. + @Description A structure for SW parser labels
  111651. + (must be identical to struct t_FmPcdPrsLabelParams defined in fm_pcd_ext.h)
  111652. + *//***************************************************************************/
  111653. +typedef struct ioc_fm_pcd_prs_label_params_t {
  111654. + uint32_t instruction_offset; /**< SW parser label instruction offset (2 bytes
  111655. + resolution), relative to Parser RAM. */
  111656. + ioc_net_header_type hdr; /**< The existence of this header will invoke
  111657. + the SW parser code. */
  111658. + uint8_t index_per_hdr; /**< Normally 0, if more than one SW parser
  111659. + attachments for the same header, use this
  111660. + index to distinguish between them. */
  111661. +} ioc_fm_pcd_prs_label_params_t;
  111662. +
  111663. +/**************************************************************************//**
  111664. + @Description A structure for SW parser
  111665. + (Must match struct t_FmPcdPrsSwParams defined in fm_pcd_ext.h)
  111666. + *//***************************************************************************/
  111667. +typedef struct ioc_fm_pcd_prs_sw_params_t {
  111668. + bool override; /**< FALSE to invoke a check that nothing else
  111669. + was loaded to this address, including
  111670. + internal patches.
  111671. + TRUE to override any existing code.*/
  111672. + uint32_t size; /**< SW parser code size */
  111673. + uint16_t base; /**< SW parser base (in instruction counts!
  111674. + must be larger than 0x20)*/
  111675. + uint8_t *p_code; /**< SW parser code */
  111676. + uint32_t sw_prs_data_params[IOC_FM_PCD_PRS_NUM_OF_HDRS];
  111677. + /**< SW parser data (parameters) */
  111678. + uint8_t num_of_labels; /**< Number of labels for SW parser. */
  111679. + ioc_fm_pcd_prs_label_params_t labels_table[IOC_FM_PCD_PRS_NUM_OF_LABELS];
  111680. + /**< SW parser labels table,
  111681. + containing num_of_labels entries */
  111682. +} ioc_fm_pcd_prs_sw_params_t;
  111683. +
  111684. +/**************************************************************************//**
  111685. + @Description A structure to set the a KeyGen default value
  111686. + *//***************************************************************************/
  111687. +typedef struct ioc_fm_pcd_kg_dflt_value_params_t {
  111688. + uint8_t valueId; /**< 0,1 - one of 2 global default values */
  111689. + uint32_t value; /**< The requested default value */
  111690. +} ioc_fm_pcd_kg_dflt_value_params_t;
  111691. +
  111692. +
  111693. +/**************************************************************************//**
  111694. + @Function FM_PCD_Enable
  111695. +
  111696. + @Description This routine should be called after PCD is initialized for enabling all
  111697. + PCD engines according to their existing configuration.
  111698. +
  111699. + @Return 0 on success; Error code otherwise.
  111700. +
  111701. + @Cautions Allowed only when PCD is disabled.
  111702. +*//***************************************************************************/
  111703. +#define FM_PCD_IOC_ENABLE _IO(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(1))
  111704. +
  111705. +/**************************************************************************//**
  111706. + @Function FM_PCD_Disable
  111707. +
  111708. + @Description This routine may be called when PCD is enabled in order to
  111709. + disable all PCD engines. It may be called
  111710. + only when none of the ports in the system are using the PCD.
  111711. +
  111712. + @Return 0 on success; Error code otherwise.
  111713. +
  111714. + @Cautions Allowed only when PCD is enabled.
  111715. +*//***************************************************************************/
  111716. +#define FM_PCD_IOC_DISABLE _IO(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(2))
  111717. +
  111718. + /**************************************************************************//**
  111719. + @Function FM_PCD_PrsLoadSw
  111720. +
  111721. + @Description This routine may be called only when all ports in the
  111722. + system are actively using the classification plan scheme.
  111723. + In such cases it is recommended in order to save resources.
  111724. + The driver automatically saves 8 classification plans for
  111725. + ports that do NOT use the classification plan mechanism, to
  111726. + avoid this (in order to save those entries) this routine may
  111727. + be called.
  111728. +
  111729. + @Param[in] ioc_fm_pcd_prs_sw_params_t A pointer to the image of the software parser code.
  111730. +
  111731. + @Return 0 on success; Error code otherwise.
  111732. +
  111733. + @Cautions Allowed only when PCD is disabled.
  111734. +*//***************************************************************************/
  111735. +#if defined(CONFIG_COMPAT)
  111736. +#define FM_PCD_IOC_PRS_LOAD_SW_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(3), ioc_compat_fm_pcd_prs_sw_params_t)
  111737. +#endif
  111738. +#define FM_PCD_IOC_PRS_LOAD_SW _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(3), ioc_fm_pcd_prs_sw_params_t)
  111739. +
  111740. +/**************************************************************************//**
  111741. + @Function FM_PCD_KgSetDfltValue
  111742. +
  111743. + @Description Calling this routine sets a global default value to be used
  111744. + by the KeyGen when parser does not recognize a required
  111745. + field/header.
  111746. + By default default values are 0.
  111747. +
  111748. + @Param[in] ioc_fm_pcd_kg_dflt_value_params_t A pointer to a structure with the relevant parameters
  111749. +
  111750. + @Return 0 on success; Error code otherwise.
  111751. +
  111752. + @Cautions Allowed only when PCD is disabled.
  111753. +*//***************************************************************************/
  111754. +#define FM_PCD_IOC_KG_SET_DFLT_VALUE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(6), ioc_fm_pcd_kg_dflt_value_params_t)
  111755. +
  111756. +/**************************************************************************//**
  111757. + @Function FM_PCD_KgSetAdditionalDataAfterParsing
  111758. +
  111759. + @Description Calling this routine allows the keygen to access data past
  111760. + the parser finishing point.
  111761. +
  111762. + @Param[in] uint8_t payload-offset; the number of bytes beyond the parser location.
  111763. +
  111764. + @Return 0 on success; Error code otherwise.
  111765. +
  111766. + @Cautions Allowed only when PCD is disabled.
  111767. +*//***************************************************************************/
  111768. +#define FM_PCD_IOC_KG_SET_ADDITIONAL_DATA_AFTER_PARSING _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(7), uint8_t)
  111769. +
  111770. +/**************************************************************************//**
  111771. + @Function FM_PCD_SetException
  111772. +
  111773. + @Description Calling this routine enables/disables PCD interrupts.
  111774. +
  111775. + @Param[in] ioc_fm_pcd_exception_params_t Arguments struct with exception to be enabled/disabled.
  111776. +
  111777. + @Return 0 on success; Error code otherwise.
  111778. +*//***************************************************************************/
  111779. +#define FM_PCD_IOC_SET_EXCEPTION _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(8), ioc_fm_pcd_exception_params_t)
  111780. +
  111781. +/**************************************************************************//**
  111782. + @Function FM_PCD_GetCounter
  111783. +
  111784. + @Description Reads one of the FM PCD counters.
  111785. +
  111786. + @Param[in,out] ioc_fm_pcd_counters_params_t The requested counter parameters.
  111787. +
  111788. + @Return 0 on success; Error code otherwise.
  111789. +
  111790. + @Cautions Note that it is user's responsibilty to call this routine only
  111791. + for enabled counters, and there will be no indication if a
  111792. + disabled counter is accessed.
  111793. +*//***************************************************************************/
  111794. +#define FM_PCD_IOC_GET_COUNTER _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(9), ioc_fm_pcd_counters_params_t)
  111795. +
  111796. +/**************************************************************************//**
  111797. +
  111798. + @Function FM_PCD_KgSchemeGetCounter
  111799. +
  111800. + @Description Reads scheme packet counter.
  111801. +
  111802. + @Param[in] h_Scheme scheme handle as returned by FM_PCD_KgSchemeSet().
  111803. +
  111804. + @Return Counter's current value.
  111805. +
  111806. + @Cautions Allowed only following FM_PCD_Init() & FM_PCD_KgSchemeSet().
  111807. +*//***************************************************************************/
  111808. +#if defined(CONFIG_COMPAT)
  111809. +#define FM_PCD_IOC_KG_SCHEME_GET_CNTR_COMPAT _IOR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(4), ioc_compat_fm_pcd_kg_scheme_spc_t)
  111810. +#endif
  111811. +#define FM_PCD_IOC_KG_SCHEME_GET_CNTR _IOR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(4), ioc_fm_pcd_kg_scheme_spc_t)
  111812. +
  111813. +#if 0
  111814. +TODO: unused IOCTL
  111815. +/**************************************************************************//**
  111816. + @Function FM_PCD_ModifyCounter
  111817. +
  111818. + @Description Writes a value to an enabled counter. Use "0" to reset the counter.
  111819. +
  111820. + @Param[in] ioc_fm_pcd_counters_params_t - The requested counter parameters.
  111821. +
  111822. + @Return 0 on success; Error code otherwise.
  111823. +*//***************************************************************************/
  111824. +#define FM_PCD_IOC_MODIFY_COUNTER _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(10), ioc_fm_pcd_counters_params_t)
  111825. +#define FM_PCD_IOC_SET_COUNTER FM_PCD_IOC_MODIFY_COUNTER
  111826. +#endif
  111827. +
  111828. +/**************************************************************************//**
  111829. + @Function FM_PCD_ForceIntr
  111830. +
  111831. + @Description Causes an interrupt event on the requested source.
  111832. +
  111833. + @Param[in] ioc_fm_pcd_exceptions - An exception to be forced.
  111834. +
  111835. + @Return 0 on success; error code if the exception is not enabled,
  111836. + or is not able to create interrupt.
  111837. +*//***************************************************************************/
  111838. +#define FM_PCD_IOC_FORCE_INTR _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(11), ioc_fm_pcd_exceptions)
  111839. +
  111840. +/**************************************************************************//**
  111841. + @Collection Definitions of coarse classification parameters as required by KeyGen
  111842. + (when coarse classification is the next engine after this scheme).
  111843. +*//***************************************************************************/
  111844. +#define IOC_FM_PCD_MAX_NUM_OF_CC_TREES 8
  111845. +#define IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS 16
  111846. +#define IOC_FM_PCD_MAX_NUM_OF_CC_UNITS 4
  111847. +#define IOC_FM_PCD_MAX_NUM_OF_KEYS 256
  111848. +#define IOC_FM_PCD_MAX_NUM_OF_FLOWS (4*KILOBYTE)
  111849. +#define IOC_FM_PCD_MAX_SIZE_OF_KEY 56
  111850. +#define IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP 16
  111851. +#define IOC_FM_PCD_LAST_KEY_INDEX 0xffff
  111852. +#define IOC_FM_PCD_MANIP_DSCP_VALUES 64
  111853. +/* @} */
  111854. +
  111855. +/**************************************************************************//**
  111856. + @Collection A set of definitions to allow protocol
  111857. + special option description.
  111858. +*//***************************************************************************/
  111859. +typedef uint32_t ioc_protocol_opt_t; /**< A general type to define a protocol option. */
  111860. +
  111861. +typedef ioc_protocol_opt_t ioc_eth_protocol_opt_t; /**< Ethernet protocol options. */
  111862. +#define IOC_ETH_BROADCAST 0x80000000 /**< Ethernet Broadcast. */
  111863. +#define IOC_ETH_MULTICAST 0x40000000 /**< Ethernet Multicast. */
  111864. +
  111865. +typedef ioc_protocol_opt_t ioc_vlan_protocol_opt_t; /**< Vlan protocol options. */
  111866. +#define IOC_VLAN_STACKED 0x20000000 /**< Stacked VLAN. */
  111867. +
  111868. +typedef ioc_protocol_opt_t ioc_mpls_protocol_opt_t; /**< MPLS protocol options. */
  111869. +#define IOC_MPLS_STACKED 0x10000000 /**< Stacked MPLS. */
  111870. +
  111871. +typedef ioc_protocol_opt_t ioc_ipv4_protocol_opt_t; /**< IPv4 protocol options. */
  111872. +#define IOC_IPV4_BROADCAST_1 0x08000000 /**< IPv4 Broadcast. */
  111873. +#define IOC_IPV4_MULTICAST_1 0x04000000 /**< IPv4 Multicast. */
  111874. +#define IOC_IPV4_UNICAST_2 0x02000000 /**< Tunneled IPv4 - Unicast. */
  111875. +#define IOC_IPV4_MULTICAST_BROADCAST_2 0x01000000 /**< Tunneled IPv4 - Broadcast/Multicast. */
  111876. +
  111877. +#define IOC_IPV4_FRAG_1 0x00000008 /**< IPV4 reassembly option.
  111878. + IPV4 Reassembly manipulation requires network
  111879. + environment with IPV4 header and IPV4_FRAG_1 option */
  111880. +
  111881. +typedef ioc_protocol_opt_t ioc_ipv6_protocol_opt_t; /**< IPv6 protocol options. */
  111882. +#define IOC_IPV6_MULTICAST_1 0x00800000 /**< IPv6 Multicast. */
  111883. +#define IOC_IPV6_UNICAST_2 0x00400000 /**< Tunneled IPv6 - Unicast. */
  111884. +#define IOC_IPV6_MULTICAST_2 0x00200000 /**< Tunneled IPv6 - Multicast. */
  111885. +
  111886. +#define IOC_IPV6_FRAG_1 0x00000004 /**< IPV6 reassembly option.
  111887. + IPV6 Reassembly manipulation requires network
  111888. + environment with IPV6 header and IPV6_FRAG_1 option */
  111889. +#if (DPAA_VERSION >= 11)
  111890. +typedef ioc_protocol_opt_t ioc_capwap_protocol_opt_t; /**< CAPWAP protocol options. */
  111891. +#define CAPWAP_FRAG_1 0x00000008 /**< CAPWAP reassembly option.
  111892. + CAPWAP Reassembly manipulation requires network
  111893. + environment with CAPWAP header and CAPWAP_FRAG_1 option;
  111894. + in case where fragment found, the fragment-extension offset
  111895. + may be found at 'shim2' (in parser-result). */
  111896. +#endif /* (DPAA_VERSION >= 11) */
  111897. +
  111898. +/* @} */
  111899. +
  111900. +#define IOC_FM_PCD_MANIP_MAX_HDR_SIZE 256
  111901. +#define IOC_FM_PCD_MANIP_DSCP_TO_VLAN_TRANS 64
  111902. +/**************************************************************************//**
  111903. + @Collection A set of definitions to support Header Manipulation selection.
  111904. +*//***************************************************************************/
  111905. +typedef uint32_t ioc_hdr_manip_flags_t; /**< A general type to define a HMan update command flags. */
  111906. +
  111907. +typedef ioc_hdr_manip_flags_t ioc_ipv4_hdr_manip_update_flags_t; /**< IPv4 protocol HMan update command flags. */
  111908. +
  111909. +#define IOC_HDR_MANIP_IPV4_TOS 0x80000000 /**< update TOS with the given value ('tos' field
  111910. + of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
  111911. +#define IOC_HDR_MANIP_IPV4_ID 0x40000000 /**< update IP ID with the given value ('id' field
  111912. + of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
  111913. +#define IOC_HDR_MANIP_IPV4_TTL 0x20000000 /**< Decrement TTL by 1 */
  111914. +#define IOC_HDR_MANIP_IPV4_SRC 0x10000000 /**< update IP source address with the given value
  111915. + ('src' field of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
  111916. +#define IOC_HDR_MANIP_IPV4_DST 0x08000000 /**< update IP destination address with the given value
  111917. + ('dst' field of ioc_fm_pcd_manip_hdr_field_update_ipv4_t) */
  111918. +
  111919. +typedef ioc_hdr_manip_flags_t ioc_ipv6_hdr_manip_update_flags_t; /**< IPv6 protocol HMan update command flags. */
  111920. +
  111921. +#define IOC_HDR_MANIP_IPV6_TC 0x80000000 /**< update Traffic Class address with the given value
  111922. + ('traffic_class' field of ioc_fm_pcd_manip_hdr_field_update_ipv6_t) */
  111923. +#define IOC_HDR_MANIP_IPV6_HL 0x40000000 /**< Decrement Hop Limit by 1 */
  111924. +#define IOC_HDR_MANIP_IPV6_SRC 0x20000000 /**< update IP source address with the given value
  111925. + ('src' field of ioc_fm_pcd_manip_hdr_field_update_ipv6_t) */
  111926. +#define IOC_HDR_MANIP_IPV6_DST 0x10000000 /**< update IP destination address with the given value
  111927. + ('dst' field of ioc_fm_pcd_manip_hdr_field_update_ipv6_t) */
  111928. +
  111929. +typedef ioc_hdr_manip_flags_t ioc_tcp_udp_hdr_manip_update_flags_t;/**< TCP/UDP protocol HMan update command flags. */
  111930. +
  111931. +#define IOC_HDR_MANIP_TCP_UDP_SRC 0x80000000 /**< update TCP/UDP source address with the given value
  111932. + ('src' field of ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t) */
  111933. +#define IOC_HDR_MANIP_TCP_UDP_DST 0x40000000 /**< update TCP/UDP destination address with the given value
  111934. + ('dst' field of ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t) */
  111935. +#define IOC_HDR_MANIP_TCP_UDP_CHECKSUM 0x20000000 /**< update TCP/UDP checksum */
  111936. +
  111937. +/* @} */
  111938. +
  111939. +/**************************************************************************//**
  111940. + @Description A type used for returning the order of the key extraction.
  111941. + each value in this array represents the index of the extraction
  111942. + command as defined by the user in the initialization extraction array.
  111943. + The valid size of this array is the user define number of extractions
  111944. + required (also marked by the second '0' in this array).
  111945. +*//***************************************************************************/
  111946. +typedef uint8_t ioc_fm_pcd_kg_key_order_t [IOC_FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
  111947. +
  111948. +/**************************************************************************//**
  111949. + @Description All PCD engines
  111950. + (must match enum e_FmPcdEngine defined in fm_pcd_ext.h)
  111951. +*//***************************************************************************/
  111952. +typedef enum ioc_fm_pcd_engine {
  111953. + e_IOC_FM_PCD_INVALID = 0, /**< Invalid PCD engine */
  111954. + e_IOC_FM_PCD_DONE, /**< No PCD Engine indicated */
  111955. + e_IOC_FM_PCD_KG, /**< KeyGen */
  111956. + e_IOC_FM_PCD_CC, /**< Coarse Classifier */
  111957. + e_IOC_FM_PCD_PLCR, /**< Policer */
  111958. + e_IOC_FM_PCD_PRS, /**< Parser */
  111959. +#if DPAA_VERSION >= 11
  111960. + e_IOC_FM_PCD_FR, /**< Frame Replicator */
  111961. +#endif /* DPAA_VERSION >= 11 */
  111962. + e_IOC_FM_PCD_HASH /**< Hash Table */
  111963. +} ioc_fm_pcd_engine;
  111964. +
  111965. +/**************************************************************************//**
  111966. + @Description An enum for selecting extraction by header types
  111967. + (Must match enum e_FmPcdExtractByHdrType defined in fm_pcd_ext.h)
  111968. +*//***************************************************************************/
  111969. +typedef enum ioc_fm_pcd_extract_by_hdr_type {
  111970. + e_IOC_FM_PCD_EXTRACT_FROM_HDR, /**< Extract bytes from header */
  111971. + e_IOC_FM_PCD_EXTRACT_FROM_FIELD, /**< Extract bytes from header field */
  111972. + e_IOC_FM_PCD_EXTRACT_FULL_FIELD /**< Extract a full field */
  111973. +} ioc_fm_pcd_extract_by_hdr_type;
  111974. +
  111975. +/**************************************************************************//**
  111976. + @Description An enum for selecting extraction source (when it is not the header)
  111977. + (Must match enum e_FmPcdExtractFrom defined in fm_pcd_ext.h)
  111978. +*//***************************************************************************/
  111979. +typedef enum ioc_fm_pcd_extract_from {
  111980. + e_IOC_FM_PCD_EXTRACT_FROM_FRAME_START, /**< KG & CC: Extract from beginning of frame */
  111981. + e_IOC_FM_PCD_EXTRACT_FROM_DFLT_VALUE, /**< KG only: Extract from a default value */
  111982. + e_IOC_FM_PCD_EXTRACT_FROM_CURR_END_OF_PARSE, /**< KG only: Extract from the point where parsing had finished */
  111983. + e_IOC_FM_PCD_EXTRACT_FROM_KEY, /**< CC only: Field where saved KEY */
  111984. + e_IOC_FM_PCD_EXTRACT_FROM_HASH, /**< CC only: Field where saved HASH */
  111985. + e_IOC_FM_PCD_EXTRACT_FROM_PARSE_RESULT, /**< KG & CC: Extract from the parser result */
  111986. + e_IOC_FM_PCD_EXTRACT_FROM_ENQ_FQID, /**< KG & CC: Extract from enqueue FQID */
  111987. + e_IOC_FM_PCD_EXTRACT_FROM_FLOW_ID /**< CC only: Field where saved Dequeue FQID */
  111988. +} ioc_fm_pcd_extract_from;
  111989. +
  111990. +/**************************************************************************//**
  111991. + @Description An enum for selecting extraction type
  111992. +*//***************************************************************************/
  111993. +typedef enum ioc_fm_pcd_extract_type {
  111994. + e_IOC_FM_PCD_EXTRACT_BY_HDR, /**< Extract according to header */
  111995. + e_IOC_FM_PCD_EXTRACT_NON_HDR, /**< Extract from data that is not the header */
  111996. + e_IOC_FM_PCD_KG_EXTRACT_PORT_PRIVATE_INFO /**< Extract private info as specified by user */
  111997. +} ioc_fm_pcd_extract_type;
  111998. +
  111999. +/**************************************************************************//**
  112000. + @Description An enum for selecting a default
  112001. +*//***************************************************************************/
  112002. +typedef enum ioc_fm_pcd_kg_extract_dflt_select {
  112003. + e_IOC_FM_PCD_KG_DFLT_GBL_0, /**< Default selection is KG register 0 */
  112004. + e_IOC_FM_PCD_KG_DFLT_GBL_1, /**< Default selection is KG register 1 */
  112005. + e_IOC_FM_PCD_KG_DFLT_PRIVATE_0, /**< Default selection is a per scheme register 0 */
  112006. + e_IOC_FM_PCD_KG_DFLT_PRIVATE_1, /**< Default selection is a per scheme register 1 */
  112007. + e_IOC_FM_PCD_KG_DFLT_ILLEGAL /**< Illegal selection */
  112008. +} ioc_fm_pcd_kg_extract_dflt_select;
  112009. +
  112010. +/**************************************************************************//**
  112011. + @Description Enumeration type defining all default groups - each group shares
  112012. + a default value, one of four user-initialized values.
  112013. +*//***************************************************************************/
  112014. +typedef enum ioc_fm_pcd_kg_known_fields_dflt_types {
  112015. + e_IOC_FM_PCD_KG_MAC_ADDR, /**< MAC Address */
  112016. + e_IOC_FM_PCD_KG_TCI, /**< TCI field */
  112017. + e_IOC_FM_PCD_KG_ENET_TYPE, /**< ENET Type */
  112018. + e_IOC_FM_PCD_KG_PPP_SESSION_ID, /**< PPP Session id */
  112019. + e_IOC_FM_PCD_KG_PPP_PROTOCOL_ID, /**< PPP Protocol id */
  112020. + e_IOC_FM_PCD_KG_MPLS_LABEL, /**< MPLS label */
  112021. + e_IOC_FM_PCD_KG_IP_ADDR, /**< IP addr */
  112022. + e_IOC_FM_PCD_KG_PROTOCOL_TYPE, /**< Protocol type */
  112023. + e_IOC_FM_PCD_KG_IP_TOS_TC, /**< TOS or TC */
  112024. + e_IOC_FM_PCD_KG_IPV6_FLOW_LABEL, /**< IPV6 flow label */
  112025. + e_IOC_FM_PCD_KG_IPSEC_SPI, /**< IPSEC SPI */
  112026. + e_IOC_FM_PCD_KG_L4_PORT, /**< L4 Port */
  112027. + e_IOC_FM_PCD_KG_TCP_FLAG, /**< TCP Flag */
  112028. + e_IOC_FM_PCD_KG_GENERIC_FROM_DATA, /**< grouping implemented by SW,
  112029. + any data extraction that is not the full
  112030. + field described above */
  112031. + e_IOC_FM_PCD_KG_GENERIC_FROM_DATA_NO_V, /**< grouping implemented by SW,
  112032. + any data extraction without validation */
  112033. + e_IOC_FM_PCD_KG_GENERIC_NOT_FROM_DATA /**< grouping implemented by SW,
  112034. + extraction from parser result or
  112035. + direct use of default value */
  112036. +} ioc_fm_pcd_kg_known_fields_dflt_types;
  112037. +
  112038. +/**************************************************************************//**
  112039. + @Description Enumeration type for defining header index for scenarios with
  112040. + multiple (tunneled) headers
  112041. +*//***************************************************************************/
  112042. +typedef enum ioc_fm_pcd_hdr_index {
  112043. + e_IOC_FM_PCD_HDR_INDEX_NONE = 0, /**< used when multiple headers not used, also
  112044. + to specify regular IP (not tunneled). */
  112045. + e_IOC_FM_PCD_HDR_INDEX_1, /**< may be used for VLAN, MPLS, tunneled IP */
  112046. + e_IOC_FM_PCD_HDR_INDEX_2, /**< may be used for MPLS, tunneled IP */
  112047. + e_IOC_FM_PCD_HDR_INDEX_3, /**< may be used for MPLS */
  112048. + e_IOC_FM_PCD_HDR_INDEX_LAST = 0xFF /**< may be used for VLAN, MPLS */
  112049. +} ioc_fm_pcd_hdr_index;
  112050. +
  112051. +/**************************************************************************//**
  112052. + @Description Enumeration type for selecting the policer profile functional type
  112053. +*//***************************************************************************/
  112054. +typedef enum ioc_fm_pcd_profile_type_selection {
  112055. + e_IOC_FM_PCD_PLCR_PORT_PRIVATE, /**< Port dedicated profile */
  112056. + e_IOC_FM_PCD_PLCR_SHARED /**< Shared profile (shared within partition) */
  112057. +} ioc_fm_pcd_profile_type_selection;
  112058. +
  112059. +/**************************************************************************//**
  112060. + @Description Enumeration type for selecting the policer profile algorithm
  112061. +*//***************************************************************************/
  112062. +typedef enum ioc_fm_pcd_plcr_algorithm_selection {
  112063. + e_IOC_FM_PCD_PLCR_PASS_THROUGH, /**< Policer pass through */
  112064. + e_IOC_FM_PCD_PLCR_RFC_2698, /**< Policer algorithm RFC 2698 */
  112065. + e_IOC_FM_PCD_PLCR_RFC_4115 /**< Policer algorithm RFC 4115 */
  112066. +} ioc_fm_pcd_plcr_algorithm_selection;
  112067. +
  112068. +/**************************************************************************//**
  112069. + @Description Enumeration type for selecting a policer profile color mode
  112070. +*//***************************************************************************/
  112071. +typedef enum ioc_fm_pcd_plcr_color_mode {
  112072. + e_IOC_FM_PCD_PLCR_COLOR_BLIND, /**< Color blind */
  112073. + e_IOC_FM_PCD_PLCR_COLOR_AWARE /**< Color aware */
  112074. +} ioc_fm_pcd_plcr_color_mode;
  112075. +
  112076. +/**************************************************************************//**
  112077. + @Description Enumeration type for selecting a policer profile color
  112078. +*//***************************************************************************/
  112079. +typedef enum ioc_fm_pcd_plcr_color {
  112080. + e_IOC_FM_PCD_PLCR_GREEN, /**< Green */
  112081. + e_IOC_FM_PCD_PLCR_YELLOW, /**< Yellow */
  112082. + e_IOC_FM_PCD_PLCR_RED, /**< Red */
  112083. + e_IOC_FM_PCD_PLCR_OVERRIDE /**< Color override */
  112084. +} ioc_fm_pcd_plcr_color;
  112085. +
  112086. +/**************************************************************************//**
  112087. + @Description Enumeration type for selecting the policer profile packet frame length selector
  112088. +*//***************************************************************************/
  112089. +typedef enum ioc_fm_pcd_plcr_frame_length_select {
  112090. + e_IOC_FM_PCD_PLCR_L2_FRM_LEN, /**< L2 frame length */
  112091. + e_IOC_FM_PCD_PLCR_L3_FRM_LEN, /**< L3 frame length */
  112092. + e_IOC_FM_PCD_PLCR_L4_FRM_LEN, /**< L4 frame length */
  112093. + e_IOC_FM_PCD_PLCR_FULL_FRM_LEN /**< Full frame length */
  112094. +} ioc_fm_pcd_plcr_frame_length_select;
  112095. +
  112096. +/**************************************************************************//**
  112097. + @Description Enumeration type for selecting roll-back frame
  112098. +*//***************************************************************************/
  112099. +typedef enum ioc_fm_pcd_plcr_roll_back_frame_select {
  112100. + e_IOC_FM_PCD_PLCR_ROLLBACK_L2_FRM_LEN, /**< Rollback L2 frame length */
  112101. + e_IOC_FM_PCD_PLCR_ROLLBACK_FULL_FRM_LEN /**< Rollback Full frame length */
  112102. +} ioc_fm_pcd_plcr_roll_back_frame_select;
  112103. +
  112104. +/**************************************************************************//**
  112105. + @Description Enumeration type for selecting the policer profile packet or byte mode
  112106. +*//***************************************************************************/
  112107. +typedef enum ioc_fm_pcd_plcr_rate_mode {
  112108. + e_IOC_FM_PCD_PLCR_BYTE_MODE, /**< Byte mode */
  112109. + e_IOC_FM_PCD_PLCR_PACKET_MODE /**< Packet mode */
  112110. +} ioc_fm_pcd_plcr_rate_mode;
  112111. +
  112112. +/**************************************************************************//**
  112113. + @Description Enumeration type for defining action of frame
  112114. +*//***************************************************************************/
  112115. +typedef enum ioc_fm_pcd_done_action {
  112116. + e_IOC_FM_PCD_ENQ_FRAME = 0, /**< Enqueue frame */
  112117. + e_IOC_FM_PCD_DROP_FRAME /**< Drop frame */
  112118. +} ioc_fm_pcd_done_action;
  112119. +
  112120. +/**************************************************************************//**
  112121. + @Description Enumeration type for selecting the policer counter
  112122. +*//***************************************************************************/
  112123. +typedef enum ioc_fm_pcd_plcr_profile_counters {
  112124. + e_IOC_FM_PCD_PLCR_PROFILE_GREEN_PACKET_TOTAL_COUNTER, /**< Green packets counter */
  112125. + e_IOC_FM_PCD_PLCR_PROFILE_YELLOW_PACKET_TOTAL_COUNTER, /**< Yellow packets counter */
  112126. + e_IOC_FM_PCD_PLCR_PROFILE_RED_PACKET_TOTAL_COUNTER, /**< Red packets counter */
  112127. + e_IOC_FM_PCD_PLCR_PROFILE_RECOLOURED_YELLOW_PACKET_TOTAL_COUNTER, /**< Recolored yellow packets counter */
  112128. + e_IOC_FM_PCD_PLCR_PROFILE_RECOLOURED_RED_PACKET_TOTAL_COUNTER /**< Recolored red packets counter */
  112129. +} ioc_fm_pcd_plcr_profile_counters;
  112130. +
  112131. +/**************************************************************************//**
  112132. + @Description Enumeration type for selecting the PCD action after extraction
  112133. +*//***************************************************************************/
  112134. +typedef enum ioc_fm_pcd_action {
  112135. + e_IOC_FM_PCD_ACTION_NONE, /**< NONE */
  112136. + e_IOC_FM_PCD_ACTION_EXACT_MATCH, /**< Exact match on the selected extraction*/
  112137. + e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP /**< Indexed lookup on the selected extraction*/
  112138. +} ioc_fm_pcd_action;
  112139. +
  112140. +/**************************************************************************//**
  112141. + @Description Enumeration type for selecting type of insert manipulation
  112142. +*//***************************************************************************/
  112143. +typedef enum ioc_fm_pcd_manip_hdr_insrt_type {
  112144. + e_IOC_FM_PCD_MANIP_INSRT_GENERIC, /**< Insert according to offset & size */
  112145. + e_IOC_FM_PCD_MANIP_INSRT_BY_HDR, /**< Insert according to protocol */
  112146. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  112147. + e_IOC_FM_PCD_MANIP_INSRT_BY_TEMPLATE /**< Insert template to start of frame */
  112148. +#endif /* FM_CAPWAP_SUPPORT */
  112149. +} ioc_fm_pcd_manip_hdr_insrt_type;
  112150. +
  112151. +/**************************************************************************//**
  112152. + @Description Enumeration type for selecting type of remove manipulation
  112153. +*//***************************************************************************/
  112154. +typedef enum ioc_fm_pcd_manip_hdr_rmv_type {
  112155. + e_IOC_FM_PCD_MANIP_RMV_GENERIC, /**< Remove according to offset & size */
  112156. + e_IOC_FM_PCD_MANIP_RMV_BY_HDR /**< Remove according to offset & size */
  112157. +} ioc_fm_pcd_manip_hdr_rmv_type;
  112158. +
  112159. +/**************************************************************************//**
  112160. + @Description An enum for selecting specific L2 fields removal
  112161. +*//***************************************************************************/
  112162. +typedef enum ioc_fm_pcd_manip_hdr_rmv_specific_l2 {
  112163. + e_IOC_FM_PCD_MANIP_HDR_RMV_ETHERNET, /**< Ethernet/802.3 MAC */
  112164. + e_IOC_FM_PCD_MANIP_HDR_RMV_STACKED_QTAGS, /**< stacked QTags */
  112165. + e_IOC_FM_PCD_MANIP_HDR_RMV_ETHERNET_AND_MPLS, /**< MPLS and Ethernet/802.3 MAC header until
  112166. + the header which follows the MPLS header */
  112167. + e_IOC_FM_PCD_MANIP_HDR_RMV_MPLS /**< Remove MPLS header (Unlimited MPLS labels) */
  112168. +} ioc_fm_pcd_manip_hdr_rmv_specific_l2;
  112169. +
  112170. +/**************************************************************************//**
  112171. + @Description Enumeration type for selecting specific fields updates
  112172. +*//***************************************************************************/
  112173. +typedef enum ioc_fm_pcd_manip_hdr_field_update_type {
  112174. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN, /**< VLAN updates */
  112175. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4, /**< IPV4 updates */
  112176. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6, /**< IPV6 updates */
  112177. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP, /**< TCP_UDP updates */
  112178. +} ioc_fm_pcd_manip_hdr_field_update_type;
  112179. +
  112180. +/**************************************************************************//**
  112181. + @Description Enumeration type for selecting VLAN updates
  112182. +*//***************************************************************************/
  112183. +typedef enum ioc_fm_pcd_manip_hdr_field_update_vlan {
  112184. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_VPRI, /**< Replace VPri of outer most VLAN tag. */
  112185. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN /**< DSCP to VLAN priority bits translation */
  112186. +} ioc_fm_pcd_manip_hdr_field_update_vlan;
  112187. +
  112188. +/**************************************************************************//**
  112189. + @Description Enumeration type for selecting specific L2 fields removal
  112190. +*//***************************************************************************/
  112191. +typedef enum ioc_fm_pcd_manip_hdr_insrt_specific_l2 {
  112192. + e_IOC_FM_PCD_MANIP_HDR_INSRT_MPLS /**< Insert MPLS header (Unlimited MPLS labels) */
  112193. +} ioc_fm_pcd_manip_hdr_insrt_specific_l2;
  112194. +
  112195. +#if (DPAA_VERSION >= 11)
  112196. +/**************************************************************************//**
  112197. + @Description Enumeration type for selecting QoS mapping mode
  112198. +
  112199. + Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE'
  112200. + User should instruct the port to read the parser-result
  112201. +*//***************************************************************************/
  112202. +typedef enum ioc_fm_pcd_manip_hdr_qos_mapping_mode {
  112203. + e_IOC_FM_PCD_MANIP_HDR_QOS_MAPPING_NONE = 0, /**< No mapping, QoS field will not be changed */
  112204. + e_IOC_FM_PCD_MANIP_HDR_QOS_MAPPING_AS_IS, /**< QoS field will be overwritten by the last byte in the parser-result. */
  112205. +} ioc_fm_pcd_manip_hdr_qos_mapping_mode;
  112206. +
  112207. +/**************************************************************************//**
  112208. + @Description Enumeration type for selecting QoS source
  112209. +
  112210. + Note: In all cases except 'e_FM_PCD_MANIP_HDR_QOS_SRC_NONE'
  112211. + User should left room for the parser-result on input/output buffer
  112212. + and instruct the port to read/write the parser-result to the buffer (RPD should be set)
  112213. +*//***************************************************************************/
  112214. +typedef enum ioc_fm_pcd_manip_hdr_qos_src {
  112215. + e_IOC_FM_PCD_MANIP_HDR_QOS_SRC_NONE = 0, /**< TODO */
  112216. + e_IOC_FM_PCD_MANIP_HDR_QOS_SRC_USER_DEFINED, /**< QoS will be taken from the last byte in the parser-result. */
  112217. +} ioc_fm_pcd_manip_hdr_qos_src;
  112218. +#endif /* (DPAA_VERSION >= 11) */
  112219. +
  112220. +/**************************************************************************//**
  112221. + @Description Enumeration type for selecting type of header insertion
  112222. +*//***************************************************************************/
  112223. +typedef enum ioc_fm_pcd_manip_hdr_insrt_by_hdr_type {
  112224. + e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2, /**< Specific L2 fields insertion */
  112225. +#if (DPAA_VERSION >= 11)
  112226. + e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_IP, /**< IP insertion */
  112227. + e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_UDP, /**< UDP insertion */
  112228. + e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, /**< UDP lite insertion */
  112229. + e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP /**< CAPWAP insertion */
  112230. +#endif /* (DPAA_VERSION >= 11) */
  112231. +} ioc_fm_pcd_manip_hdr_insrt_by_hdr_type;
  112232. +
  112233. +/**************************************************************************//**
  112234. + @Description Enumeration type for selecting specific custom command
  112235. +*//***************************************************************************/
  112236. +typedef enum ioc_fm_pcd_manip_hdr_custom_type {
  112237. + e_IOC_FM_PCD_MANIP_HDR_CUSTOM_IP_REPLACE, /**< Replace IPv4/IPv6 */
  112238. +} ioc_fm_pcd_manip_hdr_custom_type;
  112239. +
  112240. +/**************************************************************************//**
  112241. + @Description Enumeration type for selecting specific custom command
  112242. +*//***************************************************************************/
  112243. +typedef enum ioc_fm_pcd_manip_hdr_custom_ip_replace {
  112244. + e_IOC_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV4_BY_IPV6, /**< Replace IPv4 by IPv6 */
  112245. + e_IOC_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 /**< Replace IPv6 by IPv4 */
  112246. +} ioc_fm_pcd_manip_hdr_custom_ip_replace;
  112247. +
  112248. +/**************************************************************************//**
  112249. + @Description Enumeration type for selecting type of header removal
  112250. +*//***************************************************************************/
  112251. +typedef enum ioc_fm_pcd_manip_hdr_rmv_by_hdr_type {
  112252. + e_IOC_FM_PCD_MANIP_RMV_BY_HDR_SPECIFIC_L2 = 0, /**< Specific L2 fields removal */
  112253. +#if (DPAA_VERSION >= 11)
  112254. + e_IOC_FM_PCD_MANIP_RMV_BY_HDR_CAPWAP, /**< CAPWAP removal */
  112255. +#endif /* (DPAA_VERSION >= 11) */
  112256. +#if (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  112257. + e_IOC_FM_PCD_MANIP_RMV_BY_HDR_FROM_START, /**< Locate from data that is not the header */
  112258. +#endif /* (DPAA_VERSION >= 11) || ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT)) */
  112259. +} ioc_fm_pcd_manip_hdr_rmv_by_hdr_type;
  112260. +
  112261. +/**************************************************************************//**
  112262. + @Description Enumeration type for selecting type of timeout mode
  112263. +*//***************************************************************************/
  112264. +typedef enum ioc_fm_pcd_manip_reassem_time_out_mode {
  112265. + e_IOC_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAMES, /**< Limits the time of the reassembly process
  112266. + from the first fragment to the last */
  112267. + e_IOC_FM_PCD_MANIP_TIME_OUT_BETWEEN_FRAG /**< Limits the time of receiving the fragment */
  112268. +} ioc_fm_pcd_manip_reassem_time_out_mode;
  112269. +
  112270. +/**************************************************************************//**
  112271. + @Description Enumeration type for selecting type of WaysNumber mode
  112272. +*//***************************************************************************/
  112273. +typedef enum ioc_fm_pcd_manip_reassem_ways_number {
  112274. + e_IOC_FM_PCD_MANIP_ONE_WAY_HASH = 1, /**< One way hash */
  112275. + e_IOC_FM_PCD_MANIP_TWO_WAYS_HASH, /**< Two ways hash */
  112276. + e_IOC_FM_PCD_MANIP_THREE_WAYS_HASH, /**< Three ways hash */
  112277. + e_IOC_FM_PCD_MANIP_FOUR_WAYS_HASH, /**< Four ways hash */
  112278. + e_IOC_FM_PCD_MANIP_FIVE_WAYS_HASH, /**< Five ways hash */
  112279. + e_IOC_FM_PCD_MANIP_SIX_WAYS_HASH, /**< Six ways hash */
  112280. + e_IOC_FM_PCD_MANIP_SEVEN_WAYS_HASH, /**< Seven ways hash */
  112281. + e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH /**< Eight ways hash */
  112282. +} ioc_fm_pcd_manip_reassem_ways_number;
  112283. +
  112284. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  112285. +/**************************************************************************//**
  112286. + @Description Enumeration type for selecting type of statistics mode
  112287. +*//***************************************************************************/
  112288. +typedef enum ioc_fm_pcd_stats {
  112289. + e_IOC_FM_PCD_STATS_PER_FLOWID = 0 /**< Flow ID is used as index for getting statistics */
  112290. +} ioc_fm_pcd_stats;
  112291. +#endif
  112292. +
  112293. +/**************************************************************************//**
  112294. + @Description Enumeration type for selecting manipulation type
  112295. +*//***************************************************************************/
  112296. +typedef enum ioc_fm_pcd_manip_type {
  112297. + e_IOC_FM_PCD_MANIP_HDR = 0, /**< Header manipulation */
  112298. + e_IOC_FM_PCD_MANIP_REASSEM, /**< Reassembly */
  112299. + e_IOC_FM_PCD_MANIP_FRAG, /**< Fragmentation */
  112300. + e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD /**< Special Offloading */
  112301. +} ioc_fm_pcd_manip_type;
  112302. +
  112303. +/**************************************************************************//**
  112304. + @Description Enumeration type for selecting type of statistics mode
  112305. +*//***************************************************************************/
  112306. +typedef enum ioc_fm_pcd_cc_stats_mode {
  112307. + e_IOC_FM_PCD_CC_STATS_MODE_NONE = 0, /**< No statistics support */
  112308. + e_IOC_FM_PCD_CC_STATS_MODE_FRAME, /**< Frame count statistics */
  112309. + e_IOC_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME, /**< Byte and frame count statistics */
  112310. +#if (DPAA_VERSION >= 11)
  112311. + e_IOC_FM_PCD_CC_STATS_MODE_RMON, /**< Byte and frame length range count statistics */
  112312. +#endif /* (DPAA_VERSION >= 11) */
  112313. +} ioc_fm_pcd_cc_stats_mode;
  112314. +
  112315. +/**************************************************************************//**
  112316. + @Description Enumeration type for determining the action in case an IP packet
  112317. + is larger than MTU but its DF (Don't Fragment) bit is set.
  112318. +*//***************************************************************************/
  112319. +typedef enum ioc_fm_pcd_manip_dont_frag_action {
  112320. + e_IOC_FM_PCD_MANIP_DISCARD_PACKET = 0, /**< Discard packet */
  112321. + e_IOC_FM_PCD_MANIP_ENQ_TO_ERR_Q_OR_DISCARD_PACKET = e_IOC_FM_PCD_MANIP_DISCARD_PACKET,
  112322. + /**< Obsolete, cannot enqueue to error queue;
  112323. + In practice, selects to discard packets;
  112324. + Will be removed in the future */
  112325. + e_IOC_FM_PCD_MANIP_FRAGMENT_PACKECT, /**< Fragment packet and continue normal processing */
  112326. + e_IOC_FM_PCD_MANIP_CONTINUE_WITHOUT_FRAG /**< Continue normal processing without fragmenting the packet */
  112327. +} ioc_fm_pcd_manip_dont_frag_action;
  112328. +
  112329. +/**************************************************************************//**
  112330. + @Description Enumeration type for selecting type of special offload manipulation
  112331. +*//***************************************************************************/
  112332. +typedef enum ioc_fm_pcd_manip_special_offload_type {
  112333. + e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC, /**< IPSec offload manipulation */
  112334. +#if (DPAA_VERSION >= 11)
  112335. + e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP /**< CAPWAP offload manipulation */
  112336. +#endif /* (DPAA_VERSION >= 11) */
  112337. +} ioc_fm_pcd_manip_special_offload_type;
  112338. +
  112339. +/**************************************************************************//**
  112340. + @Description A union of protocol dependent special options
  112341. + (Must match union u_FmPcdHdrProtocolOpt defined in fm_pcd_ext.h)
  112342. +*//***************************************************************************/
  112343. +typedef union ioc_fm_pcd_hdr_protocol_opt_u {
  112344. + ioc_eth_protocol_opt_t eth_opt; /**< Ethernet options */
  112345. + ioc_vlan_protocol_opt_t vlan_opt; /**< Vlan options */
  112346. + ioc_mpls_protocol_opt_t mpls_opt; /**< MPLS options */
  112347. + ioc_ipv4_protocol_opt_t ipv4_opt; /**< IPv4 options */
  112348. + ioc_ipv6_protocol_opt_t ipv6_opt; /**< IPv6 options */
  112349. +#if (DPAA_VERSION >= 11)
  112350. + ioc_capwap_protocol_opt_t capwap_opt; /**< CAPWAP options */
  112351. +#endif /* (DPAA_VERSION >= 11) */
  112352. +} ioc_fm_pcd_hdr_protocol_opt_u;
  112353. +
  112354. +/**************************************************************************//**
  112355. + @Description A union holding all known protocol fields
  112356. +*//***************************************************************************/
  112357. +typedef union ioc_fm_pcd_fields_u {
  112358. + ioc_header_field_eth_t eth; /**< Ethernet */
  112359. + ioc_header_field_vlan_t vlan; /**< VLAN */
  112360. + ioc_header_field_llc_snap_t llc_snap; /**< LLC SNAP */
  112361. + ioc_header_field_pppoe_t pppoe; /**< PPPoE */
  112362. + ioc_header_field_mpls_t mpls; /**< MPLS */
  112363. + ioc_header_field_ip_t ip; /**< IP */
  112364. + ioc_header_field_ipv4_t ipv4; /**< IPv4 */
  112365. + ioc_header_field_ipv6_t ipv6; /**< IPv6 */
  112366. + ioc_header_field_udp_t udp; /**< UDP */
  112367. + ioc_header_field_udp_lite_t udp_lite; /**< UDP_Lite */
  112368. + ioc_header_field_tcp_t tcp; /**< TCP */
  112369. + ioc_header_field_sctp_t sctp; /**< SCTP */
  112370. + ioc_header_field_dccp_t dccp; /**< DCCP */
  112371. + ioc_header_field_gre_t gre; /**< GRE */
  112372. + ioc_header_field_minencap_t minencap; /**< Minimal Encapsulation */
  112373. + ioc_header_field_ipsec_ah_t ipsec_ah; /**< IPSec AH */
  112374. + ioc_header_field_ipsec_esp_t ipsec_esp; /**< IPSec ESP */
  112375. + ioc_header_field_udp_encap_esp_t udp_encap_esp; /**< UDP Encapsulation ESP */
  112376. +} ioc_fm_pcd_fields_u;
  112377. +
  112378. +/**************************************************************************//**
  112379. + @Description Parameters for defining header extraction for key generation
  112380. +*//***************************************************************************/
  112381. +typedef struct ioc_fm_pcd_from_hdr_t {
  112382. + uint8_t size; /**< Size in byte */
  112383. + uint8_t offset; /**< Byte offset */
  112384. +} ioc_fm_pcd_from_hdr_t;
  112385. +
  112386. +/**************************************************************************//**
  112387. + @Description Parameters for defining field extraction for key generation
  112388. +*//***************************************************************************/
  112389. +typedef struct ioc_fm_pcd_from_field_t {
  112390. + ioc_fm_pcd_fields_u field; /**< Field selection */
  112391. + uint8_t size; /**< Size in byte */
  112392. + uint8_t offset; /**< Byte offset */
  112393. +} ioc_fm_pcd_from_field_t;
  112394. +
  112395. +/**************************************************************************//**
  112396. + @Description Parameters for defining a single network environment unit
  112397. + A distinction unit should be defined if it will later be used
  112398. + by one or more PCD engines to distinguish between flows.
  112399. + (Must match struct t_FmPcdDistinctionUnit defined in fm_pcd_ext.h)
  112400. +*//***************************************************************************/
  112401. +typedef struct ioc_fm_pcd_distinction_unit_t {
  112402. + struct {
  112403. + ioc_net_header_type hdr; /**< One of the headers supported by the FM */
  112404. + ioc_fm_pcd_hdr_protocol_opt_u opt; /**< Select only one option! */
  112405. + } hdrs[IOC_FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];
  112406. +} ioc_fm_pcd_distinction_unit_t;
  112407. +
  112408. +/**************************************************************************//**
  112409. + @Description Parameters for defining all different distinction units supported
  112410. + by a specific PCD Network Environment Characteristics module.
  112411. +
  112412. + Each unit represent a protocol or a group of protocols that may
  112413. + be used later by the different PCD engines to distinguish between flows.
  112414. + (Must match struct t_FmPcdNetEnvParams defined in fm_pcd_ext.h)
  112415. +*//***************************************************************************/
  112416. +typedef struct ioc_fm_pcd_net_env_params_t {
  112417. + uint8_t num_of_distinction_units;/**< Number of different units to be identified */
  112418. + ioc_fm_pcd_distinction_unit_t units[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
  112419. + /**< An array of num_of_distinction_units of the
  112420. + different units to be identified */
  112421. + void *id; /**< Output parameter; Returns the net-env Id to be used */
  112422. +} ioc_fm_pcd_net_env_params_t;
  112423. +
  112424. +/**************************************************************************//**
  112425. + @Description Parameters for defining a single extraction action when
  112426. + creating a key
  112427. +*//***************************************************************************/
  112428. +typedef struct ioc_fm_pcd_extract_entry_t {
  112429. + ioc_fm_pcd_extract_type type; /**< Extraction type select */
  112430. + union {
  112431. + struct {
  112432. + ioc_net_header_type hdr; /**< Header selection */
  112433. + bool ignore_protocol_validation;
  112434. + /**< Ignore protocol validation */
  112435. + ioc_fm_pcd_hdr_index hdr_index; /**< Relevant only for MPLS, VLAN and tunneled
  112436. + IP. Otherwise should be cleared.*/
  112437. + ioc_fm_pcd_extract_by_hdr_type type; /**< Header extraction type select */
  112438. + union {
  112439. + ioc_fm_pcd_from_hdr_t from_hdr; /**< Extract bytes from header parameters */
  112440. + ioc_fm_pcd_from_field_t from_field; /**< Extract bytes from field parameters */
  112441. + ioc_fm_pcd_fields_u full_field; /**< Extract full field parameters */
  112442. + } extract_by_hdr_type;
  112443. + } extract_by_hdr; /**< Used when type = e_IOC_FM_PCD_KG_EXTRACT_BY_HDR */
  112444. + struct {
  112445. + ioc_fm_pcd_extract_from src; /**< Non-header extraction source */
  112446. + ioc_fm_pcd_action action; /**< Relevant for CC Only */
  112447. + uint16_t ic_indx_mask; /**< Relevant only for CC when
  112448. + action = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP;
  112449. + Note that the number of bits that are set within
  112450. + this mask must be log2 of the CC-node 'num_of_keys'.
  112451. + Note that the mask cannot be set on the lower bits. */
  112452. + uint8_t offset; /**< Byte offset */
  112453. + uint8_t size; /**< Size in bytes */
  112454. + } extract_non_hdr; /**< Used when type = e_IOC_FM_PCD_KG_EXTRACT_NON_HDR */
  112455. + } extract_params;
  112456. +} ioc_fm_pcd_extract_entry_t;
  112457. +
  112458. +/**************************************************************************//**
  112459. + @Description A structure for defining masks for each extracted
  112460. + field in the key.
  112461. +*//***************************************************************************/
  112462. +typedef struct ioc_fm_pcd_kg_extract_mask_t {
  112463. + uint8_t extract_array_index; /**< Index in the extraction array, as initialized by user */
  112464. + uint8_t offset; /**< Byte offset */
  112465. + uint8_t mask; /**< A byte mask (selected bits will be ignored) */
  112466. +} ioc_fm_pcd_kg_extract_mask_t;
  112467. +
  112468. +/**************************************************************************//**
  112469. + @Description A structure for defining default selection per groups
  112470. + of fields
  112471. +*//***************************************************************************/
  112472. +typedef struct ioc_fm_pcd_kg_extract_dflt_t {
  112473. + ioc_fm_pcd_kg_known_fields_dflt_types type; /**< Default type select*/
  112474. + ioc_fm_pcd_kg_extract_dflt_select dflt_select; /**< Default register select */
  112475. +} ioc_fm_pcd_kg_extract_dflt_t;
  112476. +
  112477. +
  112478. +/**************************************************************************//**
  112479. + @Description A structure for defining all parameters needed for
  112480. + generation a key and using a hash function
  112481. +*//***************************************************************************/
  112482. +typedef struct ioc_fm_pcd_kg_key_extract_and_hash_params_t {
  112483. + uint32_t private_dflt0; /**< Scheme default register 0 */
  112484. + uint32_t private_dflt1; /**< Scheme default register 1 */
  112485. + uint8_t num_of_used_extracts; /**< defines the valid size of the following array */
  112486. + ioc_fm_pcd_extract_entry_t extract_array [IOC_FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];
  112487. + /**< An array of extraction definitions. */
  112488. + uint8_t num_of_used_dflts; /**< defines the valid size of the following array */
  112489. + ioc_fm_pcd_kg_extract_dflt_t dflts[IOC_FM_PCD_KG_NUM_OF_DEFAULT_GROUPS];
  112490. + /**< For each extraction used in this scheme, specify the required
  112491. + default register to be used when header is not found.
  112492. + types not specified in this array will get undefined value. */
  112493. + uint8_t num_of_used_masks; /**< Defines the valid size of the following array */
  112494. + ioc_fm_pcd_kg_extract_mask_t masks[IOC_FM_PCD_KG_NUM_OF_EXTRACT_MASKS];
  112495. + uint8_t hash_shift; /**< Hash result right shift.
  112496. + Selects the 24 bits out of the 64 hash result.
  112497. + 0 means using the 24 LSB's, otherwise use the
  112498. + 24 LSB's after shifting right.*/
  112499. + uint32_t hash_distribution_num_of_fqids; /**< must be > 1 and a power of 2. Represents the range
  112500. + of queues for the key and hash functionality */
  112501. + uint8_t hash_distribution_fqids_shift; /**< selects the FQID bits that will be effected by the hash */
  112502. + bool symmetric_hash; /**< TRUE to generate the same hash for frames with swapped source and
  112503. + destination fields on all layers; If TRUE, driver will check that for
  112504. + all layers, if SRC extraction is selected, DST extraction must also be
  112505. + selected, and vice versa. */
  112506. +} ioc_fm_pcd_kg_key_extract_and_hash_params_t;
  112507. +
  112508. +/**************************************************************************//**
  112509. + @Description A structure of parameters for defining a single
  112510. + Qid mask (extracted OR).
  112511. +*//***************************************************************************/
  112512. +typedef struct ioc_fm_pcd_kg_extracted_or_params_t {
  112513. + ioc_fm_pcd_extract_type type; /**< Extraction type select */
  112514. + union {
  112515. + struct { /**< used when type = e_IOC_FM_PCD_KG_EXTRACT_BY_HDR */
  112516. + ioc_net_header_type hdr;
  112517. + ioc_fm_pcd_hdr_index hdr_index; /**< Relevant only for MPLS, VLAN and tunneled
  112518. + IP. Otherwise should be cleared.*/
  112519. + bool ignore_protocol_validation;
  112520. +
  112521. + } extract_by_hdr;
  112522. + ioc_fm_pcd_extract_from src; /**< used when type = e_IOC_FM_PCD_KG_EXTRACT_NON_HDR */
  112523. + } extract_params;
  112524. + uint8_t extraction_offset; /**< Offset for extraction */
  112525. + ioc_fm_pcd_kg_extract_dflt_select dflt_value; /**< Select register from which extraction is taken if
  112526. + field not found */
  112527. + uint8_t mask; /**< Mask LSB byte of extraction (specified bits are ignored) */
  112528. + uint8_t bit_offset_in_fqid; /**< 0-31, Selects which bits of the 24 FQID bits to effect using
  112529. + the extracted byte; Assume byte is placed as the 8 MSB's in
  112530. + a 32 bit word where the lower bits
  112531. + are the FQID; i.e if bitOffsetInFqid=1 than its LSB
  112532. + will effect the FQID MSB, if bitOffsetInFqid=24 than the
  112533. + extracted byte will effect the 8 LSB's of the FQID,
  112534. + if bitOffsetInFqid=31 than the byte's MSB will effect
  112535. + the FQID's LSB; 0 means - no effect on FQID;
  112536. + Note that one, and only one of
  112537. + bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
  112538. + extracted byte must effect either FQID or Policer profile).*/
  112539. + uint8_t bit_offset_in_plcr_profile;
  112540. + /**< 0-15, Selects which bits of the 8 policer profile id bits to
  112541. + effect using the extracted byte; Assume byte is placed
  112542. + as the 8 MSB's in a 16 bit word where the lower bits
  112543. + are the policer profile id; i.e if bitOffsetInPlcrProfile=1
  112544. + than its LSB will effect the profile MSB, if bitOffsetInFqid=8
  112545. + than the extracted byte will effect the whole policer profile id,
  112546. + if bitOffsetInFqid=15 than the byte's MSB will effect
  112547. + the Policer Profile id's LSB;
  112548. + 0 means - no effect on policer profile; Note that one, and only one of
  112549. + bitOffsetInFqid or bitOffsetInPlcrProfile must be set (i.e,
  112550. + extracted byte must effect either FQID or Policer profile).*/
  112551. +} ioc_fm_pcd_kg_extracted_or_params_t;
  112552. +
  112553. +/**************************************************************************//**
  112554. + @Description A structure for configuring scheme counter
  112555. +*//***************************************************************************/
  112556. +typedef struct ioc_fm_pcd_kg_scheme_counter_t {
  112557. + bool update; /**< FALSE to keep the current counter state
  112558. + and continue from that point, TRUE to update/reset
  112559. + the counter when the scheme is written. */
  112560. + uint32_t value; /**< If update=TRUE, this value will be written into the
  112561. + counter; clear this field to reset the counter. */
  112562. +} ioc_fm_pcd_kg_scheme_counter_t;
  112563. +
  112564. +
  112565. +/**************************************************************************//**
  112566. + @Description A structure for retrieving FMKG_SE_SPC
  112567. +*//***************************************************************************/
  112568. +typedef struct ioc_fm_pcd_kg_scheme_spc_t {
  112569. + uint32_t val; /**< return value */
  112570. + void *id; /**< scheme handle */
  112571. +} ioc_fm_pcd_kg_scheme_spc_t;
  112572. +
  112573. +/**************************************************************************//**
  112574. + @Description A structure for defining policer profile parameters as required by keygen
  112575. + (when policer is the next engine after this scheme).
  112576. + (Must match struct t_FmPcdKgPlcrProfile defined in fm_pcd_ext.h)
  112577. +*//***************************************************************************/
  112578. +typedef struct ioc_fm_pcd_kg_plcr_profile_t {
  112579. + bool shared_profile; /**< TRUE if this profile is shared between ports
  112580. + (i.e. managed by master partition) May not be TRUE
  112581. + if profile is after Coarse Classification*/
  112582. + bool direct; /**< If TRUE, direct_relative_profile_id only selects the profile
  112583. + id, if FALSE fqid_offset_relative_profile_id_base is used
  112584. + together with fqid_offset_shift and num_of_profiles
  112585. + parameters, to define a range of profiles from
  112586. + which the KeyGen result will determine the
  112587. + destination policer profile. */
  112588. + union {
  112589. + uint16_t direct_relative_profile_id; /**< Used if 'direct' is TRUE, to select policer profile.
  112590. + This parameter should indicate the policer profile offset within the port's
  112591. + policer profiles or SHARED window. */
  112592. + struct {
  112593. + uint8_t fqid_offset_shift; /**< Shift of KG results without the qid base */
  112594. + uint8_t fqid_offset_relative_profile_id_base;
  112595. + /**< OR of KG results without the qid base
  112596. + This parameter should indicate the policer profile
  112597. + offset within the port's policer profiles window
  112598. + or SHARED window depends on shared_profile */
  112599. + uint8_t num_of_profiles; /**< Range of profiles starting at base */
  112600. + } indirect_profile; /**< Indirect profile parameters */
  112601. + } profile_select; /**< Direct/indirect profile selection and parameters */
  112602. +} ioc_fm_pcd_kg_plcr_profile_t;
  112603. +
  112604. +#if DPAA_VERSION >= 11
  112605. +/**************************************************************************//**
  112606. + @Description Parameters for configuring a storage profile for a KeyGen scheme.
  112607. +*//***************************************************************************/
  112608. +typedef struct ioc_fm_pcd_kg_storage_profile_t {
  112609. + bool direct; /**< If TRUE, directRelativeProfileId only selects the
  112610. + profile id;
  112611. + If FALSE, fqidOffsetRelativeProfileIdBase is used
  112612. + together with fqidOffsetShift and numOfProfiles
  112613. + parameters to define a range of profiles from which
  112614. + the KeyGen result will determine the destination
  112615. + storage profile. */
  112616. + union {
  112617. + uint16_t direct_relative_profileId; /**< Used when 'direct' is TRUE, to select a storage profile;
  112618. + should indicate the storage profile offset within the
  112619. + port's storage profiles window. */
  112620. + struct {
  112621. + uint8_t fqid_offset_shift; /**< Shift of KeyGen results without the FQID base */
  112622. + uint8_t fqid_offset_relative_profile_id_base;
  112623. + /**< OR of KeyGen results without the FQID base;
  112624. + should indicate the policer profile offset within the
  112625. + port's storage profiles window. */
  112626. + uint8_t num_of_profiles; /**< Range of profiles starting at base. */
  112627. + } indirect_profile; /**< Indirect profile parameters. */
  112628. + } profile_select; /**< Direct/indirect profile selection and parameters. */
  112629. +} ioc_fm_pcd_kg_storage_profile_t;
  112630. +#endif /* DPAA_VERSION >= 11 */
  112631. +
  112632. +/**************************************************************************//**
  112633. + @Description Parameters for defining CC as the next engine after KeyGen
  112634. + (Must match struct t_FmPcdKgCc defined in fm_pcd_ext.h)
  112635. +*//***************************************************************************/
  112636. +typedef struct ioc_fm_pcd_kg_cc_t {
  112637. + void *tree_id; /**< CC Tree id */
  112638. + uint8_t grp_id; /**< CC group id within the CC tree */
  112639. + bool plcr_next; /**< TRUE if after CC, in case of data frame,
  112640. + policing is required. */
  112641. + bool bypass_plcr_profile_generation;
  112642. + /**< TRUE to bypass KeyGen policer profile generation;
  112643. + selected profile is the one set at port initialization. */
  112644. + ioc_fm_pcd_kg_plcr_profile_t plcr_profile; /**< Valid only if plcr_next = TRUE and
  112645. + bypass_plcr_profile_generation = FALSE */
  112646. +} ioc_fm_pcd_kg_cc_t;
  112647. +
  112648. +/**************************************************************************//**
  112649. + @Description Parameters for defining initializing a KeyGen scheme
  112650. + (Must match struct t_FmPcdKgSchemeParams defined in fm_pcd_ext.h)
  112651. +*//***************************************************************************/
  112652. +typedef struct ioc_fm_pcd_kg_scheme_params_t {
  112653. + bool modify; /**< TRUE to change an existing scheme */
  112654. + union {
  112655. + uint8_t relative_scheme_id;
  112656. + /**< if modify=FALSE: partition-relative scheme id */
  112657. + void *scheme_id; /**< if modify=TRUE: the id of an existing scheme */
  112658. + } scm_id;
  112659. + bool always_direct; /**< This scheme is reached only directly, i.e. no need
  112660. + for match vector; KeyGen will ignore it when matching */
  112661. + struct { /**< HL relevant only if always_direct=FALSE */
  112662. + void *net_env_id; /**< The id of the Network Environment as returned
  112663. + by FM_PCD_NetEnvCharacteristicsSet() */
  112664. + uint8_t num_of_distinction_units;
  112665. + /**< Number of NetEnv units listed in unit_ids array */
  112666. + uint8_t unit_ids[IOC_FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];
  112667. + /**< Indexes as passed to SetNetEnvCharacteristics (?) array */
  112668. + } net_env_params;
  112669. + bool use_hash; /**< use the KG Hash functionality */
  112670. + ioc_fm_pcd_kg_key_extract_and_hash_params_t key_extract_and_hash_params;
  112671. + /**< used only if useHash = TRUE */
  112672. + bool bypass_fqid_generation;
  112673. + /**< Normally - FALSE, TRUE to avoid FQID update in the IC;
  112674. + In such a case FQID after KG will be the default FQID
  112675. + defined for the relevant port, or the FQID defined by CC
  112676. + in cases where CC was the previous engine. */
  112677. + uint32_t base_fqid; /**< Base FQID; Relevant only if bypass_fqid_generation = FALSE;
  112678. + If hash is used and an even distribution is expected
  112679. + according to hash_distribution_num_of_fqids, base_fqid must be aligned to
  112680. + hash_distribution_num_of_fqids. */
  112681. + uint8_t num_of_used_extracted_ors;
  112682. + /**< Number of FQID masks listed in extracted_ors array*/
  112683. + ioc_fm_pcd_kg_extracted_or_params_t extracted_ors[IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS];
  112684. + /**< IOC_FM_PCD_KG_NUM_OF_GENERIC_REGS
  112685. + registers are shared between qid_masks
  112686. + functionality and some of the extraction
  112687. + actions; Normally only some will be used
  112688. + for qid_mask. Driver will return error if
  112689. + resource is full at initialization time. */
  112690. +#if DPAA_VERSION >= 11
  112691. + bool override_storage_profile;
  112692. + /**< TRUE if KeyGen override previously decided storage profile */
  112693. + ioc_fm_pcd_kg_storage_profile_t storage_profile;/**< Used when override_storage_profile=TRUE */
  112694. +#endif /* DPAA_VERSION >= 11 */
  112695. + ioc_fm_pcd_engine next_engine; /**< may be BMI, PLCR or CC */
  112696. + union { /**< depends on nextEngine */
  112697. + ioc_fm_pcd_done_action done_action; /**< Used when next engine is BMI (done) */
  112698. + ioc_fm_pcd_kg_plcr_profile_t plcr_profile; /**< Used when next engine is PLCR */
  112699. + ioc_fm_pcd_kg_cc_t cc; /**< Used when next engine is CC */
  112700. + } kg_next_engine_params;
  112701. + ioc_fm_pcd_kg_scheme_counter_t scheme_counter; /**< A structure of parameters for updating
  112702. + the scheme counter */
  112703. + void *id; /**< Returns the scheme Id to be used */
  112704. +} ioc_fm_pcd_kg_scheme_params_t;
  112705. +
  112706. +/**************************************************************************//**
  112707. + @Collection
  112708. +*//***************************************************************************/
  112709. +#if DPAA_VERSION >= 11
  112710. +#define IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR 10 /* Maximal supported number of frame length ranges */
  112711. +#define IOC_FM_PCD_CC_STATS_FLR_SIZE 2 /* Size in bytes of a frame length range limit */
  112712. +#endif /* DPAA_VERSION >= 11 */
  112713. +#define IOC_FM_PCD_CC_STATS_FLR_COUNT_SIZE 4 /* Size in bytes of a frame length range counter */
  112714. +/* @} */
  112715. +
  112716. +/**************************************************************************//**
  112717. + @Description Parameters for defining CC as the next engine after a CC node.
  112718. + (Must match struct t_FmPcdCcNextCcParams defined in fm_pcd_ext.h)
  112719. +*//***************************************************************************/
  112720. +typedef struct ioc_fm_pcd_cc_next_cc_params_t {
  112721. + void *cc_node_id; /**< Id of the next CC node */
  112722. +} ioc_fm_pcd_cc_next_cc_params_t;
  112723. +
  112724. +#if DPAA_VERSION >= 11
  112725. +/**************************************************************************//**
  112726. + @Description A structure for defining Frame Replicator as the next engine after a CC node.
  112727. + (Must match struct t_FmPcdCcNextFrParams defined in fm_pcd_ext.h)
  112728. +*//***************************************************************************/
  112729. +typedef struct ioc_fm_pcd_cc_next_fr_params_t {
  112730. + void* frm_replic_id; /**< The id of the next frame replicator group */
  112731. +} ioc_fm_pcd_cc_next_fr_params_t;
  112732. +#endif /* DPAA_VERSION >= 11 */
  112733. +
  112734. +/**************************************************************************//**
  112735. + @Description A structure for defining PLCR params when PLCR is the
  112736. + next engine after a CC node
  112737. + (Must match struct t_FmPcdCcNextPlcrParams defined in fm_pcd_ext.h)
  112738. +*//***************************************************************************/
  112739. +typedef struct ioc_fm_pcd_cc_next_plcr_params_t {
  112740. + bool override_params; /**< TRUE if CC override previously decided parameters*/
  112741. + bool shared_profile; /**< Relevant only if overrideParams=TRUE:
  112742. + TRUE if this profile is shared between ports */
  112743. + uint16_t new_relative_profile_id; /**< Relevant only if overrideParams=TRUE:
  112744. + (otherwise profile id is taken from keygen);
  112745. + This parameter should indicate the policer
  112746. + profile offset within the port's
  112747. + policer profiles or from SHARED window.*/
  112748. + uint32_t new_fqid; /**< Relevant only if overrideParams=TRUE:
  112749. + FQID for enquing the frame;
  112750. + In earlier chips if policer next engine is KEYGEN,
  112751. + this parameter can be 0, because the KEYGEN always decides
  112752. + the enqueue FQID.*/
  112753. +#if DPAA_VERSION >= 11
  112754. + uint8_t new_relative_storage_profile_id;
  112755. + /**< Indicates the relative storage profile offset within
  112756. + the port's storage profiles window;
  112757. + Relevant only if the port was configured with VSP. */
  112758. +#endif /* DPAA_VERSION >= 11 */
  112759. +} ioc_fm_pcd_cc_next_plcr_params_t;
  112760. +
  112761. +/**************************************************************************//**
  112762. + @Description A structure for defining enqueue params when BMI is the
  112763. + next engine after a CC node
  112764. + (Must match struct t_FmPcdCcNextEnqueueParams defined in fm_pcd_ext.h)
  112765. +*//***************************************************************************/
  112766. +typedef struct ioc_fm_pcd_cc_next_enqueue_params_t {
  112767. + ioc_fm_pcd_done_action action; /**< Action - when next engine is BMI (done) */
  112768. + bool override_fqid; /**< TRUE if CC override previously decided fqid and vspid,
  112769. + relevant if action = e_IOC_FM_PCD_ENQ_FRAME */
  112770. + uint32_t new_fqid; /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
  112771. + (otherwise FQID is taken from KeyGen),
  112772. + relevant if action = e_IOC_FM_PCD_ENQ_FRAME*/
  112773. +#if DPAA_VERSION >= 11
  112774. + uint8_t new_relative_storage_profile_id;
  112775. + /**< Valid if override_fqid=TRUE, Indicates the relative virtual
  112776. + storage profile offset within the port's storage profiles
  112777. + window; Relevant only if the port was configured with VSP. */
  112778. +#endif /* DPAA_VERSION >= 11 */
  112779. +
  112780. +} ioc_fm_pcd_cc_next_enqueue_params_t;
  112781. +
  112782. +/**************************************************************************//**
  112783. + @Description A structure for defining KG params when KG is the next engine after a CC node
  112784. + (Must match struct t_FmPcdCcNextKgParams defined in fm_pcd_ext.h)
  112785. +*//***************************************************************************/
  112786. +typedef struct ioc_fm_pcd_cc_next_kg_params_t {
  112787. + bool override_fqid; /**< TRUE if CC override previously decided fqid and vspid,
  112788. + Note - this parameters are irrelevant for earlier chips */
  112789. + uint32_t new_fqid; /**< Valid if overrideFqid=TRUE, FQID for enqueuing the frame
  112790. + (otherwise FQID is taken from KeyGen),
  112791. + Note - this parameters are irrelevant for earlier chips */
  112792. +#if DPAA_VERSION >= 11
  112793. + uint8_t new_relative_storage_profile_id;
  112794. + /**< Valid if override_fqid=TRUE, Indicates the relative virtual
  112795. + storage profile offset within the port's storage profiles
  112796. + window; Relevant only if the port was configured with VSP. */
  112797. +#endif /* DPAA_VERSION >= 11 */
  112798. + void *p_direct_scheme; /**< Direct scheme id to go to. */
  112799. +} ioc_fm_pcd_cc_next_kg_params_t;
  112800. +
  112801. +/**************************************************************************//**
  112802. + @Description Parameters for defining the next engine after a CC node.
  112803. + (Must match struct t_FmPcdCcNextEngineParams defined in fm_pcd_ext.h)
  112804. +*//***************************************************************************/
  112805. +typedef struct ioc_fm_pcd_cc_next_engine_params_t {
  112806. + ioc_fm_pcd_engine next_engine; /**< User has to initialize parameters
  112807. + according to nextEngine definition */
  112808. + union {
  112809. + ioc_fm_pcd_cc_next_cc_params_t cc_params; /**< Parameters in case next engine is CC */
  112810. + ioc_fm_pcd_cc_next_plcr_params_t plcr_params; /**< Parameters in case next engine is PLCR */
  112811. + ioc_fm_pcd_cc_next_enqueue_params_t enqueue_params; /**< Parameters in case next engine is BMI */
  112812. + ioc_fm_pcd_cc_next_kg_params_t kg_params; /**< Parameters in case next engine is KG */
  112813. +#if DPAA_VERSION >= 11
  112814. + ioc_fm_pcd_cc_next_fr_params_t fr_params; /**< Parameters in case next engine is FR */
  112815. +#endif /* DPAA_VERSION >= 11 */
  112816. + } params; /**< Union used for all the next-engine parameters options */
  112817. + void *manip_id; /**< Handle to Manipulation object.
  112818. + Relevant if next engine is of type result
  112819. + (e_IOC_FM_PCD_PLCR, e_IOC_FM_PCD_KG, e_IOC_FM_PCD_DONE) */
  112820. + bool statistics_en; /**< If TRUE, statistics counters are incremented
  112821. + for each frame passing through this
  112822. + Coarse Classification entry. */
  112823. +} ioc_fm_pcd_cc_next_engine_params_t;
  112824. +
  112825. +/**************************************************************************//**
  112826. + @Description Parameters for defining a single CC key
  112827. +*//***************************************************************************/
  112828. +typedef struct ioc_fm_pcd_cc_key_params_t {
  112829. + uint8_t *p_key; /**< pointer to the key of the size defined in key_size */
  112830. + uint8_t *p_mask; /**< pointer to the Mask per key of the size defined
  112831. + in keySize. p_key and p_mask (if defined) has to be
  112832. + of the same size defined in the key_size */
  112833. + ioc_fm_pcd_cc_next_engine_params_t cc_next_engine_params;
  112834. + /**< parameters for the next for the defined Key in p_key */
  112835. +
  112836. +} ioc_fm_pcd_cc_key_params_t;
  112837. +
  112838. +/**************************************************************************//**
  112839. + @Description Parameters for defining CC keys parameters
  112840. + The driver supports two methods for CC node allocation: dynamic and static.
  112841. + Static mode was created in order to prevent runtime alloc/free
  112842. + of FMan memory (MURAM), which may cause fragmentation; in this mode,
  112843. + the driver automatically allocates the memory according to
  112844. + 'max_num_of_keys' parameter. The driver calculates the maximal memory
  112845. + size that may be used for this CC-Node taking into consideration
  112846. + 'mask_support' and 'statistics_mode' parameters.
  112847. + When 'action' = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP in the extraction
  112848. + parameters of this node, 'max_num_of_keys' must be equal to 'num_of_keys'.
  112849. + In dynamic mode, 'max_num_of_keys' must be zero. At initialization,
  112850. + all required structures are allocated according to 'num_of_keys'
  112851. + parameter. During runtime modification, these structures are
  112852. + re-allocated according to the updated number of keys.
  112853. +
  112854. + Please note that 'action' and 'ic_indx_mask' mentioned in the
  112855. + specific parameter explanations are passed in the extraction
  112856. + parameters of the node (fields of extractccparams.extractnonhdr).
  112857. +*//***************************************************************************/
  112858. +typedef struct ioc_keys_params_t {
  112859. + uint16_t max_num_of_keys;/**< Maximum number of keys that will (ever) be used in this CC-Node;
  112860. + A value of zero may be used for dynamic memory allocation. */
  112861. + bool mask_support; /**< This parameter is relevant only if a node is initialized with
  112862. + action = e_IOC_FM_PCD_ACTION_EXACT_MATCH and max_num_of_keys > 0;
  112863. + Should be TRUE to reserve table memory for key masks, even if
  112864. + initial keys do not contain masks, or if the node was initialized
  112865. + as 'empty' (without keys); this will allow user to add keys with
  112866. + masks at runtime. */
  112867. + ioc_fm_pcd_cc_stats_mode statistics_mode;/**< Determines the supported statistics mode for all node's keys.
  112868. + To enable statistics gathering, statistics should be enabled per
  112869. + every key, using 'statistics_en' in next engine parameters structure
  112870. + of that key;
  112871. + If 'max_num_of_keys' is set, all required structures will be
  112872. + preallocated for all keys. */
  112873. +#if (DPAA_VERSION >= 11)
  112874. + uint16_t frame_length_ranges[IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
  112875. + /**< Relevant only for 'RMON' statistics mode
  112876. + (this feature is supported only on B4860 device);
  112877. + Holds a list of programmable thresholds. For each received frame,
  112878. + its length in bytes is examined against these range thresholds and
  112879. + the appropriate counter is incremented by 1. For example, to belong
  112880. + to range i, the following should hold:
  112881. + range i-1 threshold < frame length <= range i threshold
  112882. + Each range threshold must be larger then its preceding range
  112883. + threshold. Last range threshold must be 0xFFFF. */
  112884. +#endif /* (DPAA_VERSION >= 11) */
  112885. + uint16_t num_of_keys; /**< Number of initial keys;
  112886. + Note that in case of 'action' = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP,
  112887. + this field should be power-of-2 of the number of bits that are
  112888. + set in 'ic_indx_mask'. */
  112889. + uint8_t key_size; /**< Size of key - for extraction of type FULL_FIELD, 'key_size' has
  112890. + to be the standard size of the selected key; For other extraction
  112891. + types, 'key_size' has to be as size of extraction; When 'action' =
  112892. + e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP, 'keySize' must be 2. */
  112893. + ioc_fm_pcd_cc_key_params_t key_params[IOC_FM_PCD_MAX_NUM_OF_KEYS];
  112894. + /**< An array with 'num_of_keys' entries, each entry specifies the
  112895. + corresponding key parameters;
  112896. + When 'action' = e_IOC_FM_PCD_ACTION_EXACT_MATCH, this value must not
  112897. + exceed 255 (IOC_FM_PCD_MAX_NUM_OF_KEYS-1) as the last entry is saved
  112898. + for the 'miss' entry. */
  112899. + ioc_fm_pcd_cc_next_engine_params_t cc_next_engine_params_for_miss;
  112900. + /**< Parameters for defining the next engine when a key is not matched;
  112901. + Not relevant if action = e_IOC_FM_PCD_ACTION_INDEXED_LOOKUP. */
  112902. +} ioc_keys_params_t;
  112903. +
  112904. +/**************************************************************************//**
  112905. + @Description Parameters for defining a CC node
  112906. +*//***************************************************************************/
  112907. +typedef struct ioc_fm_pcd_cc_node_params_t {
  112908. + ioc_fm_pcd_extract_entry_t extract_cc_params; /**< Extraction parameters */
  112909. + ioc_keys_params_t keys_params; /**< Keys definition matching the selected extraction */
  112910. + void *id; /**< Output parameter; returns the CC node Id to be used */
  112911. +} ioc_fm_pcd_cc_node_params_t;
  112912. +
  112913. +/**************************************************************************//**
  112914. + @Description Parameters for defining a hash table
  112915. + (Must match struct t_FmPcdHashTableParams defined in fm_pcd_ext.h)
  112916. +*//***************************************************************************/
  112917. +typedef struct ioc_fm_pcd_hash_table_params_t {
  112918. + uint16_t max_num_of_keys; /**< Maximum Number Of Keys that will (ever) be used in this Hash-table */
  112919. + ioc_fm_pcd_cc_stats_mode statistics_mode; /**< If not e_IOC_FM_PCD_CC_STATS_MODE_NONE, the required structures for the
  112920. + requested statistics mode will be allocated according to max_num_of_keys. */
  112921. + uint8_t kg_hash_shift; /**< KG-Hash-shift as it was configured in the KG-scheme
  112922. + that leads to this hash-table. */
  112923. + uint16_t hash_res_mask; /**< Mask that will be used on the hash-result;
  112924. + The number-of-sets for this hash will be calculated
  112925. + as (2^(number of bits set in 'hash_res_mask'));
  112926. + The 4 lower bits must be cleared. */
  112927. + uint8_t hash_shift; /**< Byte offset from the beginning of the KeyGen hash result to the
  112928. + 2-bytes to be used as hash index. */
  112929. + uint8_t match_key_size; /**< Size of the exact match keys held by the hash buckets */
  112930. +
  112931. + ioc_fm_pcd_cc_next_engine_params_t cc_next_engine_params_for_miss;
  112932. + /**< Parameters for defining the next engine when a key is not matched */
  112933. + void *id;
  112934. +} ioc_fm_pcd_hash_table_params_t;
  112935. +
  112936. +/**************************************************************************//**
  112937. + @Description A structure with the arguments for the FM_PCD_HashTableAddKey ioctl() call
  112938. +*//***************************************************************************/
  112939. +typedef struct ioc_fm_pcd_hash_table_add_key_params_t {
  112940. + void *p_hash_tbl;
  112941. + uint8_t key_size;
  112942. + ioc_fm_pcd_cc_key_params_t key_params;
  112943. +} ioc_fm_pcd_hash_table_add_key_params_t;
  112944. +
  112945. +/**************************************************************************//**
  112946. + @Description Parameters for defining a CC tree group.
  112947. +
  112948. + This structure defines a CC group in terms of NetEnv units
  112949. + and the action to be taken in each case. The unit_ids list must
  112950. + be given in order from low to high indices.
  112951. +
  112952. + ioc_fm_pcd_cc_next_engine_params_t is a list of 2^num_of_distinction_units
  112953. + structures where each defines the next action to be taken for
  112954. + each units combination. for example:
  112955. + num_of_distinction_units = 2
  112956. + unit_ids = {1,3}
  112957. + next_engine_per_entries_in_grp[0] = ioc_fm_pcd_cc_next_engine_params_t for the case that
  112958. + unit 1 - not found; unit 3 - not found;
  112959. + next_engine_per_entries_in_grp[1] = ioc_fm_pcd_cc_next_engine_params_t for the case that
  112960. + unit 1 - not found; unit 3 - found;
  112961. + next_engine_per_entries_in_grp[2] = ioc_fm_pcd_cc_next_engine_params_t for the case that
  112962. + unit 1 - found; unit 3 - not found;
  112963. + next_engine_per_entries_in_grp[3] = ioc_fm_pcd_cc_next_engine_params_t for the case that
  112964. + unit 1 - found; unit 3 - found;
  112965. +*//***************************************************************************/
  112966. +typedef struct ioc_fm_pcd_cc_grp_params_t {
  112967. + uint8_t num_of_distinction_units; /**< Up to 4 */
  112968. + uint8_t unit_ids [IOC_FM_PCD_MAX_NUM_OF_CC_UNITS];
  112969. + /**< Indexes of the units as defined in
  112970. + FM_PCD_NetEnvCharacteristicsSet() */
  112971. + ioc_fm_pcd_cc_next_engine_params_t next_engine_per_entries_in_grp[IOC_FM_PCD_MAX_NUM_OF_CC_ENTRIES_IN_GRP];
  112972. + /**< Maximum entries per group is 16 */
  112973. +} ioc_fm_pcd_cc_grp_params_t;
  112974. +
  112975. +/**************************************************************************//**
  112976. + @Description Parameters for defining the CC tree groups
  112977. + (Must match struct t_FmPcdCcTreeParams defined in fm_pcd_ext.h)
  112978. +*//***************************************************************************/
  112979. +typedef struct ioc_fm_pcd_cc_tree_params_t {
  112980. + void *net_env_id; /**< Id of the Network Environment as returned
  112981. + by FM_PCD_NetEnvCharacteristicsSet() */
  112982. + uint8_t num_of_groups; /**< Number of CC groups within the CC tree */
  112983. + ioc_fm_pcd_cc_grp_params_t fm_pcd_cc_group_params [IOC_FM_PCD_MAX_NUM_OF_CC_GROUPS];
  112984. + /**< Parameters for each group. */
  112985. + void *id; /**< Output parameter; Returns the tree Id to be used */
  112986. +} ioc_fm_pcd_cc_tree_params_t;
  112987. +
  112988. +/**************************************************************************//**
  112989. + @Description Parameters for defining policer byte rate
  112990. +*//***************************************************************************/
  112991. +typedef struct ioc_fm_pcd_plcr_byte_rate_mode_param_t {
  112992. + ioc_fm_pcd_plcr_frame_length_select frame_length_selection; /**< Frame length selection */
  112993. + ioc_fm_pcd_plcr_roll_back_frame_select roll_back_frame_selection; /**< relevant option only e_IOC_FM_PCD_PLCR_L2_FRM_LEN,
  112994. + e_IOC_FM_PCD_PLCR_FULL_FRM_LEN */
  112995. +} ioc_fm_pcd_plcr_byte_rate_mode_param_t;
  112996. +
  112997. +/**************************************************************************//**
  112998. + @Description Parameters for defining the policer profile (based on
  112999. + RFC-2698 or RFC-4115 attributes).
  113000. +*//***************************************************************************/
  113001. +typedef struct ioc_fm_pcd_plcr_non_passthrough_alg_param_t {
  113002. + ioc_fm_pcd_plcr_rate_mode rate_mode; /**< Byte / Packet */
  113003. + ioc_fm_pcd_plcr_byte_rate_mode_param_t byte_mode_param; /**< Valid for Byte NULL for Packet */
  113004. + uint32_t committed_info_rate; /**< KBits/Sec or Packets/Sec */
  113005. + uint32_t committed_burst_size; /**< KBits or Packets */
  113006. + uint32_t peak_or_excess_info_rate; /**< KBits/Sec or Packets/Sec */
  113007. + uint32_t peak_or_excess_burst_size; /**< KBits or Packets */
  113008. +} ioc_fm_pcd_plcr_non_passthrough_alg_param_t;
  113009. +
  113010. +/**************************************************************************//**
  113011. + @Description Parameters for defining the next engine after policer
  113012. +*//***************************************************************************/
  113013. +typedef union ioc_fm_pcd_plcr_next_engine_params_u {
  113014. + ioc_fm_pcd_done_action action; /**< Action - when next engine is BMI (done) */
  113015. + void *p_profile; /**< Policer profile handle - used when next engine
  113016. + is PLCR, must be a SHARED profile */
  113017. + void *p_direct_scheme; /**< Direct scheme select - when next engine is Keygen */
  113018. +} ioc_fm_pcd_plcr_next_engine_params_u;
  113019. +
  113020. +typedef struct ioc_fm_pcd_port_params_t {
  113021. + ioc_fm_port_type port_type; /**< Type of port for this profile */
  113022. + uint8_t port_id; /**< FM-Port id of port for this profile */
  113023. +} ioc_fm_pcd_port_params_t;
  113024. +
  113025. +/**************************************************************************//**
  113026. + @Description Parameters for defining the policer profile entry
  113027. + (Must match struct t_FmPcdPlcrProfileParams defined in fm_pcd_ext.h)
  113028. +*//***************************************************************************/
  113029. +typedef struct ioc_fm_pcd_plcr_profile_params_t {
  113030. + bool modify; /**< TRUE to change an existing profile */
  113031. + union {
  113032. + struct {
  113033. + ioc_fm_pcd_profile_type_selection profile_type; /**< Type of policer profile */
  113034. + ioc_fm_pcd_port_params_t *p_fm_port; /**< Relevant for per-port profiles only */
  113035. + uint16_t relative_profile_id; /**< Profile id - relative to shared group or to port */
  113036. + } new_params; /**< Use it when modify = FALSE */
  113037. + void *p_profile; /**< A handle to a profile - use it when modify=TRUE */
  113038. + } profile_select;
  113039. + ioc_fm_pcd_plcr_algorithm_selection alg_selection; /**< Profile Algorithm PASS_THROUGH, RFC_2698, RFC_4115 */
  113040. + ioc_fm_pcd_plcr_color_mode color_mode; /**< COLOR_BLIND, COLOR_AWARE */
  113041. +
  113042. + union {
  113043. + ioc_fm_pcd_plcr_color dflt_color; /**< For Color-Blind Pass-Through mode; the policer will re-color
  113044. + any incoming packet with the default value. */
  113045. + ioc_fm_pcd_plcr_color override; /**< For Color-Aware modes; the profile response to a
  113046. + pre-color value of 2'b11. */
  113047. + } color;
  113048. +
  113049. + ioc_fm_pcd_plcr_non_passthrough_alg_param_t non_passthrough_alg_param; /**< RFC2698 or RFC4115 parameters */
  113050. +
  113051. + ioc_fm_pcd_engine next_engine_on_green; /**< Next engine for green-colored frames */
  113052. + ioc_fm_pcd_plcr_next_engine_params_u params_on_green; /**< Next engine parameters for green-colored frames */
  113053. +
  113054. + ioc_fm_pcd_engine next_engine_on_yellow; /**< Next engine for yellow-colored frames */
  113055. + ioc_fm_pcd_plcr_next_engine_params_u params_on_yellow; /**< Next engine parameters for yellow-colored frames */
  113056. +
  113057. + ioc_fm_pcd_engine next_engine_on_red; /**< Next engine for red-colored frames */
  113058. + ioc_fm_pcd_plcr_next_engine_params_u params_on_red; /**< Next engine parameters for red-colored frames */
  113059. +
  113060. + bool trap_profile_on_flow_A; /**< Obsolete - do not use */
  113061. + bool trap_profile_on_flow_B; /**< Obsolete - do not use */
  113062. + bool trap_profile_on_flow_C; /**< Obsolete - do not use */
  113063. +
  113064. + void *id; /**< output parameter; Returns the profile Id to be used */
  113065. +} ioc_fm_pcd_plcr_profile_params_t;
  113066. +
  113067. +/**************************************************************************//**
  113068. + @Description A structure for modifying CC tree next engine
  113069. +*//***************************************************************************/
  113070. +typedef struct ioc_fm_pcd_cc_tree_modify_next_engine_params_t {
  113071. + void *id; /**< CC tree Id to be used */
  113072. + uint8_t grp_indx; /**< A Group index in the tree */
  113073. + uint8_t indx; /**< Entry index in the group defined by grp_index */
  113074. + ioc_fm_pcd_cc_next_engine_params_t cc_next_engine_params;
  113075. + /**< Parameters for the next for the defined Key in the p_Key */
  113076. +} ioc_fm_pcd_cc_tree_modify_next_engine_params_t;
  113077. +
  113078. +/**************************************************************************//**
  113079. + @Description A structure for modifying CC node next engine
  113080. +*//***************************************************************************/
  113081. +typedef struct ioc_fm_pcd_cc_node_modify_next_engine_params_t {
  113082. + void *id; /**< CC node Id to be used */
  113083. + uint16_t key_indx; /**< Key index for Next Engine Params modifications;
  113084. + NOTE: This parameter is IGNORED for miss-key! */
  113085. + uint8_t key_size; /**< Key size of added key */
  113086. + ioc_fm_pcd_cc_next_engine_params_t cc_next_engine_params;
  113087. + /**< parameters for the next for the defined Key in the p_Key */
  113088. +} ioc_fm_pcd_cc_node_modify_next_engine_params_t;
  113089. +
  113090. +/**************************************************************************//**
  113091. + @Description A structure for remove CC node key
  113092. +*//***************************************************************************/
  113093. +typedef struct ioc_fm_pcd_cc_node_remove_key_params_t {
  113094. + void *id; /**< CC node Id to be used */
  113095. + uint16_t key_indx; /**< Key index for Next Engine Params modifications;
  113096. + NOTE: This parameter is IGNORED for miss-key! */
  113097. +} ioc_fm_pcd_cc_node_remove_key_params_t;
  113098. +
  113099. +/**************************************************************************//**
  113100. + @Description A structure for modifying CC node key and next engine
  113101. +*//***************************************************************************/
  113102. +typedef struct ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t {
  113103. + void *id; /**< CC node Id to be used */
  113104. + uint16_t key_indx; /**< Key index for Next Engine Params modifications;
  113105. + NOTE: This parameter is IGNORED for miss-key! */
  113106. + uint8_t key_size; /**< Key size of added key */
  113107. + ioc_fm_pcd_cc_key_params_t key_params; /**< it's array with numOfKeys entries each entry in
  113108. + the array of the type ioc_fm_pcd_cc_key_params_t */
  113109. +} ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t;
  113110. +
  113111. +/**************************************************************************//**
  113112. + @Description A structure for modifying CC node key
  113113. +*//***************************************************************************/
  113114. +typedef struct ioc_fm_pcd_cc_node_modify_key_params_t {
  113115. + void *id; /**< CC node Id to be used */
  113116. + uint16_t key_indx; /**< Key index for Next Engine Params modifications;
  113117. + NOTE: This parameter is IGNORED for miss-key! */
  113118. + uint8_t key_size; /**< Key size of added key */
  113119. + uint8_t *p_key; /**< Pointer to the key of the size defined in key_size */
  113120. + uint8_t *p_mask; /**< Pointer to the Mask per key of the size defined
  113121. + in keySize. p_Key and p_Mask (if defined) have to be
  113122. + of the same size as defined in the key_size */
  113123. +} ioc_fm_pcd_cc_node_modify_key_params_t;
  113124. +
  113125. +/**************************************************************************//**
  113126. + @Description A structure with the arguments for the FM_PCD_HashTableRemoveKey ioctl() call
  113127. +*//***************************************************************************/
  113128. +typedef struct ioc_fm_pcd_hash_table_remove_key_params_t {
  113129. + void *p_hash_tbl; /**< The id of the hash table */
  113130. + uint8_t key_size; /**< The size of the key to remove */
  113131. + uint8_t *p_key; /**< Pointer to the key to remove */
  113132. +} ioc_fm_pcd_hash_table_remove_key_params_t;
  113133. +
  113134. +/**************************************************************************//**
  113135. + @Description Parameters for selecting a location for requested manipulation
  113136. +*//***************************************************************************/
  113137. +typedef struct ioc_fm_manip_hdr_info_t {
  113138. + ioc_net_header_type hdr; /**< Header selection */
  113139. + ioc_fm_pcd_hdr_index hdr_index; /**< Relevant only for MPLS, VLAN and tunneled IP. Otherwise should be cleared. */
  113140. + bool by_field; /**< TRUE if the location of manipulation is according to some field in the specific header*/
  113141. + ioc_fm_pcd_fields_u full_field; /**< Relevant only when by_field = TRUE: Extract field */
  113142. +} ioc_fm_manip_hdr_info_t;
  113143. +
  113144. +/**************************************************************************//**
  113145. + @Description Parameters for defining header removal by header type
  113146. +*//***************************************************************************/
  113147. +typedef struct ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t {
  113148. + ioc_fm_pcd_manip_hdr_rmv_by_hdr_type type; /**< Selection of header removal location */
  113149. + union {
  113150. +#if ((DPAA_VERSION == 10) && defined(FM_CAPWAP_SUPPORT))
  113151. + struct {
  113152. + bool include;/**< If FALSE, remove until the specified header (not including the header);
  113153. + If TRUE, remove also the specified header. */
  113154. + ioc_fm_manip_hdr_info_t hdr_info;
  113155. + } from_start_by_hdr; /**< Relevant when type = e_IOC_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
  113156. +#endif /* FM_CAPWAP_SUPPORT */
  113157. +#if (DPAA_VERSION >= 11)
  113158. + ioc_fm_manip_hdr_info_t hdr_info; /**< Relevant when type = e_FM_PCD_MANIP_RMV_BY_HDR_FROM_START */
  113159. +#endif /* (DPAA_VERSION >= 11) */
  113160. + ioc_fm_pcd_manip_hdr_rmv_specific_l2 specific_l2;/**< Relevant when type = e_IOC_FM_PCD_MANIP_BY_HDR_SPECIFIC_L2;
  113161. + Defines which L2 headers to remove. */
  113162. + } u;
  113163. +} ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t;
  113164. +
  113165. +/**************************************************************************//**
  113166. + @Description Parameters for configuring IP fragmentation manipulation
  113167. +*//***************************************************************************/
  113168. +typedef struct ioc_fm_pcd_manip_frag_ip_params_t {
  113169. + uint16_t size_for_fragmentation; /**< If length of the frame is greater than this value,
  113170. + IP fragmentation will be executed.*/
  113171. +#if DPAA_VERSION == 10
  113172. + uint8_t scratch_bpid; /**< Absolute buffer pool id according to BM configuration.*/
  113173. +#endif /* DPAA_VERSION == 10 */
  113174. + bool sg_bpid_en; /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
  113175. + If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
  113176. + received frame's buffer. */
  113177. + uint8_t sg_bpid; /**< Scatter/Gather buffer pool id;
  113178. + This parameter is relevant when 'sg_bpid_en=TRUE';
  113179. + Same LIODN number is used for these buffers as for the received frames buffers, so buffers
  113180. + of this pool need to be allocated in the same memory area as the received buffers.
  113181. + If the received buffers arrive from different sources, the Scatter/Gather BP id should be
  113182. + mutual to all these sources. */
  113183. + ioc_fm_pcd_manip_dont_frag_action dont_frag_action; /**< Dont Fragment Action - If an IP packet is larger
  113184. + than MTU and its DF bit is set, then this field will
  113185. + determine the action to be taken.*/
  113186. +} ioc_fm_pcd_manip_frag_ip_params_t;
  113187. +
  113188. +/**************************************************************************//**
  113189. + @Description Parameters for configuring IP reassembly manipulation.
  113190. +
  113191. + This is a common structure for both IPv4 and IPv6 reassembly
  113192. + manipulation. For reassembly of both IPv4 and IPv6, make sure to
  113193. + set the 'hdr' field in ioc_fm_pcd_manip_reassem_params_t to IOC_HEADER_TYPE_IPv6.
  113194. +*//***************************************************************************/
  113195. +typedef struct ioc_fm_pcd_manip_reassem_ip_params_t {
  113196. + uint8_t relative_scheme_id[2]; /**< Partition relative scheme id:
  113197. + relativeSchemeId[0] - Relative scheme ID for IPV4 Reassembly manipulation;
  113198. + relativeSchemeId[1] - Relative scheme ID for IPV6 Reassembly manipulation;
  113199. + NOTE: The following comment is relevant only for FMAN v2 devices:
  113200. + Relative scheme ID for IPv4/IPv6 Reassembly manipulation must be smaller than
  113201. + the user schemes id to ensure that the reassembly's schemes will be first match.
  113202. + The remaining schemes, if defined, should have higher relative scheme ID. */
  113203. +#if DPAA_VERSION >= 11
  113204. + uint32_t non_consistent_sp_fqid; /**< In case that other fragments of the frame corresponds to different storage
  113205. + profile than the opening fragment (Non-Consistent-SP state)
  113206. + then one of two possible scenarios occurs:
  113207. + if 'nonConsistentSpFqid != 0', the reassembled frame will be enqueued to
  113208. + this fqid, otherwise a 'Non Consistent SP' bit will be set in the FD[status].*/
  113209. +#else
  113210. + uint8_t sg_bpid; /**< Buffer pool id for the S/G frame created by the reassembly process */
  113211. +#endif /* DPAA_VERSION >= 11 */
  113212. + uint8_t data_mem_id; /**< Memory partition ID for the IPR's external tables structure */
  113213. + uint16_t data_liodn_offset; /**< LIODN offset for access the IPR's external tables structure. */
  113214. + uint16_t min_frag_size[2]; /**< Minimum fragment size:
  113215. + minFragSize[0] - for ipv4, minFragSize[1] - for ipv6 */
  113216. + ioc_fm_pcd_manip_reassem_ways_number num_of_frames_per_hash_entry[2];
  113217. + /**< Number of frames per hash entry needed for reassembly process:
  113218. + numOfFramesPerHashEntry[0] - for ipv4 (max value is e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH);
  113219. + numOfFramesPerHashEntry[1] - for ipv6 (max value is e_IOC_FM_PCD_MANIP_SIX_WAYS_HASH). */
  113220. + uint16_t max_num_frames_in_process;/**< Number of frames which can be processed by Reassembly in the same time;
  113221. + Must be power of 2;
  113222. + In the case numOfFramesPerHashEntry == e_IOC_FM_PCD_MANIP_FOUR_WAYS_HASH,
  113223. + maxNumFramesInProcess has to be in the range of 4 - 512;
  113224. + In the case numOfFramesPerHashEntry == e_IOC_FM_PCD_MANIP_EIGHT_WAYS_HASH,
  113225. + maxNumFramesInProcess has to be in the range of 8 - 2048. */
  113226. + ioc_fm_pcd_manip_reassem_time_out_mode time_out_mode; /**< Expiration delay initialized by Reassembly process */
  113227. + uint32_t fqid_for_time_out_frames;/**< FQID in which time out frames will enqueue during Time Out Process */
  113228. + uint32_t timeout_threshold_for_reassm_process;
  113229. + /**< Represents the time interval in microseconds which defines
  113230. + if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
  113231. +} ioc_fm_pcd_manip_reassem_ip_params_t;
  113232. +
  113233. +/**************************************************************************//**
  113234. + @Description Parameters for defining IPSEC manipulation
  113235. +*//***************************************************************************/
  113236. +typedef struct ioc_fm_pcd_manip_special_offload_ipsec_params_t {
  113237. + bool decryption; /**< TRUE if being used in decryption direction;
  113238. + FALSE if being used in encryption direction. */
  113239. + bool ecn_copy; /**< TRUE to copy the ECN bits from inner/outer to outer/inner
  113240. + (direction depends on the 'decryption' field). */
  113241. + bool dscp_copy; /**< TRUE to copy the DSCP bits from inner/outer to outer/inner
  113242. + (direction depends on the 'decryption' field). */
  113243. + bool variable_ip_hdr_len; /**< TRUE for supporting variable IP header length in decryption. */
  113244. + bool variable_ip_version; /**< TRUE for supporting both IP version on the same SA in encryption */
  113245. + uint8_t outer_ip_hdr_len; /**< If 'variable_ip_version == TRUE' than this field must be set to non-zero value;
  113246. + It is specifies the length of the outer IP header that was configured in the
  113247. + corresponding SA. */
  113248. + uint16_t arw_size; /**< if <> '0' then will perform ARW check for this SA;
  113249. + The value must be a multiplication of 16 */
  113250. + void *arw_addr; /**< if arwSize <> '0' then this field must be set to non-zero value;
  113251. + MUST be allocated from FMAN's MURAM that the post-sec op-port belong
  113252. + Must be 4B aligned. Required MURAM size is '(NEXT_POWER_OF_2(arwSize+32))/8+4' Bytes */
  113253. +} ioc_fm_pcd_manip_special_offload_ipsec_params_t;
  113254. +
  113255. +#if (DPAA_VERSION >= 11)
  113256. +/**************************************************************************//**
  113257. + @Description Parameters for configuring CAPWAP fragmentation manipulation
  113258. +
  113259. + Restrictions:
  113260. + - Maximum number of fragments per frame is 16.
  113261. + - Transmit confirmation is not supported.
  113262. + - Fragmentation nodes must be set as the last PCD action (i.e. the
  113263. + corresponding CC node key must have next engine set to e_FM_PCD_DONE).
  113264. + - Only BMan buffers shall be used for frames to be fragmented.
  113265. + - NOTE: The following comment is relevant only for FMAN v3 devices: IPF
  113266. + does not support VSP. Therefore, on the same port where we have IPF we
  113267. + cannot support VSP.
  113268. +*//***************************************************************************/
  113269. +typedef struct ioc_fm_pcd_manip_frag_capwap_params_t {
  113270. + uint16_t size_for_fragmentation; /**< If length of the frame is greater than this value,
  113271. + CAPWAP fragmentation will be executed.*/
  113272. + bool sg_bpid_en; /**< Enable a dedicated buffer pool id for the Scatter/Gather buffer allocation;
  113273. + If disabled, the Scatter/Gather buffer will be allocated from the same pool as the
  113274. + received frame's buffer. */
  113275. + uint8_t sg_bpid; /**< Scatter/Gather buffer pool id;
  113276. + This parameters is relevant when 'sgBpidEn=TRUE';
  113277. + Same LIODN number is used for these buffers as for the received frames buffers, so buffers
  113278. + of this pool need to be allocated in the same memory area as the received buffers.
  113279. + If the received buffers arrive from different sources, the Scatter/Gather BP id should be
  113280. + mutual to all these sources. */
  113281. + bool compress_mode_en; /**< CAPWAP Header Options Compress Enable mode;
  113282. + When this mode is enabled then only the first fragment include the CAPWAP header options
  113283. + field (if user provides it in the input frame) and all other fragments exclude the CAPWAP
  113284. + options field (CAPWAP header is updated accordingly).*/
  113285. +} ioc_fm_pcd_manip_frag_capwap_params_t;
  113286. +
  113287. +/**************************************************************************//**
  113288. + @Description Parameters for configuring CAPWAP reassembly manipulation.
  113289. +
  113290. + Restrictions:
  113291. + - Application must define one scheme to catch the reassembled frames.
  113292. + - Maximum number of fragments per frame is 16.
  113293. +
  113294. +*//***************************************************************************/
  113295. +typedef struct ioc_fm_pcd_manip_reassem_capwap_params_t {
  113296. + uint8_t relative_scheme_id; /**< Partition relative scheme id;
  113297. + NOTE: this id must be smaller than the user schemes id to ensure that the reassembly scheme will be first match;
  113298. + Rest schemes, if defined, should have higher relative scheme ID. */
  113299. + uint8_t data_mem_id; /**< Memory partition ID for the IPR's external tables structure */
  113300. + uint16_t data_liodn_offset; /**< LIODN offset for access the IPR's external tables structure. */
  113301. + uint16_t max_reassembled_frame_length;/**< The maximum CAPWAP reassembled frame length in bytes;
  113302. + If maxReassembledFrameLength == 0, any successful reassembled frame length is
  113303. + considered as a valid length;
  113304. + if maxReassembledFrameLength > 0, a successful reassembled frame which its length
  113305. + exceeds this value is considered as an error frame (FD status[CRE] bit is set). */
  113306. + ioc_fm_pcd_manip_reassem_ways_number num_of_frames_per_hash_entry;
  113307. + /**< Number of frames per hash entry needed for reassembly process */
  113308. + uint16_t max_num_frames_in_process; /**< Number of frames which can be processed by reassembly in the same time;
  113309. + Must be power of 2;
  113310. + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_FOUR_WAYS_HASH,
  113311. + maxNumFramesInProcess has to be in the range of 4 - 512;
  113312. + In the case numOfFramesPerHashEntry == e_FM_PCD_MANIP_EIGHT_WAYS_HASH,
  113313. + maxNumFramesInProcess has to be in the range of 8 - 2048. */
  113314. + ioc_fm_pcd_manip_reassem_time_out_mode time_out_mode; /**< Expiration delay initialized by Reassembly process */
  113315. + uint32_t fqid_for_time_out_frames; /**< FQID in which time out frames will enqueue during Time Out Process;
  113316. + Recommended value for this field is 0; in this way timed-out frames will be discarded */
  113317. + uint32_t timeout_threshold_for_reassm_process;
  113318. + /**< Represents the time interval in microseconds which defines
  113319. + if opened frame (at least one fragment was processed but not all the fragments)is found as too old*/
  113320. +} ioc_fm_pcd_manip_reassem_capwap_params_t;
  113321. +
  113322. +/**************************************************************************//**
  113323. + @Description structure for defining CAPWAP manipulation
  113324. +*//***************************************************************************/
  113325. +typedef struct ioc_fm_pcd_manip_special_offload_capwap_params_t {
  113326. + bool dtls; /**< TRUE if continue to SEC DTLS encryption */
  113327. + ioc_fm_pcd_manip_hdr_qos_src qos_src; /**< TODO */
  113328. +} ioc_fm_pcd_manip_special_offload_capwap_params_t;
  113329. +
  113330. +#endif /* (DPAA_VERSION >= 11) */
  113331. +
  113332. +/**************************************************************************//**
  113333. + @Description Parameters for defining special offload manipulation
  113334. +*//***************************************************************************/
  113335. +typedef struct ioc_fm_pcd_manip_special_offload_params_t {
  113336. + ioc_fm_pcd_manip_special_offload_type type; /**< Type of special offload manipulation */
  113337. + union
  113338. + {
  113339. + ioc_fm_pcd_manip_special_offload_ipsec_params_t ipsec; /**< Parameters for IPSec; Relevant when
  113340. + type = e_IOC_FM_PCD_MANIP_SPECIAL_OFFLOAD_IPSEC */
  113341. +
  113342. +#if (DPAA_VERSION >= 11)
  113343. + ioc_fm_pcd_manip_special_offload_capwap_params_t capwap; /**< Parameters for CAPWAP; Relevant when
  113344. + type = e_FM_PCD_MANIP_SPECIAL_OFFLOAD_CAPWAP */
  113345. +#endif /* (DPAA_VERSION >= 11) */
  113346. + } u;
  113347. +} ioc_fm_pcd_manip_special_offload_params_t;
  113348. +
  113349. +/**************************************************************************//**
  113350. + @Description Parameters for defining generic removal manipulation
  113351. +*//***************************************************************************/
  113352. +typedef struct ioc_fm_pcd_manip_hdr_rmv_generic_params_t {
  113353. + uint8_t offset; /**< Offset from beginning of header to the start
  113354. + location of the removal */
  113355. + uint8_t size; /**< Size of removed section */
  113356. +} ioc_fm_pcd_manip_hdr_rmv_generic_params_t;
  113357. +
  113358. +/**************************************************************************//**
  113359. + @Description Parameters for defining insertion manipulation
  113360. +*//***************************************************************************/
  113361. +typedef struct ioc_fm_pcd_manip_hdr_insrt_t {
  113362. + uint8_t size; /**< size of inserted section */
  113363. + uint8_t *p_data; /**< data to be inserted */
  113364. +} ioc_fm_pcd_manip_hdr_insrt_t;
  113365. +
  113366. +/**************************************************************************//**
  113367. + @Description Parameters for defining generic insertion manipulation
  113368. +*//***************************************************************************/
  113369. +typedef struct ioc_fm_pcd_manip_hdr_insrt_generic_params_t {
  113370. + uint8_t offset; /**< Offset from beginning of header to the start
  113371. + location of the insertion */
  113372. + uint8_t size; /**< Size of inserted section */
  113373. + bool replace; /**< TRUE to override (replace) existing data at
  113374. + 'offset', FALSE to insert */
  113375. + uint8_t *p_data; /**< Pointer to data to be inserted */
  113376. +} ioc_fm_pcd_manip_hdr_insrt_generic_params_t;
  113377. +
  113378. +/**************************************************************************//**
  113379. + @Description Parameters for defining header manipulation VLAN DSCP To Vpri translation
  113380. +*//***************************************************************************/
  113381. +typedef struct ioc_fm_pcd_manip_hdr_field_update_vlan_dscp_to_vpri_t {
  113382. + uint8_t dscp_to_vpri_table[IOC_FM_PCD_MANIP_DSCP_TO_VLAN_TRANS];
  113383. + /**< A table of VPri values for each DSCP value;
  113384. + The index is the D_SCP value (0-0x3F) and the
  113385. + value is the corresponding VPRI (0-15). */
  113386. + uint8_t vpri_def_val; /**< 0-7, Relevant only if if update_type =
  113387. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN,
  113388. + this field is the Q Tag default value if the
  113389. + IP header is not found. */
  113390. +} ioc_fm_pcd_manip_hdr_field_update_vlan_dscp_to_vpri_t;
  113391. +
  113392. +/**************************************************************************//**
  113393. + @Description Parameters for defining header manipulation VLAN fields updates
  113394. +*//***************************************************************************/
  113395. +typedef struct ioc_fm_pcd_manip_hdr_field_update_vlan_t {
  113396. + ioc_fm_pcd_manip_hdr_field_update_vlan update_type; /**< Selects VLAN update type */
  113397. + union {
  113398. + uint8_t vpri; /**< 0-7, Relevant only if If update_type =
  113399. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN_PRI, this
  113400. + is the new VLAN pri. */
  113401. + ioc_fm_pcd_manip_hdr_field_update_vlan_dscp_to_vpri_t dscp_to_vpri;
  113402. + /**< Parameters structure, Relevant only if update_type =
  113403. + e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_DSCP_TO_VLAN. */
  113404. + } u;
  113405. +} ioc_fm_pcd_manip_hdr_field_update_vlan_t;
  113406. +
  113407. +/**************************************************************************//**
  113408. + @Description Parameters for defining header manipulation IPV4 fields updates
  113409. +*//***************************************************************************/
  113410. +typedef struct ioc_fm_pcd_manip_hdr_field_update_ipv4_t {
  113411. + ioc_ipv4_hdr_manip_update_flags_t valid_updates; /**< ORed flag, selecting the required updates */
  113412. + uint8_t tos; /**< 8 bit New TOS; Relevant if valid_updates contains
  113413. + IOC_HDR_MANIP_IPV4_TOS */
  113414. + uint16_t id; /**< 16 bit New IP ID; Relevant only if valid_updates
  113415. + contains IOC_HDR_MANIP_IPV4_ID */
  113416. + uint32_t src; /**< 32 bit New IP SRC; Relevant only if valid_updates
  113417. + contains IOC_HDR_MANIP_IPV4_SRC */
  113418. + uint32_t dst; /**< 32 bit New IP DST; Relevant only if valid_updates
  113419. + contains IOC_HDR_MANIP_IPV4_DST */
  113420. +} ioc_fm_pcd_manip_hdr_field_update_ipv4_t;
  113421. +
  113422. +/**************************************************************************//**
  113423. + @Description Parameters for defining header manipulation IPV6 fields updates
  113424. +*//***************************************************************************/
  113425. +typedef struct ioc_fm_pcd_manip_hdr_field_update_ipv6_t {
  113426. + ioc_ipv6_hdr_manip_update_flags_t valid_updates; /**< ORed flag, selecting the required updates */
  113427. + uint8_t traffic_class; /**< 8 bit New Traffic Class; Relevant if valid_updates contains
  113428. + IOC_HDR_MANIP_IPV6_TC */
  113429. + uint8_t src[IOC_NET_HEADER_FIELD_IPv6_ADDR_SIZE];
  113430. + /**< 16 byte new IP SRC; Relevant only if valid_updates
  113431. + contains IOC_HDR_MANIP_IPV6_SRC */
  113432. + uint8_t dst[IOC_NET_HEADER_FIELD_IPv6_ADDR_SIZE];
  113433. + /**< 16 byte new IP DST; Relevant only if valid_updates
  113434. + contains IOC_HDR_MANIP_IPV6_DST */
  113435. +} ioc_fm_pcd_manip_hdr_field_update_ipv6_t;
  113436. +
  113437. +/**************************************************************************//**
  113438. + @Description Parameters for defining header manipulation TCP/UDP fields updates
  113439. +*//***************************************************************************/
  113440. +typedef struct ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t {
  113441. + ioc_tcp_udp_hdr_manip_update_flags_t valid_updates; /**< ORed flag, selecting the required updates */
  113442. + uint16_t src; /**< 16 bit New TCP/UDP SRC; Relevant only if valid_updates
  113443. + contains IOC_HDR_MANIP_TCP_UDP_SRC */
  113444. + uint16_t dst; /**< 16 bit New TCP/UDP DST; Relevant only if valid_updates
  113445. + contains IOC_HDR_MANIP_TCP_UDP_DST */
  113446. +} ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t;
  113447. +
  113448. +/**************************************************************************//**
  113449. + @Description Parameters for defining header manipulation fields updates
  113450. +*//***************************************************************************/
  113451. +typedef struct ioc_fm_pcd_manip_hdr_field_update_params_t {
  113452. + ioc_fm_pcd_manip_hdr_field_update_type type; /**< Type of header field update manipulation */
  113453. + union {
  113454. + ioc_fm_pcd_manip_hdr_field_update_vlan_t vlan; /**< Parameters for VLAN update. Relevant when
  113455. + type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_VLAN */
  113456. + ioc_fm_pcd_manip_hdr_field_update_ipv4_t ipv4; /**< Parameters for IPv4 update. Relevant when
  113457. + type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV4 */
  113458. + ioc_fm_pcd_manip_hdr_field_update_ipv6_t ipv6; /**< Parameters for IPv6 update. Relevant when
  113459. + type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_IPV6 */
  113460. + ioc_fm_pcd_manip_hdr_field_update_tcp_udp_t tcp_udp;/**< Parameters for TCP/UDP update. Relevant when
  113461. + type = e_IOC_FM_PCD_MANIP_HDR_FIELD_UPDATE_TCP_UDP */
  113462. + } u;
  113463. +} ioc_fm_pcd_manip_hdr_field_update_params_t;
  113464. +
  113465. +/**************************************************************************//**
  113466. + @Description Parameters for defining custom header manipulation for IP replacement
  113467. +*//***************************************************************************/
  113468. +typedef struct ioc_fm_pcd_manip_hdr_custom_ip_hdr_replace_t {
  113469. + ioc_fm_pcd_manip_hdr_custom_ip_replace replace_type; /**< Selects replace update type */
  113470. + bool dec_ttl_hl; /**< Decrement TTL (IPV4) or Hop limit (IPV6) by 1 */
  113471. + bool update_ipv4_id; /**< Relevant when replace_type =
  113472. + e_IOC_FM_PCD_MANIP_HDR_CUSTOM_REPLACE_IPV6_BY_IPV4 */
  113473. + uint16_t id; /**< 16 bit New IP ID; Relevant only if
  113474. + update_ipv4_id = TRUE */
  113475. + uint8_t hdr_size; /**< The size of the new IP header */
  113476. + uint8_t hdr[IOC_FM_PCD_MANIP_MAX_HDR_SIZE];
  113477. + /**< The new IP header */
  113478. +} ioc_fm_pcd_manip_hdr_custom_ip_hdr_replace_t;
  113479. +
  113480. +/**************************************************************************//**
  113481. + @Description Parameters for defining custom header manipulation
  113482. +*//***************************************************************************/
  113483. +typedef struct ioc_fm_pcd_manip_hdr_custom_params_t {
  113484. + ioc_fm_pcd_manip_hdr_custom_type type; /**< Type of header field update manipulation */
  113485. + union {
  113486. + ioc_fm_pcd_manip_hdr_custom_ip_hdr_replace_t ip_hdr_replace;
  113487. + /**< Parameters IP header replacement */
  113488. + } u;
  113489. +} ioc_fm_pcd_manip_hdr_custom_params_t;
  113490. +
  113491. +/**************************************************************************//**
  113492. + @Description Parameters for defining specific L2 insertion manipulation
  113493. +*//***************************************************************************/
  113494. +typedef struct ioc_fm_pcd_manip_hdr_insrt_specific_l2_params_t {
  113495. + ioc_fm_pcd_manip_hdr_insrt_specific_l2 specific_l2; /**< Selects which L2 headers to insert */
  113496. + bool update; /**< TRUE to update MPLS header */
  113497. + uint8_t size; /**< size of inserted section */
  113498. + uint8_t *p_data; /**< data to be inserted */
  113499. +} ioc_fm_pcd_manip_hdr_insrt_specific_l2_params_t;
  113500. +
  113501. +#if (DPAA_VERSION >= 11)
  113502. +/**************************************************************************//**
  113503. + @Description Parameters for defining IP insertion manipulation
  113504. +*//***************************************************************************/
  113505. +typedef struct ioc_fm_pcd_manip_hdr_insrt_ip_params_t {
  113506. + bool calc_l4_checksum; /**< Calculate L4 checksum. */
  113507. + ioc_fm_pcd_manip_hdr_qos_mapping_mode mapping_mode; /**< TODO */
  113508. + uint8_t last_pid_offset; /**< the offset of the last Protocol within
  113509. + the inserted header */
  113510. + uint16_t id; /**< 16 bit New IP ID */
  113511. + bool dont_frag_overwrite;
  113512. + /**< IPv4 only. DF is overwritten with the hash-result next-to-last byte.
  113513. + * This byte is configured to be overwritten when RPD is set. */
  113514. + uint8_t last_dst_offset;
  113515. + /**< IPv6 only. if routing extension exist, user should set the offset of the destination address
  113516. + * in order to calculate UDP checksum pseudo header;
  113517. + * Otherwise set it to '0'. */
  113518. + ioc_fm_pcd_manip_hdr_insrt_t insrt; /**< size and data to be inserted. */
  113519. +} ioc_fm_pcd_manip_hdr_insrt_ip_params_t;
  113520. +#endif /* (DPAA_VERSION >= 11) */
  113521. +
  113522. +/**************************************************************************//**
  113523. + @Description Parameters for defining header insertion manipulation by header type
  113524. +*//***************************************************************************/
  113525. +typedef struct ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t {
  113526. + ioc_fm_pcd_manip_hdr_insrt_by_hdr_type type; /**< Selects manipulation type */
  113527. + union {
  113528. + ioc_fm_pcd_manip_hdr_insrt_specific_l2_params_t specific_l2_params;
  113529. + /**< Used when type = e_IOC_FM_PCD_MANIP_INSRT_BY_HDR_SPECIFIC_L2:
  113530. + Selects which L2 headers to remove */
  113531. +#if (DPAA_VERSION >= 11)
  113532. + ioc_fm_pcd_manip_hdr_insrt_ip_params_t ip_params; /**< Used when type = e_FM_PCD_MANIP_INSRT_BY_HDR_IP */
  113533. + ioc_fm_pcd_manip_hdr_insrt_t insrt; /**< Used when type is one of e_FM_PCD_MANIP_INSRT_BY_HDR_UDP,
  113534. + e_FM_PCD_MANIP_INSRT_BY_HDR_UDP_LITE, or
  113535. + e_FM_PCD_MANIP_INSRT_BY_HDR_CAPWAP */
  113536. +#endif /* (DPAA_VERSION >= 11) */
  113537. + } u;
  113538. +} ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t;
  113539. +
  113540. +/**************************************************************************//**
  113541. + @Description Parameters for defining header insertion manipulation
  113542. +*//***************************************************************************/
  113543. +typedef struct ioc_fm_pcd_manip_hdr_insrt_params_t {
  113544. + ioc_fm_pcd_manip_hdr_insrt_type type; /**< Type of insertion manipulation */
  113545. + union {
  113546. + ioc_fm_pcd_manip_hdr_insrt_by_hdr_params_t by_hdr; /**< Parameters for defining header insertion manipulation by header type,
  113547. + relevant if 'type' = e_IOC_FM_PCD_MANIP_INSRT_BY_HDR */
  113548. + ioc_fm_pcd_manip_hdr_insrt_generic_params_t generic;/**< Parameters for defining generic header insertion manipulation,
  113549. + relevant if type = e_IOC_FM_PCD_MANIP_INSRT_GENERIC */
  113550. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  113551. + ioc_fm_pcd_manip_hdr_insrt_by_template_params_t by_template;
  113552. + /**< Parameters for defining header insertion manipulation by template,
  113553. + relevant if 'type' = e_IOC_FM_PCD_MANIP_INSRT_BY_TEMPLATE */
  113554. +#endif /* FM_CAPWAP_SUPPORT */
  113555. + } u;
  113556. +} ioc_fm_pcd_manip_hdr_insrt_params_t;
  113557. +
  113558. +/**************************************************************************//**
  113559. + @Description Parameters for defining header removal manipulation
  113560. +*//***************************************************************************/
  113561. +typedef struct ioc_fm_pcd_manip_hdr_rmv_params_t {
  113562. + ioc_fm_pcd_manip_hdr_rmv_type type; /**< Type of header removal manipulation */
  113563. + union {
  113564. + ioc_fm_pcd_manip_hdr_rmv_by_hdr_params_t by_hdr; /**< Parameters for defining header removal manipulation by header type,
  113565. + relevant if type = e_IOC_FM_PCD_MANIP_RMV_BY_HDR */
  113566. + ioc_fm_pcd_manip_hdr_rmv_generic_params_t generic; /**< Parameters for defining generic header removal manipulation,
  113567. + relevant if type = e_IOC_FM_PCD_MANIP_RMV_GENERIC */
  113568. + } u;
  113569. +} ioc_fm_pcd_manip_hdr_rmv_params_t;
  113570. +
  113571. +/**************************************************************************//**
  113572. + @Description Parameters for defining header manipulation node
  113573. +*//***************************************************************************/
  113574. +typedef struct ioc_fm_pcd_manip_hdr_params_t {
  113575. + bool rmv; /**< TRUE, to define removal manipulation */
  113576. + ioc_fm_pcd_manip_hdr_rmv_params_t rmv_params; /**< Parameters for removal manipulation, relevant if 'rmv' = TRUE */
  113577. +
  113578. + bool insrt; /**< TRUE, to define insertion manipulation */
  113579. + ioc_fm_pcd_manip_hdr_insrt_params_t insrt_params; /**< Parameters for insertion manipulation, relevant if 'insrt' = TRUE */
  113580. +
  113581. + bool field_update; /**< TRUE, to define field update manipulation */
  113582. + ioc_fm_pcd_manip_hdr_field_update_params_t field_update_params; /**< Parameters for field update manipulation, relevant if 'fieldUpdate' = TRUE */
  113583. +
  113584. + bool custom; /**< TRUE, to define custom manipulation */
  113585. + ioc_fm_pcd_manip_hdr_custom_params_t custom_params; /**< Parameters for custom manipulation, relevant if 'custom' = TRUE */
  113586. +
  113587. + bool dont_parse_after_manip;/**< FALSE to activate the parser a second time after
  113588. + completing the manipulation on the frame */
  113589. +} ioc_fm_pcd_manip_hdr_params_t;
  113590. +
  113591. +
  113592. +/**************************************************************************//**
  113593. + @Description structure for defining fragmentation manipulation
  113594. +*//***************************************************************************/
  113595. +typedef struct ioc_fm_pcd_manip_frag_params_t {
  113596. + ioc_net_header_type hdr; /**< Header selection */
  113597. + union {
  113598. +#if (DPAA_VERSION >= 11)
  113599. + ioc_fm_pcd_manip_frag_capwap_params_t capwap_frag; /**< Parameters for defining CAPWAP fragmentation,
  113600. + relevant if 'hdr' = HEADER_TYPE_CAPWAP */
  113601. +#endif /* (DPAA_VERSION >= 11) */
  113602. + ioc_fm_pcd_manip_frag_ip_params_t ip_frag; /**< Parameters for defining IP fragmentation,
  113603. + relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
  113604. + } u;
  113605. +} ioc_fm_pcd_manip_frag_params_t;
  113606. +
  113607. +/**************************************************************************//**
  113608. + @Description structure for defining reassemble manipulation
  113609. +*//***************************************************************************/
  113610. +typedef struct ioc_fm_pcd_manip_reassem_params_t {
  113611. + ioc_net_header_type hdr; /**< Header selection */
  113612. + union {
  113613. +#if (DPAA_VERSION >= 11)
  113614. + ioc_fm_pcd_manip_reassem_capwap_params_t capwap_reassem; /**< Parameters for defining CAPWAP reassembly,
  113615. + relevant if 'hdr' = HEADER_TYPE_CAPWAP */
  113616. +#endif /* (DPAA_VERSION >= 11) */
  113617. + ioc_fm_pcd_manip_reassem_ip_params_t ip_reassem; /**< Parameters for defining IP reassembly,
  113618. + relevant if 'hdr' = HEADER_TYPE_Ipv4 or HEADER_TYPE_Ipv6 */
  113619. + } u;
  113620. +} ioc_fm_pcd_manip_reassem_params_t;
  113621. +
  113622. +/**************************************************************************//**
  113623. + @Description Parameters for defining a manipulation node
  113624. +*//***************************************************************************/
  113625. +typedef struct ioc_fm_pcd_manip_params_t {
  113626. + ioc_fm_pcd_manip_type type; /**< Selects type of manipulation node */
  113627. + union {
  113628. + ioc_fm_pcd_manip_hdr_params_t hdr; /**< Parameters for defining header manipulation node */
  113629. + ioc_fm_pcd_manip_reassem_params_t reassem;/**< Parameters for defining reassembly manipulation node */
  113630. + ioc_fm_pcd_manip_frag_params_t frag; /**< Parameters for defining fragmentation manipulation node */
  113631. + ioc_fm_pcd_manip_special_offload_params_t special_offload;/**< Parameters for defining special offload manipulation node */
  113632. + } u;
  113633. + void *p_next_manip;/**< Handle to another (previously defined) manipulation node;
  113634. + Allows concatenation of manipulation actions
  113635. + This parameter is optional and may be NULL. */
  113636. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  113637. + bool frag_or_reasm;/**< TRUE, if defined fragmentation/reassembly manipulation */
  113638. + ioc_fm_pcd_manip_frag_or_reasm_params_t frag_or_reasm_params;/**< Parameters for fragmentation/reassembly manipulation,
  113639. + relevant if frag_or_reasm = TRUE */
  113640. +#endif /* FM_CAPWAP_SUPPORT */
  113641. + void *id;
  113642. +} ioc_fm_pcd_manip_params_t;
  113643. +
  113644. +/**************************************************************************//**
  113645. + @Description Structure for retrieving IP reassembly statistics
  113646. +*//***************************************************************************/
  113647. +typedef struct ioc_fm_pcd_manip_reassem_ip_stats_t {
  113648. + /* common counters for both IPv4 and IPv6 */
  113649. + uint32_t timeout; /**< Counts the number of TimeOut occurrences */
  113650. + uint32_t rfd_pool_busy; /**< Counts the number of failed attempts to allocate
  113651. + a Reassembly Frame Descriptor */
  113652. + uint32_t internal_buffer_busy; /**< Counts the number of times an internal buffer busy occurred */
  113653. + uint32_t external_buffer_busy; /**< Counts the number of times external buffer busy occurred */
  113654. + uint32_t sg_fragments; /**< Counts the number of Scatter/Gather fragments */
  113655. + uint32_t dma_semaphore_depletion; /**< Counts the number of failed attempts to allocate a DMA semaphore */
  113656. +#if (DPAA_VERSION >= 11)
  113657. + uint32_t non_consistent_sp; /**< Counts the number of Non Consistent Storage Profile events for
  113658. + successfully reassembled frames */
  113659. +#endif /* (DPAA_VERSION >= 11) */
  113660. +struct {
  113661. + uint32_t successfully_reassembled; /**< Counts the number of successfully reassembled frames */
  113662. + uint32_t valid_fragments; /**< Counts the total number of valid fragments that
  113663. + have been processed for all frames */
  113664. + uint32_t processed_fragments; /**< Counts the number of processed fragments
  113665. + (valid and error fragments) for all frames */
  113666. + uint32_t malformed_fragments; /**< Counts the number of malformed fragments processed for all frames */
  113667. + uint32_t discarded_fragments; /**< Counts the number of fragments discarded by the reassembly process */
  113668. + uint32_t auto_learn_busy; /**< Counts the number of times a busy condition occurs when attempting
  113669. + to access an IP-Reassembly Automatic Learning Hash set */
  113670. + uint32_t more_than16fragments; /**< Counts the fragment occurrences in which the number of fragments-per-frame
  113671. + exceeds 16 */
  113672. + } specific_hdr_statistics[2]; /**< slot '0' is for IPv4, slot '1' is for IPv6 */
  113673. +} ioc_fm_pcd_manip_reassem_ip_stats_t;
  113674. +
  113675. +/**************************************************************************//**
  113676. + @Description Structure for retrieving IP fragmentation statistics
  113677. +*//***************************************************************************/
  113678. +typedef struct ioc_fm_pcd_manip_frag_ip_stats_t {
  113679. + uint32_t total_frames; /**< Number of frames that passed through the manipulation node */
  113680. + uint32_t fragmented_frames; /**< Number of frames that were fragmented */
  113681. + uint32_t generated_fragments; /**< Number of fragments that were generated */
  113682. +} ioc_fm_pcd_manip_frag_ip_stats_t;
  113683. +
  113684. +#if (DPAA_VERSION >= 11)
  113685. +/**************************************************************************//**
  113686. + @Description Structure for retrieving CAPWAP reassembly statistics
  113687. +*//***************************************************************************/
  113688. +typedef struct ioc_fm_pcd_manip_reassem_capwap_stats_t {
  113689. + uint32_t timeout; /**< Counts the number of timeout occurrences */
  113690. + uint32_t rfd_pool_busy; /**< Counts the number of failed attempts to allocate
  113691. + a Reassembly Frame Descriptor */
  113692. + uint32_t internal_buffer_busy; /**< Counts the number of times an internal buffer busy occurred */
  113693. + uint32_t external_buffer_busy; /**< Counts the number of times external buffer busy occurred */
  113694. + uint32_t sg_fragments; /**< Counts the number of Scatter/Gather fragments */
  113695. + uint32_t dma_semaphore_depletion; /**< Counts the number of failed attempts to allocate a DMA semaphore */
  113696. + uint32_t successfully_reassembled; /**< Counts the number of successfully reassembled frames */
  113697. + uint32_t valid_fragments; /**< Counts the total number of valid fragments that
  113698. + have been processed for all frames */
  113699. + uint32_t processed_fragments; /**< Counts the number of processed fragments
  113700. + (valid and error fragments) for all frames */
  113701. + uint32_t malformed_fragments; /**< Counts the number of malformed fragments processed for all frames */
  113702. + uint32_t autoLearn_busy; /**< Counts the number of times a busy condition occurs when attempting
  113703. + to access an Reassembly Automatic Learning Hash set */
  113704. + uint32_t discarded_fragments; /**< Counts the number of fragments discarded by the reassembly process */
  113705. + uint32_t more_than16fragments; /**< Counts the fragment occurrences in which the number of fragments-per-frame
  113706. + exceeds 16 */
  113707. + uint32_t exceed_max_reassembly_frame_len;/**< ounts the number of times that a successful reassembled frame
  113708. + length exceeds MaxReassembledFrameLength value */
  113709. +} ioc_fm_pcd_manip_reassem_capwap_stats_t;
  113710. +
  113711. +/**************************************************************************//**
  113712. + @Description Structure for retrieving CAPWAP fragmentation statistics
  113713. +*//***************************************************************************/
  113714. +typedef struct ioc_fm_pcd_manip_frag_capwap_stats_t {
  113715. + uint32_t total_frames; /**< Number of frames that passed through the manipulation node */
  113716. + uint32_t fragmented_frames; /**< Number of frames that were fragmented */
  113717. + uint32_t generated_fragments; /**< Number of fragments that were generated */
  113718. +#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
  113719. + uint8_t sg_allocation_failure; /**< Number of allocation failure of s/g buffers */
  113720. +#endif /* (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0)) */
  113721. +} ioc_fm_pcd_manip_frag_capwap_stats_t;
  113722. +#endif /* (DPAA_VERSION >= 11) */
  113723. +
  113724. +/**************************************************************************//**
  113725. + @Description Structure for retrieving reassembly statistics
  113726. +*//***************************************************************************/
  113727. +typedef struct ioc_fm_pcd_manip_reassem_stats_t {
  113728. + union {
  113729. + ioc_fm_pcd_manip_reassem_ip_stats_t ip_reassem; /**< Structure for IP reassembly statistics */
  113730. +#if (DPAA_VERSION >= 11)
  113731. + ioc_fm_pcd_manip_reassem_capwap_stats_t capwap_reassem; /**< Structure for CAPWAP reassembly statistics */
  113732. +#endif /* (DPAA_VERSION >= 11) */
  113733. + } u;
  113734. +} ioc_fm_pcd_manip_reassem_stats_t;
  113735. +
  113736. +/**************************************************************************//**
  113737. + @Description structure for retrieving fragmentation statistics
  113738. +*//***************************************************************************/
  113739. +typedef struct ioc_fm_pcd_manip_frag_stats_t {
  113740. + union {
  113741. + ioc_fm_pcd_manip_frag_ip_stats_t ip_frag; /**< Structure for IP fragmentation statistics */
  113742. +#if (DPAA_VERSION >= 11)
  113743. + ioc_fm_pcd_manip_frag_capwap_stats_t capwap_frag; /**< Structure for CAPWAP fragmentation statistics */
  113744. +#endif /* (DPAA_VERSION >= 11) */
  113745. + } u;
  113746. +} ioc_fm_pcd_manip_frag_stats_t;
  113747. +
  113748. +/**************************************************************************//**
  113749. + @Description structure for defining manipulation statistics
  113750. +*//***************************************************************************/
  113751. +typedef struct ioc_fm_pcd_manip_stats_t {
  113752. + union {
  113753. + ioc_fm_pcd_manip_reassem_stats_t reassem; /**< Structure for reassembly statistics */
  113754. + ioc_fm_pcd_manip_frag_stats_t frag; /**< Structure for fragmentation statistics */
  113755. + } u;
  113756. +} ioc_fm_pcd_manip_stats_t;
  113757. +
  113758. +/**************************************************************************//**
  113759. + @Description Parameters for acquiring manipulation statistics
  113760. +*//***************************************************************************/
  113761. +typedef struct ioc_fm_pcd_manip_get_stats_t {
  113762. + void *id;
  113763. + ioc_fm_pcd_manip_stats_t stats;
  113764. +} ioc_fm_pcd_manip_get_stats_t;
  113765. +
  113766. +#if DPAA_VERSION >= 11
  113767. +/**************************************************************************//**
  113768. + @Description Parameters for defining frame replicator group and its members
  113769. +*//***************************************************************************/
  113770. +typedef struct ioc_fm_pcd_frm_replic_group_params_t {
  113771. + uint8_t max_num_of_entries; /**< Maximal number of members in the group - must be at least two */
  113772. + uint8_t num_of_entries; /**< Number of members in the group - must be at least 1 */
  113773. + ioc_fm_pcd_cc_next_engine_params_t next_engine_params[IOC_FM_PCD_FRM_REPLIC_MAX_NUM_OF_ENTRIES];
  113774. + /**< Array of members' parameters */
  113775. + void *id;
  113776. +} ioc_fm_pcd_frm_replic_group_params_t;
  113777. +
  113778. +typedef struct ioc_fm_pcd_frm_replic_member_t {
  113779. + void *h_replic_group;
  113780. + uint16_t member_index;
  113781. +} ioc_fm_pcd_frm_replic_member_t;
  113782. +
  113783. +typedef struct ioc_fm_pcd_frm_replic_member_params_t {
  113784. + ioc_fm_pcd_frm_replic_member_t member;
  113785. + ioc_fm_pcd_cc_next_engine_params_t next_engine_params;
  113786. +} ioc_fm_pcd_frm_replic_member_params_t;
  113787. +#endif /* DPAA_VERSION >= 11 */
  113788. +
  113789. +
  113790. +typedef struct ioc_fm_pcd_cc_key_statistics_t {
  113791. + uint32_t byte_count; /**< This counter reflects byte count of frames that
  113792. + were matched by this key. */
  113793. + uint32_t frame_count; /**< This counter reflects count of frames that
  113794. + were matched by this key. */
  113795. +#if (DPAA_VERSION >= 11)
  113796. + uint32_t frame_length_range_count[IOC_FM_PCD_CC_STATS_MAX_NUM_OF_FLR];
  113797. + /**< These counters reflect how many frames matched
  113798. + this key in 'RMON' statistics mode:
  113799. + Each counter holds the number of frames of a
  113800. + specific frames length range, according to the
  113801. + ranges provided at initialization. */
  113802. +#endif /* (DPAA_VERSION >= 11) */
  113803. +} ioc_fm_pcd_cc_key_statistics_t;
  113804. +
  113805. +
  113806. +typedef struct ioc_fm_pcd_cc_tbl_get_stats_t {
  113807. + void *id;
  113808. + uint16_t key_index;
  113809. + ioc_fm_pcd_cc_key_statistics_t statistics;
  113810. +} ioc_fm_pcd_cc_tbl_get_stats_t;
  113811. +
  113812. +/**************************************************************************//**
  113813. + @Function FM_PCD_MatchTableGetKeyStatistics
  113814. +
  113815. + @Description This routine may be used to get statistics counters of specific key
  113816. + in a CC Node.
  113817. +
  113818. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  113819. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  113820. + these counters reflect how many frames passed that were matched
  113821. + this key; The total frames count will be returned in the counter
  113822. + of the first range (as only one frame length range was defined).
  113823. + If 'e_FM_PCD_CC_STATS_MODE_RMON' was set for this node, the total
  113824. + frame count will be separated to frame length counters, based on
  113825. + provided frame length ranges.
  113826. +
  113827. + @Param[in] h_CcNode A handle to the node
  113828. + @Param[in] keyIndex Key index for adding
  113829. + @Param[out] p_KeyStatistics Key statistics counters
  113830. +
  113831. + @Return The specific key statistics.
  113832. +
  113833. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  113834. +*//***************************************************************************/
  113835. +
  113836. +#if defined(CONFIG_COMPAT)
  113837. +#define FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(12), ioc_compat_fm_pcd_cc_tbl_get_stats_t)
  113838. +#endif
  113839. +#define FM_PCD_IOC_MATCH_TABLE_GET_KEY_STAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(12), ioc_fm_pcd_cc_tbl_get_stats_t)
  113840. +
  113841. +/**************************************************************************//**
  113842. + @Function FM_PCD_MatchTableGetMissStatistics
  113843. +
  113844. + @Description This routine may be used to get statistics counters of miss entry
  113845. + in a CC Node.
  113846. +
  113847. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  113848. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  113849. + these counters reflect how many frames were not matched to any
  113850. + existing key and therefore passed through the miss entry; The
  113851. + total frames count will be returned in the counter of the
  113852. + first range (as only one frame length range was defined).
  113853. +
  113854. + @Param[in] h_CcNode A handle to the node
  113855. + @Param[out] p_MissStatistics Statistics counters for 'miss'
  113856. +
  113857. + @Return E_OK on success; Error code otherwise.
  113858. +
  113859. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  113860. +*//***************************************************************************/
  113861. +
  113862. +#if defined(CONFIG_COMPAT)
  113863. +#define FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(13), ioc_compat_fm_pcd_cc_tbl_get_stats_t)
  113864. +#endif
  113865. +#define FM_PCD_IOC_MATCH_TABLE_GET_MISS_STAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(13), ioc_fm_pcd_cc_tbl_get_stats_t)
  113866. +
  113867. +/**************************************************************************//**
  113868. + @Function FM_PCD_HashTableGetMissStatistics
  113869. +
  113870. + @Description This routine may be used to get statistics counters of 'miss'
  113871. + entry of the a hash table.
  113872. +
  113873. + If 'e_FM_PCD_CC_STATS_MODE_FRAME' and
  113874. + 'e_FM_PCD_CC_STATS_MODE_BYTE_AND_FRAME' were set for this node,
  113875. + these counters reflect how many frames were not matched to any
  113876. + existing key and therefore passed through the miss entry;
  113877. +
  113878. + @Param[in] h_HashTbl A handle to a hash table
  113879. + @Param[out] p_MissStatistics Statistics counters for 'miss'
  113880. +
  113881. + @Return E_OK on success; Error code otherwise.
  113882. +
  113883. + @Cautions Allowed only following FM_PCD_HashTableSet().
  113884. +*//***************************************************************************/
  113885. +
  113886. +#if defined(CONFIG_COMPAT)
  113887. +#define FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(14), ioc_compat_fm_pcd_cc_tbl_get_stats_t)
  113888. +#endif
  113889. +#define FM_PCD_IOC_HASH_TABLE_GET_MISS_STAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(14), ioc_fm_pcd_cc_tbl_get_stats_t)
  113890. +
  113891. +
  113892. +/**************************************************************************//**
  113893. + @Function FM_PCD_NetEnvCharacteristicsSet
  113894. +
  113895. + @Description Define a set of Network Environment Characteristics.
  113896. +
  113897. + When setting an environment it is important to understand its
  113898. + application. It is not meant to describe the flows that will run
  113899. + on the ports using this environment, but what the user means TO DO
  113900. + with the PCD mechanisms in order to parse-classify-distribute those
  113901. + frames.
  113902. + By specifying a distinction unit, the user means it would use that option
  113903. + for distinction between frames at either a KeyGen scheme or a coarse
  113904. + classification action descriptor. Using interchangeable headers to define a
  113905. + unit means that the user is indifferent to which of the interchangeable
  113906. + headers is present in the frame, and wants the distinction to be based
  113907. + on the presence of either one of them.
  113908. +
  113909. + Depending on context, there are limitations to the use of environments. A
  113910. + port using the PCD functionality is bound to an environment. Some or even
  113911. + all ports may share an environment but also an environment per port is
  113912. + possible. When initializing a scheme, a classification plan group (see below),
  113913. + or a coarse classification tree, one of the initialized environments must be
  113914. + stated and related to. When a port is bound to a scheme, a classification
  113915. + plan group, or a coarse classification tree, it MUST be bound to the same
  113916. + environment.
  113917. +
  113918. + The different PCD modules, may relate (for flows definition) ONLY on
  113919. + distinction units as defined by their environment. When initializing a
  113920. + scheme for example, it may not choose to select IPV4 as a match for
  113921. + recognizing flows unless it was defined in the relating environment. In
  113922. + fact, to guide the user through the configuration of the PCD, each module's
  113923. + characterization in terms of flows is not done using protocol names, but using
  113924. + environment indexes.
  113925. +
  113926. + In terms of HW implementation, the list of distinction units sets the LCV vectors
  113927. + and later used for match vector, classification plan vectors and coarse classification
  113928. + indexing.
  113929. +
  113930. + @Param[in,out] ioc_fm_pcd_net_env_params_t A structure defining the distiction units for this configuration.
  113931. +
  113932. + @Return 0 on success; Error code otherwise.
  113933. +*//***************************************************************************/
  113934. +#if defined(CONFIG_COMPAT)
  113935. +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(20), ioc_compat_fm_pcd_net_env_params_t)
  113936. +#endif
  113937. +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(20), ioc_fm_pcd_net_env_params_t)
  113938. +
  113939. +/**************************************************************************//**
  113940. + @Function FM_PCD_NetEnvCharacteristicsDelete
  113941. +
  113942. + @Description Deletes a set of Network Environment Charecteristics.
  113943. +
  113944. + @Param[in] ioc_fm_obj_t - The id of a Network Environment object.
  113945. +
  113946. + @Return 0 on success; Error code otherwise.
  113947. +*//***************************************************************************/
  113948. +#if defined(CONFIG_COMPAT)
  113949. +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(21), ioc_compat_fm_obj_t)
  113950. +#endif
  113951. +#define FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(21), ioc_fm_obj_t)
  113952. +
  113953. +/**************************************************************************//**
  113954. + @Function FM_PCD_KgSchemeSet
  113955. +
  113956. + @Description Initializing or modifying and enabling a scheme for the KeyGen.
  113957. + This routine should be called for adding or modifying a scheme.
  113958. + When a scheme needs modifying, the API requires that it will be
  113959. + rewritten. In such a case 'modify' should be TRUE. If the
  113960. + routine is called for a valid scheme and 'modify' is FALSE,
  113961. + it will return error.
  113962. +
  113963. + @Param[in,out] ioc_fm_pcd_kg_scheme_params_t A structure of parameters for defining the scheme
  113964. +
  113965. + @Return 0 on success; Error code otherwise.
  113966. +*//***************************************************************************/
  113967. +#if defined(CONFIG_COMPAT)
  113968. +#define FM_PCD_IOC_KG_SCHEME_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(24), ioc_compat_fm_pcd_kg_scheme_params_t)
  113969. +#endif
  113970. +#define FM_PCD_IOC_KG_SCHEME_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(24), ioc_fm_pcd_kg_scheme_params_t)
  113971. +
  113972. +/**************************************************************************//**
  113973. + @Function FM_PCD_KgSchemeDelete
  113974. +
  113975. + @Description Deleting an initialized scheme.
  113976. +
  113977. + @Param[in] ioc_fm_obj_t scheme id as initalized by application at FM_PCD_IOC_KG_SET_SCHEME
  113978. +
  113979. + @Return 0 on success; Error code otherwise.
  113980. +*//***************************************************************************/
  113981. +#if defined(CONFIG_COMPAT)
  113982. +#define FM_PCD_IOC_KG_SCHEME_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(25), ioc_compat_fm_obj_t)
  113983. +#endif
  113984. +#define FM_PCD_IOC_KG_SCHEME_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(25), ioc_fm_obj_t)
  113985. +
  113986. +/**************************************************************************//**
  113987. + @Function FM_PCD_CcRootBuild
  113988. +
  113989. + @Description This routine must be called to define a complete coarse
  113990. + classification tree. This is the way to define coarse
  113991. + classification to a certain flow - the KeyGen schemes
  113992. + may point only to trees defined in this way.
  113993. +
  113994. + @Param[in,out] ioc_fm_pcd_cc_tree_params_t A structure of parameters to define the tree.
  113995. +
  113996. + @Return 0 on success; Error code otherwise.
  113997. +*//***************************************************************************/
  113998. +#if defined(CONFIG_COMPAT)
  113999. +#define FM_PCD_IOC_CC_ROOT_BUILD_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(26), compat_uptr_t)
  114000. +#endif
  114001. +#define FM_PCD_IOC_CC_ROOT_BUILD _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(26), void *) /* workaround ...*/
  114002. +
  114003. +/**************************************************************************//**
  114004. + @Function FM_PCD_CcRootDelete
  114005. +
  114006. + @Description Deleting a built tree.
  114007. +
  114008. + @Param[in] ioc_fm_obj_t - The id of a CC tree.
  114009. +*//***************************************************************************/
  114010. +#if defined(CONFIG_COMPAT)
  114011. +#define FM_PCD_IOC_CC_ROOT_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(27), ioc_compat_fm_obj_t)
  114012. +#endif
  114013. +#define FM_PCD_IOC_CC_ROOT_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(27), ioc_fm_obj_t)
  114014. +
  114015. +/**************************************************************************//**
  114016. + @Function FM_PCD_MatchTableSet
  114017. +
  114018. + @Description This routine should be called for each CC (coarse classification)
  114019. + node. The whole CC tree should be built bottom up so that each
  114020. + node points to already defined nodes. p_NodeId returns the node
  114021. + Id to be used by other nodes.
  114022. +
  114023. + @Param[in,out] ioc_fm_pcd_cc_node_params_t A structure for defining the CC node params
  114024. +
  114025. + @Return 0 on success; Error code otherwise.
  114026. +*//***************************************************************************/
  114027. +#if defined(CONFIG_COMPAT)
  114028. +#define FM_PCD_IOC_MATCH_TABLE_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(28), compat_uptr_t)
  114029. +#endif
  114030. +#define FM_PCD_IOC_MATCH_TABLE_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(28), void *) /* workaround ...*/
  114031. +
  114032. +/**************************************************************************//**
  114033. + @Function FM_PCD_MatchTableDelete
  114034. +
  114035. + @Description Deleting a built node.
  114036. +
  114037. + @Param[in] ioc_fm_obj_t - The id of a CC node.
  114038. +
  114039. + @Return 0 on success; Error code otherwise.
  114040. +*//***************************************************************************/
  114041. +#if defined(CONFIG_COMPAT)
  114042. +#define FM_PCD_IOC_MATCH_TABLE_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(29), ioc_compat_fm_obj_t)
  114043. +#endif
  114044. +#define FM_PCD_IOC_MATCH_TABLE_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(29), ioc_fm_obj_t)
  114045. +
  114046. +/**************************************************************************//**
  114047. + @Function FM_PCD_CcRootModifyNextEngine
  114048. +
  114049. + @Description Modify the Next Engine Parameters in the entry of the tree.
  114050. +
  114051. + @Param[in] ioc_fm_pcd_cc_tree_modify_next_engine_params_t - Pointer to a structure with the relevant parameters
  114052. +
  114053. + @Return 0 on success; Error code otherwise.
  114054. +
  114055. + @Cautions Allowed only following FM_PCD_CcRootBuild().
  114056. +*//***************************************************************************/
  114057. +#if defined(CONFIG_COMPAT)
  114058. +#define FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(30), ioc_compat_fm_pcd_cc_tree_modify_next_engine_params_t)
  114059. +#endif
  114060. +#define FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(30), ioc_fm_pcd_cc_tree_modify_next_engine_params_t)
  114061. +
  114062. +/**************************************************************************//**
  114063. + @Function FM_PCD_MatchTableModifyNextEngine
  114064. +
  114065. + @Description Modify the Next Engine Parameters in the relevant key entry of the node.
  114066. +
  114067. + @Param[in] ioc_fm_pcd_cc_node_modify_next_engine_params_t A pointer to a structure with the relevant parameters
  114068. +
  114069. + @Return 0 on success; Error code otherwise.
  114070. +
  114071. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  114072. +*//***************************************************************************/
  114073. +#if defined(CONFIG_COMPAT)
  114074. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(31), ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)
  114075. +#endif
  114076. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(31), ioc_fm_pcd_cc_node_modify_next_engine_params_t)
  114077. +
  114078. +/**************************************************************************//**
  114079. + @Function FM_PCD_MatchTableModifyMissNextEngine
  114080. +
  114081. + @Description Modify the Next Engine Parameters of the Miss key case of the node.
  114082. +
  114083. + @Param[in] ioc_fm_pcd_cc_node_modify_next_engine_params_t - Pointer to a structure with the relevant parameters
  114084. +
  114085. + @Return 0 on success; Error code otherwise.
  114086. +
  114087. + @Cautions Allowed only following FM_PCD_MatchTableSet().
  114088. +*//***************************************************************************/
  114089. +#if defined(CONFIG_COMPAT)
  114090. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(32), ioc_compat_fm_pcd_cc_node_modify_next_engine_params_t)
  114091. +#endif
  114092. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(32), ioc_fm_pcd_cc_node_modify_next_engine_params_t)
  114093. +
  114094. +/**************************************************************************//**
  114095. + @Function FM_PCD_MatchTableRemoveKey
  114096. +
  114097. + @Description Remove the key (including next engine parameters of this key)
  114098. + defined by the index of the relevant node.
  114099. +
  114100. + @Param[in] ioc_fm_pcd_cc_node_remove_key_params_t A pointer to a structure with the relevant parameters
  114101. +
  114102. + @Return 0 on success; Error code otherwise.
  114103. +
  114104. + @Cautions Allowed only after FM_PCD_MatchTableSet() has been called for this
  114105. + node and for all of the nodes that lead to it.
  114106. +*//***************************************************************************/
  114107. +#if defined(CONFIG_COMPAT)
  114108. +#define FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(33), ioc_compat_fm_pcd_cc_node_remove_key_params_t)
  114109. +#endif
  114110. +#define FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(33), ioc_fm_pcd_cc_node_remove_key_params_t)
  114111. +
  114112. +/**************************************************************************//**
  114113. + @Function FM_PCD_MatchTableAddKey
  114114. +
  114115. + @Description Add the key (including next engine parameters of this key in the
  114116. + index defined by the keyIndex. Note that 'FM_PCD_LAST_KEY_INDEX'
  114117. + may be used when the user doesn't care about the position of the
  114118. + key in the table - in that case, the key will be automatically
  114119. + added by the driver in the last available entry.
  114120. +
  114121. + @Param[in] ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t A pointer to a structure with the relevant parameters
  114122. +
  114123. + @Return 0 on success; Error code otherwise.
  114124. +
  114125. + @Cautions Allowed only after FM_PCD_MatchTableSet() has been called for this
  114126. + node and for all of the nodes that lead to it.
  114127. +*//***************************************************************************/
  114128. +#if defined(CONFIG_COMPAT)
  114129. +#define FM_PCD_IOC_MATCH_TABLE_ADD_KEY_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(34), ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
  114130. +#endif
  114131. +#define FM_PCD_IOC_MATCH_TABLE_ADD_KEY _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(34), ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
  114132. +
  114133. +/**************************************************************************//**
  114134. + @Function FM_PCD_MatchTableModifyKeyAndNextEngine
  114135. +
  114136. + @Description Modify the key and Next Engine Parameters of this key in the index defined by key_index.
  114137. +
  114138. + @Param[in] ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t A pointer to a structure with the relevant parameters
  114139. +
  114140. + @Return 0 on success; Error code otherwise.
  114141. +
  114142. + @Cautions Allowed only following FM_PCD_MatchTableSet() not only of the relevnt node but also
  114143. + the node that points to this node
  114144. +*//***************************************************************************/
  114145. +#if defined(CONFIG_COMPAT)
  114146. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(35), ioc_compat_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
  114147. +#endif
  114148. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(35), ioc_fm_pcd_cc_node_modify_key_and_next_engine_params_t)
  114149. +
  114150. +/**************************************************************************//**
  114151. + @Function FM_PCD_MatchTableModifyKey
  114152. +
  114153. + @Description Modify the key at the index defined by key_index.
  114154. +
  114155. + @Param[in] ioc_fm_pcd_cc_node_modify_key_params_t - Pointer to a structure with the relevant parameters
  114156. +
  114157. + @Return 0 on success; Error code otherwise.
  114158. +
  114159. + @Cautions Allowed only after FM_PCD_MatchTableSet() has been called for this
  114160. + node and for all of the nodes that lead to it.
  114161. +*//***************************************************************************/
  114162. +#if defined(CONFIG_COMPAT)
  114163. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(36), ioc_compat_fm_pcd_cc_node_modify_key_params_t)
  114164. +#endif
  114165. +#define FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(36), ioc_fm_pcd_cc_node_modify_key_params_t)
  114166. +
  114167. +/**************************************************************************//**
  114168. + @Function FM_PCD_HashTableSet
  114169. +
  114170. + @Description This routine initializes a hash table structure.
  114171. + KeyGen hash result determines the hash bucket.
  114172. + Next, KeyGen key is compared against all keys of this
  114173. + bucket (exact match).
  114174. + Number of sets (number of buckets) of the hash equals to the
  114175. + number of 1-s in 'hash_res_mask' in the provided parameters.
  114176. + Number of hash table ways is then calculated by dividing
  114177. + 'max_num_of_keys' equally between the hash sets. This is the maximal
  114178. + number of keys that a hash bucket may hold.
  114179. + The hash table is initialized empty and keys may be
  114180. + added to it following the initialization. Keys masks are not
  114181. + supported in current hash table implementation.
  114182. + The initialized hash table can be integrated as a node in a
  114183. + CC tree.
  114184. +
  114185. + @Param[in,out] ioc_fm_pcd_hash_table_params_t - Pointer to a structure with the relevant parameters
  114186. +
  114187. + @Return 0 on success; Error code otherwise.
  114188. +*//***************************************************************************/
  114189. +#if defined(CONFIG_COMPAT)
  114190. +#define FM_PCD_IOC_HASH_TABLE_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_compat_fm_pcd_hash_table_params_t)
  114191. +#endif
  114192. +#define FM_PCD_IOC_HASH_TABLE_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_fm_pcd_hash_table_params_t)
  114193. +
  114194. +
  114195. +/**************************************************************************//**
  114196. + @Function FM_PCD_HashTableDelete
  114197. +
  114198. + @Description This routine deletes the provided hash table and released all
  114199. + its allocated resources.
  114200. +
  114201. + @Param[in] ioc_fm_obj_t - The ID of a hash table.
  114202. +
  114203. + @Return 0 on success; Error code otherwise.
  114204. +
  114205. + @Cautions Allowed only following FM_PCD_HashTableSet().
  114206. +*//***************************************************************************/
  114207. +#if defined(CONFIG_COMPAT)
  114208. +#define FM_PCD_IOC_HASH_TABLE_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_compat_fm_obj_t)
  114209. +#endif
  114210. +#define FM_PCD_IOC_HASH_TABLE_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(37), ioc_fm_obj_t)
  114211. +
  114212. +/**************************************************************************//**
  114213. + @Function FM_PCD_HashTableAddKey
  114214. +
  114215. + @Description This routine adds the provided key (including next engine
  114216. + parameters of this key) to the hash table.
  114217. + The key is added as the last key of the bucket that it is
  114218. + mapped to.
  114219. +
  114220. + @Param[in] ioc_fm_pcd_hash_table_add_key_params_t - Pointer to a structure with the relevant parameters
  114221. +
  114222. + @Return 0 on success; error code otherwise.
  114223. +
  114224. + @Cautions Allowed only following FM_PCD_HashTableSet().
  114225. +*//***************************************************************************/
  114226. +#if defined(CONFIG_COMPAT)
  114227. +#define FM_PCD_IOC_HASH_TABLE_ADD_KEY_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(39), ioc_compat_fm_pcd_hash_table_add_key_params_t)
  114228. +#endif
  114229. +#define FM_PCD_IOC_HASH_TABLE_ADD_KEY _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(39), ioc_fm_pcd_hash_table_add_key_params_t)
  114230. +
  114231. +/**************************************************************************//**
  114232. + @Function FM_PCD_HashTableRemoveKey
  114233. +
  114234. + @Description This routine removes the requested key (including next engine
  114235. + parameters of this key) from the hash table.
  114236. +
  114237. + @Param[in] ioc_fm_pcd_hash_table_remove_key_params_t - Pointer to a structure with the relevant parameters
  114238. +
  114239. + @Return 0 on success; Error code otherwise.
  114240. +
  114241. + @Cautions Allowed only following FM_PCD_HashTableSet().
  114242. +*//***************************************************************************/
  114243. +#if defined(CONFIG_COMPAT)
  114244. +#define FM_PCD_IOC_HASH_TABLE_REMOVE_KEY_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(40), ioc_compat_fm_pcd_hash_table_remove_key_params_t)
  114245. +#endif
  114246. +#define FM_PCD_IOC_HASH_TABLE_REMOVE_KEY _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(40), ioc_fm_pcd_hash_table_remove_key_params_t)
  114247. +
  114248. +/**************************************************************************//**
  114249. + @Function FM_PCD_PlcrProfileSet
  114250. +
  114251. + @Description Sets a profile entry in the policer profile table.
  114252. + The routine overrides any existing value.
  114253. +
  114254. + @Param[in,out] ioc_fm_pcd_plcr_profile_params_t A structure of parameters for defining a
  114255. + policer profile entry.
  114256. +
  114257. + @Return 0 on success; Error code otherwise.
  114258. +*//***************************************************************************/
  114259. +#if defined(CONFIG_COMPAT)
  114260. +#define FM_PCD_IOC_PLCR_PROFILE_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_compat_fm_pcd_plcr_profile_params_t)
  114261. +#endif
  114262. +#define FM_PCD_IOC_PLCR_PROFILE_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_fm_pcd_plcr_profile_params_t)
  114263. +
  114264. +/**************************************************************************//**
  114265. + @Function FM_PCD_PlcrProfileDelete
  114266. +
  114267. + @Description Delete a profile entry in the policer profile table.
  114268. + The routine set entry to invalid.
  114269. +
  114270. + @Param[in] ioc_fm_obj_t The id of a policer profile.
  114271. +
  114272. + @Return 0 on success; Error code otherwise.
  114273. +*//***************************************************************************/
  114274. +#if defined(CONFIG_COMPAT)
  114275. +#define FM_PCD_IOC_PLCR_PROFILE_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_compat_fm_obj_t)
  114276. +#endif
  114277. +#define FM_PCD_IOC_PLCR_PROFILE_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(41), ioc_fm_obj_t)
  114278. +
  114279. +/**************************************************************************//**
  114280. + @Function FM_PCD_ManipNodeSet
  114281. +
  114282. + @Description This routine should be called for defining a manipulation
  114283. + node. A manipulation node must be defined before the CC node
  114284. + that precedes it.
  114285. +
  114286. + @Param[in] ioc_fm_pcd_manip_params_t - A structure of parameters defining the manipulation
  114287. +
  114288. + @Return A handle to the initialized object on success; NULL code otherwise.
  114289. +*//***************************************************************************/
  114290. +#if defined(CONFIG_COMPAT)
  114291. +#define FM_PCD_IOC_MANIP_NODE_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(43), ioc_compat_fm_pcd_manip_params_t)
  114292. +#endif
  114293. +#define FM_PCD_IOC_MANIP_NODE_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(43), ioc_fm_pcd_manip_params_t)
  114294. +
  114295. +/**************************************************************************//**
  114296. + @Function FM_PCD_ManipNodeReplace
  114297. +
  114298. + @Description Change existing manipulation node to be according to new requirement.
  114299. + (Here, it's implemented as a variant of the same IOCTL as for
  114300. + FM_PCD_ManipNodeSet(), and one that when called, the 'id' member
  114301. + in its 'ioc_fm_pcd_manip_params_t' argument is set to contain
  114302. + the manip node's handle)
  114303. +
  114304. + @Param[in] ioc_fm_pcd_manip_params_t - A structure of parameters defining the manipulation
  114305. +
  114306. + @Return 0 on success; error code otherwise.
  114307. +
  114308. + @Cautions Allowed only following FM_PCD_ManipNodeSet().
  114309. +*//***************************************************************************/
  114310. +#if defined(CONFIG_COMPAT)
  114311. +#define FM_PCD_IOC_MANIP_NODE_REPLACE_COMPAT FM_PCD_IOC_MANIP_NODE_SET_COMPAT
  114312. +#endif
  114313. +#define FM_PCD_IOC_MANIP_NODE_REPLACE FM_PCD_IOC_MANIP_NODE_SET
  114314. +
  114315. +/**************************************************************************//**
  114316. + @Function FM_PCD_ManipNodeDelete
  114317. +
  114318. + @Description Delete an existing manipulation node.
  114319. +
  114320. + @Param[in] ioc_fm_obj_t The id of the manipulation node to delete.
  114321. +
  114322. + @Return 0 on success; error code otherwise.
  114323. +
  114324. + @Cautions Allowed only following FM_PCD_ManipNodeSet().
  114325. +*//***************************************************************************/
  114326. +#if defined(CONFIG_COMPAT)
  114327. +#define FM_PCD_IOC_MANIP_NODE_DELETE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(44), ioc_compat_fm_obj_t)
  114328. +#endif
  114329. +#define FM_PCD_IOC_MANIP_NODE_DELETE _IOW(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(44), ioc_fm_obj_t)
  114330. +
  114331. +/**************************************************************************//**
  114332. + @Function FM_PCD_ManipGetStatistics
  114333. +
  114334. + @Description Retrieve the manipulation statistics.
  114335. +
  114336. + @Param[in] h_ManipNode A handle to a manipulation node.
  114337. + @Param[out] p_FmPcdManipStats A structure for retrieving the manipulation statistics
  114338. +
  114339. + @Return E_OK on success; Error code otherwise.
  114340. +
  114341. + @Cautions Allowed only following FM_PCD_ManipNodeSet().
  114342. +*//***************************************************************************/
  114343. +#if defined(CONFIG_COMPAT)
  114344. +#define FM_PCD_IOC_MANIP_GET_STATS_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(50), ioc_compat_fm_pcd_manip_get_stats_t)
  114345. +#endif
  114346. +#define FM_PCD_IOC_MANIP_GET_STATS _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(50), ioc_fm_pcd_manip_get_stats_t)
  114347. +
  114348. +/**************************************************************************//**
  114349. +@Function FM_PCD_SetAdvancedOffloadSupport
  114350. +
  114351. +@Description This routine must be called in order to support the following features:
  114352. + IP-fragmentation, IP-reassembly, IPsec, Header-manipulation, frame-replicator.
  114353. +
  114354. +@Param[in] h_FmPcd FM PCD module descriptor.
  114355. +
  114356. +@Return 0 on success; error code otherwise.
  114357. +
  114358. +@Cautions Allowed only when PCD is disabled.
  114359. +*//***************************************************************************/
  114360. +#define FM_PCD_IOC_SET_ADVANCED_OFFLOAD_SUPPORT _IO(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(45))
  114361. +
  114362. +#if (DPAA_VERSION >= 11)
  114363. +/**************************************************************************//**
  114364. + @Function FM_PCD_FrmReplicSetGroup
  114365. +
  114366. + @Description Initialize a Frame Replicator group.
  114367. +
  114368. + @Param[in] h_FmPcd FM PCD module descriptor.
  114369. + @Param[in] p_FrmReplicGroupParam A structure of parameters for the initialization of
  114370. + the frame replicator group.
  114371. +
  114372. + @Return A handle to the initialized object on success; NULL code otherwise.
  114373. +
  114374. + @Cautions Allowed only following FM_PCD_Init().
  114375. +*//***************************************************************************/
  114376. +#if defined(CONFIG_COMPAT)
  114377. +#define FM_PCD_IOC_FRM_REPLIC_GROUP_SET_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(46), ioc_compat_fm_pcd_frm_replic_group_params_t)
  114378. +#endif
  114379. +#define FM_PCD_IOC_FRM_REPLIC_GROUP_SET _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(46), ioc_fm_pcd_frm_replic_group_params_t)
  114380. +
  114381. +/**************************************************************************//**
  114382. + @Function FM_PCD_FrmReplicDeleteGroup
  114383. +
  114384. + @Description Delete a Frame Replicator group.
  114385. +
  114386. + @Param[in] h_FrmReplicGroup A handle to the frame replicator group.
  114387. +
  114388. + @Return E_OK on success; Error code otherwise.
  114389. +
  114390. + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup().
  114391. +*//***************************************************************************/
  114392. +#if defined(CONFIG_COMPAT)
  114393. +#define FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(47), ioc_compat_fm_obj_t)
  114394. +#endif
  114395. +#define FM_PCD_IOC_FRM_REPLIC_GROUP_DELETE _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(47), ioc_fm_obj_t)
  114396. +
  114397. +/**************************************************************************//**
  114398. + @Function FM_PCD_FrmReplicAddMember
  114399. +
  114400. + @Description Add the member in the index defined by the memberIndex.
  114401. +
  114402. + @Param[in] h_FrmReplicGroup A handle to the frame replicator group.
  114403. + @Param[in] memberIndex member index for adding.
  114404. + @Param[in] p_MemberParams A pointer to the new member parameters.
  114405. +
  114406. + @Return E_OK on success; Error code otherwise.
  114407. +
  114408. + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
  114409. +*//***************************************************************************/
  114410. +#if defined(CONFIG_COMPAT)
  114411. +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(48), ioc_compat_fm_pcd_frm_replic_member_params_t)
  114412. +#endif
  114413. +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_ADD _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(48), ioc_fm_pcd_frm_replic_member_params_t)
  114414. +
  114415. +/**************************************************************************//**
  114416. + @Function FM_PCD_FrmReplicRemoveMember
  114417. +
  114418. + @Description Remove the member defined by the index from the relevant group.
  114419. +
  114420. + @Param[in] h_FrmReplicGroup A handle to the frame replicator group.
  114421. + @Param[in] memberIndex member index for removing.
  114422. +
  114423. + @Return E_OK on success; Error code otherwise.
  114424. +
  114425. + @Cautions Allowed only following FM_PCD_FrmReplicSetGroup() of this group.
  114426. +*//***************************************************************************/
  114427. +#if defined(CONFIG_COMPAT)
  114428. +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(49), ioc_compat_fm_pcd_frm_replic_member_t)
  114429. +#endif
  114430. +#define FM_PCD_IOC_FRM_REPLIC_MEMBER_REMOVE _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(49), ioc_fm_pcd_frm_replic_member_t)
  114431. +
  114432. +#endif
  114433. +
  114434. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  114435. +/**************************************************************************//**
  114436. + @Function FM_PCD_StatisticsSetNode
  114437. +
  114438. + @Description This routine should be called for defining a statistics node.
  114439. +
  114440. + @Param[in,out] ioc_fm_pcd_stats_params_t A structure of parameters defining the statistics
  114441. +
  114442. + @Return 0 on success; Error code otherwise.
  114443. +*//***************************************************************************/
  114444. +#if defined(CONFIG_COMPAT)
  114445. +#define FM_PCD_IOC_STATISTICS_SET_NODE_COMPAT _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(45), void *)
  114446. +#endif
  114447. +#define FM_PCD_IOC_STATISTICS_SET_NODE _IOWR(FM_IOC_TYPE_BASE, FM_PCD_IOC_NUM(45), void *)
  114448. +
  114449. +#endif /* FM_CAPWAP_SUPPORT */
  114450. +
  114451. +#ifdef NCSW_BACKWARD_COMPATIBLE_API
  114452. +#if defined(CONFIG_COMPAT)
  114453. +#define FM_PCD_IOC_SET_NET_ENV_CHARACTERISTICS_COMPAT \
  114454. + FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET_COMPAT
  114455. +#define FM_PCD_IOC_DELETE_NET_ENV_CHARACTERISTICS_COMPAT \
  114456. + FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE_COMPAT
  114457. +#define FM_PCD_IOC_KG_SET_SCHEME_COMPAT FM_PCD_IOC_KG_SCHEME_SET_COMPAT
  114458. +#define FM_PCD_IOC_KG_DEL_SCHEME_COMPAT FM_PCD_IOC_KG_SCHEME_DELETE_COMPAT
  114459. +#define FM_PCD_IOC_CC_BUILD_TREE_COMPAT FM_PCD_IOC_CC_ROOT_BUILD_COMPAT
  114460. +#define FM_PCD_IOC_CC_DELETE_TREE_COMPAT FM_PCD_IOC_CC_ROOT_DELETE_COMPAT
  114461. +#define FM_PCD_IOC_CC_DELETE_NODE_COMPAT FM_PCD_IOC_MATCH_TABLE_DELETE_COMPAT
  114462. +#define FM_PCD_IOC_CC_TREE_MODIFY_NEXT_ENGINE_COMPAT \
  114463. + FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE_COMPAT
  114464. +#define FM_PCD_IOC_CC_NODE_MODIFY_NEXT_ENGINE_COMPAT \
  114465. + FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE_COMPAT
  114466. +#define FM_PCD_IOC_CC_NODE_MODIFY_MISS_NEXT_ENGINE_COMPAT \
  114467. + FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE_COMPAT
  114468. +#define FM_PCD_IOC_CC_NODE_REMOVE_KEY_COMPAT FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY_COMPAT
  114469. +#define FM_PCD_IOC_CC_NODE_ADD_KEY_COMPAT FM_PCD_IOC_MATCH_TABLE_ADD_KEY_COMPAT
  114470. +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT \
  114471. + FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE_COMPAT
  114472. +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY_COMPAT FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_COMPAT
  114473. +#define FM_PCD_IOC_PLCR_SET_PROFILE_COMPAT FM_PCD_IOC_PLCR_PROFILE_SET_COMPAT
  114474. +#define FM_PCD_IOC_PLCR_DEL_PROFILE_COMPAT FM_PCD_IOC_PLCR_PROFILE_DELETE_COMPAT
  114475. +#define FM_PCD_IOC_MANIP_SET_NODE_COMPAT FM_PCD_IOC_MANIP_NODE_SET_COMPAT
  114476. +#define FM_PCD_IOC_MANIP_DELETE_NODE_COMPAT FM_PCD_IOC_MANIP_NODE_DELETE_COMPAT
  114477. +#endif
  114478. +#define FM_PCD_IOC_SET_NET_ENV_CHARACTERISTICS FM_PCD_IOC_NET_ENV_CHARACTERISTICS_SET
  114479. +#define FM_PCD_IOC_DELETE_NET_ENV_CHARACTERISTICS \
  114480. + FM_PCD_IOC_NET_ENV_CHARACTERISTICS_DELETE
  114481. +#define FM_PCD_IOC_KG_SET_SCHEME FM_PCD_IOC_KG_SCHEME_SET
  114482. +#define FM_PCD_IOC_KG_DEL_SCHEME FM_PCD_IOC_KG_SCHEME_DELETE
  114483. +#define FM_PCD_IOC_CC_BUILD_TREE FM_PCD_IOC_CC_ROOT_BUILD
  114484. +#define FM_PCD_IOC_CC_DELETE_TREE FM_PCD_IOC_CC_ROOT_DELETE
  114485. +#define FM_PCD_IOC_CC_DELETE_NODE FM_PCD_IOC_MATCH_TABLE_DELETE
  114486. +#define FM_PCD_IOC_CC_TREE_MODIFY_NEXT_ENGINE FM_PCD_IOC_CC_ROOT_MODIFY_NEXT_ENGINE
  114487. +#define FM_PCD_IOC_CC_NODE_MODIFY_NEXT_ENGINE FM_PCD_IOC_MATCH_TABLE_MODIFY_NEXT_ENGINE
  114488. +#define FM_PCD_IOC_CC_NODE_MODIFY_MISS_NEXT_ENGINE \
  114489. + FM_PCD_IOC_MATCH_TABLE_MODIFY_MISS_NEXT_ENGINE
  114490. +#define FM_PCD_IOC_CC_NODE_REMOVE_KEY FM_PCD_IOC_MATCH_TABLE_REMOVE_KEY
  114491. +#define FM_PCD_IOC_CC_NODE_ADD_KEY FM_PCD_IOC_MATCH_TABLE_ADD_KEY
  114492. +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY_AND_NEXT_ENGINE \
  114493. + FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY_AND_NEXT_ENGINE
  114494. +#define FM_PCD_IOC_CC_NODE_MODIFY_KEY FM_PCD_IOC_MATCH_TABLE_MODIFY_KEY
  114495. +#define FM_PCD_IOC_PLCR_SET_PROFILE FM_PCD_IOC_PLCR_PROFILE_SET
  114496. +#define FM_PCD_IOC_PLCR_DEL_PROFILE FM_PCD_IOC_PLCR_PROFILE_DELETE
  114497. +#define FM_PCD_IOC_MANIP_SET_NODE FM_PCD_IOC_MANIP_NODE_SET
  114498. +#define FM_PCD_IOC_MANIP_DELETE_NODE FM_PCD_IOC_MANIP_NODE_DELETE
  114499. +#endif /* NCSW_BACKWARD_COMPATIBLE_API */
  114500. +
  114501. +#endif /* __FM_PCD_IOCTLS_H */
  114502. +/** @} */ /* end of lnx_ioctl_FM_PCD_Runtime_grp group */
  114503. +/** @} */ /* end of lnx_ioctl_FM_PCD_grp group */
  114504. +/** @} */ /* end of lnx_ioctl_FM_grp group */
  114505. --- /dev/null
  114506. +++ b/include/uapi/linux/fmd/Peripherals/fm_port_ioctls.h
  114507. @@ -0,0 +1,948 @@
  114508. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  114509. + * All rights reserved.
  114510. + *
  114511. + * Redistribution and use in source and binary forms, with or without
  114512. + * modification, are permitted provided that the following conditions are met:
  114513. + * * Redistributions of source code must retain the above copyright
  114514. + * notice, this list of conditions and the following disclaimer.
  114515. + * * Redistributions in binary form must reproduce the above copyright
  114516. + * notice, this list of conditions and the following disclaimer in the
  114517. + * documentation and/or other materials provided with the distribution.
  114518. + * * Neither the name of Freescale Semiconductor nor the
  114519. + * names of its contributors may be used to endorse or promote products
  114520. + * derived from this software without specific prior written permission.
  114521. + *
  114522. + *
  114523. + * ALTERNATIVELY, this software may be distributed under the terms of the
  114524. + * GNU General Public License ("GPL") as published by the Free Software
  114525. + * Foundation, either version 2 of that License or (at your option) any
  114526. + * later version.
  114527. + *
  114528. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  114529. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  114530. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  114531. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  114532. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  114533. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  114534. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  114535. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  114536. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  114537. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  114538. + */
  114539. +
  114540. +/******************************************************************************
  114541. + @File fm_port_ioctls.h
  114542. +
  114543. + @Description FM Port routines
  114544. +*//***************************************************************************/
  114545. +#ifndef __FM_PORT_IOCTLS_H
  114546. +#define __FM_PORT_IOCTLS_H
  114547. +
  114548. +#include "enet_ext.h"
  114549. +#include "net_ioctls.h"
  114550. +#include "fm_ioctls.h"
  114551. +#include "fm_pcd_ioctls.h"
  114552. +
  114553. +
  114554. +/**************************************************************************//**
  114555. +
  114556. + @Group lnx_ioctl_FM_grp Frame Manager Linux IOCTL API
  114557. +
  114558. + @Description FM Linux ioctls definitions and enums
  114559. +
  114560. + @{
  114561. +*//***************************************************************************/
  114562. +
  114563. +/**************************************************************************//**
  114564. + @Group lnx_ioctl_FM_PORT_grp FM Port
  114565. +
  114566. + @Description FM Port API
  114567. +
  114568. + The FM uses a general module called "port" to represent a Tx port
  114569. + (MAC), an Rx port (MAC), offline parsing flow or host command
  114570. + flow. There may be up to 17 (may change) ports in an FM - 5 Tx
  114571. + ports (4 for the 1G MACs, 1 for the 10G MAC), 5 Rx Ports, and 7
  114572. + Host command/Offline parsing ports. The SW driver manages these
  114573. + ports as sub-modules of the FM, i.e. after an FM is initialized,
  114574. + its ports may be initialized and operated upon.
  114575. +
  114576. + The port is initialized aware of its type, but other functions on
  114577. + a port may be indifferent to its type. When necessary, the driver
  114578. + verifies coherency and returns error if applicable.
  114579. +
  114580. + On initialization, user specifies the port type and it's index
  114581. + (relative to the port's type). Host command and Offline parsing
  114582. + ports share the same id range, I.e user may not initialized host
  114583. + command port 0 and offline parsing port 0.
  114584. +
  114585. + @{
  114586. +*//***************************************************************************/
  114587. +
  114588. +/**************************************************************************//**
  114589. + @Description An enum for defining port PCD modes.
  114590. + (Must match enum e_FmPortPcdSupport defined in fm_port_ext.h)
  114591. +
  114592. + This enum defines the superset of PCD engines support - i.e. not
  114593. + all engines have to be used, but all have to be enabled. The real
  114594. + flow of a specific frame depends on the PCD configuration and the
  114595. + frame headers and payload.
  114596. + Note: the first engine and the first engine after the parser (if
  114597. + exists) should be in order, the order is important as it will
  114598. + define the flow of the port. However, as for the rest engines
  114599. + (the ones that follows), the order is not important anymore as
  114600. + it is defined by the PCD graph itself.
  114601. +*//***************************************************************************/
  114602. +typedef enum ioc_fm_port_pcd_support {
  114603. + e_IOC_FM_PORT_PCD_SUPPORT_NONE = 0 /**< BMI to BMI, PCD is not used */
  114604. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_ONLY /**< Use only Parser */
  114605. + , e_IOC_FM_PORT_PCD_SUPPORT_PLCR_ONLY /**< Use only Policer */
  114606. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR /**< Use Parser and Policer */
  114607. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG /**< Use Parser and Keygen */
  114608. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC /**< Use Parser, Keygen and Coarse Classification */
  114609. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_CC_AND_PLCR
  114610. + /**< Use all PCD engines */
  114611. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_KG_AND_PLCR /**< Use Parser, Keygen and Policer */
  114612. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_CC /**< Use Parser and Coarse Classification */
  114613. + , e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_CC_AND_PLCR /**< Use Parser and Coarse Classification and Policer */
  114614. + , e_IOC_FM_PORT_PCD_SUPPORT_CC_ONLY /**< Use only Coarse Classification */
  114615. +#if (defined(FM_CAPWAP_SUPPORT) && (DPAA_VERSION == 10))
  114616. + , e_IOC_FM_PORT_PCD_SUPPORT_CC_AND_KG /**< Use Coarse Classification,and Keygen */
  114617. + , e_IOC_FM_PORT_PCD_SUPPORT_CC_AND_KG_AND_PLCR /**< Use Coarse Classification, Keygen and Policer */
  114618. +#endif /* FM_CAPWAP_SUPPORT */
  114619. +} ioc_fm_port_pcd_support;
  114620. +
  114621. +
  114622. +/**************************************************************************//**
  114623. + @Collection FM Frame error
  114624. +*//***************************************************************************/
  114625. +typedef uint32_t ioc_fm_port_frame_err_select_t; /**< typedef for defining Frame Descriptor errors */
  114626. +
  114627. +/* @} */
  114628. +
  114629. +
  114630. +/**************************************************************************//**
  114631. + @Description An enum for defining Dual Tx rate limiting scale.
  114632. + (Must match e_FmPortDualRateLimiterScaleDown defined in fm_port_ext.h)
  114633. +*//***************************************************************************/
  114634. +typedef enum ioc_fm_port_dual_rate_limiter_scale_down {
  114635. + e_IOC_FM_PORT_DUAL_RATE_LIMITER_NONE = 0, /**< Use only single rate limiter */
  114636. + e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_2, /**< Divide high rate limiter by 2 */
  114637. + e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_4, /**< Divide high rate limiter by 4 */
  114638. + e_IOC_FM_PORT_DUAL_RATE_LIMITER_SCALE_DOWN_BY_8 /**< Divide high rate limiter by 8 */
  114639. +} ioc_fm_port_dual_rate_limiter_scale_down;
  114640. +
  114641. +/**************************************************************************//**
  114642. + @Description A structure for defining Tx rate limiting
  114643. + (Must match struct t_FmPortRateLimit defined in fm_port_ext.h)
  114644. +*//***************************************************************************/
  114645. +typedef struct ioc_fm_port_rate_limit_t {
  114646. + uint16_t max_burst_size; /**< in KBytes for Tx ports, in frames
  114647. + for offline parsing ports. (note that
  114648. + for early chips burst size is
  114649. + rounded up to a multiply of 1000 frames).*/
  114650. + uint32_t rate_limit; /**< in Kb/sec for Tx ports, in frame/sec for
  114651. + offline parsing ports. Rate limit refers to
  114652. + data rate (rather than line rate). */
  114653. + ioc_fm_port_dual_rate_limiter_scale_down rate_limit_divider; /**< For offline parsing ports only. Not-valid
  114654. + for some earlier chip revisions */
  114655. +} ioc_fm_port_rate_limit_t;
  114656. +
  114657. +
  114658. +
  114659. +/**************************************************************************//**
  114660. + @Group lnx_ioctl_FM_PORT_runtime_control_grp FM Port Runtime Control Unit
  114661. +
  114662. + @Description FM Port Runtime control unit API functions, definitions and enums.
  114663. +
  114664. + @{
  114665. +*//***************************************************************************/
  114666. +
  114667. +/**************************************************************************//**
  114668. + @Description An enum for defining FM Port counters.
  114669. + (Must match enum e_FmPortCounters defined in fm_port_ext.h)
  114670. +*//***************************************************************************/
  114671. +typedef enum ioc_fm_port_counters {
  114672. + e_IOC_FM_PORT_COUNTERS_CYCLE, /**< BMI performance counter */
  114673. + e_IOC_FM_PORT_COUNTERS_TASK_UTIL, /**< BMI performance counter */
  114674. + e_IOC_FM_PORT_COUNTERS_QUEUE_UTIL, /**< BMI performance counter */
  114675. + e_IOC_FM_PORT_COUNTERS_DMA_UTIL, /**< BMI performance counter */
  114676. + e_IOC_FM_PORT_COUNTERS_FIFO_UTIL, /**< BMI performance counter */
  114677. + e_IOC_FM_PORT_COUNTERS_RX_PAUSE_ACTIVATION, /**< BMI Rx only performance counter */
  114678. + e_IOC_FM_PORT_COUNTERS_FRAME, /**< BMI statistics counter */
  114679. + e_IOC_FM_PORT_COUNTERS_DISCARD_FRAME, /**< BMI statistics counter */
  114680. + e_IOC_FM_PORT_COUNTERS_DEALLOC_BUF, /**< BMI deallocate buffer statistics counter */
  114681. + e_IOC_FM_PORT_COUNTERS_RX_BAD_FRAME, /**< BMI Rx only statistics counter */
  114682. + e_IOC_FM_PORT_COUNTERS_RX_LARGE_FRAME, /**< BMI Rx only statistics counter */
  114683. + e_IOC_FM_PORT_COUNTERS_RX_FILTER_FRAME, /**< BMI Rx & OP only statistics counter */
  114684. + e_IOC_FM_PORT_COUNTERS_RX_LIST_DMA_ERR, /**< BMI Rx, OP & HC only statistics counter */
  114685. + e_IOC_FM_PORT_COUNTERS_RX_OUT_OF_BUFFERS_DISCARD, /**< BMI Rx, OP & HC statistics counter */
  114686. + e_IOC_FM_PORT_COUNTERS_PREPARE_TO_ENQUEUE_COUNTER, /**< BMI Rx, OP & HC only statistics counter */
  114687. + e_IOC_FM_PORT_COUNTERS_WRED_DISCARD, /**< BMI OP & HC only statistics counter */
  114688. + e_IOC_FM_PORT_COUNTERS_LENGTH_ERR, /**< BMI non-Rx statistics counter */
  114689. + e_IOC_FM_PORT_COUNTERS_UNSUPPRTED_FORMAT, /**< BMI non-Rx statistics counter */
  114690. + e_IOC_FM_PORT_COUNTERS_DEQ_TOTAL, /**< QMI total QM dequeues counter */
  114691. + e_IOC_FM_PORT_COUNTERS_ENQ_TOTAL, /**< QMI total QM enqueues counter */
  114692. + e_IOC_FM_PORT_COUNTERS_DEQ_FROM_DEFAULT, /**< QMI counter */
  114693. + e_IOC_FM_PORT_COUNTERS_DEQ_CONFIRM /**< QMI counter */
  114694. +} ioc_fm_port_counters;
  114695. +
  114696. +typedef struct ioc_fm_port_bmi_stats_t {
  114697. + uint32_t cnt_cycle;
  114698. + uint32_t cnt_task_util;
  114699. + uint32_t cnt_queue_util;
  114700. + uint32_t cnt_dma_util;
  114701. + uint32_t cnt_fifo_util;
  114702. + uint32_t cnt_rx_pause_activation;
  114703. + uint32_t cnt_frame;
  114704. + uint32_t cnt_discard_frame;
  114705. + uint32_t cnt_dealloc_buf;
  114706. + uint32_t cnt_rx_bad_frame;
  114707. + uint32_t cnt_rx_large_frame;
  114708. + uint32_t cnt_rx_filter_frame;
  114709. + uint32_t cnt_rx_list_dma_err;
  114710. + uint32_t cnt_rx_out_of_buffers_discard;
  114711. + uint32_t cnt_wred_discard;
  114712. + uint32_t cnt_length_err;
  114713. + uint32_t cnt_unsupported_format;
  114714. +} ioc_fm_port_bmi_stats_t;
  114715. +
  114716. +/**************************************************************************//**
  114717. + @Description Structure for Port id parameters.
  114718. + (Description may be inaccurate;
  114719. + must match struct t_FmPortCongestionGrps defined in fm_port_ext.h)
  114720. +
  114721. + Fields commented 'IN' are passed by the port module to be used
  114722. + by the FM module.
  114723. + Fields commented 'OUT' will be filled by FM before returning to port.
  114724. +*//***************************************************************************/
  114725. +typedef struct ioc_fm_port_congestion_groups_t {
  114726. + uint16_t num_of_congestion_grps_to_consider; /**< The number of required congestion groups
  114727. + to define the size of the following array */
  114728. + uint8_t congestion_grps_to_consider [FM_PORT_NUM_OF_CONGESTION_GRPS];
  114729. + /**< An array of CG indexes;
  114730. + Note that the size of the array should be
  114731. + 'num_of_congestion_grps_to_consider'. */
  114732. +#if DPAA_VERSION >= 11
  114733. + bool pfc_priorities_enable[FM_PORT_NUM_OF_CONGESTION_GRPS][FM_MAX_NUM_OF_PFC_PRIORITIES];
  114734. + /**< A matrix that represents the map between the CG ids
  114735. + defined in 'congestion_grps_to_consider' to the priorities
  114736. + mapping array. */
  114737. +#endif /* DPAA_VERSION >= 11 */
  114738. +} ioc_fm_port_congestion_groups_t;
  114739. +
  114740. +
  114741. +
  114742. +/**************************************************************************//**
  114743. + @Function FM_PORT_Disable
  114744. +
  114745. + @Description Gracefully disable an FM port. The port will not start new tasks after all
  114746. + tasks associated with the port are terminated.
  114747. +
  114748. + @Return 0 on success; error code otherwise.
  114749. +
  114750. + @Cautions This is a blocking routine, it returns after port is
  114751. + gracefully stopped, i.e. the port will not except new frames,
  114752. + but it will finish all frames or tasks which were already began
  114753. +*//***************************************************************************/
  114754. +#define FM_PORT_IOC_DISABLE _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(1))
  114755. +
  114756. +/**************************************************************************//**
  114757. + @Function FM_PORT_Enable
  114758. +
  114759. + @Description A runtime routine provided to allow disable/enable of port.
  114760. +
  114761. + @Return 0 on success; error code otherwise.
  114762. +*//***************************************************************************/
  114763. +#define FM_PORT_IOC_ENABLE _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(2))
  114764. +
  114765. +/**************************************************************************//**
  114766. + @Function FM_PORT_SetRateLimit
  114767. +
  114768. + @Description Calling this routine enables rate limit algorithm.
  114769. + By default, this functionality is disabled.
  114770. + Note that rate-limit mechanism uses the FM time stamp.
  114771. + The selected rate limit specified here would be
  114772. + rounded DOWN to the nearest 16M.
  114773. +
  114774. + May be used for Tx and offline parsing ports only
  114775. +
  114776. + @Param[in] ioc_fm_port_rate_limit A structure of rate limit parameters
  114777. +
  114778. + @Return 0 on success; error code otherwise.
  114779. +*//***************************************************************************/
  114780. +#define FM_PORT_IOC_SET_RATE_LIMIT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(3), ioc_fm_port_rate_limit_t)
  114781. +
  114782. +/**************************************************************************//**
  114783. + @Function FM_PORT_DeleteRateLimit
  114784. +
  114785. + @Description Calling this routine disables the previously enabled rate limit.
  114786. +
  114787. + May be used for Tx and offline parsing ports only
  114788. +
  114789. + @Return 0 on success; error code otherwise.
  114790. +*//***************************************************************************/
  114791. +#define FM_PORT_IOC_DELETE_RATE_LIMIT _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(5))
  114792. +#define FM_PORT_IOC_REMOVE_RATE_LIMIT FM_PORT_IOC_DELETE_RATE_LIMIT
  114793. +
  114794. +
  114795. +/**************************************************************************//**
  114796. + @Function FM_PORT_AddCongestionGrps
  114797. +
  114798. + @Description This routine effects the corresponding Tx port.
  114799. + It should be called in order to enable pause
  114800. + frame transmission in case of congestion in one or more
  114801. + of the congestion groups relevant to this port.
  114802. + Each call to this routine may add one or more congestion
  114803. + groups to be considered relevant to this port.
  114804. +
  114805. + May be used for Rx, or RX+OP ports only (depending on chip)
  114806. +
  114807. + @Param[in] ioc_fm_port_congestion_groups_t - A pointer to an array of
  114808. + congestion group ids to consider.
  114809. +
  114810. + @Return 0 on success; error code otherwise.
  114811. +*//***************************************************************************/
  114812. +#define FM_PORT_IOC_ADD_CONGESTION_GRPS _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(34), ioc_fm_port_congestion_groups_t)
  114813. +
  114814. +/**************************************************************************//**
  114815. + @Function FM_PORT_RemoveCongestionGrps
  114816. +
  114817. + @Description This routine effects the corresponding Tx port. It should be
  114818. + called when congestion groups were
  114819. + defined for this port and are no longer relevant, or pause
  114820. + frames transmitting is not required on their behalf.
  114821. + Each call to this routine may remove one or more congestion
  114822. + groups to be considered relevant to this port.
  114823. +
  114824. + May be used for Rx, or RX+OP ports only (depending on chip)
  114825. +
  114826. + @Param[in] ioc_fm_port_congestion_groups_t - A pointer to an array of
  114827. + congestion group ids to consider.
  114828. +
  114829. + @Return 0 on success; error code otherwise.
  114830. +*//***************************************************************************/
  114831. +#define FM_PORT_IOC_REMOVE_CONGESTION_GRPS _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(35), ioc_fm_port_congestion_groups_t)
  114832. +
  114833. +/**************************************************************************//**
  114834. + @Function FM_PORT_SetErrorsRoute
  114835. +
  114836. + @Description Errors selected for this routine will cause a frame with that error
  114837. + to be enqueued to error queue.
  114838. + Errors not selected for this routine will cause a frame with that error
  114839. + to be enqueued to the one of the other port queues.
  114840. + By default all errors are defined to be enqueued to error queue.
  114841. + Errors that were configured to be discarded (at initialization)
  114842. + may not be selected here.
  114843. +
  114844. + May be used for Rx and offline parsing ports only
  114845. +
  114846. + @Param[in] ioc_fm_port_frame_err_select_t A list of errors to enqueue to error queue
  114847. +
  114848. + @Return 0 on success; error code otherwise.
  114849. +
  114850. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  114851. + (szbs001: How is it possible to have one function that needs to be
  114852. + called BEFORE FM_PORT_Init() implemented as an ioctl,
  114853. + which will ALWAYS be called AFTER the FM_PORT_Init()
  114854. + for that port!?!?!?!???!?!??!?!?)
  114855. +*//***************************************************************************/
  114856. +#define FM_PORT_IOC_SET_ERRORS_ROUTE _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(4), ioc_fm_port_frame_err_select_t)
  114857. +
  114858. +
  114859. +/**************************************************************************//**
  114860. + @Group lnx_ioctl_FM_PORT_pcd_runtime_control_grp FM Port PCD Runtime Control Unit
  114861. +
  114862. + @Description FM Port PCD Runtime control unit API functions, definitions and enums.
  114863. +
  114864. + @{
  114865. +*//***************************************************************************/
  114866. +
  114867. +/**************************************************************************//**
  114868. + @Description A structure defining the KG scheme after the parser.
  114869. + (Must match struct t_FmPcdKgSchemeSelect defined in fm_port_ext.h)
  114870. +
  114871. + This is relevant only to change scheme selection mode - from
  114872. + direct to indirect and vice versa, or when the scheme is selected directly,
  114873. + to select the scheme id.
  114874. +
  114875. +*//***************************************************************************/
  114876. +typedef struct ioc_fm_pcd_kg_scheme_select_t {
  114877. + bool direct; /**< TRUE to use 'scheme_id' directly, FALSE to use LCV.*/
  114878. + void *scheme_id; /**< Relevant for 'direct'=TRUE only.
  114879. + 'scheme_id' selects the scheme after parser. */
  114880. +} ioc_fm_pcd_kg_scheme_select_t;
  114881. +
  114882. +/**************************************************************************//**
  114883. + @Description Scheme IDs structure
  114884. + (Must match struct t_FmPcdPortSchemesParams defined in fm_port_ext.h)
  114885. +*//***************************************************************************/
  114886. +typedef struct ioc_fm_pcd_port_schemes_params_t {
  114887. + uint8_t num_of_schemes; /**< Number of schemes for port to be bound to. */
  114888. + void *scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES]; /**< Array of 'num_of_schemes' schemes for the
  114889. + port to be bound to */
  114890. +} ioc_fm_pcd_port_schemes_params_t;
  114891. +
  114892. +/**************************************************************************//**
  114893. + @Description A union for defining port protocol parameters for parser
  114894. + (Must match union u_FmPcdHdrPrsOpts defined in fm_port_ext.h)
  114895. +*//***************************************************************************/
  114896. +typedef union ioc_fm_pcd_hdr_prs_opts_u {
  114897. + /* MPLS */
  114898. + struct {
  114899. + bool label_interpretation_enable;/**< When this bit is set, the last MPLS label will be
  114900. + interpreted as described in HW spec table. When the bit
  114901. + is cleared, the parser will advance to MPLS next parse */
  114902. + ioc_net_header_type next_parse; /**< must be equal or higher than IPv4 */
  114903. + } mpls_prs_options;
  114904. +
  114905. + /* VLAN */
  114906. + struct {
  114907. + uint16_t tag_protocol_id1; /**< User defined Tag Protocol Identifier, to be recognized
  114908. + on VLAN TAG on top of 0x8100 and 0x88A8 */
  114909. + uint16_t tag_protocol_id2; /**< User defined Tag Protocol Identifier, to be recognized
  114910. + on VLAN TAG on top of 0x8100 and 0x88A8 */
  114911. + } vlan_prs_options;
  114912. +
  114913. + /* PPP */
  114914. + struct{
  114915. + bool enable_mtu_check; /**< Check validity of MTU according to RFC2516 */
  114916. + } pppoe_prs_options;
  114917. +
  114918. + /* IPV6 */
  114919. + struct {
  114920. + bool routing_hdr_disable; /**< Disable routing header */
  114921. + } ipv6_prs_options;
  114922. +
  114923. + /* UDP */
  114924. + struct {
  114925. + bool pad_ignore_checksum; /**< TRUE to ignore pad in checksum */
  114926. + } udp_prs_options;
  114927. +
  114928. + /* TCP */
  114929. + struct {
  114930. + bool pad_ignore_checksum; /**< TRUE to ignore pad in checksum */
  114931. + } tcp_prs_options;
  114932. +} ioc_fm_pcd_hdr_prs_opts_u;
  114933. +
  114934. +/**************************************************************************//**
  114935. + @Description A structure for defining each header for the parser
  114936. + (must match struct t_FmPcdPrsAdditionalHdrParams defined in fm_port_ext.h)
  114937. +*//***************************************************************************/
  114938. +typedef struct ioc_fm_pcd_prs_additional_hdr_params_t {
  114939. + ioc_net_header_type hdr; /**< Selected header */
  114940. + bool err_disable; /**< TRUE to disable error indication */
  114941. + bool soft_prs_enable; /**< Enable jump to SW parser when this
  114942. + header is recognized by the HW parser. */
  114943. + uint8_t index_per_hdr; /**< Normally 0, if more than one sw parser
  114944. + attachments exists for the same header,
  114945. + (in the main sw parser code) use this
  114946. + index to distinguish between them. */
  114947. + bool use_prs_opts; /**< TRUE to use parser options. */
  114948. + ioc_fm_pcd_hdr_prs_opts_u prs_opts; /**< A unuion according to header type,
  114949. + defining the parser options selected.*/
  114950. +} ioc_fm_pcd_prs_additional_hdr_params_t;
  114951. +
  114952. +/**************************************************************************//**
  114953. + @Description A structure for defining port PCD parameters
  114954. + (Must match t_FmPortPcdPrsParams defined in fm_port_ext.h)
  114955. +*//***************************************************************************/
  114956. +typedef struct ioc_fm_port_pcd_prs_params_t {
  114957. + uint8_t prs_res_priv_info; /**< The private info provides a method of inserting
  114958. + port information into the parser result. This information
  114959. + may be extracted by KeyGen and be used for frames
  114960. + distribution when a per-port distinction is required,
  114961. + it may also be used as a port logical id for analyzing
  114962. + incoming frames. */
  114963. + uint8_t parsing_offset; /**< Number of bytes from begining of packet to start parsing */
  114964. + ioc_net_header_type first_prs_hdr; /**< The type of the first header axpected at 'parsing_offset' */
  114965. + bool include_in_prs_statistics; /**< TRUE to include this port in the parser statistics */
  114966. + uint8_t num_of_hdrs_with_additional_params;
  114967. + /**< Normally 0, some headers may get special parameters */
  114968. + ioc_fm_pcd_prs_additional_hdr_params_t additional_params[IOC_FM_PCD_PRS_NUM_OF_HDRS];
  114969. + /**< 'num_of_hdrs_with_additional_params' structures
  114970. + additional parameters for each header that requires them */
  114971. + bool set_vlan_tpid1; /**< TRUE to configure user selection of Ethertype to
  114972. + indicate a VLAN tag (in addition to the TPID values
  114973. + 0x8100 and 0x88A8). */
  114974. + uint16_t vlan_tpid1; /**< extra tag to use if set_vlan_tpid1=TRUE. */
  114975. + bool set_vlan_tpid2; /**< TRUE to configure user selection of Ethertype to
  114976. + indicate a VLAN tag (in addition to the TPID values
  114977. + 0x8100 and 0x88A8). */
  114978. + uint16_t vlan_tpid2; /**< extra tag to use if set_vlan_tpid1=TRUE. */
  114979. +} ioc_fm_port_pcd_prs_params_t;
  114980. +
  114981. +/**************************************************************************//**
  114982. + @Description A structure for defining coarse alassification parameters
  114983. + (Must match t_FmPortPcdCcParams defined in fm_port_ext.h)
  114984. +*//***************************************************************************/
  114985. +typedef struct ioc_fm_port_pcd_cc_params_t {
  114986. + void *cc_tree_id; /**< CC tree id */
  114987. +} ioc_fm_port_pcd_cc_params_t;
  114988. +
  114989. +/**************************************************************************//**
  114990. + @Description A structure for defining keygen parameters
  114991. + (Must match t_FmPortPcdKgParams defined in fm_port_ext.h)
  114992. +*//***************************************************************************/
  114993. +typedef struct ioc_fm_port_pcd_kg_params_t {
  114994. + uint8_t num_of_schemes; /**< Number of schemes for port to be bound to. */
  114995. + void *scheme_ids[FM_PCD_KG_NUM_OF_SCHEMES];
  114996. + /**< Array of 'num_of_schemes' schemes for the
  114997. + port to be bound to */
  114998. + bool direct_scheme; /**< TRUE for going from parser to a specific scheme,
  114999. + regardless of parser result */
  115000. + void *direct_scheme_id; /**< Scheme id, as returned by FM_PCD_KgSetScheme;
  115001. + relevant only if direct=TRUE. */
  115002. +} ioc_fm_port_pcd_kg_params_t;
  115003. +
  115004. +/**************************************************************************//**
  115005. + @Description A structure for defining policer parameters
  115006. + (Must match t_FmPortPcdPlcrParams defined in fm_port_ext.h)
  115007. +*//***************************************************************************/
  115008. +typedef struct ioc_fm_port_pcd_plcr_params_t {
  115009. + void *plcr_profile_id; /**< Selected profile handle;
  115010. + relevant in one of the following cases:
  115011. + e_IOC_FM_PORT_PCD_SUPPORT_PLCR_ONLY or
  115012. + e_IOC_FM_PORT_PCD_SUPPORT_PRS_AND_PLCR were selected,
  115013. + or if any flow uses a KG scheme where policer
  115014. + profile is not generated (bypass_plcr_profile_generation selected) */
  115015. +} ioc_fm_port_pcd_plcr_params_t;
  115016. +
  115017. +/**************************************************************************//**
  115018. + @Description A structure for defining port PCD parameters
  115019. + (Must match struct t_FmPortPcdParams defined in fm_port_ext.h)
  115020. +*//***************************************************************************/
  115021. +typedef struct ioc_fm_port_pcd_params_t {
  115022. + ioc_fm_port_pcd_support pcd_support; /**< Relevant for Rx and offline ports only.
  115023. + Describes the active PCD engines for this port. */
  115024. + void *net_env_id; /**< HL Unused in PLCR only mode */
  115025. + ioc_fm_port_pcd_prs_params_t *p_prs_params; /**< Parser parameters for this port */
  115026. + ioc_fm_port_pcd_cc_params_t *p_cc_params; /**< Coarse classification parameters for this port */
  115027. + ioc_fm_port_pcd_kg_params_t *p_kg_params; /**< Keygen parameters for this port */
  115028. + ioc_fm_port_pcd_plcr_params_t *p_plcr_params; /**< Policer parameters for this port */
  115029. + void *p_ip_reassembly_manip;/**< IP Reassembly manipulation */
  115030. +#if (DPAA_VERSION >= 11)
  115031. + void *p_capwap_reassembly_manip;/**< CAPWAP Reassembly manipulation */
  115032. +#endif /* (DPAA_VERSION >= 11) */
  115033. +} ioc_fm_port_pcd_params_t;
  115034. +
  115035. +/**************************************************************************//**
  115036. + @Description A structure for defining the Parser starting point
  115037. + (Must match struct t_FmPcdPrsStart defined in fm_port_ext.h)
  115038. +*//***************************************************************************/
  115039. +typedef struct ioc_fm_pcd_prs_start_t {
  115040. + uint8_t parsing_offset; /**< Number of bytes from begining of packet to
  115041. + start parsing */
  115042. + ioc_net_header_type first_prs_hdr; /**< The type of the first header axpected at
  115043. + 'parsing_offset' */
  115044. +} ioc_fm_pcd_prs_start_t;
  115045. +
  115046. +
  115047. +/**************************************************************************//**
  115048. + @Description FQID parameters structure
  115049. +*//***************************************************************************/
  115050. +typedef struct ioc_fm_port_pcd_fqids_params_t {
  115051. + uint32_t num_fqids; /**< Number of fqids to be allocated for the port */
  115052. + uint8_t alignment; /**< Alignment required for this port */
  115053. + uint32_t base_fqid; /**< output parameter - the base fqid */
  115054. +} ioc_fm_port_pcd_fqids_params_t;
  115055. +
  115056. +
  115057. +/**************************************************************************//**
  115058. + @Function FM_PORT_IOC_ALLOC_PCD_FQIDS
  115059. +
  115060. + @Description Allocates FQID's
  115061. +
  115062. + May be used for Rx and offline parsing ports only
  115063. +
  115064. + @Param[in,out] ioc_fm_port_pcd_fqids_params_t Parameters for allocating FQID's
  115065. +
  115066. + @Return 0 on success; error code otherwise.
  115067. +*//***************************************************************************/
  115068. +#define FM_PORT_IOC_ALLOC_PCD_FQIDS _IOWR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(19), ioc_fm_port_pcd_fqids_params_t)
  115069. +
  115070. +/**************************************************************************//**
  115071. + @Function FM_PORT_IOC_FREE_PCD_FQIDS
  115072. +
  115073. + @Description Frees previously-allocated FQIDs
  115074. +
  115075. + May be used for Rx and offline parsing ports only
  115076. +
  115077. + @Param[in] uint32_t Base FQID of previously allocated range.
  115078. +
  115079. + @Return 0 on success; error code otherwise.
  115080. +*//***************************************************************************/
  115081. +#define FM_PORT_IOC_FREE_PCD_FQIDS _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(19), uint32_t)
  115082. +
  115083. +
  115084. +/**************************************************************************//**
  115085. + @Function FM_PORT_SetPCD
  115086. +
  115087. + @Description Calling this routine defines the port's PCD configuration.
  115088. + It changes it from its default configuration which is PCD
  115089. + disabled (BMI to BMI) and configures it according to the passed
  115090. + parameters.
  115091. +
  115092. + May be used for Rx and offline parsing ports only
  115093. +
  115094. + @Param[in] ioc_fm_port_pcd_params_t A Structure of parameters defining the port's PCD
  115095. + configuration.
  115096. +
  115097. + @Return 0 on success; error code otherwise.
  115098. +*//***************************************************************************/
  115099. +#if defined(CONFIG_COMPAT)
  115100. +#define FM_PORT_IOC_SET_PCD_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(20), ioc_compat_fm_port_pcd_params_t)
  115101. +#endif
  115102. +#define FM_PORT_IOC_SET_PCD _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(20), ioc_fm_port_pcd_params_t)
  115103. +
  115104. +/**************************************************************************//**
  115105. + @Function FM_PORT_DeletePCD
  115106. +
  115107. + @Description Calling this routine releases the port's PCD configuration.
  115108. + The port returns to its default configuration which is PCD
  115109. + disabled (BMI to BMI) and all PCD configuration is removed.
  115110. +
  115111. + May be used for Rx and offline parsing ports which are
  115112. + in PCD mode only
  115113. +
  115114. + @Return 0 on success; error code otherwise.
  115115. +*//***************************************************************************/
  115116. +#define FM_PORT_IOC_DELETE_PCD _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(21))
  115117. +
  115118. +/**************************************************************************//**
  115119. + @Function FM_PORT_AttachPCD
  115120. +
  115121. + @Description This routine may be called after FM_PORT_DetachPCD was called,
  115122. + to return to the originally configured PCD support flow.
  115123. + The couple of routines are used to allow PCD configuration changes
  115124. + that demand that PCD will not be used while changes take place.
  115125. +
  115126. + May be used for Rx and offline parsing ports which are
  115127. + in PCD mode only
  115128. +
  115129. + @Return 0 on success; error code otherwise.
  115130. +*//***************************************************************************/
  115131. +#define FM_PORT_IOC_ATTACH_PCD _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(23))
  115132. +
  115133. +/**************************************************************************//**
  115134. + @Function FM_PORT_DetachPCD
  115135. +
  115136. + @Description Calling this routine detaches the port from its PCD functionality.
  115137. + The port returns to its default flow which is BMI to BMI.
  115138. +
  115139. + May be used for Rx and offline parsing ports which are
  115140. + in PCD mode only
  115141. +
  115142. + @Return 0 on success; error code otherwise.
  115143. +*//***************************************************************************/
  115144. +#define FM_PORT_IOC_DETACH_PCD _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(22))
  115145. +
  115146. +/**************************************************************************//**
  115147. + @Function FM_PORT_PcdPlcrAllocProfiles
  115148. +
  115149. + @Description This routine may be called only for ports that use the Policer in
  115150. + order to allocate private policer profiles.
  115151. +
  115152. + @Param[in] uint16_t The number of required policer profiles
  115153. +
  115154. + @Return 0 on success; error code otherwise.
  115155. +
  115156. + @Cautions Allowed before FM_PORT_SetPCD() only.
  115157. +*//***************************************************************************/
  115158. +#define FM_PORT_IOC_PCD_PLCR_ALLOC_PROFILES _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(24), uint16_t)
  115159. +
  115160. +/**************************************************************************//**
  115161. + @Function FM_PORT_PcdPlcrFreeProfiles
  115162. +
  115163. + @Description This routine should be called for freeing private policer profiles.
  115164. +
  115165. + @Return 0 on success; error code otherwise.
  115166. +
  115167. + @Cautions Allowed before FM_PORT_SetPCD() only.
  115168. +*//***************************************************************************/
  115169. +#define FM_PORT_IOC_PCD_PLCR_FREE_PROFILES _IO(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(25))
  115170. +
  115171. +/**************************************************************************//**
  115172. + @Function FM_PORT_PcdKgModifyInitialScheme
  115173. +
  115174. + @Description This routine may be called only for ports that use the keygen in
  115175. + order to change the initial scheme frame should be routed to.
  115176. + The change may be of a scheme id (in case of direct mode),
  115177. + from direct to indirect, or from indirect to direct - specifying the scheme id.
  115178. +
  115179. + @Param[in] ioc_fm_pcd_kg_scheme_select_t A structure of parameters for defining whether
  115180. + a scheme is direct/indirect, and if direct - scheme id.
  115181. +
  115182. + @Return 0 on success; error code otherwise.
  115183. +*//***************************************************************************/
  115184. +#if defined(CONFIG_COMPAT)
  115185. +#define FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(26), ioc_compat_fm_pcd_kg_scheme_select_t)
  115186. +#endif
  115187. +#define FM_PORT_IOC_PCD_KG_MODIFY_INITIAL_SCHEME _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(26), ioc_fm_pcd_kg_scheme_select_t)
  115188. +
  115189. +/**************************************************************************//**
  115190. + @Function FM_PORT_PcdPlcrModifyInitialProfile
  115191. +
  115192. + @Description This routine may be called for ports with flows
  115193. + e_IOC_FM_PCD_SUPPORT_PLCR_ONLY or e_IOC_FM_PCD_SUPPORT_PRS_AND_PLCR only,
  115194. + to change the initial Policer profile frame should be routed to.
  115195. + The change may be of a profile and/or absolute/direct mode selection.
  115196. +
  115197. + @Param[in] ioc_fm_obj_t Policer profile Id as returned from FM_PCD_PlcrSetProfile.
  115198. +
  115199. + @Return 0 on success; error code otherwise.
  115200. +*//***************************************************************************/
  115201. +#if defined(CONFIG_COMPAT)
  115202. +#define FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(27), ioc_compat_fm_obj_t)
  115203. +#endif
  115204. +#define FM_PORT_IOC_PCD_PLCR_MODIFY_INITIAL_PROFILE _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(27), ioc_fm_obj_t)
  115205. +
  115206. +/**************************************************************************//**
  115207. + @Function FM_PORT_PcdCcModifyTree
  115208. +
  115209. + @Description This routine may be called to change this port connection to
  115210. + a pre-initializes coarse classification Tree.
  115211. +
  115212. + @Param[in] ioc_fm_obj_t Id of new coarse classification tree selected for this port.
  115213. +
  115214. + @Return 0 on success; error code otherwise.
  115215. +
  115216. + @Cautions Allowed only following FM_PORT_SetPCD() and FM_PORT_DetachPCD()
  115217. +*//***************************************************************************/
  115218. +#if defined(CONFIG_COMPAT)
  115219. +#define FM_PORT_IOC_PCD_CC_MODIFY_TREE_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(28), ioc_compat_fm_obj_t)
  115220. +#endif
  115221. +#define FM_PORT_IOC_PCD_CC_MODIFY_TREE _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(28), ioc_fm_obj_t)
  115222. +
  115223. +/**************************************************************************//**
  115224. + @Function FM_PORT_PcdKgBindSchemes
  115225. +
  115226. + @Description These routines may be called for modifying the binding of ports
  115227. + to schemes. The scheme itself is not added,
  115228. + just this specific port starts using it.
  115229. +
  115230. + @Param[in] ioc_fm_pcd_port_schemes_params_t Schemes parameters structre
  115231. +
  115232. + @Return 0 on success; error code otherwise.
  115233. +
  115234. + @Cautions Allowed only following FM_PORT_SetPCD().
  115235. +*//***************************************************************************/
  115236. +#if defined(CONFIG_COMPAT)
  115237. +#define FM_PORT_IOC_PCD_KG_BIND_SCHEMES_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(30), ioc_compat_fm_pcd_port_schemes_params_t)
  115238. +#endif
  115239. +#define FM_PORT_IOC_PCD_KG_BIND_SCHEMES _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(30), ioc_fm_pcd_port_schemes_params_t)
  115240. +
  115241. +/**************************************************************************//**
  115242. + @Function FM_PORT_PcdKgUnbindSchemes
  115243. +
  115244. + @Description These routines may be called for modifying the binding of ports
  115245. + to schemes. The scheme itself is not removed or invalidated,
  115246. + just this specific port stops using it.
  115247. +
  115248. + @Param[in] ioc_fm_pcd_port_schemes_params_t Schemes parameters structre
  115249. +
  115250. + @Return 0 on success; error code otherwise.
  115251. +
  115252. + @Cautions Allowed only following FM_PORT_SetPCD().
  115253. +*//***************************************************************************/
  115254. +#if defined(CONFIG_COMPAT)
  115255. +#define FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(31), ioc_compat_fm_pcd_port_schemes_params_t)
  115256. +#endif
  115257. +#define FM_PORT_IOC_PCD_KG_UNBIND_SCHEMES _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(31), ioc_fm_pcd_port_schemes_params_t)
  115258. +
  115259. +typedef struct ioc_fm_port_mac_addr_params_t {
  115260. + uint8_t addr[ENET_NUM_OCTETS_PER_ADDRESS];
  115261. +} ioc_fm_port_mac_addr_params_t;
  115262. +
  115263. +/**************************************************************************//**
  115264. + @Function FM_MAC_AddHashMacAddr
  115265. +
  115266. + @Description Add an Address to the hash table. This is for filter purpose only.
  115267. +
  115268. + @Param[in] ioc_fm_port_mac_addr_params_t - Ethernet Mac address
  115269. +
  115270. + @Return E_OK on success; Error code otherwise.
  115271. +
  115272. + @Cautions Allowed only following FM_MAC_Init(). It is a filter only address.
  115273. + @Cautions Some address need to be filtered out in upper FM blocks.
  115274. +*//***************************************************************************/
  115275. +#define FM_PORT_IOC_ADD_RX_HASH_MAC_ADDR _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(36), ioc_fm_port_mac_addr_params_t)
  115276. +
  115277. +/**************************************************************************//**
  115278. + @Function FM_MAC_RemoveHashMacAddr
  115279. +
  115280. + @Description Delete an Address to the hash table. This is for filter purpose only.
  115281. +
  115282. + @Param[in] ioc_fm_port_mac_addr_params_t - Ethernet Mac address
  115283. +
  115284. + @Return E_OK on success; Error code otherwise.
  115285. +
  115286. + @Cautions Allowed only following FM_MAC_Init().
  115287. +*//***************************************************************************/
  115288. +#define FM_PORT_IOC_REMOVE_RX_HASH_MAC_ADDR _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(37), ioc_fm_port_mac_addr_params_t)
  115289. +
  115290. +typedef struct ioc_fm_port_tx_pause_frames_params_t {
  115291. + uint8_t priority;
  115292. + uint16_t pause_time;
  115293. + uint16_t thresh_time;
  115294. +} ioc_fm_port_tx_pause_frames_params_t;
  115295. +
  115296. +/**************************************************************************//**
  115297. + @Function FM_MAC_SetTxPauseFrames
  115298. +
  115299. + @Description Enable/Disable transmission of Pause-Frames.
  115300. + The routine changes the default configuration:
  115301. + pause-time - [0xf000]
  115302. + threshold-time - [0]
  115303. +
  115304. + @Param[in] ioc_fm_port_tx_pause_frames_params_t A structure holding the required parameters.
  115305. +
  115306. + @Return E_OK on success; Error code otherwise.
  115307. +
  115308. + @Cautions Allowed only following FM_MAC_Init().
  115309. + PFC is supported only on new mEMAC; i.e. in MACs that don't have
  115310. + PFC support (10G-MAC and dTSEC), user should use 'FM_MAC_NO_PFC'
  115311. + in the 'priority' field.
  115312. +*//***************************************************************************/
  115313. +#define FM_PORT_IOC_SET_TX_PAUSE_FRAMES _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(40), ioc_fm_port_tx_pause_frames_params_t)
  115314. +
  115315. +typedef struct ioc_fm_port_mac_statistics_t {
  115316. + /* RMON */
  115317. + uint64_t e_stat_pkts_64; /**< r-10G tr-DT 64 byte frame counter */
  115318. + uint64_t e_stat_pkts_65_to_127; /**< r-10G 65 to 127 byte frame counter */
  115319. + uint64_t e_stat_pkts_128_to_255; /**< r-10G 128 to 255 byte frame counter */
  115320. + uint64_t e_stat_pkts_256_to_511; /**< r-10G 256 to 511 byte frame counter */
  115321. + uint64_t e_stat_pkts_512_to_1023; /**< r-10G 512 to 1023 byte frame counter */
  115322. + uint64_t e_stat_pkts_1024_to_1518; /**< r-10G 1024 to 1518 byte frame counter */
  115323. + uint64_t e_stat_pkts_1519_to_1522; /**< r-10G 1519 to 1522 byte good frame count */
  115324. + /* */
  115325. + uint64_t e_stat_fragments; /**< Total number of packets that were less than 64 octets long with a wrong CRC.*/
  115326. + uint64_t e_stat_jabbers; /**< Total number of packets longer than valid maximum length octets */
  115327. + uint64_t e_stat_drop_events; /**< number of dropped packets due to internal errors of the MAC Client (during recieve). */
  115328. + uint64_t e_stat_CRC_align_errors; /**< Incremented when frames of correct length but with CRC error are received.*/
  115329. + uint64_t e_stat_undersize_pkts; /**< Incremented for frames under 64 bytes with a valid FCS and otherwise well formed;
  115330. + This count does not include range length errors */
  115331. + uint64_t e_stat_oversize_pkts; /**< Incremented for frames which exceed 1518 (non VLAN) or 1522 (VLAN) and contains
  115332. + a valid FCS and otherwise well formed */
  115333. + /* Pause */
  115334. + uint64_t te_stat_pause; /**< Pause MAC Control received */
  115335. + uint64_t re_stat_pause; /**< Pause MAC Control sent */
  115336. + /* MIB II */
  115337. + uint64_t if_in_octets; /**< Total number of byte received. */
  115338. + uint64_t if_in_pkts; /**< Total number of packets received.*/
  115339. + uint64_t if_in_ucast_pkts; /**< Total number of unicast frame received;
  115340. + NOTE: this counter is not supported on dTSEC MAC */
  115341. + uint64_t if_in_mcast_pkts; /**< Total number of multicast frame received*/
  115342. + uint64_t if_in_bcast_pkts; /**< Total number of broadcast frame received */
  115343. + uint64_t if_in_discards; /**< Frames received, but discarded due to problems within the MAC RX. */
  115344. + uint64_t if_in_errors; /**< Number of frames received with error:
  115345. + - FIFO Overflow Error
  115346. + - CRC Error
  115347. + - Frame Too Long Error
  115348. + - Alignment Error
  115349. + - The dedicated Error Code (0xfe, not a code error) was received */
  115350. + uint64_t if_out_octets; /**< Total number of byte sent. */
  115351. + uint64_t if_out_pkts; /**< Total number of packets sent .*/
  115352. + uint64_t if_out_ucast_pkts; /**< Total number of unicast frame sent;
  115353. + NOTE: this counter is not supported on dTSEC MAC */
  115354. + uint64_t if_out_mcast_pkts; /**< Total number of multicast frame sent */
  115355. + uint64_t if_out_bcast_pkts; /**< Total number of multicast frame sent */
  115356. + uint64_t if_out_discards; /**< Frames received, but discarded due to problems within the MAC TX N/A!.*/
  115357. + uint64_t if_out_errors; /**< Number of frames transmitted with error:
  115358. + - FIFO Overflow Error
  115359. + - FIFO Underflow Error
  115360. + - Other */
  115361. +} ioc_fm_port_mac_statistics_t;
  115362. +
  115363. +/**************************************************************************//**
  115364. + @Function FM_MAC_GetStatistics
  115365. +
  115366. + @Description get all MAC statistics counters
  115367. +
  115368. + @Param[out] ioc_fm_port_mac_statistics_t A structure holding the statistics
  115369. +
  115370. + @Return E_OK on success; Error code otherwise.
  115371. +
  115372. + @Cautions Allowed only following FM_Init().
  115373. +*//***************************************************************************/
  115374. +#define FM_PORT_IOC_GET_MAC_STATISTICS _IOR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(41), ioc_fm_port_mac_statistics_t)
  115375. +
  115376. +/**************************************************************************//**
  115377. + @Function FM_PORT_ConfigBufferPrefixContent
  115378. +
  115379. + @Description Defines the structure, size and content of the application buffer.
  115380. + The prefix will
  115381. + In Tx ports, if 'passPrsResult', the application
  115382. + should set a value to their offsets in the prefix of
  115383. + the FM will save the first 'privDataSize', than,
  115384. + depending on 'passPrsResult' and 'passTimeStamp', copy parse result
  115385. + and timeStamp, and the packet itself (in this order), to the
  115386. + application buffer, and to offset.
  115387. + Calling this routine changes the buffer margins definitions
  115388. + in the internal driver data base from its default
  115389. + configuration: Data size: [DEFAULT_FM_SP_bufferPrefixContent_privDataSize]
  115390. + Pass Parser result: [DEFAULT_FM_SP_bufferPrefixContent_passPrsResult].
  115391. + Pass timestamp: [DEFAULT_FM_SP_bufferPrefixContent_passTimeStamp].
  115392. +
  115393. + May be used for all ports
  115394. +
  115395. + @Param[in] ioc_fm_buffer_prefix_content_t A structure holding the required parameters.
  115396. +
  115397. + @Return E_OK on success; Error code otherwise.
  115398. +
  115399. + @Cautions Allowed only following FM_PORT_Config() and before FM_PORT_Init().
  115400. +*//***************************************************************************/
  115401. +#define FM_PORT_IOC_CONFIG_BUFFER_PREFIX_CONTENT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(39), ioc_fm_buffer_prefix_content_t)
  115402. +
  115403. +#if (DPAA_VERSION >= 11)
  115404. +typedef struct ioc_fm_port_vsp_alloc_params_t {
  115405. + uint8_t num_of_profiles; /**< Number of Virtual Storage Profiles */
  115406. + uint8_t dflt_relative_id; /**< The default Virtual-Storage-Profile-id dedicated to Rx/OP port
  115407. + The same default Virtual-Storage-Profile-id will be for coupled Tx port
  115408. + if relevant function called for Rx port */
  115409. + void *p_fm_tx_port; /**< Handle to coupled Tx Port; not relevant for OP port. */
  115410. +}ioc_fm_port_vsp_alloc_params_t;
  115411. +
  115412. +/**************************************************************************//**
  115413. + @Function FM_PORT_VSPAlloc
  115414. +
  115415. + @Description This routine allocated VSPs per port and forces the port to work
  115416. + in VSP mode. Note that the port is initialized by default with the
  115417. + physical-storage-profile only.
  115418. +
  115419. + @Param[in] h_FmPort A handle to a FM Port module.
  115420. + @Param[in] p_Params A structure of parameters for allocation VSP's per port
  115421. +
  115422. + @Return E_OK on success; Error code otherwise.
  115423. +
  115424. + @Cautions Allowed only following FM_PORT_Init(), and before FM_PORT_SetPCD()
  115425. + and also before FM_PORT_Enable() (i.e. the port should be disabled).
  115426. +*//***************************************************************************/
  115427. +#if defined(CONFIG_COMPAT)
  115428. +#define FM_PORT_IOC_VSP_ALLOC_COMPAT _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(38), ioc_compat_fm_port_vsp_alloc_params_t)
  115429. +#endif
  115430. +#define FM_PORT_IOC_VSP_ALLOC _IOW(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(38), ioc_fm_port_vsp_alloc_params_t)
  115431. +#endif /* (DPAA_VERSION >= 11) */
  115432. +
  115433. +/**************************************************************************//**
  115434. + @Function FM_PORT_GetBmiCounters
  115435. +
  115436. + @Description Read port's BMI stat counters and place them into
  115437. + a designated structure of counters.
  115438. +
  115439. + @Param[in] h_FmPort A handle to a FM Port module.
  115440. + @Param[out] p_BmiStats counters structure
  115441. +
  115442. + @Return E_OK on success; Error code otherwise.
  115443. +
  115444. + @Cautions Allowed only following FM_PORT_Init().
  115445. +*//***************************************************************************/
  115446. +
  115447. +#define FM_PORT_IOC_GET_BMI_COUNTERS _IOR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(42), ioc_fm_port_bmi_stats_t)
  115448. +
  115449. +
  115450. +/** @} */ /* end of lnx_ioctl_FM_PORT_pcd_runtime_control_grp group */
  115451. +/** @} */ /* end of lnx_ioctl_FM_PORT_runtime_control_grp group */
  115452. +
  115453. +/** @} */ /* end of lnx_ioctl_FM_PORT_grp group */
  115454. +/** @} */ /* end of lnx_ioctl_FM_grp group */
  115455. +#endif /* __FM_PORT_IOCTLS_H */
  115456. --- /dev/null
  115457. +++ b/include/uapi/linux/fmd/Peripherals/fm_test_ioctls.h
  115458. @@ -0,0 +1,208 @@
  115459. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  115460. + * All rights reserved.
  115461. + *
  115462. + * Redistribution and use in source and binary forms, with or without
  115463. + * modification, are permitted provided that the following conditions are met:
  115464. + * * Redistributions of source code must retain the above copyright
  115465. + * notice, this list of conditions and the following disclaimer.
  115466. + * * Redistributions in binary form must reproduce the above copyright
  115467. + * notice, this list of conditions and the following disclaimer in the
  115468. + * documentation and/or other materials provided with the distribution.
  115469. + * * Neither the name of Freescale Semiconductor nor the
  115470. + * names of its contributors may be used to endorse or promote products
  115471. + * derived from this software without specific prior written permission.
  115472. + *
  115473. + *
  115474. + * ALTERNATIVELY, this software may be distributed under the terms of the
  115475. + * GNU General Public License ("GPL") as published by the Free Software
  115476. + * Foundation, either version 2 of that License or (at your option) any
  115477. + * later version.
  115478. + *
  115479. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  115480. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  115481. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  115482. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  115483. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  115484. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  115485. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  115486. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  115487. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  115488. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  115489. + */
  115490. +
  115491. +/**************************************************************************//**
  115492. + @File fm_test_ioctls.h
  115493. +
  115494. + @Description FM Char device ioctls
  115495. +*//***************************************************************************/
  115496. +#ifndef __FM_TEST_IOCTLS_H
  115497. +#define __FM_TEST_IOCTLS_H
  115498. +
  115499. +#include "ioctls.h"
  115500. +
  115501. +
  115502. +/**************************************************************************//**
  115503. + @Group lnx_ioctl_FMT_grp Frame Manager Test Linux IOCTL API
  115504. +
  115505. + @Description FM-Test Linux ioctls definitions and enums
  115506. +
  115507. + @{
  115508. +*//***************************************************************************/
  115509. +
  115510. +#define IOC_FMT_MAX_NUM_OF_PORTS 26
  115511. +
  115512. +/**************************************************************************//**
  115513. + @Collection TEST Parameters
  115514. +*//***************************************************************************/
  115515. +/**************************************************************************//**
  115516. + @Description: Name of the FM-Test chardev
  115517. +*//***************************************************************************/
  115518. +#define DEV_FM_TEST_NAME "fm-test-port"
  115519. +
  115520. +#define DEV_FM_TEST_PORTS_MINOR_BASE 0
  115521. +#define DEV_FM_TEST_MAX_MINORS (DEV_FM_TEST_PORTS_MINOR_BASE + IOC_FMT_MAX_NUM_OF_PORTS)
  115522. +
  115523. +#define FMT_PORT_IOC_NUM(n) n
  115524. +/* @} */
  115525. +
  115526. +/**************************************************************************//**
  115527. + @Group lnx_ioctl_FMT_lib_grp FM-Test library
  115528. +
  115529. + @Description TODO
  115530. +
  115531. + @{
  115532. +*//***************************************************************************/
  115533. +
  115534. +/**************************************************************************//**
  115535. + @Description TODO
  115536. +*//***************************************************************************/
  115537. +typedef uint8_t ioc_fmt_xxx_t;
  115538. +
  115539. +#define FM_PRS_MAX 32
  115540. +#define FM_TIME_STAMP_MAX 8
  115541. +
  115542. +/**************************************************************************//**
  115543. + @Description FM Port buffer content description
  115544. +*//***************************************************************************/
  115545. +typedef struct ioc_fmt_buff_context_t {
  115546. + void *p_user_priv;
  115547. + uint8_t fm_prs_res[FM_PRS_MAX];
  115548. + uint8_t fm_time_stamp[FM_TIME_STAMP_MAX];
  115549. +} ioc_fmt_buff_context_t;
  115550. +
  115551. +#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
  115552. +typedef struct ioc_fmt_compat_buff_context_t {
  115553. + compat_uptr_t p_user_priv;
  115554. + uint8_t fm_prs_res[FM_PRS_MAX];
  115555. + uint8_t fm_time_stamp[FM_TIME_STAMP_MAX];
  115556. +} ioc_fmt_compat_buff_context_t;
  115557. +#endif
  115558. +
  115559. +/**************************************************************************//**
  115560. + @Description Buffer descriptor
  115561. +*//***************************************************************************/
  115562. +typedef struct ioc_fmt_buff_desc_t {
  115563. + uint32_t qid;
  115564. + void *p_data;
  115565. + uint32_t size;
  115566. + uint32_t status;
  115567. + ioc_fmt_buff_context_t buff_context;
  115568. +} ioc_fmt_buff_desc_t;
  115569. +
  115570. +#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
  115571. +typedef struct ioc_fmt_compat_buff_desc_t {
  115572. + uint32_t qid;
  115573. + compat_uptr_t p_data;
  115574. + uint32_t size;
  115575. + uint32_t status;
  115576. + ioc_fmt_compat_buff_context_t buff_context;
  115577. +} ioc_fmt_compat_buff_desc_t;
  115578. +#endif
  115579. +
  115580. +/**************************************************************************//**
  115581. + @Group lnx_ioctl_FMT_runtime_control_grp FM-Test Runtime Control Unit
  115582. +
  115583. + @Description TODO
  115584. + @{
  115585. +*//***************************************************************************/
  115586. +
  115587. +/** @} */ /* end of lnx_ioctl_FMT_runtime_control_grp group */
  115588. +
  115589. +
  115590. +/**************************************************************************//**
  115591. + @Group lnx_ioctl_FMTP_lib_grp FM-Port-Test library
  115592. +
  115593. + @Description TODO
  115594. +
  115595. + @{
  115596. +*//***************************************************************************/
  115597. +
  115598. +/**************************************************************************//**
  115599. + @Description FM-Test FM port type
  115600. +*//***************************************************************************/
  115601. +typedef enum ioc_fmt_port_type {
  115602. + e_IOC_FMT_PORT_T_RXTX, /**< Standard port */
  115603. + e_IOC_FMT_PORT_T_OP, /**< Offline-parsing port */
  115604. +} ioc_fmt_port_type;
  115605. +
  115606. +/**************************************************************************//**
  115607. + @Description TODO
  115608. +*//***************************************************************************/
  115609. +typedef struct ioc_fmt_port_param_t {
  115610. + uint8_t fm_id;
  115611. + ioc_fmt_port_type fm_port_type;
  115612. + uint8_t fm_port_id;
  115613. + uint32_t num_tx_queues;
  115614. +} ioc_fmt_port_param_t;
  115615. +
  115616. +
  115617. +/**************************************************************************//**
  115618. + @Function FMT_PORT_IOC_INIT
  115619. +
  115620. + @Description TODO
  115621. +
  115622. + @Param[in] ioc_fmt_port_param_t TODO
  115623. +
  115624. + @Cautions Allowed only after the FM equivalent port is already initialized.
  115625. +*//***************************************************************************/
  115626. +#define FMT_PORT_IOC_INIT _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(0), ioc_fmt_port_param_t)
  115627. +
  115628. +/**************************************************************************//**
  115629. + @Function FMT_PORT_IOC_SET_DIAG_MODE
  115630. +
  115631. + @Description TODO
  115632. +
  115633. + @Param[in] ioc_diag_mode TODO
  115634. +
  115635. + @Cautions Allowed only following FMT_PORT_IOC_INIT().
  115636. +*//***************************************************************************/
  115637. +#define FMT_PORT_IOC_SET_DIAG_MODE _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(1), ioc_diag_mode)
  115638. +
  115639. +/**************************************************************************//**
  115640. + @Function FMT_PORT_IOC_SET_IP_HEADER_MANIP
  115641. +
  115642. + @Description Set IP header manipulations for this port.
  115643. +
  115644. + @Param[in] int 1 to enable; 0 to disable
  115645. +
  115646. + @Cautions Allowed only following FMT_PORT_IOC_INIT().
  115647. +*//***************************************************************************/
  115648. +#define FMT_PORT_IOC_SET_IP_HEADER_MANIP _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(2), int)
  115649. +
  115650. +/**************************************************************************//**
  115651. + @Function FMT_PORT_IOC_SET_DPAECHO_MODE
  115652. +
  115653. + @Description Set DPA in echo mode - all frame are sent back.
  115654. +
  115655. + @Param[in] int 1 to enable; 0 to disable
  115656. +
  115657. + @Cautions Allowed only following FMT_PORT_IOC_INIT().
  115658. +*//***************************************************************************/
  115659. +#define FMT_PORT_IOC_SET_DPAECHO_MODE _IOW(FMT_IOC_TYPE_BASE, FMT_PORT_IOC_NUM(3), int)
  115660. +
  115661. +/** @} */ /* end of lnx_ioctl_FMTP_lib_grp group */
  115662. +/** @} */ /* end of lnx_ioctl_FMT_lib_grp group */
  115663. +/** @} */ /* end of lnx_ioctl_FMT_grp */
  115664. +
  115665. +
  115666. +#endif /* __FM_TEST_IOCTLS_H */
  115667. --- /dev/null
  115668. +++ b/include/uapi/linux/fmd/integrations/Kbuild
  115669. @@ -0,0 +1 @@
  115670. +header-y += integration_ioctls.h
  115671. --- /dev/null
  115672. +++ b/include/uapi/linux/fmd/integrations/integration_ioctls.h
  115673. @@ -0,0 +1,56 @@
  115674. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  115675. + * All rights reserved.
  115676. + *
  115677. + * Redistribution and use in source and binary forms, with or without
  115678. + * modification, are permitted provided that the following conditions are met:
  115679. + * * Redistributions of source code must retain the above copyright
  115680. + * notice, this list of conditions and the following disclaimer.
  115681. + * * Redistributions in binary form must reproduce the above copyright
  115682. + * notice, this list of conditions and the following disclaimer in the
  115683. + * documentation and/or other materials provided with the distribution.
  115684. + * * Neither the name of Freescale Semiconductor nor the
  115685. + * names of its contributors may be used to endorse or promote products
  115686. + * derived from this software without specific prior written permission.
  115687. + *
  115688. + *
  115689. + * ALTERNATIVELY, this software may be distributed under the terms of the
  115690. + * GNU General Public License ("GPL") as published by the Free Software
  115691. + * Foundation, either version 2 of that License or (at your option) any
  115692. + * later version.
  115693. + *
  115694. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  115695. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  115696. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  115697. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  115698. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  115699. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  115700. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  115701. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  115702. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  115703. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  115704. + */
  115705. +
  115706. +/**************************************************************************//**
  115707. + @File integration_ioctls.h
  115708. +
  115709. + @Description External header file for Integration unit routines.
  115710. +*//***************************************************************************/
  115711. +
  115712. +#ifndef __INTG_IOCTLS_H
  115713. +#define __INTG_IOCTLS_H
  115714. +
  115715. +
  115716. +#define FM_IOC_TYPE_BASE (NCSW_IOC_TYPE_BASE+1)
  115717. +#define FMT_IOC_TYPE_BASE (NCSW_IOC_TYPE_BASE+3)
  115718. +
  115719. +/*#define FM_IOCTL_DBG*/
  115720. +
  115721. +#if defined(FM_IOCTL_DBG)
  115722. + #define _fm_ioctl_dbg(format, arg...) \
  115723. + printk("fm ioctl [%s:%u](cpu:%u) - " format, \
  115724. + __func__, __LINE__, smp_processor_id(), ##arg)
  115725. +#else
  115726. +# define _fm_ioctl_dbg(arg...)
  115727. +#endif
  115728. +
  115729. +#endif /* __INTG_IOCTLS_H */
  115730. --- /dev/null
  115731. +++ b/include/uapi/linux/fmd/ioctls.h
  115732. @@ -0,0 +1,96 @@
  115733. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  115734. + * All rights reserved.
  115735. + *
  115736. + * Redistribution and use in source and binary forms, with or without
  115737. + * modification, are permitted provided that the following conditions are met:
  115738. + * * Redistributions of source code must retain the above copyright
  115739. + * notice, this list of conditions and the following disclaimer.
  115740. + * * Redistributions in binary form must reproduce the above copyright
  115741. + * notice, this list of conditions and the following disclaimer in the
  115742. + * documentation and/or other materials provided with the distribution.
  115743. + * * Neither the name of Freescale Semiconductor nor the
  115744. + * names of its contributors may be used to endorse or promote products
  115745. + * derived from this software without specific prior written permission.
  115746. + *
  115747. + *
  115748. + * ALTERNATIVELY, this software may be distributed under the terms of the
  115749. + * GNU General Public License ("GPL") as published by the Free Software
  115750. + * Foundation, either version 2 of that License or (at your option) any
  115751. + * later version.
  115752. + *
  115753. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  115754. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  115755. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  115756. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  115757. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  115758. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  115759. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  115760. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  115761. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  115762. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  115763. + */
  115764. +
  115765. +/**************************************************************************//**
  115766. + @File ioctls.h
  115767. +
  115768. + @Description Structures and definitions for Command Relay Ioctls
  115769. +*//***************************************************************************/
  115770. +
  115771. +#ifndef __IOCTLS_H__
  115772. +#define __IOCTLS_H__
  115773. +
  115774. +#include <asm/ioctl.h>
  115775. +
  115776. +#include "integration_ioctls.h"
  115777. +
  115778. +
  115779. +/**************************************************************************//**
  115780. + @Group lnx_ioctl_ncsw_grp NetCommSw Linux User-Space (IOCTL) API
  115781. + @{
  115782. +*//***************************************************************************/
  115783. +
  115784. +#define NCSW_IOC_TYPE_BASE 0xe0 /**< defines the IOCTL type for all
  115785. + the NCSW Linux module commands */
  115786. +
  115787. +
  115788. +/**************************************************************************//**
  115789. + @Description IOCTL Memory allocation types.
  115790. +*//***************************************************************************/
  115791. +typedef enum ioc_mem_type {
  115792. + e_IOC_MEM_INVALID = 0x00000000, /**< Invalid memory type (error) */
  115793. + e_IOC_MEM_CACHABLE_SYS = 0x00000001, /**< Primary DDR, cacheable segment */
  115794. + e_IOC_MEM_NOCACHE_SYS = 0x00000004, /**< Primary DDR, non-cacheable segment */
  115795. + e_IOC_MEM_SECONDARY = 0x00000002, /**< Either secondary DDR or SDRAM */
  115796. + e_IOC_MEM_PRAM = 0x00000008 /**< Multi-user RAM identifier */
  115797. +} ioc_mem_type;
  115798. +
  115799. +/**************************************************************************//**
  115800. + @Description Enumeration (bit flags) of communication modes (Transmit,
  115801. + receive or both).
  115802. +*//***************************************************************************/
  115803. +typedef enum ioc_comm_mode {
  115804. + e_IOC_COMM_MODE_NONE = 0 /**< No transmit/receive communication */
  115805. + , e_IOC_COMM_MODE_RX = 1 /**< Only receive communication */
  115806. + , e_IOC_COMM_MODE_TX = 2 /**< Only transmit communication */
  115807. + , e_IOC_COMM_MODE_RX_AND_TX = 3 /**< Both transmit and receive communication */
  115808. +} ioc_comm_mode;
  115809. +
  115810. +/**************************************************************************//**
  115811. + @Description General Diagnostic Mode
  115812. +*//***************************************************************************/
  115813. +typedef enum ioc_diag_mode
  115814. +{
  115815. + e_IOC_DIAG_MODE_NONE = 0,
  115816. + e_IOC_DIAG_MODE_CTRL_LOOPBACK, /**< loopback in the controller; E.g. MAC, TDM, etc. */
  115817. + e_IOC_DIAG_MODE_CHIP_LOOPBACK, /**< loopback in the chip but not in controller;
  115818. + E.g. IO-pins, SerDes, etc. */
  115819. + e_IOC_DIAG_MODE_PHY_LOOPBACK, /**< loopback in the external PHY */
  115820. + e_IOC_DIAG_MODE_LINE_LOOPBACK, /**< loopback in the external line */
  115821. + e_IOC_DIAG_MODE_CTRL_ECHO, /**< */
  115822. + e_IOC_DIAG_MODE_PHY_ECHO /**< */
  115823. +} ioc_diag_mode;
  115824. +
  115825. +/** @} */ /* end of lnx_ioctl_ncsw_grp */
  115826. +
  115827. +
  115828. +#endif /* __IOCTLS_H__ */
  115829. --- /dev/null
  115830. +++ b/include/uapi/linux/fmd/net_ioctls.h
  115831. @@ -0,0 +1,430 @@
  115832. +/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
  115833. + * All rights reserved.
  115834. + *
  115835. + * Redistribution and use in source and binary forms, with or without
  115836. + * modification, are permitted provided that the following conditions are met:
  115837. + * * Redistributions of source code must retain the above copyright
  115838. + * notice, this list of conditions and the following disclaimer.
  115839. + * * Redistributions in binary form must reproduce the above copyright
  115840. + * notice, this list of conditions and the following disclaimer in the
  115841. + * documentation and/or other materials provided with the distribution.
  115842. + * * Neither the name of Freescale Semiconductor nor the
  115843. + * names of its contributors may be used to endorse or promote products
  115844. + * derived from this software without specific prior written permission.
  115845. + *
  115846. + *
  115847. + * ALTERNATIVELY, this software may be distributed under the terms of the
  115848. + * GNU General Public License ("GPL") as published by the Free Software
  115849. + * Foundation, either version 2 of that License or (at your option) any
  115850. + * later version.
  115851. + *
  115852. + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  115853. + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  115854. + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  115855. + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  115856. + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  115857. + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  115858. + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  115859. + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  115860. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  115861. + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  115862. + */
  115863. +
  115864. +
  115865. +/**************************************************************************//**
  115866. + @File net_ioctls.h
  115867. +
  115868. + @Description This file contains common and general netcomm headers definitions.
  115869. +*//***************************************************************************/
  115870. +#ifndef __NET_IOCTLS_H
  115871. +#define __NET_IOCTLS_H
  115872. +
  115873. +#include "ioctls.h"
  115874. +
  115875. +
  115876. +typedef uint8_t ioc_header_field_ppp_t;
  115877. +
  115878. +#define IOC_NET_HEADER_FIELD_PPP_PID (1)
  115879. +#define IOC_NET_HEADER_FIELD_PPP_COMPRESSED (IOC_NET_HEADER_FIELD_PPP_PID << 1)
  115880. +#define IOC_NET_HEADER_FIELD_PPP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_PPP_PID << 2) - 1)
  115881. +
  115882. +
  115883. +typedef uint8_t ioc_header_field_pppoe_t;
  115884. +
  115885. +#define IOC_NET_HEADER_FIELD_PPPoE_VER (1)
  115886. +#define IOC_NET_HEADER_FIELD_PPPoE_TYPE (IOC_NET_HEADER_FIELD_PPPoE_VER << 1)
  115887. +#define IOC_NET_HEADER_FIELD_PPPoE_CODE (IOC_NET_HEADER_FIELD_PPPoE_VER << 2)
  115888. +#define IOC_NET_HEADER_FIELD_PPPoE_SID (IOC_NET_HEADER_FIELD_PPPoE_VER << 3)
  115889. +#define IOC_NET_HEADER_FIELD_PPPoE_LEN (IOC_NET_HEADER_FIELD_PPPoE_VER << 4)
  115890. +#define IOC_NET_HEADER_FIELD_PPPoE_SESSION (IOC_NET_HEADER_FIELD_PPPoE_VER << 5)
  115891. +#define IOC_NET_HEADER_FIELD_PPPoE_PID (IOC_NET_HEADER_FIELD_PPPoE_VER << 6)
  115892. +#define IOC_NET_HEADER_FIELD_PPPoE_ALL_FIELDS ((IOC_NET_HEADER_FIELD_PPPoE_VER << 7) - 1)
  115893. +
  115894. +#define IOC_NET_HEADER_FIELD_PPPMUX_PID (1)
  115895. +#define IOC_NET_HEADER_FIELD_PPPMUX_CKSUM (IOC_NET_HEADER_FIELD_PPPMUX_PID << 1)
  115896. +#define IOC_NET_HEADER_FIELD_PPPMUX_COMPRESSED (IOC_NET_HEADER_FIELD_PPPMUX_PID << 2)
  115897. +#define IOC_NET_HEADER_FIELD_PPPMUX_ALL_FIELDS ((IOC_NET_HEADER_FIELD_PPPMUX_PID << 3) - 1)
  115898. +
  115899. +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF (1)
  115900. +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_LXT (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 1)
  115901. +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_LEN (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 2)
  115902. +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PID (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 3)
  115903. +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_USE_PID (IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 4)
  115904. +#define IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_ALL_FIELDS ((IOC_NET_HEADER_FIELD_PPPMUX_SUBFRAME_PFF << 5) - 1)
  115905. +
  115906. +
  115907. +typedef uint8_t ioc_header_field_eth_t;
  115908. +
  115909. +#define IOC_NET_HEADER_FIELD_ETH_DA (1)
  115910. +#define IOC_NET_HEADER_FIELD_ETH_SA (IOC_NET_HEADER_FIELD_ETH_DA << 1)
  115911. +#define IOC_NET_HEADER_FIELD_ETH_LENGTH (IOC_NET_HEADER_FIELD_ETH_DA << 2)
  115912. +#define IOC_NET_HEADER_FIELD_ETH_TYPE (IOC_NET_HEADER_FIELD_ETH_DA << 3)
  115913. +#define IOC_NET_HEADER_FIELD_ETH_FINAL_CKSUM (IOC_NET_HEADER_FIELD_ETH_DA << 4)
  115914. +#define IOC_NET_HEADER_FIELD_ETH_PADDING (IOC_NET_HEADER_FIELD_ETH_DA << 5)
  115915. +#define IOC_NET_HEADER_FIELD_ETH_ALL_FIELDS ((IOC_NET_HEADER_FIELD_ETH_DA << 6) - 1)
  115916. +
  115917. +#define IOC_NET_HEADER_FIELD_ETH_ADDR_SIZE 6
  115918. +
  115919. +typedef uint16_t ioc_header_field_ip_t;
  115920. +
  115921. +#define IOC_NET_HEADER_FIELD_IP_VER (1)
  115922. +#define IOC_NET_HEADER_FIELD_IP_DSCP (IOC_NET_HEADER_FIELD_IP_VER << 2)
  115923. +#define IOC_NET_HEADER_FIELD_IP_ECN (IOC_NET_HEADER_FIELD_IP_VER << 3)
  115924. +#define IOC_NET_HEADER_FIELD_IP_PROTO (IOC_NET_HEADER_FIELD_IP_VER << 4)
  115925. +
  115926. +#define IOC_NET_HEADER_FIELD_IP_PROTO_SIZE 1
  115927. +
  115928. +typedef uint16_t ioc_header_field_ipv4_t;
  115929. +
  115930. +#define IOC_NET_HEADER_FIELD_IPv4_VER (1)
  115931. +#define IOC_NET_HEADER_FIELD_IPv4_HDR_LEN (IOC_NET_HEADER_FIELD_IPv4_VER << 1)
  115932. +#define IOC_NET_HEADER_FIELD_IPv4_TOS (IOC_NET_HEADER_FIELD_IPv4_VER << 2)
  115933. +#define IOC_NET_HEADER_FIELD_IPv4_TOTAL_LEN (IOC_NET_HEADER_FIELD_IPv4_VER << 3)
  115934. +#define IOC_NET_HEADER_FIELD_IPv4_ID (IOC_NET_HEADER_FIELD_IPv4_VER << 4)
  115935. +#define IOC_NET_HEADER_FIELD_IPv4_FLAG_D (IOC_NET_HEADER_FIELD_IPv4_VER << 5)
  115936. +#define IOC_NET_HEADER_FIELD_IPv4_FLAG_M (IOC_NET_HEADER_FIELD_IPv4_VER << 6)
  115937. +#define IOC_NET_HEADER_FIELD_IPv4_OFFSET (IOC_NET_HEADER_FIELD_IPv4_VER << 7)
  115938. +#define IOC_NET_HEADER_FIELD_IPv4_TTL (IOC_NET_HEADER_FIELD_IPv4_VER << 8)
  115939. +#define IOC_NET_HEADER_FIELD_IPv4_PROTO (IOC_NET_HEADER_FIELD_IPv4_VER << 9)
  115940. +#define IOC_NET_HEADER_FIELD_IPv4_CKSUM (IOC_NET_HEADER_FIELD_IPv4_VER << 10)
  115941. +#define IOC_NET_HEADER_FIELD_IPv4_SRC_IP (IOC_NET_HEADER_FIELD_IPv4_VER << 11)
  115942. +#define IOC_NET_HEADER_FIELD_IPv4_DST_IP (IOC_NET_HEADER_FIELD_IPv4_VER << 12)
  115943. +#define IOC_NET_HEADER_FIELD_IPv4_OPTS (IOC_NET_HEADER_FIELD_IPv4_VER << 13)
  115944. +#define IOC_NET_HEADER_FIELD_IPv4_OPTS_COUNT (IOC_NET_HEADER_FIELD_IPv4_VER << 14)
  115945. +#define IOC_NET_HEADER_FIELD_IPv4_ALL_FIELDS ((IOC_NET_HEADER_FIELD_IPv4_VER << 15) - 1)
  115946. +
  115947. +#define IOC_NET_HEADER_FIELD_IPv4_ADDR_SIZE 4
  115948. +#define IOC_NET_HEADER_FIELD_IPv4_PROTO_SIZE 1
  115949. +
  115950. +
  115951. +typedef uint8_t ioc_header_field_ipv6_t;
  115952. +
  115953. +#define IOC_NET_HEADER_FIELD_IPv6_VER (1)
  115954. +#define IOC_NET_HEADER_FIELD_IPv6_TC (IOC_NET_HEADER_FIELD_IPv6_VER << 1)
  115955. +#define IOC_NET_HEADER_FIELD_IPv6_SRC_IP (IOC_NET_HEADER_FIELD_IPv6_VER << 2)
  115956. +#define IOC_NET_HEADER_FIELD_IPv6_DST_IP (IOC_NET_HEADER_FIELD_IPv6_VER << 3)
  115957. +#define IOC_NET_HEADER_FIELD_IPv6_NEXT_HDR (IOC_NET_HEADER_FIELD_IPv6_VER << 4)
  115958. +#define IOC_NET_HEADER_FIELD_IPv6_FL (IOC_NET_HEADER_FIELD_IPv6_VER << 5)
  115959. +#define IOC_NET_HEADER_FIELD_IPv6_HOP_LIMIT (IOC_NET_HEADER_FIELD_IPv6_VER << 6)
  115960. +#define IOC_NET_HEADER_FIELD_IPv6_ALL_FIELDS ((IOC_NET_HEADER_FIELD_IPv6_VER << 7) - 1)
  115961. +
  115962. +#define IOC_NET_HEADER_FIELD_IPv6_ADDR_SIZE 16
  115963. +#define IOC_NET_HEADER_FIELD_IPv6_NEXT_HDR_SIZE 1
  115964. +
  115965. +#define IOC_NET_HEADER_FIELD_ICMP_TYPE (1)
  115966. +#define IOC_NET_HEADER_FIELD_ICMP_CODE (IOC_NET_HEADER_FIELD_ICMP_TYPE << 1)
  115967. +#define IOC_NET_HEADER_FIELD_ICMP_CKSUM (IOC_NET_HEADER_FIELD_ICMP_TYPE << 2)
  115968. +#define IOC_NET_HEADER_FIELD_ICMP_ID (IOC_NET_HEADER_FIELD_ICMP_TYPE << 3)
  115969. +#define IOC_NET_HEADER_FIELD_ICMP_SQ_NUM (IOC_NET_HEADER_FIELD_ICMP_TYPE << 4)
  115970. +#define IOC_NET_HEADER_FIELD_ICMP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_ICMP_TYPE << 5) - 1)
  115971. +
  115972. +#define IOC_NET_HEADER_FIELD_ICMP_CODE_SIZE 1
  115973. +#define IOC_NET_HEADER_FIELD_ICMP_TYPE_SIZE 1
  115974. +
  115975. +#define IOC_NET_HEADER_FIELD_IGMP_VERSION (1)
  115976. +#define IOC_NET_HEADER_FIELD_IGMP_TYPE (IOC_NET_HEADER_FIELD_IGMP_VERSION << 1)
  115977. +#define IOC_NET_HEADER_FIELD_IGMP_CKSUM (IOC_NET_HEADER_FIELD_IGMP_VERSION << 2)
  115978. +#define IOC_NET_HEADER_FIELD_IGMP_DATA (IOC_NET_HEADER_FIELD_IGMP_VERSION << 3)
  115979. +#define IOC_NET_HEADER_FIELD_IGMP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_IGMP_VERSION << 4) - 1)
  115980. +
  115981. +
  115982. +typedef uint16_t ioc_header_field_tcp_t;
  115983. +
  115984. +#define IOC_NET_HEADER_FIELD_TCP_PORT_SRC (1)
  115985. +#define IOC_NET_HEADER_FIELD_TCP_PORT_DST (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 1)
  115986. +#define IOC_NET_HEADER_FIELD_TCP_SEQ (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 2)
  115987. +#define IOC_NET_HEADER_FIELD_TCP_ACK (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 3)
  115988. +#define IOC_NET_HEADER_FIELD_TCP_OFFSET (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 4)
  115989. +#define IOC_NET_HEADER_FIELD_TCP_FLAGS (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 5)
  115990. +#define IOC_NET_HEADER_FIELD_TCP_WINDOW (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 6)
  115991. +#define IOC_NET_HEADER_FIELD_TCP_CKSUM (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 7)
  115992. +#define IOC_NET_HEADER_FIELD_TCP_URGPTR (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 8)
  115993. +#define IOC_NET_HEADER_FIELD_TCP_OPTS (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 9)
  115994. +#define IOC_NET_HEADER_FIELD_TCP_OPTS_COUNT (IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 10)
  115995. +#define IOC_NET_HEADER_FIELD_TCP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_TCP_PORT_SRC << 11) - 1)
  115996. +
  115997. +#define IOC_NET_HEADER_FIELD_TCP_PORT_SIZE 2
  115998. +
  115999. +
  116000. +typedef uint8_t ioc_header_field_sctp_t;
  116001. +
  116002. +#define IOC_NET_HEADER_FIELD_SCTP_PORT_SRC (1)
  116003. +#define IOC_NET_HEADER_FIELD_SCTP_PORT_DST (IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 1)
  116004. +#define IOC_NET_HEADER_FIELD_SCTP_VER_TAG (IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 2)
  116005. +#define IOC_NET_HEADER_FIELD_SCTP_CKSUM (IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 3)
  116006. +#define IOC_NET_HEADER_FIELD_SCTP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_SCTP_PORT_SRC << 4) - 1)
  116007. +
  116008. +#define IOC_NET_HEADER_FIELD_SCTP_PORT_SIZE 2
  116009. +
  116010. +typedef uint8_t ioc_header_field_dccp_t;
  116011. +
  116012. +#define IOC_NET_HEADER_FIELD_DCCP_PORT_SRC (1)
  116013. +#define IOC_NET_HEADER_FIELD_DCCP_PORT_DST (IOC_NET_HEADER_FIELD_DCCP_PORT_SRC << 1)
  116014. +#define IOC_NET_HEADER_FIELD_DCCP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_DCCP_PORT_SRC << 2) - 1)
  116015. +
  116016. +#define IOC_NET_HEADER_FIELD_DCCP_PORT_SIZE 2
  116017. +
  116018. +
  116019. +typedef uint8_t ioc_header_field_udp_t;
  116020. +
  116021. +#define IOC_NET_HEADER_FIELD_UDP_PORT_SRC (1)
  116022. +#define IOC_NET_HEADER_FIELD_UDP_PORT_DST (IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 1)
  116023. +#define IOC_NET_HEADER_FIELD_UDP_LEN (IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 2)
  116024. +#define IOC_NET_HEADER_FIELD_UDP_CKSUM (IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 3)
  116025. +#define IOC_NET_HEADER_FIELD_UDP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_UDP_PORT_SRC << 4) - 1)
  116026. +
  116027. +#define IOC_NET_HEADER_FIELD_UDP_PORT_SIZE 2
  116028. +
  116029. +typedef uint8_t ioc_header_field_udp_lite_t;
  116030. +
  116031. +#define IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SRC (1)
  116032. +#define IOC_NET_HEADER_FIELD_UDP_LITE_PORT_DST (IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 1)
  116033. +#define IOC_NET_HEADER_FIELD_UDP_LITE_ALL_FIELDS ((IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SRC << 2) - 1)
  116034. +
  116035. +#define IOC_NET_HEADER_FIELD_UDP_LITE_PORT_SIZE 2
  116036. +
  116037. +typedef uint8_t ioc_header_field_udp_encap_esp_t;
  116038. +
  116039. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC (1)
  116040. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_DST (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 1)
  116041. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_LEN (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 2)
  116042. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_CKSUM (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 3)
  116043. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 4)
  116044. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_SEQUENCE_NUM (IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 5)
  116045. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SRC << 6) - 1)
  116046. +
  116047. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_PORT_SIZE 2
  116048. +#define IOC_NET_HEADER_FIELD_UDP_ENCAP_ESP_SPI_SIZE 4
  116049. +
  116050. +#define IOC_NET_HEADER_FIELD_IPHC_CID (1)
  116051. +#define IOC_NET_HEADER_FIELD_IPHC_CID_TYPE (IOC_NET_HEADER_FIELD_IPHC_CID << 1)
  116052. +#define IOC_NET_HEADER_FIELD_IPHC_HCINDEX (IOC_NET_HEADER_FIELD_IPHC_CID << 2)
  116053. +#define IOC_NET_HEADER_FIELD_IPHC_GEN (IOC_NET_HEADER_FIELD_IPHC_CID << 3)
  116054. +#define IOC_NET_HEADER_FIELD_IPHC_D_BIT (IOC_NET_HEADER_FIELD_IPHC_CID << 4)
  116055. +#define IOC_NET_HEADER_FIELD_IPHC_ALL_FIELDS ((IOC_NET_HEADER_FIELD_IPHC_CID << 5) - 1)
  116056. +
  116057. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE (1)
  116058. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_FLAGS (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 1)
  116059. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_LENGTH (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 2)
  116060. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TSN (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 3)
  116061. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_ID (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 4)
  116062. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_STREAM_SQN (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 5)
  116063. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_PAYLOAD_PID (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 6)
  116064. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_UNORDERED (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 7)
  116065. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_BEGGINING (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 8)
  116066. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_END (IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 9)
  116067. +#define IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_ALL_FIELDS ((IOC_NET_HEADER_FIELD_SCTP_CHUNK_DATA_TYPE << 10) - 1)
  116068. +
  116069. +#define IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT (1)
  116070. +#define IOC_NET_HEADER_FIELD_L2TPv2_LENGTH_BIT (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 1)
  116071. +#define IOC_NET_HEADER_FIELD_L2TPv2_SEQUENCE_BIT (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 2)
  116072. +#define IOC_NET_HEADER_FIELD_L2TPv2_OFFSET_BIT (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 3)
  116073. +#define IOC_NET_HEADER_FIELD_L2TPv2_PRIORITY_BIT (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 4)
  116074. +#define IOC_NET_HEADER_FIELD_L2TPv2_VERSION (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 5)
  116075. +#define IOC_NET_HEADER_FIELD_L2TPv2_LEN (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 6)
  116076. +#define IOC_NET_HEADER_FIELD_L2TPv2_TUNNEL_ID (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 7)
  116077. +#define IOC_NET_HEADER_FIELD_L2TPv2_SESSION_ID (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 8)
  116078. +#define IOC_NET_HEADER_FIELD_L2TPv2_NS (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 9)
  116079. +#define IOC_NET_HEADER_FIELD_L2TPv2_NR (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 10)
  116080. +#define IOC_NET_HEADER_FIELD_L2TPv2_OFFSET_SIZE (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 11)
  116081. +#define IOC_NET_HEADER_FIELD_L2TPv2_FIRST_BYTE (IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 12)
  116082. +#define IOC_NET_HEADER_FIELD_L2TPv2_ALL_FIELDS ((IOC_NET_HEADER_FIELD_L2TPv2_TYPE_BIT << 13) - 1)
  116083. +
  116084. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT (1)
  116085. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH_BIT (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 1)
  116086. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_SEQUENCE_BIT (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 2)
  116087. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_VERSION (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 3)
  116088. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_LENGTH (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 4)
  116089. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_CONTROL (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 5)
  116090. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_SENT (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 6)
  116091. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_RECV (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 7)
  116092. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_FIRST_BYTE (IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 8)
  116093. +#define IOC_NET_HEADER_FIELD_L2TPv3_CTRL_ALL_FIELDS ((IOC_NET_HEADER_FIELD_L2TPv3_CTRL_TYPE_BIT << 9) - 1)
  116094. +
  116095. +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT (1)
  116096. +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_VERSION (IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 1)
  116097. +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_ID (IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 2)
  116098. +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_COOKIE (IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 3)
  116099. +#define IOC_NET_HEADER_FIELD_L2TPv3_SESS_ALL_FIELDS ((IOC_NET_HEADER_FIELD_L2TPv3_SESS_TYPE_BIT << 4) - 1)
  116100. +
  116101. +
  116102. +typedef uint8_t ioc_header_field_vlan_t;
  116103. +
  116104. +#define IOC_NET_HEADER_FIELD_VLAN_VPRI (1)
  116105. +#define IOC_NET_HEADER_FIELD_VLAN_CFI (IOC_NET_HEADER_FIELD_VLAN_VPRI << 1)
  116106. +#define IOC_NET_HEADER_FIELD_VLAN_VID (IOC_NET_HEADER_FIELD_VLAN_VPRI << 2)
  116107. +#define IOC_NET_HEADER_FIELD_VLAN_LENGTH (IOC_NET_HEADER_FIELD_VLAN_VPRI << 3)
  116108. +#define IOC_NET_HEADER_FIELD_VLAN_TYPE (IOC_NET_HEADER_FIELD_VLAN_VPRI << 4)
  116109. +#define IOC_NET_HEADER_FIELD_VLAN_ALL_FIELDS ((IOC_NET_HEADER_FIELD_VLAN_VPRI << 5) - 1)
  116110. +
  116111. +#define IOC_NET_HEADER_FIELD_VLAN_TCI (IOC_NET_HEADER_FIELD_VLAN_VPRI | \
  116112. + IOC_NET_HEADER_FIELD_VLAN_CFI | \
  116113. + IOC_NET_HEADER_FIELD_VLAN_VID)
  116114. +
  116115. +
  116116. +typedef uint8_t ioc_header_field_llc_t;
  116117. +
  116118. +#define IOC_NET_HEADER_FIELD_LLC_DSAP (1)
  116119. +#define IOC_NET_HEADER_FIELD_LLC_SSAP (IOC_NET_HEADER_FIELD_LLC_DSAP << 1)
  116120. +#define IOC_NET_HEADER_FIELD_LLC_CTRL (IOC_NET_HEADER_FIELD_LLC_DSAP << 2)
  116121. +#define IOC_NET_HEADER_FIELD_LLC_ALL_FIELDS ((IOC_NET_HEADER_FIELD_LLC_DSAP << 3) - 1)
  116122. +
  116123. +#define IOC_NET_HEADER_FIELD_NLPID_NLPID (1)
  116124. +#define IOC_NET_HEADER_FIELD_NLPID_ALL_FIELDS ((IOC_NET_HEADER_FIELD_NLPID_NLPID << 1) - 1)
  116125. +
  116126. +
  116127. +typedef uint8_t ioc_header_field_snap_t;
  116128. +
  116129. +#define IOC_NET_HEADER_FIELD_SNAP_OUI (1)
  116130. +#define IOC_NET_HEADER_FIELD_SNAP_PID (IOC_NET_HEADER_FIELD_SNAP_OUI << 1)
  116131. +#define IOC_NET_HEADER_FIELD_SNAP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_SNAP_OUI << 2) - 1)
  116132. +
  116133. +
  116134. +typedef uint8_t ioc_header_field_llc_snap_t;
  116135. +
  116136. +#define IOC_NET_HEADER_FIELD_LLC_SNAP_TYPE (1)
  116137. +#define IOC_NET_HEADER_FIELD_LLC_SNAP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_LLC_SNAP_TYPE << 1) - 1)
  116138. +
  116139. +#define IOC_NET_HEADER_FIELD_ARP_HTYPE (1)
  116140. +#define IOC_NET_HEADER_FIELD_ARP_PTYPE (IOC_NET_HEADER_FIELD_ARP_HTYPE << 1)
  116141. +#define IOC_NET_HEADER_FIELD_ARP_HLEN (IOC_NET_HEADER_FIELD_ARP_HTYPE << 2)
  116142. +#define IOC_NET_HEADER_FIELD_ARP_PLEN (IOC_NET_HEADER_FIELD_ARP_HTYPE << 3)
  116143. +#define IOC_NET_HEADER_FIELD_ARP_OPER (IOC_NET_HEADER_FIELD_ARP_HTYPE << 4)
  116144. +#define IOC_NET_HEADER_FIELD_ARP_SHA (IOC_NET_HEADER_FIELD_ARP_HTYPE << 5)
  116145. +#define IOC_NET_HEADER_FIELD_ARP_SPA (IOC_NET_HEADER_FIELD_ARP_HTYPE << 6)
  116146. +#define IOC_NET_HEADER_FIELD_ARP_THA (IOC_NET_HEADER_FIELD_ARP_HTYPE << 7)
  116147. +#define IOC_NET_HEADER_FIELD_ARP_TPA (IOC_NET_HEADER_FIELD_ARP_HTYPE << 8)
  116148. +#define IOC_NET_HEADER_FIELD_ARP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_ARP_HTYPE << 9) - 1)
  116149. +
  116150. +#define IOC_NET_HEADER_FIELD_RFC2684_LLC (1)
  116151. +#define IOC_NET_HEADER_FIELD_RFC2684_NLPID (IOC_NET_HEADER_FIELD_RFC2684_LLC << 1)
  116152. +#define IOC_NET_HEADER_FIELD_RFC2684_OUI (IOC_NET_HEADER_FIELD_RFC2684_LLC << 2)
  116153. +#define IOC_NET_HEADER_FIELD_RFC2684_PID (IOC_NET_HEADER_FIELD_RFC2684_LLC << 3)
  116154. +#define IOC_NET_HEADER_FIELD_RFC2684_VPN_OUI (IOC_NET_HEADER_FIELD_RFC2684_LLC << 4)
  116155. +#define IOC_NET_HEADER_FIELD_RFC2684_VPN_IDX (IOC_NET_HEADER_FIELD_RFC2684_LLC << 5)
  116156. +#define IOC_NET_HEADER_FIELD_RFC2684_ALL_FIELDS ((IOC_NET_HEADER_FIELD_RFC2684_LLC << 6) - 1)
  116157. +
  116158. +#define IOC_NET_HEADER_FIELD_USER_DEFINED_SRCPORT (1)
  116159. +#define IOC_NET_HEADER_FIELD_USER_DEFINED_PCDID (IOC_NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 1)
  116160. +#define IOC_NET_HEADER_FIELD_USER_DEFINED_ALL_FIELDS ((IOC_NET_HEADER_FIELD_USER_DEFINED_SRCPORT << 2) - 1)
  116161. +
  116162. +#define IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER (1)
  116163. +#define IOC_NET_HEADER_FIELD_PAYLOAD_SIZE (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 1)
  116164. +#define IOC_NET_HEADER_FIELD_MAX_FRM_SIZE (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 2)
  116165. +#define IOC_NET_HEADER_FIELD_MIN_FRM_SIZE (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 3)
  116166. +#define IOC_NET_HEADER_FIELD_PAYLOAD_TYPE (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 4)
  116167. +#define IOC_NET_HEADER_FIELD_FRAME_SIZE (IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 5)
  116168. +#define IOC_NET_HEADER_FIELD_PAYLOAD_ALL_FIELDS ((IOC_NET_HEADER_FIELD_PAYLOAD_BUFFER << 6) - 1)
  116169. +
  116170. +
  116171. +typedef uint8_t ioc_header_field_gre_t;
  116172. +
  116173. +#define IOC_NET_HEADER_FIELD_GRE_TYPE (1)
  116174. +#define IOC_NET_HEADER_FIELD_GRE_ALL_FIELDS ((IOC_NET_HEADER_FIELD_GRE_TYPE << 1) - 1)
  116175. +
  116176. +
  116177. +typedef uint8_t ioc_header_field_minencap_t;
  116178. +
  116179. +#define IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP (1)
  116180. +#define IOC_NET_HEADER_FIELD_MINENCAP_DST_IP (IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP << 1)
  116181. +#define IOC_NET_HEADER_FIELD_MINENCAP_TYPE (IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP << 2)
  116182. +#define IOC_NET_HEADER_FIELD_MINENCAP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_MINENCAP_SRC_IP << 3) - 1)
  116183. +
  116184. +
  116185. +typedef uint8_t ioc_header_field_ipsec_ah_t;
  116186. +
  116187. +#define IOC_NET_HEADER_FIELD_IPSEC_AH_SPI (1)
  116188. +#define IOC_NET_HEADER_FIELD_IPSEC_AH_NH (IOC_NET_HEADER_FIELD_IPSEC_AH_SPI << 1)
  116189. +#define IOC_NET_HEADER_FIELD_IPSEC_AH_ALL_FIELDS ((IOC_NET_HEADER_FIELD_IPSEC_AH_SPI << 2) - 1)
  116190. +
  116191. +
  116192. +typedef uint8_t ioc_header_field_ipsec_esp_t;
  116193. +
  116194. +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI (1)
  116195. +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_SEQUENCE_NUM (IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI << 1)
  116196. +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_ALL_FIELDS ((IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI << 2) - 1)
  116197. +
  116198. +#define IOC_NET_HEADER_FIELD_IPSEC_ESP_SPI_SIZE 4
  116199. +
  116200. +
  116201. +typedef uint8_t ioc_header_field_mpls_t;
  116202. +
  116203. +#define IOC_NET_HEADER_FIELD_MPLS_LABEL_STACK (1)
  116204. +#define IOC_NET_HEADER_FIELD_MPLS_LABEL_STACK_ALL_FIELDS ((IOC_NET_HEADER_FIELD_MPLS_LABEL_STACK << 1) - 1)
  116205. +
  116206. +
  116207. +typedef uint8_t ioc_header_field_macsec_t;
  116208. +
  116209. +#define IOC_NET_HEADER_FIELD_MACSEC_SECTAG (1)
  116210. +#define IOC_NET_HEADER_FIELD_MACSEC_ALL_FIELDS ((IOC_NET_HEADER_FIELD_MACSEC_SECTAG << 1) - 1)
  116211. +
  116212. +
  116213. +typedef enum {
  116214. + e_IOC_NET_HEADER_TYPE_NONE = 0,
  116215. + e_IOC_NET_HEADER_TYPE_PAYLOAD,
  116216. + e_IOC_NET_HEADER_TYPE_ETH,
  116217. + e_IOC_NET_HEADER_TYPE_VLAN,
  116218. + e_IOC_NET_HEADER_TYPE_IPv4,
  116219. + e_IOC_NET_HEADER_TYPE_IPv6,
  116220. + e_IOC_NET_HEADER_TYPE_IP,
  116221. + e_IOC_NET_HEADER_TYPE_TCP,
  116222. + e_IOC_NET_HEADER_TYPE_UDP,
  116223. + e_IOC_NET_HEADER_TYPE_UDP_LITE,
  116224. + e_IOC_NET_HEADER_TYPE_IPHC,
  116225. + e_IOC_NET_HEADER_TYPE_SCTP,
  116226. + e_IOC_NET_HEADER_TYPE_SCTP_CHUNK_DATA,
  116227. + e_IOC_NET_HEADER_TYPE_PPPoE,
  116228. + e_IOC_NET_HEADER_TYPE_PPP,
  116229. + e_IOC_NET_HEADER_TYPE_PPPMUX,
  116230. + e_IOC_NET_HEADER_TYPE_PPPMUX_SUBFRAME,
  116231. + e_IOC_NET_HEADER_TYPE_L2TPv2,
  116232. + e_IOC_NET_HEADER_TYPE_L2TPv3_CTRL,
  116233. + e_IOC_NET_HEADER_TYPE_L2TPv3_SESS,
  116234. + e_IOC_NET_HEADER_TYPE_LLC,
  116235. + e_IOC_NET_HEADER_TYPE_LLC_SNAP,
  116236. + e_IOC_NET_HEADER_TYPE_NLPID,
  116237. + e_IOC_NET_HEADER_TYPE_SNAP,
  116238. + e_IOC_NET_HEADER_TYPE_MPLS,
  116239. + e_IOC_NET_HEADER_TYPE_IPSEC_AH,
  116240. + e_IOC_NET_HEADER_TYPE_IPSEC_ESP,
  116241. + e_IOC_NET_HEADER_TYPE_UDP_ENCAP_ESP, /* RFC 3948 */
  116242. + e_IOC_NET_HEADER_TYPE_MACSEC,
  116243. + e_IOC_NET_HEADER_TYPE_GRE,
  116244. + e_IOC_NET_HEADER_TYPE_MINENCAP,
  116245. + e_IOC_NET_HEADER_TYPE_DCCP,
  116246. + e_IOC_NET_HEADER_TYPE_ICMP,
  116247. + e_IOC_NET_HEADER_TYPE_IGMP,
  116248. + e_IOC_NET_HEADER_TYPE_ARP,
  116249. + e_IOC_NET_HEADER_TYPE_CAPWAP,
  116250. + e_IOC_NET_HEADER_TYPE_CAPWAP_DTLS,
  116251. + e_IOC_NET_HEADER_TYPE_RFC2684,
  116252. + e_IOC_NET_HEADER_TYPE_USER_DEFINED_L2,
  116253. + e_IOC_NET_HEADER_TYPE_USER_DEFINED_L3,
  116254. + e_IOC_NET_HEADER_TYPE_USER_DEFINED_L4,
  116255. + e_IOC_NET_HEADER_TYPE_USER_DEFINED_SHIM1,
  116256. + e_IOC_NET_HEADER_TYPE_USER_DEFINED_SHIM2,
  116257. + e_IOC_NET_MAX_HEADER_TYPE_COUNT
  116258. +} ioc_net_header_type;
  116259. +
  116260. +
  116261. +#endif /* __NET_IOCTLS_H */