4047-drivers-memory-Fix-build-error-for-arm64.patch 1.7 KB

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  1. From 0ce5d6bd62a9f1dbaa2d39c3535a8bdb31cf7951 Mon Sep 17 00:00:00 2001
  2. From: Raghav Dogra <raghav.dogra@nxp.com>
  3. Date: Wed, 24 Feb 2016 23:12:58 +0530
  4. Subject: [PATCH 47/70] drivers/memory: Fix build error for arm64
  5. Replace spin_event_timeout() with arch independent macro
  6. Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
  7. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
  8. ---
  9. drivers/memory/fsl_ifc.c | 16 +++++++++-------
  10. 1 file changed, 9 insertions(+), 7 deletions(-)
  11. --- a/drivers/memory/fsl_ifc.c
  12. +++ b/drivers/memory/fsl_ifc.c
  13. @@ -39,7 +39,7 @@
  14. struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
  15. EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
  16. #define FSL_IFC_V1_3_0 0x01030000
  17. -#define IFC_TIMEOUT_MSECS 100000 /* 100ms */
  18. +#define IFC_TIMEOUT_MSECS 1000 /* 1000ms */
  19. /*
  20. * convert_ifc_address - convert the base address
  21. @@ -365,7 +365,7 @@ static int fsl_ifc_resume(struct device
  22. struct fsl_ifc_runtime __iomem *runtime = ctrl->rregs;
  23. struct fsl_ifc_fcm *savd_gregs = ctrl->saved_gregs;
  24. struct fsl_ifc_runtime *savd_rregs = ctrl->saved_rregs;
  25. - uint32_t ver = 0, ncfgr, status, ifc_bank, i;
  26. + uint32_t ver = 0, ncfgr, timeout, ifc_bank, i;
  27. /*
  28. * IFC interrupts disabled
  29. @@ -469,12 +469,14 @@ static int fsl_ifc_resume(struct device
  30. ifc_out32(ncfgr | IFC_NAND_SRAM_INIT_EN,
  31. &runtime->ifc_nand.ncfgr);
  32. /* wait for SRAM_INIT bit to be clear or timeout */
  33. - status = spin_event_timeout(
  34. - !(ifc_in32(&runtime->ifc_nand.ncfgr)
  35. - & IFC_NAND_SRAM_INIT_EN),
  36. - IFC_TIMEOUT_MSECS, 0);
  37. + timeout = 10;
  38. + while ((ifc_in32(&runtime->ifc_nand.ncfgr) &
  39. + IFC_NAND_SRAM_INIT_EN) && timeout) {
  40. + mdelay(IFC_TIMEOUT_MSECS);
  41. + timeout--;
  42. + }
  43. - if (!status)
  44. + if (!timeout)
  45. dev_err(ctrl->dev, "Timeout waiting for IFC SRAM INIT");
  46. }