3033-arm64-add-ioremap-for-normal-cacheable-non-shareable.patch 2.1 KB

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  1. From 6ef5cf7b8f6b86fb3856f3449f1ad431118e5c9d Mon Sep 17 00:00:00 2001
  2. From: Haiying Wang <Haiying.Wang@freescale.com>
  3. Date: Wed, 22 Apr 2015 13:07:25 -0400
  4. Subject: [PATCH 33/70] arm64: add ioremap for normal cacheable non-shareable
  5. memory
  6. [context adjustment]
  7. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
  8. Change-Id: Iab7413f182a64bd6ad4707dd1d6254d04f51a3b1
  9. Reviewed-on: http://git.am.freescale.net:8181/35486
  10. Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
  11. Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
  12. Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
  13. Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
  14. ---
  15. arch/arm64/include/asm/io.h | 2 ++
  16. arch/arm64/include/asm/pgtable.h | 2 ++
  17. 2 files changed, 4 insertions(+)
  18. --- a/arch/arm64/include/asm/io.h
  19. +++ b/arch/arm64/include/asm/io.h
  20. @@ -171,6 +171,8 @@ extern void __iomem *ioremap_cache(phys_
  21. #define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
  22. #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
  23. #define ioremap_wt(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
  24. +#define ioremap_cache_ns(addr, size) __ioremap((addr), (size), \
  25. + __pgprot(PROT_NORMAL_NS))
  26. #define iounmap __iounmap
  27. /*
  28. --- a/arch/arm64/include/asm/pgtable.h
  29. +++ b/arch/arm64/include/asm/pgtable.h
  30. @@ -74,6 +74,8 @@ extern void __pgd_error(const char *file
  31. #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
  32. #define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
  33. #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
  34. +#define PROT_NORMAL_NS (PTE_TYPE_PAGE | PTE_AF | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | \
  35. + PTE_ATTRINDX(MT_NORMAL))
  36. #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
  37. #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))