1100-mtd-spi_nor-Disable-Micron-flash-HW-protection.patch 1.2 KB

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  1. From e892dea7229d56b75c46a76b9039f9e179584a91 Mon Sep 17 00:00:00 2001
  2. From: Yunhui Cui <B56489@freescale.com>
  3. Date: Mon, 1 Feb 2016 18:48:49 +0800
  4. Subject: [PATCH 100/113] mtd:spi_nor: Disable Micron flash HW protection
  5. For Micron family ,The status register write enable/disable bit,
  6. provides hardware data protection for the device.
  7. When the enable/disable bit is set to 1, the status register
  8. nonvolatile bits become read-only and the WRITE STATUS REGISTER
  9. operation will not execute.
  10. Signed-off-by: Yunhui Cui <B56489@freescale.com>
  11. ---
  12. drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++
  13. 1 file changed, 9 insertions(+)
  14. --- a/drivers/mtd/spi-nor/spi-nor.c
  15. +++ b/drivers/mtd/spi-nor/spi-nor.c
  16. @@ -39,6 +39,7 @@
  17. #define SPI_NOR_MAX_ID_LEN 6
  18. #define SPI_NOR_MAX_ADDR_WIDTH 4
  19. +#define SPI_NOR_MICRON_WRITE_ENABLE 0x7f
  20. struct flash_info {
  21. char *name;
  22. @@ -1252,6 +1253,14 @@ int spi_nor_scan(struct spi_nor *nor, co
  23. if (ret)
  24. return ret;
  25. + if (JEDEC_MFR(info) == SNOR_MFR_MICRON) {
  26. + ret = read_sr(nor);
  27. + ret &= SPI_NOR_MICRON_WRITE_ENABLE;
  28. +
  29. + write_enable(nor);
  30. + write_sr(nor, ret);
  31. + }
  32. +
  33. if (!mtd->name)
  34. mtd->name = dev_name(dev);
  35. mtd->priv = nor;