0152-lantiq-VPE.patch 5.3 KB

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  1. --- a/arch/mips/Kconfig
  2. +++ b/arch/mips/Kconfig
  3. @@ -2222,6 +2222,12 @@ config MIPS_VPE_LOADER
  4. Includes a loader for loading an elf relocatable object
  5. onto another VPE and running it.
  6. +config IFX_VPE_EXT
  7. + bool "IFX APRP Extensions"
  8. + depends on MIPS_VPE_LOADER
  9. + help
  10. + IFX included extensions in APRP
  11. +
  12. config MIPS_VPE_LOADER_CMP
  13. bool
  14. default "y"
  15. --- a/arch/mips/include/asm/vpe.h
  16. +++ b/arch/mips/include/asm/vpe.h
  17. @@ -127,4 +127,23 @@ void cleanup_tc(struct tc *tc);
  18. int __init vpe_module_init(void);
  19. void __exit vpe_module_exit(void);
  20. +
  21. +/* For the explanation of the APIs please refer the section "MT APRP Kernel
  22. + * Programming" in AR9 SW Architecture Specification
  23. + */
  24. +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags);
  25. +int32_t vpe1_sw_stop(uint32_t flags);
  26. +uint32_t vpe1_get_load_addr(uint32_t flags);
  27. +uint32_t vpe1_get_max_mem(uint32_t flags);
  28. +
  29. +/* Watchdog APIs */
  30. +extern uint32_t vpe1_wdog_ctr;
  31. +extern uint32_t vpe1_wdog_timeout;
  32. +
  33. +unsigned long vpe1_sw_wdog_start(unsigned long);
  34. +unsigned long vpe1_sw_wdog_stop(unsigned long);
  35. +
  36. +typedef int (*VPE_SW_WDOG_RESET)(unsigned long wdog_cleared_ok_count);
  37. +int32_t vpe1_sw_wdog_register_reset_handler(VPE_SW_WDOG_RESET reset_fn);
  38. +
  39. #endif /* _ASM_VPE_H */
  40. --- a/arch/mips/kernel/vpe-mt.c
  41. +++ b/arch/mips/kernel/vpe-mt.c
  42. @@ -29,6 +29,7 @@ int vpe_run(struct vpe *v)
  43. struct vpe_notifications *notifier;
  44. unsigned int vpeflags;
  45. struct tc *t;
  46. + unsigned long physical_memsize = 0L;
  47. /* check we are the Master VPE */
  48. local_irq_save(flags);
  49. @@ -417,6 +418,8 @@ int __init vpe_module_init(void)
  50. }
  51. v->ntcs = hw_tcs - aprp_cpu_index();
  52. + write_tc_c0_tcbind((read_tc_c0_tcbind() &
  53. + ~TCBIND_CURVPE) | 1);
  54. /* add the tc to the list of this vpe's tc's. */
  55. list_add(&t->tc, &v->tc);
  56. @@ -519,3 +522,47 @@ void __exit vpe_module_exit(void)
  57. release_vpe(v);
  58. }
  59. }
  60. +
  61. +#ifdef CONFIG_IFX_VPE_EXT
  62. +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags)
  63. +{
  64. + enum vpe_state state;
  65. + struct vpe *v = get_vpe(tclimit);
  66. + struct vpe_notifications *not;
  67. +
  68. + if (tcmask || flags) {
  69. + pr_warn("Currently tcmask and flags should be 0. Other values are not supported\n");
  70. + return -1;
  71. + }
  72. +
  73. + state = xchg(&v->state, VPE_STATE_INUSE);
  74. + if (state != VPE_STATE_UNUSED) {
  75. + vpe_stop(v);
  76. +
  77. + list_for_each_entry(not, &v->notify, list) {
  78. + not->stop(tclimit);
  79. + }
  80. + }
  81. +
  82. + v->__start = (unsigned long)sw_start_addr;
  83. +
  84. + if (!vpe_run(v)) {
  85. + pr_debug("VPE loader: VPE1 running successfully\n");
  86. + return 0;
  87. + }
  88. + return -1;
  89. +}
  90. +EXPORT_SYMBOL(vpe1_sw_start);
  91. +
  92. +int32_t vpe1_sw_stop(uint32_t flags)
  93. +{
  94. + struct vpe *v = get_vpe(tclimit);
  95. +
  96. + if (!vpe_free(v)) {
  97. + pr_debug("RP Stopped\n");
  98. + return 0;
  99. + } else
  100. + return -1;
  101. +}
  102. +EXPORT_SYMBOL(vpe1_sw_stop);
  103. +#endif
  104. --- a/arch/mips/kernel/vpe.c
  105. +++ b/arch/mips/kernel/vpe.c
  106. @@ -49,6 +49,59 @@ struct vpe_control vpecontrol = {
  107. .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list)
  108. };
  109. +#ifdef CONFIG_IFX_VPE_EXT
  110. +unsigned int vpe1_load_addr;
  111. +
  112. +static int __init load_address(char *str)
  113. +{
  114. + get_option(&str, &vpe1_load_addr);
  115. + return 1;
  116. +}
  117. +__setup("vpe1_load_addr=", load_address);
  118. +
  119. +static unsigned int vpe1_mem;
  120. +static int __init vpe1mem(char *str)
  121. +{
  122. + vpe1_mem = memparse(str, &str);
  123. + return 1;
  124. +}
  125. +__setup("vpe1_mem=", vpe1mem);
  126. +
  127. +uint32_t vpe1_wdog_ctr;
  128. +static int __init wdog_ctr(char *str)
  129. +{
  130. + get_option(&str, &vpe1_wdog_ctr);
  131. + return 1;
  132. +}
  133. +EXPORT_SYMBOL(vpe1_wdog_ctr);
  134. +__setup("vpe1_wdog_ctr_addr=", wdog_ctr);
  135. +
  136. +uint32_t vpe1_wdog_timeout;
  137. +static int __init wdog_timeout(char *str)
  138. +{
  139. + get_option(&str, &vpe1_wdog_timeout);
  140. + return 1;
  141. +}
  142. +EXPORT_SYMBOL(vpe1_wdog_timeout);
  143. +__setup("vpe1_wdog_timeout=", wdog_timeout);
  144. +
  145. +uint32_t vpe1_get_load_addr(uint32_t flags)
  146. +{
  147. + return vpe1_load_addr;
  148. +}
  149. +EXPORT_SYMBOL(vpe1_get_load_addr);
  150. +
  151. +uint32_t vpe1_get_max_mem(uint32_t flags)
  152. +{
  153. + if (!vpe1_mem)
  154. + return P_SIZE;
  155. + else
  156. + return vpe1_mem;
  157. +}
  158. +EXPORT_SYMBOL(vpe1_get_max_mem);
  159. +
  160. +#endif
  161. +
  162. /* get the vpe associated with this minor */
  163. struct vpe *get_vpe(int minor)
  164. {
  165. --- a/arch/mips/lantiq/prom.c
  166. +++ b/arch/mips/lantiq/prom.c
  167. @@ -31,10 +31,14 @@ EXPORT_SYMBOL_GPL(ebu_lock);
  168. */
  169. static struct ltq_soc_info soc_info;
  170. +/* for Multithreading (APRP), vpe.c will use it */
  171. +unsigned long cp0_memsize;
  172. +
  173. const char *get_system_type(void)
  174. {
  175. return soc_info.sys_type;
  176. }
  177. +EXPORT_SYMBOL(ltq_soc_type);
  178. int ltq_soc_type(void)
  179. {
  180. --- a/arch/mips/include/asm/mipsmtregs.h
  181. +++ b/arch/mips/include/asm/mipsmtregs.h
  182. @@ -31,6 +31,9 @@
  183. #define read_c0_vpeconf1() __read_32bit_c0_register($1, 3)
  184. #define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val)
  185. +#define read_c0_vpeopt() __read_32bit_c0_register($1, 7)
  186. +#define write_c0_vpeopt(val) __write_32bit_c0_register($1, 7, val)
  187. +
  188. #define read_c0_tcstatus() __read_32bit_c0_register($2, 1)
  189. #define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val)
  190. @@ -376,6 +379,8 @@ do { \
  191. #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val)
  192. #define read_vpe_c0_vpeconf1() mftc0(1, 3)
  193. #define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val)
  194. +#define read_vpe_c0_vpeopt() mftc0(1, 7)
  195. +#define write_vpe_c0_vpeopt(val) mttc0(1, 7, val)
  196. #define read_vpe_c0_count() mftc0(9, 0)
  197. #define write_vpe_c0_count(val) mttc0(9, 0, val)
  198. #define read_vpe_c0_status() mftc0(12, 0)