0050-MIPS-Lantiq-Fix-cascaded-IRQ-setup.patch 2.3 KB

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  1. From: Felix Fietkau <nbd@nbd.name>
  2. Date: Thu, 19 Jan 2017 12:14:44 +0100
  3. Subject: [PATCH] MIPS: Lantiq: Fix cascaded IRQ setup
  4. With the IRQ stack changes integrated, the XRX200 devices started
  5. emitting a constant stream of kernel messages like this:
  6. [ 565.415310] Spurious IRQ: CAUSE=0x1100c300
  7. This appears to be caused by IP0 firing for some reason without being
  8. handled. Fix this by setting up IP2-6 as a proper chained IRQ handler and
  9. calling do_IRQ for all MIPS CPU interrupts.
  10. Cc: john@phrozen.org
  11. Cc: stable@vger.kernel.org
  12. Signed-off-by: Felix Fietkau <nbd@nbd.name>
  13. ---
  14. --- a/arch/mips/lantiq/irq.c
  15. +++ b/arch/mips/lantiq/irq.c
  16. @@ -272,6 +272,11 @@ static void ltq_hw5_irqdispatch(void)
  17. DEFINE_HWx_IRQDISPATCH(5)
  18. #endif
  19. +static void ltq_hw_irq_handler(struct irq_desc *desc)
  20. +{
  21. + ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
  22. +}
  23. +
  24. #ifdef CONFIG_MIPS_MT_SMP
  25. void __init arch_init_ipiirq(int irq, struct irqaction *action)
  26. {
  27. @@ -316,23 +321,19 @@ static struct irqaction irq_call = {
  28. asmlinkage void plat_irq_dispatch(void)
  29. {
  30. unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  31. - unsigned int i;
  32. + int irq;
  33. - if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
  34. - do_IRQ(MIPS_CPU_TIMER_IRQ);
  35. - goto out;
  36. - } else {
  37. - for (i = 0; i < MAX_IM; i++) {
  38. - if (pending & (CAUSEF_IP2 << i)) {
  39. - ltq_hw_irqdispatch(i);
  40. - goto out;
  41. - }
  42. - }
  43. + if (!pending) {
  44. + spurious_interrupt();
  45. + return;
  46. }
  47. - pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
  48. -out:
  49. - return;
  50. + pending >>= CAUSEB_IP;
  51. + while (pending) {
  52. + irq = fls(pending) - 1;
  53. + do_IRQ(MIPS_CPU_IRQ_BASE + irq);
  54. + pending &= ~BIT(irq);
  55. + }
  56. }
  57. static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
  58. @@ -357,11 +358,6 @@ static const struct irq_domain_ops irq_d
  59. .map = icu_map,
  60. };
  61. -static struct irqaction cascade = {
  62. - .handler = no_action,
  63. - .name = "cascade",
  64. -};
  65. -
  66. int __init icu_of_init(struct device_node *node, struct device_node *parent)
  67. {
  68. struct device_node *eiu_node;
  69. @@ -393,7 +389,7 @@ int __init icu_of_init(struct device_nod
  70. mips_cpu_irq_init();
  71. for (i = 0; i < MAX_IM; i++)
  72. - setup_irq(i + 2, &cascade);
  73. + irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
  74. if (cpu_has_vint) {
  75. pr_info("Setting up vectored interrupts\n");