qcom-ipq8065-r7800.dts 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566
  1. #include "qcom-ipq8065-v1.0.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. model = "Netgear Nighthawk X4S R7800";
  5. compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
  6. memory@0 {
  7. reg = <0x42000000 0x1e000000>;
  8. device_type = "memory";
  9. };
  10. reserved-memory {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. ranges;
  14. rsvd@41200000 {
  15. reg = <0x41200000 0x300000>;
  16. no-map;
  17. };
  18. rsvd@5fe00000 {
  19. reg = <0x5fe00000 0x200000>;
  20. reusable;
  21. };
  22. };
  23. aliases {
  24. serial0 = &uart4;
  25. mdio-gpio0 = &mdio0;
  26. led-boot = &power_white;
  27. led-failsafe = &power_amber;
  28. led-running = &power_white;
  29. led-upgrade = &power_amber;
  30. };
  31. chosen {
  32. linux,stdout-path = "serial0:115200n8";
  33. };
  34. soc {
  35. pinmux@800000 {
  36. button_pins: button_pins {
  37. mux {
  38. pins = "gpio6", "gpio54", "gpio65";
  39. function = "gpio";
  40. drive-strength = <2>;
  41. bias-pull-up;
  42. };
  43. };
  44. i2c4_pins: i2c4_pinmux {
  45. mux {
  46. pins = "gpio12", "gpio13";
  47. function = "gsbi4";
  48. drive-strength = <12>;
  49. bias-disable;
  50. };
  51. };
  52. led_pins: led_pins {
  53. pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
  54. "gpio24","gpio26", "gpio53", "gpio64";
  55. function = "gpio";
  56. drive-strength = <2>;
  57. bias-pull-down;
  58. };
  59. nand_pins: nand_pins {
  60. mux {
  61. pins = "gpio34", "gpio35", "gpio36",
  62. "gpio37", "gpio38", "gpio39",
  63. "gpio40", "gpio41", "gpio42",
  64. "gpio43", "gpio44", "gpio45",
  65. "gpio46", "gpio47";
  66. function = "nand";
  67. drive-strength = <10>;
  68. bias-disable;
  69. };
  70. pullups {
  71. pins = "gpio39";
  72. bias-pull-up;
  73. };
  74. hold {
  75. pins = "gpio40", "gpio41", "gpio42",
  76. "gpio43", "gpio44", "gpio45",
  77. "gpio46", "gpio47";
  78. bias-bus-hold;
  79. };
  80. };
  81. mdio0_pins: mdio0_pins {
  82. mux {
  83. pins = "gpio0", "gpio1";
  84. function = "gpio";
  85. drive-strength = <8>;
  86. bias-disable;
  87. };
  88. clk {
  89. pins = "gpio1";
  90. input-disable;
  91. };
  92. };
  93. rgmii2_pins: rgmii2_pins {
  94. mux {
  95. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
  96. "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
  97. function = "rgmii2";
  98. drive-strength = <8>;
  99. bias-disable;
  100. };
  101. tx {
  102. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
  103. input-disable;
  104. };
  105. };
  106. spi_pins: spi_pins {
  107. mux {
  108. pins = "gpio18", "gpio19", "gpio21";
  109. function = "gsbi5";
  110. bias-pull-down;
  111. };
  112. data {
  113. pins = "gpio18", "gpio19";
  114. drive-strength = <10>;
  115. };
  116. cs {
  117. pins = "gpio20";
  118. drive-strength = <10>;
  119. bias-pull-up;
  120. };
  121. clk {
  122. pins = "gpio21";
  123. drive-strength = <12>;
  124. };
  125. };
  126. spi6_pins: spi6_pins {
  127. mux {
  128. pins = "gpio55", "gpio56", "gpio58";
  129. function = "gsbi6";
  130. bias-pull-down;
  131. };
  132. mosi {
  133. pins = "gpio55";
  134. drive-strength = <12>;
  135. };
  136. miso {
  137. pins = "gpio56";
  138. drive-strength = <14>;
  139. };
  140. cs {
  141. pins = "gpio57";
  142. drive-strength = <12>;
  143. bias-pull-up;
  144. };
  145. clk {
  146. pins = "gpio58";
  147. drive-strength = <12>;
  148. };
  149. reset {
  150. pins = "gpio33";
  151. drive-strength = <10>;
  152. bias-pull-down;
  153. output-high;
  154. };
  155. };
  156. usb0_pwr_en_pins: usb0_pwr_en_pins {
  157. mux {
  158. pins = "gpio15";
  159. function = "gpio";
  160. drive-strength = <12>;
  161. bias-pull-down;
  162. output-high;
  163. };
  164. };
  165. usb1_pwr_en_pins: usb1_pwr_en_pins {
  166. mux {
  167. pins = "gpio16", "gpio68";
  168. function = "gpio";
  169. drive-strength = <12>;
  170. bias-pull-down;
  171. output-high;
  172. };
  173. };
  174. };
  175. gsbi@16300000 {
  176. qcom,mode = <GSBI_PROT_I2C_UART>;
  177. status = "ok";
  178. serial@16340000 {
  179. status = "ok";
  180. };
  181. /*
  182. * The i2c device on gsbi4 should not be enabled.
  183. * On ipq806x designs gsbi4 i2c is meant for exclusive
  184. * RPM usage. Turning this on in kernel manifests as
  185. * i2c failure for the RPM.
  186. */
  187. };
  188. gsbi5: gsbi@1a200000 {
  189. qcom,mode = <GSBI_PROT_SPI>;
  190. status = "ok";
  191. spi5: spi@1a280000 {
  192. status = "ok";
  193. pinctrl-0 = <&spi_pins>;
  194. pinctrl-names = "default";
  195. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  196. flash: m25p80@0 {
  197. compatible = "jedec,spi-nor";
  198. #address-cells = <1>;
  199. #size-cells = <1>;
  200. spi-max-frequency = <50000000>;
  201. reg = <0>;
  202. linux,part-probe = "qcom-smem";
  203. };
  204. };
  205. };
  206. gsbi6: gsbi@16500000 {
  207. qcom,mode = <GSBI_PROT_SPI>;
  208. status = "ok";
  209. spi6: spi@16580000 {
  210. status = "ok";
  211. pinctrl-0 = <&spi6_pins>;
  212. pinctrl-names = "default";
  213. cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
  214. spi-nor@0 {
  215. compatible = "jedec,spi-nor";
  216. reg = <0>;
  217. spi-max-frequency = <6000000>;
  218. };
  219. };
  220. };
  221. sata-phy@1b400000 {
  222. status = "ok";
  223. };
  224. sata@29000000 {
  225. ports-implemented = <0x1>;
  226. status = "ok";
  227. };
  228. phy@100f8800 { /* USB3 port 1 HS phy */
  229. status = "ok";
  230. };
  231. phy@100f8830 { /* USB3 port 1 SS phy */
  232. status = "ok";
  233. };
  234. phy@110f8800 { /* USB3 port 0 HS phy */
  235. status = "ok";
  236. };
  237. phy@110f8830 { /* USB3 port 0 SS phy */
  238. status = "ok";
  239. };
  240. usb30@0 {
  241. status = "ok";
  242. pinctrl-0 = <&usb0_pwr_en_pins>;
  243. pinctrl-names = "default";
  244. };
  245. usb30@1 {
  246. status = "ok";
  247. pinctrl-0 = <&usb1_pwr_en_pins>;
  248. pinctrl-names = "default";
  249. };
  250. pcie0: pci@1b500000 {
  251. status = "ok";
  252. phy-tx0-term-offset = <7>;
  253. };
  254. pcie1: pci@1b700000 {
  255. status = "ok";
  256. phy-tx0-term-offset = <7>;
  257. };
  258. nand@1ac00000 {
  259. status = "ok";
  260. pinctrl-0 = <&nand_pins>;
  261. pinctrl-names = "default";
  262. nand-ecc-strength = <4>;
  263. nand-ecc-step-size = <512>;
  264. nand-bus-width = <8>;
  265. #address-cells = <1>;
  266. #size-cells = <1>;
  267. qcadata@0 {
  268. label = "qcadata";
  269. reg = <0x0000000 0x0c80000>;
  270. read-only;
  271. };
  272. APPSBL@c80000 {
  273. label = "APPSBL";
  274. reg = <0x0c80000 0x0500000>;
  275. read-only;
  276. };
  277. APPSBLENV@1180000 {
  278. label = "APPSBLENV";
  279. reg = <0x1180000 0x0080000>;
  280. read-only;
  281. };
  282. art: art@1200000 {
  283. label = "art";
  284. reg = <0x1200000 0x0140000>;
  285. read-only;
  286. };
  287. artbak: art@1340000 {
  288. label = "artbak";
  289. reg = <0x1340000 0x0140000>;
  290. read-only;
  291. };
  292. kernel@1480000 {
  293. label = "kernel";
  294. reg = <0x1480000 0x0200000>;
  295. };
  296. ubi@1680000 {
  297. label = "ubi";
  298. reg = <0x1680000 0x1E00000>;
  299. };
  300. netgear@3480000 {
  301. label = "netgear";
  302. reg = <0x3480000 0x4480000>;
  303. read-only;
  304. };
  305. reserve@7900000 {
  306. label = "reserve";
  307. reg = <0x7900000 0x0700000>;
  308. read-only;
  309. };
  310. firmware@1480000 {
  311. label = "firmware";
  312. reg = <0x1480000 0x2000000>;
  313. };
  314. };
  315. mdio0: mdio {
  316. compatible = "virtual,mdio-gpio";
  317. #address-cells = <1>;
  318. #size-cells = <0>;
  319. gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
  320. pinctrl-0 = <&mdio0_pins>;
  321. pinctrl-names = "default";
  322. phy0: ethernet-phy@0 {
  323. device_type = "ethernet-phy";
  324. reg = <0>;
  325. qca,ar8327-initvals = <
  326. 0x00004 0x7600000 /* PAD0_MODE */
  327. 0x00008 0x1000000 /* PAD5_MODE */
  328. 0x0000c 0x80 /* PAD6_MODE */
  329. 0x000e4 0xaa545 /* MAC_POWER_SEL */
  330. 0x000e0 0xc74164de /* SGMII_CTRL */
  331. 0x0007c 0x4e /* PORT0_STATUS */
  332. 0x00094 0x4e /* PORT6_STATUS */
  333. 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
  334. 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
  335. 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
  336. 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
  337. 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
  338. 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
  339. 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
  340. 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
  341. 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
  342. 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
  343. 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
  344. 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
  345. 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
  346. 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
  347. >;
  348. qca,ar8327-vlans = <
  349. 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
  350. 0x2 0x21 /* VLAN2 Ports 0/5 */
  351. >;
  352. };
  353. phy4: ethernet-phy@4 {
  354. device_type = "ethernet-phy";
  355. reg = <4>;
  356. qca,ar8327-initvals = <
  357. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  358. 0x0000c 0x80 /* PAD6_MODE */
  359. >;
  360. };
  361. };
  362. gmac1: ethernet@37200000 {
  363. status = "ok";
  364. phy-mode = "rgmii";
  365. qcom,id = <1>;
  366. qcom,phy_mdio_addr = <4>;
  367. qcom,poll_required = <0>;
  368. qcom,rgmii_delay = <1>;
  369. qcom,phy_mii_type = <0>;
  370. qcom,emulation = <0>;
  371. qcom,irq = <255>;
  372. mdiobus = <&mdio0>;
  373. pinctrl-0 = <&rgmii2_pins>;
  374. pinctrl-names = "default";
  375. mtd-mac-address = <&art 6>;
  376. fixed-link {
  377. speed = <1000>;
  378. full-duplex;
  379. };
  380. };
  381. gmac2: ethernet@37400000 {
  382. status = "ok";
  383. phy-mode = "sgmii";
  384. qcom,id = <2>;
  385. qcom,phy_mdio_addr = <0>; /* none */
  386. qcom,poll_required = <0>; /* no polling */
  387. qcom,rgmii_delay = <0>;
  388. qcom,phy_mii_type = <1>;
  389. qcom,emulation = <0>;
  390. qcom,irq = <258>;
  391. mdiobus = <&mdio0>;
  392. mtd-mac-address = <&art 0>;
  393. fixed-link {
  394. speed = <1000>;
  395. full-duplex;
  396. };
  397. };
  398. rpm@108000 {
  399. pinctrl-0 = <&i2c4_pins>;
  400. pinctrl-names = "default";
  401. };
  402. };
  403. gpio-keys {
  404. compatible = "gpio-keys";
  405. pinctrl-0 = <&button_pins>;
  406. pinctrl-names = "default";
  407. wifi {
  408. label = "wifi";
  409. gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  410. linux,code = <KEY_RFKILL>;
  411. debounce-interval = <60>;
  412. wakeup-source;
  413. };
  414. reset {
  415. label = "reset";
  416. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  417. linux,code = <KEY_RESTART>;
  418. debounce-interval = <60>;
  419. wakeup-source;
  420. };
  421. wps {
  422. label = "wps";
  423. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  424. linux,code = <KEY_WPS_BUTTON>;
  425. debounce-interval = <60>;
  426. wakeup-source;
  427. };
  428. };
  429. gpio-leds {
  430. compatible = "gpio-leds";
  431. pinctrl-0 = <&led_pins>;
  432. pinctrl-names = "default";
  433. power_white: power_white {
  434. label = "r7800:white:power";
  435. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  436. default-state = "keep";
  437. };
  438. power_amber: power_amber {
  439. label = "r7800:amber:power";
  440. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  441. };
  442. wan_white {
  443. label = "r7800:white:wan";
  444. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  445. };
  446. wan_amber {
  447. label = "r7800:amber:wan";
  448. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  449. };
  450. usb1 {
  451. label = "r7800:white:usb1";
  452. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  453. };
  454. usb2 {
  455. label = "r7800:white:usb2";
  456. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  457. };
  458. esata {
  459. label = "r7800:white:esata";
  460. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
  461. };
  462. wifi {
  463. label = "r7800:white:wifi";
  464. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
  465. };
  466. wps {
  467. label = "r7800:white:wps";
  468. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  469. };
  470. };
  471. };
  472. &adm_dma {
  473. status = "ok";
  474. };