1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556 |
- From a58c6360b9eb3a2374b0b069ba9ce7baec0f26df Mon Sep 17 00:00:00 2001
- From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
- Date: Thu, 24 Mar 2016 14:24:22 +0100
- Subject: [PATCH 3/3] serial: imx: make sure unhandled irqs are disabled
- MIME-Version: 1.0
- Content-Type: text/plain; charset=UTF-8
- Content-Transfer-Encoding: 8bit
- Make sure that events that are not handled in the irq function don't
- trigger an interrupt.
- When the serial port is operated in DTE mode, the events for DCD and RI
- events are enabled after a system reset by default.
- Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
- Signed-off-by: Petr Štetiar <ynezz@true.cz>
- ---
- drivers/tty/serial/imx.c | 23 ++++++++++++++++++++++-
- 1 file changed, 22 insertions(+), 1 deletion(-)
- --- a/drivers/tty/serial/imx.c
- +++ b/drivers/tty/serial/imx.c
- @@ -1184,11 +1184,32 @@ static int imx_startup(struct uart_port
- temp |= (UCR2_RXEN | UCR2_TXEN);
- if (!sport->have_rtscts)
- temp |= UCR2_IRTS;
- + /*
- + * make sure the edge sensitive RTS-irq is disabled,
- + * we're using RTSD instead.
- + */
- + if (!is_imx1_uart(sport))
- + temp &= ~UCR2_RTSEN;
- writel(temp, sport->port.membase + UCR2);
-
- if (!is_imx1_uart(sport)) {
- temp = readl(sport->port.membase + UCR3);
- - temp |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP;
- +
- + /*
- + * The effect of RI and DCD differs depending on the UFCR_DCEDTE
- + * bit. In DCE mode they control the outputs, in DTE mode they
- + * enable the respective irqs. At least the DCD irq cannot be
- + * cleared on i.MX25 at least, so it's not usable and must be
- + * disabled. I don't have test hardware to check if RI has the
- + * same problem but I consider this likely so it's disabled for
- + * now, too.
- + */
- + temp |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP |
- + UCR3_RI | UCR3_DCD;
- +
- + if (sport->dte_mode)
- + temp &= ~(UCR3_RI | UCR3_DCD);
- +
- writel(temp, sport->port.membase + UCR3);
- }
-
|