imx6qdl-gw553x.dtsi 12 KB

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  1. /*
  2. * Copyright 2016 Gateworks Corporation
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This file is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public
  20. * License along with this file; if not, write to the Free
  21. * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. *
  24. * Or, alternatively,
  25. *
  26. * b) Permission is hereby granted, free of charge, to any person
  27. * obtaining a copy of this software and associated documentation
  28. * files (the "Software"), to deal in the Software without
  29. * restriction, including without limitation the rights to use,
  30. * copy, modify, merge, publish, distribute, sublicense, and/or
  31. * sell copies of the Software, and to permit persons to whom the
  32. * Software is furnished to do so, subject to the following
  33. * conditions:
  34. *
  35. * The above copyright notice and this permission notice shall be
  36. * included in all copies or substantial portions of the Software.
  37. *
  38. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45. * OTHER DEALINGS IN THE SOFTWARE.
  46. */
  47. #include <dt-bindings/gpio/gpio.h>
  48. / {
  49. /* these are used by bootloader for disabling nodes */
  50. aliases {
  51. led0 = &led0;
  52. led1 = &led1;
  53. nand = &gpmi;
  54. usb0 = &usbh1;
  55. usb1 = &usbotg;
  56. };
  57. chosen {
  58. bootargs = "console=ttymxc1,115200";
  59. };
  60. leds {
  61. compatible = "gpio-leds";
  62. pinctrl-names = "default";
  63. pinctrl-0 = <&pinctrl_gpio_leds>;
  64. led0: user1 {
  65. label = "user1";
  66. gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  67. default-state = "on";
  68. linux,default-trigger = "heartbeat";
  69. };
  70. led1: user2 {
  71. label = "user2";
  72. gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
  73. default-state = "off";
  74. };
  75. };
  76. gpio_keys {
  77. compatible = "gpio-keys";
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. user_pb {
  81. label = "user_pb";
  82. gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
  83. linux,code = <256>;
  84. };
  85. };
  86. memory {
  87. reg = <0x10000000 0x20000000>;
  88. };
  89. pps {
  90. compatible = "pps-gpio";
  91. pinctrl-names = "default";
  92. pinctrl-0 = <&pinctrl_pps>;
  93. gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  94. status = "okay";
  95. };
  96. regulators {
  97. compatible = "simple-bus";
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. reg_3p3v: regulator@0 {
  101. compatible = "regulator-fixed";
  102. reg = <0>;
  103. regulator-name = "3P0V";
  104. regulator-min-microvolt = <3300000>;
  105. regulator-max-microvolt = <3300000>;
  106. regulator-always-on;
  107. };
  108. reg_5p0v: regulator@1 {
  109. compatible = "regulator-fixed";
  110. reg = <1>;
  111. regulator-name = "5P0V";
  112. regulator-min-microvolt = <5000000>;
  113. regulator-max-microvolt = <5000000>;
  114. regulator-always-on;
  115. };
  116. reg_usb_otg_vbus: regulator@2 {
  117. compatible = "regulator-fixed";
  118. reg = <2>;
  119. regulator-name = "usb_otg_vbus";
  120. regulator-min-microvolt = <5000000>;
  121. regulator-max-microvolt = <5000000>;
  122. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  123. enable-active-high;
  124. };
  125. };
  126. };
  127. &gpmi {
  128. pinctrl-names = "default";
  129. pinctrl-0 = <&pinctrl_gpmi_nand>;
  130. status = "okay";
  131. };
  132. &hdmi {
  133. pinctrl-names = "default";
  134. pinctrl-0 = <&pinctrl_hdmi>;
  135. ddc-i2c-bus = <&i2c3>;
  136. status = "okay";
  137. };
  138. &i2c1 {
  139. clock-frequency = <100000>;
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&pinctrl_i2c1>;
  142. status = "okay";
  143. eeprom1: eeprom@50 {
  144. compatible = "atmel,24c02";
  145. reg = <0x50>;
  146. pagesize = <16>;
  147. };
  148. eeprom2: eeprom@51 {
  149. compatible = "atmel,24c02";
  150. reg = <0x51>;
  151. pagesize = <16>;
  152. };
  153. eeprom3: eeprom@52 {
  154. compatible = "atmel,24c02";
  155. reg = <0x52>;
  156. pagesize = <16>;
  157. };
  158. eeprom4: eeprom@53 {
  159. compatible = "atmel,24c02";
  160. reg = <0x53>;
  161. pagesize = <16>;
  162. };
  163. gsc: gsc@20 {
  164. compatible = "gw,gsc";
  165. reg = <0x20>;
  166. pinctrl-names = "default";
  167. pinctrl-0 = <&pinctrl_gsc>;
  168. interrupt-parent = <&gpio1>;
  169. interrupts = <4 GPIO_ACTIVE_LOW>;
  170. interrupt-controller;
  171. #interrupt-cells = <1>;
  172. /* GSC watchdog */
  173. watchdog {
  174. compatible = "gw,gsc_wdt";
  175. status = "okay";
  176. };
  177. /* Linux input events from GSC interrupt events */
  178. input {
  179. compatible = "gw,gsc_input";
  180. interrupt-parent = <&gsc>;
  181. interrupts = <0 1 2 5 7>;
  182. interrupt-names = "button", "key-erased", "eeprom-wp", "tamper", "button-held";
  183. status = "okay";
  184. };
  185. };
  186. gsc_gpio: pca9555@23 {
  187. compatible = "nxp,pca9555";
  188. reg = <0x23>;
  189. gpio-controller;
  190. #gpio-cells = <2>;
  191. interrupt-parent = <&gsc>;
  192. interrupts = <4>;
  193. };
  194. gsc_hwmon: hwmon@29 {
  195. compatible = "gw,gsc_hwmon";
  196. reg = <0x29>;
  197. };
  198. gsc_rtc: ds1672@68 {
  199. compatible = "dallas,ds1672";
  200. reg = <0x68>;
  201. };
  202. };
  203. &i2c2 {
  204. clock-frequency = <100000>;
  205. pinctrl-names = "default";
  206. pinctrl-0 = <&pinctrl_i2c2>;
  207. status = "okay";
  208. /* LSM9DS1 magnetic sensor */
  209. lsm9ds1-m@0x1c {
  210. compatible = "st,lsm9ds1-mag";
  211. reg = <0x1C>;
  212. pinctrl-names = "default";
  213. pinctrl-0 = <&pinctrl_imu_mag>;
  214. gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* IRQ */
  215. rot-matrix = /bits/ 16 <(1) (0) (0)
  216. (0) (1) (0)
  217. (0) (0) (1)>;
  218. poll-interval = <100>;
  219. min-interval = <13>;
  220. fs-range = <0>;
  221. };
  222. /* LSM9DS1 accelerometer/gyroscope sensor */
  223. lsm9ds1-ag@0x6a {
  224. compatible = "st,lsm9ds1-acc-gyr";
  225. reg = <0x6A>;
  226. pinctrl-names = "default";
  227. pinctrl-0 = <&pinctrl_imu_acc>;
  228. gpios = <&gpio7 13 GPIO_ACTIVE_LOW>, /* INT1 */
  229. <&gpio4 5 GPIO_ACTIVE_LOW>; /* INT2 */
  230. rot-matrix = /bits/ 16 <(1) (0) (0)
  231. (0) (1) (0)
  232. (0) (0) (1)>;
  233. g-poll-interval = <100>;
  234. g-min-interval = <2>;
  235. g-fs-range = <0>;
  236. x-poll-interval = <100>;
  237. x-min-interval = <1>;
  238. x-fs-range = <0>;
  239. aa-filter-bw = <0>;
  240. };
  241. };
  242. &i2c3 {
  243. clock-frequency = <100000>;
  244. pinctrl-names = "default";
  245. pinctrl-0 = <&pinctrl_i2c3>;
  246. status = "okay";
  247. };
  248. &pcie {
  249. pinctrl-names = "default";
  250. pinctrl-0 = <&pinctrl_pcie>;
  251. reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
  252. status = "okay";
  253. };
  254. &pwm2 {
  255. pinctrl-names = "default";
  256. pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
  257. status = "disabled";
  258. };
  259. &pwm3 {
  260. pinctrl-names = "default";
  261. pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
  262. status = "disabled";
  263. };
  264. &pwm4 {
  265. pinctrl-names = "default";
  266. pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
  267. status = "disabled";
  268. };
  269. &uart2 {
  270. pinctrl-names = "default";
  271. pinctrl-0 = <&pinctrl_uart2>;
  272. status = "okay";
  273. };
  274. &uart3 {
  275. pinctrl-names = "default";
  276. pinctrl-0 = <&pinctrl_uart3>;
  277. status = "okay";
  278. };
  279. &uart4 {
  280. pinctrl-names = "default";
  281. pinctrl-0 = <&pinctrl_uart4>;
  282. status = "okay";
  283. };
  284. &uart5 {
  285. pinctrl-names = "default";
  286. pinctrl-0 = <&pinctrl_uart5>;
  287. status = "okay";
  288. };
  289. &usbh1 {
  290. status = "okay";
  291. };
  292. &usbotg {
  293. vbus-supply = <&reg_usb_otg_vbus>;
  294. pinctrl-names = "default";
  295. pinctrl-0 = <&pinctrl_usbotg>;
  296. disable-over-current;
  297. status = "okay";
  298. };
  299. &usdhc3 {
  300. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  301. pinctrl-0 = <&pinctrl_usdhc3>;
  302. pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
  303. pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
  304. cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
  305. vmmc-supply = <&reg_3p3v>;
  306. no-1-8-v; /* firmware will remove if board revision supports */
  307. status = "okay";
  308. };
  309. &wdog1 {
  310. pinctrl-names = "default";
  311. pinctrl-0 = <&pinctrl_wdog>;
  312. fsl,ext-reset-output;
  313. };
  314. &iomuxc {
  315. imx6qdl-gw553x {
  316. pinctrl_gpmi_nand: gpminandgrp {
  317. fsl,pins = <
  318. MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
  319. MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
  320. MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
  321. MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
  322. MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
  323. MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
  324. MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
  325. MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
  326. MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
  327. MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
  328. MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
  329. MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
  330. MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
  331. MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
  332. MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
  333. >;
  334. };
  335. pinctrl_gsc: gscgrp {
  336. fsl,pins = <
  337. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
  338. >;
  339. };
  340. pinctrl_hdmi: hdmigrp {
  341. fsl,pins = <
  342. MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
  343. >;
  344. };
  345. pinctrl_i2c1: i2c1grp {
  346. fsl,pins = <
  347. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  348. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  349. >;
  350. };
  351. pinctrl_i2c2: i2c2grp {
  352. fsl,pins = <
  353. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  354. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  355. >;
  356. };
  357. pinctrl_i2c3: i2c3grp {
  358. fsl,pins = <
  359. MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
  360. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  361. >;
  362. };
  363. pinctrl_imu_mag: gpioimxmaggrp {
  364. fsl,pins = <
  365. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 /* IRQ */
  366. MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* data ready */
  367. >;
  368. };
  369. pinctrl_imu_acc: gpioimxaccgrp {
  370. fsl,pins = <
  371. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 /* INT1 */
  372. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 /* INT2 */
  373. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* Data enable */
  374. >;
  375. };
  376. pinctrl_gpio_leds: gpioledsgrp {
  377. fsl,pins = <
  378. MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
  379. MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
  380. >;
  381. };
  382. pinctrl_pcie: pciegrp {
  383. fsl,pins = <
  384. MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
  385. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
  386. >;
  387. };
  388. pinctrl_pps: ppsgrp {
  389. fsl,pins = <
  390. MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
  391. >;
  392. };
  393. pinctrl_pwm2: pwm2grp {
  394. fsl,pins = <
  395. MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
  396. >;
  397. };
  398. pinctrl_pwm3: pwm3grp {
  399. fsl,pins = <
  400. MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
  401. >;
  402. };
  403. pinctrl_pwm4: pwm4grp {
  404. fsl,pins = <
  405. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  406. >;
  407. };
  408. pinctrl_uart2: uart2grp {
  409. fsl,pins = <
  410. MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
  411. MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
  412. >;
  413. };
  414. pinctrl_uart3: uart3grp {
  415. fsl,pins = <
  416. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  417. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  418. >;
  419. };
  420. pinctrl_uart4: uart4grp {
  421. fsl,pins = <
  422. MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  423. MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  424. >;
  425. };
  426. pinctrl_uart5: uart5grp {
  427. fsl,pins = <
  428. MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
  429. MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
  430. >;
  431. };
  432. pinctrl_usbotg: usbotggrp {
  433. fsl,pins = <
  434. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  435. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
  436. >;
  437. };
  438. pinctrl_usdhc3: usdhc3grp {
  439. fsl,pins = <
  440. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  441. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  442. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  443. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  444. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  445. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  446. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
  447. MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
  448. >;
  449. };
  450. pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
  451. fsl,pins = <
  452. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
  453. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
  454. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
  455. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
  456. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
  457. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
  458. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
  459. MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
  460. >;
  461. };
  462. pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
  463. fsl,pins = <
  464. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
  465. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
  466. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
  467. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
  468. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
  469. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
  470. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
  471. MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
  472. >;
  473. };
  474. pinctrl_wdog: wdoggrp {
  475. fsl,pins = <
  476. MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
  477. >;
  478. };
  479. };
  480. };