Home Explore Help
Register Sign In
wareck
/
openwrt_lede
1
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Tree: 488fc98adf
Branches Tags
openwrt_lede
/
target
/
linux
/
brcm63xx
/
patches-4.4
/
340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch

340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch 1.9 KB
History Raw

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455 
  1. From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
    2. 

  2. From: Jonas Gorski <jogo@openwrt.org>
    3. 

  3. Date: Sun, 8 Dec 2013 03:22:40 +0100
    4. 

  4. Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
    5. 

  5. 

  6. ---
    7. 

  7.  arch/mips/bcm63xx/reset.c                       | 3 ++-
    8. 

  8.  arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
    9. 

  9.  arch/mips/pci/pci-bcm63xx.c                     | 4 ++++
    10. 

  10.  3 files changed, 11 insertions(+), 1 deletion(-)
    11. 

  11. 

  12. --- a/arch/mips/bcm63xx/reset.c
    13. 

  13. +++ b/arch/mips/bcm63xx/reset.c
    14. 

  14. @@ -136,7 +136,8 @@
    15. 

  15.  #define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
    16. 

  16.  #define BCM63268_RESET_MPI	0
    17. 

  17.  #define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
    18. 

  18. -				 SOFTRESET_63268_PCIE_CORE_MASK)
    19. 

  19. +				 SOFTRESET_63268_PCIE_CORE_MASK | \
    20. 

  20. +				 SOFTRESET_63268_PCIE_HARD_MASK)
    21. 

  21.  #define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
    22. 

  22.  
    23. 

  23.  /*
    24. 

  24. --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
    25. 

  25. +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
    26. 

  26. @@ -45,6 +45,11 @@
    27. 

  27.  #define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
    28. 

  28.  					BCM_PCIE_MEM_SIZE_6328 - 1)
    29. 

  29.  
    30. 

  30. +#define BCM_PCIE_MEM_BASE_PA_63268	0x11000000
    31. 

  31. +#define BCM_PCIE_MEM_SIZE_63268		(15 * 1024 * 1024)
    32. 

  32. +#define BCM_PCIE_MEM_END_PA_63268	(BCM_PCIE_MEM_BASE_PA_63268 +	\
    33. 

  33. +					BCM_PCIE_MEM_SIZE_63268 - 1)
    34. 

  34. +
    35. 

  35.  /*
    36. 

  36.   * Internal registers are accessed through KSEG3
    37. 

  37.   */
    38. 

  38. --- a/arch/mips/pci/pci-bcm63xx.c
    39. 

  39. +++ b/arch/mips/pci/pci-bcm63xx.c
    40. 

  40. @@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
    41. 

  41.  	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
    42. 

  42.  		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
    43. 

  43.  		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
    44. 

  44. +	} else if (BCMCPU_IS_63268()) {
    45. 

  45. +		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
    46. 

  46. +		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
    47. 

  47.  	}
    48. 

  48.  
    49. 

  49.  	switch (bcm63xx_get_cpu_id()) {
    50. 

  50.  	case BCM6328_CPU_ID:
    51. 

  51.  	case BCM6362_CPU_ID:
    52. 

  52. +	case BCM63268_CPU_ID:
    53. 

  53.  		return bcm63xx_register_pcie();
    54. 

  54.  	case BCM3368_CPU_ID:
    55. 

  55.  	case BCM6348_CPU_ID:
    56.