0580-clk-bcm2835-Fix-fixed_divider-of-pllh_aux.patch 991 B

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  1. From 514dc56068291b52b6f8bb2fe29d8755d6126283 Mon Sep 17 00:00:00 2001
  2. From: Boris Brezillon <boris.brezillon@free-electrons.com>
  3. Date: Tue, 22 Nov 2016 12:45:28 -0800
  4. Subject: [PATCH] clk: bcm2835: Fix ->fixed_divider of pllh_aux
  5. There is no fixed divider on pllh_aux.
  6. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
  7. Signed-off-by: Eric Anholt <eric@anholt.net>
  8. Reviewed-by: Eric Anholt <eric@anholt.net>
  9. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  10. (cherry picked from commit f2a46926aba1f0c33944901d2420a6a887455ddc)
  11. ---
  12. drivers/clk/bcm/clk-bcm2835.c | 2 +-
  13. 1 file changed, 1 insertion(+), 1 deletion(-)
  14. --- a/drivers/clk/bcm/clk-bcm2835.c
  15. +++ b/drivers/clk/bcm/clk-bcm2835.c
  16. @@ -1663,7 +1663,7 @@ static const struct bcm2835_clk_desc clk
  17. .a2w_reg = A2W_PLLH_AUX,
  18. .load_mask = CM_PLLH_LOADAUX,
  19. .hold_mask = 0,
  20. - .fixed_divider = 10),
  21. + .fixed_divider = 1),
  22. [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
  23. .name = "pllh_pix",
  24. .source_pll = "pllh",