123456789101112131415161718192021222324252627 |
- From 514dc56068291b52b6f8bb2fe29d8755d6126283 Mon Sep 17 00:00:00 2001
- From: Boris Brezillon <boris.brezillon@free-electrons.com>
- Date: Tue, 22 Nov 2016 12:45:28 -0800
- Subject: [PATCH] clk: bcm2835: Fix ->fixed_divider of pllh_aux
- There is no fixed divider on pllh_aux.
- Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
- Signed-off-by: Eric Anholt <eric@anholt.net>
- Reviewed-by: Eric Anholt <eric@anholt.net>
- Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
- (cherry picked from commit f2a46926aba1f0c33944901d2420a6a887455ddc)
- ---
- drivers/clk/bcm/clk-bcm2835.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
- --- a/drivers/clk/bcm/clk-bcm2835.c
- +++ b/drivers/clk/bcm/clk-bcm2835.c
- @@ -1663,7 +1663,7 @@ static const struct bcm2835_clk_desc clk
- .a2w_reg = A2W_PLLH_AUX,
- .load_mask = CM_PLLH_LOADAUX,
- .hold_mask = 0,
- - .fixed_divider = 10),
- + .fixed_divider = 1),
- [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
- .name = "pllh_pix",
- .source_pll = "pllh",
|