040-gcc_bug_49696.patch 2.5 KB

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  1. --- a/gcc/config/mips/sync.md
  2. +++ b/gcc/config/mips/sync.md
  3. @@ -136,7 +136,7 @@
  4. [(match_operand:SI 1 "register_operand" "d")
  5. (match_operand:SI 2 "register_operand" "d")
  6. (atomic_hiqi_op:SI (match_dup 0)
  7. - (match_operand:SI 3 "register_operand" "dJ"))]
  8. + (match_operand:SI 3 "reg_or_0_operand" "dJ"))]
  9. UNSPEC_SYNC_OLD_OP_12))
  10. (clobber (match_scratch:SI 4 "=&d"))]
  11. "GENERATE_LL_SC"
  12. @@ -177,7 +177,7 @@
  13. [(match_operand:SI 2 "register_operand" "d")
  14. (match_operand:SI 3 "register_operand" "d")
  15. (atomic_hiqi_op:SI (match_dup 0)
  16. - (match_operand:SI 4 "register_operand" "dJ"))]
  17. + (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
  18. UNSPEC_SYNC_OLD_OP_12))
  19. (clobber (match_scratch:SI 5 "=&d"))]
  20. "GENERATE_LL_SC"
  21. @@ -218,7 +218,7 @@
  22. (match_operand:SI 2 "register_operand" "d")
  23. (match_operand:SI 3 "register_operand" "d")
  24. (atomic_hiqi_op:SI (match_dup 0)
  25. - (match_operand:SI 4 "register_operand" "dJ"))]
  26. + (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
  27. UNSPEC_SYNC_NEW_OP_12))
  28. (set (match_dup 1)
  29. (unspec_volatile:SI
  30. @@ -259,7 +259,7 @@
  31. [(match_operand:SI 1 "register_operand" "d")
  32. (match_operand:SI 2 "register_operand" "d")
  33. (match_dup 0)
  34. - (match_operand:SI 3 "register_operand" "dJ")]
  35. + (match_operand:SI 3 "reg_or_0_operand" "dJ")]
  36. UNSPEC_SYNC_OLD_OP_12))
  37. (clobber (match_scratch:SI 4 "=&d"))]
  38. "GENERATE_LL_SC"
  39. @@ -298,7 +298,7 @@
  40. (unspec_volatile:SI
  41. [(match_operand:SI 2 "register_operand" "d")
  42. (match_operand:SI 3 "register_operand" "d")
  43. - (match_operand:SI 4 "register_operand" "dJ")]
  44. + (match_operand:SI 4 "reg_or_0_operand" "dJ")]
  45. UNSPEC_SYNC_OLD_OP_12))
  46. (clobber (match_scratch:SI 5 "=&d"))]
  47. "GENERATE_LL_SC"
  48. @@ -337,7 +337,7 @@
  49. [(match_operand:SI 1 "memory_operand" "+R")
  50. (match_operand:SI 2 "register_operand" "d")
  51. (match_operand:SI 3 "register_operand" "d")
  52. - (match_operand:SI 4 "register_operand" "dJ")]
  53. + (match_operand:SI 4 "reg_or_0_operand" "dJ")]
  54. UNSPEC_SYNC_NEW_OP_12))
  55. (set (match_dup 1)
  56. (unspec_volatile:SI
  57. @@ -546,7 +546,7 @@
  58. (set (match_dup 1)
  59. (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d")
  60. (match_operand:SI 3 "register_operand" "d")
  61. - (match_operand:SI 4 "arith_operand" "dJ")]
  62. + (match_operand:SI 4 "reg_or_0_operand" "dJ")]
  63. UNSPEC_SYNC_EXCHANGE_12))]
  64. "GENERATE_LL_SC"
  65. { return mips_output_sync_loop (insn, operands); }