999-pci-reset.patch 905 B

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  1. --- a/arch/mips/ralink/reset.c
  2. +++ b/arch/mips/ralink/reset.c
  3. @@ -11,6 +11,7 @@
  4. #include <linux/pm.h>
  5. #include <linux/io.h>
  6. #include <linux/of.h>
  7. +#include <linux/delay.h>
  8. #include <linux/reset-controller.h>
  9. #include <asm/reboot.h>
  10. @@ -18,8 +19,10 @@
  11. #include <asm/mach-ralink/ralink_regs.h>
  12. /* Reset Control */
  13. -#define SYSC_REG_RESET_CTRL 0x034
  14. -#define RSTCTL_RESET_SYSTEM BIT(0)
  15. +#define SYSC_REG_RESET_CTRL 0x034
  16. +
  17. +#define RSTCTL_RESET_PCI BIT(26)
  18. +#define RSTCTL_RESET_SYSTEM BIT(0)
  19. static int ralink_assert_device(struct reset_controller_dev *rcdev,
  20. unsigned long id)
  21. @@ -83,6 +86,11 @@ void ralink_rst_init(void)
  22. static void ralink_restart(char *command)
  23. {
  24. + if (IS_ENABLED(CONFIG_PCI)) {
  25. + rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
  26. + mdelay(50);
  27. + }
  28. +
  29. local_irq_disable();
  30. rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
  31. unreachable();