511-board_V2500V.patch 3.1 KB

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  1. --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
  2. +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
  3. @@ -720,6 +720,27 @@ static struct board_info __initdata boar
  4. .ext_irq = 2,
  5. },
  6. };
  7. +
  8. +static struct board_info __initdata board_V2500V_BB = {
  9. + .name = "V2500V_BB",
  10. + .expected_cpu_id = 0x6348,
  11. +
  12. + .has_uart0 = 1,
  13. + .has_enet0 = 1,
  14. + .has_enet1 = 1,
  15. + .has_pci = 1,
  16. +
  17. + .enet0 = {
  18. + .has_phy = 1,
  19. + .use_internal_phy = 1,
  20. + },
  21. + .enet1 = {
  22. + .has_phy = 1,
  23. + .phy_id = 0,
  24. + .force_speed_100 = 1,
  25. + .force_duplex_full = 1,
  26. + },
  27. +};
  28. #endif /* CONFIG_BCM63XX_CPU_6348 */
  29. /*
  30. @@ -1052,6 +1073,7 @@ static const struct board_info __initcon
  31. &board_96348_D4PW,
  32. &board_spw500v,
  33. &board_96348sv,
  34. + &board_V2500V_BB,
  35. #endif
  36. #ifdef CONFIG_BCM63XX_CPU_6358
  37. @@ -1091,6 +1113,7 @@ static struct of_device_id const bcm963x
  38. { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
  39. { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
  40. { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
  41. + { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
  42. { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
  43. { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
  44. { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
  45. @@ -1150,6 +1173,22 @@ void __init board_bcm963xx_init(void)
  46. val &= MPI_CSBASE_BASE_MASK;
  47. }
  48. boot_addr = (u8 *)KSEG1ADDR(val);
  49. + printk(KERN_INFO PFX "Boot address 0x%08x\n",(unsigned int)boot_addr);
  50. +
  51. + /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
  52. + /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
  53. + /* Loading firmware from the CFE Prompt always loads to Bank 0 */
  54. + /* Do an early check of CFE and then select bank 0 */
  55. +
  56. + if (boot_addr == (u8 *)0xbf800000) {
  57. + u8 *tmp_boot_addr = (u8*)0xbfc00000;
  58. +
  59. + bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
  60. + if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
  61. + printk(KERN_INFO PFX "V2500V: nvram bank 0\n");
  62. + boot_addr = tmp_boot_addr;
  63. + }
  64. + }
  65. /* dump cfe version */
  66. cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
  67. --- a/arch/mips/bcm63xx/dev-flash.c
  68. +++ b/arch/mips/bcm63xx/dev-flash.c
  69. @@ -20,6 +20,7 @@
  70. #include <linux/spi/spi.h>
  71. #include <linux/spi/flash.h>
  72. +#include <bcm63xx_board.h>
  73. #include <bcm63xx_cpu.h>
  74. #include <bcm63xx_dev_flash.h>
  75. #include <bcm63xx_dev_hsspi.h>
  76. @@ -234,6 +235,13 @@ int __init bcm63xx_flash_register(int nu
  77. val = bcm_mpi_readl(MPI_CSBASE_REG(0));
  78. val &= MPI_CSBASE_BASE_MASK;
  79. + /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
  80. + /* Loading from CFE always uses Bank 0 */
  81. + if (!strcmp(board_get_name(), "V2500V_BB")) {
  82. + pr_info("V2500V: Start in Bank 0\n");
  83. + val = val + 0x400000; // Select Bank 0 start address
  84. + }
  85. +
  86. mtd_resources[0].start = val;
  87. mtd_resources[0].end = 0x1FFFFFFF;
  88. }