bcm6368.dtsi 2.0 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "brcm,bcm6368";
  5. aliases {
  6. pflash = &pflash;
  7. gpio0 = &gpio0;
  8. gpio1 = &gpio1;
  9. };
  10. cpus {
  11. #address-cells = <1>;
  12. #size-cells = <0>;
  13. cpu@0 {
  14. compatible = "brcm,bmips4350", "mips,mips4Kc";
  15. device_type = "cpu";
  16. reg = <0>;
  17. };
  18. cpu@1 {
  19. compatible = "brcm,bmips4350", "mips,mips4Kc";
  20. device_type = "cpu";
  21. reg = <1>;
  22. };
  23. };
  24. cpu_intc: interrupt-controller {
  25. #address-cells = <0>;
  26. compatible = "mti,cpu-interrupt-controller";
  27. interrupt-controller;
  28. #interrupt-cells = <1>;
  29. };
  30. memory { device_type = "memory"; reg = <0 0>; };
  31. ubus@10000000 {
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. ranges;
  35. compatible = "simple-bus";
  36. ext_intc0: interrupt-controller@10000018 {
  37. compatible = "brcm,bcm6345-ext-intc";
  38. reg = <0x10000018 0x4>;
  39. interrupt-controller;
  40. #interrupt-cells = <2>;
  41. interrupt-parent = <&periph_intc>;
  42. interrupts = <20>, <21>, <22>, <23>;
  43. };
  44. ext_intc1: interrupt-controller@1000001c {
  45. compatible = "brcm,bcm6345-ext-intc";
  46. reg = <0x1000001c 0x4>;
  47. interrupt-controller;
  48. #interrupt-cells = <2>;
  49. interrupt-parent = <&periph_intc>;
  50. interrupts = <24>, <25>;
  51. };
  52. periph_intc: interrupt-controller@10000020 {
  53. compatible = "brcm,bcm6345-periph-intc";
  54. reg = <0x10000020 0x10>,
  55. <0x10000030 0x10>;
  56. interrupt-controller;
  57. #interrupt-cells = <1>;
  58. interrupt-parent = <&cpu_intc>;
  59. interrupts = <2>, <3>;
  60. };
  61. gpio1: gpio-controller@10000080 {
  62. compatible = "brcm,bcm6345-gpio";
  63. reg = <0x10000080 4>, <0x10000088 4>;
  64. gpio-controller;
  65. #gpio-cells = <2>;
  66. ngpios = <6>;
  67. };
  68. gpio0: gpio-controller@10000084 {
  69. compatible = "brcm,bcm6345-gpio";
  70. reg = <0x10000084 4>, <0x1000008c 4>;
  71. gpio-controller;
  72. #gpio-cells = <2>;
  73. };
  74. };
  75. pflash: nor@18000000 {
  76. compatible = "cfi-flash";
  77. reg = <0x18000000 0x2000000>;
  78. bank-width = <2>;
  79. #address-cells = <1>;
  80. #size-cells = <1>;
  81. status = "disabled";
  82. };
  83. };