0007-MIPS-ralink-add-support-for-MT7620n.patch 2.1 KB

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  1. From efc0f99cebcab21dbabcc634b9dbb963bbbbcab8 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Sun, 27 Jul 2014 09:23:36 +0100
  4. Subject: [PATCH 07/57] MIPS: ralink: add support for MT7620n
  5. This is the small version of MT7620a.
  6. Signed-off-by: John Crispin <blogic@openwrt.org>
  7. ---
  8. arch/mips/include/asm/mach-ralink/mt7620.h | 7 ++-----
  9. arch/mips/ralink/mt7620.c | 19 ++++++++++++-------
  10. 2 files changed, 14 insertions(+), 12 deletions(-)
  11. --- a/arch/mips/include/asm/mach-ralink/mt7620.h
  12. +++ b/arch/mips/include/asm/mach-ralink/mt7620.h
  13. @@ -25,11 +25,8 @@
  14. #define SYSC_REG_CPLL_CONFIG0 0x54
  15. #define SYSC_REG_CPLL_CONFIG1 0x58
  16. -#define MT7620N_CHIP_NAME0 0x33365452
  17. -#define MT7620N_CHIP_NAME1 0x20203235
  18. -
  19. -#define MT7620A_CHIP_NAME0 0x3637544d
  20. -#define MT7620A_CHIP_NAME1 0x20203032
  21. +#define MT7620_CHIP_NAME0 0x3637544d
  22. +#define MT7620_CHIP_NAME1 0x20203032
  23. #define SYSCFG0_XTAL_FREQ_SEL BIT(6)
  24. --- a/arch/mips/ralink/mt7620.c
  25. +++ b/arch/mips/ralink/mt7620.c
  26. @@ -357,22 +357,27 @@ void prom_soc_init(struct ralink_soc_inf
  27. u32 cfg0;
  28. u32 pmu0;
  29. u32 pmu1;
  30. + u32 bga;
  31. n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
  32. n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
  33. + rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
  34. + bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
  35. - if (n0 == MT7620N_CHIP_NAME0 && n1 == MT7620N_CHIP_NAME1) {
  36. - name = "MT7620N";
  37. - soc_info->compatible = "ralink,mt7620n-soc";
  38. - } else if (n0 == MT7620A_CHIP_NAME0 && n1 == MT7620A_CHIP_NAME1) {
  39. + if (n0 != MT7620_CHIP_NAME0 || n1 != MT7620_CHIP_NAME1)
  40. + panic("mt7620: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
  41. +
  42. + if (bga) {
  43. name = "MT7620A";
  44. soc_info->compatible = "ralink,mt7620a-soc";
  45. } else {
  46. - panic("mt7620: unknown SoC, n0:%08x n1:%08x", n0, n1);
  47. + name = "MT7620N";
  48. + soc_info->compatible = "ralink,mt7620n-soc";
  49. +#ifdef CONFIG_PCI
  50. + panic("mt7620n is only supported for non pci kernels");
  51. +#endif
  52. }
  53. - rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
  54. -
  55. snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
  56. "Ralink %s ver:%u eco:%u",
  57. name,