rt3883.dtsi 6.8 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt3883-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips74Kc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. aliases {
  14. spi0 = &spi0;
  15. };
  16. cpuintc: cpuintc@0 {
  17. #address-cells = <0>;
  18. #interrupt-cells = <1>;
  19. interrupt-controller;
  20. compatible = "mti,cpu-interrupt-controller";
  21. };
  22. palmbus@10000000 {
  23. compatible = "palmbus";
  24. reg = <0x10000000 0x200000>;
  25. ranges = <0x0 0x10000000 0x1FFFFF>;
  26. #address-cells = <1>;
  27. #size-cells = <1>;
  28. sysc@0 {
  29. compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
  30. reg = <0x0 0x100>;
  31. };
  32. timer@100 {
  33. compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
  34. reg = <0x100 0x20>;
  35. interrupt-parent = <&intc>;
  36. interrupts = <1>;
  37. };
  38. watchdog@120 {
  39. compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
  40. reg = <0x120 0x10>;
  41. resets = <&rstctrl 8>;
  42. reset-names = "wdt";
  43. interrupt-parent = <&intc>;
  44. interrupts = <1>;
  45. };
  46. intc: intc@200 {
  47. compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
  48. reg = <0x200 0x100>;
  49. resets = <&rstctrl 19>;
  50. reset-names = "intc";
  51. interrupt-controller;
  52. #interrupt-cells = <1>;
  53. interrupt-parent = <&cpuintc>;
  54. interrupts = <2>;
  55. };
  56. memc@300 {
  57. compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
  58. reg = <0x300 0x100>;
  59. resets = <&rstctrl 20>;
  60. reset-names = "mc";
  61. interrupt-parent = <&intc>;
  62. interrupts = <3>;
  63. };
  64. uart@500 {
  65. compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
  66. reg = <0x500 0x100>;
  67. resets = <&rstctrl 12>;
  68. reset-names = "uart";
  69. interrupt-parent = <&intc>;
  70. interrupts = <5>;
  71. reg-shift = <2>;
  72. status = "disabled";
  73. };
  74. gpio0: gpio@600 {
  75. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  76. reg = <0x600 0x34>;
  77. resets = <&rstctrl 13>;
  78. reset-names = "pio";
  79. interrupt-parent = <&intc>;
  80. interrupts = <6>;
  81. gpio-controller;
  82. #gpio-cells = <2>;
  83. ralink,gpio-base = <0>;
  84. ralink,num-gpios = <24>;
  85. ralink,register-map = [ 00 04 08 0c
  86. 20 24 28 2c
  87. 30 34 ];
  88. };
  89. gpio1: gpio@638 {
  90. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  91. reg = <0x638 0x24>;
  92. gpio-controller;
  93. #gpio-cells = <2>;
  94. ralink,gpio-base = <24>;
  95. ralink,num-gpios = <16>;
  96. ralink,register-map = [ 00 04 08 0c
  97. 10 14 18 1c
  98. 20 24 ];
  99. status = "disabled";
  100. };
  101. gpio2: gpio@660 {
  102. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  103. reg = <0x660 0x24>;
  104. gpio-controller;
  105. #gpio-cells = <2>;
  106. ralink,gpio-base = <40>;
  107. ralink,num-gpios = <32>;
  108. ralink,register-map = [ 00 04 08 0c
  109. 10 14 18 1c
  110. 20 24 ];
  111. status = "disabled";
  112. };
  113. gpio3: gpio@688 {
  114. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  115. reg = <0x688 0x24>;
  116. gpio-controller;
  117. #gpio-cells = <2>;
  118. ralink,gpio-base = <72>;
  119. ralink,num-gpios = <24>;
  120. ralink,register-map = [ 00 04 08 0c
  121. 10 14 18 1c
  122. 20 24 ];
  123. status = "disabled";
  124. };
  125. spi0: spi@b00 {
  126. compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
  127. reg = <0xb00 0x100>;
  128. #address-cells = <1>;
  129. #size-cells = <0>;
  130. resets = <&rstctrl 18>;
  131. reset-names = "spi";
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&spi_pins>;
  134. status = "disabled";
  135. };
  136. uartlite@c00 {
  137. compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
  138. reg = <0xc00 0x100>;
  139. resets = <&rstctrl 19>;
  140. reset-names = "uartl";
  141. interrupt-parent = <&intc>;
  142. interrupts = <12>;
  143. reg-shift = <2>;
  144. pinctrl-names = "default";
  145. pinctrl-0 = <&uartlite_pins>;
  146. };
  147. };
  148. pinctrl {
  149. compatible = "ralink,rt2880-pinmux";
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&state_default>;
  152. state_default: pinctrl0 {
  153. };
  154. spi_pins: spi {
  155. spi {
  156. ralink,group = "spi";
  157. ralink,function = "spi";
  158. };
  159. };
  160. uartlite_pins: uartlite {
  161. uart {
  162. ralink,group = "uartlite";
  163. ralink,function = "uartlite";
  164. };
  165. };
  166. };
  167. ethernet@10100000 {
  168. compatible = "ralink,rt3883-eth";
  169. reg = <0x10100000 10000>;
  170. resets = <&rstctrl 21>;
  171. reset-names = "fe";
  172. interrupt-parent = <&cpuintc>;
  173. interrupts = <5>;
  174. port@0 {
  175. compatible = "ralink,rt3883-port", "ralink,eth-port";
  176. reg = <0>;
  177. };
  178. mdio-bus {
  179. #address-cells = <1>;
  180. #size-cells = <0>;
  181. status = "disabled";
  182. };
  183. };
  184. rstctrl: rstctrl {
  185. compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
  186. #reset-cells = <1>;
  187. };
  188. pci@10140000 {
  189. compatible = "ralink,rt3883-pci";
  190. reg = <0x10140000 0x20000>;
  191. #address-cells = <1>;
  192. #size-cells = <1>;
  193. ranges; /* direct mapping */
  194. status = "disabled";
  195. pciintc: interrupt-controller {
  196. interrupt-controller;
  197. #address-cells = <0>;
  198. #interrupt-cells = <1>;
  199. interrupt-parent = <&cpuintc>;
  200. interrupts = <4>;
  201. };
  202. host-bridge {
  203. #address-cells = <3>;
  204. #size-cells = <2>;
  205. #interrupt-cells = <1>;
  206. device_type = "pci";
  207. bus-range = <0 255>;
  208. ranges = <
  209. 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
  210. 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
  211. >;
  212. interrupt-map-mask = <0xf800 0 0 7>;
  213. interrupt-map = <
  214. /* IDSEL 17 */
  215. 0x8800 0 0 1 &pciintc 18
  216. 0x8800 0 0 2 &pciintc 18
  217. 0x8800 0 0 3 &pciintc 18
  218. 0x8800 0 0 4 &pciintc 18
  219. /* IDSEL 18 */
  220. 0x9000 0 0 1 &pciintc 19
  221. 0x9000 0 0 2 &pciintc 19
  222. 0x9000 0 0 3 &pciintc 19
  223. 0x9000 0 0 4 &pciintc 19
  224. >;
  225. pci-bridge@1 {
  226. reg = <0x0800 0 0 0 0>;
  227. device_type = "pci";
  228. #interrupt-cells = <1>;
  229. #address-cells = <3>;
  230. #size-cells = <2>;
  231. status = "disabled";
  232. ralink,pci-slot = <1>;
  233. interrupt-map-mask = <0x0 0 0 0>;
  234. interrupt-map = <0x0 0 0 0 &pciintc 20>;
  235. };
  236. pci-slot@17 {
  237. reg = <0x8800 0 0 0 0>;
  238. device_type = "pci";
  239. #interrupt-cells = <1>;
  240. #address-cells = <3>;
  241. #size-cells = <2>;
  242. ralink,pci-slot = <17>;
  243. status = "disabled";
  244. };
  245. pci-slot@18 {
  246. reg = <0x9000 0 0 0 0>;
  247. device_type = "pci";
  248. #interrupt-cells = <1>;
  249. #address-cells = <3>;
  250. #size-cells = <2>;
  251. ralink,pci-slot = <18>;
  252. status = "disabled";
  253. };
  254. };
  255. };
  256. usbphy: usbphy {
  257. compatible = "ralink,rt3xxx-usbphy";
  258. #phy-cells = <1>;
  259. resets = <&rstctrl 22 &rstctrl 25>;
  260. reset-names = "host", "device";
  261. };
  262. wmac@10180000 {
  263. compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
  264. reg = <0x10180000 40000>;
  265. interrupt-parent = <&cpuintc>;
  266. interrupts = <6>;
  267. ralink,eeprom = "soc_wmac.eeprom";
  268. };
  269. ehci@101c0000 {
  270. compatible = "ralink,rt3xxx-ehci", "ehci-platform";
  271. reg = <0x101c0000 0x1000>;
  272. phys = <&usbphy 1>;
  273. phy-names = "usb";
  274. interrupt-parent = <&intc>;
  275. interrupts = <18>;
  276. status = "disabled";
  277. };
  278. ohci@101c1000 {
  279. compatible = "ralink,rt3xxx-ohci", "ohci-platform";
  280. reg = <0x101c1000 0x1000>;
  281. phys = <&usbphy 1>;
  282. phy-names = "usb";
  283. interrupt-parent = <&intc>;
  284. interrupts = <18>;
  285. status = "disabled";
  286. };
  287. };