rt2880.dtsi 3.2 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt2880-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips24KEc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. cpuintc: cpuintc@0 {
  14. #address-cells = <0>;
  15. #interrupt-cells = <1>;
  16. interrupt-controller;
  17. compatible = "mti,cpu-interrupt-controller";
  18. };
  19. palmbus@300000 {
  20. compatible = "palmbus";
  21. reg = <0x300000 0x200000>;
  22. ranges = <0x0 0x300000 0x1FFFFF>;
  23. #address-cells = <1>;
  24. #size-cells = <1>;
  25. sysc@0 {
  26. compatible = "ralink,rt2880-sysc";
  27. reg = <0x000 0x100>;
  28. };
  29. timer@100 {
  30. compatible = "ralink,rt2880-timer";
  31. reg = <0x100 0x20>;
  32. interrupt-parent = <&intc>;
  33. interrupts = <1>;
  34. status = "disabled";
  35. };
  36. watchdog@120 {
  37. compatible = "ralink,rt2880-wdt";
  38. reg = <0x120 0x10>;
  39. };
  40. intc: intc@200 {
  41. compatible = "ralink,rt2880-intc";
  42. reg = <0x200 0x100>;
  43. interrupt-controller;
  44. #interrupt-cells = <1>;
  45. interrupt-parent = <&cpuintc>;
  46. interrupts = <2>;
  47. };
  48. memc@300 {
  49. compatible = "ralink,rt2880-memc";
  50. reg = <0x300 0x100>;
  51. };
  52. gpio0: gpio@600 {
  53. compatible = "ralink,rt2880-gpio";
  54. reg = <0x600 0x34>;
  55. gpio-controller;
  56. #gpio-cells = <2>;
  57. ralink,gpio-base = <0>;
  58. ralink,num-gpios = <24>;
  59. ralink,register-map = [ 00 04 08 0c
  60. 20 24 28 2c
  61. 30 34 ];
  62. };
  63. gpio1: gpio@638 {
  64. compatible = "ralink,rt2880-gpio";
  65. reg = <0x638 0x24>;
  66. gpio-controller;
  67. #gpio-cells = <2>;
  68. ralink,gpio-base = <24>;
  69. ralink,num-gpios = <16>;
  70. ralink,register-map = [ 00 04 08 0c
  71. 10 14 18 1c
  72. 20 24 ];
  73. status = "disabled";
  74. };
  75. gpio2: gpio@660 {
  76. compatible = "ralink,rt2880-gpio";
  77. reg = <0x660 0x24>;
  78. gpio-controller;
  79. #gpio-cells = <2>;
  80. ralink,gpio-base = <40>;
  81. ralink,num-gpios = <32>;
  82. ralink,register-map = [ 00 04 08 0c
  83. 10 14 18 1c
  84. 20 24 ];
  85. status = "disabled";
  86. };
  87. uartlite@c00 {
  88. compatible = "ralink,rt2880-uart", "ns16550a";
  89. reg = <0xc00 0x100>;
  90. interrupt-parent = <&intc>;
  91. interrupts = <8>;
  92. reg-shift = <2>;
  93. };
  94. };
  95. pinctrl {
  96. compatible = "ralink,rt2880-pinmux";
  97. pinctrl-names = "default";
  98. pinctrl-0 = <&state_default>;
  99. state_default: pinctrl0 {
  100. sdram {
  101. ralink,group = "sdram";
  102. ralink,function = "sdram";
  103. };
  104. };
  105. spi_pins: spi {
  106. spi {
  107. ralink,group = "spi";
  108. ralink,function = "spi";
  109. };
  110. };
  111. uartlite_pins: uartlite {
  112. uart {
  113. ralink,group = "uartlite";
  114. ralink,function = "uartlite";
  115. };
  116. };
  117. };
  118. rstctrl: rstctrl {
  119. compatible = "ralink,rt2880-reset";
  120. #reset-cells = <1>;
  121. };
  122. ethernet@400000 {
  123. compatible = "ralink,rt2880-eth";
  124. reg = <0x00400000 10000>;
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. resets = <&rstctrl 18>;
  128. reset-names = "fe";
  129. interrupt-parent = <&cpuintc>;
  130. interrupts = <5>;
  131. status = "disabled";
  132. port@0 {
  133. compatible = "ralink,rt2880-port", "ralink,eth-port";
  134. reg = <0>;
  135. };
  136. mdio-bus {
  137. #address-cells = <1>;
  138. #size-cells = <0>;
  139. status = "disabled";
  140. };
  141. };
  142. wmac@480000 {
  143. compatible = "ralink,rt2880-wmac";
  144. reg = <0x480000 40000>;
  145. interrupt-parent = <&cpuintc>;
  146. interrupts = <6>;
  147. ralink,eeprom = "soc_wmac.eeprom";
  148. };
  149. };