VGV7510KW22.dtsi 4.8 KB

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  1. /include/ "vr9.dtsi"
  2. / {
  3. model = "VGV7510KW22 - o2 Box 6431";
  4. chosen {
  5. bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
  6. };
  7. memory@0 {
  8. reg = <0x0 0x4000000>;
  9. };
  10. fpi@10000000 {
  11. localbus@0 {
  12. nor-boot@0 {
  13. compatible = "lantiq,nor";
  14. bank-width = <2>;
  15. reg = <0 0x0 0x1000000>;
  16. #address-cells = <1>;
  17. #size-cells = <1>;
  18. boardconfig: partition@fe0000 {
  19. label = "board_config";
  20. reg = <0xfe0000 0x20000>;
  21. read-only;
  22. };
  23. };
  24. };
  25. gpio: pinmux@E100B10 {
  26. pinctrl-names = "default";
  27. pinctrl-0 = <&state_default>;
  28. state_default: pinmux {
  29. ip101a-rst {
  30. lantiq,pins = "io46";
  31. lantiq,output = <0>;
  32. lantiq,pull = <1>;
  33. };
  34. gphy-leds {
  35. lantiq,groups = "gphy0 led1",
  36. "gphy1 led0", "gphy1 led1";
  37. lantiq,function = "gphy";
  38. lantiq,open-drain = <0>;
  39. lantiq,pull = <0>;
  40. lantiq,output = <1>;
  41. };
  42. stp {
  43. lantiq,groups = "stp";
  44. lantiq,function = "stp";
  45. lantiq,pull = <2>;
  46. lantiq,open-drain = <0>;
  47. lantiq,output = <1>;
  48. };
  49. mdio {
  50. lantiq,groups = "mdio";
  51. lantiq,function = "mdio";
  52. };
  53. pci-rst {
  54. lantiq,pins = "io21";
  55. lantiq,open-drain = <0>;
  56. lantiq,pull = <0>;
  57. lantiq,output = <1>;
  58. };
  59. spi {
  60. lantiq,groups = "spi";
  61. lantiq,function = "spi";
  62. };
  63. };
  64. };
  65. eth@E108000 {
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. compatible = "lantiq,xrx200-net";
  69. reg = < 0xE108000 0x3000 /* switch */
  70. 0xE10B100 0x70 /* mdio */
  71. 0xE10B1D8 0x30 /* mii */
  72. 0xE10B308 0x30 /* pmac */
  73. >;
  74. interrupt-parent = <&icu0>;
  75. interrupts = <73 72>;
  76. lan: interface@0 {
  77. compatible = "lantiq,xrx200-pdi";
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. reg = <0>;
  81. mtd-mac-address = <&boardconfig 0x16>;
  82. lantiq,switch;
  83. ethernet@2 {
  84. compatible = "lantiq,xrx200-pdi-port";
  85. reg = <2>;
  86. phy-mode = "mii";
  87. phy-handle = <&phy11>;
  88. };
  89. ethernet@3 {
  90. compatible = "lantiq,xrx200-pdi-port";
  91. reg = <3>;
  92. phy-mode = "mii";
  93. phy-handle = <&phy12>;
  94. };
  95. ethernet@4 {
  96. compatible = "lantiq,xrx200-pdi-port";
  97. reg = <4>;
  98. phy-mode = "mii";
  99. phy-handle = <&phy13>;
  100. };
  101. ethernet@5 {
  102. compatible = "lantiq,xrx200-pdi-port";
  103. reg = <5>;
  104. phy-mode = "mii";
  105. phy-handle = <&phy14>;
  106. };
  107. };
  108. mdio@0 {
  109. #address-cells = <1>;
  110. #size-cells = <0>;
  111. compatible = "lantiq,xrx200-mdio";
  112. phy11: ethernet-phy@11 {
  113. reg = <0x11>;
  114. compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
  115. };
  116. phy12: ethernet-phy@12 {
  117. reg = <0x12>;
  118. compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
  119. };
  120. phy13: ethernet-phy@13 {
  121. reg = <0x13>;
  122. compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
  123. };
  124. phy14: ethernet-phy@14 {
  125. reg = <0x14>;
  126. compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
  127. };
  128. };
  129. };
  130. stp: stp@E100BB0 {
  131. compatible = "lantiq,gpio-stp-xway";
  132. reg = <0xE100BB0 0x40>;
  133. #gpio-cells = <2>;
  134. gpio-controller;
  135. lantiq,shadow = <0xff>;
  136. lantiq,groups = <0x1>;
  137. lantiq,dsl = <0x0>;
  138. lantiq,phy1 = <0x7>;
  139. lantiq,phy2 = <0x7>; /* enable gphy0 led2 = LAN2 LED */
  140. };
  141. ifxhcd@E101000 {
  142. status = "okay";
  143. gpios = <&gpio 47 0>;
  144. };
  145. pci@E105400 {
  146. status = "okay";
  147. lantiq,bus-clock = <33333333>;
  148. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  149. interrupt-map = <
  150. 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
  151. >;
  152. gpio-reset = <&gpio 21 0>;
  153. req-mask = <0x1>; /* GNT1 */
  154. };
  155. pcie@d900000 {
  156. status = "disabled";
  157. };
  158. };
  159. gphy-xrx200 {
  160. compatible = "lantiq,phy-xrx200";
  161. firmware1 = "lantiq/vr9_phy22f_a1x.bin"; /*VR9 1.1*/
  162. firmware2 = "lantiq/vr9_phy22f_a2x.bin"; /*VR9 1.2*/
  163. phys = [ 00 01 ];
  164. };
  165. ralink_eep {
  166. compatible = "ralink,eeprom";
  167. ralink,eeprom = "RT3062.eeprom";
  168. };
  169. gpio-keys-polled {
  170. compatible = "gpio-keys-polled";
  171. #address-cells = <1>;
  172. #size-cells = <0>;
  173. poll-interval = <100>;
  174. reset {
  175. label = "reset";
  176. gpios = <&gpio 6 1>;
  177. linux,code = <0x198>;
  178. };
  179. wps {
  180. label = "wps";
  181. gpios = <&gpio 9 1>;
  182. linux,code = <0x211>;
  183. };
  184. };
  185. gpio-leds {
  186. compatible = "gpio-leds";
  187. dsl {
  188. label = "dsl";
  189. gpios = <&gpio 2 1>;
  190. };
  191. internet_red {
  192. label = "internet_red";
  193. gpios = <&gpio 10 1>;
  194. };
  195. info_red {
  196. label = "info_red";
  197. gpios = <&gpio 12 1>;
  198. };
  199. power {
  200. label = "power"; /* green */
  201. gpios = <&gpio 14 1>;
  202. };
  203. info_green {
  204. label = "info_green";
  205. gpios = <&gpio 15 1>;
  206. };
  207. internet_green {
  208. label = "internet_green";
  209. gpios = <&gpio 19 1>;
  210. };
  211. wifi {
  212. label = "wifi";
  213. gpios = <&gpio 20 1>;
  214. };
  215. power2 {
  216. label = "power2"; /* red */
  217. gpios = <&gpio 28 1>;
  218. };
  219. phone_red {
  220. label = "phone_red";
  221. gpios = <&gpio 29 1>;
  222. };
  223. };
  224. };