TDW8970.dts 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258
  1. /dts-v1/;
  2. /include/ "vr9.dtsi"
  3. / {
  4. model = "TDW8970 - TP-LINK TD-W8970";
  5. chosen {
  6. bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
  7. };
  8. memory@0 {
  9. reg = <0x0 0x4000000>;
  10. };
  11. fpi@10000000 {
  12. gpio: pinmux@E100B10 {
  13. pinctrl-names = "default";
  14. pinctrl-0 = <&state_default>;
  15. state_default: pinmux {
  16. mdio {
  17. lantiq,groups = "mdio";
  18. lantiq,function = "mdio";
  19. };
  20. gphy-leds {
  21. lantiq,groups = "gphy0 led1", "gphy1 led1";
  22. lantiq,function = "gphy";
  23. lantiq,pull = <2>;
  24. lantiq,open-drain = <0>;
  25. lantiq,output = <1>;
  26. };
  27. phy-rst {
  28. lantiq,pins = "io42";
  29. lantiq,pull = <0>;
  30. lantiq,open-drain = <0>;
  31. lantiq,output = <1>;
  32. };
  33. spi-in {
  34. lantiq,pins = "io16";
  35. lantiq,open-drain = <1>;
  36. lantiq,pull = <2>;
  37. };
  38. spi-out {
  39. lantiq,pins = "io10", "io17", "io18", "io21";
  40. lantiq,open-drain = <0>;
  41. lantiq,pull = <2>;
  42. };
  43. pcie-rst {
  44. lantiq,pins = "io38";
  45. lantiq,pull = <0>;
  46. lantiq,output = <1>;
  47. };
  48. };
  49. };
  50. eth@E108000 {
  51. #address-cells = <1>;
  52. #size-cells = <0>;
  53. compatible = "lantiq,xrx200-net";
  54. reg = < 0xE108000 0x3000 /* switch */
  55. 0xE10B100 0x70 /* mdio */
  56. 0xE10B1D8 0x30 /* mii */
  57. 0xE10B308 0x30 /* pmac */
  58. >;
  59. interrupt-parent = <&icu0>;
  60. interrupts = <73 72>;
  61. lan: interface@0 {
  62. compatible = "lantiq,xrx200-pdi";
  63. #address-cells = <1>;
  64. #size-cells = <0>;
  65. reg = <0>;
  66. mtd-mac-address = <&ath9k_cal 0xf100>;
  67. lantiq,switch;
  68. ethernet@0 {
  69. compatible = "lantiq,xrx200-pdi-port";
  70. reg = <0>;
  71. phy-mode = "rgmii";
  72. phy-handle = <&phy0>;
  73. // gpios = <&gpio 42 1>;
  74. };
  75. ethernet@5 {
  76. compatible = "lantiq,xrx200-pdi-port";
  77. reg = <5>;
  78. phy-mode = "rgmii";
  79. phy-handle = <&phy5>;
  80. };
  81. ethernet@2 {
  82. compatible = "lantiq,xrx200-pdi-port";
  83. reg = <2>;
  84. phy-mode = "gmii";
  85. phy-handle = <&phy11>;
  86. };
  87. ethernet@3 {
  88. compatible = "lantiq,xrx200-pdi-port";
  89. reg = <4>;
  90. phy-mode = "gmii";
  91. phy-handle = <&phy13>;
  92. };
  93. };
  94. mdio@0 {
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. compatible = "lantiq,xrx200-mdio";
  98. phy0: ethernet-phy@0 {
  99. reg = <0x0>;
  100. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  101. };
  102. phy5: ethernet-phy@5 {
  103. reg = <0x5>;
  104. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  105. };
  106. phy11: ethernet-phy@11 {
  107. reg = <0x11>;
  108. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  109. };
  110. phy13: ethernet-phy@13 {
  111. reg = <0x13>;
  112. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  113. };
  114. };
  115. };
  116. ifxhcd@E101000 {
  117. status = "okay";
  118. gpios = <&gpio 33 0>;
  119. lantiq,portmask = <0x3>;
  120. };
  121. ifxhcd@E106000 {
  122. status = "okay";
  123. gpios = <&gpio 33 0>;
  124. };
  125. };
  126. gphy-xrx200 {
  127. compatible = "lantiq,phy-xrx200";
  128. firmware = "lantiq/vr9_phy11g_a2x.bin";
  129. phys = [ 00 01 ];
  130. };
  131. pcie {
  132. compatible = "lantiq,pcie-xway";
  133. };
  134. spi {
  135. #address-cells = <1>;
  136. #size-cells = <1>;
  137. compatible = "spi-gpio";
  138. gpio-miso = <&gpio 16 0>;
  139. gpio-mosi = <&gpio 17 0>;
  140. gpio-sck = <&gpio 18 0>;
  141. num-chipselects = <1>;
  142. cs-gpios = <&gpio 10 1>;
  143. m25p80@0 {
  144. #address-cells = <1>;
  145. #size-cells = <1>;
  146. compatible = "en25q64", "m25p80";
  147. reg = <0 0>;
  148. linux,modalias = "en25q64";
  149. spi-max-frequency = <1000000>;
  150. partition@0 {
  151. reg = <0x0 0x20000>;
  152. label = "u-boot";
  153. read-only;
  154. };
  155. partition@20000 {
  156. reg = <0x20000 0x6a0000>;
  157. label = "firmware";
  158. };
  159. partition@6c0000 {
  160. reg = <0x6c0000 0x100000>;
  161. label = "dsl_fw";
  162. };
  163. partition@7c0000 {
  164. reg = <0x7c0000 0x10000>;
  165. label = "config";
  166. read-only;
  167. };
  168. ath9k_cal: partition@7d0000 {
  169. reg = <0x7d0000 0x30000>;
  170. label = "boardconfig";
  171. read-only;
  172. };
  173. };
  174. };
  175. ath9k_eep {
  176. compatible = "ath9k,eeprom";
  177. ath,eep-flash = <&ath9k_cal 0x21000>;
  178. ath,mac-offset = <0xf100>;
  179. ath,mac-increment;
  180. ath,led-pin = <0>;
  181. ath,disable-5ghz;
  182. ath,led-active-high;
  183. };
  184. gpio-keys-polled {
  185. compatible = "gpio-keys-polled";
  186. #address-cells = <1>;
  187. #size-cells = <0>;
  188. poll-interval = <100>;
  189. reset {
  190. label = "reset";
  191. gpios = <&gpio 0 1>;
  192. linux,code = <0x198>;
  193. };
  194. wifi {
  195. label = "wifi";
  196. gpios = <&gpio 9 0>;
  197. linux,code = <0xf7>;
  198. linux,input-type = <5>; /* EV_SW */
  199. };
  200. wps {
  201. label = "wps";
  202. gpios = <&gpio 39 1>;
  203. linux,code = <0x211>;
  204. };
  205. };
  206. gpio-leds {
  207. compatible = "gpio-leds";
  208. dsl {
  209. label = "dsl";
  210. gpios = <&gpio 4 0>;
  211. };
  212. internet {
  213. label = "internet";
  214. gpios = <&gpio 5 0>;
  215. };
  216. usb0 {
  217. label = "usb";
  218. gpios = <&gpio 19 0>;
  219. };
  220. usb2 {
  221. label = "usb2";
  222. gpios = <&gpio 20 0>;
  223. };
  224. wps {
  225. label = "wps";
  226. gpios = <&gpio 37 0>;
  227. };
  228. };
  229. };