rt3883.dtsi 8.4 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt3883-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips74Kc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. aliases {
  14. spi0 = &spi0;
  15. spi1 = &spi1;
  16. serial0 = &uartlite;
  17. };
  18. cpuintc: cpuintc@0 {
  19. #address-cells = <0>;
  20. #interrupt-cells = <1>;
  21. interrupt-controller;
  22. compatible = "mti,cpu-interrupt-controller";
  23. };
  24. palmbus: palmbus@10000000 {
  25. compatible = "palmbus";
  26. reg = <0x10000000 0x200000>;
  27. ranges = <0x0 0x10000000 0x1FFFFF>;
  28. #address-cells = <1>;
  29. #size-cells = <1>;
  30. sysc: sysc@0 {
  31. compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
  32. reg = <0x0 0x100>;
  33. };
  34. timer: timer@100 {
  35. compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
  36. reg = <0x100 0x20>;
  37. interrupt-parent = <&intc>;
  38. interrupts = <1>;
  39. };
  40. watchdog: watchdog@120 {
  41. compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
  42. reg = <0x120 0x10>;
  43. resets = <&rstctrl 8>;
  44. reset-names = "wdt";
  45. interrupt-parent = <&intc>;
  46. interrupts = <1>;
  47. };
  48. intc: intc@200 {
  49. compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
  50. reg = <0x200 0x100>;
  51. resets = <&rstctrl 19>;
  52. reset-names = "intc";
  53. interrupt-controller;
  54. #interrupt-cells = <1>;
  55. interrupt-parent = <&cpuintc>;
  56. interrupts = <2>;
  57. };
  58. memc: memc@300 {
  59. compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
  60. reg = <0x300 0x100>;
  61. resets = <&rstctrl 20>;
  62. reset-names = "mc";
  63. interrupt-parent = <&intc>;
  64. interrupts = <3>;
  65. };
  66. uart: uart@500 {
  67. compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
  68. reg = <0x500 0x100>;
  69. resets = <&rstctrl 12>;
  70. reset-names = "uart";
  71. interrupt-parent = <&intc>;
  72. interrupts = <5>;
  73. reg-shift = <2>;
  74. status = "disabled";
  75. };
  76. gpio0: gpio@600 {
  77. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  78. reg = <0x600 0x34>;
  79. resets = <&rstctrl 13>;
  80. reset-names = "pio";
  81. interrupt-parent = <&intc>;
  82. interrupts = <6>;
  83. gpio-controller;
  84. #gpio-cells = <2>;
  85. ralink,gpio-base = <0>;
  86. ralink,num-gpios = <24>;
  87. ralink,register-map = [ 00 04 08 0c
  88. 20 24 28 2c
  89. 30 34 ];
  90. };
  91. gpio1: gpio@638 {
  92. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  93. reg = <0x638 0x24>;
  94. gpio-controller;
  95. #gpio-cells = <2>;
  96. ralink,gpio-base = <24>;
  97. ralink,num-gpios = <16>;
  98. ralink,register-map = [ 00 04 08 0c
  99. 10 14 18 1c
  100. 20 24 ];
  101. status = "disabled";
  102. };
  103. gpio2: gpio@660 {
  104. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  105. reg = <0x660 0x24>;
  106. gpio-controller;
  107. #gpio-cells = <2>;
  108. ralink,gpio-base = <40>;
  109. ralink,num-gpios = <32>;
  110. ralink,register-map = [ 00 04 08 0c
  111. 10 14 18 1c
  112. 20 24 ];
  113. status = "disabled";
  114. };
  115. gpio3: gpio@688 {
  116. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  117. reg = <0x688 0x24>;
  118. gpio-controller;
  119. #gpio-cells = <2>;
  120. ralink,gpio-base = <72>;
  121. ralink,num-gpios = <24>;
  122. ralink,register-map = [ 00 04 08 0c
  123. 10 14 18 1c
  124. 20 24 ];
  125. status = "disabled";
  126. };
  127. i2c@900 {
  128. compatible = "ralink,rt2880-i2c";
  129. reg = <0x900 0x100>;
  130. resets = <&rstctrl 16>;
  131. reset-names = "i2c";
  132. #address-cells = <1>;
  133. #size-cells = <0>;
  134. status = "disabled";
  135. pinctrl-names = "default";
  136. pinctrl-0 = <&i2c_pins>;
  137. };
  138. i2s@a00 {
  139. compatible = "ralink,rt3883-i2s";
  140. reg = <0xa00 0x100>;
  141. resets = <&rstctrl 17>;
  142. reset-names = "i2s";
  143. interrupt-parent = <&intc>;
  144. interrupts = <10>;
  145. txdma-req = <2>;
  146. rxdma-req = <3>;
  147. dmas = <&gdma 4>,
  148. <&gdma 6>;
  149. dma-names = "tx", "rx";
  150. status = "disabled";
  151. };
  152. spi0: spi@b00 {
  153. compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
  154. reg = <0xb00 0x40>;
  155. #address-cells = <1>;
  156. #size-cells = <0>;
  157. resets = <&rstctrl 18>;
  158. reset-names = "spi";
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&spi_pins>;
  161. status = "disabled";
  162. };
  163. spi1: spi@b40 {
  164. compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
  165. reg = <0xb40 0x60>;
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. resets = <&rstctrl 18>;
  169. reset-names = "spi";
  170. pinctrl-names = "default";
  171. pinctrl-0 = <&spi_cs1>;
  172. status = "disabled";
  173. };
  174. uartlite: uartlite@c00 {
  175. compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
  176. reg = <0xc00 0x100>;
  177. resets = <&rstctrl 19>;
  178. reset-names = "uartl";
  179. interrupt-parent = <&intc>;
  180. interrupts = <12>;
  181. reg-shift = <2>;
  182. pinctrl-names = "default";
  183. pinctrl-0 = <&uartlite_pins>;
  184. };
  185. gdma: gdma@2800 {
  186. compatible = "ralink,rt3883-gdma";
  187. reg = <0x2800 0x800>;
  188. resets = <&rstctrl 14>;
  189. reset-names = "dma";
  190. interrupt-parent = <&intc>;
  191. interrupts = <7>;
  192. #dma-cells = <1>;
  193. #dma-channels = <16>;
  194. #dma-requests = <16>;
  195. status = "disabled";
  196. };
  197. };
  198. pinctrl: pinctrl {
  199. compatible = "ralink,rt2880-pinmux";
  200. pinctrl-names = "default";
  201. pinctrl-0 = <&state_default>;
  202. state_default: pinctrl0 {
  203. };
  204. i2c_pins: i2c {
  205. i2c {
  206. ralink,group = "i2c";
  207. ralink,function = "i2c";
  208. };
  209. };
  210. spi_pins: spi {
  211. spi {
  212. ralink,group = "spi";
  213. ralink,function = "spi";
  214. };
  215. };
  216. spi_cs1: spi1 {
  217. spi1 {
  218. ralink,group = "spi_cs1";
  219. ralink,function = "spi_cs1";
  220. };
  221. };
  222. uartlite_pins: uartlite {
  223. uart {
  224. ralink,group = "uartlite";
  225. ralink,function = "uartlite";
  226. };
  227. };
  228. };
  229. ethernet: ethernet@10100000 {
  230. compatible = "ralink,rt3883-eth";
  231. reg = <0x10100000 0x10000>;
  232. resets = <&rstctrl 21>;
  233. reset-names = "fe";
  234. interrupt-parent = <&cpuintc>;
  235. interrupts = <5>;
  236. port@0 {
  237. compatible = "ralink,rt3883-port", "mediatek,eth-port";
  238. reg = <0>;
  239. };
  240. mdio-bus {
  241. #address-cells = <1>;
  242. #size-cells = <0>;
  243. status = "disabled";
  244. };
  245. };
  246. rstctrl: rstctrl {
  247. compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
  248. #reset-cells = <1>;
  249. };
  250. clkctrl: clkctrl {
  251. compatible = "ralink,rt2880-clock";
  252. #clock-cells = <1>;
  253. };
  254. pci: pci@10140000 {
  255. compatible = "ralink,rt3883-pci";
  256. reg = <0x10140000 0x20000>;
  257. #address-cells = <1>;
  258. #size-cells = <1>;
  259. ranges; /* direct mapping */
  260. status = "disabled";
  261. pciintc: interrupt-controller {
  262. interrupt-controller;
  263. #address-cells = <0>;
  264. #interrupt-cells = <1>;
  265. interrupt-parent = <&cpuintc>;
  266. interrupts = <4>;
  267. };
  268. host-bridge {
  269. #address-cells = <3>;
  270. #size-cells = <2>;
  271. #interrupt-cells = <1>;
  272. device_type = "pci";
  273. bus-range = <0 255>;
  274. ranges = <
  275. 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
  276. 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
  277. >;
  278. interrupt-map-mask = <0xf800 0 0 7>;
  279. interrupt-map = <
  280. /* IDSEL 17 */
  281. 0x8800 0 0 1 &pciintc 18
  282. 0x8800 0 0 2 &pciintc 18
  283. 0x8800 0 0 3 &pciintc 18
  284. 0x8800 0 0 4 &pciintc 18
  285. /* IDSEL 18 */
  286. 0x9000 0 0 1 &pciintc 19
  287. 0x9000 0 0 2 &pciintc 19
  288. 0x9000 0 0 3 &pciintc 19
  289. 0x9000 0 0 4 &pciintc 19
  290. >;
  291. pci-bridge@1 {
  292. reg = <0x0800 0 0 0 0>;
  293. device_type = "pci";
  294. #interrupt-cells = <1>;
  295. #address-cells = <3>;
  296. #size-cells = <2>;
  297. status = "disabled";
  298. ralink,pci-slot = <1>;
  299. interrupt-map-mask = <0x0 0 0 0>;
  300. interrupt-map = <0x0 0 0 0 &pciintc 20>;
  301. };
  302. pci-slot@17 {
  303. reg = <0x8800 0 0 0 0>;
  304. device_type = "pci";
  305. #interrupt-cells = <1>;
  306. #address-cells = <3>;
  307. #size-cells = <2>;
  308. ralink,pci-slot = <17>;
  309. status = "disabled";
  310. };
  311. pci-slot@18 {
  312. reg = <0x9000 0 0 0 0>;
  313. device_type = "pci";
  314. #interrupt-cells = <1>;
  315. #address-cells = <3>;
  316. #size-cells = <2>;
  317. ralink,pci-slot = <18>;
  318. status = "disabled";
  319. };
  320. };
  321. };
  322. usbphy: usbphy {
  323. compatible = "ralink,rt3352-usbphy";
  324. #phy-cells = <1>;
  325. resets = <&rstctrl 22 &rstctrl 25>;
  326. reset-names = "host", "device";
  327. clocks = <&clkctrl 22 &clkctrl 25>;
  328. clock-names = "host", "device";
  329. };
  330. wmac: wmac@10180000 {
  331. compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
  332. reg = <0x10180000 0x40000>;
  333. interrupt-parent = <&cpuintc>;
  334. interrupts = <6>;
  335. ralink,eeprom = "soc_wmac.eeprom";
  336. };
  337. ehci: ehci@101c0000 {
  338. compatible = "generic-ehci";
  339. reg = <0x101c0000 0x1000>;
  340. phys = <&usbphy 1>;
  341. phy-names = "usb";
  342. interrupt-parent = <&intc>;
  343. interrupts = <18>;
  344. status = "disabled";
  345. };
  346. ohci: ohci@101c1000 {
  347. compatible = "generic-ohci";
  348. reg = <0x101c1000 0x1000>;
  349. phys = <&usbphy 1>;
  350. phy-names = "usb";
  351. interrupt-parent = <&intc>;
  352. interrupts = <18>;
  353. status = "disabled";
  354. };
  355. };