XDXRN502J.dts 1.3 KB

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  1. /dts-v1/;
  2. #include "rt3050.dtsi"
  3. / {
  4. compatible = "XDXRN502J", "ralink,rt3052-soc";
  5. model = "XDX RN502J";
  6. cfi@1f000000 {
  7. compatible = "cfi-flash";
  8. reg = <0x1f000000 0x800000>;
  9. bank-width = <2>;
  10. device-width = <2>;
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. partition@0 {
  14. label = "u-boot";
  15. reg = <0x0 0x30000>;
  16. read-only;
  17. };
  18. partition@30000 {
  19. label = "u-boot-env";
  20. reg = <0x30000 0x10000>;
  21. read-only;
  22. };
  23. factory: partition@40000 {
  24. label = "factory";
  25. reg = <0x40000 0x10000>;
  26. read-only;
  27. };
  28. partition@50000 {
  29. label = "firmware";
  30. reg = <0x50000 0x3b0000>;
  31. };
  32. };
  33. gpio-leds {
  34. compatible = "gpio-leds";
  35. wifi {
  36. label = "xdxrn502j:green:wifi";
  37. gpios = <&gpio0 7 1>;
  38. };
  39. power {
  40. label = "xdxrn502j:green:power";
  41. gpios = <&gpio0 9 1>;
  42. };
  43. };
  44. gpio-keys-polled {
  45. compatible = "gpio-keys-polled";
  46. #address-cells = <1>;
  47. #size-cells = <0>;
  48. poll-interval = <20>;
  49. reset {
  50. label = "reset";
  51. gpios = <&gpio0 10 1>;
  52. linux,code = <0x198>;
  53. };
  54. };
  55. };
  56. &pinctrl {
  57. state_default: pinctrl0 {
  58. gpio {
  59. ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
  60. ralink,function = "gpio";
  61. };
  62. };
  63. };
  64. &ethernet {
  65. mtd-mac-address = <&factory 0x28>;
  66. };
  67. &esw {
  68. mediatek,portmap = <0x3e>;
  69. };
  70. &wmac {
  71. ralink,mtd-eeprom = <&factory 0>;
  72. };
  73. &otg {
  74. status = "okay";
  75. };