154-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch 2.7 KB

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  1. From 46560388c476c8471fde7712c10f9fad8d0d1875 Mon Sep 17 00:00:00 2001
  2. From: Ray Jui <rjui@broadcom.com>
  3. Date: Wed, 27 Jan 2016 16:52:24 -0600
  4. Subject: [PATCH] PCI: iproc: Allow multiple devices except on PAXC
  5. Commit 943ebae781f5 ("PCI: iproc: Add PAXC interface support") only allowed
  6. device 0, which is a regression on BCMA-based platforms.
  7. All systems support only one device, a Root Port at 00:00.0, on the root
  8. bus. PAXC-based systems support only the Root Port (00:00.0) and a single
  9. device (with multiple functions) below it, e.g., 01:00.0, 01:00.1, etc.
  10. Non-PAXC systems support arbitrary devices below the Root Port.
  11. [bhelgaas: changelog, fold in removal of MAX_NUM_PAXC_PF check]
  12. Fixes: 943ebae781f5 ("PCI: iproc: Add PAXC interface support")
  13. Reported-by: Rafal Milecki <zajec5@gmail.com>
  14. Signed-off-by: Ray Jui <rjui@broadcom.com>
  15. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  16. ---
  17. drivers/pci/host/pcie-iproc.c | 29 +++++++++++------------------
  18. 1 file changed, 11 insertions(+), 18 deletions(-)
  19. --- a/drivers/pci/host/pcie-iproc.c
  20. +++ b/drivers/pci/host/pcie-iproc.c
  21. @@ -64,7 +64,6 @@
  22. #define OARR_SIZE_CFG BIT(OARR_SIZE_CFG_SHIFT)
  23. #define MAX_NUM_OB_WINDOWS 2
  24. -#define MAX_NUM_PAXC_PF 4
  25. #define IPROC_PCIE_REG_INVALID 0xffff
  26. @@ -170,20 +169,6 @@ static inline void iproc_pcie_ob_write(struct iproc_pcie *pcie,
  27. writel(val, pcie->base + offset + (window * 8));
  28. }
  29. -static inline bool iproc_pcie_device_is_valid(struct iproc_pcie *pcie,
  30. - unsigned int slot,
  31. - unsigned int fn)
  32. -{
  33. - if (slot > 0)
  34. - return false;
  35. -
  36. - /* PAXC can only support limited number of functions */
  37. - if (pcie->type == IPROC_PCIE_PAXC && fn >= MAX_NUM_PAXC_PF)
  38. - return false;
  39. -
  40. - return true;
  41. -}
  42. -
  43. /**
  44. * Note access to the configuration registers are protected at the higher layer
  45. * by 'pci_lock' in drivers/pci/access.c
  46. @@ -199,11 +184,11 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
  47. u32 val;
  48. u16 offset;
  49. - if (!iproc_pcie_device_is_valid(pcie, slot, fn))
  50. - return NULL;
  51. -
  52. /* root complex access */
  53. if (busno == 0) {
  54. + if (slot > 0 || fn > 0)
  55. + return NULL;
  56. +
  57. iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_IND_ADDR,
  58. where & CFG_IND_ADDR_MASK);
  59. offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_IND_DATA);
  60. @@ -213,6 +198,14 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
  61. return (pcie->base + offset);
  62. }
  63. + /*
  64. + * PAXC is connected to an internally emulated EP within the SoC. It
  65. + * allows only one device.
  66. + */
  67. + if (pcie->type == IPROC_PCIE_PAXC)
  68. + if (slot > 0)
  69. + return NULL;
  70. +
  71. /* EP device access */
  72. val = (busno << CFG_ADDR_BUS_NUM_SHIFT) |
  73. (slot << CFG_ADDR_DEV_NUM_SHIFT) |