320-oxnas-irqchip.patch 1.2 KB

12345678910111213141516171819202122232425262728293031323334
  1. --- a/drivers/irqchip/Kconfig
  2. +++ b/drivers/irqchip/Kconfig
  3. @@ -27,6 +27,11 @@ config ARM_GIC_V3_ITS
  4. bool
  5. select PCI_MSI_IRQ_DOMAIN
  6. +config PLXTECH_RPS
  7. + def_bool y if ARHC_OXNAS
  8. + depends on ARCH_OXNAS
  9. + select IRQ_DOMAIN
  10. +
  11. config ARM_NVIC
  12. bool
  13. select IRQ_DOMAIN
  14. --- a/drivers/irqchip/Makefile
  15. +++ b/drivers/irqchip/Makefile
  16. @@ -31,6 +31,7 @@ obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.
  17. obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o
  18. obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
  19. obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
  20. +obj-$(CONFIG_PLXTECH_RPS) += irq-rps.o
  21. obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
  22. obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o
  23. obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
  24. --- a/drivers/irqchip/irq-gic.c
  25. +++ b/drivers/irqchip/irq-gic.c
  26. @@ -1036,6 +1036,7 @@ IRQCHIP_DECLARE(arm1176jzf_dc_gic, "arm,
  27. IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);
  28. IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);
  29. IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init);
  30. +IRQCHIP_DECLARE(arm11_mpcore_gic, "arm,arm11mp-gic", gic_of_init);
  31. IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);
  32. IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);