amazonse.dtsi 2.9 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "lantiq,xway", "lantiq,ase";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips4Kc";
  8. };
  9. };
  10. biu@1F800000 {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. compatible = "lantiq,biu", "simple-bus";
  14. reg = <0x1F800000 0x800000>;
  15. ranges = <0x0 0x1F800000 0x7FFFFF>;
  16. icu0: icu@80200 {
  17. #interrupt-cells = <1>;
  18. interrupt-controller;
  19. compatible = "lantiq,icu";
  20. reg = <0x80200 0x28
  21. 0x80228 0x28
  22. 0x80250 0x28
  23. 0x80278 0x28
  24. 0x802a0 0x28>;
  25. };
  26. watchdog@803F0 {
  27. compatible = "lantiq,wdt";
  28. reg = <0x803F0 0x10>;
  29. };
  30. };
  31. sram@1F000000 {
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. compatible = "lantiq,sram", "simple-bus";
  35. reg = <0x1F000000 0x800000>;
  36. ranges = <0x0 0x1F000000 0x7FFFFF>;
  37. eiu0: eiu@101000 {
  38. #interrupt-cells = <1>;
  39. compatible = "lantiq,eiu-xway";
  40. reg = <0x101000 0x1000>;
  41. interrupt-parent = <&icu0>;
  42. lantiq,eiu-irqs = <29 30 31>;
  43. };
  44. pmu0: pmu@102000 {
  45. compatible = "lantiq,pmu-xway";
  46. reg = <0x102000 0x1000>;
  47. };
  48. cgu0: cgu@103000 {
  49. compatible = "lantiq,cgu-xway";
  50. reg = <0x103000 0x1000>;
  51. #clock-cells = <1>;
  52. };
  53. rcu0: rcu@203000 {
  54. compatible = "lantiq,rcu-xway";
  55. reg = <0x203000 0x1000>;
  56. };
  57. };
  58. fpi@10000000 {
  59. #address-cells = <1>;
  60. #size-cells = <1>;
  61. compatible = "lantiq,fpi", "simple-bus";
  62. ranges = <0x0 0x10000000 0xEEFFFFF>;
  63. reg = <0x10000000 0xEF00000>;
  64. spi@E100800 {
  65. compatible = "lantiq,ase-spi";
  66. reg = <0xE100800 0x100>;
  67. interrupt-parent = <&icu0>;
  68. interrupts = <24 25 26>;
  69. interrupt-names = "spi_rx", "spi_tx", "spi_err",
  70. "spi_frm";
  71. #address-cells = <1>;
  72. #size-cells = <1>;
  73. };
  74. gptu@E100A00 {
  75. compatible = "lantiq,gptu-xway";
  76. reg = <0xE100A00 0x100>;
  77. interrupt-parent = <&icu0>;
  78. interrupts = <97 98 99 100 101 102>;
  79. status = "disabled";
  80. };
  81. gpio: pinmux@E100B10 {
  82. compatible = "lantiq,ase-pinctrl";
  83. #gpio-cells = <2>;
  84. gpio-controller;
  85. reg = <0xE100B10 0xA0>;
  86. };
  87. serial@E100C00 {
  88. compatible = "lantiq,asc";
  89. reg = <0xE100C00 0x400>;
  90. interrupt-parent = <&icu0>;
  91. interrupts = <72 74 75>;
  92. };
  93. mei@E116000 {
  94. compatible = "lantiq,mei-xway";
  95. interrupt-parent = <&icu0>;
  96. interrupts = <63>;
  97. };
  98. ifxhcd@E101000 {
  99. compatible = "lantiq,ifxhcd-ase";
  100. reg = <0xE101000 0x1000
  101. 0xE120000 0x3f000>;
  102. interrupt-parent = <&icu0>;
  103. interrupts = <39>;
  104. status = "disabled";
  105. };
  106. dma0: dma@E104100 {
  107. compatible = "lantiq,dma-xway";
  108. reg = <0xE104100 0x800>;
  109. };
  110. ebu0: ebu@E105300 {
  111. compatible = "lantiq,ebu-xway";
  112. reg = <0xE105300 0x100>;
  113. };
  114. ppe@E234000 {
  115. compatible = "lantiq,ppe-ase";
  116. interrupt-parent = <&icu0>;
  117. interrupts = <85>;
  118. };
  119. etop@E180000 {
  120. compatible = "lantiq,etop-xway";
  121. reg = <0xE180000 0x40000>;
  122. interrupt-parent = <&icu0>;
  123. interrupts = <105 109>;
  124. };
  125. };
  126. adsl {
  127. compatible = "lantiq,adsl-ase";
  128. };
  129. };