334-MIPS-BCM63XX-detect-BCM6368-variants.patch 1.6 KB

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  1. From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
  2. From: Jonas Gorski <jogo@openwrt.org>
  3. Date: Sat, 7 Dec 2013 14:36:56 +0100
  4. Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
  5. The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
  6. from missing DSL, there is no difference to BCM6368, so treat it such.
  7. Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  8. ---
  9. arch/mips/bcm63xx/cpu.c | 4 ++++
  10. arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
  11. 2 files changed, 7 insertions(+)
  12. --- a/arch/mips/bcm63xx/cpu.c
  13. +++ b/arch/mips/bcm63xx/cpu.c
  14. @@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
  15. break;
  16. case BCM6368_CPU_ID:
  17. + case BCM6369_CPU_ID:
  18. bcm63xx_regs_base = bcm6368_regs_base;
  19. bcm63xx_irqs = bcm6368_irqs;
  20. +
  21. + /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
  22. + bcm63xx_cpu_id = BCM6368_CPU_ID;
  23. break;
  24. default:
  25. panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
  26. --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
  27. +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
  28. @@ -20,6 +20,7 @@
  29. #define BCM6361_CPU_ID 0x6361
  30. #define BCM6362_CPU_ID 0x6362
  31. #define BCM6368_CPU_ID 0x6368
  32. +#define BCM6369_CPU_ID 0x6369
  33. void __init bcm63xx_cpu_init(void);
  34. u32 bcm63xx_get_cpu_variant(void);
  35. @@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
  36. (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
  37. #define BCMCPU_VARIANT_IS_6368() \
  38. (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
  39. +#define BCMCPU_VARIANT_IS_6369() \
  40. + (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
  41. /*
  42. * While registers sets are (mostly) the same across 63xx CPU, base