1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677 |
- From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
- From: Jonas Gorski <jogo@openwrt.org>
- Date: Sat, 7 Dec 2013 14:08:36 +0100
- Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
- ---
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 2 files changed, 28 insertions(+)
- --- a/arch/mips/bcm63xx/cpu.c
- +++ b/arch/mips/bcm63xx/cpu.c
- @@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
- u16 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
- +static u32 bcm63xx_cpu_variant __read_mostly;
- +
- static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
- @@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
-
- };
-
- +u32 bcm63xx_get_cpu_variant(void)
- +{
- + return bcm63xx_cpu_variant;
- +}
- +
- +EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
- +
- u8 bcm63xx_get_cpu_rev(void)
- {
- return bcm63xx_cpu_rev;
- @@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
- + bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
- --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
- +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
- @@ -19,6 +19,7 @@
- #define BCM6368_CPU_ID 0x6368
-
- void __init bcm63xx_cpu_init(void);
- +u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
- @@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-
- +#define BCMCPU_VARIANT_IS_3368() \
- + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
- +#define BCMCPU_VARIANT_IS_6328() \
- + (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
- +#define BCMCPU_VARIANT_IS_6338() \
- + (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
- +#define BCMCPU_VARIANT_IS_6345() \
- + (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
- +#define BCMCPU_VARIANT_IS_6348() \
- + (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
- +#define BCMCPU_VARIANT_IS_6358() \
- + (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
- +#define BCMCPU_VARIANT_IS_6362() \
- + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- +#define BCMCPU_VARIANT_IS_6368() \
- + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
- +
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
- * address of these sets do change.
|