0266-clk-bcm2835-Fix-PLL-poweron.patch 1.3 KB

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  1. From 2ecc0a11eb0e77a75c2ae468d656c773877f3997 Mon Sep 17 00:00:00 2001
  2. From: Eric Anholt <eric@anholt.net>
  3. Date: Wed, 13 Apr 2016 13:05:03 -0700
  4. Subject: [PATCH 266/381] clk: bcm2835: Fix PLL poweron
  5. In poweroff, we set the reset bit and the power down bit, but only
  6. managed to unset the reset bit for poweron. This meant that if HDMI
  7. did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
  8. PLLH (that had been on at boot time) and never recover.
  9. Signed-off-by: Eric Anholt <eric@anholt.net>
  10. Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
  11. Cc: stable@vger.kernel.org
  12. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  13. (cherry picked from commit d794a7b18350b7538e64248adf639f2cb8da5fb7)
  14. ---
  15. drivers/clk/bcm/clk-bcm2835.c | 4 ++++
  16. 1 file changed, 4 insertions(+)
  17. --- a/drivers/clk/bcm/clk-bcm2835.c
  18. +++ b/drivers/clk/bcm/clk-bcm2835.c
  19. @@ -561,6 +561,10 @@ static int bcm2835_pll_on(struct clk_hw
  20. cprman_read(cprman, data->a2w_ctrl_reg) &
  21. ~A2W_PLL_CTRL_PWRDN);
  22. + cprman_write(cprman, data->a2w_ctrl_reg,
  23. + cprman_read(cprman, data->a2w_ctrl_reg) &
  24. + ~A2W_PLL_CTRL_PWRDN);
  25. +
  26. /* Take the PLL out of reset. */
  27. cprman_write(cprman, data->cm_ctrl_reg,
  28. cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);