123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100 |
- --- a/arch/mips/ath79/irq.c
- +++ b/arch/mips/ath79/irq.c
- @@ -26,6 +26,8 @@
-
- static void (*ath79_ip2_handler)(void);
- static void (*ath79_ip3_handler)(void);
- +static struct irq_chip ip2_chip;
- +static struct irq_chip ip3_chip;
-
- static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
- {
- @@ -150,8 +152,7 @@ static void ar934x_ip2_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip,
- - handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
- }
- @@ -183,7 +184,7 @@ static void qca953x_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch);
- }
- @@ -257,15 +258,13 @@ static void qca955x_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip,
- - handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch);
-
- for (i = ATH79_IP3_IRQ_BASE;
- i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip,
- - handle_level_irq);
- + irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch);
- }
- @@ -346,13 +345,13 @@ static void qca956x_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch);
-
- for (i = ATH79_IP3_IRQ_BASE;
- i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq);
- + irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch);
-
- @@ -467,8 +466,35 @@ static void qca953x_ip3_handler(void)
- do_IRQ(ATH79_CPU_IRQ(3));
- }
-
- +static void ath79_ip2_disable(struct irq_data *data)
- +{
- + disable_irq(ATH79_CPU_IRQ(2));
- +}
- +
- +static void ath79_ip2_enable(struct irq_data *data)
- +{
- + enable_irq(ATH79_CPU_IRQ(2));
- +}
- +
- +static void ath79_ip3_disable(struct irq_data *data)
- +{
- + disable_irq(ATH79_CPU_IRQ(3));
- +}
- +
- +static void ath79_ip3_enable(struct irq_data *data)
- +{
- + enable_irq(ATH79_CPU_IRQ(3));
- +}
- +
- void __init arch_init_irq(void)
- {
- + ip2_chip = dummy_irq_chip;
- + ip3_chip = dummy_irq_chip;
- + ip2_chip.irq_disable = ath79_ip2_disable;
- + ip2_chip.irq_enable = ath79_ip2_enable;
- + ip3_chip.irq_disable = ath79_ip3_disable;
- + ip3_chip.irq_enable = ath79_ip3_enable;
- +
- if (soc_is_ar71xx()) {
- ath79_ip2_handler = ar71xx_ip2_handler;
- ath79_ip3_handler = ar71xx_ip3_handler;
|