driver-avalon2.c 30 KB

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  1. /*
  2. * Copyright 2013-2014 Con Kolivas <kernel@kolivas.org>
  3. * Copyright 2012-2014 Xiangfu <xiangfu@openmobilefree.com>
  4. * Copyright 2012 Luke Dashjr
  5. * Copyright 2012 Andrew Smith
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 3 of the License, or (at your option)
  10. * any later version. See COPYING for more details.
  11. */
  12. #include "config.h"
  13. #include <limits.h>
  14. #include <pthread.h>
  15. #include <stdio.h>
  16. #include <sys/time.h>
  17. #include <sys/types.h>
  18. #include <dirent.h>
  19. #include <unistd.h>
  20. #ifndef WIN32
  21. #include <termios.h>
  22. #include <sys/stat.h>
  23. #include <fcntl.h>
  24. #ifndef O_CLOEXEC
  25. #define O_CLOEXEC 0
  26. #endif
  27. #else
  28. #include <windows.h>
  29. #include <io.h>
  30. #endif
  31. #include "elist.h"
  32. #include "miner.h"
  33. #include "fpgautils.h"
  34. #include "driver-avalon2.h"
  35. #include "crc.h"
  36. #include "sha2.h"
  37. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  38. ASSERT1(sizeof(uint32_t) == 4);
  39. #define get_fan_pwm(v) (AVA2_PWM_MAX - (v) * AVA2_PWM_MAX / 100)
  40. int opt_avalon2_freq_min;
  41. int opt_avalon2_freq_max;
  42. int opt_avalon2_fan_min = AVA2_DEFAULT_FAN_MIN;
  43. int opt_avalon2_fan_max = AVA2_DEFAULT_FAN_MAX;
  44. static int avalon2_fan_min = get_fan_pwm(AVA2_DEFAULT_FAN_MIN);
  45. static int avalon2_fan_max = get_fan_pwm(AVA2_DEFAULT_FAN_MAX);
  46. int opt_avalon2_voltage_min;
  47. int opt_avalon2_voltage_max;
  48. int opt_avalon2_overheat = AVALON2_TEMP_OVERHEAT;
  49. int opt_avalon2_polling_delay = AVALON2_DEFAULT_POLLING_DELAY;
  50. enum avalon2_fan_fixed opt_avalon2_fan_fixed = FAN_AUTO;
  51. #define UNPACK32(x, str) \
  52. { \
  53. *((str) + 3) = (uint8_t) ((x) ); \
  54. *((str) + 2) = (uint8_t) ((x) >> 8); \
  55. *((str) + 1) = (uint8_t) ((x) >> 16); \
  56. *((str) + 0) = (uint8_t) ((x) >> 24); \
  57. }
  58. static void sha256_prehash(const unsigned char *message, unsigned int len, unsigned char *digest)
  59. {
  60. sha256_ctx ctx;
  61. int i;
  62. sha256_init(&ctx);
  63. sha256_update(&ctx, message, len);
  64. for (i = 0; i < 8; i++) {
  65. UNPACK32(ctx.h[i], &digest[i << 2]);
  66. }
  67. }
  68. static inline uint8_t rev8(uint8_t d)
  69. {
  70. int i;
  71. uint8_t out = 0;
  72. /* (from left to right) */
  73. for (i = 0; i < 8; i++)
  74. if (d & (1 << i))
  75. out |= (1 << (7 - i));
  76. return out;
  77. }
  78. char *set_avalon2_fan(char *arg)
  79. {
  80. int val1, val2, ret;
  81. ret = sscanf(arg, "%d-%d", &val1, &val2);
  82. if (ret < 1)
  83. return "No values passed to avalon2-fan";
  84. if (ret == 1)
  85. val2 = val1;
  86. if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
  87. return "Invalid value passed to avalon2-fan";
  88. opt_avalon2_fan_min = val1;
  89. opt_avalon2_fan_max = val2;
  90. avalon2_fan_min = get_fan_pwm(val1);
  91. avalon2_fan_max = get_fan_pwm(val2);
  92. return NULL;
  93. }
  94. char *set_avalon2_fixed_speed(enum avalon2_fan_fixed *f)
  95. {
  96. *f = FAN_FIXED;
  97. return NULL;
  98. }
  99. char *set_avalon2_freq(char *arg)
  100. {
  101. int val1, val2, ret;
  102. ret = sscanf(arg, "%d-%d", &val1, &val2);
  103. if (ret < 1)
  104. return "No values passed to avalon2-freq";
  105. if (ret == 1)
  106. val2 = val1;
  107. if (val1 < AVA2_DEFAULT_FREQUENCY_MIN || val1 > AVA2_DEFAULT_FREQUENCY_MAX ||
  108. val2 < AVA2_DEFAULT_FREQUENCY_MIN || val2 > AVA2_DEFAULT_FREQUENCY_MAX ||
  109. val2 < val1)
  110. return "Invalid value passed to avalon2-freq";
  111. opt_avalon2_freq_min = val1;
  112. opt_avalon2_freq_max = val2;
  113. return NULL;
  114. }
  115. char *set_avalon2_voltage(char *arg)
  116. {
  117. int val1, val2, ret;
  118. ret = sscanf(arg, "%d-%d", &val1, &val2);
  119. if (ret < 1)
  120. return "No values passed to avalon2-voltage";
  121. if (ret == 1)
  122. val2 = val1;
  123. if (val1 < AVA2_DEFAULT_VOLTAGE_MIN || val1 > AVA2_DEFAULT_VOLTAGE_MAX ||
  124. val2 < AVA2_DEFAULT_VOLTAGE_MIN || val2 > AVA2_DEFAULT_VOLTAGE_MAX ||
  125. val2 < val1)
  126. return "Invalid value passed to avalon2-voltage";
  127. opt_avalon2_voltage_min = val1;
  128. opt_avalon2_voltage_max = val2;
  129. return NULL;
  130. }
  131. static int avalon2_init_pkg(struct avalon2_pkg *pkg, uint8_t type, uint8_t idx, uint8_t cnt)
  132. {
  133. unsigned short crc;
  134. pkg->head[0] = AVA2_H1;
  135. pkg->head[1] = AVA2_H2;
  136. pkg->type = type;
  137. pkg->idx = idx;
  138. pkg->cnt = cnt;
  139. crc = crc16(pkg->data, AVA2_P_DATA_LEN);
  140. pkg->crc[0] = (crc & 0xff00) >> 8;
  141. pkg->crc[1] = crc & 0x00ff;
  142. return 0;
  143. }
  144. static int job_idcmp(uint8_t *job_id, char *pool_job_id)
  145. {
  146. int job_id_len;
  147. unsigned short crc, crc_expect;
  148. if (!pool_job_id)
  149. return 1;
  150. job_id_len = strlen(pool_job_id);
  151. crc_expect = crc16((unsigned char *)pool_job_id, job_id_len);
  152. crc = job_id[0] << 8 | job_id[1];
  153. if (crc_expect == crc)
  154. return 0;
  155. applog(LOG_DEBUG, "Avalon2: job_id not match! [%04x:%04x (%s)]",
  156. crc, crc_expect, pool_job_id);
  157. return 1;
  158. }
  159. static inline int get_temp_max(struct avalon2_info *info)
  160. {
  161. int i;
  162. for (i = 0; i < 2 * AVA2_DEFAULT_MODULARS; i++) {
  163. if (info->temp_max <= info->temp[i])
  164. info->temp_max = info->temp[i];
  165. }
  166. return info->temp_max;
  167. }
  168. static inline int get_current_temp_max(struct avalon2_info *info)
  169. {
  170. int i;
  171. int t = info->temp[0];
  172. for (i = 1; i < 2 * AVA2_DEFAULT_MODULARS; i++) {
  173. if (info->temp[i] > t)
  174. t = info->temp[i];
  175. }
  176. return t;
  177. }
  178. /* http://www.onsemi.com/pub_link/Collateral/ADP3208D.PDF */
  179. static inline uint32_t encode_voltage(uint32_t v)
  180. {
  181. return rev8((0x78 - v / 125) << 1 | 1) << 8;
  182. }
  183. static inline uint32_t decode_voltage(uint32_t v)
  184. {
  185. return (0x78 - (rev8(v >> 8) >> 1)) * 125;
  186. }
  187. static void adjust_fan(struct avalon2_info *info)
  188. {
  189. int t;
  190. if (opt_avalon2_fan_fixed == FAN_FIXED) {
  191. info->fan_pct = opt_avalon2_fan_min;
  192. info->fan_pwm = get_fan_pwm(info->fan_pct);
  193. return;
  194. }
  195. t = get_current_temp_max(info);
  196. /* TODO: Add options for temperature range and fan adjust function */
  197. if (t < 60)
  198. info->fan_pct = opt_avalon2_fan_min;
  199. else if (t > 80)
  200. info->fan_pct = opt_avalon2_fan_max;
  201. else
  202. info->fan_pct = (t - 60) * (opt_avalon2_fan_max - opt_avalon2_fan_min) / 20 + opt_avalon2_fan_min;
  203. info->fan_pwm = get_fan_pwm(info->fan_pct);
  204. }
  205. static inline int mm_cmp_1404(struct avalon2_info *info, int modular)
  206. {
  207. /* <= 1404 return 1 */
  208. char *mm_1404 = "1404";
  209. return strncmp(info->mm_version[modular] + 2, mm_1404, 4) > 0 ? 0 : 1;
  210. }
  211. static inline int mm_cmp_1406(struct avalon2_info *info)
  212. {
  213. /* <= 1406 return 1 */
  214. char *mm_1406 = "1406";
  215. int i;
  216. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  217. if (info->enable[i] &&
  218. strncmp(info->mm_version[i] + 2, mm_1406, 4) <= 0)
  219. return 1;
  220. }
  221. return 0;
  222. }
  223. static int decode_pkg(struct thr_info *thr, struct avalon2_ret *ar, uint8_t *pkg)
  224. {
  225. struct cgpu_info *avalon2 = thr->cgpu;
  226. struct avalon2_info *info = avalon2->device_data;
  227. struct pool *pool, *real_pool, *pool_stratum = &info->pool;
  228. unsigned int expected_crc;
  229. unsigned int actual_crc;
  230. uint32_t nonce, nonce2, miner, modular_id;
  231. int pool_no;
  232. uint8_t job_id[4];
  233. int tmp;
  234. int type = AVA2_GETS_ERROR;
  235. memcpy((uint8_t *)ar, pkg, AVA2_READ_SIZE);
  236. if (ar->head[0] == AVA2_H1 && ar->head[1] == AVA2_H2) {
  237. expected_crc = crc16(ar->data, AVA2_P_DATA_LEN);
  238. actual_crc = (ar->crc[0] & 0xff) |
  239. ((ar->crc[1] & 0xff) << 8);
  240. type = ar->type;
  241. applog(LOG_DEBUG, "Avalon2: %d: expected crc(%04x), actual_crc(%04x)",
  242. type, expected_crc, actual_crc);
  243. if (expected_crc != actual_crc)
  244. goto out;
  245. memcpy(&modular_id, ar->data + 28, 4);
  246. modular_id = be32toh(modular_id);
  247. if (modular_id > 3)
  248. modular_id = 0;
  249. switch(type) {
  250. case AVA2_P_NONCE:
  251. applog(LOG_DEBUG, "Avalon2: AVA2_P_NONCE");
  252. memcpy(&miner, ar->data + 0, 4);
  253. memcpy(&pool_no, ar->data + 4, 4);
  254. memcpy(&nonce2, ar->data + 8, 4);
  255. /* Calc time ar->data + 12 */
  256. memcpy(&nonce, ar->data + 16, 4);
  257. memcpy(job_id, ar->data + 20, 4);
  258. miner = be32toh(miner);
  259. pool_no = be32toh(pool_no);
  260. if (miner >= AVA2_DEFAULT_MINERS ||
  261. modular_id >= AVA2_DEFAULT_MINERS ||
  262. pool_no >= total_pools ||
  263. pool_no < 0) {
  264. applog(LOG_DEBUG, "Avalon2: Wrong miner/pool/id no %d,%d,%d", miner, pool_no, modular_id);
  265. break;
  266. } else
  267. info->matching_work[modular_id * AVA2_DEFAULT_MINERS + miner]++;
  268. nonce2 = be32toh(nonce2);
  269. nonce = be32toh(nonce);
  270. nonce -= 0x180;
  271. applog(LOG_DEBUG, "Avalon2: Found! %d: (%08x) (%08x)",
  272. pool_no, nonce2, nonce);
  273. real_pool = pool = pools[pool_no];
  274. if (job_idcmp(job_id, pool->swork.job_id)) {
  275. if (!job_idcmp(job_id, pool_stratum->swork.job_id)) {
  276. applog(LOG_DEBUG, "Avalon2: Match to previous stratum! (%s)", pool_stratum->swork.job_id);
  277. pool = pool_stratum;
  278. } else {
  279. applog(LOG_ERR, "Avalon2: Cannot match to any stratum! (%s)", pool->swork.job_id);
  280. break;
  281. }
  282. }
  283. if (submit_nonce2_nonce(thr, pool, real_pool, nonce2, nonce, 0))
  284. info->failing = false;
  285. break;
  286. case AVA2_P_STATUS:
  287. applog(LOG_DEBUG, "Avalon2: AVA2_P_STATUS");
  288. memcpy(&tmp, ar->data, 4);
  289. tmp = be32toh(tmp);
  290. info->temp[0 + modular_id * 2] = tmp >> 16;
  291. info->temp[1 + modular_id * 2] = tmp & 0xffff;
  292. memcpy(&tmp, ar->data + 4, 4);
  293. tmp = be32toh(tmp);
  294. info->fan[0 + modular_id * 2] = tmp >> 16;
  295. info->fan[1 + modular_id * 2] = tmp & 0xffff;
  296. memcpy(&(info->get_frequency[modular_id]), ar->data + 8, 4);
  297. memcpy(&(info->get_voltage[modular_id]), ar->data + 12, 4);
  298. memcpy(&(info->local_work[modular_id]), ar->data + 16, 4);
  299. memcpy(&(info->hw_work[modular_id]), ar->data + 20, 4);
  300. memcpy(&(info->power_good[modular_id]), ar->data + 24, 4);
  301. info->get_frequency[modular_id] = be32toh(info->get_frequency[modular_id]);
  302. if (info->dev_type[modular_id] == AVA2_ID_AVA3)
  303. info->get_frequency[modular_id] = info->get_frequency[modular_id] * 768 / 65;
  304. info->get_voltage[modular_id] = be32toh(info->get_voltage[modular_id]);
  305. info->local_work[modular_id] = be32toh(info->local_work[modular_id]);
  306. info->hw_work[modular_id] = be32toh(info->hw_work[modular_id]);
  307. info->local_works[modular_id] += info->local_work[modular_id];
  308. info->hw_works[modular_id] += info->hw_work[modular_id];
  309. info->get_voltage[modular_id] = decode_voltage(info->get_voltage[modular_id]);
  310. info->power_good[modular_id] = info->power_good[modular_id] >> 24;
  311. avalon2->temp = get_temp_max(info);
  312. break;
  313. case AVA2_P_ACKDETECT:
  314. applog(LOG_DEBUG, "Avalon2: AVA2_P_ACKDETECT");
  315. break;
  316. case AVA2_P_ACK:
  317. applog(LOG_DEBUG, "Avalon2: AVA2_P_ACK");
  318. break;
  319. case AVA2_P_NAK:
  320. applog(LOG_DEBUG, "Avalon2: AVA2_P_NAK");
  321. break;
  322. default:
  323. applog(LOG_DEBUG, "Avalon2: Unknown response");
  324. type = AVA2_GETS_ERROR;
  325. break;
  326. }
  327. }
  328. out:
  329. return type;
  330. }
  331. static inline int avalon2_gets(struct cgpu_info *avalon2, uint8_t *buf)
  332. {
  333. int read_amount = AVA2_READ_SIZE, ret = 0;
  334. uint8_t *buf_back = buf;
  335. while (true) {
  336. int err;
  337. do {
  338. memset(buf, 0, read_amount);
  339. err = usb_read(avalon2, (char *)buf, read_amount, &ret, C_AVA2_READ);
  340. if (unlikely(err && err != LIBUSB_ERROR_TIMEOUT)) {
  341. applog(LOG_ERR, "Avalon2: Error %d on read in avalon_gets got %d", err, ret);
  342. return AVA2_GETS_ERROR;
  343. }
  344. if (likely(ret >= read_amount)) {
  345. if (unlikely(buf_back[0] != AVA2_H1 || buf_back[1] != AVA2_H2))
  346. return AVA2_GETS_ERROR;
  347. return AVA2_GETS_OK;
  348. }
  349. buf += ret;
  350. read_amount -= ret;
  351. } while (ret > 0);
  352. return AVA2_GETS_TIMEOUT;
  353. }
  354. }
  355. static int avalon2_send_pkg(struct cgpu_info *avalon2, const struct avalon2_pkg *pkg)
  356. {
  357. int err, amount;
  358. uint8_t buf[AVA2_WRITE_SIZE];
  359. int nr_len = AVA2_WRITE_SIZE;
  360. if (unlikely(avalon2->usbinfo.nodev))
  361. return AVA2_SEND_ERROR;
  362. memcpy(buf, pkg, AVA2_WRITE_SIZE);
  363. err = usb_write(avalon2, (char *)buf, nr_len, &amount, C_AVA2_WRITE);
  364. if (err || amount != nr_len) {
  365. applog(LOG_DEBUG, "Avalon2: Send(%d)!", amount);
  366. usb_nodev(avalon2);
  367. return AVA2_SEND_ERROR;
  368. }
  369. return AVA2_SEND_OK;
  370. }
  371. static void avalon2_stratum_pkgs(struct cgpu_info *avalon2, struct pool *pool)
  372. {
  373. const int merkle_offset = 36;
  374. struct avalon2_pkg pkg;
  375. int i, a, b, tmp;
  376. unsigned char target[32];
  377. int job_id_len, n2size;
  378. unsigned short crc;
  379. int diff;
  380. /* Cap maximum diff in order to still get shares */
  381. diff = pool->swork.diff;
  382. if (diff > 64)
  383. diff = 64;
  384. else if (unlikely(diff < 1))
  385. diff = 1;
  386. /* Send out the first stratum message STATIC */
  387. applog(LOG_DEBUG, "Avalon2: Pool stratum message STATIC: %d, %d, %d, %d, %d",
  388. pool->coinbase_len,
  389. pool->nonce2_offset,
  390. pool->n2size,
  391. merkle_offset,
  392. pool->merkles);
  393. memset(pkg.data, 0, AVA2_P_DATA_LEN);
  394. tmp = be32toh(pool->coinbase_len);
  395. memcpy(pkg.data, &tmp, 4);
  396. tmp = be32toh(pool->nonce2_offset);
  397. memcpy(pkg.data + 4, &tmp, 4);
  398. n2size = pool->n2size >= 4 ? 4 : pool->n2size;
  399. tmp = be32toh(n2size);
  400. memcpy(pkg.data + 8, &tmp, 4);
  401. tmp = be32toh(merkle_offset);
  402. memcpy(pkg.data + 12, &tmp, 4);
  403. tmp = be32toh(pool->merkles);
  404. memcpy(pkg.data + 16, &tmp, 4);
  405. tmp = be32toh(diff);
  406. memcpy(pkg.data + 20, &tmp, 4);
  407. tmp = be32toh((int)pool->pool_no);
  408. memcpy(pkg.data + 24, &tmp, 4);
  409. avalon2_init_pkg(&pkg, AVA2_P_STATIC, 1, 1);
  410. if (avalon2_send_pkg(avalon2, &pkg))
  411. return;
  412. set_target(target, pool->sdiff);
  413. memcpy(pkg.data, target, 32);
  414. if (opt_debug) {
  415. char *target_str;
  416. target_str = bin2hex(target, 32);
  417. applog(LOG_DEBUG, "Avalon2: Pool stratum target: %s", target_str);
  418. free(target_str);
  419. }
  420. avalon2_init_pkg(&pkg, AVA2_P_TARGET, 1, 1);
  421. if (avalon2_send_pkg(avalon2, &pkg))
  422. return;
  423. applog(LOG_DEBUG, "Avalon2: Pool stratum message JOBS_ID: %s",
  424. pool->swork.job_id);
  425. memset(pkg.data, 0, AVA2_P_DATA_LEN);
  426. job_id_len = strlen(pool->swork.job_id);
  427. crc = crc16((unsigned char *)pool->swork.job_id, job_id_len);
  428. pkg.data[0] = (crc & 0xff00) >> 8;
  429. pkg.data[1] = crc & 0x00ff;
  430. avalon2_init_pkg(&pkg, AVA2_P_JOB_ID, 1, 1);
  431. if (avalon2_send_pkg(avalon2, &pkg))
  432. return;
  433. if (pool->coinbase_len > AVA2_P_COINBASE_SIZE) {
  434. int coinbase_len_posthash, coinbase_len_prehash;
  435. uint8_t coinbase_prehash[32];
  436. coinbase_len_prehash = pool->nonce2_offset - (pool->nonce2_offset % SHA256_BLOCK_SIZE);
  437. coinbase_len_posthash = pool->coinbase_len - coinbase_len_prehash;
  438. sha256_prehash(pool->coinbase, coinbase_len_prehash, coinbase_prehash);
  439. a = (coinbase_len_posthash / AVA2_P_DATA_LEN) + 1;
  440. b = coinbase_len_posthash % AVA2_P_DATA_LEN;
  441. memcpy(pkg.data, coinbase_prehash, 32);
  442. avalon2_init_pkg(&pkg, AVA2_P_COINBASE, 1, a + (b ? 1 : 0));
  443. if (avalon2_send_pkg(avalon2, &pkg))
  444. return;
  445. applog(LOG_DEBUG, "Avalon2: Pool stratum message modified COINBASE: %d %d", a, b);
  446. for (i = 1; i < a; i++) {
  447. memcpy(pkg.data, pool->coinbase + coinbase_len_prehash + i * 32 - 32, 32);
  448. avalon2_init_pkg(&pkg, AVA2_P_COINBASE, i + 1, a + (b ? 1 : 0));
  449. if (avalon2_send_pkg(avalon2, &pkg))
  450. return;
  451. }
  452. if (b) {
  453. memset(pkg.data, 0, AVA2_P_DATA_LEN);
  454. memcpy(pkg.data, pool->coinbase + coinbase_len_prehash + i * 32 - 32, b);
  455. avalon2_init_pkg(&pkg, AVA2_P_COINBASE, i + 1, i + 1);
  456. if (avalon2_send_pkg(avalon2, &pkg))
  457. return;
  458. }
  459. } else {
  460. a = pool->coinbase_len / AVA2_P_DATA_LEN;
  461. b = pool->coinbase_len % AVA2_P_DATA_LEN;
  462. applog(LOG_DEBUG, "Avalon2: Pool stratum message COINBASE: %d %d", a, b);
  463. for (i = 0; i < a; i++) {
  464. memcpy(pkg.data, pool->coinbase + i * 32, 32);
  465. avalon2_init_pkg(&pkg, AVA2_P_COINBASE, i + 1, a + (b ? 1 : 0));
  466. if (avalon2_send_pkg(avalon2, &pkg))
  467. return;
  468. }
  469. if (b) {
  470. memset(pkg.data, 0, AVA2_P_DATA_LEN);
  471. memcpy(pkg.data, pool->coinbase + i * 32, b);
  472. avalon2_init_pkg(&pkg, AVA2_P_COINBASE, i + 1, i + 1);
  473. if (avalon2_send_pkg(avalon2, &pkg))
  474. return;
  475. }
  476. }
  477. b = pool->merkles;
  478. applog(LOG_DEBUG, "Avalon2: Pool stratum message MERKLES: %d", b);
  479. for (i = 0; i < b; i++) {
  480. memset(pkg.data, 0, AVA2_P_DATA_LEN);
  481. memcpy(pkg.data, pool->swork.merkle_bin[i], 32);
  482. avalon2_init_pkg(&pkg, AVA2_P_MERKLES, i + 1, b);
  483. if (avalon2_send_pkg(avalon2, &pkg))
  484. return;
  485. }
  486. applog(LOG_DEBUG, "Avalon2: Pool stratum message HEADER: 4");
  487. for (i = 0; i < 4; i++) {
  488. memset(pkg.data, 0, AVA2_P_HEADER);
  489. memcpy(pkg.data, pool->header_bin + i * 32, 32);
  490. avalon2_init_pkg(&pkg, AVA2_P_HEADER, i + 1, 4);
  491. if (avalon2_send_pkg(avalon2, &pkg))
  492. return;
  493. }
  494. }
  495. static void avalon2_initialise(struct cgpu_info *avalon2)
  496. {
  497. uint32_t ava2_data[2] = { PL2303_VALUE_LINE0, PL2303_VALUE_LINE1 };
  498. int interface;
  499. if (avalon2->usbinfo.nodev)
  500. return;
  501. interface = usb_interface(avalon2);
  502. // Set Data Control
  503. usb_transfer(avalon2, PL2303_VENDOR_OUT, PL2303_REQUEST_VENDOR, 8,
  504. interface, C_VENDOR);
  505. if (avalon2->usbinfo.nodev)
  506. return;
  507. usb_transfer(avalon2, PL2303_VENDOR_OUT, PL2303_REQUEST_VENDOR, 9,
  508. interface, C_VENDOR);
  509. if (avalon2->usbinfo.nodev)
  510. return;
  511. // Set Line Control
  512. usb_transfer_data(avalon2, PL2303_CTRL_OUT, PL2303_REQUEST_LINE, PL2303_VALUE_LINE,
  513. interface, ava2_data, PL2303_VALUE_LINE_SIZE, C_SETLINE);
  514. if (avalon2->usbinfo.nodev)
  515. return;
  516. // Vendor
  517. usb_transfer(avalon2, PL2303_VENDOR_OUT, PL2303_REQUEST_VENDOR, PL2303_VALUE_VENDOR,
  518. interface, C_VENDOR);
  519. if (avalon2->usbinfo.nodev)
  520. return;
  521. // Set More Line Control ?
  522. usb_transfer(avalon2, PL2303_CTRL_OUT, PL2303_REQUEST_CTRL, 3, interface, C_SETLINE);
  523. }
  524. static struct cgpu_info *avalon2_detect_one(struct libusb_device *dev, struct usb_find_devices *found)
  525. {
  526. struct avalon2_info *info;
  527. int ackdetect;
  528. int err, amount;
  529. int tmp, i, j, modular[AVA2_DEFAULT_MODULARS] = {};
  530. char mm_version[AVA2_DEFAULT_MODULARS][16];
  531. struct cgpu_info *avalon2 = usb_alloc_cgpu(&avalon2_drv, 1);
  532. struct avalon2_pkg detect_pkg;
  533. struct avalon2_ret ret_pkg;
  534. if (!usb_init(avalon2, dev, found)) {
  535. applog(LOG_ERR, "Avalon2 failed usb_init");
  536. avalon2 = usb_free_cgpu(avalon2);
  537. return NULL;
  538. }
  539. avalon2_initialise(avalon2);
  540. for (j = 0; j < 2; j++) {
  541. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  542. strcpy(mm_version[i], AVA2_MM_VERNULL);
  543. /* Send out detect pkg */
  544. memset(detect_pkg.data, 0, AVA2_P_DATA_LEN);
  545. tmp = be32toh(i);
  546. memcpy(detect_pkg.data + 28, &tmp, 4);
  547. avalon2_init_pkg(&detect_pkg, AVA2_P_DETECT, 1, 1);
  548. avalon2_send_pkg(avalon2, &detect_pkg);
  549. err = usb_read(avalon2, (char *)&ret_pkg, AVA2_READ_SIZE, &amount, C_AVA2_READ);
  550. if (err < 0 || amount != AVA2_READ_SIZE) {
  551. applog(LOG_DEBUG, "%s %d: Avalon2 failed usb_read with err %d amount %d",
  552. avalon2->drv->name, avalon2->device_id, err, amount);
  553. continue;
  554. }
  555. ackdetect = ret_pkg.type;
  556. applog(LOG_DEBUG, "Avalon2 Detect ID[%d]: %d", i, ackdetect);
  557. if (ackdetect != AVA2_P_ACKDETECT && modular[i] == 0)
  558. continue;
  559. modular[i] = 1;
  560. memcpy(mm_version[i], ret_pkg.data, 15);
  561. mm_version[i][15] = '\0';
  562. }
  563. }
  564. if (!modular[0] && !modular[1] && !modular[2] && !modular[3]) {
  565. applog(LOG_DEBUG, "Not an Avalon2 device");
  566. usb_uninit(avalon2);
  567. usb_free_cgpu(avalon2);
  568. return NULL;
  569. }
  570. /* We have a real Avalon! */
  571. avalon2->threads = AVA2_MINER_THREADS;
  572. add_cgpu(avalon2);
  573. update_usb_stats(avalon2);
  574. applog(LOG_INFO, "%s %d: Found at %s", avalon2->drv->name, avalon2->device_id,
  575. avalon2->device_path);
  576. avalon2->device_data = calloc(sizeof(struct avalon2_info), 1);
  577. if (unlikely(!(avalon2->device_data)))
  578. quit(1, "Failed to calloc avalon2_info");
  579. info = avalon2->device_data;
  580. info->fan_pwm = get_fan_pwm(AVA2_DEFAULT_FAN_PWM);
  581. info->temp_max = 0;
  582. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  583. strcpy(info->mm_version[i], mm_version[i]);
  584. info->modulars[i] = modular[i]; /* Enable modular */
  585. info->enable[i] = modular[i];
  586. info->dev_type[i] = AVA2_ID_AVAX;
  587. if (!strncmp((char *)&(info->mm_version[i]), AVA2_FW2_PREFIXSTR, 2)) {
  588. info->dev_type[i] = AVA2_ID_AVA2;
  589. info->set_voltage = AVA2_DEFAULT_VOLTAGE_MIN;
  590. info->set_frequency = AVA2_DEFAULT_FREQUENCY;
  591. }
  592. if (!strncmp((char *)&(info->mm_version[i]), AVA2_FW3_PREFIXSTR, 2)) {
  593. info->dev_type[i] = AVA2_ID_AVA3;
  594. info->set_voltage = AVA2_AVA3_VOLTAGE;
  595. info->set_frequency = AVA2_AVA3_FREQUENCY;
  596. }
  597. }
  598. if (!opt_avalon2_voltage_min)
  599. opt_avalon2_voltage_min = opt_avalon2_voltage_max = info->set_voltage;
  600. if (!opt_avalon2_freq_min)
  601. opt_avalon2_freq_min = opt_avalon2_freq_max = info->set_frequency;
  602. return avalon2;
  603. }
  604. static inline void avalon2_detect(bool __maybe_unused hotplug)
  605. {
  606. usb_detect(&avalon2_drv, avalon2_detect_one);
  607. }
  608. static bool avalon2_prepare(struct thr_info *thr)
  609. {
  610. struct cgpu_info *avalon2 = thr->cgpu;
  611. struct avalon2_info *info = avalon2->device_data;
  612. cglock_init(&info->pool.data_lock);
  613. return true;
  614. }
  615. static int polling(struct thr_info *thr, struct cgpu_info *avalon2, struct avalon2_info *info)
  616. {
  617. struct avalon2_pkg send_pkg;
  618. struct avalon2_ret ar;
  619. int i, tmp;
  620. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  621. if (info->modulars[i] && info->enable[i]) {
  622. uint8_t result[AVA2_READ_SIZE];
  623. int ret;
  624. cgsleep_ms(opt_avalon2_polling_delay);
  625. memset(send_pkg.data, 0, AVA2_P_DATA_LEN);
  626. tmp = be32toh(info->led_red[i]); /* RED LED */
  627. memcpy(send_pkg.data + 12, &tmp, 4);
  628. tmp = be32toh(i); /* ID */
  629. memcpy(send_pkg.data + 28, &tmp, 4);
  630. if (info->led_red[i] && mm_cmp_1404(info, i)) {
  631. avalon2_init_pkg(&send_pkg, AVA2_P_TEST, 1, 1);
  632. avalon2_send_pkg(avalon2, &send_pkg);
  633. info->enable[i] = 0;
  634. continue;
  635. } else
  636. avalon2_init_pkg(&send_pkg, AVA2_P_POLLING, 1, 1);
  637. avalon2_send_pkg(avalon2, &send_pkg);
  638. ret = avalon2_gets(avalon2, result);
  639. if (ret == AVA2_GETS_OK)
  640. decode_pkg(thr, &ar, result);
  641. }
  642. }
  643. return 0;
  644. }
  645. static void copy_pool_stratum(struct avalon2_info *info, struct pool *pool)
  646. {
  647. int i;
  648. int merkles = pool->merkles;
  649. size_t coinbase_len = pool->coinbase_len;
  650. struct pool *pool_stratum = &info->pool;
  651. if (!job_idcmp((unsigned char *)pool->swork.job_id, pool_stratum->swork.job_id))
  652. return;
  653. cg_wlock(&pool_stratum->data_lock);
  654. free(pool_stratum->swork.job_id);
  655. free(pool_stratum->nonce1);
  656. free(pool_stratum->coinbase);
  657. align_len(&coinbase_len);
  658. pool_stratum->coinbase = calloc(coinbase_len, 1);
  659. if (unlikely(!pool_stratum->coinbase))
  660. quit(1, "Failed to calloc pool_stratum coinbase in avalon2");
  661. memcpy(pool_stratum->coinbase, pool->coinbase, coinbase_len);
  662. for (i = 0; i < pool_stratum->merkles; i++)
  663. free(pool_stratum->swork.merkle_bin[i]);
  664. if (merkles) {
  665. pool_stratum->swork.merkle_bin = realloc(pool_stratum->swork.merkle_bin,
  666. sizeof(char *) * merkles + 1);
  667. for (i = 0; i < merkles; i++) {
  668. pool_stratum->swork.merkle_bin[i] = malloc(32);
  669. if (unlikely(!pool_stratum->swork.merkle_bin[i]))
  670. quit(1, "Failed to malloc pool_stratum swork merkle_bin");
  671. memcpy(pool_stratum->swork.merkle_bin[i], pool->swork.merkle_bin[i], 32);
  672. }
  673. }
  674. pool_stratum->sdiff = pool->sdiff;
  675. pool_stratum->coinbase_len = pool->coinbase_len;
  676. pool_stratum->nonce2_offset = pool->nonce2_offset;
  677. pool_stratum->n2size = pool->n2size;
  678. pool_stratum->merkles = pool->merkles;
  679. pool_stratum->swork.job_id = strdup(pool->swork.job_id);
  680. pool_stratum->nonce1 = strdup(pool->nonce1);
  681. memcpy(pool_stratum->ntime, pool->ntime, sizeof(pool_stratum->ntime));
  682. memcpy(pool_stratum->header_bin, pool->header_bin, sizeof(pool_stratum->header_bin));
  683. cg_wunlock(&pool_stratum->data_lock);
  684. }
  685. static void avalon2_update(struct cgpu_info *avalon2)
  686. {
  687. struct avalon2_info *info = avalon2->device_data;
  688. struct thr_info *thr = avalon2->thr[0];
  689. struct avalon2_pkg send_pkg;
  690. uint32_t tmp, range, start;
  691. struct work *work;
  692. struct pool *pool;
  693. applog(LOG_DEBUG, "Avalon2: New stratum: restart: %d, update: %d",
  694. thr->work_restart, thr->work_update);
  695. thr->work_update = false;
  696. thr->work_restart = false;
  697. work = get_work(thr, thr->id); /* Make sure pool is ready */
  698. discard_work(work); /* Don't leak memory */
  699. pool = current_pool();
  700. if (!pool->has_stratum)
  701. quit(1, "Avalon2: MM have to use stratum pool");
  702. if (pool->coinbase_len > AVA2_P_COINBASE_SIZE) {
  703. applog(LOG_INFO, "Avalon2: MM pool coinbase length(%d) is more than %d",
  704. pool->coinbase_len, AVA2_P_COINBASE_SIZE);
  705. if (mm_cmp_1406(info)) {
  706. applog(LOG_ERR, "Avalon2: MM version less then 1406");
  707. return;
  708. }
  709. if ((pool->coinbase_len - pool->nonce2_offset + 64) > AVA2_P_COINBASE_SIZE) {
  710. applog(LOG_ERR, "Avalon2: MM pool modified coinbase length(%d) is more than %d",
  711. pool->coinbase_len - pool->nonce2_offset + 64, AVA2_P_COINBASE_SIZE);
  712. return;
  713. }
  714. }
  715. if (pool->merkles > AVA2_P_MERKLES_COUNT) {
  716. applog(LOG_ERR, "Avalon2: MM merkles have to less then %d", AVA2_P_MERKLES_COUNT);
  717. return;
  718. }
  719. if (pool->n2size < 3) {
  720. applog(LOG_ERR, "Avalon2: MM nonce2 size have to >= 3 (%d)", pool->n2size);
  721. return;
  722. }
  723. cgtime(&info->last_stratum);
  724. cg_rlock(&pool->data_lock);
  725. info->pool_no = pool->pool_no;
  726. copy_pool_stratum(info, pool);
  727. avalon2_stratum_pkgs(avalon2, pool);
  728. cg_runlock(&pool->data_lock);
  729. /* Configuer the parameter from outside */
  730. adjust_fan(info);
  731. info->set_voltage = opt_avalon2_voltage_min;
  732. info->set_frequency = opt_avalon2_freq_min;
  733. /* Set the Fan, Voltage and Frequency */
  734. memset(send_pkg.data, 0, AVA2_P_DATA_LEN);
  735. tmp = be32toh(info->fan_pwm);
  736. memcpy(send_pkg.data, &tmp, 4);
  737. applog(LOG_INFO, "Avalon2: Temp max: %d, Cut off temp: %d",
  738. get_current_temp_max(info), opt_avalon2_overheat);
  739. if (get_current_temp_max(info) >= opt_avalon2_overheat)
  740. tmp = encode_voltage(0);
  741. else
  742. tmp = encode_voltage(info->set_voltage);
  743. tmp = be32toh(tmp);
  744. memcpy(send_pkg.data + 4, &tmp, 4);
  745. tmp = be32toh(info->set_frequency);
  746. memcpy(send_pkg.data + 8, &tmp, 4);
  747. /* Configure the nonce2 offset and range */
  748. if (pool->n2size == 3)
  749. range = 0xffffff / (total_devices + 1);
  750. else
  751. range = 0xffffffff / (total_devices + 1);
  752. start = range * (avalon2->device_id + 1);
  753. tmp = be32toh(start);
  754. memcpy(send_pkg.data + 12, &tmp, 4);
  755. tmp = be32toh(range);
  756. memcpy(send_pkg.data + 16, &tmp, 4);
  757. /* Package the data */
  758. avalon2_init_pkg(&send_pkg, AVA2_P_SET, 1, 1);
  759. avalon2_send_pkg(avalon2, &send_pkg);
  760. }
  761. static int64_t avalon2_scanhash(struct thr_info *thr)
  762. {
  763. struct timeval current_stratum;
  764. struct cgpu_info *avalon2 = thr->cgpu;
  765. struct avalon2_info *info = avalon2->device_data;
  766. int stdiff;
  767. int64_t h;
  768. int i;
  769. if (unlikely(avalon2->usbinfo.nodev)) {
  770. applog(LOG_ERR, "%s %d: Device disappeared, shutting down thread",
  771. avalon2->drv->name, avalon2->device_id);
  772. return -1;
  773. }
  774. /* Stop polling the device if there is no stratum in 3 minutes, network is down */
  775. cgtime(&current_stratum);
  776. if (tdiff(&current_stratum, &(info->last_stratum)) > (double)(3.0 * 60.0))
  777. return 0;
  778. polling(thr, avalon2, info);
  779. stdiff = share_work_tdiff(avalon2);
  780. if (unlikely(info->failing)) {
  781. if (stdiff > 120) {
  782. applog(LOG_ERR, "%s %d: No valid shares for over 2 minutes, shutting down thread",
  783. avalon2->drv->name, avalon2->device_id);
  784. return -1;
  785. }
  786. } else if (stdiff > 60) {
  787. applog(LOG_ERR, "%s %d: No valid shares for over 1 minute, issuing a USB reset",
  788. avalon2->drv->name, avalon2->device_id);
  789. usb_reset(avalon2);
  790. info->failing = true;
  791. }
  792. h = 0;
  793. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  794. h += info->enable[i] ? (info->local_work[i] - info->hw_work[i]) : 0;
  795. }
  796. return h * 0xffffffff;
  797. }
  798. static struct api_data *avalon2_api_stats(struct cgpu_info *cgpu)
  799. {
  800. struct api_data *root = NULL;
  801. struct avalon2_info *info = cgpu->device_data;
  802. int i, j, a, b;
  803. char buf[24];
  804. double hwp;
  805. int minerindex, minercount;
  806. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  807. if(info->dev_type[i] == AVA2_ID_AVAX)
  808. continue;
  809. sprintf(buf, "ID%d MM Version", i + 1);
  810. root = api_add_string(root, buf, (char *)&(info->mm_version[i]), false);
  811. }
  812. minerindex = 0;
  813. minercount = 0;
  814. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  815. if (info->dev_type[i] == AVA2_ID_AVAX) {
  816. minerindex += AVA2_DEFAULT_MINERS;
  817. continue;
  818. }
  819. if (info->dev_type[i] == AVA2_ID_AVA2)
  820. minercount = AVA2_DEFAULT_MINERS;
  821. if (info->dev_type[i] == AVA2_ID_AVA3)
  822. minercount = AVA2_AVA3_MINERS;
  823. for (j = minerindex; j < (minerindex + minercount); j++) {
  824. sprintf(buf, "Match work count%02d", j+1);
  825. root = api_add_int(root, buf, &(info->matching_work[j]), false);
  826. }
  827. minerindex += AVA2_DEFAULT_MINERS;
  828. }
  829. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  830. if(info->dev_type[i] == AVA2_ID_AVAX)
  831. continue;
  832. sprintf(buf, "Local works%d", i + 1);
  833. root = api_add_int(root, buf, &(info->local_works[i]), false);
  834. }
  835. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  836. if(info->dev_type[i] == AVA2_ID_AVAX)
  837. continue;
  838. sprintf(buf, "Hardware error works%d", i + 1);
  839. root = api_add_int(root, buf, &(info->hw_works[i]), false);
  840. }
  841. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  842. if(info->dev_type[i] == AVA2_ID_AVAX)
  843. continue;
  844. a = info->hw_works[i];
  845. b = info->local_works[i];
  846. hwp = b ? ((double)a / (double)b) : 0;
  847. sprintf(buf, "Device hardware error%d%%", i + 1);
  848. root = api_add_percent(root, buf, &hwp, true);
  849. }
  850. for (i = 0; i < 2 * AVA2_DEFAULT_MODULARS; i++) {
  851. if(info->dev_type[i/2] == AVA2_ID_AVAX)
  852. continue;
  853. sprintf(buf, "Temperature%d", i + 1);
  854. root = api_add_int(root, buf, &(info->temp[i]), false);
  855. }
  856. for (i = 0; i < 2 * AVA2_DEFAULT_MODULARS; i++) {
  857. if(info->dev_type[i/2] == AVA2_ID_AVAX)
  858. continue;
  859. sprintf(buf, "Fan%d", i + 1);
  860. root = api_add_int(root, buf, &(info->fan[i]), false);
  861. }
  862. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  863. if(info->dev_type[i] == AVA2_ID_AVAX)
  864. continue;
  865. sprintf(buf, "Voltage%d", i + 1);
  866. root = api_add_int(root, buf, &(info->get_voltage[i]), false);
  867. }
  868. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  869. if(info->dev_type[i] == AVA2_ID_AVAX)
  870. continue;
  871. sprintf(buf, "Frequency%d", i + 1);
  872. root = api_add_int(root, buf, &(info->get_frequency[i]), false);
  873. }
  874. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  875. if(info->dev_type[i] == AVA2_ID_AVAX)
  876. continue;
  877. sprintf(buf, "Power good %02x", i + 1);
  878. root = api_add_int(root, buf, &(info->power_good[i]), false);
  879. }
  880. for (i = 0; i < AVA2_DEFAULT_MODULARS; i++) {
  881. if(info->dev_type[i] == AVA2_ID_AVAX)
  882. continue;
  883. sprintf(buf, "Led %02x", i + 1);
  884. root = api_add_int(root, buf, &(info->led_red[i]), false);
  885. }
  886. return root;
  887. }
  888. static void avalon2_statline_before(char *buf, size_t bufsiz, struct cgpu_info *avalon2)
  889. {
  890. struct avalon2_info *info = avalon2->device_data;
  891. int temp = get_current_temp_max(info);
  892. float volts = (float)info->set_voltage / 10000;
  893. tailsprintf(buf, bufsiz, "%4dMhz %2dC %3d%% %.3fV", info->set_frequency,
  894. temp, info->fan_pct, volts);
  895. }
  896. static void avalon2_shutdown(struct thr_info *thr)
  897. {
  898. struct cgpu_info *avalon2 = thr->cgpu;
  899. int interface = usb_interface(avalon2);
  900. usb_transfer(avalon2, PL2303_CTRL_OUT, PL2303_REQUEST_CTRL, 0, interface, C_SETLINE);
  901. }
  902. struct device_drv avalon2_drv = {
  903. .drv_id = DRIVER_avalon2,
  904. .dname = "avalon2",
  905. .name = "AV2",
  906. .get_api_stats = avalon2_api_stats,
  907. .get_statline_before = avalon2_statline_before,
  908. .drv_detect = avalon2_detect,
  909. .thread_prepare = avalon2_prepare,
  910. .hash_work = hash_driver_work,
  911. .flush_work = avalon2_update,
  912. .update_work = avalon2_update,
  913. .scanwork = avalon2_scanhash,
  914. .thread_shutdown = avalon2_shutdown,
  915. };